Rename NR_sched_pucch to NR_sched_pucch_t
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@@ -595,7 +595,7 @@ void nr_schedule_ue_spec(module_id_t module_id,
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const int current_harq_pid = slot % num_slots_per_tdd;
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NR_UE_harq_t *harq = &sched_ctrl->harq_processes[current_harq_pid];
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NR_sched_pucch *pucch = &sched_ctrl->sched_pucch[sched_ctrl->pucch_sched_idx][sched_ctrl->pucch_occ_idx];
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NR_sched_pucch_t *pucch = &sched_ctrl->sched_pucch[sched_ctrl->pucch_sched_idx][sched_ctrl->pucch_occ_idx];
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harq->feedback_slot = pucch->ul_slot;
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harq->is_waiting = 1;
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UE_info->mac_stats[UE_id].dlsch_rounds[harq->round]++;
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@@ -507,7 +507,7 @@ void nr_fill_nfapi_dl_pdu(int Mod_idP,
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rnti_t rnti,
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NR_CellGroupConfig_t *secondaryCellGroup,
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NR_UE_sched_ctrl_t *sched_ctrl,
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NR_sched_pucch *pucch_sched,
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NR_sched_pucch_t *pucch_sched,
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nfapi_nr_dmrs_type_e dmrsConfigType,
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uint16_t R,
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uint8_t Qm,
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@@ -1894,15 +1894,15 @@ int add_new_nr_ue(module_id_t mod_idP, rnti_t rntiP){
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UE_info->UE_sched_ctrl[UE_id].ul_rssi = 0;
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/* set illegal time domain allocation to force recomputation of all fields */
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UE_info->UE_sched_ctrl[UE_id].pusch_save.time_domain_allocation = -1;
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UE_info->UE_sched_ctrl[UE_id].sched_pucch = (NR_sched_pucch **)malloc(num_slots_ul*sizeof(NR_sched_pucch *));
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UE_info->UE_sched_ctrl[UE_id].sched_pucch = (NR_sched_pucch_t **)malloc(num_slots_ul*sizeof(NR_sched_pucch_t *));
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for (int s=0; s<num_slots_ul;s++)
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UE_info->UE_sched_ctrl[UE_id].sched_pucch[s] = (NR_sched_pucch *)malloc(2*sizeof(NR_sched_pucch));
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UE_info->UE_sched_ctrl[UE_id].sched_pucch[s] = (NR_sched_pucch_t *)malloc(2*sizeof(NR_sched_pucch_t));
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for (int k=0; k<num_slots_ul; k++) {
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for (int l=0; l<2; l++)
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memset((void *) &UE_info->UE_sched_ctrl[UE_id].sched_pucch[k][l],
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0,
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sizeof(NR_sched_pucch));
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sizeof(NR_sched_pucch_t));
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}
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LOG_I(MAC, "gNB %d] Add NR UE_id %d : rnti %x\n",
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mod_idP,
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@@ -44,7 +44,7 @@ void nr_schedule_pucch(int Mod_idP,
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for (int k=0; k<nr_ulmix_slots; k++) {
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for (int l=0; l<2; l++) {
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NR_sched_pucch *curr_pucch = &UE_info->UE_sched_ctrl[UE_id].sched_pucch[k][l];
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NR_sched_pucch_t *curr_pucch = &UE_info->UE_sched_ctrl[UE_id].sched_pucch[k][l];
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const uint16_t O_ack = curr_pucch->dai_c;
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const uint16_t O_csi = curr_pucch->csi_bits;
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const uint8_t O_sr = 0; // no SR in PUCCH implemented for now
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@@ -91,7 +91,7 @@ void nr_schedule_pucch(int Mod_idP,
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memset(&UE_info->UE_sched_ctrl[UE_id].sched_pucch[k][l],
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0,
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sizeof(NR_sched_pucch));
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sizeof(NR_sched_pucch_t));
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}
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}
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}
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@@ -198,7 +198,7 @@ void nr_csi_meas_reporting(int Mod_idP,
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int n_slots_frame) {
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NR_UE_info_t *UE_info = &RC.nrmac[Mod_idP]->UE_info;
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NR_sched_pucch *curr_pucch;
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NR_sched_pucch_t *curr_pucch;
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NR_PUCCH_ResourceSet_t *pucchresset;
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NR_CSI_ReportConfig_t *csirep;
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NR_CellGroupConfig_t *secondaryCellGroup = UE_info->secondaryCellGroup[UE_id];
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@@ -418,7 +418,7 @@ void nr_acknack_scheduling(int Mod_idP,
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NR_ServingCellConfigCommon_t *scc = RC.nrmac[Mod_idP]->common_channels->ServingCellConfigCommon;
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NR_UE_info_t *UE_info = &RC.nrmac[Mod_idP]->UE_info;
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NR_sched_pucch *curr_pucch;
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NR_sched_pucch_t *curr_pucch;
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int max_acknacks,pucch_res,first_ul_slot_tdd,k,i,l;
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uint8_t pdsch_to_harq_feedback[8];
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int found = 0;
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@@ -178,7 +178,7 @@ void nr_fill_nfapi_dl_pdu(int Mod_id,
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rnti_t rnti,
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NR_CellGroupConfig_t *secondaryCellGroup,
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NR_UE_sched_ctrl_t *sched_ctrl,
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NR_sched_pucch *pucch_sched,
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NR_sched_pucch_t *pucch_sched,
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nfapi_nr_dmrs_type_e dmrsConfigType,
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uint16_t R,
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uint8_t Qm,
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@@ -282,7 +282,7 @@ typedef struct NR_sched_pucch {
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uint8_t dai_c;
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uint8_t timing_indicator;
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uint8_t resource_indicator;
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} NR_sched_pucch;
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} NR_sched_pucch_t;
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/* this struct is a helper: as long as the TDA and DCI format remain the same
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* over the same uBWP and search space, there is no need to recalculate all
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@@ -387,7 +387,7 @@ typedef struct {
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/// the currently active BWP in UL
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NR_BWP_Uplink_t *active_ubwp;
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NR_sched_pucch **sched_pucch;
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NR_sched_pucch_t **sched_pucch;
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/// selected PUCCH index, if scheduled
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int pucch_sched_idx;
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int pucch_occ_idx;
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