added configurable half-slot parallelization to RU processing (same as original version)
This commit is contained in:
+4
-3
@@ -1193,9 +1193,9 @@ void *ru_stats_thread(void *param) {
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if (ru->feprx) print_meas(&ru->ofdm_demod_stats,"feprx (all ports)",NULL,NULL);
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if (ru->feptx_ofdm) {
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print_meas(&ru->precoding_stats,"feptx_prec (per port)",NULL,NULL);
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print_meas(&ru->precoding_stats,(ru->half_slot_parallelization==0)?"feptx_prec (per port)":"feptx_prec (per port, half_slot)",NULL,NULL);
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print_meas(&ru->ofdm_mod_stats,(ru->half_slot_parallelization==0)?"feptx_ofdm (per port)":"feptx_ofdm (per port, half_slot)",NULL,NULL);
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print_meas(&ru->txdataF_copy_stats,"txdataF_copy",NULL,NULL);
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print_meas(&ru->ofdm_mod_stats,"feptx_ofdm (per port)",NULL,NULL);
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print_meas(&ru->ofdm_total_stats,"feptx_total",NULL,NULL);
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}
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print_meas(&ru->rx_fhaul,"rx_fhaul",NULL,NULL);
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@@ -1560,7 +1560,6 @@ void init_RU_proc(RU_t *ru) {
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proc->frame_offset = 0;
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proc->num_slaves = 0;
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proc->frame_tx_unwrap = 0;
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proc->feptx_mask = 0;
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for (i=0; i<10; i++) proc->symbol_mask[i]=0;
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@@ -2177,6 +2176,8 @@ static void NRRCconfig_RU(void) {
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RC.ru[j]->openair0_cfg.rxfh_cores[0] = *(RUParamList.paramarray[j][RU_RXFH_CORE_ID].iptr);
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RC.ru[j]->openair0_cfg.txfh_cores[0] = *(RUParamList.paramarray[j][RU_TXFH_CORE_ID].iptr);
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RC.ru[j]->num_tpcores = *(RUParamList.paramarray[j][RU_NUM_TP_CORES].iptr);
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RC.ru[j]->half_slot_parallelization = *(RUParamList.paramarray[j][RU_HALF_SLOT_PARALLELIZATION].iptr);
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printf("[RU %d] Setting half-slot parallelization to %d\n",j,RC.ru[j]->half_slot_parallelization);
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AssertFatal(RC.ru[j]->num_tpcores <= RUParamList.paramarray[j][RU_TP_CORES].numelt, "Number of TP cores should be <=16\n");
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for (i=0; i<RC.ru[j]->num_tpcores; i++) RC.ru[j]->tpcores[i] = RUParamList.paramarray[j][RU_TP_CORES].iptr[i];
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if (config_isparamset(RUParamList.paramarray[j], RU_BF_WEIGHTS_LIST_IDX)) {
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+7
-27
@@ -170,31 +170,11 @@ typedef struct RU_prec_t_s{
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int index;
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} RU_prec_t;
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typedef struct RU_feptx_t_s{
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/// \internal This variable is protected by \ref mutex_feptx_prec
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int instance_cnt_feptx;
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/// pthread struct for RU TX FEP PREC worker thread
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pthread_t pthread_feptx;
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/// pthread attributes for worker feptx prec thread
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pthread_attr_t attr_feptx;
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/// condition varible for RU TX FEP PREC thread
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pthread_cond_t cond_feptx;
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/// mutex for fep PREC TX worker thread
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pthread_mutex_t mutex_feptx;
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struct RU_t_s *ru;
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int aa;//physical MAX nb_tx
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int half_slot;//first or second half of a slot
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int slot;//current slot
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int symbol;//current symbol
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int nb_antenna_ports;//number of logical port
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int index;
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}RU_feptx_t;
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typedef struct {
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int aid;
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struct RU_t_s *ru;
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int start_symbol;
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int end_symbol;
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int startSymbol;
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int endSymbol;
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int slot;
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} feprx_cmd_t;
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@@ -202,6 +182,8 @@ typedef struct {
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int aid;
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struct RU_t_s *ru;
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int slot;
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int startSymbol;
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int numSymbols;
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} feptx_cmd_t;
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typedef struct {
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@@ -411,10 +393,6 @@ typedef struct RU_proc_t_s {
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/// structure for precoding thread
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RU_prec_t prec[16];
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/// structure for feptx thread
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RU_feptx_t feptx[16];
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/// mask for checking process finished
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int feptx_mask;
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} RU_proc_t;
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typedef enum {
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@@ -525,8 +503,10 @@ typedef struct RU_t_s {
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int sf_ahead;
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/// TX processing advance in slots (for NR)
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int sl_ahead;
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/// flag to indicated TX FH is embedded in TX FEP
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/// flag to indicate TX FH is embedded in TX FEP
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int txfh_in_fep;
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/// flag to indicate half-slot parallelization
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int half_slot_parallelization;
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/// FAPI confiuration
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nfapi_nr_config_request_scf_t config;
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/// Frame parameters
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@@ -274,9 +274,13 @@ void nr_feptx(void *arg) {
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RU_t *ru = feptx->ru;
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int slot = feptx->slot;
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int aa = feptx->aid;
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int startSymbol = feptx->startSymbol;
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NR_DL_FRAME_PARMS *fp = ru->nr_frame_parms;
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int numSymbols = feptx->numSymbols;
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int numSamples = feptx->numSymbols*fp->ofdm_symbol_size;
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int txdataF_offset = (slot*fp->samples_per_slot_wCP) + startSymbol*fp->ofdm_symbol_size;
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int txdataF_BF_offset = startSymbol*fp->ofdm_symbol_size;
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int txdataF_offset = (slot*fp->samples_per_slot_wCP);
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////////////precoding////////////
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VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_RU_FEPTX_PREC+feptx->aid , 1);
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@@ -291,17 +295,18 @@ void nr_feptx(void *arg) {
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}
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if (ru->nb_tx == 1 && ru->nb_log_antennas == 1) {
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memcpy((void*)&ru->common.txdataF_BF[0][0],
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memcpy((void*)&ru->common.txdataF_BF[0][txdataF_BF_offset],
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(void*)&ru->gNB_list[0]->common_vars.txdataF[0][txdataF_offset],
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(fp->samples_per_slot_wCP)*sizeof(int32_t));
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numSamples*sizeof(int32_t));
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}
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else if (ru->do_precoding == 0) {
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int gNB_tx = ru->gNB_list[0]->frame_parms.nb_antennas_tx;
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memcpy((void*)&ru->common.txdataF_BF[aa][0],
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memcpy((void*)&ru->common.txdataF_BF[aa][txdataF_BF_offset],
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(void*)&ru->gNB_list[0]->common_vars.txdataF[aa%gNB_tx][txdataF_offset],
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(fp->samples_per_slot_wCP)*sizeof(int32_t));
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numSamples*sizeof(int32_t));
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}
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else {
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AssertFatal(1==0,"This needs to be fixed, do not use beamforming.\n");
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int32_t ***bw = ru->beam_weights[0];
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for(int i=0; i<fp->symbols_per_slot; ++i){
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nr_beam_precoding(ru->gNB_list[0]->common_vars.txdataF,
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@@ -319,7 +324,7 @@ void nr_feptx(void *arg) {
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VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_RU_FEPTX_PREC+feptx->aid , 0);
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////////////FEPTX////////////
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nr_feptx0(ru,slot,0,fp->symbols_per_slot,aa);
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nr_feptx0(ru,slot,startSymbol,numSymbols,aa);
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}
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// RU FEP TX using thread-pool
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@@ -338,8 +343,21 @@ void nr_feptx_tp(RU_t *ru, int frame_tx, int slot) {
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feptx_cmd->aid = aid;
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feptx_cmd->ru = ru;
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feptx_cmd->slot = slot;
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feptx_cmd->startSymbol = 0;
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feptx_cmd->numSymbols = (ru->half_slot_parallelization>0)?ru->nr_frame_parms->symbols_per_slot>>1:ru->nr_frame_parms->symbols_per_slot;
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pushTpool(ru->threadPool,req);
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nbfeptx++;
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if (ru->half_slot_parallelization>0) {
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notifiedFIFO_elt_t *req=newNotifiedFIFO_elt(sizeof(feptx_cmd_t), 2000 + aid + ru->nb_tx,ru->respfeptx,nr_feptx);
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feptx_cmd_t *feptx_cmd=(feptx_cmd_t*)NotifiedFifoData(req);
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feptx_cmd->aid = aid;
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feptx_cmd->ru = ru;
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feptx_cmd->slot = slot;
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feptx_cmd->startSymbol = ru->nr_frame_parms->symbols_per_slot>>1;
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feptx_cmd->numSymbols = ru->nr_frame_parms->symbols_per_slot>>1;
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pushTpool(ru->threadPool,req);
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nbfeptx++;
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}
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}
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while (nbfeptx>0) {
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notifiedFIFO_elt_t *req=pullTpool(ru->respfeptx, ru->threadPool);
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@@ -358,15 +376,16 @@ void nr_fep(void* arg) {
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RU_t *ru = feprx_cmd->ru;
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int aid = feprx_cmd->aid;
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int tti_rx = feprx_cmd->slot;
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int startSymbol = feprx_cmd->startSymbol;
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int endSymbol = feprx_cmd->endSymbol;
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NR_DL_FRAME_PARMS *fp = ru->nr_frame_parms;
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LOG_D(PHY,"In nr_fep for aid %d, slot = %d\n", aid, tti_rx);
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LOG_D(PHY,"In nr_fep for aid %d, slot = %d, startSymbol %d, endSymbol %d\n", aid, tti_rx,startSymbol,endSymbol);
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VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_RU_FEPRX+aid, 1);
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int offset = (tti_rx&3) * fp->symbols_per_slot * fp->ofdm_symbol_size;
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for (int l = 0; l < fp->symbols_per_slot; l++)
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for (int l = startSymbol; l <= endSymbol; l++)
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nr_slot_fep_ul(fp,
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ru->common.rxdata[aid],
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&ru->common.rxdataF[aid][offset],
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@@ -388,8 +407,21 @@ void nr_fep_tp(RU_t *ru, int slot) {
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feprx_cmd->aid = aid;
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feprx_cmd->ru = ru;
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feprx_cmd->slot = ru->proc.tti_rx;
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feprx_cmd->startSymbol = 0;
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feprx_cmd->endSymbol = (ru->half_slot_parallelization > 0)?(ru->nr_frame_parms->symbols_per_slot>>1)-1:(ru->nr_frame_parms->symbols_per_slot-1);
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pushTpool(ru->threadPool,req);
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nbfeprx++;
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if (ru->half_slot_parallelization>0) {
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notifiedFIFO_elt_t *req=newNotifiedFIFO_elt(sizeof(feprx_cmd_t), 1000 + aid + ru->nb_rx,ru->respfeprx,nr_fep);
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feprx_cmd_t *feprx_cmd=(feprx_cmd_t*)NotifiedFifoData(req);
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feprx_cmd->aid = aid;
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feprx_cmd->ru = ru;
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feprx_cmd->slot = ru->proc.tti_rx;
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feprx_cmd->startSymbol = ru->nr_frame_parms->symbols_per_slot>>1;
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feprx_cmd->endSymbol = ru->nr_frame_parms->symbols_per_slot-1;
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pushTpool(ru->threadPool,req);
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nbfeprx++;
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}
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}
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while (nbfeprx>0) {
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notifiedFIFO_elt_t *req=pullTpool(ru->respfeprx, ru->threadPool);
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@@ -108,6 +108,7 @@ typedef enum {
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#define CONFIG_STRING_RU_TP_CORES "tp_cores"
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#define CONFIG_STRING_RU_NUM_TP_CORES "num_tp_cores"
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#define CONFIG_STRING_RU_NUM_INTERFACES "num_interfaces"
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#define CONFIG_STRING_RU_HALF_SLOT_PARALLELIZATION "half_slot_parallelization"
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#define HLP_RU_SF_AHEAD "LTE TX processing advance"
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#define HLP_RU_SL_AHEAD "NR TX processing advance"
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@@ -118,6 +119,7 @@ typedef enum {
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#define HLP_RU_TP_CORES "List of cores for RU ThreadPool"
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#define HLP_RU_NUM_TP_CORES "Number of cores for RU ThreadPool"
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#define HLP_RU_NUM_INTERFACES "Number of network interfaces for RU"
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#define HLP_RU_HALF_SLOT_PARALLELIZATION "run half slots in parallel in RU FEP"
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#define RU_LOCAL_IF_NAME_IDX 0
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#define RU_LOCAL_ADDRESS_IDX 1
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@@ -157,6 +159,7 @@ typedef enum {
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#define RU_TP_CORES 35
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#define RU_NUM_TP_CORES 36
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#define RU_NUM_INTERFACES 37
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#define RU_HALF_SLOT_PARALLELIZATION 38
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/*-----------------------------------------------------------------------------------------------------------------------------------------*/
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/* RU configuration parameters */
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/* optname helpstr paramflags XXXptr defXXXval type numelt */
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@@ -199,7 +202,8 @@ typedef enum {
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{CONFIG_STRING_RU_TXFH_CORE_ID, HLP_RU_TXFH_CORE_ID, 0, uptr:NULL, defintval:0, TYPE_UINT, 0}, \
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{CONFIG_STRING_RU_TP_CORES, HLP_RU_TP_CORES, 0, uptr:NULL, defintarrayval:DEFRUTPCORES, TYPE_INTARRAY, 8}, \
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{CONFIG_STRING_RU_NUM_TP_CORES, HLP_RU_NUM_TP_CORES, 0, uptr:NULL, defintval:4, TYPE_UINT, 0}, \
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{CONFIG_STRING_RU_NUM_INTERFACES HLP_RU_NUM_INTERFACES, 0, uptr:NULL, defintval:1, TYPE_UINT, 0}, \
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{CONFIG_STRING_RU_NUM_INTERFACES, HLP_RU_NUM_INTERFACES, 0, uptr:NULL, defintval:1, TYPE_UINT, 0}, \
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{CONFIG_STRING_RU_HALF_SLOT_PARALLELIZATION, HLP_RU_HALF_SLOT_PARALLELIZATION, 0, uptr:NULL, defintval:1, TYPE_UINT, 0}, \
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}
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/*---------------------------------------------------------------------------------------------------------------------------------------*/
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