nr_schedule_response(): break up in separate dl_tti_req + tx_req phases
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@@ -84,12 +84,68 @@ void handle_nfapi_nr_csirs_pdu(processingData_L1tx_t *msgTx, int frame, int slot
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LOG_E(MAC,"CSI-RS list is full\n");
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}
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void nr_schedule_dl_tti_req(PHY_VARS_gNB *gNB, nfapi_nr_dl_tti_request_t *DL_req)
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{
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DevAssert(gNB != NULL);
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DevAssert(DL_req != NULL);
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nfapi_nr_config_request_scf_t *cfg = &gNB->gNB_config;
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int frame = DL_req->SFN;
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int slot = DL_req->Slot;
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int slot_type = nr_slot_select(cfg, frame, slot);
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DevAssert(slot_type == NR_DOWNLINK_SLOT || slot_type == NR_MIXED_SLOT);
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processingData_L1tx_t *msgTx = gNB->msgDataTx;
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msgTx->num_pdsch_slot = 0;
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msgTx->num_dl_pdcch = 0;
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msgTx->slot = slot;
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msgTx->frame = frame;
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uint8_t number_dl_pdu = DL_req->dl_tti_request_body.nPDUs;
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for (int i = 0; i < number_dl_pdu; i++) {
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nfapi_nr_dl_tti_request_pdu_t *dl_tti_pdu = &DL_req->dl_tti_request_body.dl_tti_pdu_list[i];
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LOG_D(NR_PHY, "NFAPI: dl_pdu %d : type %d\n", i, dl_tti_pdu->PDUType);
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switch (dl_tti_pdu->PDUType) {
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case NFAPI_NR_DL_TTI_SSB_PDU_TYPE:
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handle_nr_nfapi_ssb_pdu(msgTx, frame, slot, dl_tti_pdu);
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break;
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case NFAPI_NR_DL_TTI_PDCCH_PDU_TYPE:
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LOG_D(NR_PHY, "frame %d, slot %d, Got NFAPI_NR_DL_TTI_PDCCH_PDU_TYPE for %d.%d\n", frame, slot, DL_req->SFN, DL_req->Slot);
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msgTx->pdcch_pdu[msgTx->num_dl_pdcch] = dl_tti_pdu->pdcch_pdu;
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msgTx->num_dl_pdcch++;
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break;
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case NFAPI_NR_DL_TTI_CSI_RS_PDU_TYPE:
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LOG_D(NR_PHY, "frame %d, slot %d, Got NFAPI_NR_DL_TTI_CSI_RS_PDU_TYPE for %d.%d\n", frame, slot, DL_req->SFN, DL_req->Slot);
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handle_nfapi_nr_csirs_pdu(msgTx, frame, slot, &dl_tti_pdu->csi_rs_pdu);
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break;
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case NFAPI_NR_DL_TTI_PDSCH_PDU_TYPE:
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LOG_D(NR_PHY, "frame %d, slot %d, Got NFAPI_NR_DL_TTI_PDSCH_PDU_TYPE for %d.%d\n", frame, slot, DL_req->SFN, DL_req->Slot);
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nr_fill_dlsch_dl_tti_req(msgTx, &dl_tti_pdu->pdsch_pdu);
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}
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}
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}
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void nr_schedule_tx_req(PHY_VARS_gNB *gNB, nfapi_nr_tx_data_request_t *TX_req)
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{
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DevAssert(gNB != NULL);
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DevAssert(TX_req != NULL);
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processingData_L1tx_t *msgTx = gNB->msgDataTx;
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for (int idx = 0; idx < TX_req->Number_of_PDUs; ++idx) {
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uint8_t *sdu = (uint8_t *)TX_req->pdu_list[idx].TLVs[0].value.direct;
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nr_fill_dlsch_tx_req(msgTx, idx, sdu);
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}
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}
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void nr_schedule_response(NR_Sched_Rsp_t *Sched_INFO)
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{
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// copy data from L2 interface into L1 structures
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module_id_t Mod_id = Sched_INFO->module_id;
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nfapi_nr_dl_tti_request_t *DL_req = &Sched_INFO->DL_req;
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nfapi_nr_tx_data_request_t *TX_req = &Sched_INFO->TX_req;
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nfapi_nr_ul_tti_request_t *UL_tti_req = &Sched_INFO->UL_tti_req;
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nfapi_nr_ul_dci_request_t *UL_dci_req = &Sched_INFO->UL_dci_req;
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frame_t frame = Sched_INFO->frame;
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@@ -105,7 +161,6 @@ void nr_schedule_response(NR_Sched_Rsp_t *Sched_INFO)
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int slot_type = nr_slot_select(cfg,frame,slot);
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uint8_t number_dl_pdu = (DL_req==NULL) ? 0 : DL_req->dl_tti_request_body.nPDUs;
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uint8_t number_ul_dci_pdu = (UL_dci_req==NULL) ? 0 : UL_dci_req->numPdus;
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uint8_t number_ul_tti_pdu = (UL_tti_req==NULL) ? 0 : UL_tti_req->n_pdus;
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@@ -114,67 +169,19 @@ void nr_schedule_response(NR_Sched_Rsp_t *Sched_INFO)
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if (slot_type == NR_DOWNLINK_SLOT || slot_type == NR_MIXED_SLOT) {
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processingData_L1tx_t *msgTx = gNB->msgDataTx;
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msgTx->num_pdsch_slot = 0;
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msgTx->num_dl_pdcch = 0;
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msgTx->num_ul_pdcch = number_ul_dci_pdu;
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msgTx->slot = slot;
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msgTx->frame = frame;
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/* store the sched_response_id for the TX thread to release it when done */
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msgTx->sched_response_id = Sched_INFO->sched_response_id;
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for (int i = 0; i < number_dl_pdu; i++) {
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nfapi_nr_dl_tti_request_pdu_t *dl_tti_pdu = &DL_req->dl_tti_request_body.dl_tti_pdu_list[i];
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LOG_D(NR_PHY, "NFAPI: dl_pdu %d : type %d\n", i, dl_tti_pdu->PDUType);
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switch (dl_tti_pdu->PDUType) {
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case NFAPI_NR_DL_TTI_SSB_PDU_TYPE:
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handle_nr_nfapi_ssb_pdu(msgTx, frame, slot, dl_tti_pdu);
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break;
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case NFAPI_NR_DL_TTI_PDCCH_PDU_TYPE:
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LOG_D(NR_PHY,
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"frame %d, slot %d, Got NFAPI_NR_DL_TTI_PDCCH_PDU_TYPE for %d.%d\n",
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frame,
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slot,
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DL_req->SFN,
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DL_req->Slot);
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msgTx->pdcch_pdu[msgTx->num_dl_pdcch] = dl_tti_pdu->pdcch_pdu;
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msgTx->num_dl_pdcch++;
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break;
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case NFAPI_NR_DL_TTI_CSI_RS_PDU_TYPE:
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LOG_D(NR_PHY,
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"frame %d, slot %d, Got NFAPI_NR_DL_TTI_CSI_RS_PDU_TYPE for %d.%d\n",
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frame,
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slot,
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DL_req->SFN,
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DL_req->Slot);
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handle_nfapi_nr_csirs_pdu(msgTx, frame, slot, &dl_tti_pdu->csi_rs_pdu);
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break;
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case NFAPI_NR_DL_TTI_PDSCH_PDU_TYPE:
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LOG_D(NR_PHY,
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"frame %d, slot %d, Got NFAPI_NR_DL_TTI_PDSCH_PDU_TYPE for %d.%d\n",
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frame,
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slot,
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DL_req->SFN,
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DL_req->Slot);
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nr_fill_dlsch_dl_tti_req(msgTx, &dl_tti_pdu->pdsch_pdu);
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nfapi_nr_dl_tti_pdsch_pdu_rel15_t *pdsch_pdu_rel15 = &dl_tti_pdu->pdsch_pdu.pdsch_pdu_rel15;
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uint16_t pduIndex = pdsch_pdu_rel15->pduIndex;
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AssertFatal(TX_req->pdu_list[pduIndex].num_TLV == 1,
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"TX_req->pdu_list[%d].num_TLV %d != 1\n",
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pduIndex,
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TX_req->pdu_list[pduIndex].num_TLV);
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uint8_t *sdu = (uint8_t *)TX_req->pdu_list[pduIndex].TLVs[0].value.direct;
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nr_fill_dlsch_tx_req(msgTx, pduIndex, sdu);
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}
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}
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DevAssert(Sched_INFO->DL_req.SFN == frame);
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DevAssert(Sched_INFO->DL_req.Slot == slot);
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nr_schedule_dl_tti_req(gNB, &Sched_INFO->DL_req);
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for (int i = 0; i < number_ul_dci_pdu; i++)
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msgTx->ul_pdcch_pdu[i] = UL_dci_req->ul_dci_pdu_list[i];
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nr_schedule_tx_req(gNB, &Sched_INFO->TX_req);
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/* Both the current thread and the TX thread will access the sched_info
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* at the same time, so increase its reference counter, so that it is
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* released only when both threads are done with it.
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