Clean exit of vrtsim client if server is stopped first
Force exit in case current sample is not modified by the server with 2s.
This commit is contained in:
@@ -223,12 +223,12 @@ void shm_td_iq_channel_produce_samples(ShmTDIQChannel *channel, size_t num_sampl
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mutexunlock(data->mutex);
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}
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void shm_td_iq_channel_wait(ShmTDIQChannel *channel, uint64_t timestamp, uint64_t timeout_uS)
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int shm_td_iq_channel_wait(ShmTDIQChannel *channel, uint64_t timestamp, uint64_t timeout_uS)
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{
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ShmTDIQChannelData *data = channel->data;
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size_t current_timestamp = data->timestamp;
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if (current_timestamp >= timestamp) {
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return;
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return 0;
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}
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if (timeout_uS == 0) {
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mutexlock(data->mutex);
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@@ -241,8 +241,7 @@ void shm_td_iq_channel_wait(ShmTDIQChannel *channel, uint64_t timestamp, uint64_
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struct timespec ts = {.tv_sec = 0, .tv_nsec = 0};
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if (clock_gettime(CLOCK_REALTIME, &ts) != 0) {
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fprintf(stderr, "Error: clock_gettime failed: %s\n", strerror(errno));
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channel->abort = true;
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return;
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return 1;
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}
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ts.tv_sec += timeout_uS / 1000000; // Convert microseconds to seconds
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@@ -252,19 +251,20 @@ void shm_td_iq_channel_wait(ShmTDIQChannel *channel, uint64_t timestamp, uint64_
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while (current_timestamp < timestamp && !channel->abort) {
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int ret = pthread_cond_timedwait(&data->cond, &data->mutex, &ts);
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if (ret == ETIMEDOUT) {
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channel->abort = true;
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fprintf(stderr, "Error: Timed out waiting for samples. Aborting vrtsim\n");\
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break;
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fprintf(stderr, "Error: Timed out waiting for samples.\n");
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mutexunlock(data->mutex);
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return 1;
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} else if (ret != 0) {
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channel->abort = true;
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fprintf(stderr, "Error: pthread_cond_timedwait failed: %s\n", strerror(ret));
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break;
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mutexunlock(data->mutex);
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return 1;
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} else {
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current_timestamp = data->timestamp;
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}
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}
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mutexunlock(data->mutex);
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}
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return 0;
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}
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uint64_t shm_td_iq_channel_get_current_sample(const ShmTDIQChannel *channel)
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@@ -120,8 +120,10 @@ void shm_td_iq_channel_produce_samples(ShmTDIQChannel *channel, uint64_t num_sam
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* @param channel The ShmTDIQChannel structure.
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* @param timestamp The timestamp for which to wait.
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* @param timeout_uS The timeout in microseconds to wait for the sample. 0 means wait indefinitely.
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*
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* @return 0 if the sample is available, 1 if timed out
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*/
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void shm_td_iq_channel_wait(ShmTDIQChannel *channel, uint64_t timestamp, uint64_t timeout_uS);
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int shm_td_iq_channel_wait(ShmTDIQChannel *channel, uint64_t timestamp, uint64_t timeout_uS);
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/**
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* @brief Aborts the IQ channel causing the wait to return immediately
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+29
-6
@@ -223,6 +223,7 @@ static void *vrtsim_timing_job(void *arg)
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samples_to_produce += 1;
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leftover_samples -= 1;
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}
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AssertFatal(samples_to_produce >= 0, "Negative samples to produce: %f\n", samples_to_produce);
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shm_td_iq_channel_produce_samples(vrtsim_state->channel, samples_to_produce);
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usleep(1);
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}
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@@ -544,6 +545,12 @@ static int vrtsim_write_with_chanmod(vrtsim_state_t *vrtsim_state,
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static int vrtsim_write(openair0_device *device, openair0_timestamp timestamp, void **samplesVoid, int nsamps, int nbAnt, int flags)
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{
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AssertFatal(nsamps > 0, "Number of samples must be greater than 0\n");
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AssertFatal(nbAnt > 0 && nbAnt <= MAX_NUM_ANTENNAS_TX,
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"Number of antennas %d must be between 1 and %d\n",
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nbAnt,
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MAX_NUM_ANTENNAS_TX);
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AssertFatal(timestamp >= 0, "Timestamp must be non-negative, got %ld\n", timestamp);
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timestamp -= device->openair0_cfg->command_line_sample_advance;
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vrtsim_state_t *vrtsim_state = (vrtsim_state_t *)device->priv;
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bool channel_modelling = vrtsim_state->chanmod || vrtsim_state->taps_socket;
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@@ -555,13 +562,29 @@ static int vrtsim_read(openair0_device *device, openair0_timestamp *ptimestamp,
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{
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vrtsim_state_t *vrtsim_state = (vrtsim_state_t *)device->priv;
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if (shm_td_iq_channel_is_aborted(vrtsim_state->channel)) {
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for (int i = 0; i < nbAnt; i++) {
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memset(samplesVoid[i], 0, sizeof(c16_t) * nsamps);
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}
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return nsamps;
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return 0;
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}
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uint64_t timeout_uS = 2 * 1000 * 1000 / vrtsim_state->timescale; // 2 seconds in uS
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shm_td_iq_channel_wait(vrtsim_state->channel, vrtsim_state->last_received_sample + nsamps, timeout_uS);
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if (vrtsim_state->role == ROLE_SERVER) {
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uint64_t timeout_uS = 0; // 0 means no timeout
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shm_td_iq_channel_wait(vrtsim_state->channel, vrtsim_state->last_received_sample + nsamps, timeout_uS);
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} else {
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uint64_t start_sample = shm_td_iq_channel_get_current_sample(vrtsim_state->channel);
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uint64_t timeout_uS = 2 * 1000 * 1000; // 2 seconds timeout waiting for sample number to change
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//
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while (shm_td_iq_channel_wait(vrtsim_state->channel, vrtsim_state->last_received_sample + nsamps, timeout_uS) == 1) {
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uint64_t sample = shm_td_iq_channel_get_current_sample(vrtsim_state->channel);
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if (sample == start_sample) {
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LOG_E(HW,
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"VRTSIM: Read timeout waiting for sample %lu to change, aborting channel\n",
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vrtsim_state->last_received_sample + nsamps);
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shm_td_iq_channel_abort(vrtsim_state->channel);
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break;
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} else {
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start_sample = sample;
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}
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}
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}
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int ret = shm_td_iq_channel_rx(vrtsim_state->channel, vrtsim_state->last_received_sample, nsamps, 0, samplesVoid[0]);
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if (ret == CHANNEL_ERROR_TOO_LATE) {
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vrtsim_state->rx_samples_late += nsamps;
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