Merge remote-tracking branch 'origin/oaioran_multi_ru' into integration_2024_w35
This commit is contained in:
+138
-1
@@ -626,7 +626,7 @@ In the following, we will use these short hands:
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- `du-u-plane-mac-addr`: DU U plane MAC address
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- `pci-address-u-plane-vf`: PCI bus address of the VF for U plane
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||||
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In the configuration file, in option `fhi_72.dpdk_devices`, the first PCI address is for C-plane and the second for U-plane.
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||||
In the configuration file, in option `fhi_72.dpdk_devices`, the first PCI address is for U-plane and the second for C-plane.
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||||
|
||||
For both the MAC addresses, you might use the MAC addresses which are
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||||
pre-configured in the RUs (typically `00:11:22:33:44:66`, but that is not
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@@ -891,6 +891,143 @@ do not do any jumps (during the last hour). While an occasional jump is not
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necessarily problematic for the gNB, many such messages mean that the system is
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not working, and UEs might not be able to attach or reach good performance.
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# Operation with multiple RUs
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It is possible to connect up to 4 RUs to one DU at the same time and operate
|
||||
them as a (single) distributed antenna (array). This works since all RUs and
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the DU are synchronized onto a common clock using PTP. The assumed
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configuration is that with N RUs each having an M×M configuration, we
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effectively reach an (N×M)×(N×M) configuration.
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Some caveats:
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- Since it's a distributed antenna, this implies that this setup will deploy a
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single cell only -- multiple cells on different RUs are not supported.
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- All RUs should use the same MTU, so either "normal" (1500 byte) MTU or jumbo
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frames, but not a mix of both.
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- We tested only two RUs as of now, i.e., an 8×8 configuration.
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- Testing is currently limited to 4 logical antenna ports in DL; in UL, up to 8 can be used.
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For two RUs each using a 4x4 configuration, make sure to configure the 8x8
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||||
configuration, i.e., set `nb_tx` and `nb_rx` under `RUs` to 8 each (NOT two
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||||
RUs!). Also, set the antenna port information as listed above, i.e.,
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```
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pdsch_AntennaPorts_XP = 2;
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pdsch_AntennaPorts_N1 = 2;
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pusch_AntennaPorts = 8;
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maxMIMO_layers = 2;
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||||
```
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Once testing for 8 antenna ports in DL is complete, we will change pdsch_AntennaPorts_N1 to 4.
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||||
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Next, configure the `fhi_72` section as indicated below:
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```
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fhi_72 = {
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dpdk_devices = ("ru1_up_vf_pci", "ru1_cp_vf_pci", "ru2_up_vf_pci", "ru2_cp_vf_pci");
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// core config as always
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du_addr = ("du_ru1_up_mac_addr", "du_ru1_cp_mac_addr", "du_ru2_up_mac_addr", "du_ru2_cp_mac_addr");
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ru_addr = ("ru1_up_mac_addr", "ru1_cp_mac_addr", "ru2_up_mac_addr", "ru2_cp_mac_addr");
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// mtu, file_prefix ...
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fh_config = (
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{
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// timing, ru_config, prach_config of RU1
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},
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{
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// timing, ru_config, prach_config of RU2
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}
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||||
);
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};
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```
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i.e., for `dpdk_devices`, `du_addr`, and `ru_addr` is configured for
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both RUs in a (flat) array, and the individual radio configuration is given for
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each RU individually inside the `fh_config`.
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<details>
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<summary>Sample FHI 7.2 configuration for two RUs (Benetel 550 and 650)</summary>
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```
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fhi_72 = {
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dpdk_devices = ("0000:01:01.0", "0000:01:01.1", "0000:01:01.2", "0000:01:01.3");
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system_core = 0;
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io_core = 1;
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worker_cores = (2);
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du_addr = ("00:11:22:33:44:66","00:11:22:33:44:67","00:11:22:33:44:66","00:11:22:33:44:67");
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ru_addr = ("70:b3:d5:e1:5b:ff","70:b3:d5:e1:5b:ff","70:b3:d5:e1:5b:81", "70:b3:d5:e1:5b:81");
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mtu = 9216;
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file_prefix = "fhi_72";
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fh_config = (
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# RAN650
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{
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Tadv_cp_dl = 125;
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T2a_cp_dl = (259, 500);
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T2a_cp_ul = (25, 500);
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T2a_up = (134, 375);
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Ta3 = (152, 160);
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T1a_cp_dl = (419, 470);
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T1a_cp_ul = (285, 336);
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T1a_up = (294, 345);
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Ta4 = (0, 200);
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ru_config = {
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iq_width = 9;
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iq_width_prach = 9;
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};
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prach_config = {
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eAxC_offset = 4;
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};
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},
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# RAN550
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{
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Tadv_cp_dl = 125;
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T2a_cp_dl = (259, 500);
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T2a_cp_ul = (25, 500);
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T2a_up = (134, 375);
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Ta3 = (152, 160);
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T1a_cp_dl = (419, 470);
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T1a_cp_ul = (285, 336);
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T1a_up = (294, 345);
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Ta4 = (0, 200);
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ru_config = {
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iq_width = 9;
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iq_width_prach = 9;
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};
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prach_config = {
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eAxC_offset = 4;
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};
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});
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```
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</details>
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Compare also with the example (DU) configuration in
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[`gnb-du.sa.band78.106prb.fhi72.8x8-benetel-650-550.conf`](../targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb-du.sa.band78.106prb.fhi72.8x8-benetel-650-550.conf).
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Afterwards, start the gNB with the modified configuration file. If everything
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went well, you should see the RU counters for both RUs go up:
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```
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[NR_PHY] [o-du 0][rx 614400 pps 61440 kbps 844953][tx 1275076 pps 127488 kbps 1998585][Total Msgs_Rcvd 614400]
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[NR_PHY] [o_du0][pusch0 107520 prach0 46080]
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[NR_PHY] [o_du0][pusch1 107520 prach1 46080]
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[NR_PHY] [o_du0][pusch2 107520 prach2 46080]
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[NR_PHY] [o_du0][pusch3 107520 prach3 46080]
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[NR_PHY] [o-du 1][rx 614400 pps 61440 kbps 844953][tx 1275076 pps 127488 kbps 1998585][Total Msgs_Rcvd 614400]
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[NR_PHY] [o_du1][pusch0 107520 prach0 46080]
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[NR_PHY] [o_du1][pusch1 107520 prach1 46080]
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[NR_PHY] [o_du1][pusch2 107520 prach2 46080]
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[NR_PHY] [o_du1][pusch3 107520 prach3 46080]
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```
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You can also verify that there is signal on all RX antennas like so:
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```bash
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$ cat nrL1_stats.log
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[...]
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max_IO = 66 (81), min_I0 = 0 (53), avg_I0 = 51 dB(46.48.45.46.51.56.55.45.)
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PRACH I0 = 38.0 dB
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```
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Note the eight entries after `avg_IO`.
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You should be able to connect a UE now.
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# Contact in case of questions
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+10
-1
@@ -92,10 +92,19 @@ void oai_xran_fh_rx_callback(void *pCallbackTag, xran_status_t status)
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||||
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rx_sym = callback_tag->symbol;
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uint32_t ru_id = callback_tag->oXuId;
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LOG_D(NR_PHY,
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"rx_callback frame %d, subframe %d, slot %d, second %lld, rx_sym %d ru_id %d\n",
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frame,
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subframe,
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slot,
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(unsigned long long)second,
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rx_sym,
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ru_id);
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if (rx_sym == 7) {
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if (first_call_set) {
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if (!first_rx_set) {
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LOG_I(NR_PHY, "first_rx is set (num_ports %d)\n", num_ports);
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LOG_I(NR_PHY, "first_rx is set (num_ports %d), first_read_set %d\n", num_ports, first_read_set);
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}
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first_rx_set = 1;
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if (first_read_set == 1) {
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@@ -392,8 +392,8 @@ static void oran_allocate_buffers(void *handle,
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}
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}
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xran_5g_fronthault_config(pi->instanceHandle, src, srccp, dst, dstcp, oai_xran_fh_rx_callback, &portInstances->RxCbTag[0][0]);
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xran_5g_prach_req(pi->instanceHandle, prach, prachdecomp, oai_xran_fh_rx_prach_callback, &portInstances->PrachCbTag[0][0]);
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xran_5g_fronthault_config(pi->instanceHandle, src, srccp, dst, dstcp, oai_xran_fh_rx_callback, &portInstances->pusch_tag);
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xran_5g_prach_req(pi->instanceHandle, prach, prachdecomp, oai_xran_fh_rx_prach_callback, &portInstances->prach_tag);
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}
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int *oai_oran_initialize(const openair0_config_t *openair0_cfg)
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@@ -432,7 +432,11 @@ int *oai_oran_initialize(const openair0_config_t *openair0_cfg)
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}
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int sector = 0;
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printf("Initialize ORAN port instance %d (%d) sector %d\n", o_xu_id, init.xran_ports, sector);
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oran_port_instance_t *pi = &gPortInst[o_xu_id][sector];
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struct xran_cb_tag tag = {.cellId = sector, .oXuId = o_xu_id};
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pi->prach_tag = tag;
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pi->pusch_tag = tag;
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oran_allocate_buffers(gxran_handle, o_xu_id, 1, pi, &xran_fh_config[o_xu_id]);
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if ((xret = xran_reg_physide_cb(gxran_handle, oai_physide_dl_tti_call_back, NULL, 10, XRAN_CB_TTI)) != XRAN_STATUS_SUCCESS) {
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@@ -50,8 +50,8 @@ typedef struct oran_port_instance_t {
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void *instanceHandle;
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//uint32_t dpdkPoolIndex[MAX_SW_XRAN_INTERFACE_NUM];
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struct xran_cb_tag RxCbTag[XRAN_PORTS_NUM][XRAN_MAX_SECTOR_NR];
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struct xran_cb_tag PrachCbTag[XRAN_PORTS_NUM][XRAN_MAX_SECTOR_NR];
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struct xran_cb_tag prach_tag;
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struct xran_cb_tag pusch_tag;
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} oran_port_instance_t;
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extern struct xran_fh_config gxran_fh_config[XRAN_PORTS_NUM];
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+289
@@ -0,0 +1,289 @@
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Active_gNBs = ( "gNB-OAI-DU");
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# Asn1_verbosity, choice in: none, info, annoying
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Asn1_verbosity = "none";
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gNBs =
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(
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{
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////////// Identification parameters:
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gNB_ID = 0xe00;
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gNB_DU_ID = 0xe00;
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gNB_name = "gNB-OAI-DU";
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// Tracking area code, 0x0000 and 0xfffe are reserved values
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tracking_area_code = 1;
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plmn_list = ({ mcc = 208; mnc = 99; mnc_length = 2; snssaiList = ( { sst = 1; }); });
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nr_cellid = 1;
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////////// Physical parameters:
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||||
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||||
pdsch_AntennaPorts_XP = 2;
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pdsch_AntennaPorts_N1 = 2;
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pusch_AntennaPorts = 8;
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do_CSIRS = 1;
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do_SRS = 0 ;
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sib1_tda = 15;
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# force_UL256qam_off = 1;
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maxMIMO_layers = 2;
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||||
pdcch_ConfigSIB1 = (
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||||
{
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||||
controlResourceSetZero = 11;
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searchSpaceZero = 0;
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||||
}
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||||
);
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||||
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||||
servingCellConfigCommon = (
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||||
{
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||||
#spCellConfigCommon
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||||
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||||
physCellId = 0;
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||||
# n_TimingAdvanceOffset = 0;
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||||
# downlinkConfigCommon
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||||
#frequencyInfoDL
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||||
# this is 3430.56 MHz (center frequency)
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||||
absoluteFrequencySSB = 628704;
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dl_frequencyBand = 78;
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||||
# this is 3411.48 MHz
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||||
dl_absoluteFrequencyPointA = 627432;
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||||
#scs-SpecificCarrierList
|
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dl_offstToCarrier = 0;
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||||
# subcarrierSpacing
|
||||
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
|
||||
dl_subcarrierSpacing = 1;
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||||
dl_carrierBandwidth = 106;
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||||
#initialDownlinkBWP
|
||||
#genericParameters
|
||||
initialDLBWPlocationAndBandwidth = 28875; #38.101-1 Table 5.3.2-1
|
||||
#
|
||||
# subcarrierSpacing
|
||||
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
|
||||
initialDLBWPsubcarrierSpacing = 1;
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||||
#pdcch-ConfigCommon
|
||||
initialDLBWPcontrolResourceSetZero = 11;
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||||
initialDLBWPsearchSpaceZero = 0;
|
||||
|
||||
#uplinkConfigCommon
|
||||
#frequencyInfoUL
|
||||
ul_frequencyBand = 78;
|
||||
#scs-SpecificCarrierList
|
||||
ul_offstToCarrier = 0;
|
||||
# subcarrierSpacing
|
||||
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
|
||||
ul_subcarrierSpacing = 1;
|
||||
ul_carrierBandwidth = 106;
|
||||
pMax = 23;
|
||||
#initialUplinkBWP
|
||||
#genericParameters
|
||||
initialULBWPlocationAndBandwidth = 28875;
|
||||
# subcarrierSpacing
|
||||
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
|
||||
initialULBWPsubcarrierSpacing = 1;
|
||||
#rach-ConfigCommon
|
||||
#rach-ConfigGeneric
|
||||
prach_ConfigurationIndex = 154;
|
||||
#prach_msg1_FDM
|
||||
#0 = one, 1=two, 2=four, 3=eight
|
||||
prach_msg1_FDM = 0;
|
||||
prach_msg1_FrequencyStart = 0;
|
||||
zeroCorrelationZoneConfig = 0;
|
||||
preambleReceivedTargetPower = -100;
|
||||
#preamblTransMax (0...10) = (3,4,5,6,7,8,10,20,50,100,200)
|
||||
preambleTransMax = 8;
|
||||
#powerRampingStep
|
||||
# 0=dB0,1=dB2,2=dB4,3=dB6
|
||||
powerRampingStep = 3;
|
||||
#ra_ReponseWindow
|
||||
#1,2,4,8,10,20,40,80
|
||||
ra_ResponseWindow = 5;
|
||||
#ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR
|
||||
#1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen
|
||||
ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 3;
|
||||
#oneHalf (0..15) 4,8,12,16,...60,64
|
||||
ssb_perRACH_OccasionAndCB_PreamblesPerSSB = 15;
|
||||
#ra_ContentionResolutionTimer
|
||||
#(0..7) 8,16,24,32,40,48,56,64
|
||||
ra_ContentionResolutionTimer = 7;
|
||||
rsrp_ThresholdSSB = 19;
|
||||
#prach-RootSequenceIndex_PR
|
||||
#1 = 839, 2 = 139
|
||||
prach_RootSequenceIndex_PR = 2;
|
||||
prach_RootSequenceIndex = 1;
|
||||
# SCS for msg1, can only be 15 for 30 kHz < 6 GHz, takes precendence over the one derived from prach-ConfigIndex
|
||||
#
|
||||
msg1_SubcarrierSpacing = 1,
|
||||
# restrictedSetConfig
|
||||
# 0=unrestricted, 1=restricted type A, 2=restricted type B
|
||||
restrictedSetConfig = 0,
|
||||
|
||||
# this is the offset between the last PRACH preamble power and the Msg3 PUSCH, 2 times the field value in dB
|
||||
msg3_DeltaPreamble = 2;
|
||||
p0_NominalWithGrant = -96;
|
||||
|
||||
# pucch-ConfigCommon setup :
|
||||
# pucchGroupHopping
|
||||
# 0 = neither, 1= group hopping, 2=sequence hopping
|
||||
pucchGroupHopping = 0;
|
||||
hoppingId = 0;
|
||||
p0_nominal = -96;
|
||||
# ssb_PositionsInBurs_BitmapPR
|
||||
# 1=short, 2=medium, 3=long
|
||||
ssb_PositionsInBurst_PR = 2;
|
||||
ssb_PositionsInBurst_Bitmap = 0x10001L;
|
||||
|
||||
# ssb_periodicityServingCell
|
||||
# 0 = ms5, 1=ms10, 2=ms20, 3=ms40, 4=ms80, 5=ms160, 6=spare2, 7=spare1
|
||||
ssb_periodicityServingCell = 2;
|
||||
|
||||
# dmrs_TypeA_position
|
||||
# 0 = pos2, 1 = pos3
|
||||
dmrs_TypeA_Position = 0;
|
||||
|
||||
# subcarrierSpacing
|
||||
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
|
||||
subcarrierSpacing = 1;
|
||||
|
||||
|
||||
#tdd-UL-DL-ConfigurationCommon
|
||||
# 0=ms0p5, 1=ms0p625, 2=ms1, 3=ms1p25, 4=ms2, 5=ms2p5, 6=ms5, 7=ms10 8=ms3 9=ms4
|
||||
referenceSubcarrierSpacing = 1;
|
||||
dl_UL_TransmissionPeriodicity = 8;
|
||||
nrofDownlinkSlots = 3;
|
||||
nrofDownlinkSymbols = 6;
|
||||
nrofUplinkSlots = 2;
|
||||
nrofUplinkSymbols = 4;
|
||||
|
||||
ssPBCH_BlockPower = 10;
|
||||
}
|
||||
|
||||
);
|
||||
|
||||
|
||||
# ------- SCTP definitions
|
||||
SCTP :
|
||||
{
|
||||
# Number of streams to use in input/output
|
||||
SCTP_INSTREAMS = 2;
|
||||
SCTP_OUTSTREAMS = 2;
|
||||
};
|
||||
}
|
||||
);
|
||||
|
||||
|
||||
MACRLCs = (
|
||||
{
|
||||
num_cc = 1;
|
||||
tr_s_preference = "local_L1";
|
||||
tr_n_preference = "f1";
|
||||
local_n_if_name = "enp193s0f0";
|
||||
local_n_address = "172.21.16.51";
|
||||
remote_n_address = "172.21.6.90";
|
||||
local_n_portc = 500;
|
||||
local_n_portd = 2153;
|
||||
remote_n_portc = 501;
|
||||
remote_n_portd = 2153;
|
||||
pusch_TargetSNRx10 = 230;
|
||||
pucch_TargetSNRx10 = 270;
|
||||
dl_bler_target_upper = .35;
|
||||
dl_bler_target_lower = .15;
|
||||
ul_bler_target_upper = .35;
|
||||
ul_bler_target_lower = .15;
|
||||
pusch_FailureThres = 100;
|
||||
ul_max_mcs = 28;
|
||||
}
|
||||
);
|
||||
|
||||
L1s = (
|
||||
{
|
||||
num_cc = 1;
|
||||
tr_n_preference = "local_mac";
|
||||
prach_dtx_threshold = 100;
|
||||
pucch0_dtx_threshold = 80;
|
||||
pusch_dtx_threshold = 10;
|
||||
max_ldpc_iterations = 10;
|
||||
tx_amp_backoff_dB = 12; # needs to match O-RU configuration
|
||||
L1_rx_thread_core = 8;
|
||||
L1_tx_thread_core = 10; # relevant after merge of l1_tx_thread
|
||||
phase_compensation = 0; # needs to match O-RU configuration
|
||||
}
|
||||
);
|
||||
|
||||
RUs = (
|
||||
{
|
||||
local_rf = "no";
|
||||
nb_tx = 8;
|
||||
nb_rx = 8;
|
||||
att_tx = 0
|
||||
att_rx = 0;
|
||||
bands = [78];
|
||||
max_pdschReferenceSignalPower = -27;
|
||||
max_rxgain = 75;
|
||||
sf_extension = 0;
|
||||
eNB_instances = [0];
|
||||
ru_thread_core = 9;
|
||||
sl_ahead = 10;
|
||||
clock_src = "internal";
|
||||
tr_preference = "raw_if4p5"; # important: activate FHI7.2
|
||||
do_precoding = 0; # needs to match O-RU configuration
|
||||
}
|
||||
);
|
||||
|
||||
log_config :
|
||||
{
|
||||
global_log_level = "info";
|
||||
hw_log_level = "info";
|
||||
phy_log_level = "info";
|
||||
mac_log_level = "info";
|
||||
rlc_log_level = "info";
|
||||
f1ap_log_level = "info";
|
||||
};
|
||||
|
||||
fhi_72 = {
|
||||
dpdk_devices = ("0000:01:01.0", "0000:01:01.1", "0000:01:01.2", "0000:01:01.3");
|
||||
system_core = 0;
|
||||
io_core = 1;
|
||||
worker_cores = (2);
|
||||
du_addr = ("00:11:22:33:44:66","00:11:22:33:44:67","00:11:22:33:44:68","00:11:22:33:44:69");
|
||||
ru_addr = ("70:b3:d5:e1:5b:ff","70:b3:d5:e1:5b:ff","70:b3:d5:e1:5b:81", "70:b3:d5:e1:5b:81");
|
||||
mtu = 9216;
|
||||
file_prefix = "fhi_72";
|
||||
fh_config = (
|
||||
# RAN650
|
||||
{
|
||||
Tadv_cp_dl = 125;
|
||||
T2a_cp_dl = (259, 500);
|
||||
T2a_cp_ul = (25, 500);
|
||||
T2a_up = (134, 375);
|
||||
Ta3 = (152, 160);
|
||||
T1a_cp_dl = (419, 470);
|
||||
T1a_cp_ul = (285, 336);
|
||||
T1a_up = (294, 345);
|
||||
Ta4 = (0, 200);
|
||||
ru_config = {
|
||||
iq_width = 9;
|
||||
iq_width_prach = 9;
|
||||
};
|
||||
prach_config = {
|
||||
eAxC_offset = 4;
|
||||
};
|
||||
},
|
||||
# RAN550
|
||||
{
|
||||
Tadv_cp_dl = 125;
|
||||
T2a_cp_dl = (259, 500);
|
||||
T2a_cp_ul = (25, 500);
|
||||
T2a_up = (134, 375);
|
||||
Ta3 = (152, 160);
|
||||
T1a_cp_dl = (419, 470);
|
||||
T1a_cp_ul = (285, 336);
|
||||
T1a_up = (294, 345);
|
||||
Ta4 = (0, 200);
|
||||
ru_config = {
|
||||
iq_width = 9;
|
||||
iq_width_prach = 9;
|
||||
};
|
||||
prach_config = {
|
||||
eAxC_offset = 4;
|
||||
};
|
||||
});
|
||||
};
|
||||
Reference in New Issue
Block a user