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Changes to Downlink DMRS MASK calculation

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Procedure fill_dmrs_mask is modified.
	- PDSCH Mapping Type B is supported
	- Modified according to sections 5.1.6.2 of Spec 38.214
	- Single and double symbol DMRS are handled in Type A and Type B

Mapping type according to the time domain allocation from DCI should be used to get the values of DMRS config
For sending sib1 - DCI FORMAT 1_0 will be used with SI_RNTI, UE should perform these actions
according to sections 5.1.6.2 of Spec 38.214

Additional DMRS set to pos2 in case of msg2 reception, msg3 transmission.

Mapping type B is added to RRC reconfig.
	- nr_dlsim updated to test typeA and typeB. Verified the changes.
	- RFSIM Validation of PDSCH Mapping TypeB  by changing timedomainallocation in configuration files.
This commit is contained in:
Raghavendra Dinavahi
2021-04-23 10:33:56 +02:00
committed by Thomas Schlichter
parent d7913bb0e5
commit 5934e8e4ee
12 changed files with 554 additions and 120 deletions
Download Patch File Download Diff File Expand all files Collapse all files
cmake_targets/1504_phytest_001.log
View File
openair1/SIMULATION/NR_PHY/dlsim.c
+50 -3
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@@ -1364,15 +1364,62 @@ void update_dmrs_config(NR_CellGroupConfig_t *scg,PHY_VARS_NR_UE *ue, int8_t* dm
}
else if (dmrs_arg[0] == 1) {
mapping_type = typeB;
} else {
AssertFatal(1==0,"Incorrect Mappingtype, valid options 0-typeA, 1-typeB\n");
}
/* Additional DMRS positions 0 ,1 and 2 */
if(dmrs_arg[1] >= 0 && dmrs_arg[1] <3 ) {
/* Additional DMRS positions 0 ,1 ,2 and 3 */
if(dmrs_arg[1] >= 0 && dmrs_arg[1] <4 ) {
add_pos = dmrs_arg[1];
} else {
AssertFatal(1==0,"Incorrect Additional Position, valid options 0-pos1, 1-pos1, 2-pos2, 3-pos3\n");
}
if(scg != NULL) {
NR_BWP_Downlink_t *bwp = scg->spCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList->list.array[0];
*bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->dmrs_AdditionalPosition = add_pos;
AssertFatal((bwp->bwp_Dedicated->pdsch_Config != NULL && bwp->bwp_Dedicated->pdsch_Config->choice.setup != NULL), "Base RRC reconfig structures are not allocated.\n");
if (bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA == NULL) {
bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA = calloc(1,sizeof(*bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA));
bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->present= NR_SetupRelease_DMRS_DownlinkConfig_PR_setup;
bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup = calloc(1,sizeof(*bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup));
bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->dmrs_Type=NULL;//calloc(1,sizeof(*bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->dmrs_Type));
bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->maxLength=NULL;
bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->scramblingID0=NULL;
bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->scramblingID1=NULL;
bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->phaseTrackingRS=NULL;
bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->dmrs_AdditionalPosition = NULL;
printf("DLSIM: Allocated Mapping TypeA in RRC reconfig message\n");
} else if (bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeB == NULL) {
bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeB = calloc(1,sizeof(*bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeB));
bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeB->present= NR_SetupRelease_DMRS_DownlinkConfig_PR_setup;
bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeB->choice.setup = calloc(1,sizeof(*bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeB->choice.setup));
bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeB->choice.setup->dmrs_Type=NULL;//calloc(1,sizeof(*bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->dmrs_Type));
bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeB->choice.setup->maxLength=NULL;
bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeB->choice.setup->scramblingID0=NULL;
bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeB->choice.setup->scramblingID1=NULL;
bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeB->choice.setup->phaseTrackingRS=NULL;
bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeB->choice.setup->dmrs_AdditionalPosition = NULL;
printf("DLSIM: Allocated Mapping TypeB in RRC reconfig message\n");
}
struct NR_SetupRelease_DMRS_DownlinkConfig *dmrs_MappingtypeA = bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA;
struct NR_SetupRelease_DMRS_DownlinkConfig *dmrs_MappingtypeB = bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeB;
NR_DMRS_DownlinkConfig_t *dmrs_config = (mapping_type == typeA) ? dmrs_MappingtypeA->choice.setup : dmrs_MappingtypeB->choice.setup;
if (add_pos != 2) { // pos0,pos1,pos3
if (dmrs_config->dmrs_AdditionalPosition == NULL) {
dmrs_config->dmrs_AdditionalPosition = calloc(1,sizeof(*dmrs_MappingtypeA->choice.setup->dmrs_AdditionalPosition));
}
*dmrs_config->dmrs_AdditionalPosition = add_pos;
} else { // if NULL, Value pos2
free(dmrs_config->dmrs_AdditionalPosition);
dmrs_config->dmrs_AdditionalPosition = NULL;
}
for (int i=0;i<bwp->bwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.count;i++) {
bwp->bwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[i]->mappingType = mapping_type;
}
openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.c
+120 -81
View File
@@ -1729,6 +1729,47 @@ uint8_t compute_nr_root_seq(NR_RACH_ConfigCommon_t *rach_config,
}
}
// TS 38.211 Table 7.4.1.1.2-3: PDSCH DMRS positions l' within a slot for single-symbol DMRS and intra-slot frequency hopping disabled.
// The first 4 colomns are PDSCH mapping type A and the last 4 colomns are PDSCH mapping type B.
// When l' = l0, it is represented by 1
// E.g. when symbol duration is 12 in colomn 7, value 1057 ('10000100001') which means l' = l0, 5, 10.
int32_t table_7_4_1_1_2_3_pdsch_dmrs_positions_l [13][8] = { // Duration in symbols
{-1, -1, -1, -1, 1, 1, 1, 1}, //2 // (DMRS l' position)
{0, 0, 0, 0, 1, 1, 1, 1}, //3 // (DMRS l' position)
{0, 0, 0, 0, 1, 1, 1, 1}, //4 // (DMRS l' position)
{0, 0, 0, 0, 1, 17, 17, 17}, //5 // (DMRS l' position)
{0, 0, 0, 0, 1, 17, 17, 17}, //6 // (DMRS l' position)
{0, 0, 0, 0, 1, 17, 17, 17}, //7 // (DMRS l' position)
{0, 128, 128, 128, 1, 65, 73, 73}, //8 // (DMRS l' position)
{0, 128, 128, 128, 1, 129, 145, 145}, //9 // (DMRS l' position)
{0, 512, 576, 576, 1, 129, 145, 145}, //10 // (DMRS l' position)
{0, 512, 576, 576, 1, 257, 273, 585}, //11 // (DMRS l' position)
{0, 512, 576, 2336, 1, 513, 545, 585}, //12 // (DMRS l' position)
{0, 2048, 2176, 2336, 1, 513, 545, 585}, //13 // (DMRS l' position)
{0, 2048, 2176, 2336, -1, -1, -1, -1}, //14 // (DMRS l' position)
};
// TS 38.211 Table 7.4.1.1.2-4: PDSCH DMRS positions l' within a slot for double-symbol DMRS and intra-slot frequency hopping disabled.
// The first 4 colomns are PDSCH mapping type A and the last 4 colomns are PDSCH mapping type B.
// When l' = l0, it is represented by 1
int32_t table_7_4_1_1_2_4_pdsch_dmrs_positions_l [12][8] = { // Duration in symbols
{-1, -1, -1, -1, -1, -1, -1, -1}, //<4 // (DMRS l' position)
{0, 0, -1, -1, -1, -1, -1, -1}, //4 // (DMRS l' position)
{0, 0, -1, -1, 3, 3, -1, -1}, //5 // (DMRS l' position)
{0, 0, -1, -1, 3, 3, -1, -1}, //6 // (DMRS l' position)
{0, 0, -1, -1, 3, 3, -1, -1}, //7 // (DMRS l' position)
{0, 0, -1, -1, 3, 99, -1, -1}, //8 // (DMRS l' position)
{0, 0, -1, -1, 3, 99, -1, -1}, //9 // (DMRS l' position)
{0, 768, -1, -1, 3, 387, -1, -1}, //10 // (DMRS l' position)
{0, 768, -1, -1, 3, 387, -1, -1}, //11 // (DMRS l' position)
{0, 768, -1, -1, 3, 771, -1, -1}, //12 // (DMRS l' position)
{0, 3072, -1, -1, 3, 771, -1, -1}, //13 // (DMRS l' position)
{0, 3072, -1, -1, -1, -1, -1, -1}, //14 // (DMRS l' position)
};
// TS 38.211 Table 6.4.1.1.3-3: PUSCH DMRS positions l' within a slot for single-symbol DMRS and intra-slot frequency hopping disabled.
// The first 4 colomns are PUSCH mapping type A and the last 4 colomns are PUSCH mapping type B.
// When l' = l0, it is represented by 1
@@ -2312,8 +2353,8 @@ int get_num_dmrs(uint16_t dmrs_mask ) {
return(num_dmrs);
}
/* returns the total DMRS symbols in a slot*/
uint8_t get_num_dmrs_symbols(NR_PDSCH_Config_t *pdsch_Config,int dmrs_TypeA_Position,int NrOfSymbols,int startSymbol){
return get_num_dmrs(fill_dmrs_mask(pdsch_Config,dmrs_TypeA_Position,NrOfSymbols,startSymbol));
uint8_t get_num_dmrs_symbols(NR_PDSCH_Config_t *pdsch_Config,int dmrs_TypeA_Position,int NrOfSymbols, int startSymbol, int mappingtype){
return get_num_dmrs(fill_dmrs_mask(pdsch_Config,dmrs_TypeA_Position,NrOfSymbols, startSymbol, mappingtype));
}
// Table 5.1.2.2.1-1 38.214
@@ -2952,92 +2993,90 @@ int is_nr_UL_slot(NR_ServingCellConfigCommon_t *scc, slot_t slot, lte_frame_type
else return(slot_in_period >= slots1+scc->tdd_UL_DL_ConfigurationCommon->pattern2->nrofDownlinkSlots ? 1 : 0);
}
int16_t fill_dmrs_mask(NR_PDSCH_Config_t *pdsch_Config,int dmrs_TypeA_Position,int NrOfSymbols,int startSymbol) {
int16_t fill_dmrs_mask(NR_PDSCH_Config_t *pdsch_Config,int dmrs_TypeA_Position,int NrOfSymbols, int startSymbol, int mappingtype_fromDCI) {
int l0;int dmrs_AdditionalPosition = 0;int maxLength = 0;
NR_DMRS_DownlinkConfig_t *dmrs_config = NULL;
LOG_D(MAC, "NrofSymbols:%d, startSymbol:%d, mappingtype:%d, dmrs_TypeA_Position:%d\n", NrOfSymbols, startSymbol, mappingtype_fromDCI, dmrs_TypeA_Position);
int l0;
int ld = NrOfSymbols+startSymbol;
if (dmrs_TypeA_Position == NR_ServingCellConfigCommon__dmrs_TypeA_Position_pos2) l0=2;
else if (dmrs_TypeA_Position == NR_ServingCellConfigCommon__dmrs_TypeA_Position_pos3) l0=3;
else AssertFatal(1==0,"Illegal dmrs_TypeA_Position %d\n",(int)dmrs_TypeA_Position);
if (pdsch_Config == NULL) { // Initial BWP
if (ld <= 7) return(1<<l0);
else if (ld <= 9) return(1<<l0 | 1<<7);
else if (ld <= 12) return(1<<l0 | 1<<6 | 1<<9);
else if (ld <= 14) return(1<<l0 | 1<<7 | 1<<11);
// in case of DCI FORMAT 1_0 or dedicated pdsch config not received additionposition = pos2, len1 should be used
// referred to section 5.1.6.2 in 38.214
dmrs_AdditionalPosition = 2;
maxLength = 1;
if (pdsch_Config != NULL) {
if (mappingtype_fromDCI == typeA) { // Type A
if (pdsch_Config->dmrs_DownlinkForPDSCH_MappingTypeA && pdsch_Config->dmrs_DownlinkForPDSCH_MappingTypeA->present == NR_SetupRelease_DMRS_DownlinkConfig_PR_setup)
dmrs_config = (NR_DMRS_DownlinkConfig_t *)pdsch_Config->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup;
} else if (mappingtype_fromDCI == typeB) {
if (pdsch_Config->dmrs_DownlinkForPDSCH_MappingTypeB && pdsch_Config->dmrs_DownlinkForPDSCH_MappingTypeB->present == NR_SetupRelease_DMRS_DownlinkConfig_PR_setup)
dmrs_config = (NR_DMRS_DownlinkConfig_t *)pdsch_Config->dmrs_DownlinkForPDSCH_MappingTypeB->choice.setup;
} else {
AssertFatal(1==0,"Incorrect Mappingtype\n");
}
AssertFatal(dmrs_config != NULL," DMRS configs not present in PDSCH DMRS Downlink config\n");
// default values of maxlength = len2, additionalposition is pos2
if (dmrs_config->maxLength != NULL) maxLength = 2;
if (dmrs_config->dmrs_AdditionalPosition != NULL) dmrs_AdditionalPosition = *dmrs_config->dmrs_AdditionalPosition;
}
uint8_t ld, row, column;
int32_t l_prime = -1;
// columns 0-3 for TypeA, 4-7 for TypeB
column = (mappingtype_fromDCI == typeA) ? dmrs_AdditionalPosition : (dmrs_AdditionalPosition + 4);
// Section 7.4.1.1.2 in Spec 38.211
// For PDSCH Mapping TypeA, ld is duration between first OFDM of the slot and last OFDM symbol of the scheduled PDSCH resources
// For TypeB, ld is the duration of the scheduled PDSCH resources
ld = (mappingtype_fromDCI == typeA) ? (NrOfSymbols + startSymbol) : NrOfSymbols;
// Section 7.4.1.1.2 in Spec 38.211
//For PDSCH Mapping typeB, if PDSCH duration ld <=4, only single symbol DMRS is supported
if (mappingtype_fromDCI == typeB && ld <= 4)
maxLength = 1;
AssertFatal(ld > 2 && ld < 15,"Illegal NrOfSymbols according to Table 5.1.2.1-1 Spec 38.214 %d\n",ld);
AssertFatal((NrOfSymbols + startSymbol) < 15,"Illegal S+L according to Table 5.1.2.1-1 Spec 38.214 S:%d L:%d\n",startSymbol, NrOfSymbols);
if (mappingtype_fromDCI == typeA) {
// Section 7.4.1.1.2 in Spec 38.211
AssertFatal((l0 == 2) || (l0 == 3 && dmrs_AdditionalPosition != 3),"Wrong config, If dmrs_TypeA_Position POS3, ADD POS cannot be POS3 \n");
// Table 5.1.2.1-1 in Spec 38.214
AssertFatal(startSymbol <= l0, "Wrong config, Start symbol %d cannot be later than dmrs_TypeA_Position %d \n", startSymbol, l0);
// Section 7.4.1.1.2 in Spec 38.211
AssertFatal(l0 == 2 || (l0 == 3 && (ld != 3 || ld != 4)), "ld 3 or 4 symbols only possible with dmrs_TypeA_Position POS2 \n");
}
if (maxLength == 1) {
row = ld - 2;
l_prime = table_7_4_1_1_2_3_pdsch_dmrs_positions_l[row][column];
l0 = 1 << l0;
}
else {
if (pdsch_Config->dmrs_DownlinkForPDSCH_MappingTypeA &&
pdsch_Config->dmrs_DownlinkForPDSCH_MappingTypeA->present == NR_SetupRelease_DMRS_DownlinkConfig_PR_setup) {
// Relative to start of slot
NR_DMRS_DownlinkConfig_t *dmrs_config = (NR_DMRS_DownlinkConfig_t *)pdsch_Config->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup;
AssertFatal(ld>1 && ld < 15,"Illegal l_d %d\n",ld);
int pos2=0;
if (dmrs_config->maxLength == NULL) {
// this is Table 7.4.1.1.2-3: PDSCH DM-RS positions l for single-symbol DM-RS
if (dmrs_config->dmrs_AdditionalPosition == NULL) pos2=1;
else if (dmrs_config->dmrs_AdditionalPosition && *dmrs_config->dmrs_AdditionalPosition == NR_DMRS_DownlinkConfig__dmrs_AdditionalPosition_pos0 )
return(1<<l0);
switch (ld) {
case 2 :
case 3 :
case 4 :
case 5 :
case 6 :
case 7 :
return(1<<l0);
break;
case 8 :
case 9:
return(1<<l0 | 1<<7);
break;
case 10:
case 11:
if (dmrs_config->dmrs_AdditionalPosition && *dmrs_config->dmrs_AdditionalPosition==NR_DMRS_DownlinkConfig__dmrs_AdditionalPosition_pos1)
return(1<<l0 | 1<<9);
else
return(1<<l0 | 1<<6 | 1<<9);
break;
case 12:
if (dmrs_config->dmrs_AdditionalPosition && *dmrs_config->dmrs_AdditionalPosition==NR_DMRS_DownlinkConfig__dmrs_AdditionalPosition_pos1)
return(1<<l0 | 1<<9);
else if (pos2==1)
return(1<<l0 | 1<<6 | 1<<9);
else if (dmrs_config->dmrs_AdditionalPosition && *dmrs_config->dmrs_AdditionalPosition==NR_DMRS_DownlinkConfig__dmrs_AdditionalPosition_pos3)
return(1<<l0 | 1<<5 | 1<<8 | 1<<11);
break;
case 13:
case 14:
if (dmrs_config->dmrs_AdditionalPosition && *dmrs_config->dmrs_AdditionalPosition==NR_DMRS_DownlinkConfig__dmrs_AdditionalPosition_pos1)
return(1<<l0 | 1<<11);
else if (pos2==1)
return(1<<l0 | 1<<7 | 1<<11);
else if (dmrs_config->dmrs_AdditionalPosition && *dmrs_config->dmrs_AdditionalPosition==NR_DMRS_DownlinkConfig__dmrs_AdditionalPosition_pos3)
return(1<<l0 | 1<<5 | 1<<8 | 1<<11);
break;
}
}
else {
// Table 7.4.1.1.2-4: PDSCH DM-RS positions l for double-symbol DM-RS.
AssertFatal(ld>3,"Illegal l_d %d for len2 DMRS\n",ld);
if (ld < 10) return(1<<l0);
if (ld < 13 && *dmrs_config->dmrs_AdditionalPosition==NR_DMRS_DownlinkConfig__dmrs_AdditionalPosition_pos0) return(1<<l0);
if (ld < 13 && *dmrs_config->dmrs_AdditionalPosition!=NR_DMRS_DownlinkConfig__dmrs_AdditionalPosition_pos0) return(1<<l0 | 1<<8);
if (*dmrs_config->dmrs_AdditionalPosition!=NR_DMRS_DownlinkConfig__dmrs_AdditionalPosition_pos0) return(1<<l0);
if (*dmrs_config->dmrs_AdditionalPosition!=NR_DMRS_DownlinkConfig__dmrs_AdditionalPosition_pos1) return(1<<l0 | 1<<10);
if (*dmrs_config->dmrs_AdditionalPosition==NR_DMRS_DownlinkConfig__dmrs_AdditionalPosition_pos0) return(1<<l0);
if (*dmrs_config->dmrs_AdditionalPosition==NR_DMRS_DownlinkConfig__dmrs_AdditionalPosition_pos1) return(1<<l0 | 1<<10);
}
}
else if (pdsch_Config->dmrs_DownlinkForPDSCH_MappingTypeB &&
pdsch_Config->dmrs_DownlinkForPDSCH_MappingTypeA->present == NR_SetupRelease_DMRS_DownlinkConfig_PR_setup) {
// Relative to start of PDSCH resource
AssertFatal(1==0,"TypeB DMRS not supported yet\n");
}
row = (ld < 4) ? 0 : (ld - 3);
l_prime = table_7_4_1_1_2_4_pdsch_dmrs_positions_l[row][column];
l0 = 1<<l0 | 1<<(l0+1);
}
AssertFatal(1==0,"Shouldn't get here\n");
return(-1);
LOG_D(MAC, "l0:%d, ld:%d,row:%d, column:%d, addpos:%d, maxlen:%d\n", l0, ld, row, column, dmrs_AdditionalPosition, maxLength);
AssertFatal(l_prime>=0,"ERROR in configuration.Check Time Domain allocation of this Grant. l_prime < 1. row:%d, column:%d\n", row, column);
l_prime = (mappingtype_fromDCI == typeA) ? (l_prime | l0) : (l_prime << startSymbol);
LOG_D(MAC, " PDSCH DMRS MASK in HEX:%x\n", l_prime);
return l_prime;
}
uint8_t get_pusch_mcs_table(long *mcs_Table,
openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.h
+2 -2
View File
@@ -47,7 +47,7 @@ uint64_t from_nrarfcn(int nr_bandP, uint8_t scs_index, uint32_t dl_nrarfcn);
uint32_t to_nrarfcn(int nr_bandP, uint64_t dl_CarrierFreq, uint8_t scs_index, uint32_t bw);
int16_t fill_dmrs_mask(NR_PDSCH_Config_t *pdsch_Config,int dmrs_TypeA_Position,int NrOfSymbols,int startSymbol);
int16_t fill_dmrs_mask(NR_PDSCH_Config_t *pdsch_Config,int dmrs_TypeA_Position,int NrOfSymbols,int startSymbol,int mappingtype_fromDCI);
int is_nr_DL_slot(NR_ServingCellConfigCommon_t *scc,slot_t slotP);
@@ -153,7 +153,7 @@ bool set_ul_ptrs_values(NR_PTRS_UplinkConfig_t *ul_ptrs_config,
uint8_t *reOffset, uint8_t *maxNumPorts, uint8_t *ulPower,
uint8_t NrOfSymbols);
uint8_t get_num_dmrs_symbols(NR_PDSCH_Config_t *pdsch_Config,int dmrs_TypeA_Position,int NrOfSymbols,int startSymbol);
uint8_t get_num_dmrs_symbols(NR_PDSCH_Config_t *pdsch_Config,int dmrs_TypeA_Position,int NrOfSymbols,int startSymbol,int mappingtype);
/* \brief Set the transform precoding according to 6.1.3 of 3GPP TS 38.214 version 16.3.0 Release 16
@param *pusch_config, pointer to pusch config
openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c
+28 -8
View File
@@ -640,12 +640,26 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
LOG_W(MAC, "[%d.%d] Invalid time_domain_assignment. Possibly due to false DCI. Ignoring DCI!\n", frame, slot);
return -1;
}
NR_PDSCH_TimeDomainResourceAllocationList_t *pdsch_TimeDomainAllocationList = NULL;
if (mac->DLbwp[0]->bwp_Dedicated->pdsch_Config->choice.setup->pdsch_TimeDomainAllocationList)
pdsch_TimeDomainAllocationList = mac->DLbwp[0]->bwp_Dedicated->pdsch_Config->choice.setup->pdsch_TimeDomainAllocationList->choice.setup;
else if (mac->DLbwp[0]->bwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList)
pdsch_TimeDomainAllocationList = mac->DLbwp[0]->bwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList;
int mappingtype = pdsch_TimeDomainAllocationList->list.array[dci->time_domain_assignment.val]->mappingType;
/* dmrs symbol positions*/
dlsch_config_pdu_1_0->dlDmrsSymbPos = fill_dmrs_mask(pdsch_config,
dlsch_config_pdu_1_0->dlDmrsSymbPos = fill_dmrs_mask(NULL,
mac->scc->dmrs_TypeA_Position,
dlsch_config_pdu_1_0->number_symbols,
dlsch_config_pdu_1_0->start_symbol);
dlsch_config_pdu_1_0->dmrsConfigType = (pdsch_config) ? (mac->DLbwp[0]->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->dmrs_Type == NULL ? 0 : 1) : 0;
dlsch_config_pdu_1_0->start_symbol,
mappingtype);
// For DCI 1_0, dmrs type is type1. referred to section 5.1.6.2 of 3GPP TS 38.214
dlsch_config_pdu_1_0->dmrsConfigType = 0;
LOG_D(MAC, "DCI 1_0 start_sym:%d NR Symb:%d, DMRS_symb_pos:%x\n", dlsch_config_pdu_1_0->start_symbol, dlsch_config_pdu_1_0->number_symbols, dlsch_config_pdu_1_0->dlDmrsSymbPos);
/* number of DM-RS CDM groups without data according to subclause 5.1.6.2 of 3GPP TS 38.214 version 15.9.0 Release 15 */
if (dlsch_config_pdu_1_0->number_symbols == 2)
dlsch_config_pdu_1_0->n_dmrs_cdm_groups = 1;
@@ -783,10 +797,6 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
dl_config->dl_config_list[dl_config->number_pdus].pdu_type = FAPI_NR_DL_CONFIG_TYPE_DLSCH;
dl_config->dl_config_list[dl_config->number_pdus].dlsch_config_pdu.rnti = rnti;
// FIXME: fix number of additional dmrs
if(pdsch_config->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->dmrs_AdditionalPosition == NULL)
pdsch_config->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->dmrs_AdditionalPosition=calloc(1,sizeof(*pdsch_config->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->dmrs_AdditionalPosition));
fapi_nr_dl_config_dlsch_pdu_rel15_t *dlsch_config_pdu_1_1 = &dl_config->dl_config_list[dl_config->number_pdus].dlsch_config_pdu.dlsch_config_rel15;
dlsch_config_pdu_1_1->BWPSize = NRRIV2BW(mac->DLbwp[0]->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
@@ -807,11 +817,21 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
LOG_W(MAC, "[%d.%d] Invalid time_domain_assignment. Possibly due to false DCI. Ignoring DCI!\n", frame, slot);
return -1;
}
NR_PDSCH_TimeDomainResourceAllocationList_t *pdsch_TimeDomainAllocationList = NULL;
if (mac->DLbwp[0]->bwp_Dedicated->pdsch_Config->choice.setup->pdsch_TimeDomainAllocationList)
pdsch_TimeDomainAllocationList = mac->DLbwp[0]->bwp_Dedicated->pdsch_Config->choice.setup->pdsch_TimeDomainAllocationList->choice.setup;
else if (mac->DLbwp[0]->bwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList)
pdsch_TimeDomainAllocationList = mac->DLbwp[0]->bwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList;
int mappingtype = pdsch_TimeDomainAllocationList->list.array[dci->time_domain_assignment.val]->mappingType;
/* dmrs symbol positions*/
dlsch_config_pdu_1_1->dlDmrsSymbPos = fill_dmrs_mask(pdsch_config,
mac->scc->dmrs_TypeA_Position,
dlsch_config_pdu_1_1->number_symbols,
dlsch_config_pdu_1_1->start_symbol);
dlsch_config_pdu_1_1->start_symbol,
mappingtype);
dlsch_config_pdu_1_1->dmrsConfigType = mac->DLbwp[dl_bwp_id-1]->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->dmrs_Type == NULL ? 0 : 1;
/* TODO: fix number of DM-RS CDM groups without data according to subclause 5.1.6.2 of 3GPP TS 38.214,
using tables 7.3.1.2.2-1, 7.3.1.2.2-2, 7.3.1.2.2-3, 7.3.1.2.2-4 of 3GPP TS 38.212 */
openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c
+5
View File
@@ -490,6 +490,8 @@ int nr_config_pusch_pdu(NR_UE_MAC_INST_t *mac,
NR_BWP_UplinkDedicated_t *ibwp = mac->scg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP;
NR_PUSCH_Config_t *pusch_Config = ibwp->pusch_Config->choice.setup;
int startSymbolAndLength = ubwp->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[rar_grant->Msg3_t_alloc]->startSymbolAndLength;
int mappingtype = ubwp->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[rar_grant->Msg3_t_alloc]->mappingType;
// active BWP start
int abwp_start = NRRIV2PRBOFFSET(ubwp->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
@@ -527,6 +529,9 @@ int nr_config_pusch_pdu(NR_UE_MAC_INST_t *mac,
pusch_config_pdu->start_symbol_index = StartSymbolIndex;
pusch_config_pdu->nr_of_symbols = NrOfSymbols;
l_prime_mask = get_l_prime(NrOfSymbols, mappingtype, pusch_dmrs_pos2, pusch_len1);
LOG_D(MAC, "MSG3 start_sym:%d NR Symb:%d mappingtype:%d , DMRS_MASK:%x\n", pusch_config_pdu->start_symbol_index, pusch_config_pdu->nr_of_symbols, mappingtype, l_prime_mask);
#ifdef DEBUG_MSG3
LOG_D(MAC, "In %s BWP assignment (BWP (start %d, size %d) \n", __FUNCTION__, pusch_config_pdu->bwp_start, pusch_config_pdu->bwp_size);
#endif
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c
+18 -3
View File
@@ -795,6 +795,7 @@ void nr_add_msg3(module_id_t module_idP, int CC_id, frame_t frameP, sub_frame_t
int startSymbolAndLength = ubwp->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[ra->Msg3_tda_id]->startSymbolAndLength;
int start_symbol_index,nr_of_symbols;
SLIV2SL(startSymbolAndLength, &start_symbol_index, &nr_of_symbols);
int mappingtype = ubwp->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[ra->Msg3_tda_id]->mappingType;
pusch_pdu->pdu_bit_map = PUSCH_PDU_BITMAP_PUSCH_DATA;
pusch_pdu->rnti = ra->rnti;
@@ -820,7 +821,11 @@ void nr_add_msg3(module_id_t module_idP, int CC_id, frame_t frameP, sub_frame_t
pusch_pdu->transform_precoding = 0;
pusch_pdu->data_scrambling_id = *scc->physCellId;
pusch_pdu->nrOfLayers = 1;
pusch_pdu->ul_dmrs_symb_pos = 1<<start_symbol_index; // ok for now but use fill dmrs mask later
const uint16_t l_prime_mask = get_l_prime(nr_of_symbols,mappingtype,pusch_dmrs_pos2,pusch_len1);
pusch_pdu->ul_dmrs_symb_pos = l_prime_mask << start_symbol_index;
LOG_D(MAC, "MSG3 start_sym:%d NR Symb:%d mappingtype:%d , DMRS_MASK:%x, ul_dmrs_symb_pos:%x\n", start_symbol_index, nr_of_symbols, mappingtype, l_prime_mask, pusch_pdu->ul_dmrs_symb_pos);
pusch_pdu->dmrs_config_type = 0;
pusch_pdu->ul_dmrs_scrambling_id = *scc->physCellId; //If provided and the PUSCH is not a msg3 PUSCH, otherwise, L2 should set this to physical cell id.
pusch_pdu->scid = 0; //DMRS sequence initialization [TS38.211, sec 6.4.1.1.1]. Should match what is sent in DCI 0_1, otherwise set to 0.
@@ -935,6 +940,10 @@ void nr_generate_Msg2(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra
SLIV2SL(startSymbolAndLength, &startSymbolIndex, &nrOfSymbols);
AssertFatal(startSymbolIndex >= 0, "StartSymbolIndex is negative\n");
int mappingtype = ra->secondaryCellGroup->spCellConfig->spCellConfigDedicated->
downlinkBWP_ToAddModList->list.array[ra->bwp_id-1]->bwp_Common->pdsch_ConfigCommon->choice.setup->
pdsch_TimeDomainAllocationList->list.array[time_domain_assignment]->mappingType;
uint8_t numDmrsCdmGrpsNoData = 2;
if (nrOfSymbols == 2) {
numDmrsCdmGrpsNoData = 1;
@@ -1020,7 +1029,8 @@ void nr_generate_Msg2(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra
pdsch_pdu_rel15->dlDmrsSymbPos = fill_dmrs_mask(NULL,
nr_mac->common_channels->ServingCellConfigCommon->dmrs_TypeA_Position,
nrOfSymbols,
startSymbolIndex);
startSymbolIndex,
mappingtype);
int x_Overhead = 0;
uint8_t tb_scaling = 0;
@@ -1183,10 +1193,15 @@ void nr_generate_Msg4(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra
SLIV2SL(startSymbolAndLength, &startSymbolIndex, &nrOfSymbols);
AssertFatal(startSymbolIndex >= 0, "StartSymbolIndex is negative\n");
int mappingtype = ra->secondaryCellGroup->spCellConfig->spCellConfigDedicated->
downlinkBWP_ToAddModList->list.array[ra->bwp_id-1]->bwp_Common->pdsch_ConfigCommon->choice.setup->
pdsch_TimeDomainAllocationList->list.array[time_domain_assignment]->mappingType;
uint16_t dlDmrsSymbPos = fill_dmrs_mask(NULL,
nr_mac->common_channels->ServingCellConfigCommon->dmrs_TypeA_Position,
nrOfSymbols,
startSymbolIndex);
startSymbolIndex,
mappingtype);
uint16_t N_DMRS_SLOT = get_num_dmrs(dlDmrsSymbPos);
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_bch.c
+26 -19
View File
@@ -353,6 +353,7 @@ void schedule_control_sib1(module_id_t module_id,
int startSymbolIndex = 0;
int nrOfSymbols = 0;
if(gNB_mac->common_channels->ServingCellConfigCommon->dmrs_TypeA_Position == 0) {
startSymbolIndex = table_5_1_2_1_1_2_time_dom_res_alloc_A_dmrs_typeA_pos2[gNB_mac->sched_ctrlCommon->time_domain_allocation][1];
nrOfSymbols = table_5_1_2_1_1_2_time_dom_res_alloc_A_dmrs_typeA_pos2[gNB_mac->sched_ctrlCommon->time_domain_allocation][2];
@@ -361,6 +362,9 @@ void schedule_control_sib1(module_id_t module_id,
nrOfSymbols = table_5_1_2_1_1_2_time_dom_res_alloc_A_dmrs_typeA_pos3[gNB_mac->sched_ctrlCommon->time_domain_allocation][2];
}
// TODO: There are exceptions to this in table 5.1.2.1.1-4,5 (Default time domain allocation tables B, C)
int mappingtype = (startSymbolIndex <= 3)? typeA: typeB;
if (nrOfSymbols == 2) {
gNB_mac->sched_ctrlCommon->numDmrsCdmGrpsNoData = 1;
} else {
@@ -369,7 +373,7 @@ void schedule_control_sib1(module_id_t module_id,
// Calculate number of PRB_DMRS
uint8_t N_PRB_DMRS = gNB_mac->sched_ctrlCommon->numDmrsCdmGrpsNoData * 6;
uint16_t dlDmrsSymbPos = fill_dmrs_mask(NULL, gNB_mac->common_channels->ServingCellConfigCommon->dmrs_TypeA_Position, nrOfSymbols, startSymbolIndex);
uint16_t dlDmrsSymbPos = fill_dmrs_mask(NULL, gNB_mac->common_channels->ServingCellConfigCommon->dmrs_TypeA_Position, nrOfSymbols, startSymbolIndex, mappingtype);
uint16_t dmrs_length = get_num_dmrs(dlDmrsSymbPos);
int rbSize = 0;
@@ -388,6 +392,7 @@ void schedule_control_sib1(module_id_t module_id,
LOG_D(MAC,"nrOfSymbols = %i\n", nrOfSymbols);
LOG_D(MAC,"rbSize = %i\n", gNB_mac->sched_ctrlCommon->rbSize);
LOG_D(MAC,"TBS = %i\n", TBS);
LOG_D(MAC,"mappingtype = %d\n", mappingtype);
// Mark the corresponding RBs as used
for (int rb = 0; rb < gNB_mac->sched_ctrlCommon->rbSize; rb++) {
@@ -400,7 +405,8 @@ void nr_fill_nfapi_dl_sib1_pdu(int Mod_idP,
NR_Type0_PDCCH_CSS_config_t *type0_PDCCH_CSS_config,
uint32_t TBS,
int StartSymbolIndex,
int NrOfSymbols) {
int NrOfSymbols,
uint16_t dlDmrsSymbPos) {
gNB_MAC_INST *gNB_mac = RC.nrmac[Mod_idP];
NR_COMMON_channels_t *cc = gNB_mac->common_channels;
@@ -471,9 +477,7 @@ void nr_fill_nfapi_dl_sib1_pdu(int Mod_idP,
pdsch_pdu_rel15->mcsTable[0] = gNB_mac->sched_ctrlCommon->mcsTableIdx;
pdsch_pdu_rel15->StartSymbolIndex = StartSymbolIndex;
pdsch_pdu_rel15->NrOfSymbols = NrOfSymbols;
pdsch_pdu_rel15->dlDmrsSymbPos = fill_dmrs_mask(NULL, scc->dmrs_TypeA_Position, pdsch_pdu_rel15->NrOfSymbols, pdsch_pdu_rel15->StartSymbolIndex);
pdsch_pdu_rel15->dlDmrsSymbPos = dlDmrsSymbPos;
LOG_D(MAC,"dlDmrsSymbPos = 0x%x\n", pdsch_pdu_rel15->dlDmrsSymbPos);
/* Fill PDCCH DL DCI PDU */
@@ -587,27 +591,30 @@ void schedule_nr_sib1(module_id_t module_idP, frame_t frameP, sub_frame_t slotP)
// Configure sched_ctrlCommon for SIB1
schedule_control_sib1(module_idP, CC_id, type0_PDCCH_CSS_config, time_domain_allocation, mcsTableIdx, mcs, candidate_idx, sib1_sdu_length);
int startSymbolIndex = 0;
int nrOfSymbols = 0;
if(gNB_mac->common_channels->ServingCellConfigCommon->dmrs_TypeA_Position == 0) {
startSymbolIndex = table_5_1_2_1_1_2_time_dom_res_alloc_A_dmrs_typeA_pos2[gNB_mac->sched_ctrlCommon->time_domain_allocation][1];
nrOfSymbols = table_5_1_2_1_1_2_time_dom_res_alloc_A_dmrs_typeA_pos2[gNB_mac->sched_ctrlCommon->time_domain_allocation][2];
} else {
startSymbolIndex = table_5_1_2_1_1_2_time_dom_res_alloc_A_dmrs_typeA_pos3[gNB_mac->sched_ctrlCommon->time_domain_allocation][1];
nrOfSymbols = table_5_1_2_1_1_2_time_dom_res_alloc_A_dmrs_typeA_pos3[gNB_mac->sched_ctrlCommon->time_domain_allocation][2];
}
int startSymbolIndex = 0;
int nrOfSymbols = 0;
if(gNB_mac->common_channels->ServingCellConfigCommon->dmrs_TypeA_Position == 0) {
startSymbolIndex = table_5_1_2_1_1_2_time_dom_res_alloc_A_dmrs_typeA_pos2[gNB_mac->sched_ctrlCommon->time_domain_allocation][1];
nrOfSymbols = table_5_1_2_1_1_2_time_dom_res_alloc_A_dmrs_typeA_pos2[gNB_mac->sched_ctrlCommon->time_domain_allocation][2];
} else {
startSymbolIndex = table_5_1_2_1_1_2_time_dom_res_alloc_A_dmrs_typeA_pos3[gNB_mac->sched_ctrlCommon->time_domain_allocation][1];
nrOfSymbols = table_5_1_2_1_1_2_time_dom_res_alloc_A_dmrs_typeA_pos3[gNB_mac->sched_ctrlCommon->time_domain_allocation][2];
}
// Calculate number of PRB_DMRS
uint8_t N_PRB_DMRS = gNB_mac->sched_ctrlCommon->numDmrsCdmGrpsNoData * 6;
uint16_t dlDmrsSymbPos = fill_dmrs_mask(NULL, gNB_mac->common_channels->ServingCellConfigCommon->dmrs_TypeA_Position, nrOfSymbols, startSymbolIndex);
uint16_t dmrs_length = get_num_dmrs(dlDmrsSymbPos);
// TODO: There are exceptions to this in table 5.1.2.1.1-4,5 (Default time domain allocation tables B, C)
int mappingtype = (startSymbolIndex <= 3) ? typeA : typeB ;
// Calculate number of PRB_DMRS
uint8_t N_PRB_DMRS = gNB_mac->sched_ctrlCommon->numDmrsCdmGrpsNoData * 6;
uint16_t dlDmrsSymbPos = fill_dmrs_mask(NULL, gNB_mac->common_channels->ServingCellConfigCommon->dmrs_TypeA_Position, nrOfSymbols, startSymbolIndex, mappingtype);
uint16_t dmrs_length = get_num_dmrs(dlDmrsSymbPos);
const uint32_t TBS = nr_compute_tbs(nr_get_Qm_dl(gNB_mac->sched_ctrlCommon->mcs, gNB_mac->sched_ctrlCommon->mcsTableIdx),
nr_get_code_rate_dl(gNB_mac->sched_ctrlCommon->mcs, gNB_mac->sched_ctrlCommon->mcsTableIdx),
gNB_mac->sched_ctrlCommon->rbSize, nrOfSymbols, N_PRB_DMRS * dmrs_length,0 ,0 ,1 ) >> 3;
nfapi_nr_dl_tti_request_body_t *dl_req = &gNB_mac->DL_req[CC_id].dl_tti_request_body;
nr_fill_nfapi_dl_sib1_pdu(module_idP, dl_req, type0_PDCCH_CSS_config, TBS, startSymbolIndex, nrOfSymbols);
nr_fill_nfapi_dl_sib1_pdu(module_idP, dl_req, type0_PDCCH_CSS_config, TBS, startSymbolIndex, nrOfSymbols, dlDmrsSymbPos);
const int ntx_req = gNB_mac->TX_req[CC_id].Number_of_PDUs;
nfapi_nr_pdu_t *tx_req = &gNB_mac->TX_req[CC_id].pdu_list[ntx_req];
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c
+9 -3
View File
@@ -582,12 +582,15 @@ void pf_dl(module_id_t module_id,
sched_ctrl->time_domain_allocation,
&startSymbol,
&nrOfSymbols);
int mappingtype = sched_ctrl->active_bwp->bwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[sched_ctrl->time_domain_allocation]->mappingType;
const NR_ServingCellConfigCommon_t *scc = RC.nrmac[module_id]->common_channels->ServingCellConfigCommon;
const uint8_t N_DMRS_SLOT = get_num_dmrs_symbols(
sched_ctrl->active_bwp->bwp_Dedicated->pdsch_Config->choice.setup,
scc->dmrs_TypeA_Position,
nrOfSymbols,
startSymbol);
startSymbol,
mappingtype);
int rbSize = 0;
uint32_t TBS = 0;
@@ -697,6 +700,7 @@ void nr_schedule_ue_spec(module_id_t module_id,
const int startSymbolAndLength =
tdaList->list.array[sched_ctrl->time_domain_allocation]->startSymbolAndLength;
int mappingtype = tdaList->list.array[sched_ctrl->time_domain_allocation]->mappingType;
int startSymbolIndex, nrOfSymbols;
SLIV2SL(startSymbolAndLength, &startSymbolIndex, &nrOfSymbols);
@@ -705,7 +709,8 @@ void nr_schedule_ue_spec(module_id_t module_id,
uint8_t N_DMRS_SLOT = get_num_dmrs_symbols(sched_ctrl->active_bwp->bwp_Dedicated->pdsch_Config->choice.setup,
RC.nrmac[module_id]->common_channels->ServingCellConfigCommon->dmrs_TypeA_Position ,
nrOfSymbols,
startSymbolIndex);
startSymbolIndex,
mappingtype);
const nfapi_nr_dmrs_type_e dmrsConfigType = getDmrsConfigType(sched_ctrl->active_bwp);
const int nrOfLayers = 1;
const uint16_t R = nr_get_code_rate_dl(sched_ctrl->mcs, sched_ctrl->mcsTableIdx);
@@ -828,7 +833,8 @@ void nr_schedule_ue_spec(module_id_t module_id,
fill_dmrs_mask(bwp->bwp_Dedicated->pdsch_Config->choice.setup,
scc->dmrs_TypeA_Position,
nrOfSymbols,
startSymbolIndex);
startSymbolIndex,
mappingtype);
pdsch_pdu->dmrsConfigType = dmrsConfigType;
pdsch_pdu->dlDmrsScramblingId = *scc->physCellId;
pdsch_pdu->SCID = 0;
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c
+5 -1
View File
@@ -146,15 +146,18 @@ void nr_schedule_css_dlsch_phytest(module_id_t module_idP,
int startSymbolAndLength=0;
int StartSymbolIndex=-1,NrOfSymbols=14;
int StartSymbolIndex_tmp,NrOfSymbols_tmp;
int mappingtype_tmp, mappingtype;
for (int i=0;
i<scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.count;
i++) {
startSymbolAndLength = scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[i]->startSymbolAndLength;
SLIV2SL(startSymbolAndLength,&StartSymbolIndex_tmp,&NrOfSymbols_tmp);
mappingtype_tmp = scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[i]->mappingType;
if (NrOfSymbols_tmp < NrOfSymbols) {
NrOfSymbols = NrOfSymbols_tmp;
StartSymbolIndex = StartSymbolIndex_tmp;
mappingtype = mappingtype_tmp;
// k0 = *scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[i]->k0;
// time_domain_assignment = i;
}
@@ -165,7 +168,8 @@ void nr_schedule_css_dlsch_phytest(module_id_t module_idP,
pdsch_pdu_rel15->dlDmrsSymbPos = fill_dmrs_mask(NULL,
scc->dmrs_TypeA_Position,
NrOfSymbols,
StartSymbolIndex);
StartSymbolIndex,
mappingtype);
/*
AssertFatal(k0==0,"k0 is not zero for Initial DL BWP TimeDomain Alloc\n");
targets/PROJECTS/GENERIC-LTE-EPC/CONF/UE_0704_106_phytest_001.log
View File
targets/PROJECTS/GENERIC-LTE-EPC/CONF/gnb.band78.tm1.106PRB.usrpn300_typeB.conf
+291
View File
@@ -0,0 +1,291 @@
Active_gNBs = ( "gNB-Eurecom-5GNRBox");
# Asn1_verbosity, choice in: none, info, annoying
Asn1_verbosity = "none";
gNBs =
(
{
////////// Identification parameters:
gNB_ID = 0xe00;
cell_type = "CELL_MACRO_GNB";
gNB_name = "gNB-Eurecom-5GNRBox";
// Tracking area code, 0x0000 and 0xfffe are reserved values
tracking_area_code = 1;
plmn_list = ({mcc = 208; mnc = 93; mnc_length = 2;});
tr_s_preference = "local_mac"
////////// Physical parameters:
ssb_SubcarrierOffset = 0;
pdsch_AntennaPorts = 1;
pusch_AntennaPorts = 1;
servingCellConfigCommon = (
{
#spCellConfigCommon
physCellId = 0;
# downlinkConfigCommon
#frequencyInfoDL
# this is 3600 MHz + 43 PRBs@30kHz SCS (same as initial BWP), points to Subcarrier 0 of RB#10 of SSB block
absoluteFrequencySSB = 641032;
dl_frequencyBand = 78;
# this is 3600 MHz
dl_absoluteFrequencyPointA = 640000;
#scs-SpecificCarrierList
dl_offstToCarrier = 0;
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
dl_subcarrierSpacing = 1;
dl_carrierBandwidth = 106;
#initialDownlinkBWP
#genericParameters
# this is RBstart=33 (Start RB of SSB block),L=24 (275*(L-1))+RBstart
initialDLBWPlocationAndBandwidth = 6358; #6368;
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
initialDLBWPsubcarrierSpacing = 1;
#pdcch-ConfigCommon
initialDLBWPcontrolResourceSetZero = 0; #12;
initialDLBWPsearchSpaceZero = 0;
#pdsch-ConfigCommon
#pdschTimeDomainAllocationList (up to 16 entries)
initialDLBWPk0_0 = 0;
#initialULBWPmappingType
#0=typeA,1=typeB
initialDLBWPmappingType_0 = 1;
#this is SS=1,L=13
initialDLBWPstartSymbolAndLength_0 = 40;
initialDLBWPk0_1 = 0;
initialDLBWPmappingType_1 = 1;
#this is SS=2,L=12
initialDLBWPstartSymbolAndLength_1 = 53;
initialDLBWPk0_2 = 0;
initialDLBWPmappingType_2 = 1;
#this is SS=1,L=12
initialDLBWPstartSymbolAndLength_2 = 54;
initialDLBWPk0_3 = 0;
initialDLBWPmappingType_3 = 1;
#this is SS=1,L=5
initialDLBWPstartSymbolAndLength_3 = 57;
#uplinkConfigCommon
#frequencyInfoUL
ul_frequencyBand = 78;
#scs-SpecificCarrierList
ul_offstToCarrier = 0;
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
ul_subcarrierSpacing = 1;
ul_carrierBandwidth = 106;
pMax = 20;
#initialUplinkBWP
#genericParameters
initialULBWPlocationAndBandwidth = 6358;#6368;
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
initialULBWPsubcarrierSpacing = 1;
#rach-ConfigCommon
#rach-ConfigGeneric
prach_ConfigurationIndex = 98;
#prach_msg1_FDM
#0 = one, 1=two, 2=four, 3=eight
prach_msg1_FDM = 0;
prach_msg1_FrequencyStart = 0;
zeroCorrelationZoneConfig = 13;
preambleReceivedTargetPower = -118;
#preamblTransMax (0...10) = (3,4,5,6,7,8,10,20,50,100,200)
preambleTransMax = 6;
#powerRampingStep
# 0=dB0,1=dB2,2=dB4,3=dB6
powerRampingStep = 1;
#ra_ReponseWindow
#1,2,4,8,10,20,40,80
ra_ResponseWindow = 4;
#ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR
#1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen
ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 4;
#oneHalf (0..15) 4,8,12,16,...60,64
ssb_perRACH_OccasionAndCB_PreamblesPerSSB = 15;
#ra_ContentionResolutionTimer
#(0..7) 8,16,24,32,40,48,56,64
ra_ContentionResolutionTimer = 7;
rsrp_ThresholdSSB = 19;
#prach-RootSequenceIndex_PR
#1 = 839, 2 = 139
prach_RootSequenceIndex_PR = 2;
prach_RootSequenceIndex = 1;
# SCS for msg1, can only be 15 for 30 kHz < 6 GHz, takes precendence over the one derived from prach-ConfigIndex
#
msg1_SubcarrierSpacing = 1,
# restrictedSetConfig
# 0=unrestricted, 1=restricted type A, 2=restricted type B
restrictedSetConfig = 0,
# pusch-ConfigCommon (up to 16 elements)
initialULBWPk2_0 = 6;
initialULBWPmappingType_0 = 1
# this is SS=0 L=11
initialULBWPstartSymbolAndLength_0 = 55;
initialULBWPk2_1 = 6;
initialULBWPmappingType_1 = 1;
# this is SS=0 L=12
initialULBWPstartSymbolAndLength_1 = 69;
initialULBWPk2_2 = 7;
initialULBWPmappingType_2 = 1;
# this is SS=10 L=4
initialULBWPstartSymbolAndLength_2 = 52;
msg3_DeltaPreamble = 1;
p0_NominalWithGrant =-90;
# pucch-ConfigCommon setup :
# pucchGroupHopping
# 0 = neither, 1= group hopping, 2=sequence hopping
pucchGroupHopping = 0;
hoppingId = 40;
p0_nominal = -90;
# ssb_PositionsInBurs_BitmapPR
# 1=short, 2=medium, 3=long
ssb_PositionsInBurst_PR = 2;
ssb_PositionsInBurst_Bitmap = 0x1;
# ssb_periodicityServingCell
# 0 = ms5, 1=ms10, 2=ms20, 3=ms40, 4=ms80, 5=ms160, 6=spare2, 7=spare1
ssb_periodicityServingCell = 2;
# dmrs_TypeA_position
# 0 = pos2, 1 = pos3
dmrs_TypeA_Position = 0;
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
subcarrierSpacing = 1;
#tdd-UL-DL-ConfigurationCommon
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
referenceSubcarrierSpacing = 1;
# pattern1
# dl_UL_TransmissionPeriodicity
# 0=ms0p5, 1=ms0p625, 2=ms1, 3=ms1p25, 4=ms2, 5=ms2p5, 6=ms5, 7=ms10
dl_UL_TransmissionPeriodicity = 6;
nrofDownlinkSlots = 7;
nrofDownlinkSymbols = 6;
nrofUplinkSlots = 2;
nrofUplinkSymbols = 4;
ssPBCH_BlockPower = -25;
}
);
# ------- SCTP definitions
SCTP :
{
# Number of streams to use in input/output
SCTP_INSTREAMS = 2;
SCTP_OUTSTREAMS = 2;
};
////////// MME parameters:
mme_ip_address = ( { ipv4 = "192.168.12.26";
ipv6 = "192:168:30::17";
active = "yes";
preference = "ipv4";
}
);
NETWORK_INTERFACES :
{
GNB_INTERFACE_NAME_FOR_S1_MME = "eth0";
GNB_IPV4_ADDRESS_FOR_S1_MME = "192.168.12.111/24";
GNB_INTERFACE_NAME_FOR_S1U = "eth0";
GNB_IPV4_ADDRESS_FOR_S1U = "192.168.12.111/24";
GNB_PORT_FOR_S1U = 2152; # Spec 2152
};
}
);
MACRLCs = (
{
num_cc = 1;
tr_s_preference = "local_L1";
tr_n_preference = "local_RRC";
}
);
L1s = (
{
num_cc = 1;
tr_n_preference = "local_mac";
pusch_proc_threads = 8;
}
);
RUs = (
{
local_rf = "yes"
nb_tx = 1
nb_rx = 1
att_tx = 0
att_rx = 0;
bands = [7];
max_pdschReferenceSignalPower = -27;
max_rxgain = 50;
eNB_instances = [0];
## beamforming 1x2 matrix: 1 layer x 2 antennas
#bf_weights = [0x00007fff, 0x00007fff];
## beamforming 1x4 matrix: 1 layer x 4 antennas
#bf_weights = [0x00007fff, 0x0000,0x0000, 0x0000];
## beamforming 2x2 matrix:
#bf_weights = [0x00007fff, 0x00000000, 0x00000000, 0x00007fff];
## beamforming 4x4 matrix:
#bf_weights = [0x00007fff, 0x0000, 0x0000, 0x0000, 0x00000000, 0x00007fff, 0x0000, 0x0000, 0x0000, 0x0000, 0x00007fff, 0x0000, 0x0000, 0x0000, 0x0000, 0x00007fff];
sdr_addrs = "addr=192.168.10.2,mgmt_addr=192.168.10.2,second_addr=192.168.20.2";
clock_src = "external";
}
);
THREAD_STRUCT = (
{
#three config for level of parallelism "PARALLEL_SINGLE_THREAD", "PARALLEL_RU_L1_SPLIT", or "PARALLEL_RU_L1_TRX_SPLIT"
parallel_config = "PARALLEL_RU_L1_TRX_SPLIT";
#two option for worker "WORKER_DISABLE" or "WORKER_ENABLE"
worker_config = "WORKER_ENABLE";
}
);
log_config :
{
global_log_level ="info";
global_log_verbosity ="medium";
hw_log_level ="info";
hw_log_verbosity ="medium";
phy_log_level ="info";
phy_log_verbosity ="medium";
mac_log_level ="info";
mac_log_verbosity ="high";
rlc_log_level ="info";
rlc_log_verbosity ="medium";
pdcp_log_level ="info";
pdcp_log_verbosity ="medium";
rrc_log_level ="info";
rrc_log_verbosity ="medium";
};