Merge remote-tracking branch 'origin/develop_integration_2018_w25' into develop

Summary of changes:
- import work from Fujitsu:
    - multiple UEs
    - TDD configuration 1
- several bugs fixed:
    - UE power changes
      this one introduces two new parameters in the configuration file,
      update yours! The new parameters are "puSch10xSnr" and "puCch10xSnr".
      See targets/PROJECTS/GENERIC-LTE-EPC/CONF/enb.band7.tm1.50PRB.usrpb210.conf
    - IQ replay module
    - use MAKE_VERSION(x,y,z) instead of RRC_VERSION
    - some UE fixes

Some new problems may happen. The work from Fujitsu was huge
and their branch diverged a lot from develop, leading to a very
complex merge.

The UE power management may also have an impact. It expects the noise
level to be at around 30 (as seen in the enb T tracer, in the
"input signal" view) and asks for an SNR of 20dB (value 200 for puSch10xSnr
and puCch10xSnr in the configuration file). You may want to put a
lower value, say 100 (SNR of 10dB). This is still work in progress
and needs some more work (we need to calculate the noise level at
runtime and not use a hardcoded value of 30).
This commit is contained in:
Cedric Roux
2018-06-21 15:00:26 +02:00
162 changed files with 7575 additions and 1304 deletions
+6
View File
@@ -632,6 +632,10 @@ add_boolean_option(MESSAGE_CHART_GENERATOR False "For generating sequenc
add_boolean_option(MESSAGE_CHART_GENERATOR_RLC_MAC False "trace RLC-MAC exchanges in sequence diagrams")
add_boolean_option(MESSAGE_CHART_GENERATOR_PHY False "trace some PHY exchanges in sequence diagrams")
add_boolean_option(UE_EXPANSION False "enable UE_EXPANSION with max 256 UE")
add_boolean_option(PHY_TX_THREAD False "enable UE_EXPANSION with max 256 UE")
add_boolean_option(PRE_SCD_THREAD False "enable UE_EXPANSION with max 256 UE")
########################
# Include order
##########################
@@ -1093,6 +1097,7 @@ set(PHY_SRC_COMMON
${OPENAIR1_DIR}/PHY/LTE_TRANSPORT/prach_common.c
${OPENAIR1_DIR}/PHY/LTE_TRANSPORT/pucch_common.c
${OPENAIR1_DIR}/PHY/LTE_TRANSPORT/dlsch_scrambling.c
${OPENAIR1_DIR}/PHY/LTE_TRANSPORT/lte_gold_generic.c
${OPENAIR1_DIR}/PHY/LTE_UE_TRANSPORT/srs_modulation.c
${OPENAIR1_DIR}/PHY/MODULATION/ofdm_mod.c
${OPENAIR1_DIR}/PHY/LTE_ESTIMATION/lte_sync_time.c
@@ -1334,6 +1339,7 @@ set (MAC_SRC
${MAC_DIR}/eNB_scheduler_bch.c
${MAC_DIR}/eNB_scheduler_primitives.c
${MAC_DIR}/eNB_scheduler_RA.c
${MAC_DIR}/eNB_scheduler_fairRR.c
${MAC_DIR}/eNB_scheduler_phytest.c
${MAC_DIR}/pre_processor.c
${MAC_DIR}/config.c
@@ -49,7 +49,7 @@ eNBs =
pucch_delta_shift = 1;
pucch_nRB_CQI = 0;
pucch_nCS_AN = 0;
pucch_n1_AN = 32;
pucch_n1_AN = 0;
pdsch_referenceSignalPower = -24;
pdsch_p_b = 0;
pusch_n_SB = 1;
@@ -49,7 +49,7 @@ eNBs =
pucch_delta_shift = 1;
pucch_nRB_CQI = 0;
pucch_nCS_AN = 0;
pucch_n1_AN = 32;
pucch_n1_AN = 0;
pdsch_referenceSignalPower = -24;
pdsch_p_b = 0;
pusch_n_SB = 1;
@@ -49,7 +49,7 @@ eNBs =
pucch_delta_shift = 1;
pucch_nRB_CQI = 0;
pucch_nCS_AN = 0;
pucch_n1_AN = 32;
pucch_n1_AN = 0;
pdsch_referenceSignalPower = -24;
pdsch_p_b = 0;
pusch_n_SB = 1;
@@ -49,7 +49,7 @@ eNBs =
pucch_delta_shift = 1;
pucch_nRB_CQI = 0;
pucch_nCS_AN = 0;
pucch_n1_AN = 32;
pucch_n1_AN = 0;
pdsch_referenceSignalPower = -24;
pdsch_p_b = 0;
pusch_n_SB = 1;
@@ -49,7 +49,7 @@ eNBs =
pucch_delta_shift = 1;
pucch_nRB_CQI = 0;
pucch_nCS_AN = 0;
pucch_n1_AN = 32;
pucch_n1_AN = 0;
pdsch_referenceSignalPower = -24;
pdsch_p_b = 0;
pusch_n_SB = 1;
@@ -49,7 +49,7 @@ eNBs =
pucch_delta_shift = 1;
pucch_nRB_CQI = 0;
pucch_nCS_AN = 0;
pucch_n1_AN = 32;
pucch_n1_AN = 0;
pdsch_referenceSignalPower = -24;
pdsch_p_b = 0;
pusch_n_SB = 1;
@@ -49,7 +49,7 @@ eNBs =
pucch_delta_shift = 1;
pucch_nRB_CQI = 0;
pucch_nCS_AN = 0;
pucch_n1_AN = 32;
pucch_n1_AN = 0;
pdsch_referenceSignalPower = -29;
pdsch_p_b = 0;
pusch_n_SB = 1;
@@ -49,7 +49,7 @@ eNBs =
pucch_delta_shift = 1;
pucch_nRB_CQI = 0;
pucch_nCS_AN = 0;
pucch_n1_AN = 32;
pucch_n1_AN = 0;
pdsch_referenceSignalPower = -29;
pdsch_p_b = 0;
pusch_n_SB = 1;
@@ -49,7 +49,7 @@ eNBs =
pucch_delta_shift = 1;
pucch_nRB_CQI = 0;
pucch_nCS_AN = 0;
pucch_n1_AN = 32;
pucch_n1_AN = 0;
pdsch_referenceSignalPower = -29;
pdsch_p_b = 0;
pusch_n_SB = 1;
@@ -49,7 +49,7 @@ eNBs =
pucch_delta_shift = 1;
pucch_nRB_CQI = 0;
pucch_nCS_AN = 0;
pucch_n1_AN = 32;
pucch_n1_AN = 0;
pdsch_referenceSignalPower = -29;
pdsch_p_b = 0;
pusch_n_SB = 1;
@@ -49,7 +49,7 @@ eNBs =
pucch_delta_shift = 1;
pucch_nRB_CQI = 0;
pucch_nCS_AN = 0;
pucch_n1_AN = 32;
pucch_n1_AN = 0;
pdsch_referenceSignalPower = -29;
pdsch_p_b = 0;
pusch_n_SB = 1;
@@ -49,7 +49,7 @@ eNBs =
pucch_delta_shift = 1;
pucch_nRB_CQI = 0;
pucch_nCS_AN = 0;
pucch_n1_AN = 32;
pucch_n1_AN = 0;
pdsch_referenceSignalPower = -29;
pdsch_p_b = 0;
pusch_n_SB = 1;
+15 -1
View File
@@ -42,6 +42,7 @@ conf_nvram_path=$OPENAIR_DIR/openair3/NAS/TOOLS/ue_eurecom_test_sfr.conf
MSC_GEN="False"
XFORMS="True"
UE_EXPANSION="False"
PRINT_STATS="False"
VCD_TIMING="False"
DEADLINE_SCHEDULER_FLAG_USER="False"
@@ -214,8 +215,12 @@ function main() {
UE=1
echo_info "Will compile UE"
shift;;
--mu)
UE_EXPANSION="True"
echo_info "Will compile with UE_EXPANSION"
shift;;
--UE-conf-nvram)
conf_nvram_path=$(readlink -f "$1")
conf_nvram_path=$(readlink -f $2)
shift 2;;
--UE-gen-nvram)
gen_nvram_path=$(readlink -f $2)
@@ -540,6 +545,9 @@ function main() {
echo "set ( CMAKE_BUILD_TYPE $CMAKE_BUILD_TYPE )" >> $cmake_file
echo "set ( CFLAGS_PROCESSOR_USER \"$CFLAGS_PROCESSOR_USER\" )" >> $cmake_file
echo "set ( XFORMS $XFORMS )" >> $cmake_file
echo "set ( UE_EXPANSION $UE_EXPANSION )" >> $cmake_file
echo "set ( PHY_TX_THREAD $UE_EXPANSION )" >> $cmake_file
echo "set ( PRE_SCD_THREAD $UE_EXPANSION )" >> $cmake_file
echo "set ( RRC_ASN1_VERSION \"${REL}\")" >> $cmake_file
echo "set ( ENABLE_VCD_FIFO $VCD_TIMING )" >> $cmake_file
echo "set ( RF_BOARD \"${HW}\")" >> $cmake_file
@@ -707,6 +715,9 @@ function main() {
echo "set ( CMAKE_BUILD_TYPE $CMAKE_BUILD_TYPE )" >> $cmake_file
echo "set ( CFLAGS_PROCESSOR_USER \"$CFLAGS_PROCESSOR_USER\" )" >> $cmake_file
echo "set ( XFORMS $XFORMS )" >> $cmake_file
echo "set ( UE_EXPANSION $UE_EXPANSION )" >> $cmake_file
echo "set ( PHY_TX_THREAD $UE_EXPANSION )" >> $cmake_file
echo "set ( PRE_SCD_THREAD $UE_EXPANSION )" >> $cmake_file
echo "set ( PRINT_STATS $PRINT_STATS )" >> $cmake_file
echo "set ( RRC_ASN1_VERSION \"${REL}\")" >> $cmake_file
echo "set ( ENABLE_VCD_FIFO $VCD_TIMING )" >> $cmake_file
@@ -794,6 +805,9 @@ function main() {
cp $DIR/oaisim_mme_build_oai/CMakeLists.template $cmake_file
echo "set ( CMAKE_BUILD_TYPE $CMAKE_BUILD_TYPE )" >> $cmake_file
echo "set ( XFORMS $XFORMS )" >> $cmake_file
echo "set ( UE_EXPANSION $UE_EXPANSION )" >> $cmake_file
echo "set ( PHY_TX_THREAD $UE_EXPANSION )" >> $cmake_file
echo "set ( PRE_SCD_THREAD $UE_EXPANSION )" >> $cmake_file
echo "set ( RRC_ASN1_VERSION \"${REL}\")" >> $cmake_file
echo "set ( ENABLE_VCD_FIFO $VCD_TIMING )" >> $cmake_file
echo "set ( T_TRACER $T_TRACER )" >> $cmake_file
+1 -1
View File
@@ -48,7 +48,7 @@ if [ "$1" = "eNB" ]; then
else
if [ "$1" = "UE" ]; then
echo "bring up oai0 interface for UE"
sudo ifconfig oai0 10.0.1.9 netmask 255.255.255.0 broadcast 10.0.1.255
sudo ifconfig oai0 10.0.1.2 netmask 255.255.255.0 broadcast 10.0.1.255
$OPENAIR_DIR/targets/bin/rb_tool -a -c0 -i0 -z0 -s 10.0.1.2 -t 10.0.1.1 -r 1
fi
fi
Regular → Executable
View File
+2 -1
View File
@@ -95,7 +95,7 @@ hash_table_t *hashtable_create(const hash_size_t sizeP, hash_size_t (*hashfuncP)
* Cleanup
* The hashtable_destroy() walks through the linked lists for each possible hash value, and releases the elements. It also releases the nodes array and the hash_table_t.
*/
hashtable_rc_t hashtable_destroy(hash_table_t * const hashtblP)
hashtable_rc_t hashtable_destroy(hash_table_t * hashtblP)
{
hash_size_t n;
hash_node_t *node, *oldnode;
@@ -117,6 +117,7 @@ hashtable_rc_t hashtable_destroy(hash_table_t * const hashtblP)
}
free(hashtblP->nodes);
free(hashtblP);
hashtblP=NULL;
return HASH_TABLE_OK;
}
//-------------------------------------------------------------------------------------------------------------------------------
+2
View File
@@ -35,9 +35,11 @@
#ifndef ASSERTIONS_H_
#define ASSERTIONS_H_
void output_log_mem(void);
#define _Assert_Exit_ \
{ \
fprintf(stderr, "\nExiting execution\n"); \
output_log_mem(); \
display_backtrace(); \
fflush(stdout); \
fflush(stderr); \
+9
View File
@@ -736,6 +736,15 @@ void itti_mark_task_ready(task_id_t task_id)
/* Mark the thread as using LFDS queue */
lfds611_queue_use(itti_desc.tasks[task_id].message_queue);
#if defined(UE_EXPANSION) || defined(RTAI)
/* Assign low priority to created threads */
{
struct sched_param sched_param;
sched_param.sched_priority = sched_get_priority_min(SCHED_FIFO) + 1;
sched_setscheduler(0, SCHED_FIFO, &sched_param);
}
#endif
itti_desc.threads[thread_id].task_state = TASK_STATE_READY;
itti_desc.ready_tasks ++;
+3
View File
@@ -117,16 +117,19 @@ int signal_handle(int *end)
case SIGUSR1:
SIG_DEBUG("Received SIGUSR1\n");
*end = 1;
output_log_mem();
break;
case SIGSEGV: /* Fall through */
case SIGABRT:
SIG_DEBUG("Received SIGABORT\n");
output_log_mem();
backtrace_handle_signal(&info);
break;
case SIGINT:
printf("Received SIGINT\n");
output_log_mem();
itti_send_terminate_message(TASK_UNKNOWN);
*end = 1;
break;
+5 -1
View File
@@ -871,7 +871,11 @@ int pnf_phy_dl_config_req(nfapi_pnf_p7_config_t* pnf_p7, nfapi_dl_config_request
AssertFatal(UE_id<NUMBER_OF_UE_MAX,"returned UE_id %d >= %d(NUMBER_OF_UE_MAX)\n",UE_id,NUMBER_OF_UE_MAX);
LTE_eNB_DLSCH_t *dlsch0 = eNB->dlsch[UE_id][0];
//LTE_eNB_DLSCH_t *dlsch1 = eNB->dlsch[UE_id][1];
int harq_pid = dlsch0->harq_ids[sf];
int harq_pid = dlsch0->harq_ids[sfn%2][sf];
if(harq_pid >= dlsch0->Mdlharq) {
LOG_E(PHY,"pnf_phy_dl_config_req illegal harq_pid %d\n", harq_pid);
return(-1);
}
uint8_t *dlsch_sdu = tx_pdus[UE_id][harq_pid];
memcpy(dlsch_sdu, tx_pdu->segments[0].segment_data, tx_pdu->segments[0].segment_length);
@@ -1308,7 +1308,7 @@ typedef struct {
typedef struct {
nfapi_tl_t tl;
uint16_t length;
uint16_t pdu_index;
int16_t pdu_index;
uint16_t transmission_power;
} nfapi_dl_config_bch_pdu_rel8_t;
#define NFAPI_DL_CONFIG_REQUEST_BCH_PDU_REL8_TAG 0x2004
@@ -1320,7 +1320,7 @@ typedef struct {
typedef struct {
nfapi_tl_t tl;
uint16_t length;
uint16_t pdu_index;
int16_t pdu_index;
uint16_t rnti;
uint8_t resource_allocation_type;
uint32_t resource_block_coding;
@@ -1344,7 +1344,7 @@ typedef struct {
typedef struct {
nfapi_tl_t tl;
uint16_t length;
uint16_t pdu_index;
int16_t pdu_index;
uint16_t rnti;
uint8_t resource_allocation_type;
uint8_t virtual_resource_block_assignment_flag;
@@ -1429,7 +1429,7 @@ typedef struct {
typedef struct {
nfapi_tl_t tl;
uint16_t length;
uint16_t pdu_index;
int16_t pdu_index;
uint16_t p_rnti;
uint8_t resource_allocation_type;
uint8_t virtual_resource_block_assignment_flag;
@@ -1595,7 +1595,7 @@ typedef struct {
typedef struct {
nfapi_tl_t tl;
uint16_t length;
uint16_t pdu_index;
int16_t pdu_index;
uint16_t transmission_power;
uint16_t hyper_sfn_2_lsbs;
} nfapi_dl_config_nbch_pdu_rel13_t;
@@ -1609,7 +1609,7 @@ typedef struct {
typedef struct {
nfapi_tl_t tl;
uint16_t length;
uint16_t pdu_index;
int16_t pdu_index;
uint8_t ncce_index;
uint8_t aggregation_level;
uint8_t start_symbol;
@@ -1642,7 +1642,7 @@ typedef struct {
typedef struct {
nfapi_tl_t tl;
uint16_t length;
uint16_t pdu_index;
int16_t pdu_index;
uint8_t start_symbol;
uint8_t rnti_type;
uint16_t rnti;
@@ -2218,6 +2218,7 @@ typedef struct {
uint8_t dl_assignment_index;
uint32_t tpc_bitmap;
uint16_t transmission_power;
uint8_t harq_pid;
} nfapi_hi_dci0_dci_pdu_rel8_t;
#define NFAPI_HI_DCI0_REQUEST_DCI_PDU_REL8_TAG 0x2020
@@ -2361,7 +2362,7 @@ typedef struct {
#define NFAPI_TX_MAX_SEGMENTS 32
typedef struct {
uint16_t pdu_length;
uint16_t pdu_index;
int16_t pdu_index;
uint8_t num_segments;
struct {
uint32_t segment_length;
@@ -2902,7 +2903,7 @@ typedef struct {
typedef struct {
uint8_t sub_error_code;
uint16_t pdu_index;
int16_t pdu_index;
} nfapi_error_indication_msg_tx_err;
//
+3 -4
View File
@@ -259,7 +259,7 @@ void phy_config_request(PHY_Config_t *phy_config) {
AssertFatal(fp->prach_emtc_config_common.prach_ConfigInfo.prach_numRepetitionPerPreambleAttempt[0] > 0,
"prach_emtc_config_common.prach_ConfigInfo.prach_numRepetitionPerPreambleAttempt[0]==0\n");
#else
LOG_E(PHY,"***DJP*** removed assert on preamble fp->prach_emtc_config_common.prach_ConfigInfo.prach_numRepetitionPerPreambleAttempt[0]:%d expecting >0 %s:%d\n\n\n", fp->prach_emtc_config_common.prach_ConfigInfo.prach_numRepetitionPerPreambleAttempt[0], __FILE__, __LINE__);
LOG_D(PHY,"***DJP*** removed assert on preamble fp->prach_emtc_config_common.prach_ConfigInfo.prach_numRepetitionPerPreambleAttempt[0]:%d expecting >0 %s:%d\n\n\n", fp->prach_emtc_config_common.prach_ConfigInfo.prach_numRepetitionPerPreambleAttempt[0], __FILE__, __LINE__);
#endif
fp->prach_emtc_config_common.prach_ConfigInfo.prach_ConfigIndex[0] = cfg->emtc_config.prach_ce_level_0_configuration_index.value;
fp->prach_emtc_config_common.prach_ConfigInfo.prach_FreqOffset[0] = cfg->emtc_config.prach_ce_level_0_frequency_offset.value;
@@ -471,7 +471,7 @@ void phy_config_sib2_eNB(uint8_t Mod_id,
}
*/
void phy_config_sib13_eNB(uint8_t Mod_id,int CC_id,int mbsfn_Area_idx,
void phy_config_sib13_eNB(module_id_t Mod_id,int CC_id,int mbsfn_Area_idx,
long mbsfn_AreaId_r9)
{
@@ -491,8 +491,7 @@ void phy_config_sib13_eNB(uint8_t Mod_id,int CC_id,int mbsfn_Area_idx,
void phy_config_dedicated_eNB_step2(PHY_VARS_eNB *eNB)
{
uint8_t UE_id;
uint16_t UE_id;
struct PhysicalConfigDedicated *physicalConfigDedicated;
LTE_DL_FRAME_PARMS *fp=&eNB->frame_parms;
+1 -1
View File
@@ -109,7 +109,7 @@ int phy_init_RU(RU_t *ru) {
AssertFatal(RC.nb_L1_inst <= NUMBER_OF_eNB_MAX,"eNB instances %d > %d\n",
RC.nb_L1_inst,NUMBER_OF_eNB_MAX);
LOG_E(PHY,"[INIT] %s() RC.nb_L1_inst:%d \n", __FUNCTION__, RC.nb_L1_inst);
LOG_D(PHY,"[INIT] %s() RC.nb_L1_inst:%d \n", __FUNCTION__, RC.nb_L1_inst);
for (i=0; i<RC.nb_L1_inst; i++) {
for (p=0;p<15;p++) {
+7 -7
View File
@@ -37,7 +37,7 @@
uint8_t dmrs1_tab_ue[8] = {0,2,3,4,6,8,9,10};
extern uint8_t nfapi_mode;
void phy_config_sib1_ue(uint8_t Mod_id,int CC_id,
void phy_config_sib1_ue(module_id_t Mod_id,int CC_id,
uint8_t eNB_id,
TDD_Config_t *tdd_Config,
uint8_t SIwindowsize,
@@ -55,7 +55,7 @@ void phy_config_sib1_ue(uint8_t Mod_id,int CC_id,
fp->SIPeriod = SIperiod;
}
void phy_config_sib2_ue(uint8_t Mod_id,int CC_id,
void phy_config_sib2_ue(module_id_t Mod_id,int CC_id,
uint8_t eNB_id,
RadioResourceConfigCommonSIB_t *radioResourceConfigCommon,
ARFCN_ValueEUTRA_t *ul_CarrierFreq,
@@ -179,7 +179,7 @@ void phy_config_sib2_ue(uint8_t Mod_id,int CC_id,
}
void phy_config_sib13_ue(uint8_t Mod_id,int CC_id,uint8_t eNB_id,int mbsfn_Area_idx,
void phy_config_sib13_ue(module_id_t Mod_id,int CC_id,uint8_t eNB_id,int mbsfn_Area_idx,
long mbsfn_AreaId_r9)
{
@@ -201,7 +201,7 @@ void phy_config_sib13_ue(uint8_t Mod_id,int CC_id,uint8_t eNB_id,int mbsfn_Area_
/*
* Configures UE MAC and PHY with radioResourceCommon received in mobilityControlInfo IE during Handover
*/
void phy_config_afterHO_ue(uint8_t Mod_id,uint8_t CC_id,uint8_t eNB_id, MobilityControlInfo_t *mobilityControlInfo, uint8_t ho_failed)
void phy_config_afterHO_ue(module_id_t Mod_id,uint8_t CC_id,uint8_t eNB_id, MobilityControlInfo_t *mobilityControlInfo, uint8_t ho_failed)
{
if(mobilityControlInfo!=NULL) {
@@ -324,7 +324,7 @@ void phy_config_afterHO_ue(uint8_t Mod_id,uint8_t CC_id,uint8_t eNB_id, Mobility
}
}
void phy_config_meas_ue(uint8_t Mod_id,uint8_t CC_id,uint8_t eNB_index,uint8_t n_adj_cells,unsigned int *adj_cell_id)
void phy_config_meas_ue(module_id_t Mod_id,uint8_t CC_id,uint8_t eNB_index,uint8_t n_adj_cells,unsigned int *adj_cell_id)
{
PHY_MEASUREMENTS *phy_meas = &PHY_vars_UE_g[Mod_id][CC_id]->measurements;
@@ -353,7 +353,7 @@ void phy_config_dedicated_scell_ue(uint8_t Mod_id,
#endif
void phy_config_harq_ue(uint8_t Mod_id,int CC_id,uint8_t eNB_id,
void phy_config_harq_ue(module_id_t Mod_id,int CC_id,uint8_t eNB_id,
uint16_t max_harq_tx )
{
@@ -363,7 +363,7 @@ void phy_config_harq_ue(uint8_t Mod_id,int CC_id,uint8_t eNB_id,
extern uint16_t beta_cqi[16];
void phy_config_dedicated_ue(uint8_t Mod_id,int CC_id,uint8_t eNB_id,
void phy_config_dedicated_ue(module_id_t Mod_id,int CC_id,uint8_t eNB_id,
struct PhysicalConfigDedicated *physicalConfigDedicated )
{
@@ -34,7 +34,7 @@
void lte_adjust_synch(LTE_DL_FRAME_PARMS *frame_parms,
PHY_VARS_UE *ue,
unsigned char eNB_id,
module_id_t eNB_id,
uint8_t subframe,
unsigned char clear,
short coef)
@@ -112,7 +112,7 @@ int lte_est_timing_advance(LTE_DL_FRAME_PARMS *frame_parms,
}
int lte_est_timing_advance_pusch(PHY_VARS_eNB* eNB,uint8_t UE_id)
int lte_est_timing_advance_pusch(PHY_VARS_eNB* eNB,module_id_t UE_id)
{
int temp, i, aa, max_pos=0, max_val=0;
short Re,Im;
@@ -35,7 +35,7 @@
void lte_adjust_synch(LTE_DL_FRAME_PARMS *frame_parms,
PHY_VARS_UE *ue,
unsigned char eNB_id,
module_id_t eNB_id,
uint8_t subframe,
unsigned char clear,
short coef)
@@ -28,7 +28,7 @@
//#define DEBUG_BF_CH
int lte_dl_bf_channel_estimation(PHY_VARS_UE *phy_vars_ue,
uint8_t eNB_id,
module_id_t eNB_id,
uint8_t eNB_offset,
unsigned char Ns,
unsigned char p,
@@ -29,7 +29,7 @@
#include "SCHED_UE/sched_UE.h"
int lte_dl_channel_estimation(PHY_VARS_UE *ue,
uint8_t eNB_id,
module_id_t eNB_id,
uint8_t eNB_offset,
unsigned char Ns,
unsigned char p,
@@ -26,7 +26,7 @@
//#define DEBUG_CH
int lte_dl_mbsfn_channel_estimation(PHY_VARS_UE *ue,
uint8_t eNB_id,
module_id_t eNB_id,
uint8_t eNB_offset,
int subframe,
unsigned char l)
@@ -34,7 +34,7 @@ int32_t rx_power_avg_eNB[3];
void lte_eNB_I0_measurements(PHY_VARS_eNB *eNB,
int subframe,
unsigned char eNB_id,
module_id_t eNB_id,
unsigned char clear)
{
@@ -115,8 +115,8 @@ void lte_eNB_I0_measurements(PHY_VARS_eNB *eNB,
}
void lte_eNB_srs_measurements(PHY_VARS_eNB *eNB,
unsigned char eNB_id,
unsigned char UE_id,
module_id_t eNB_id,
module_id_t UE_id,
unsigned char init_averaging)
{
LTE_DL_FRAME_PARMS *frame_parms = &eNB->frame_parms;
@@ -55,7 +55,7 @@ void print_ints(char *s,int *x)
}
int16_t get_PL(uint8_t Mod_id,uint8_t CC_id,uint8_t eNB_index)
int16_t get_PL(module_id_t Mod_id,uint8_t CC_id,uint8_t eNB_index)
{
PHY_VARS_UE *ue = PHY_vars_UE_g[Mod_id][CC_id];
@@ -81,7 +81,7 @@ int16_t get_PL(uint8_t Mod_id,uint8_t CC_id,uint8_t eNB_index)
}
uint8_t get_n_adj_cells (uint8_t Mod_id,uint8_t CC_id)
uint8_t get_n_adj_cells (module_id_t Mod_id,uint8_t CC_id)
{
PHY_VARS_UE *ue = PHY_vars_UE_g[Mod_id][CC_id];
@@ -92,7 +92,7 @@ uint8_t get_n_adj_cells (uint8_t Mod_id,uint8_t CC_id)
return 0;
}
uint32_t get_rx_total_gain_dB (uint8_t Mod_id,uint8_t CC_id)
uint32_t get_rx_total_gain_dB (module_id_t Mod_id,uint8_t CC_id)
{
PHY_VARS_UE *ue = PHY_vars_UE_g[Mod_id][CC_id];
@@ -102,7 +102,7 @@ uint32_t get_rx_total_gain_dB (uint8_t Mod_id,uint8_t CC_id)
return 0xFFFFFFFF;
}
uint32_t get_RSSI (uint8_t Mod_id,uint8_t CC_id)
uint32_t get_RSSI (module_id_t Mod_id,uint8_t CC_id)
{
PHY_VARS_UE *ue = PHY_vars_UE_g[Mod_id][CC_id];
@@ -112,7 +112,7 @@ uint32_t get_RSSI (uint8_t Mod_id,uint8_t CC_id)
return 0xFFFFFFFF;
}
double get_RSRP(uint8_t Mod_id,uint8_t CC_id,uint8_t eNB_index)
double get_RSRP(module_id_t Mod_id,uint8_t CC_id,uint8_t eNB_index)
{
AssertFatal(PHY_vars_UE_g!=NULL,"PHY_vars_UE_g is null\n");
@@ -128,7 +128,7 @@ double get_RSRP(uint8_t Mod_id,uint8_t CC_id,uint8_t eNB_index)
return -140.0;
}
uint32_t get_RSRQ(uint8_t Mod_id,uint8_t CC_id,uint8_t eNB_index)
uint32_t get_RSRQ(module_id_t Mod_id,uint8_t CC_id,uint8_t eNB_index)
{
PHY_VARS_UE *ue = PHY_vars_UE_g[Mod_id][CC_id];
@@ -139,7 +139,7 @@ uint32_t get_RSRQ(uint8_t Mod_id,uint8_t CC_id,uint8_t eNB_index)
return 0xFFFFFFFF;
}
int8_t set_RSRP_filtered(uint8_t Mod_id,uint8_t CC_id,uint8_t eNB_index,float rsrp)
int8_t set_RSRP_filtered(module_id_t Mod_id,uint8_t CC_id,uint8_t eNB_index,float rsrp)
{
PHY_VARS_UE *ue = PHY_vars_UE_g[Mod_id][CC_id];
@@ -153,7 +153,7 @@ int8_t set_RSRP_filtered(uint8_t Mod_id,uint8_t CC_id,uint8_t eNB_index,float rs
return -1;
}
int8_t set_RSRQ_filtered(uint8_t Mod_id,uint8_t CC_id,uint8_t eNB_index,float rsrq)
int8_t set_RSRQ_filtered(module_id_t Mod_id,uint8_t CC_id,uint8_t eNB_index,float rsrq)
{
PHY_VARS_UE *ue = PHY_vars_UE_g[Mod_id][CC_id];
@@ -37,7 +37,7 @@ static int16_t ru_90c[2*128] = {32767, 0,32766, -402,32758, -804,32746, -1206,32
int32_t lte_ul_channel_estimation(PHY_VARS_eNB *eNB,
eNB_rxtx_proc_t *proc,
uint8_t UE_id,
module_id_t UE_id,
unsigned char l,
unsigned char Ns) {
+2 -38
View File
@@ -44,7 +44,6 @@ N_{ID}^{cell = 0..503
void lte_gold(LTE_DL_FRAME_PARMS *frame_parms,uint32_t lte_gold_table[20][2][14],uint16_t Nid_cell)
{
unsigned char ns,l,Ncp=1-frame_parms->Ncp;
unsigned int n,x1,x2;//,x1tmp,x2tmp;
@@ -54,7 +53,7 @@ void lte_gold(LTE_DL_FRAME_PARMS *frame_parms,uint32_t lte_gold_table[20][2][14]
x2 = Ncp +
(Nid_cell<<1) +
(((1+(Nid_cell<<1))*(1 + (((frame_parms->Ncp==0)?4:3)*l) + (7*(1+ns))))<<10); //cinit
(((1+(Nid_cell<<1))*(1 + (((frame_parms->Ncp==0)?4:3)*l) + (7*(1+ns))))<<10); //cinit
//x2 = frame_parms->Ncp + (Nid_cell<<1) + (1+(Nid_cell<<1))*(1 + (3*l) + (7*(1+ns))); //cinit
//n = 0
x1 = 1+ (1<<31);
@@ -81,7 +80,7 @@ void lte_gold(LTE_DL_FRAME_PARMS *frame_parms,uint32_t lte_gold_table[20][2][14]
}
}
void lte_gold_ue_spec(LTE_DL_FRAME_PARMS *frame_parms,uint32_t lte_gold_uespec_table[2][20][2][21],uint16_t Nid_cell, uint16_t *n_idDMRS)
void lte_gold_ue_spec(uint32_t lte_gold_uespec_table[2][20][2][21],uint16_t Nid_cell, uint16_t *n_idDMRS)
{
unsigned char ns,l;
@@ -169,41 +168,6 @@ void lte_gold_ue_spec_port5(uint32_t lte_gold_uespec_port5_table[20][38],uint16_
}
}
/*! \brief gold sequenquence generator
\param x1
\param x2 this should be set to c_init if reset=1
\param reset resets the generator
\return 32 bits of the gold sequence
*/
unsigned int lte_gold_generic(unsigned int *x1, unsigned int *x2, unsigned char reset)
{
int n;
if (reset) {
*x1 = 1+ (1<<31);
*x2=*x2 ^ ((*x2 ^ (*x2>>1) ^ (*x2>>2) ^ (*x2>>3))<<31);
// skip first 50 double words (1600 bits)
// printf("n=0 : x1 %x, x2 %x\n",x1,x2);
for (n=1; n<50; n++) {
*x1 = (*x1>>1) ^ (*x1>>4);
*x1 = *x1 ^ (*x1<<31) ^ (*x1<<28);
*x2 = (*x2>>1) ^ (*x2>>2) ^ (*x2>>3) ^ (*x2>>4);
*x2 = *x2 ^ (*x2<<31) ^ (*x2<<30) ^ (*x2<<29) ^ (*x2<<28);
}
}
*x1 = (*x1>>1) ^ (*x1>>4);
*x1 = *x1 ^ (*x1<<31) ^ (*x1<<28);
*x2 = (*x2>>1) ^ (*x2>>2) ^ (*x2>>3) ^ (*x2>>4);
*x2 = *x2 ^ (*x2<<31) ^ (*x2<<30) ^ (*x2<<29) ^ (*x2<<28);
return(*x1^*x2);
// printf("n=%d : c %x\n",n,x1^x2);
}
#ifdef LTE_GOLD_MAIN
main()
{
+2 -3
View File
@@ -36,7 +36,7 @@
\param reset resets the generator
\return 32 bits of the gold sequence
*/
unsigned int lte_gold_generic(unsigned int *x1, unsigned int *x2, unsigned char reset);
uint32_t lte_gold_generic(uint32_t *x1, uint32_t *x2, uint8_t reset);
/*!\brief This function generates the LTE Gold sequence (36-211, Sec 7.2), specifically for DL reference signals.
@@ -45,8 +45,7 @@ unsigned int lte_gold_generic(unsigned int *x1, unsigned int *x2, unsigned char
@param Nid_cell Cell Id (to compute sequences for local and adjacent cells) */
void lte_gold(LTE_DL_FRAME_PARMS *frame_parms,uint32_t lte_gold_table[20][2][14],uint16_t Nid_cell);
void lte_gold_ue_spec(LTE_DL_FRAME_PARMS *frame_parms,uint32_t lte_gold_uespec_table[2][20][2][21],uint16_t Nid_cell, uint16_t *n_idDMRS);
void lte_gold_ue_spec(uint32_t lte_gold_uespec_table[2][20][2][21],uint16_t Nid_cell, uint16_t *n_idDMRS);
void lte_gold_ue_spec_port5(uint32_t lte_gold_uespec_port5_table[20][38],uint16_t Nid_cell, uint16_t n_rnti);
+139 -28
View File
@@ -48,10 +48,10 @@
#include "dci_tools_common_extern.h"
#include "transport_proto.h"
int8_t find_dlsch(uint16_t rnti, PHY_VARS_eNB *eNB,find_type_t type)
int16_t find_dlsch(uint16_t rnti, PHY_VARS_eNB *eNB,find_type_t type)
{
uint8_t i;
int8_t first_free_index=-1;
uint16_t i;
int16_t first_free_index=-1;
AssertFatal(eNB!=NULL,"eNB is null\n");
for (i=0; i<NUMBER_OF_UE_MAX; i++) {
@@ -68,10 +68,10 @@ int8_t find_dlsch(uint16_t rnti, PHY_VARS_eNB *eNB,find_type_t type)
return first_free_index;
}
int8_t find_ulsch(uint16_t rnti, PHY_VARS_eNB *eNB,find_type_t type)
int16_t find_ulsch(uint16_t rnti, PHY_VARS_eNB *eNB,find_type_t type)
{
uint8_t i;
int8_t first_free_index=-1;
uint16_t i;
int16_t first_free_index=-1;
AssertFatal(eNB!=NULL,"eNB is null\n");
for (i=0; i<NUMBER_OF_UE_MAX; i++) {
@@ -265,8 +265,12 @@ void fill_dci_and_dlsch(PHY_VARS_eNB *eNB,int frame,int subframe,eNB_rxtx_proc_t
if ((rel8->rnti_type == 2 ) && (rel8->rnti != SI_RNTI) && (rel8->rnti != P_RNTI)) dci_alloc->ra_flag = 1;
UE_id = find_dlsch(rel8->rnti,eNB,SEARCH_EXIST_OR_FREE);
AssertFatal(UE_id!=-1,"no free or exiting dlsch_context\n");
AssertFatal(UE_id<NUMBER_OF_UE_MAX,"returned UE_id %d >= %d(NUMBER_OF_UE_MAX)\n",UE_id,NUMBER_OF_UE_MAX);
if( (UE_id<0) || (UE_id>=NUMBER_OF_UE_MAX) ){
LOG_E(PHY,"illegal UE_id found!!! rnti %04x UE_id %d\n",rel8->rnti,UE_id);
return;
}
//AssertFatal(UE_id!=-1,"no free or exiting dlsch_context\n");
//AssertFatal(UE_id<NUMBER_OF_UE_MAX,"returned UE_id %d >= %d(NUMBER_OF_UE_MAX)\n",UE_id,NUMBER_OF_UE_MAX);
dlsch0 = eNB->dlsch[UE_id][0];
dlsch1 = eNB->dlsch[UE_id][1];
@@ -298,7 +302,11 @@ void fill_dci_and_dlsch(PHY_VARS_eNB *eNB,int frame,int subframe,eNB_rxtx_proc_t
}
dlsch0_harq->ndi = rel8->new_data_indicator_1;
#ifdef PHY_TX_THREAD
dlsch0->active[subframe] = 1;
#else
dlsch0->active = 1;
#endif
if (rel8->rnti_type == 2)
dlsch0_harq->round = 0;
@@ -475,10 +483,14 @@ void fill_dci_and_dlsch(PHY_VARS_eNB *eNB,int frame,int subframe,eNB_rxtx_proc_t
dlsch0_harq->mcs = rel8->mcs_1;
dlsch0_harq->Qm = 2;
dlsch0_harq->TBS = TBStable[I_mcs][NPRB-1];
dlsch0->harq_ids[subframe] = rel8->harq_process;
dlsch0->harq_ids[frame%2][subframe] = rel8->harq_process;
#ifdef PHY_TX_THREAD
dlsch0->active[subframe] = 1;
#else
dlsch0->active = 1;
#endif
dlsch0->rnti = rel8->rnti;
dlsch0->harq_ids[subframe] = rel8->harq_process;
//dlsch0->harq_ids[subframe] = rel8->harq_process;
if (dlsch0_harq->round == 0)
dlsch0_harq->status = ACTIVE;
@@ -490,7 +502,11 @@ void fill_dci_and_dlsch(PHY_VARS_eNB *eNB,int frame,int subframe,eNB_rxtx_proc_t
case NFAPI_DL_DCI_FORMAT_1:
dci_alloc->format = format1;
#ifdef PHY_TX_THREAD
dlsch0->active[subframe] = 1;
#else
dlsch0->active = 1;
#endif
LOG_D(PHY,"SFN/SF:%04d%d proc:TX:SFN/SF:%04d%d: Programming DLSCH for Format 1 DCI, harq_pid %d\n",frame,subframe,proc->frame_tx,subframe,rel8->harq_process);
@@ -635,7 +651,11 @@ void fill_dci_and_dlsch(PHY_VARS_eNB *eNB,int frame,int subframe,eNB_rxtx_proc_t
dlsch0_harq->dl_power_off = 1;
#ifdef PHY_TX_THREAD
dlsch0->active[subframe] = 1;
#else
dlsch0->active = 1;
#endif
@@ -651,7 +671,7 @@ void fill_dci_and_dlsch(PHY_VARS_eNB *eNB,int frame,int subframe,eNB_rxtx_proc_t
}
LOG_D(PHY,"DCI: Set harq_ids[%d] to %d (%p)\n",subframe,rel8->harq_process,dlsch0);
dlsch0->harq_ids[subframe] = rel8->harq_process;
dlsch0->harq_ids[frame%2][subframe] = rel8->harq_process;
dlsch0->harq_mask |= (1<<rel8->harq_process);
@@ -818,8 +838,8 @@ void fill_dci_and_dlsch(PHY_VARS_eNB *eNB,int frame,int subframe,eNB_rxtx_proc_t
dlsch0->subframe_tx[subframe] = 1;
dlsch0->harq_ids[subframe] = rel8->harq_process;
dlsch1->harq_ids[subframe] = rel8->harq_process;
dlsch0->harq_ids[frame%2][subframe] = rel8->harq_process;
dlsch1->harq_ids[frame%2][subframe] = rel8->harq_process;
// printf("Setting DLSCH harq id %d to subframe %d\n",harq_pid,subframe);
@@ -846,19 +866,32 @@ void fill_dci_and_dlsch(PHY_VARS_eNB *eNB,int frame,int subframe,eNB_rxtx_proc_t
// assume both TBs are active
dlsch0_harq->Nl = 1;
dlsch1_harq->Nl = 1;
#ifdef PHY_TX_THREAD
dlsch0->active[subframe] = 1;
dlsch1->active[subframe] = 1;
#else
dlsch0->active = 1;
dlsch1->active = 1;
#endif
dlsch0->harq_mask |= (1<<rel8->harq_process);
dlsch1->harq_mask |= (1<<rel8->harq_process);
// check if either TB is disabled (see 36-213 V11.3 Section )
if ((dlsch0_harq->rvidx == 1) && (dlsch0_harq->mcs == 0)) {
#ifdef PHY_TX_THREAD
dlsch0->active[subframe] = 0;
#else
dlsch0->active = 0;
#endif
dlsch0->harq_mask &= ~(1<<rel8->harq_process);
}
if ((dlsch1_harq->rvidx == 1) && (dlsch1_harq->mcs == 0)) {
#ifdef PHY_TX_THREAD
dlsch1->active[subframe]= 0;
#else
dlsch1->active = 0;
#endif
dlsch1->harq_mask &= ~(1<<rel8->harq_process);
}
@@ -870,8 +903,11 @@ void fill_dci_and_dlsch(PHY_VARS_eNB *eNB,int frame,int subframe,eNB_rxtx_proc_t
dlsch0_harq->TBS = TBStable[get_I_TBS(dlsch0_harq->mcs)][dlsch0_harq->nb_rb-1];
dlsch1_harq->TBS = TBStable[get_I_TBS(dlsch1_harq->mcs)][dlsch0_harq->nb_rb-1];
#ifdef PHY_TX_THREAD
if ((dlsch0->active[subframe]==1) && (dlsch1->active[subframe]==1)) {
#else
if ((dlsch0->active==1) && (dlsch1->active==1)) {
#endif
dlsch0_harq->mimo_mode = LARGE_CDD;
dlsch1_harq->mimo_mode = LARGE_CDD;
dlsch0_harq->dl_power_off = 1;
@@ -881,7 +917,11 @@ void fill_dci_and_dlsch(PHY_VARS_eNB *eNB,int frame,int subframe,eNB_rxtx_proc_t
dlsch1_harq->mimo_mode = ALAMOUTI;
}
} else if (fp->nb_antenna_ports_eNB == 4) { // 4 antenna case
#ifdef PHY_TX_THREAD
if ((dlsch0->active[subframe]==1) && (dlsch1->active[subframe]==1)) {
#else
if ((dlsch0->active==1) && (dlsch1->active==1)) {
#endif
switch (rel8->precoding_information) {
case 0: // one layer per transport block
dlsch0_harq->mimo_mode = LARGE_CDD;
@@ -921,7 +961,11 @@ void fill_dci_and_dlsch(PHY_VARS_eNB *eNB,int frame,int subframe,eNB_rxtx_proc_t
LOG_E(PHY,"Illegal value (3) for TPMI in Format 2A DCI\n");
break;
}
#ifdef PHY_TX_THREAD
} else if (dlsch0->active[subframe] == 1) {
#else
} else if (dlsch0->active == 1) {
#endif
switch (rel8->precoding_information) {
case 0: // one layer per transport block
dlsch0_harq->mimo_mode = ALAMOUTI;
@@ -941,7 +985,11 @@ void fill_dci_and_dlsch(PHY_VARS_eNB *eNB,int frame,int subframe,eNB_rxtx_proc_t
LOG_E(PHY,"Illegal value %d for TPMI in Format 2A DCI with one transport block enabled\n",rel8->precoding_information);
break;
}
#ifdef PHY_TX_THREAD
} else if (dlsch1->active[subframe] == 1) {
#else
} else if (dlsch1->active == 1) {
#endif
switch (rel8->precoding_information) {
case 0: // one layer per transport block
dlsch0_harq->mimo_mode = ALAMOUTI;
@@ -967,10 +1015,18 @@ void fill_dci_and_dlsch(PHY_VARS_eNB *eNB,int frame,int subframe,eNB_rxtx_proc_t
}
// reset HARQ process if this is the first transmission
#ifdef PHY_TX_THREAD
if ((dlsch0->active[subframe]==1) && (dlsch0_harq->round == 0))
#else
if ((dlsch0->active==1) && (dlsch0_harq->round == 0))
#endif
dlsch0_harq->status = ACTIVE;
#ifdef PHY_TX_THREAD
if ((dlsch1->active[subframe]==1) && (dlsch1_harq->round == 0))
#else
if ((dlsch1->active==1) && (dlsch1_harq->round == 0))
#endif
dlsch1_harq->status = ACTIVE;
dlsch0->rnti = rel8->rnti;
@@ -1144,8 +1200,13 @@ void fill_dci_and_dlsch(PHY_VARS_eNB *eNB,int frame,int subframe,eNB_rxtx_proc_t
printf("RV0 = %d, RV1 = %d. MCS0 = %d, MCS1=%d\n", rel8->redundancy_version_1, rel8->redundancy_version_2, rel8->mcs_1, rel8->mcs_2);
#endif
if (TB0_active && TB1_active && rel8->transport_block_to_codeword_swap_flag==0) {
#ifdef PHY_TX_THREAD
dlsch0->active[subframe] = 1;
dlsch1->active[subframe] = 1;
#else
dlsch0->active = 1;
dlsch1->active = 1;
#endif
dlsch0->harq_mask |= (1<<rel8->harq_process);
dlsch1->harq_mask |= (1<<rel8->harq_process);
dlsch0_harq = dlsch0->harq_processes[rel8->harq_process];
@@ -1167,8 +1228,13 @@ void fill_dci_and_dlsch(PHY_VARS_eNB *eNB,int frame,int subframe,eNB_rxtx_proc_t
else if (TB0_active && TB1_active && rel8->transport_block_to_codeword_swap_flag==1) {
dlsch0 = eNB->dlsch[UE_id][1];
dlsch1 = eNB->dlsch[UE_id][0];
#ifdef PHY_TX_THREAD
dlsch0->active[subframe] = 1;
dlsch1->active[subframe] = 1;
#else
dlsch0->active = 1;
dlsch1->active = 1;
#endif
dlsch0->harq_mask |= (1<<rel8->harq_process);
dlsch1->harq_mask |= (1<<rel8->harq_process);
@@ -1186,7 +1252,11 @@ void fill_dci_and_dlsch(PHY_VARS_eNB *eNB,int frame,int subframe,eNB_rxtx_proc_t
dlsch1_harq->codeword=0;
}
else if (TB0_active && (TB1_active==0)) {
#ifdef PHY_TX_THREAD
dlsch0->active[subframe] = 1;
#else
dlsch0->active = 1;
#endif
dlsch0->harq_mask |= (1<<rel8->harq_process);
dlsch0_harq = dlsch0->harq_processes[rel8->harq_process];
dlsch0_harq->mcs = rel8->mcs_1;
@@ -1201,7 +1271,11 @@ void fill_dci_and_dlsch(PHY_VARS_eNB *eNB,int frame,int subframe,eNB_rxtx_proc_t
#endif
}
else if ((TB0_active==0) && TB1_active) {
#ifdef PHY_TX_THREAD
dlsch1->active[subframe] = 1;
#else
dlsch1->active = 1;
#endif
dlsch1->harq_mask |= (1<<rel8->harq_process);
dlsch1_harq = dlsch1->harq_processes[rel8->harq_process];
dlsch1_harq->mcs = rel8->mcs_2;
@@ -1219,11 +1293,11 @@ void fill_dci_and_dlsch(PHY_VARS_eNB *eNB,int frame,int subframe,eNB_rxtx_proc_t
if (dlsch0 != NULL){
dlsch0->subframe_tx[subframe] = 1;
dlsch0->harq_ids[subframe] = rel8->harq_process;
dlsch0->harq_ids[frame%2][subframe] = rel8->harq_process;
}
if (dlsch1_harq != NULL){
dlsch1->harq_ids[subframe] = rel8->harq_process;
dlsch1->harq_ids[frame%2][subframe] = rel8->harq_process;
}
@@ -1434,6 +1508,7 @@ void fill_mdci_and_dlsch(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,mDCI_ALLOC_t *d
LTE_DL_eNB_HARQ_t *dlsch0_harq=NULL;
int UE_id;
int subframe = proc->subframe_tx;
int frame = proc->frame_tx;
dci_alloc->firstCCE = rel13->ecce_index;
dci_alloc->L = rel13->aggregation_level;
@@ -1452,8 +1527,12 @@ void fill_mdci_and_dlsch(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,mDCI_ALLOC_t *d
if (rel13->rnti_type == 2 ) dci_alloc->ra_flag = 1;
UE_id = find_dlsch(rel13->rnti,eNB,SEARCH_EXIST_OR_FREE);
AssertFatal(UE_id!=-1,"no free or exiting dlsch_context\n");
AssertFatal(UE_id<NUMBER_OF_UE_MAX,"returned UE_id %d >= %d(NUMBER_OF_UE_MAX)\n",UE_id,NUMBER_OF_UE_MAX);
if( (UE_id<0) || (UE_id>=NUMBER_OF_UE_MAX) ){
LOG_E(PHY,"illegal UE_id found!!! rnti %04x UE_id %d\n",rel13->rnti,UE_id);
return;
}
//AssertFatal(UE_id!=-1,"no free or exiting dlsch_context\n");
//AssertFatal(UE_id<NUMBER_OF_UE_MAX,"returned UE_id %d >= %d(NUMBER_OF_UE_MAX)\n",UE_id,NUMBER_OF_UE_MAX);
dlsch0 = eNB->dlsch[UE_id][0];
dlsch0_harq = dlsch0->harq_processes[rel13->harq_process];
@@ -1465,7 +1544,11 @@ void fill_mdci_and_dlsch(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,mDCI_ALLOC_t *d
case 10: // Format 6-1A
dci_alloc->format = format6_1A;
#ifdef PHY_TX_THREAD
dlsch0->active[subframe] = 1;
#else
dlsch0->active = 1;
#endif
switch (fp->N_RB_DL) {
case 25:
@@ -1521,7 +1604,11 @@ void fill_mdci_and_dlsch(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,mDCI_ALLOC_t *d
break;
case 11: // Format 6-1B
dci_alloc->format = format6_1B;
#ifdef PHY_TX_THREAD
dlsch0->active[subframe] = 1;
#else
dlsch0->active = 1;
#endif
switch (fp->N_RB_DL) {
case 25:
@@ -1564,7 +1651,11 @@ void fill_mdci_and_dlsch(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,mDCI_ALLOC_t *d
}
case 12: // Format 6-2
dci_alloc->format = format6_2;
#ifdef PHY_TX_THREAD
dlsch0->active[subframe] = 1;
#else
dlsch0->active = 1;
#endif
switch (fp->N_RB_DL) {
case 25:
dci_alloc->dci_length = sizeof_DCI6_2_5MHz_t;
@@ -1647,8 +1738,12 @@ void fill_mdci_and_dlsch(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,mDCI_ALLOC_t *d
//LOG_E(PHY,"Invalid beamforming mode %dL\n", beamforming_mode);
dlsch0_harq->dl_power_off = 1;
#ifdef PHY_TX_THREAD
dlsch0->active[subframe] = 1;
#else
dlsch0->active = 1;
#endif
dlsch0->harq_mask |= (1<<rel13->harq_process);
@@ -1661,7 +1756,7 @@ void fill_mdci_and_dlsch(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,mDCI_ALLOC_t *d
}
dlsch0->harq_ids[subframe] = rel13->harq_process;
dlsch0->harq_ids[frame%2][subframe] = rel13->harq_process;
@@ -1692,6 +1787,8 @@ void fill_dci0(PHY_VARS_eNB *eNB,int frame,int subframe,eNB_rxtx_proc_t *proc,
uint32_t ndi = pdu->dci_pdu_rel8.new_data_indication_1;
uint16_t UE_id = -1;
#ifdef T_TRACER
T(T_ENB_PHY_ULSCH_UE_DCI, T_INT(eNB->Mod_id), T_INT(frame), T_INT(subframe),
T_INT(pdu->dci_pdu_rel8.rnti), T_INT(((frame*10+subframe+4) % 8) /* TODO: correct harq pid */),
@@ -1837,16 +1934,23 @@ void fill_dci0(PHY_VARS_eNB *eNB,int frame,int subframe,eNB_rxtx_proc_t *proc,
DevParam (frame_parms->N_RB_DL, 0, 0);
break;
}
if(frame_parms->frame_type == TDD){
UE_id = find_ulsch(pdu->dci_pdu_rel8.rnti, eNB,SEARCH_EXIST_OR_FREE);
if(UE_id != -1){
eNB->ulsch[UE_id]->harq_processes[pdu->dci_pdu_rel8.harq_pid]->V_UL_DAI = dai +1;
}
}
}
void fill_ulsch(PHY_VARS_eNB *eNB,nfapi_ul_config_ulsch_pdu *ulsch_pdu,int frame,int subframe)
void fill_ulsch(PHY_VARS_eNB *eNB,int UE_id,nfapi_ul_config_ulsch_pdu *ulsch_pdu,int frame,int subframe)
{
uint8_t harq_pid;
uint8_t UE_id;
//uint8_t UE_id;
boolean_t new_ulsch = (find_ulsch(ulsch_pdu->ulsch_pdu_rel8.rnti,eNB,SEARCH_EXIST)==-1) ? TRUE : FALSE;
AssertFatal((UE_id=find_ulsch(ulsch_pdu->ulsch_pdu_rel8.rnti,eNB,SEARCH_EXIST_OR_FREE))>=0,
"No existing/free UE ULSCH for rnti %x\n",ulsch_pdu->ulsch_pdu_rel8.rnti);
//AssertFatal((UE_id=find_ulsch(ulsch_pdu->ulsch_pdu_rel8.rnti,eNB,SEARCH_EXIST_OR_FREE))>=0,
// "No existing/free UE ULSCH for rnti %x\n",ulsch_pdu->ulsch_pdu_rel8.rnti);
LTE_eNB_ULSCH_t *ulsch=eNB->ulsch[UE_id];
LTE_DL_FRAME_PARMS *frame_parms = &eNB->frame_parms;
@@ -1864,7 +1968,10 @@ void fill_ulsch(PHY_VARS_eNB *eNB,nfapi_ul_config_ulsch_pdu *ulsch_pdu,int frame
ulsch->harq_processes[harq_pid]->first_rb = ulsch_pdu->ulsch_pdu_rel8.resource_block_start;
ulsch->harq_processes[harq_pid]->nb_rb = ulsch_pdu->ulsch_pdu_rel8.number_of_resource_blocks;
AssertFatal(ulsch->harq_processes[harq_pid]->nb_rb>0,"nb_rb = 0\n");
//AssertFatal(ulsch->harq_processes[harq_pid]->nb_rb>0,"nb_rb = 0\n");
if(ulsch->harq_processes[harq_pid]->nb_rb == 0){
LOG_E(PHY, "fill_ulsch UE_id %d nb_rb = 0\n", UE_id);
}
ulsch->harq_processes[harq_pid]->dci_alloc = 1;
ulsch->harq_processes[harq_pid]->rar_alloc = 0;
@@ -1899,6 +2006,7 @@ void fill_ulsch(PHY_VARS_eNB *eNB,nfapi_ul_config_ulsch_pdu *ulsch_pdu,int frame
ulsch_pdu->ulsch_pdu_rel8.redundancy_version);
ulsch->harq_processes[harq_pid]->rvidx = ulsch_pdu->ulsch_pdu_rel8.redundancy_version;
if(ulsch_pdu->ulsch_pdu_rel8.modulation_type!=0)
ulsch->harq_processes[harq_pid]->Qm = ulsch_pdu->ulsch_pdu_rel8.modulation_type;
// Set O_ACK to 0 by default, will be set of DLSCH is scheduled and needs to be
ulsch->harq_processes[harq_pid]->O_ACK = 0;
@@ -1919,9 +2027,12 @@ void fill_ulsch(PHY_VARS_eNB *eNB,nfapi_ul_config_ulsch_pdu *ulsch_pdu,int frame
// will be set if MAC has activated ULSCH_CQI_RI_PDU or ULSCH_CQI_HARQ_RI_PDU
ulsch->harq_processes[harq_pid]->Or1 = 0;
ulsch->harq_processes[harq_pid]->Or2 = 0;
}
else ulsch->harq_processes[harq_pid]->round++;
}
else {
ulsch->harq_processes[harq_pid]->round++;
ulsch->harq_processes[harq_pid]->TBS = ulsch_pdu->ulsch_pdu_rel8.size<<3;
ulsch->harq_processes[harq_pid]->Msc_initial = 12*ulsch_pdu->ulsch_pdu_rel8.number_of_resource_blocks;
}
ulsch->rnti = ulsch_pdu->ulsch_pdu_rel8.rnti;
LOG_D(PHY,"Filling ULSCH %x (UE_id %d) (new_ulsch %d) for Frame %d, Subframe %d : harq_pid %d, status %d, handled %d, first_rb %d, nb_rb %d, rvidx %d, Qm %d, TBS %d, round %d \n",
ulsch->rnti,
+35 -33
View File
@@ -979,28 +979,23 @@ uint8_t subframe2harq_pid(LTE_DL_FRAME_PARMS *frame_parms,uint32_t frame,uint8_t
} else {
switch (frame_parms->tdd_config) {
case 1:
if ((subframe==2) ||
(subframe==3) ||
(subframe==7) ||
(subframe==8))
switch (subframe) {
case 2:
case 3:
ret = (subframe-2);
break;
switch (subframe) {
case 2:
case 3:
ret = (subframe-2);
break;
case 7:
case 8:
ret = (subframe-5);
break;
case 7:
case 8:
ret = (subframe-5);
break;
default:
LOG_E(PHY,"subframe2_harq_pid, Illegal subframe %d for TDD mode %d\n",subframe,frame_parms->tdd_config);
ret = (255);
break;
}
default:
LOG_E(PHY,"subframe2_harq_pid, Illegal subframe %d for TDD mode %d\n",subframe,frame_parms->tdd_config);
ret = (255);
break;
}
break;
@@ -1052,10 +1047,13 @@ uint8_t pdcch_alloc2ul_subframe(LTE_DL_FRAME_PARMS *frame_parms,uint8_t n)
uint8_t ul_subframe = 255;
if ((frame_parms->frame_type == TDD) &&
(frame_parms->tdd_config == 1) &&
((n==1)||(n==6))) // tdd_config 0,1 SF 1,5
ul_subframe = ((n+6)%10);
else if ((frame_parms->frame_type == TDD) &&
(frame_parms->tdd_config == 1)) {
if ((n==1)||(n==6)) { // tdd_config 0,1 SF 1,5
ul_subframe = ((n+6)%10);
} else if ((n==4)||(n==9)) {
ul_subframe = ((n+4)%10);
}
} else if ((frame_parms->frame_type == TDD) &&
(frame_parms->tdd_config == 6) &&
((n==0)||(n==1)||(n==5)||(n==6)))
ul_subframe = ((n+7)%10);
@@ -1063,10 +1061,10 @@ uint8_t pdcch_alloc2ul_subframe(LTE_DL_FRAME_PARMS *frame_parms,uint8_t n)
(frame_parms->tdd_config == 6) &&
(n==9)) // tdd_config 6 SF 9
ul_subframe = ((n+5)%10);
else
else
ul_subframe = ((n+4)%10);
AssertFatal(frame_parms->frame_type == FDD || subframe_select(frame_parms,ul_subframe) == SF_UL,"illegal ul_subframe %d (n %d)\n",ul_subframe,n);
if ( (subframe_select(frame_parms,ul_subframe) != SF_UL) && (frame_parms->frame_type == TDD)) return(255);
LOG_D(PHY, "subframe %d: PUSCH subframe = %d\n", n, ul_subframe);
return ul_subframe;
@@ -1075,10 +1073,13 @@ uint8_t pdcch_alloc2ul_subframe(LTE_DL_FRAME_PARMS *frame_parms,uint8_t n)
uint8_t ul_subframe2pdcch_alloc_subframe(LTE_DL_FRAME_PARMS *frame_parms,uint8_t n)
{
if ((frame_parms->frame_type == TDD) &&
(frame_parms->tdd_config == 1) &&
((n==7)||(n==2))) // tdd_config 0,1 SF 1,5
return((n==7)? 1 : 6);
else if ((frame_parms->frame_type == TDD) &&
(frame_parms->tdd_config == 1)) {
if ((n==7)||(n==2)) { // tdd_config 0,1 SF 1,5
return((n==7)? 1 : 6);
} else if ((n==3)||(n==8)) {
return((n==3)? 9 : 4);
}
} else if ((frame_parms->frame_type == TDD) &&
(frame_parms->tdd_config == 6) &&
((n==7)||(n==8)||(n==2)||(n==3)))
return((n+3)%10);
@@ -1095,10 +1096,11 @@ uint32_t pdcch_alloc2ul_frame(LTE_DL_FRAME_PARMS *frame_parms,uint32_t frame, ui
uint32_t ul_frame;
if ((frame_parms->frame_type == TDD) &&
(frame_parms->tdd_config == 1) &&
((n==1)||(n==6))) // tdd_config 0,1 SF 1,5
ul_frame = (frame + (n==1 ? 0 : 1));
else if ((frame_parms->frame_type == TDD) &&
(frame_parms->tdd_config == 1)) {
if ((n==1)||(n==6)||(n==4)||(n==9)) { // tdd_config 0,1 SF 1,5
ul_frame = (frame + (n < 5 ? 0 : 1));
}
} else if ((frame_parms->frame_type == TDD) &&
(frame_parms->tdd_config == 6) &&
((n==0)||(n==1)||(n==5)||(n==6)))
ul_frame = (frame + (n>=5 ? 1 : 0));
+20 -7
View File
@@ -148,8 +148,8 @@ LTE_eNB_DLSCH_t *new_eNB_dlsch(unsigned char Kmimo,unsigned char Mdlharq,uint32_
}*/
for (i=0; i<10; i++)
dlsch->harq_ids[i] = Mdlharq;
for (i=0; i<20; i++)
dlsch->harq_ids[i/10][i%10] = Mdlharq;
for (i=0; i<Mdlharq; i++) {
dlsch->harq_processes[i] = (LTE_DL_eNB_HARQ_t *)malloc16(sizeof(LTE_DL_eNB_HARQ_t));
@@ -227,11 +227,16 @@ void clean_eNb_dlsch(LTE_eNB_DLSCH_t *dlsch)
if (dlsch) {
Mdlharq = dlsch->Mdlharq;
dlsch->rnti = 0;
#ifdef PHY_TX_THREAD
for (i=0; i<10; i++)
dlsch->active[i] = 0;
#else
dlsch->active = 0;
#endif
dlsch->harq_mask = 0;
for (i=0; i<10; i++)
dlsch->harq_ids[i] = Mdlharq;
for (i=0; i<20; i++)
dlsch->harq_ids[i/10][i%10] = Mdlharq;
for (i=0; i<Mdlharq; i++) {
if (dlsch->harq_processes[i]) {
@@ -413,7 +418,11 @@ int dlsch_encoding_2threads(PHY_VARS_eNB *eNB,
unsigned int crc=1;
unsigned short iind;
unsigned char harq_pid = dlsch->harq_ids[subframe];
unsigned char harq_pid = dlsch->harq_ids[frame%2][subframe];
if(harq_pid >= dlsch->Mdlharq) {
LOG_E(PHY,"dlsch_encoding_2threads illegal harq_pid %d\n", harq_pid);
return(-1);
}
unsigned short nb_rb = dlsch->harq_processes[harq_pid]->nb_rb;
unsigned int A;
unsigned char mod_order;
@@ -629,7 +638,7 @@ int dlsch_encoding_all(PHY_VARS_eNB *eNB,
{
int encoding_return = 0;
unsigned int L,C,B;
B = dlsch->harq_processes[dlsch->harq_ids[subframe]]->B;
B = dlsch->harq_processes[dlsch->harq_ids[frame%2][subframe]]->B;
if(B<=6144)
{
L=0;
@@ -732,7 +741,11 @@ int dlsch_encoding(PHY_VARS_eNB *eNB,
unsigned short iind;
LTE_DL_FRAME_PARMS *frame_parms = &eNB->frame_parms;
unsigned char harq_pid = dlsch->harq_ids[subframe];
unsigned char harq_pid = dlsch->harq_ids[frame%2][subframe];
if(harq_pid >= dlsch->Mdlharq) {
LOG_E(PHY,"dlsch_encoding illegal harq_pid %d\n", harq_pid);
return(-1);
}
unsigned short nb_rb = dlsch->harq_processes[harq_pid]->nb_rb;
unsigned int A;
unsigned char mod_order;
+16 -3
View File
@@ -2077,6 +2077,7 @@ inline int check_skip_dc(int rb,LTE_DL_FRAME_PARMS *frame_parms) {
int dlsch_modulation(PHY_VARS_eNB* phy_vars_eNB,
int32_t **txdataF,
int16_t amp,
int frame,
uint32_t subframe_offset,
uint8_t num_pdcch_symbols,
LTE_eNB_DLSCH_t *dlsch0,
@@ -2149,7 +2150,11 @@ int dlsch_modulation(PHY_VARS_eNB* phy_vars_eNB,
if ((dlsch0 != NULL) && (dlsch1 != NULL)){
harq_pid = dlsch0->harq_ids[subframe_offset];
harq_pid = dlsch0->harq_ids[frame%2][subframe_offset];
if(harq_pid >= dlsch0->Mdlharq) {
LOG_E(PHY,"illegal harq_pid %d\n", harq_pid);
return(-1);
}
dlsch0_harq = dlsch0->harq_processes[harq_pid];
mimo_mode = dlsch0_harq->mimo_mode;
mod_order0 = dlsch0_harq->Qm;
@@ -2166,7 +2171,11 @@ int dlsch_modulation(PHY_VARS_eNB* phy_vars_eNB,
}else if ((dlsch0 != NULL) && (dlsch1 == NULL)){
harq_pid = dlsch0->harq_ids[subframe_offset];
harq_pid = dlsch0->harq_ids[frame%2][subframe_offset];
if(harq_pid >= dlsch0->Mdlharq) {
LOG_E(PHY,"illegal harq_pid %d\n", harq_pid);
return(-1);
}
dlsch0_harq = dlsch0->harq_processes[harq_pid];
mimo_mode = dlsch0_harq->mimo_mode;
mod_order0 = dlsch0_harq->Qm;
@@ -2183,7 +2192,11 @@ int dlsch_modulation(PHY_VARS_eNB* phy_vars_eNB,
}else if ((dlsch0 == NULL) && (dlsch1 != NULL)){
harq_pid = dlsch1->harq_ids[subframe_offset];
harq_pid = dlsch1->harq_ids[frame%2][subframe_offset];
if(harq_pid >= dlsch1->Mdlharq) {
LOG_E(PHY,"illegal harq_pid %d\n", harq_pid);
return(-1);
}
dlsch1_harq = dlsch1->harq_processes[harq_pid];
mimo_mode = dlsch1_harq->mimo_mode;
mod_order0 = dlsch1_harq->Qm;
+25 -34
View File
@@ -34,47 +34,20 @@
#include "PHY/defs_eNB.h"
#include "PHY/defs_UE.h"
#include "PHY/LTE_REFSIG/lte_refsig.h"
#include "PHY/CODING/coding_extern.h"
#include "PHY/CODING/lte_interleaver_inline.h"
#include "transport_eNB.h"
#include "PHY/phy_extern.h"
#include "UTIL/LOG/vcd_signal_dumper.h"
static inline unsigned int lte_gold_scram(unsigned int *x1, unsigned int *x2, unsigned char reset) __attribute__((always_inline));
static inline unsigned int lte_gold_scram(unsigned int *x1, unsigned int *x2, unsigned char reset)
{
int n;
if (reset) {
*x1 = 1+ (1<<31);
*x2=*x2 ^ ((*x2 ^ (*x2>>1) ^ (*x2>>2) ^ (*x2>>3))<<31);
// skip first 50 double words (1600 bits)
// printf("n=0 : x1 %x, x2 %x\n",x1,x2);
for (n=1; n<50; n++) {
*x1 = (*x1>>1) ^ (*x1>>4);
*x1 = *x1 ^ (*x1<<31) ^ (*x1<<28);
*x2 = (*x2>>1) ^ (*x2>>2) ^ (*x2>>3) ^ (*x2>>4);
*x2 = *x2 ^ (*x2<<31) ^ (*x2<<30) ^ (*x2<<29) ^ (*x2<<28);
}
}
*x1 = (*x1>>1) ^ (*x1>>4);
*x1 = *x1 ^ (*x1<<31) ^ (*x1<<28);
*x2 = (*x2>>1) ^ (*x2>>2) ^ (*x2>>3) ^ (*x2>>4);
*x2 = *x2 ^ (*x2<<31) ^ (*x2<<30) ^ (*x2<<29) ^ (*x2<<28);
return(*x1^*x2);
// printf("n=%d : c %x\n",n,x1^x2);
}
void dlsch_scrambling(LTE_DL_FRAME_PARMS *frame_parms,
int mbsfn_flag,
LTE_eNB_DLSCH_t *dlsch,
int harq_pid,
int harq_pid,
int G,
uint8_t q,
uint16_t frame,
uint16_t frame,
uint8_t Ns)
{
@@ -92,13 +65,27 @@ void dlsch_scrambling(LTE_DL_FRAME_PARMS *frame_parms,
uint8_t Nacc=4;
uint16_t j0,j,idelta;
uint16_t i = (Ns>>1) + (10*frame);
#ifdef PHY_TX_THREAD
uint16_t i0 = dlsch->harq_processes[harq_pid]->i0;
#else
uint16_t i0 = dlsch->i0;
#endif
#ifdef PHY_TX_THREAD
if (dlsch->harq_processes[harq_pid]->sib1_br_flag==1) Nacc=1;
#else
if (dlsch->sib1_br_flag==1) Nacc=1;
#endif
else if (dlsch->rnti == 0xFFFF || dlsch->rnti == 0xFFFE) Nacc = (frame_parms->frame_type == TDD) ? 10 : 4;
#ifdef PHY_TX_THREAD
// Note: above SC-RNTI will also have to be added when/if implemented
else if (dlsch->harq_processes[harq_pid]->CEmode == CEmodeA) Nacc=1;
else if (dlsch->harq_processes[harq_pid]->CEmode == CEmodeB) Nacc = (frame_parms->frame_type == TDD) ? 10 : 4;
#else
// Note: above SC-RNTI will also have to be added when/if implemented
else if (dlsch->CEmode == CEmodeA) Nacc=1;
else if (dlsch->CEmode == CEmodeB) Nacc = (frame_parms->frame_type == TDD) ? 10 : 4;
#endif
if (frame_parms->frame_type == FDD || Nacc == 1) idelta = 0;
else idelta = Nacc-2;
@@ -111,7 +98,11 @@ void dlsch_scrambling(LTE_DL_FRAME_PARMS *frame_parms,
// x1 is set in lte_gold_generic
if (mbsfn_flag == 0) {
#if (RRC_VERSION >= MAKE_VERSION(14, 0, 0))
#ifdef PHY_TX_THREAD
if (dlsch->harq_processes[harq_pid]->i0 != 0xFFFF) {
#else
if (dlsch->i0 != 0xFFFF) {
#endif
// rule for BL/CE UEs from Section 6.3.1 in 36.211
x2= (dlsch->rnti<<14) + (q<<13) + ((((j0+j)*Nacc)%10)<<9) + frame_parms->Nid_cell;
if ((frame&1023) < 200) LOG_D(PHY,"Scrambling init for (i0 %d, i %d, j0 %d, j %d, Nacc %d) => x2 %d\n",i0,i,j0,j,Nacc,x2);
@@ -130,7 +121,7 @@ void dlsch_scrambling(LTE_DL_FRAME_PARMS *frame_parms,
printf("scrambling: rnti %x, q %d, Ns %d, Nid_cell %d, G %d x2 %x\n",dlsch->rnti,q,Ns,frame_parms->Nid_cell, G, x2);
#endif
#endif
s = lte_gold_scram(&x1, &x2, 1);
s = lte_gold_generic(&x1, &x2, 1);
for (n=0; n<(1+(G>>5)); n++) {
@@ -179,7 +170,7 @@ void dlsch_scrambling(LTE_DL_FRAME_PARMS *frame_parms,
s = lte_gold_scram(&x1, &x2, 0);
s = lte_gold_generic(&x1, &x2, 0);
e += 32;
}
@@ -225,7 +216,7 @@ void dlsch_unscrambling(LTE_DL_FRAME_PARMS *frame_parms,
#ifdef DEBUG_SCRAMBLING
printf("unscrambling: rnti %x, q %d, Ns %d, Nid_cell %d G %d, x2 %x\n",dlsch->rnti,q,Ns,frame_parms->Nid_cell,G,x2);
#endif
s = lte_gold_scram(&x1, &x2, 1);
s = lte_gold_generic(&x1, &x2, 1);
for (i=0; i<(1+(G>>5)); i++) {
for (j=0; j<32; j++,k++) {
@@ -238,7 +229,7 @@ void dlsch_unscrambling(LTE_DL_FRAME_PARMS *frame_parms,
#endif
}
s = lte_gold_scram(&x1, &x2, 0);
s = lte_gold_generic(&x1, &x2, 0);
}
}
@@ -0,0 +1,75 @@
/*
* Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership.
* The OpenAirInterface Software Alliance licenses this file to You under
* the OAI Public License, Version 1.1 (the "License"); you may not use this file
* except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.openairinterface.org/?page_id=698
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*-------------------------------------------------------------------------------
* For more information about the OpenAirInterface (OAI) Software Alliance:
* contact@openairinterface.org
*/
#include "PHY/types.h"
/**
\brief Gold Sequence Generation defined in 3x.211
\param x1 x1 shift register
\param x2 x2 shift register / cinit if reset is set
\param reset Reset flag / reinitialize the generator
\return c 32 bits of gold output
*/
extern inline uint32_t lte_gold_generic(uint32_t *x1, uint32_t *x2, uint8_t reset)
{
int32_t n;
// 3GPP 3x.211
// Nc = 1600
// c(n) = [x1(n+Nc) + x2(n+Nc)]mod2
// x1(n+31) = [x1(n+3) + x1(n)]mod2
// x2(n+31) = [x2(n+3) + x2(n+2) + x2(n+1) + x2(n)]mod2
if (reset)
{
// Init value for x1: x1(0) = 1, x1(n) = 0, n=1,2,...,30
// x1(31) = [x1(3) + x1(0)]mod2 = 1
*x1 = 1 + (1<<31);
// Init value for x2: cinit = sum_{i=0}^30 x2*2^i
// x2(31) = [x2(3) + x2(2) + x2(1) + x2(0)]mod2
// = (*x2>>3) ^ (*x2>>2) + (*x2>>1) + *x2
*x2 = *x2 ^ ((*x2 ^ (*x2>>1) ^ (*x2>>2) ^ (*x2>>3))<<31);
// x1 and x2 contain bits n = 0,1,...,31
// Nc = 1600 bits are skipped at the beginning
// i.e., 1600 / 32 = 50 32bit words
for (n = 1; n < 50; n++)
{
// Compute x1(0),...,x1(27)
*x1 = (*x1>>1) ^ (*x1>>4);
// Compute x1(28),..,x1(31) and xor
*x1 = *x1 ^ (*x1<<31) ^ (*x1<<28);
// Compute x2(0),...,x2(27)
*x2 = (*x2>>1) ^ (*x2>>2) ^ (*x2>>3) ^ (*x2>>4);
// Compute x2(28),..,x2(31) and xor
*x2 = *x2 ^ (*x2<<31) ^ (*x2<<30) ^ (*x2<<29) ^ (*x2<<28);
}
}
*x1 = (*x1>>1) ^ (*x1>>4);
*x1 = *x1 ^ (*x1<<31) ^ (*x1<<28);
*x2 = (*x2>>1) ^ (*x2>>2) ^ (*x2>>3) ^ (*x2>>4);
*x2 = *x2 ^ (*x2<<31) ^ (*x2<<30) ^ (*x2<<29) ^ (*x2<<28);
// c(n) = [x1(n+Nc) + x2(n+Nc)]mod2
return(*x1^*x2);
}
+1 -1
View File
@@ -570,7 +570,7 @@ int is_prach_subframe(LTE_DL_FRAME_PARMS *frame_parms,uint32_t frame, uint8_t su
uint8_t prach_ConfigIndex = frame_parms->prach_config_common.prach_ConfigInfo.prach_ConfigIndex;
int prach_mask = is_prach_subframe0(frame_parms,prach_ConfigIndex,frame,subframe);
#ifdef Rel14
#if (RRC_VERSION >= MAKE_VERSION(14, 0, 0))
int i;
for (i=0;i<4;i++) {
+3 -16
View File
@@ -795,25 +795,11 @@ uint32_t rx_pucch(PHY_VARS_eNB *eNB,
for (j=0;j<NUMBER_OF_UE_MAX;j++) {
eNB->pucch1_stats_cnt[j][i]=0;
eNB->pucch1ab_stats_cnt[j][i]=0;
}
}
#if defined(USRP_REC_PLAY)
// It's probably bad to do this statically only once.
// Looks like the above is incomplete.
// Such reset needs to be done once a UE PHY structure is being used/re-used
// Don't know if this is ever possible in current architecture
for (i=0;i<10240;i++) {
for (j=0;j<NUMBER_OF_UE_MAX;j++) {
eNB->pucch1_stats[j][i]=0;
#if defined(USRP_REC_PLAY) // not 100% sure
eNB->pucch1_stats_thres[j][i]=0;
#endif
}
}
for (i=0;i<20480;i++) {
for (j=0;j<NUMBER_OF_UE_MAX;j++) {
eNB->pucch1ab_stats[j][i]=0;
}
}
#endif
first_call=0;
}
@@ -1236,6 +1222,7 @@ uint32_t rx_pucch(PHY_VARS_eNB *eNB,
#if defined(USRP_REC_PLAY)
// It looks like the value is a bit messy when RF is replayed.
// For instance i assume to skip pucch1_thres from the test below.
// Not 100% sure
if (sigma2_dB<(dB_fixed(stat_max))) {//
#else
if (sigma2_dB<(dB_fixed(stat_max)-pucch1_thres)) {//
@@ -105,7 +105,7 @@ typedef enum {
#ifdef Rel14
#if (RRC_VERSION >= MAKE_VERSION(14, 0, 0))
typedef enum {
CEmodeA = 0,
CEmodeB = 1
@@ -138,7 +138,7 @@ typedef enum {
HARQ_SR_CQI
} UCI_type_t;
#ifdef Rel14
#if (RRC_VERSION >= MAKE_VERSION(14, 0, 0))
typedef enum {
NOCE,
CEMODEA,
@@ -183,7 +183,7 @@ typedef struct {
PRACH_TDD_PREAMBLE_MAP_elem map[6];
} PRACH_TDD_PREAMBLE_MAP;
#ifdef Rel14
#if (RRC_VERSION >= MAKE_VERSION(14, 0, 0))
typedef struct {
uint16_t slss_id;
+16 -1
View File
@@ -125,6 +125,15 @@ typedef struct {
uint8_t first_layer;
/// codeword this transport block is mapped to
uint8_t codeword;
#ifdef PHY_TX_THREAD
#ifdef Rel14
/// indicator that this DLSCH corresponds to SIB1-BR, needed for c_init for scrambling
uint8_t sib1_br_flag;
/// initial absolute subframe (see 36.211 Section 6.3.1), needed for c_init for scrambling
uint16_t i0;
CEmode_t CEmode;
#endif
#endif
} LTE_DL_eNB_HARQ_t;
@@ -138,7 +147,11 @@ typedef struct {
/// Allocated RNTI (0 means DLSCH_t is not currently used)
uint16_t rnti;
/// Active flag for baseband transmitter processing
#ifdef PHY_TX_THREAD
uint8_t active[10];
#else
uint8_t active;
#endif
/// HARQ process mask, indicates which processes are currently active
uint16_t harq_mask;
/// Indicator of TX activation per subframe. Used during PUCCH detection for ACK/NAK.
@@ -146,7 +159,7 @@ typedef struct {
/// First CCE of last PDSCH scheduling per subframe. Again used during PUCCH detection for ACK/NAK.
uint8_t nCCE[10];
/// Process ID's per subframe. Used to associate received ACKs on PUSCH/PUCCH to DLSCH harq process ids
uint8_t harq_ids[10];
uint8_t harq_ids[2][10];
/// Window size (in outgoing transport blocks) for fine-grain rate adaptation
uint8_t ra_window_size;
/// First-round error threshold for fine-grain rate adaptation
@@ -169,6 +182,7 @@ typedef struct {
int16_t sqrt_rho_a;
/// amplitude of PDSCH (compared to RS) in symbols containing pilots
int16_t sqrt_rho_b;
#ifndef PHY_TX_THREAD
#if (RRC_VERSION >= MAKE_VERSION(14, 0, 0))
/// indicator that this DLSCH corresponds to SIB1-BR, needed for c_init for scrambling
uint8_t sib1_br_flag;
@@ -176,6 +190,7 @@ typedef struct {
uint16_t i0;
CEmode_t CEmode;
#endif
#endif
} LTE_eNB_DLSCH_t;
+6 -5
View File
@@ -241,6 +241,7 @@ int32_t allocate_REs_in_RB(PHY_VARS_eNB* phy_vars_eNB,
int32_t dlsch_modulation(PHY_VARS_eNB* phy_vars_eNB,
int32_t **txdataF,
int16_t amp,
int frame,
uint32_t sub_frame_offset,
uint8_t num_pdcch_symbols,
LTE_eNB_DLSCH_t *dlsch0,
@@ -418,7 +419,7 @@ void fill_mdci_and_dlsch(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,mDCI_ALLOC_t *d
void fill_dci0(PHY_VARS_eNB *eNB,int frame,int subframe,eNB_rxtx_proc_t *proc,DCI_ALLOC_t *dci_alloc,
nfapi_hi_dci0_dci_pdu *pdu);
void fill_ulsch(PHY_VARS_eNB *eNB,nfapi_ul_config_ulsch_pdu *ulsch_pdu,int frame,int subframe);
void fill_ulsch(PHY_VARS_eNB *eNB,int UE_id,nfapi_ul_config_ulsch_pdu *ulsch_pdu,int frame,int subframe);
int generate_eNB_ulsch_params_from_rar(PHY_VARS_eNB *eNB,
unsigned char *rar_pdu,
@@ -577,7 +578,7 @@ void rx_prach(PHY_VARS_eNB *phy_vars_eNB,RU_t *ru,
uint16_t *max_preamble_energy,
uint16_t *max_preamble_delay,
uint16_t Nf, uint8_t tdd_mapindex
#ifdef Rel14
#if (RRC_VERSION >= MAKE_VERSION(14, 0, 0))
,
uint8_t br_flag
#endif
@@ -611,11 +612,11 @@ void conv_eMTC_rballoc(uint16_t resource_block_coding,
uint32_t N_RB_DL,
uint32_t *rb_alloc);
int8_t find_dlsch(uint16_t rnti, PHY_VARS_eNB *eNB,find_type_t type);
int16_t find_dlsch(uint16_t rnti, PHY_VARS_eNB *eNB,find_type_t type);
int8_t find_ulsch(uint16_t rnti, PHY_VARS_eNB *eNB,find_type_t type);
int16_t find_ulsch(uint16_t rnti, PHY_VARS_eNB *eNB,find_type_t type);
int8_t find_uci(uint16_t rnti, int frame, int subframe, PHY_VARS_eNB *eNB,find_type_t type);
int16_t find_uci(uint16_t rnti, int frame, int subframe, PHY_VARS_eNB *eNB,find_type_t type);
/**@}*/
#endif
+3 -4
View File
@@ -37,10 +37,9 @@
//#define DEBUG_UCI 1
int8_t find_uci(uint16_t rnti, int frame, int subframe, PHY_VARS_eNB *eNB,find_type_t type) {
uint8_t i;
int8_t first_free_index=-1;
int16_t find_uci(uint16_t rnti, int frame, int subframe, PHY_VARS_eNB *eNB,find_type_t type) {
uint16_t i;
int16_t first_free_index=-1;
AssertFatal(eNB!=NULL,"eNB is null\n");
for (i=0; i<NUMBER_OF_UE_MAX; i++) {
if ((eNB->uci_vars[i].active >0) &&
+2 -4
View File
@@ -915,8 +915,7 @@ unsigned int ulsch_decoding(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,
nb_rb);
//#endif
if (ulsch_harq->round == 0) {
//if (ulsch_harq->round == 0) { // delete for RB shortage pattern
// This is a new packet, so compute quantities regarding segmentation
ulsch_harq->B = A+24;
lte_segmentation(NULL,
@@ -929,8 +928,7 @@ unsigned int ulsch_decoding(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,
&ulsch_harq->Kminus,
&ulsch_harq->F);
// CLEAR LLR's HERE for first packet in process
}
//}
// printf("after segmentation c[%d] = %p\n",0,ulsch_harq->c[0]);
sumKr = 0;
+10 -25
View File
@@ -1024,20 +1024,6 @@ void ulsch_channel_compensation(int32_t **rxdataF_ext,
#endif
}
void ulsch_channel_level(int32_t **drs_ch_estimates_ext,
LTE_DL_FRAME_PARMS *frame_parms,
int32_t *avg,
@@ -1047,24 +1033,23 @@ void ulsch_channel_level(int32_t **drs_ch_estimates_ext,
int16_t rb;
uint8_t aarx;
#if defined(__x86_64__) || defined(__i386__)
__m128i avg128U;
__m128i *ul_ch128;
__m128 avg128U;
#elif defined(__arm__)
int16x4_t *ul_ch128;
int32x4_t avg128U;
int16x4_t *ul_ch128;
#endif
for (aarx=0; aarx<frame_parms->nb_antennas_rx; aarx++) {
//clear average level
#if defined(__x86_64__) || defined(__i386__)
avg128U = _mm_setzero_si128();
avg128U = _mm_setzero_ps();
ul_ch128=(__m128i *)drs_ch_estimates_ext[aarx];
for (rb=0; rb<nb_rb; rb++) {
avg128U = _mm_add_epi32(avg128U,_mm_madd_epi16(ul_ch128[0],ul_ch128[0]));
avg128U = _mm_add_epi32(avg128U,_mm_madd_epi16(ul_ch128[1],ul_ch128[1]));
avg128U = _mm_add_epi32(avg128U,_mm_madd_epi16(ul_ch128[2],ul_ch128[2]));
avg128U = _mm_add_ps(avg128U,_mm_cvtepi32_ps(_mm_madd_epi16(ul_ch128[0],ul_ch128[0])));
avg128U = _mm_add_ps(avg128U,_mm_cvtepi32_ps(_mm_madd_epi16(ul_ch128[1],ul_ch128[1])));
avg128U = _mm_add_ps(avg128U,_mm_cvtepi32_ps(_mm_madd_epi16(ul_ch128[2],ul_ch128[2])));
ul_ch128+=3;
@@ -1091,10 +1076,10 @@ void ulsch_channel_level(int32_t **drs_ch_estimates_ext,
#endif
DevAssert( nb_rb );
avg[aarx] = (((int*)&avg128U)[0] +
((int*)&avg128U)[1] +
((int*)&avg128U)[2] +
((int*)&avg128U)[3])/(nb_rb*12);
avg[aarx] = (int)((((float*)&avg128U)[0] +
((float*)&avg128U)[1] +
((float*)&avg128U)[2] +
((float*)&avg128U)[3])/(float)(nb_rb*12));
}
@@ -1185,7 +1185,7 @@ int rx_pdsch(PHY_VARS_UE *ue,
#if DISABLE_LOG_X
printf("[AbsSFN %d.%d] Slot%d Symbol %d: LLR Computation %5.2f \n",frame,subframe,slot,symbol,ue->generic_stat_bis[ue->current_thread_id[subframe]][slot].p_time/(cpuf*1000.0));
#else
LOG_I(PHY, "[AbsSFN %d.%d] Slot%d Symbol %d: LLR Computation %5.2f \n",frame,subframe,slot,symbol,ue->generic_stat_bis[ue->current_thread_id[subframe]][slot].p_time/(cpuf*1000.0));
LOG_D(PHY, "[AbsSFN %d.%d] Slot%d Symbol %d: LLR Computation %5.2f \n",frame,subframe,slot,symbol,ue->generic_stat_bis[ue->current_thread_id[subframe]][slot].p_time/(cpuf*1000.0));
#endif
#endif
// Please keep it: useful for debugging
@@ -1677,9 +1677,5 @@ uint8_t get_prach_prb_offset(LTE_DL_FRAME_PARMS *frame_parms,
uint8_t n_ra_prboffset,
uint8_t tdd_mapindex, uint16_t Nf);
/**@}*/
#endif
+5 -6
View File
@@ -72,13 +72,11 @@
#include <pthread.h>
#include "targets/ARCH/COMMON/common_lib.h"
#include "targets/COMMON/openairinterface5g_limits.h"
#include "types.h"
#include "nfapi_interface.h"
//#include "defs.h"
#include "openair2/COMMON/platform_types.h"
#define RX_NB_TH_MAX 2
#define RX_NB_TH 2
@@ -159,7 +157,7 @@ typedef struct {
PRACH_CONFIG_INFO prach_ConfigInfo;
} PRACH_CONFIG_COMMON;
#ifdef Rel14
#if (RRC_VERSION >= MAKE_VERSION(14, 0, 0))
/// PRACH-eMTC-Config from 36.331 RRC spec
typedef struct {
@@ -192,7 +190,7 @@ typedef struct {
/// prach_Config_enabled=1 means enabled. \vr{[0..1]}
uint8_t prach_Config_enabled;
/// PRACH Configuration Information
#ifdef Rel14
#if (RRC_VERSION >= MAKE_VERSION(14, 0, 0))
PRACH_eMTC_CONFIG_INFO prach_ConfigInfo;
#endif
} PRACH_eMTC_CONFIG_COMMON;
@@ -644,7 +642,7 @@ typedef struct {
uint8_t nb_antenna_ports_eNB;
/// PRACH_CONFIG
PRACH_CONFIG_COMMON prach_config_common;
#ifdef Rel14
#if (RRC_VERSION >= MAKE_VERSION(14, 0, 0))
/// PRACH_eMTC_CONFIG
PRACH_eMTC_CONFIG_COMMON prach_emtc_config_common;
#endif
@@ -678,7 +676,8 @@ typedef struct {
uint16_t phich_reg[MAX_NUM_PHICH_GROUPS][3];
struct MBSFN_SubframeConfig *mbsfn_SubframeConfig[MAX_MBSFN_AREA];
/// for fair RR scheduler
uint32_t ue_multiple_max;
} LTE_DL_FRAME_PARMS;
typedef enum {
+40 -12
View File
@@ -229,6 +229,34 @@ typedef struct RU_proc_t_s {
int num_slaves;
/// array of pointers to slaves
struct RU_proc_t_s **slave_proc;
#ifdef PHY_TX_THREAD
/// pthread structure for PRACH thread
pthread_t pthread_phy_tx;
pthread_mutex_t mutex_phy_tx;
pthread_cond_t cond_phy_tx;
/// \internal This variable is protected by \ref mutex_phy_tx.
int instance_cnt_phy_tx;
/// frame to act upon for transmission
int frame_phy_tx;
/// subframe to act upon for transmission
int subframe_phy_tx;
/// timestamp to send to "slave rru"
openair0_timestamp timestamp_phy_tx;
/// pthread structure for RF TX thread
pthread_t pthread_rf_tx;
pthread_mutex_t mutex_rf_tx;
pthread_cond_t cond_rf_tx;
/// \internal This variable is protected by \ref mutex_rf_tx.
int instance_cnt_rf_tx;
#endif
#if defined(PRE_SCD_THREAD)
pthread_t pthread_pre_scd;
/// condition variable for time processing thread
pthread_cond_t cond_pre_scd;
/// mutex for time thread
pthread_mutex_t mutex_pre_scd;
int instance_pre_scd;
#endif
/// pipeline ready state
int ru_rx_ready;
int ru_tx_ready;
@@ -331,7 +359,7 @@ typedef struct RU_t_s{
int (*wakeup_rxtx)(struct PHY_VARS_eNB_s *eNB, struct RU_t_s *ru);
/// function pointer to wakeup routine in lte-enb.
void (*wakeup_prach_eNB)(struct PHY_VARS_eNB_s *eNB,struct RU_t_s *ru,int frame,int subframe);
#ifdef Rel14
#if (RRC_VERSION >= MAKE_VERSION(14, 0, 0))
/// function pointer to wakeup routine in lte-enb.
void (*wakeup_prach_eNB_br)(struct PHY_VARS_eNB_s *eNB,struct RU_t_s *ru,int frame,int subframe);
#endif
@@ -456,7 +484,7 @@ typedef struct RRU_config_s {
int prach_FreqOffset[MAX_BANDS_PER_RRU];
/// prach_ConfigIndex for IF4p5
int prach_ConfigIndex[MAX_BANDS_PER_RRU];
#ifdef Rel14
#if (RRC_VERSION >= MAKE_VERSION(14, 0, 0))
int emtc_prach_CElevel_enable[MAX_BANDS_PER_RRU][4];
/// emtc_prach_FreqOffset for IF4p5 per CE Level
int emtc_prach_FreqOffset[MAX_BANDS_PER_RRU][4];
@@ -591,7 +619,7 @@ typedef struct {
int32_t **prach_ifft[4];
/// repetition number
#ifdef Rel14
#if (RRC_VERSION >= MAKE_VERSION(14, 0, 0))
/// indicator of first frame in a group of PRACH repetitions
int first_frame[4];
/// current repetition for each CE level
@@ -678,7 +706,7 @@ typedef struct eNB_proc_t_s {
int subframe_rx;
/// subframe to act upon for PRACH
int subframe_prach;
#ifdef Rel14
#if (RRC_VERSION >= MAKE_VERSION(14, 0, 0))
/// subframe to act upon for reception of prach BL/CE UEs
int subframe_prach_br;
#endif
@@ -688,7 +716,7 @@ typedef struct eNB_proc_t_s {
int frame_tx;
/// frame to act upon for PRACH
int frame_prach;
#ifdef Rel14
#if (RRC_VERSION >= MAKE_VERSION(14, 0, 0))
/// frame to act upon for PRACH BL/CE UEs
int frame_prach_br;
#endif
@@ -698,7 +726,7 @@ typedef struct eNB_proc_t_s {
int instance_cnt_te;
/// \internal This variable is protected by \ref mutex_prach.
int instance_cnt_prach;
#ifdef Rel14
#if (RRC_VERSION >= MAKE_VERSION(14, 0, 0))
/// \internal This variable is protected by \ref mutex_prach for BL/CE UEs.
int instance_cnt_prach_br;
#endif
@@ -720,7 +748,7 @@ typedef struct eNB_proc_t_s {
pthread_attr_t attr_single;
/// pthread attributes for prach processing thread
pthread_attr_t attr_prach;
#ifdef Rel14
#if (RRC_VERSION >= MAKE_VERSION(14, 0, 0))
/// pthread attributes for prach processing thread BL/CE UEs
pthread_attr_t attr_prach_br;
#endif
@@ -734,7 +762,7 @@ typedef struct eNB_proc_t_s {
struct sched_param sched_param_single;
/// scheduling parameters for prach thread
struct sched_param sched_param_prach;
#ifdef Rel14
#if (RRC_VERSION >= MAKE_VERSION(14, 0, 0))
/// scheduling parameters for prach thread
struct sched_param sched_param_prach_br;
#endif
@@ -746,7 +774,7 @@ typedef struct eNB_proc_t_s {
pthread_t pthread_te;
/// pthread structure for PRACH thread
pthread_t pthread_prach;
#ifdef Rel14
#if (RRC_VERSION >= MAKE_VERSION(14, 0, 0))
/// pthread structure for PRACH thread BL/CE UEs
pthread_t pthread_prach_br;
#endif
@@ -756,7 +784,7 @@ typedef struct eNB_proc_t_s {
pthread_cond_t cond_te;
/// condition variable for PRACH processing thread;
pthread_cond_t cond_prach;
#ifdef Rel14
#if (RRC_VERSION >= MAKE_VERSION(14, 0, 0))
/// condition variable for PRACH processing thread BL/CE UEs;
pthread_cond_t cond_prach_br;
#endif
@@ -768,7 +796,7 @@ typedef struct eNB_proc_t_s {
pthread_mutex_t mutex_te;
/// mutex for PRACH thread
pthread_mutex_t mutex_prach;
#ifdef Rel14
#if (RRC_VERSION >= MAKE_VERSION(14, 0, 0))
/// mutex for PRACH thread for BL/CE UEs
pthread_mutex_t mutex_prach_br;
#endif
@@ -784,7 +812,7 @@ typedef struct eNB_proc_t_s {
int RU_mask;
/// mask for RUs serving eNB (PRACH)
int RU_mask_prach;
#ifdef Rel14
#if (RRC_VERSION >= MAKE_VERSION(14, 0, 0))
/// mask for RUs serving eNB (PRACH)
int RU_mask_prach_br;
#endif
-10
View File
@@ -33,11 +33,6 @@
#ifndef __PHY_IMPLEMENTATION_DEFS_LTE_H__
#define __PHY_IMPLEMENTATION_DEFS_LTE_H__
typedef struct {
/// \brief Holds the transmit data in the frequency domain.
/// - first index: rx antenna [0..nb_antennas_rx[
@@ -73,9 +68,4 @@ typedef struct {
int32_t **tdd_calib_coeffs;
} RU_COMMON;
#endif
+80 -31
View File
@@ -157,31 +157,35 @@ void handle_nfapi_dlsch_pdu(PHY_VARS_eNB *eNB,int frame,int subframe,eNB_rxtx_pr
int harq_pid;
UE_id = find_dlsch(rel8->rnti,eNB,SEARCH_EXIST_OR_FREE);
AssertFatal(UE_id!=-1,"no free or exiting dlsch_context\n");
AssertFatal(UE_id<NUMBER_OF_UE_MAX,"returned UE_id %d >= %d(NUMBER_OF_UE_MAX)\n",UE_id,NUMBER_OF_UE_MAX);
if( (UE_id<0) || (UE_id>=NUMBER_OF_UE_MAX) ){
LOG_E(PHY,"illegal UE_id found!!! rnti %04x UE_id %d\n",rel8->rnti,UE_id);
return;
}
//AssertFatal(UE_id!=-1,"no free or exiting dlsch_context\n");
//AssertFatal(UE_id<NUMBER_OF_UE_MAX,"returned UE_id %d >= %d(NUMBER_OF_UE_MAX)\n",UE_id,NUMBER_OF_UE_MAX);
dlsch0 = eNB->dlsch[UE_id][0];
dlsch1 = eNB->dlsch[UE_id][1];
#if (RRC_VERSION >= MAKE_VERSION(13, 0, 0))
if ((rel13->pdsch_payload_type < 2) && (rel13->ue_type>0)) dlsch0->harq_ids[subframe] = 0;
if ((rel13->pdsch_payload_type < 2) && (rel13->ue_type>0)) dlsch0->harq_ids[frame%2][subframe] = 0;
#endif
harq_pid = dlsch0->harq_ids[subframe];
harq_pid = dlsch0->harq_ids[frame%2][subframe];
AssertFatal((harq_pid>=0) && (harq_pid<8),"harq_pid %d not in 0...7 frame:%d subframe:%d subframe(TX):%d rnti:%x UE_id:%d dlsch0[harq_ids:%d:%d:%d:%d:%d:%d:%d:%d:%d:%d]\n",
harq_pid,
frame,subframe,
proc->subframe_tx,rel8->rnti,UE_id,
dlsch0->harq_ids[0],
dlsch0->harq_ids[1],
dlsch0->harq_ids[2],
dlsch0->harq_ids[3],
dlsch0->harq_ids[4],
dlsch0->harq_ids[5],
dlsch0->harq_ids[6],
dlsch0->harq_ids[7],
dlsch0->harq_ids[8],
dlsch0->harq_ids[9]
dlsch0->harq_ids[frame%2][0],
dlsch0->harq_ids[frame%2][1],
dlsch0->harq_ids[frame%2][2],
dlsch0->harq_ids[frame%2][3],
dlsch0->harq_ids[frame%2][4],
dlsch0->harq_ids[frame%2][5],
dlsch0->harq_ids[frame%2][6],
dlsch0->harq_ids[frame%2][7],
dlsch0->harq_ids[frame%2][8],
dlsch0->harq_ids[frame%2][9]
);
dlsch0_harq = dlsch0->harq_processes[harq_pid];
dlsch1_harq = dlsch1->harq_processes[harq_pid];
@@ -190,11 +194,19 @@ void handle_nfapi_dlsch_pdu(PHY_VARS_eNB *eNB,int frame,int subframe,eNB_rxtx_pr
// compute DL power control parameters
eNB->pdsch_config_dedicated[UE_id].p_a = rel8->pa;
#ifdef PHY_TX_THREAD
if (dlsch0->active[proc->subframe_tx]){
# else
if (dlsch0->active){
#endif
computeRhoA_eNB(rel8->pa, dlsch0,dlsch0_harq->dl_power_off, eNB->frame_parms.nb_antenna_ports_eNB);
computeRhoB_eNB(rel8->pa,eNB->frame_parms.pdsch_config_common.p_b,eNB->frame_parms.nb_antenna_ports_eNB,dlsch0,dlsch0_harq->dl_power_off);
}
#ifdef PHY_TX_THREAD
if (dlsch1->active[proc->subframe_tx]){
#else
if (dlsch1->active){
#endif
computeRhoA_eNB(rel8->pa, dlsch1,dlsch1_harq->dl_power_off, eNB->frame_parms.nb_antenna_ports_eNB);
computeRhoB_eNB(rel8->pa,eNB->frame_parms.pdsch_config_common.p_b,eNB->frame_parms.nb_antenna_ports_eNB,dlsch1,dlsch1_harq->dl_power_off);
}
@@ -202,10 +214,17 @@ void handle_nfapi_dlsch_pdu(PHY_VARS_eNB *eNB,int frame,int subframe,eNB_rxtx_pr
dlsch0_harq->pdsch_start = eNB->pdcch_vars[subframe & 1].num_pdcch_symbols;
if (dlsch0_harq->round==0) { //get pointer to SDU if this a new SDU
AssertFatal(sdu!=NULL,"NFAPI: SFN/SF:%04d%d proc:TX:[frame %d subframe %d]: programming dlsch for round 0, rnti %x, UE_id %d, harq_pid %d : sdu is null for pdu_index %d dlsch0_harq[round:%d SFN/SF:%d%d pdu:%p mcs:%d ndi:%d pdschstart:%d]\n",
frame,subframe,
proc->frame_tx,proc->subframe_tx,rel8->rnti,UE_id,harq_pid,
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.pdu_index,dlsch0_harq->round,dlsch0_harq->frame,dlsch0_harq->subframe,dlsch0_harq->pdu,dlsch0_harq->mcs,dlsch0_harq->ndi,dlsch0_harq->pdsch_start);
if(sdu == NULL) {
LOG_E(PHY,"NFAPI: SFN/SF:%04d%d proc:TX:[frame %d subframe %d]: programming dlsch for round 0, rnti %x, UE_id %d, harq_pid %d : sdu is null for pdu_index %d dlsch0_harq[round:%d SFN/SF:%d%d pdu:%p mcs:%d ndi:%d pdschstart:%d]\n",
frame,subframe,
proc->frame_tx,proc->subframe_tx,rel8->rnti,UE_id,harq_pid,
dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.pdu_index,dlsch0_harq->round,dlsch0_harq->frame,dlsch0_harq->subframe,dlsch0_harq->pdu,dlsch0_harq->mcs,dlsch0_harq->ndi,dlsch0_harq->pdsch_start);
return;
}
//AssertFatal(sdu!=NULL,"NFAPI: SFN/SF:%04d%d proc:TX:[frame %d subframe %d]: programming dlsch for round 0, rnti %x, UE_id %d, harq_pid %d : sdu is null for pdu_index %d dlsch0_harq[round:%d SFN/SF:%d%d pdu:%p mcs:%d ndi:%d pdschstart:%d]\n",
// frame,subframe,
// proc->frame_tx,proc->subframe_tx,rel8->rnti,UE_id,harq_pid,
// dl_config_pdu->dlsch_pdu.dlsch_pdu_rel8.pdu_index,dlsch0_harq->round,dlsch0_harq->frame,dlsch0_harq->subframe,dlsch0_harq->pdu,dlsch0_harq->mcs,dlsch0_harq->ndi,dlsch0_harq->pdsch_start);
if (rel8->rnti != 0xFFFF) LOG_D(PHY,"NFAPI: SFN/SF:%04d%d proc:TX:[frame %d, subframe %d]: programming dlsch for round 0, rnti %x, UE_id %d, harq_pid %d\n",
frame,subframe,proc->frame_tx,proc->subframe_tx,rel8->rnti,UE_id,harq_pid);
if (codeword_index == 0) dlsch0_harq->pdu = sdu;
@@ -218,7 +237,11 @@ void handle_nfapi_dlsch_pdu(PHY_VARS_eNB *eNB,int frame,int subframe,eNB_rxtx_pr
}
#if (RRC_VERSION >= MAKE_VERSION(13, 0, 0))
#ifdef PHY_TX_THREAD
dlsch0_harq->sib1_br_flag=0;
#else
dlsch0->sib1_br_flag=0;
#endif
if ((rel13->pdsch_payload_type <2) && (rel13->ue_type>0)) { // this is a BR/CE UE and SIB1-BR/SI-BR
dlsch0->rnti = 0xFFFF;
@@ -226,7 +249,11 @@ void handle_nfapi_dlsch_pdu(PHY_VARS_eNB *eNB,int frame,int subframe,eNB_rxtx_pr
dlsch0->Mdlharq = 4;
dlsch0->Nsoft = 25344;
#ifdef PHY_TX_THREAD
if (rel13->pdsch_payload_type == 0) dlsch0_harq->sib1_br_flag=1;
#else
if (rel13->pdsch_payload_type == 0) dlsch0->sib1_br_flag=1;
#endif
// configure PDSCH
switch (eNB->frame_parms.N_RB_DL) {
@@ -253,7 +280,11 @@ void handle_nfapi_dlsch_pdu(PHY_VARS_eNB *eNB,int frame,int subframe,eNB_rxtx_pr
dlsch0_harq->rb_alloc[3] = localRIV2alloc_LUT100_3[rel8->resource_block_coding];
}
#ifdef PHY_TX_THREAD
dlsch0->active[proc->subframe_tx]= 1;
#else
dlsch0->active = 1;
#endif
dlsch0_harq->nb_rb = 6;
dlsch0_harq->vrb_type = LOCALIZED;
@@ -268,12 +299,21 @@ void handle_nfapi_dlsch_pdu(PHY_VARS_eNB *eNB,int frame,int subframe,eNB_rxtx_pr
dlsch0_harq->codeword = 0;
dlsch0_harq->pdsch_start = rel10->pdsch_start;
}
#ifdef PHY_TX_THREAD
dlsch0_harq->i0 = rel13->initial_transmission_sf_io;
#else
dlsch0->i0 = rel13->initial_transmission_sf_io;
#endif
#endif
#if (RRC_VERSION >= MAKE_VERSION(14, 0, 0))
LOG_D(PHY,"dlsch->i0:%04x dlsch0_harq[pdsch_start:%d nb_rb:%d vrb_type:%d rvidx:%d Nl:%d mimo_mode:%d dl_power_off:%d round:%d status:%d TBS:%d Qm:%d codeword:%d rb_alloc:%d] rel8[length:%d]\n",
#ifdef PHY_TX_THREAD
dlsch0_harq->i0,
#else
dlsch0->i0,
#endif
dlsch0_harq->pdsch_start, dlsch0_harq->nb_rb, dlsch0_harq->vrb_type, dlsch0_harq->rvidx, dlsch0_harq->Nl, dlsch0_harq->mimo_mode, dlsch0_harq->dl_power_off, dlsch0_harq->round, dlsch0_harq->status, dlsch0_harq->TBS, dlsch0_harq->Qm, dlsch0_harq->codeword, dlsch0_harq->rb_alloc[0],
rel8->length
);
@@ -306,6 +346,10 @@ void handle_ulsch_harq_pdu(
ulsch_harq->subframe = subframe;
ulsch_harq->O_ACK = harq_information->harq_information_rel10.harq_size;
ulsch->beta_offset_harqack_times8 = to_beta_offset_harqack[harq_information->harq_information_rel10.delta_offset_harq];
if (eNB->frame_parms.frame_type == TDD) {
if (harq_information->harq_information_rel10.ack_nack_mode==0) //bundling
ulsch->bundling = 1;
}
}
uint16_t to_beta_offset_ri[16]={9,13,16,20,25,32,40,50,64,80,101,127,160,0,0,0};
@@ -530,8 +574,7 @@ void handle_nfapi_ul_pdu(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,
uint16_t frame,uint8_t subframe,uint8_t srs_present)
{
nfapi_ul_config_ulsch_pdu_rel8_t *rel8 = &ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8;
int8_t UE_id;
int16_t UE_id;
// check if we have received a dci for this ue and ulsch descriptor is configured
@@ -540,14 +583,14 @@ void handle_nfapi_ul_pdu(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,
"No existing UE ULSCH for rnti %x\n",rel8->rnti);
LOG_D(PHY,"Applying UL config for UE %d, rnti %x for frame %d, subframe %d, modulation %d, rvidx %d\n", UE_id,rel8->rnti,frame,subframe,rel8->modulation_type,rel8->redundancy_version);
fill_ulsch(eNB,&ul_config_pdu->ulsch_pdu,frame,subframe);
fill_ulsch(eNB,UE_id,&ul_config_pdu->ulsch_pdu,frame,subframe);
}
else if (ul_config_pdu->pdu_type == NFAPI_UL_CONFIG_ULSCH_HARQ_PDU_TYPE) {
AssertFatal((UE_id = find_ulsch(ul_config_pdu->ulsch_harq_pdu.ulsch_pdu.ulsch_pdu_rel8.rnti,eNB,SEARCH_EXIST_OR_FREE))>=0,
"No available UE ULSCH for rnti %x\n",ul_config_pdu->ulsch_harq_pdu.ulsch_pdu.ulsch_pdu_rel8.rnti);
fill_ulsch(eNB,&ul_config_pdu->ulsch_harq_pdu.ulsch_pdu,frame,subframe);
fill_ulsch(eNB,UE_id,&ul_config_pdu->ulsch_harq_pdu.ulsch_pdu,frame,subframe);
handle_ulsch_harq_pdu(eNB, UE_id, ul_config_pdu,
&ul_config_pdu->ulsch_harq_pdu.harq_information, frame, subframe);
@@ -556,7 +599,7 @@ void handle_nfapi_ul_pdu(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,
AssertFatal((UE_id = find_ulsch(ul_config_pdu->ulsch_cqi_ri_pdu.ulsch_pdu.ulsch_pdu_rel8.rnti,
eNB,SEARCH_EXIST_OR_FREE))>=0,
"No available UE ULSCH for rnti %x\n",ul_config_pdu->ulsch_cqi_ri_pdu.ulsch_pdu.ulsch_pdu_rel8.rnti);
fill_ulsch(eNB,&ul_config_pdu->ulsch_cqi_ri_pdu.ulsch_pdu,frame,subframe);
fill_ulsch(eNB,UE_id,&ul_config_pdu->ulsch_cqi_ri_pdu.ulsch_pdu,frame,subframe);
handle_ulsch_cqi_ri_pdu(eNB,UE_id,ul_config_pdu,frame,subframe);
}
@@ -564,7 +607,7 @@ void handle_nfapi_ul_pdu(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,
AssertFatal((UE_id = find_ulsch(ul_config_pdu->ulsch_cqi_harq_ri_pdu.ulsch_pdu.ulsch_pdu_rel8.rnti,
eNB,SEARCH_EXIST_OR_FREE))>=0,
"No available UE ULSCH for rnti %x\n",ul_config_pdu->ulsch_cqi_harq_ri_pdu.ulsch_pdu.ulsch_pdu_rel8.rnti);
fill_ulsch(eNB,&ul_config_pdu->ulsch_cqi_harq_ri_pdu.ulsch_pdu,frame,subframe);
fill_ulsch(eNB,UE_id,&ul_config_pdu->ulsch_cqi_harq_ri_pdu.ulsch_pdu,frame,subframe);
handle_ulsch_cqi_harq_ri_pdu(eNB,UE_id,ul_config_pdu,frame,subframe);
handle_ulsch_harq_pdu(eNB, UE_id, ul_config_pdu,
&ul_config_pdu->ulsch_cqi_harq_ri_pdu.harq_information, frame, subframe);
@@ -656,13 +699,19 @@ void schedule_response(Sched_Rsp_t *Sched_INFO)
eNB->pdcch_vars[subframe&1].num_dci = 0;
eNB->phich_vars[subframe&1].num_hi = 0;
LOG_D(PHY,"NFAPI: Sched_INFO:SFN/SF:%04d%d DL_req:SFN/SF:%04d%d:dl_pdu:%d tx_req:SFN/SF:%04d%d:pdus:%d hi_dci0:SFN/SF:%04d%d:pdus:%d ul_cfg:SFN/SF:%04d%d:pdus:%d num_pdcch_symbols:%d\n",
frame,subframe,
NFAPI_SFNSF2SFN(DL_req->sfn_sf),NFAPI_SFNSF2SF(DL_req->sfn_sf),number_dl_pdu,
NFAPI_SFNSF2SFN(TX_req->sfn_sf),NFAPI_SFNSF2SF(TX_req->sfn_sf),TX_req->tx_request_body.number_of_pdus,
NFAPI_SFNSF2SFN(HI_DCI0_req->sfn_sf),NFAPI_SFNSF2SF(HI_DCI0_req->sfn_sf),number_hi_dci0_pdu,
NFAPI_SFNSF2SFN(UL_req->sfn_sf),NFAPI_SFNSF2SF(UL_req->sfn_sf),number_ul_pdu,
eNB->pdcch_vars[subframe&1].num_pdcch_symbols);
LOG_D(PHY,"NFAPI: Sched_INFO:SFN/SF:%04d%d DL_req:SFN/SF:%04d%d:dl_pdu:%d tx_req:SFN/SF:%04d%d:pdus:%d\n",
frame,subframe,
NFAPI_SFNSF2SFN(DL_req->sfn_sf),NFAPI_SFNSF2SF(DL_req->sfn_sf),number_dl_pdu,
NFAPI_SFNSF2SFN(TX_req->sfn_sf),NFAPI_SFNSF2SF(TX_req->sfn_sf),TX_req->tx_request_body.number_of_pdus
);
LOG_D(PHY,"NFAPI: hi_dci0:SFN/SF:%04d%d:pdus:%d\n",
NFAPI_SFNSF2SFN(HI_DCI0_req->sfn_sf),NFAPI_SFNSF2SF(HI_DCI0_req->sfn_sf),number_hi_dci0_pdu
);
if(UL_req!=NULL)
LOG_D(PHY,"NFAPI: ul_cfg:SFN/SF:%04d%d:pdus:%d num_pdcch_symbols:%d\n",
NFAPI_SFNSF2SFN(UL_req->sfn_sf),NFAPI_SFNSF2SF(UL_req->sfn_sf),number_ul_pdu,
eNB->pdcch_vars[subframe&1].num_pdcch_symbols);
int do_oai =0;
int dont_send =0;
+40 -17
View File
@@ -336,6 +336,29 @@ unsigned char ul_ACK_subframe2_dl_subframe(LTE_DL_FRAME_PARMS *frame_parms,unsig
return(0);
}
int ul_ACK_subframe2_dl_frame(LTE_DL_FRAME_PARMS *frame_parms,int frame, unsigned char subframe,unsigned char subframe_tx)
{
if (frame_parms->frame_type == FDD) {
return (((subframe_tx > subframe ) ? frame-1 : frame)+1024)%1024;
} else {
switch (frame_parms->tdd_config) {
case 1:
return(((subframe_tx > subframe ) ? frame-1 : frame)+1024)%1024;
break;
case 3:
//TODO
break;
case 4:
//TODO
break;
}
}
return(0);
}
unsigned char ul_ACK_subframe2_M(LTE_DL_FRAME_PARMS *frame_parms,unsigned char subframe)
{
@@ -343,6 +366,23 @@ unsigned char ul_ACK_subframe2_M(LTE_DL_FRAME_PARMS *frame_parms,unsigned char s
return(1);
} else {
switch (frame_parms->tdd_config) {
case 1:
return 1; // don't ACK special subframe for now
if (subframe == 2) { // ACK subframes 5 and 6
return(2);
} else if (subframe == 3) { // ACK subframe 9
return(1); // To be updated
} else if (subframe == 7) { // ACK subframes 0 and 1
return(2); // To be updated
} else if (subframe == 8) { // ACK subframe 4
return(1); // To be updated
} else {
LOG_E(PHY,"phy_procedures_lte_common.c/subframe2_dl_harq_pid: illegal subframe %d for tdd_config %d\n",
subframe,frame_parms->tdd_config);
return(0);
}
break;
case 3:
if (subframe == 2) { // ACK subframes 5 and 6
return(2); // should be 3
@@ -381,23 +421,6 @@ unsigned char ul_ACK_subframe2_M(LTE_DL_FRAME_PARMS *frame_parms,unsigned char s
}
break;
case 1:
if (subframe == 2) { // ACK subframes 5 and 6
return(2);
} else if (subframe == 3) { // ACK subframe 9
return(1); // To be updated
} else if (subframe == 7) { // ACK subframes 0 and 1
return(2); // To be updated
} else if (subframe == 8) { // ACK subframe 4
return(1); // To be updated
} else {
LOG_E(PHY,"phy_procedures_lte_common.c/subframe2_dl_harq_pid: illegal subframe %d for tdd_config %d\n",
subframe,frame_parms->tdd_config);
return(0);
}
break;
}
}
+132 -52
View File
@@ -55,7 +55,7 @@ extern uint8_t nfapi_mode;
int16_t get_hundred_times_delta_IF_eNB(PHY_VARS_eNB *eNB,uint8_t UE_id,uint8_t harq_pid, uint8_t bw_factor)
int16_t get_hundred_times_delta_IF_eNB(PHY_VARS_eNB *eNB,uint16_t UE_id,uint8_t harq_pid, uint8_t bw_factor)
{
uint32_t Nre,sumKr,MPR_x100,Kr,r;
@@ -195,10 +195,20 @@ void common_signal_procedures (PHY_VARS_eNB *eNB,int frame, int subframe) {
// generate Cell-Specific Reference Signals for both slots
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_ENB_RS_TX,1);
if(subframe_select(fp,subframe) == SF_S)
generate_pilots_slot(eNB,
txdataF,
AMP,
subframe<<1,1);
else
generate_pilots_slot(eNB,
txdataF,
AMP,
subframe<<1,0);
// check that 2nd slot is for DL
// check that 2nd slot is for DL
if (subframe_select(fp,subframe) == SF_DL)
generate_pilots_slot(eNB,
@@ -435,15 +445,19 @@ void pdsch_procedures(PHY_VARS_eNB *eNB,
dlsch_modulation(eNB,
eNB->common_vars.txdataF,
AMP,
frame,
subframe,
dlsch_harq->pdsch_start,
dlsch,
dlsch1);
stop_meas(&eNB->dlsch_modulation_stats);
stop_meas(&eNB->dlsch_modulation_stats);
}
#ifdef PHY_TX_THREAD
dlsch->active[subframe] = 0;
#else
dlsch->active = 0;
#endif
dlsch_harq->round++;
LOG_D(PHY,"Generating DLSCH/PDSCH dlsch_harq[round:%d]\n",dlsch_harq->round);
@@ -460,7 +474,7 @@ void phy_procedures_eNB_TX(PHY_VARS_eNB *eNB,
int subframe=proc->subframe_tx;
uint32_t i,aa;
uint8_t harq_pid;
int8_t UE_id=0;
int16_t UE_id=0;
uint8_t num_pdcch_symbols=0;
uint8_t num_dci=0;
uint8_t ul_subframe;
@@ -586,10 +600,14 @@ void phy_procedures_eNB_TX(PHY_VARS_eNB *eNB,
if ((dlsch0)&&
(dlsch0->rnti>0)&&
#ifdef PHY_TX_THREAD
(dlsch0->active[subframe] == 1)) {
#else
(dlsch0->active == 1)) {
#endif
// get harq_pid
harq_pid = dlsch0->harq_ids[subframe];
harq_pid = dlsch0->harq_ids[frame%2][subframe];
AssertFatal(harq_pid>=0,"harq_pid is negative\n");
if (harq_pid>=8)
@@ -614,8 +632,12 @@ void phy_procedures_eNB_TX(PHY_VARS_eNB *eNB,
else if ((dlsch0)&&
(dlsch0->rnti>0)&&
(dlsch0->active == 0)) {
(dlsch0->rnti>0)&&
#ifdef PHY_TX_THREAD
(dlsch0->active[subframe] == 0)) {
#else
(dlsch0->active == 0)) {
#endif
// clear subframe TX flag since UE is not scheduled for PDSCH in this subframe (so that we don't look for PUCCH later)
dlsch0->subframe_tx[subframe]=0;
@@ -686,7 +708,7 @@ void fill_sr_indication(PHY_VARS_eNB *eNB,uint16_t rnti,int frame,int subframe,u
pdu->rx_ue_information.tl.tag = NFAPI_RX_UE_INFORMATION_TAG;
pdu->rx_ue_information.rnti = rnti;
int SNRtimes10 = dB_fixed_times10(stat) - 200;//(10*eNB->measurements.n0_power_dB[0]);
int SNRtimes10 = dB_fixed_times10(stat) - 300;//(10*eNB->measurements.n0_power_dB[0]);
pdu->ul_cqi_information.tl.tag = NFAPI_UL_CQI_INFORMATION_TAG;
@@ -749,7 +771,7 @@ void uci_procedures(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc)
LOG_E(PHY,"Unknown number for N_RB_UL %d\n",fp->N_RB_UL);
break;
}
SR_payload = 0;
switch (uci->type) {
case SR:
case HARQ_SR:
@@ -764,20 +786,21 @@ void uci_procedures(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc)
frame,
subframe,
PUCCH1_THRES);
LOG_D(PHY,"[eNB %d][SR %x] Frame %d subframe %d Checking SR is %d (SR n1pucch is %d)\n",
LOG_D(PHY,"[eNB %d][SR %x] Frame %d subframe %d Checking SR is %d (uci.type %d SR n1pucch is %d)\n",
eNB->Mod_id,
uci->rnti,
frame,
subframe,
SR_payload,
uci->type,
uci->n_pucch_1_0_sr[0]);
if (uci->type == SR) {
if (SR_payload == 1) {
fill_sr_indication(eNB,uci->rnti,frame,subframe,metric_SR);
continue;
break;
}
else {
continue;
break;
}
}
case HARQ:
@@ -832,8 +855,34 @@ void uci_procedures(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc)
}
else { // frame_type == TDD
#if 1
metric[0] = rx_pucch(eNB,
uci->pucch_fmt,
i,
uci->n_pucch_1[0][0],
0, //n2_pucch
uci->srs_active, // shortened format
pucch_b0b1[0],
frame,
subframe,
PUCCH1a_THRES);
if (uci->type==HARQ_SR && metric[0] > metric_SR) SR_payload = 0;
else if (SR_payload == 1) fill_sr_indication(eNB,uci->rnti,frame,subframe,metric_SR);
if (uci->type==HARQ_SR && metric[0] <= metric_SR) {
SR_payload = 1;
metric[0] = rx_pucch(eNB,
pucch_format1b,
i,
uci->n_pucch_1_0_sr[0],
0, //n2_pucch
uci->srs_active, // shortened format
pucch_b0b1[0],
frame,
subframe,
PUCCH1a_THRES);
}
#else
// if SR was detected, use the n1_pucch from SR
if (SR_payload==1) {
#ifdef DEBUG_PHY_PROC
@@ -880,22 +929,25 @@ void uci_procedures(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc)
}
#ifdef DEBUG_PHY_PROC
LOG_D(PHY,"RNTI %x type %d SR_payload %d Frame %d Subframe %d pucch_b0b1[0][0] %d pucch_b0b1[0][1] %d pucch_b0b1[1][0] %d pucch_b0b1[1][1] %d \n",
uci->rnti,uci->type,SR_payload,frame,subframe,pucch_b0b1[0][0],pucch_b0b1[0][1],pucch_b0b1[1][0],pucch_b0b1[1][1]);
#endif
#endif
if (SR_payload == 1) { // this implements Table 7.3.1 from 36.213
if (pucch_b0b1[0][0] == 4) { // there isn't a likely transmission
harq_ack[0] = 4; // DTX
}
else if (pucch_b0b1[1][0] == 1 && pucch_b0b1[1][1] == 1) { // 1/4/7 ACKs
else if (pucch_b0b1[0][0] == 1 && pucch_b0b1[0][1] == 1) { // 1/4/7 ACKs
harq_ack[0] = 1;
}
else if (pucch_b0b1[1][0] == 1 && pucch_b0b1[1][1] != 1) { // 2/5/8 ACKs
else if (pucch_b0b1[0][0] == 1 && pucch_b0b1[0][1] != 1) { // 2/5/8 ACKs
harq_ack[0] = 2;
}
else if (pucch_b0b1[1][0] != 1 && pucch_b0b1[1][1] == 1) { // 3/6/9 ACKs
else if (pucch_b0b1[0][0] != 1 && pucch_b0b1[0][1] == 1) { // 3/6/9 ACKs
harq_ack[0] = 3;
}
else if (pucch_b0b1[1][0] != 1 && pucch_b0b1[1][1] != 1) { // 0 ACKs, or at least one DL assignment missed
else if (pucch_b0b1[0][0] != 1 && pucch_b0b1[0][1] != 1) { // 0 ACKs, or at least one DL assignment missed
harq_ack[0] = 0;
}
uci->stat = metric[0];
@@ -1211,8 +1263,7 @@ void pusch_procedures(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc)
const int subframe = proc->subframe_rx;
const int frame = proc->frame_rx;
if (fp->frame_type == FDD) harq_pid = ((10*frame) + subframe)&7;
else harq_pid = subframe%10;
harq_pid = subframe2harq_pid(&eNB->frame_parms,frame,subframe);
for (i=0; i<NUMBER_OF_UE_MAX; i++) {
ulsch = eNB->ulsch[i];
@@ -1283,8 +1334,8 @@ void pusch_procedures(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc)
ulsch->rnti,
dB_fixed(eNB->pusch_vars[i]->ulsch_power[0]),
dB_fixed(eNB->pusch_vars[i]->ulsch_power[1]),
20,//eNB->measurements.n0_power_dB[0],
20,//eNB->measurements.n0_power_dB[1],
30,//eNB->measurements.n0_power_dB[0],
30,//eNB->measurements.n0_power_dB[1],
ulsch_harq->o_ACK[0],
ulsch_harq->o_ACK[1],
ret,
@@ -1304,6 +1355,13 @@ void pusch_procedures(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc)
fill_ulsch_cqi_indication(eNB,frame,subframe,
ulsch_harq,
ulsch->rnti);
RC.mac[eNB->Mod_id]->UE_list.UE_sched_ctrl[i].cqi_req_flag &= (~(1 << subframe));
}else{
if(RC.mac[eNB->Mod_id]->UE_list.UE_sched_ctrl[i].cqi_req_flag & (1 << subframe) ){
RC.mac[eNB->Mod_id]->UE_list.UE_sched_ctrl[i].cqi_req_flag &= (~(1 << subframe));
RC.mac[eNB->Mod_id]->UE_list.UE_sched_ctrl[i].cqi_req_timer=30;
LOG_D(PHY,"Frame %d,Subframe %d, We're supposed to get a cqi here. Set cqi_req_timer to 30.\n",frame,subframe);
}
}
if (ret == (1+MAX_TURBO_ITERATIONS)) {
@@ -1516,7 +1574,7 @@ void fill_rx_indication(PHY_VARS_eNB *eNB,int UE_id,int frame,int subframe)
pdu->rx_indication_rel8.timing_advance = timing_advance_update;
// estimate UL_CQI for MAC (from antenna port 0 only)
int SNRtimes10 = dB_fixed_times10(eNB->pusch_vars[UE_id]->ulsch_power[0]) - 200;//(10*eNB->measurements.n0_power_dB[0]);
int SNRtimes10 = dB_fixed_times10(eNB->pusch_vars[UE_id]->ulsch_power[0]) - 300;//(10*eNB->measurements.n0_power_dB[0]);
if (SNRtimes10 < -640) pdu->rx_indication_rel8.ul_cqi=0;
else if (SNRtimes10 > 635) pdu->rx_indication_rel8.ul_cqi=255;
@@ -1538,7 +1596,7 @@ static void do_release_harq(PHY_VARS_eNB *eNB,int UE_id,int tb,uint16_t frame,ui
LTE_eNB_DLSCH_t *dlsch0=NULL,*dlsch1=NULL;
LTE_DL_eNB_HARQ_t *dlsch0_harq=NULL,*dlsch1_harq=NULL;
int harq_pid;
int subframe_tx;
int subframe_tx,frame_tx;
int M,m;
AssertFatal(UE_id!=-1,"no existing dlsch context\n");
@@ -1548,7 +1606,9 @@ static void do_release_harq(PHY_VARS_eNB *eNB,int UE_id,int tb,uint16_t frame,ui
if (eNB->frame_parms.frame_type == FDD) {
subframe_tx = (subframe+6)%10;
harq_pid = dlsch0->harq_ids[subframe_tx];
frame_tx = ul_ACK_subframe2_dl_frame(&eNB->frame_parms,frame,subframe,subframe_tx);
harq_pid = dlsch0->harq_ids[frame_tx%2][subframe_tx]; // or just use 0 for fdd?
AssertFatal((harq_pid>=0) && (harq_pid<10),"harq_pid %d not in 0...9\n",harq_pid);
dlsch0_harq = dlsch0->harq_processes[harq_pid];
dlsch1_harq = dlsch1->harq_processes[harq_pid];
@@ -1573,9 +1633,10 @@ static void do_release_harq(PHY_VARS_eNB *eNB,int UE_id,int tb,uint16_t frame,ui
subframe_tx = ul_ACK_subframe2_dl_subframe(&eNB->frame_parms,
subframe,
m);
frame_tx = ul_ACK_subframe2_dl_frame(&eNB->frame_parms,frame,subframe,subframe_tx);
if (((1<<m)&mask) > 0) {
harq_pid = dlsch0->harq_ids[subframe_tx];
if ((harq_pid>=0) && (harq_pid<10)) {
harq_pid = dlsch0->harq_ids[frame_tx%2][subframe_tx];
if ((harq_pid>=0) && (harq_pid<dlsch0->Mdlharq)) {
dlsch0_harq = dlsch0->harq_processes[harq_pid];
dlsch1_harq = dlsch1->harq_processes[harq_pid];
AssertFatal(dlsch0_harq!=NULL,"dlsch0_harq is null\n");
@@ -1608,7 +1669,7 @@ int getM(PHY_VARS_eNB *eNB,int frame,int subframe) {
LTE_eNB_DLSCH_t *dlsch0=NULL,*dlsch1=NULL;
LTE_DL_eNB_HARQ_t *dlsch0_harq=NULL,*dlsch1_harq=NULL;
int harq_pid;
int subframe_tx;
int subframe_tx,frame_tx;
int m;
M=ul_ACK_subframe2_M(&eNB->frame_parms,
@@ -1618,7 +1679,10 @@ int getM(PHY_VARS_eNB *eNB,int frame,int subframe) {
subframe_tx = ul_ACK_subframe2_dl_subframe(&eNB->frame_parms,
subframe,
m);
harq_pid = dlsch0->harq_ids[subframe_tx];
frame_tx = ul_ACK_subframe2_dl_frame(&eNB->frame_parms,frame,
subframe,subframe_tx);
harq_pid = dlsch0->harq_ids[frame_tx%2][subframe_tx];
if (harq_pid>=0 && harq_pid<10) {
dlsch0_harq = dlsch0->harq_processes[harq_pid];
dlsch1_harq = dlsch1->harq_processes[harq_pid];
@@ -1667,15 +1731,11 @@ void fill_ulsch_cqi_indication(PHY_VARS_eNB *eNB,uint16_t frame,uint8_t subframe
void fill_ulsch_harq_indication(PHY_VARS_eNB *eNB,LTE_UL_eNB_HARQ_t *ulsch_harq,uint16_t rnti, int frame,int subframe,int bundling)
{
int UE_id = find_dlsch(rnti,eNB,SEARCH_EXIST);
//AssertFatal(UE_id>=0,"UE_id doesn't exist\n");
if (UE_id < 0)
{
LOG_E(PHY,"%s(eNB, ulsch_harq, rnti:%04x, frame:%d, subframe:%d, bundling:%d) harq_pdus:%d - Could not find rnti - abort fill of ulsch harq ind\n", __FUNCTION__, rnti, frame, subframe, bundling,eNB->UL_INFO.harq_ind.harq_indication_body.number_of_harqs);
if( (UE_id<0) || (UE_id>=NUMBER_OF_UE_MAX) ){
LOG_E(PHY,"illegal UE_id found!!! rnti %04x UE_id %d\n",rnti,UE_id);
return;
}
LOG_D(PHY,"%s(eNB, ulsch_harq, rnti:%04x, frame:%d, subframe:%d, bundling:%d) harq_pdus:%d O_ACK:%d\n", __FUNCTION__, rnti, frame, subframe, bundling,eNB->UL_INFO.harq_ind.harq_indication_body.number_of_harqs,ulsch_harq->O_ACK);
//AssertFatal(UE_id>=0,"UE_id doesn't exist\n");
pthread_mutex_lock(&eNB->UL_INFO_mutex);
nfapi_harq_indication_pdu_t *pdu = &eNB->UL_INFO.harq_ind.harq_indication_body.harq_pdu_list[eNB->UL_INFO.harq_ind.harq_indication_body.number_of_harqs];
@@ -1707,12 +1767,16 @@ void fill_ulsch_harq_indication(PHY_VARS_eNB *eNB,LTE_UL_eNB_HARQ_t *ulsch_harq,
#if T_TRACER
/* TODO: get correct harq pid */
if (ulsch_harq->o_ACK[i] != 1)
T(T_ENB_PHY_DLSCH_UE_NACK, T_INT(0), T_INT(frame), T_INT(subframe),
T_INT(rnti), T_INT(eNB->dlsch[UE_id][0]->harq_ids[(subframe+6)%10]));
else
T(T_ENB_PHY_DLSCH_UE_ACK, T_INT(0), T_INT(frame), T_INT(subframe),
T_INT(rnti), T_INT(eNB->dlsch[UE_id][0]->harq_ids[(subframe+6)%10]));
{
int subframe_tx = (subframe+6)%10;
int frame_tx = subframe_tx >= 6 ? (frame+1023)%1024 : frame;
if (ulsch_harq->o_ACK[i] != 1)
T(T_ENB_PHY_DLSCH_UE_NACK, T_INT(0), T_INT(frame), T_INT(subframe),
T_INT(rnti), T_INT(eNB->dlsch[UE_id][0]->harq_ids[frame_tx%2][subframe_tx]));
else
T(T_ENB_PHY_DLSCH_UE_ACK, T_INT(0), T_INT(frame), T_INT(subframe),
T_INT(rnti), T_INT(eNB->dlsch[UE_id][0]->harq_ids[frame_tx%2][subframe_tx]));
}
#endif
}
}
@@ -1727,7 +1791,7 @@ void fill_ulsch_harq_indication(PHY_VARS_eNB *eNB,LTE_UL_eNB_HARQ_t *ulsch_harq,
for (i=0;i<ulsch_harq->O_ACK;i++) {
AssertFatal(ulsch_harq->o_ACK[i] == 0 || ulsch_harq->o_ACK[i] == 1, "harq_ack[%d] is %d, should be 1,2 or 4\n",i,ulsch_harq->o_ACK[i]);
pdu->harq_indication_tdd_rel13.harq_data[0].multiplex.value_0 = 2-ulsch_harq->o_ACK[i];
pdu->harq_indication_tdd_rel13.harq_data[0].bundling.value_0 = 2-ulsch_harq->o_ACK[i];
// release DLSCH if needed
/* TODO: review this code, it's most certainly wrong.
* We have to release the proper HARQ in case of ACK or NACK if max retransmission reached.
@@ -1783,7 +1847,7 @@ void fill_uci_harq_indication(PHY_VARS_eNB *eNB,
// estimate UL_CQI for MAC (from antenna port 0 only)
pdu->ul_cqi_information.tl.tag = NFAPI_UL_CQI_INFORMATION_TAG;
int SNRtimes10 = dB_fixed_times10(uci->stat) - 200;//(10*eNB->measurements.n0_power_dB[0]);
int SNRtimes10 = dB_fixed_times10(uci->stat) - 300;//(10*eNB->measurements.n0_power_dB[0]);
if (SNRtimes10 < -100) LOG_I(PHY,"uci->stat %d \n",uci->stat);
@@ -1805,12 +1869,16 @@ void fill_uci_harq_indication(PHY_VARS_eNB *eNB,
#if T_TRACER
if (harq_ack[0] != 1)
T(T_ENB_PHY_DLSCH_UE_NACK, T_INT(0), T_INT(frame), T_INT(subframe),
T_INT(uci->rnti), T_INT(eNB->dlsch[UE_id][0]->harq_ids[(subframe+6)%10]));
else
T(T_ENB_PHY_DLSCH_UE_ACK, T_INT(0), T_INT(frame), T_INT(subframe),
T_INT(uci->rnti), T_INT(eNB->dlsch[UE_id][0]->harq_ids[(subframe+6)%10]));
{
int subframe_tx = (subframe+6)%10;
int frame_tx = subframe_tx >= 6 ? (frame+1023)%1024 : frame;
if (harq_ack[0] != 1)
T(T_ENB_PHY_DLSCH_UE_NACK, T_INT(0), T_INT(frame), T_INT(subframe),
T_INT(uci->rnti), T_INT(eNB->dlsch[UE_id][0]->harq_ids[frame_tx%2][subframe_tx]));
else
T(T_ENB_PHY_DLSCH_UE_ACK, T_INT(0), T_INT(frame), T_INT(subframe),
T_INT(uci->rnti), T_INT(eNB->dlsch[UE_id][0]->harq_ids[frame_tx%2][subframe_tx]));
}
#endif
}
else if (uci->pucch_fmt == pucch_format1b) {
@@ -1834,7 +1902,7 @@ void fill_uci_harq_indication(PHY_VARS_eNB *eNB,
pdu->harq_indication_tdd_rel13.tl.tag = NFAPI_HARQ_INDICATION_TDD_REL13_TAG;
pdu->harq_indication_tdd_rel13.mode = tdd_mapping_mode;
LOG_D(PHY,"%s(eNB, uci_harq format %d, rnti:%04x, frame:%d, subframe:%d, tdd_mapping_mode:%d) harq_ack[0]:%d harq_ack[1]:%d\n", __FUNCTION__, uci->pucch_fmt,uci->rnti, frame, subframe, tdd_mapping_mode,harq_ack[0],harq_ack[1]);
switch (tdd_mapping_mode) {
case 0: // bundling
@@ -1896,32 +1964,44 @@ void fill_uci_harq_indication(PHY_VARS_eNB *eNB,
case 2: // special bundling (SR collision)
pdu->harq_indication_tdd_rel13.tl.tag = NFAPI_HARQ_INDICATION_TDD_REL13_TAG;
pdu->harq_indication_tdd_rel13.number_of_ack_nack = 1;
pdu->harq_indication_tdd_rel13.mode = 0;
int tdd_config5_sf2scheds=0;
if (eNB->frame_parms.tdd_config==5) tdd_config5_sf2scheds = getM(eNB,frame,subframe);
switch (harq_ack[0]) {
case 0:
case 4:
pdu->harq_indication_tdd_rel13.harq_data[0].bundling.value_0 = 0;
/* TODO: release_harq here? this whole code looks suspicious */
break;
case 1: // check if M=1,4,7
if (uci->num_pucch_resources == 1 || uci->num_pucch_resources == 4 ||
tdd_config5_sf2scheds == 1 || tdd_config5_sf2scheds == 4 || tdd_config5_sf2scheds == 7) {
pdu->harq_indication_tdd_rel13.harq_data[0].bundling.value_0 = 1;
release_harq(eNB,UE_id,0,frame,subframe,0xffff, 1);
release_harq(eNB,UE_id,1,frame,subframe,0xffff, 1);
}else{
pdu->harq_indication_tdd_rel13.harq_data[0].bundling.value_0 = 0;
}
break;
case 2: // check if M=2,5,8
if (uci->num_pucch_resources == 2 || tdd_config5_sf2scheds == 2 ||
tdd_config5_sf2scheds == 5 || tdd_config5_sf2scheds == 8) {
pdu->harq_indication_tdd_rel13.harq_data[0].bundling.value_0 = 1;
release_harq(eNB,UE_id,0,frame,subframe,0xffff, 1);
release_harq(eNB,UE_id,1,frame,subframe,0xffff, 1);
}else{
pdu->harq_indication_tdd_rel13.harq_data[0].bundling.value_0 = 0;
}
break;
case 3: // check if M=3,6,9
if (uci->num_pucch_resources == 3 || tdd_config5_sf2scheds == 3 ||
tdd_config5_sf2scheds == 6 || tdd_config5_sf2scheds == 9) {
pdu->harq_indication_tdd_rel13.harq_data[0].bundling.value_0 = 1;
release_harq(eNB,UE_id,0,frame,subframe,0xffff, 1);
release_harq(eNB,UE_id,1,frame,subframe,0xffff, 1);
}else{
pdu->harq_indication_tdd_rel13.harq_data[0].bundling.value_0 = 0;
}
break;
}
+2 -2
View File
@@ -111,7 +111,7 @@ void feptx0(RU_t *ru,int slot) {
}
*/
// TDD: turn on tx switch N_TA_offset before by setting buffer in these samples to 0
if ((slot == 0) &&
/* if ((slot == 0) &&
(fp->frame_type == TDD) &&
((fp->tdd_config==0) ||
(fp->tdd_config==1) ||
@@ -128,7 +128,7 @@ void feptx0(RU_t *ru,int slot) {
ru->common.txdata[aa][tx_offset] = 0x00000000;
}
}
}*/
}
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_RU_FEPTX_OFDM+slot , 0);
}
+1 -3
View File
@@ -322,9 +322,7 @@ LTE_DL_FRAME_PARMS *get_lte_frame_parms(module_id_t Mod_id, uint8_t CC_id);
MU_MIMO_mode* get_mu_mimo_mode (module_id_t Mod_id, uint8_t CC_id, rnti_t rnti);
int16_t get_hundred_times_delta_IF(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t harq_pid);
int16_t get_hundred_times_delta_IF_eNB(PHY_VARS_eNB *phy_vars_eNB,uint8_t UE_id,uint8_t harq_pid, uint8_t bw_factor);
int16_t get_hundred_times_delta_IF_eNB(PHY_VARS_eNB *phy_vars_eNB,uint16_t UE_id,uint8_t harq_pid, uint8_t bw_factor);
int16_t get_hundred_times_delta_IF_mac(module_id_t module_idP, uint8_t CC_id, rnti_t rnti, uint8_t harq_pid);
int16_t get_target_pusch_rx_power(module_id_t module_idP, uint8_t CC_id);
+2 -2
View File
@@ -127,7 +127,7 @@ void phy_procedures_eNB_S_RX(PHY_VARS_eNB *phy_vars_eNB,eNB_rxtx_proc_t *proc);
@param phy_vars_eNB Pointer to eNB variables on which to act
@param br_flag indicator for eMTC PRACH
*/
#ifdef Rel14
#if (RRC_VERSION >= MAKE_VERSION(14, 0, 0))
void prach_procedures(PHY_VARS_eNB *eNB,
int br_flag);
#else
@@ -208,7 +208,7 @@ LTE_eNB_UE_stats* get_UE_stats(uint8_t Mod_id, uint8_t CC_id,uint16_t rnti);
lte_subframe_t get_subframe_direction(uint8_t Mod_id,uint8_t CC_id,uint8_t subframe);
int16_t get_hundred_times_delta_IF_eNB(PHY_VARS_eNB *phy_vars_eNB,uint8_t UE_id,uint8_t harq_pid, uint8_t bw_factor);
int16_t get_hundred_times_delta_IF_eNB(PHY_VARS_eNB *phy_vars_eNB,uint16_t UE_id,uint8_t harq_pid, uint8_t bw_factor);
int16_t get_hundred_times_delta_IF_mac(module_id_t module_idP, uint8_t CC_id, rnti_t rnti, uint8_t harq_pid);
+8 -3
View File
@@ -204,9 +204,14 @@ void dump_dlsch_SI(PHY_VARS_UE *ue,UE_rxtx_proc_t *proc,uint8_t eNB_id,uint8_t s
unsigned int get_tx_amp(int power_dBm, int power_max_dBm, int N_RB_UL, int nb_rb)
{
int gain_dB = power_dBm - power_max_dBm;
int gain_dB;
double gain_lin;
if (power_dBm<=power_max_dBm)
gain_dB = power_dBm - power_max_dBm;
else
gain_dB = 0;
gain_lin = pow(10,.1*gain_dB);
AssertFatal((nb_rb >0) && (nb_rb <= N_RB_UL),"Illegal nb_rb/N_RB_UL combination (%d/%d)\n",nb_rb,N_RB_UL);
return((int)(AMP*sqrt(gain_lin*N_RB_UL/(double)nb_rb)));
@@ -252,7 +257,7 @@ void dump_dlsch_ra(PHY_VARS_UE *ue,UE_rxtx_proc_t *proc,uint8_t eNB_id,uint8_t s
write_output("dlsch_mag2.m","dlschmag2",ue->pdsch_vars_ra[0]->dl_ch_magb0,300*nsymb,1,1);
}
void phy_reset_ue(uint8_t Mod_id,uint8_t CC_id,uint8_t eNB_index)
void phy_reset_ue(module_id_t Mod_id,uint8_t CC_id,uint8_t eNB_index)
{
// This flushes ALL DLSCH and ULSCH harq buffers of ALL connected eNBs...add the eNB_index later
@@ -352,7 +357,7 @@ void process_timing_advance_rar(PHY_VARS_UE *ue,UE_rxtx_proc_t *proc,uint16_t ti
}
void process_timing_advance(uint8_t Mod_id,uint8_t CC_id,int16_t timing_advance)
void process_timing_advance(module_id_t Mod_id,uint8_t CC_id,int16_t timing_advance)
{
// uint32_t frame = PHY_vars_UE_g[Mod_id]->frame;
+1
View File
@@ -3426,6 +3426,7 @@ int main(int argc, char **argv)
re_allocated = dlsch_modulation(eNB,
eNB->common_vars.txdataF[eNB_id],
AMP,
frame,
subframe,
num_pdcch_symbols,
((TB0_active == 1)? eNB->dlsch[k][0]: NULL),
+1
View File
@@ -2679,6 +2679,7 @@ PMI_FEEDBACK:
re_allocated = dlsch_modulation(eNB,
eNB->common_vars.txdataF[eNB_id],
AMP,
frame,
subframe,
num_pdcch_symbols,
eNB->dlsch[k][0],
@@ -60,7 +60,7 @@ void ue_send_mch_sdu(module_id_t module_idP, uint8_t CC_id, frame_t frameP,
uint8_t * sdu, uint16_t sdu_len, uint8_t eNB_index,
uint8_t sync_area){}
int ue_query_mch(uint8_t Mod_id, uint8_t CC_id, uint32_t frame,
int ue_query_mch(module_id_t Mod_id, uint8_t CC_id, uint32_t frame,
sub_frame_t subframe, uint8_t eNB_index,
uint8_t * sync_area, uint8_t * mcch_active){ return(0);}
+2 -2
View File
@@ -365,7 +365,7 @@ typedef struct {
#endif
);
unsigned int (*mac_rlc_data_req)(module_id_t, unsigned int, const unsigned int,char*
#ifdef Rel14
#if (RRC_VERSION >= MAKE_VERSION(14, 0, 0))
,uint32_t
,uint32_t
#endif
@@ -373,7 +373,7 @@ typedef struct {
void (*mac_rlc_data_ind)(module_id_t, logical_chan_id_t, char*, tb_size_t, num_tb_t, crc_t* );
mac_rlc_status_resp_t (*mac_rlc_status_ind) (module_id_t enb_mod_idP, module_id_t ue_mod_idP, frame_t frameP, sub_frame_t subframeP, eNB_flag_t eNB_flagP, MBMS_flag_t MBMS_flagP,
logical_chan_id_t channel_idP, tb_size_t tb_sizeP
#ifdef Rel14
#if (RRC_VERSION >= MAKE_VERSION(14, 0, 0))
,uint32_t sourceL2Id
,uint32_t destinationL2Id
#endif
+1 -1
View File
@@ -68,7 +68,7 @@ typedef int32_t sdu_size_t;
typedef uint32_t frame_t;
typedef int32_t sframe_t;
typedef uint32_t sub_frame_t;
typedef uint8_t module_id_t;
typedef uint16_t module_id_t;
typedef uint8_t slice_id_t;
typedef uint8_t eNB_index_t;
typedef uint16_t ue_id_t;
+5 -7
View File
@@ -123,9 +123,9 @@ typedef struct RrcConfigurationReq_s {
long pucch_delta_shift[MAX_NUM_CCs];
long pucch_nRB_CQI[MAX_NUM_CCs];
long pucch_nCS_AN[MAX_NUM_CCs];
#if (RRC_VERSION < MAKE_VERSION(10, 0, 0))
//#if (RRC_VERSION < MAKE_VERSION(10, 0, 0))
long pucch_n1_AN[MAX_NUM_CCs];
#endif
//#endif
long pdsch_referenceSignalPower[MAX_NUM_CCs];
long pdsch_p_b[MAX_NUM_CCs];
long pusch_n_SB[MAX_NUM_CCs];
@@ -174,6 +174,7 @@ typedef struct RrcConfigurationReq_s {
long ue_TimersAndConstants_n310[MAX_NUM_CCs];
long ue_TimersAndConstants_n311[MAX_NUM_CCs];
long ue_TransmissionMode[MAX_NUM_CCs];
long ue_multiple_max[MAX_NUM_CCs];
//TTN - for D2D
//SIB18
@@ -219,13 +220,10 @@ typedef struct RrcConfigurationReq_s {
char* discRxPoolPS_ResourceConfig_subframeBitmap_choice_bs_buf[MAX_NUM_CCs];
long discRxPoolPS_ResourceConfig_subframeBitmap_choice_bs_size[MAX_NUM_CCs];
long discRxPoolPS_ResourceConfig_subframeBitmap_choice_bs_bits_unused[MAX_NUM_CCs];
} RrcConfigurationReq;
#define MAX_NUM_NBIOT_CELEVELS 3
typedef struct NbIoTRrcConfigurationReq_s {
uint32_t cell_identity;
+12 -1
View File
@@ -53,7 +53,10 @@
#define CONFIG_STRING_MACRLC_REMOTE_S_PORTC "remote_s_portc"
#define CONFIG_STRING_MACRLC_LOCAL_S_PORTD "local_s_portd"
#define CONFIG_STRING_MACRLC_REMOTE_S_PORTD "remote_s_portd"
#define CONFIG_STRING_MACRLC_SCHED_MODE "scheduler_mode"
#define CONFIG_STRING_MACRLC_PHY_TEST_MODE "phy_test_mode"
#define CONFIG_MACRLC_PUSCH10xSNR "puSch10xSnr"
#define CONFIG_MACRLC_PUCCH10xSNR "puCch10xSnr"
/*-------------------------------------------------------------------------------------------------------------------------------------------------------*/
/* MacRLC configuration parameters */
@@ -77,6 +80,10 @@
{CONFIG_STRING_MACRLC_REMOTE_S_PORTC, NULL, 0, uptr:NULL, defintval:50020, TYPE_UINT, 0}, \
{CONFIG_STRING_MACRLC_LOCAL_S_PORTD, NULL, 0, uptr:NULL, defintval:50021, TYPE_UINT, 0}, \
{CONFIG_STRING_MACRLC_REMOTE_S_PORTD, NULL, 0, uptr:NULL, defintval:50021, TYPE_UINT, 0}, \
{CONFIG_STRING_MACRLC_SCHED_MODE, NULL, 0, strptr:NULL, defstrval:"default", TYPE_STRING, 0}, \
{CONFIG_STRING_MACRLC_PHY_TEST_MODE, NULL, 0, uptr:NULL, defintval:1, TYPE_UINT, 0}, \
{CONFIG_MACRLC_PUSCH10xSNR, NULL, 0, iptr:NULL, defintval:200, TYPE_INT, 0}, \
{CONFIG_MACRLC_PUCCH10xSNR, NULL, 0, iptr:NULL, defintval:200, TYPE_INT, 0}, \
}
#define MACRLC_CC_IDX 0
#define MACRLC_TRANSPORT_N_PREFERENCE_IDX 1
@@ -95,4 +102,8 @@
#define MACRLC_REMOTE_S_PORTC_IDX 14
#define MACRLC_LOCAL_S_PORTD_IDX 15
#define MACRLC_REMOTE_S_PORTD_IDX 16
#define MACRLC_SCHED_MODE_IDX 17
#define MACRLC_PHY_TEST_IDX 18
#define MACRLC_PUSCH10xSNR_IDX 19
#define MACRLC_PUCCH10xSNR_IDX 20
/*---------------------------------------------------------------------------------------------------------------------------------------------------------*/
+46 -6
View File
@@ -102,6 +102,7 @@ void RCconfig_flexran()
ue_TimersAndConstants_n310, ue_TimersAndConstants_n311,
ue_TransmissionMode;
int32_t ue_multiple_max = 0;
e_SL_CP_Len_r12 rxPool_sc_CP_Len;
e_SL_PeriodComm_r12 rxPool_sc_Period;
@@ -387,6 +388,8 @@ void RCconfig_macrlc() {
RC.nb_mac_CC = (int*)malloc(RC.nb_macrlc_inst*sizeof(int));
for (j=0;j<RC.nb_macrlc_inst;j++) {
RC.mac[j]->puSch10xSnr = *(MacRLC_ParamList.paramarray[j][MACRLC_PUSCH10xSNR_IDX ].iptr);
RC.mac[j]->puCch10xSnr = *(MacRLC_ParamList.paramarray[j][MACRLC_PUCCH10xSNR_IDX ].iptr);
RC.nb_mac_CC[j] = *(MacRLC_ParamList.paramarray[j][MACRLC_CC_IDX].iptr);
//RC.mac[j]->phy_test = *(MacRLC_ParamList.paramarray[j][MACRLC_PHY_TEST_IDX].iptr);
//printf("PHY_TEST = %d,%d\n", RC.mac[j]->phy_test, j);
@@ -427,7 +430,17 @@ void RCconfig_macrlc() {
printf("**************** RETURNED FROM configure_nfapi_vnf() vnf_port:%d\n", RC.mac[j]->eth_params_s.my_portc);
} else { // other midhaul
AssertFatal(1==0,"MACRLC %d: %s unknown southbound midhaul\n",j,*(MacRLC_ParamList.paramarray[j][MACRLC_TRANSPORT_S_PREFERENCE_IDX].strptr));
}
}
if (strcmp(*(MacRLC_ParamList.paramarray[j][MACRLC_SCHED_MODE_IDX].strptr), "default") == 0){
global_scheduler_mode=SCHED_MODE_DEFAULT;
printf("sched mode = default %d [%s]\n",global_scheduler_mode,*(MacRLC_ParamList.paramarray[j][MACRLC_SCHED_MODE_IDX].strptr));
}else if (strcmp(*(MacRLC_ParamList.paramarray[j][MACRLC_SCHED_MODE_IDX].strptr), "fairRR") == 0){
global_scheduler_mode=SCHED_MODE_FAIR_RR;
printf("sched mode = fairRR %d [%s]\n",global_scheduler_mode,*(MacRLC_ParamList.paramarray[j][MACRLC_SCHED_MODE_IDX].strptr));
}else{
global_scheduler_mode=SCHED_MODE_DEFAULT;
printf("sched mode = default %d [%s]\n",global_scheduler_mode,*(MacRLC_ParamList.paramarray[j][MACRLC_SCHED_MODE_IDX].strptr));
}
}// j=0..num_inst
} else {// MacRLC_ParamList.numelt > 0
AssertFatal (0,
@@ -521,6 +534,8 @@ int RCconfig_RRC(MessageDef *msg_p, uint32_t i, eNB_RRC_INST *rrc) {
int32_t ue_TimersAndConstants_n311 = 0;
int32_t ue_TransmissionMode = 0;
int32_t ue_multiple_max = 0;
//TTN - for D2D
//SIB18
const char* rxPool_sc_CP_Len = NULL;
@@ -567,7 +582,6 @@ int RCconfig_RRC(MessageDef *msg_p, uint32_t i, eNB_RRC_INST *rrc) {
libconfig_int discRxPoolPS_ResourceConfig_subframeBitmap_choice_bs_size = 0;
libconfig_int discRxPoolPS_ResourceConfig_subframeBitmap_choice_bs_bits_unused = 0;
int32_t srb1_timer_poll_retransmit = 0;
int32_t srb1_timer_reordering = 0;
int32_t srb1_timer_status_prohibit = 0;
@@ -918,13 +932,11 @@ int RCconfig_RRC(MessageDef *msg_p, uint32_t i, eNB_RRC_INST *rrc) {
RC.config_file_name, i, prach_zero_correlation);
RRC_CONFIGURATION_REQ (msg_p).prach_freq_offset[j] = prach_freq_offset;
if ((prach_freq_offset <0) || (prach_freq_offset > 94))
AssertFatal (0,
"Failed to parse eNB configuration file %s, enb %d unknown value \"%d\" for prach_freq_offset choice: 0..94!\n",
RC.config_file_name, i, prach_freq_offset);
RRC_CONFIGURATION_REQ (msg_p).pucch_delta_shift[j] = pucch_delta_shift-1;
if ((pucch_delta_shift <1) || (pucch_delta_shift > 3))
@@ -946,7 +958,7 @@ int RCconfig_RRC(MessageDef *msg_p, uint32_t i, eNB_RRC_INST *rrc) {
"Failed to parse eNB configuration file %s, enb %d unknown value \"%d\" for pucch_nCS_AN choice: 0..7!\n",
RC.config_file_name, i, pucch_nCS_AN);
#if (RRC_VERSION < MAKE_VERSION(10, 0, 0))
//#if (RRC_VERSION < MAKE_VERSION(10, 0, 0))
RRC_CONFIGURATION_REQ (msg_p).pucch_n1_AN[j] = pucch_n1_AN;
if ((pucch_n1_AN <0) || (pucch_n1_AN > 2047))
@@ -954,7 +966,7 @@ int RCconfig_RRC(MessageDef *msg_p, uint32_t i, eNB_RRC_INST *rrc) {
"Failed to parse eNB configuration file %s, enb %d unknown value \"%d\" for pucch_n1_AN choice: 0..2047!\n",
RC.config_file_name, i, pucch_n1_AN);
#endif
//#endif
RRC_CONFIGURATION_REQ (msg_p).pdsch_referenceSignalPower[j] = pdsch_referenceSignalPower;
if ((pdsch_referenceSignalPower <-60) || (pdsch_referenceSignalPower > 50))
@@ -1580,6 +1592,34 @@ int RCconfig_RRC(MessageDef *msg_p, uint32_t i, eNB_RRC_INST *rrc) {
break;
}
RRC_CONFIGURATION_REQ (msg_p).ue_multiple_max[j] = ue_multiple_max;
switch (N_RB_DL) {
case 25:
if ((ue_multiple_max < 1) || (ue_multiple_max > 4))
AssertFatal (0,
"Failed to parse eNB configuration file %s, enb %d unknown value \"%d\" for ue_multiple_max choice: 1..4!\n",
RC.config_file_name, i, ue_multiple_max);
break;
case 50:
if ((ue_multiple_max < 1) || (ue_multiple_max > 8))
AssertFatal (0,
"Failed to parse eNB configuration file %s, enb %d unknown value \"%d\" for ue_multiple_max choice: 1..8!\n",
RC.config_file_name, i, ue_multiple_max);
break;
case 100:
if ((ue_multiple_max < 1) || (ue_multiple_max > 16))
AssertFatal (0,
"Failed to parse eNB configuration file %s, enb %d unknown value \"%d\" for ue_multiple_max choice: 1..16!\n",
RC.config_file_name, i, ue_multiple_max);
break;
default:
AssertFatal (0,
"Failed to parse eNB configuration file %s, enb %d unknown value \"%d\" for N_RB_DL choice: 25,50,100 !\n",
RC.config_file_name, i, N_RB_DL);
break;
}
//TTN - for D2D
//SIB18
if (strcmp(rxPool_sc_CP_Len,"normal")==0) {
+6 -3
View File
@@ -304,6 +304,7 @@ typedef enum {
#define ENB_CONFIG_STRING_UETIMERS_N310 "ue_TimersAndConstants_n310"
#define ENB_CONFIG_STRING_UETIMERS_N311 "ue_TimersAndConstants_n311"
#define ENB_CONFIG_STRING_UE_TRANSMISSION_MODE "ue_TransmissionMode"
#define ENB_CONFIG_STRING_UE_MULTIPLE_MAX "ue_multiple_max"
//TTN - for D2D
//SIB18
@@ -490,7 +491,7 @@ typedef enum {
{ENB_CONFIG_STRING_PUCCH_DELTA_SHIFT, NULL, 0, iptr:&pucch_delta_shift, defintval:1, TYPE_UINT, 0}, \
{ENB_CONFIG_STRING_PUCCH_NRB_CQI, NULL, 0, iptr:&pucch_nRB_CQI, defintval:1, TYPE_UINT, 0}, \
{ENB_CONFIG_STRING_PUCCH_NCS_AN, NULL, 0, iptr:&pucch_nCS_AN, defintval:0, TYPE_UINT, 0}, \
{ENB_CONFIG_STRING_PUCCH_N1_AN, NULL, 0, iptr:&pucch_n1_AN, defintval:32, TYPE_UINT, 0}, \
{ENB_CONFIG_STRING_PUCCH_N1_AN, NULL, 0, iptr:&pucch_n1_AN, defintval:0, TYPE_UINT, 0}, \
{ENB_CONFIG_STRING_PDSCH_RS_EPRE, NULL, 0, iptr:&pdsch_referenceSignalPower, defintval:-29, TYPE_INT, 0}, \
{ENB_CONFIG_STRING_PDSCH_PB, NULL, 0, iptr:&pdsch_p_b, defintval:0, TYPE_INT, 0}, \
{ENB_CONFIG_STRING_PUSCH_N_SB, NULL, 0, iptr:&pusch_n_SB, defintval:1, TYPE_INT, 0}, \
@@ -538,6 +539,7 @@ typedef enum {
{ENB_CONFIG_STRING_UETIMERS_N310, NULL, 0, iptr:&ue_TimersAndConstants_n310, defintval:20, TYPE_UINT, 0}, \
{ENB_CONFIG_STRING_UETIMERS_N311, NULL, 0, iptr:&ue_TimersAndConstants_n311, defintval:1, TYPE_UINT, 0}, \
{ENB_CONFIG_STRING_UE_TRANSMISSION_MODE, NULL, 0, iptr:&ue_TransmissionMode, defintval:1, TYPE_UINT, 0}, \
{ENB_CONFIG_STRING_UE_MULTIPLE_MAX, NULL, 0, iptr:&ue_multiple_max, defintval:4, TYPE_UINT, 0}, \
{ENB_CONFIG_STRING_RXPOOL_SC_CP_LEN, NULL, 0, strptr:(char **)&rxPool_sc_CP_Len, defstrval:"normal", TYPE_STRING, 0}, \
{ENB_CONFIG_STRING_RXPOOL_SC_PRIOD, NULL, 0, strptr:(char **)&rxPool_sc_Period, defstrval:"sf40", TYPE_STRING, 0}, \
{ENB_CONFIG_STRING_RXPOOL_DATA_CP_LEN, NULL, 0, strptr:(char **)&rxPool_data_CP_Len, defstrval:"normal", TYPE_STRING, 0}, \
@@ -826,9 +828,9 @@ typedef enum {
#define CONFIG_STRING_MACRLC_REMOTE_S_PORTC "remote_s_portc"
#define CONFIG_STRING_MACRLC_LOCAL_S_PORTD "local_s_portd"
#define CONFIG_STRING_MACRLC_REMOTE_S_PORTD "remote_s_portd"
#define CONFIG_STRING_MACRLC_SCHED_MODE "scheduler_mode"
#define CONFIG_STRING_MACRLC_PHY_TEST_MODE "phy_test_mode"
#define MACRLC_CC_IDX 0
#define MACRLC_TRANSPORT_N_PREFERENCE_IDX 1
#define MACRLC_LOCAL_N_IF_NAME_IDX 2
@@ -846,5 +848,6 @@ typedef enum {
#define MACRLC_REMOTE_S_PORTC_IDX 14
#define MACRLC_LOCAL_S_PORTD_IDX 15
#define MACRLC_REMOTE_S_PORTD_IDX 16
#define MACRLC_PHY_TEST_IDX 17
#define MACRLC_SCHED_MODE_IDX 17
#define MACRLC_PHY_TEST_IDX 18
/*---------------------------------------------------------------------------------------------------------------------------------------------------------*/
+3 -3
View File
@@ -141,7 +141,7 @@ rlc_buffer_occupancy_t flexran_get_tx_queue_size(mid_t mod_id, mid_t ue_id, logi
frame_t frame = flexran_get_current_frame(mod_id);
sub_frame_t subframe = flexran_get_current_subframe(mod_id);
mac_rlc_status_resp_t rlc_status = mac_rlc_status_ind(mod_id,rnti, mod_id, frame, subframe, ENB_FLAG_YES,MBMS_FLAG_NO, channel_id, 0
#ifdef Rel14
#if (RRC_VERSION >= MAKE_VERSION(14, 0, 0))
,0, 0
#endif
);
@@ -154,7 +154,7 @@ rlc_buffer_occupancy_t flexran_get_num_pdus_buffer(mid_t mod_id, mid_t ue_id, lo
frame_t frame = flexran_get_current_frame(mod_id);
sub_frame_t subframe = flexran_get_current_subframe(mod_id);
mac_rlc_status_resp_t rlc_status = mac_rlc_status_ind(mod_id,rnti, mod_id, frame, subframe, ENB_FLAG_YES,MBMS_FLAG_NO, channel_id, 0
#ifdef Rel14
#if (RRC_VERSION >= MAKE_VERSION(14, 0, 0))
,0, 0
#endif
);
@@ -167,7 +167,7 @@ frame_t flexran_get_hol_delay(mid_t mod_id, mid_t ue_id, logical_chan_id_t chann
frame_t frame = flexran_get_current_frame(mod_id);
sub_frame_t subframe = flexran_get_current_subframe(mod_id);
mac_rlc_status_resp_t rlc_status = mac_rlc_status_ind(mod_id, rnti, mod_id, frame, subframe, ENB_FLAG_YES, MBMS_FLAG_NO, channel_id, 0
#ifdef Rel14
#if (RRC_VERSION >= MAKE_VERSION(14, 0, 0))
,0, 0
#endif
);
+6 -5
View File
@@ -218,7 +218,7 @@ void config_mib(int Mod_idP,
cfg->rf_config.dl_channel_bandwidth.value = to_prb(dl_BandwidthP);
cfg->rf_config.dl_channel_bandwidth.tl.tag = NFAPI_RF_CONFIG_DL_CHANNEL_BANDWIDTH_TAG;
cfg->num_tlv++;
LOG_E(PHY,"%s() dl_BandwidthP:%d\n", __FUNCTION__, dl_BandwidthP);
LOG_D(PHY,"%s() dl_BandwidthP:%d\n", __FUNCTION__, dl_BandwidthP);
cfg->rf_config.ul_channel_bandwidth.value = to_prb(dl_BandwidthP);
cfg->rf_config.ul_channel_bandwidth.tl.tag = NFAPI_RF_CONFIG_UL_CHANNEL_BANDWIDTH_TAG;
@@ -727,7 +727,7 @@ rrc_mac_config_req_eNB(module_id_t Mod_idP,
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_RRC_MAC_CONFIG, VCD_FUNCTION_IN);
LOG_E(MAC, "RC.mac:%p mib:%p\n", RC.mac, mib);
LOG_D(MAC, "RC.mac:%p mib:%p\n", RC.mac, mib);
if (mib != NULL) {
if (RC.mac == NULL)
@@ -962,8 +962,8 @@ rrc_mac_config_req_eNB(module_id_t Mod_idP,
}
#endif
LOG_E(MAC, "%s() %s:%d RC.mac[Mod_idP]->if_inst->PHY_config_req:%p\n", __FUNCTION__, __FILE__, __LINE__, RC.mac[Mod_idP]->if_inst->PHY_config_req);
LOG_D(MAC, "%s() %s:%d RC.mac[Mod_idP]->if_inst->PHY_config_req:%p\n", __FUNCTION__, __FILE__, __LINE__, RC.mac[Mod_idP]->if_inst->PHY_config_req);
// if in nFAPI mode
if (
@@ -987,6 +987,7 @@ rrc_mac_config_req_eNB(module_id_t Mod_idP,
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_RRC_MAC_CONFIG, VCD_FUNCTION_OUT);
}
RC.mac[Mod_idP]->scheduler_mode = global_scheduler_mode;
return(0);
}
+2 -2
View File
@@ -138,7 +138,7 @@ rrc_mac_config_req_ue(module_id_t Mod_idP,
#ifdef CBA
, uint8_t num_active_cba_groups, uint16_t cba_rnti
#endif
#if defined(Rel14)
#if (RRC_VERSION >= MAKE_VERSION(14, 0, 0))
,config_action_t config_action
,const uint32_t * const sourceL2Id
,const uint32_t * const destinationL2Id
@@ -590,7 +590,7 @@ rrc_mac_config_req_ue(module_id_t Mod_idP,
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME
(VCD_SIGNAL_DUMPER_FUNCTIONS_RRC_MAC_CONFIG, VCD_FUNCTION_OUT);
//for D2D
#if defined(Rel10) || defined(Rel14)
#if (RRC_VERSION >= MAKE_VERSION(10, 0, 0))
switch (config_action) {
case CONFIG_ACTION_ADD:
if (sourceL2Id){
+53 -22
View File
@@ -51,6 +51,9 @@
#include "flexran_agent_extern.h"
#include "flexran_agent_mac.h"
/* for fair round robin SCHED */
#include "eNB_scheduler_fairRR.h"
#if defined(ENABLE_ITTI)
#include "intertask_interface.h"
#endif
@@ -359,8 +362,9 @@ check_ul_failure(module_id_t module_idP, int CC_id, int UE_id,
// check uplink failure
if ((UE_list->UE_sched_ctrl[UE_id].ul_failure_timer > 0) &&
(UE_list->UE_sched_ctrl[UE_id].ul_out_of_sync == 0)) {
LOG_I(MAC, "UE %d rnti %x: UL Failure timer %d \n", UE_id, rnti,
UE_list->UE_sched_ctrl[UE_id].ul_failure_timer);
if (UE_list->UE_sched_ctrl[UE_id].ul_failure_timer == 1)
LOG_I(MAC, "UE %d rnti %x: UL Failure timer %d \n", UE_id, rnti,
UE_list->UE_sched_ctrl[UE_id].ul_failure_timer);
if (UE_list->UE_sched_ctrl[UE_id].ra_pdcch_order_sent == 0) {
UE_list->UE_sched_ctrl[UE_id].ra_pdcch_order_sent = 1;
@@ -385,23 +389,24 @@ check_ul_failure(module_id_t module_idP, int CC_id, int UE_id,
DL_req[CC_id].dl_config_request_body.number_dci++;
DL_req[CC_id].dl_config_request_body.number_pdu++;
DL_req[CC_id].dl_config_request_body.tl.tag = NFAPI_DL_CONFIG_REQUEST_BODY_TAG;
LOG_I(MAC,
LOG_D(MAC,
"UE %d rnti %x: sending PDCCH order for RAPROC (failure timer %d), resource_block_coding %d \n",
UE_id, rnti,
UE_list->UE_sched_ctrl[UE_id].ul_failure_timer,
dl_config_pdu->dci_dl_pdu.
dci_dl_pdu_rel8.resource_block_coding);
} else { // ra_pdcch_sent==1
LOG_I(MAC,
LOG_D(MAC,
"UE %d rnti %x: sent PDCCH order for RAPROC waiting (failure timer %d) \n",
UE_id, rnti,
UE_list->UE_sched_ctrl[UE_id].ul_failure_timer);
if ((UE_list->UE_sched_ctrl[UE_id].ul_failure_timer % 40) == 0) UE_list->UE_sched_ctrl[UE_id].ra_pdcch_order_sent = 0; // resend every 4 frames
if ((UE_list->UE_sched_ctrl[UE_id].ul_failure_timer % 80) == 0) UE_list->UE_sched_ctrl[UE_id].ra_pdcch_order_sent = 0; // resend every 8 frames
}
UE_list->UE_sched_ctrl[UE_id].ul_failure_timer++;
// check threshold
if (UE_list->UE_sched_ctrl[UE_id].ul_failure_timer > 20000) {
if (UE_list->UE_sched_ctrl[UE_id].ul_failure_timer > 4000) {
// note: probably ul_failure_timer should be less than UE radio link failure time(see T310/N310/N311)
// inform RRC of failure and clear timer
LOG_I(MAC,
"UE %d rnti %x: UL Failure after repeated PDCCH orders: Triggering RRC \n",
@@ -436,7 +441,7 @@ clear_nfapi_information(eNB_MAC_INST * eNB, int CC_idP,
{
nfapi_dl_config_request_t *DL_req = &eNB->DL_req[0];
nfapi_ul_config_request_t *UL_req = &eNB->UL_req[0];
nfapi_hi_dci0_request_t *HI_DCI0_req = &eNB->HI_DCI0_req[0];
nfapi_hi_dci0_request_t *HI_DCI0_req = &eNB->HI_DCI0_req[CC_idP][subframeP];
nfapi_tx_request_t *TX_req = &eNB->TX_req[0];
eNB->pdu_index[CC_idP] = 0;
@@ -449,8 +454,8 @@ clear_nfapi_information(eNB_MAC_INST * eNB, int CC_idP,
DL_req[CC_idP].dl_config_request_body.number_pdsch_rnti = 0;
DL_req[CC_idP].dl_config_request_body.transmission_power_pcfich = 6000;
HI_DCI0_req[CC_idP].hi_dci0_request_body.sfnsf = subframeP + (frameP<<4);
HI_DCI0_req[CC_idP].hi_dci0_request_body.number_of_dci = 0;
HI_DCI0_req->hi_dci0_request_body.sfnsf = subframeP + (frameP<<4);
HI_DCI0_req->hi_dci0_request_body.number_of_dci = 0;
UL_req[CC_idP].ul_config_request_body.number_of_pdus = 0;
@@ -532,7 +537,6 @@ eNB_dlsch_ulsch_scheduler(module_id_t module_idP, frame_t frameP,
// refresh UE list based on UEs dropped by PHY in previous subframe
for (i = 0; i < MAX_MOBILES_PER_ENB; i++) {
if (UE_list->active[i]) {
rnti = UE_RNTI(module_idP, i);
CC_id = UE_PCCID(module_idP, i);
@@ -570,14 +574,21 @@ eNB_dlsch_ulsch_scheduler(module_id_t module_idP, frame_t frameP,
if(RC.mac[module_idP]->UE_list.UE_sched_ctrl[i].ue_reestablishment_reject_timer >=
RC.mac[module_idP]->UE_list.UE_sched_ctrl[i].ue_reestablishment_reject_timer_thres) {
RC.mac[module_idP]->UE_list.UE_sched_ctrl[i].ue_reestablishment_reject_timer = 0;
for (int ue_id_l = 0; ue_id_l < MAX_MOBILES_PER_ENB; ue_id_l++) {
if (reestablish_rnti_map[ue_id_l][0] == rnti) {
// clear currentC-RNTI from map
reestablish_rnti_map[ue_id_l][0] = 0;
reestablish_rnti_map[ue_id_l][1] = 0;
break;
//clear reestablish_rnti_map
if(RC.mac[module_idP]->UE_list.UE_sched_ctrl[i].ue_reestablishment_reject_timer_thres >20){
for (int ue_id_l = 0; ue_id_l < MAX_MOBILES_PER_ENB; ue_id_l++) {
if (reestablish_rnti_map[ue_id_l][0] == rnti) {
// clear currentC-RNTI from map
reestablish_rnti_map[ue_id_l][0] = 0;
reestablish_rnti_map[ue_id_l][1] = 0;
break;
}
}
}
PROTOCOL_CTXT_SET_BY_MODULE_ID(&ctxt, module_idP, ENB_FLAG_YES, rnti, 0, 0,module_idP);
rrc_rlc_remove_ue(&ctxt);
pdcp_remove_UE(&ctxt);
}
// Note: This should not be done in the MAC!
for (int ii=0; ii<MAX_MOBILES_PER_ENB; ii++) {
LTE_eNB_ULSCH_t *ulsch = RC.eNB[module_idP][CC_id]->ulsch[ii];
@@ -617,13 +628,15 @@ eNB_dlsch_ulsch_scheduler(module_id_t module_idP, frame_t frameP,
}
}
}
#if (!defined(PRE_SCD_THREAD))
PROTOCOL_CTXT_SET_BY_MODULE_ID(&ctxt, module_idP, ENB_FLAG_YES,
NOT_A_RNTI, frameP, subframeP,
module_idP);
pdcp_run(&ctxt);
rrc_rx_tx(&ctxt, CC_id);
#endif
#if (RRC_VERSION >= MAKE_VERSION(10, 0, 0))
@@ -637,6 +650,22 @@ eNB_dlsch_ulsch_scheduler(module_id_t module_idP, frame_t frameP,
#endif
static int debug_flag=0;
void (*schedule_ulsch_p)(module_id_t module_idP, frame_t frameP, sub_frame_t subframe);
void (*schedule_ue_spec_p)(module_id_t module_idP, frame_t frameP, sub_frame_t subframe, int *mbsfn_flag);
if(RC.mac[module_idP]->scheduler_mode == SCHED_MODE_DEFAULT){
schedule_ulsch_p = schedule_ulsch;
schedule_ue_spec_p = schedule_dlsch;
}else if(RC.mac[module_idP]->scheduler_mode == SCHED_MODE_FAIR_RR){
memset(dlsch_ue_select, 0, sizeof(dlsch_ue_select));
schedule_ulsch_p = schedule_ulsch_fairRR;
schedule_ue_spec_p = schedule_ue_spec_fairRR;
}
if(debug_flag==0){
LOG_E(MAC,"SCHED_MODE=%d\n",RC.mac[module_idP]->scheduler_mode);
debug_flag=1;
}
// This schedules MIB
if ((subframeP == 0) && (frameP & 3) == 0)
@@ -653,13 +682,13 @@ eNB_dlsch_ulsch_scheduler(module_id_t module_idP, frame_t frameP,
// This schedules SRS in subframeP
schedule_SRS(module_idP, frameP, subframeP);
// This schedules ULSCH in subframeP (dci0)
schedule_ulsch(module_idP, frameP, subframeP);
schedule_ulsch_p(module_idP, frameP, subframeP);
// This schedules UCI_SR in subframeP
schedule_SR(module_idP, frameP, subframeP);
// This schedules UCI_CSI in subframeP
schedule_CSI(module_idP, frameP, subframeP);
// This schedules DLSCH in subframeP
schedule_dlsch(module_idP, frameP, subframeP, mbsfn_status);
schedule_ue_spec_p(module_idP, frameP, subframeP, mbsfn_status);
}
else{
schedule_ulsch_phy_test(module_idP,frameP,subframeP);
@@ -670,8 +699,10 @@ eNB_dlsch_ulsch_scheduler(module_id_t module_idP, frame_t frameP,
flexran_agent_send_update_stats(module_idP);
// Allocate CCEs for good after scheduling is done
for (CC_id = 0; CC_id < MAX_NUM_CCs; CC_id++)
allocate_CCEs(module_idP, CC_id, subframeP, 0);
for (CC_id = 0; CC_id < MAX_NUM_CCs; CC_id++) {
if(cc[CC_id].tdd_Config == NULL || !(is_UL_sf(&cc[CC_id],subframeP)))
allocate_CCEs(module_idP, CC_id, frameP, subframeP, 2);
}
stop_meas(&RC.mac[module_idP]->eNB_scheduler);
+78 -30
View File
@@ -106,10 +106,10 @@ add_msg3(module_id_t module_idP, int CC_id, RA_t * ra, frame_t frameP,
nfapi_ul_config_request_t *ul_req;
nfapi_ul_config_request_body_t *ul_req_body;
nfapi_ul_config_request_pdu_t *ul_config_pdu;
nfapi_hi_dci0_request_t *hi_dci0_req = &mac->HI_DCI0_req[CC_id];
nfapi_hi_dci0_request_body_t *hi_dci0_req_body = &hi_dci0_req->hi_dci0_request_body;
nfapi_hi_dci0_request_t *hi_dci0_req;
nfapi_hi_dci0_request_body_t *hi_dci0_req_body;
nfapi_hi_dci0_request_pdu_t *hi_dci0_pdu;
uint8_t sf_ahead_dl;
uint8_t rvseq[4] = { 0, 2, 3, 1 };
@@ -211,6 +211,9 @@ add_msg3(module_id_t module_idP, int CC_id, RA_t * ra, frame_t frameP,
LOG_D(MAC, "MSG3: UL_CONFIG SFN/SF:%d number_of_pdus:%d ra->msg3_round:%d\n", NFAPI_SFNSF2DEC(ul_req->sfn_sf), ul_req_body->number_of_pdus, ra->msg3_round);
if (ra->msg3_round != 0) { // program HI too
sf_ahead_dl = ul_subframe2_k_phich(cc, subframeP);
hi_dci0_req = &mac->HI_DCI0_req[CC_id][(subframeP+sf_ahead_dl)%10];
hi_dci0_req_body = &hi_dci0_req->hi_dci0_request_body;
hi_dci0_pdu = &hi_dci0_req_body->hi_dci0_pdu_list[hi_dci0_req_body->number_of_dci + hi_dci0_req_body->number_of_hi];
memset((void *) hi_dci0_pdu, 0,
sizeof(nfapi_hi_dci0_request_pdu_t));
@@ -225,7 +228,7 @@ add_msg3(module_id_t module_idP, int CC_id, RA_t * ra, frame_t frameP,
hi_dci0_req_body->sfnsf = sfnsf_add_subframe(ra->Msg3_frame, ra->Msg3_subframe, 0);
hi_dci0_req_body->tl.tag = NFAPI_HI_DCI0_REQUEST_BODY_TAG;
hi_dci0_req->sfn_sf = sfnsf_add_subframe(ra->Msg3_frame, ra->Msg3_subframe, 4);
hi_dci0_req->sfn_sf = sfnsf_add_subframe(frameP, subframeP, sf_ahead_dl);
hi_dci0_req->header.message_id = NFAPI_HI_DCI0_REQUEST;
if (nfapi_mode) {
@@ -283,7 +286,7 @@ generate_Msg2(module_id_t module_idP, int CC_idP, frame_t frameP,
LOG_D(MAC,"absSF:%d absSF_Msg2:%d ra->rach_resource_type:%d\n",absSF,absSF_Msg2,ra->rach_resource_type);
if (absSF > absSF_Msg2)
if (absSF < absSF_Msg2)
return; // we're not ready yet, need to be to start ==
if (cc[CC_idP].radioResourceConfigCommon_BR) {
@@ -486,6 +489,9 @@ generate_Msg2(module_id_t module_idP, int CC_idP, frame_t frameP,
TX_req->segments[0].segment_length = 7;
TX_req->segments[0].segment_data = cc[CC_idP].RAR_pdu.payload;
mac->TX_req[CC_idP].tx_request_body.number_of_pdus++;
if(RC.mac[module_idP]->scheduler_mode == SCHED_MODE_FAIR_RR){
set_dl_ue_select_msg2(CC_idP, 4, -1, ra->rnti);
}
}
}
@@ -587,6 +593,9 @@ generate_Msg2(module_id_t module_idP, int CC_idP, frame_t frameP,
TX_req->segments[0].segment_data =
cc[CC_idP].RAR_pdu.payload;
mac->TX_req[CC_idP].tx_request_body.number_of_pdus++;
if(RC.mac[module_idP]->scheduler_mode == SCHED_MODE_FAIR_RR){
set_dl_ue_select_msg2(CC_idP, 4, -1, ra->rnti);
}
} // PDCCH CCE allocation is feasible
} // Msg2 frame/subframe condition
} // else BL/CE
@@ -693,17 +702,17 @@ generate_Msg4(module_id_t module_idP, int CC_idP, frame_t frameP,
// set HARQ process round to 0 for this UE
if (cc->tdd_Config)
ra->harq_pid = ((frameP * 10) + subframeP) % 10;
else
ra->harq_pid = ((frameP * 10) + subframeP) & 7;
ra->harq_pid = frame_subframe2_dl_harq_pid(cc->tdd_Config,frameP ,subframeP);
/* // Get RRCConnectionSetup for Piggyback
rrc_sdu_length = mac_rrc_data_req(module_idP, CC_idP, frameP, CCCH, 1, // 1 transport block
&cc[CC_idP].CCCH_pdu.payload[0], 0); // not used in this case
AssertFatal(rrc_sdu_length > 0,
"[MAC][eNB Scheduler] CCCH not allocated\n");
if(rrc_sdu_length <= 0) {
LOG_D(MAC,"[MAC][eNB Scheduler] CCCH not allocated (%d)\n",rrc_sdu_length);
return;
}
//AssertFatal(rrc_sdu_length > 0,
//"[MAC][eNB Scheduler] CCCH not allocated\n");
LOG_D(MAC,
@@ -987,6 +996,9 @@ generate_Msg4(module_id_t module_idP, int CC_idP, frame_t frameP,
module_idP, CC_idP, frameP, UE_RNTI(module_idP,UE_id),
rrc_sdu_length);
}
if(RC.mac[module_idP]->scheduler_mode == SCHED_MODE_FAIR_RR){
set_dl_ue_select_msg4(CC_idP, 4, UE_id, ra->rnti);
}
} // Msg4 frame/subframe
} // msg4_mpdcch_repetition_count
} // rach_resource_type > 0
@@ -1086,10 +1098,8 @@ generate_Msg4(module_id_t module_idP, int CC_idP, frame_t frameP,
"Frame %d, Subframe %d: Preparing for Msg4 retransmission currently %d.%d\n",
frameP, subframeP, ra->Msg4_frame,
ra->Msg4_subframe);
if (ra->Msg4_subframe > 1)
ra->Msg4_frame++;
ra->Msg4_frame &= 1023;
ra->Msg4_subframe = (ra->Msg4_subframe + 8) % 10;
get_retransmission_timing(mac->common_channels[CC_idP].tdd_Config,&ra->Msg4_frame,&ra->Msg4_subframe);
LOG_D(MAC,
"Frame %d, Subframe %d: Msg4 retransmission in %d.%d\n",
frameP, subframeP, ra->Msg4_frame,
@@ -1097,9 +1107,7 @@ generate_Msg4(module_id_t module_idP, int CC_idP, frame_t frameP,
lcid = 0;
// put HARQ process round to 0
if (cc->tdd_Config) ra->harq_pid = ((frameP * 10) + subframeP) % 10;
else
ra->harq_pid = ((frameP * 10) + subframeP) & 7;
ra->harq_pid = frame_subframe2_dl_harq_pid(cc->tdd_Config,frameP ,subframeP);
UE_list->UE_sched_ctrl[UE_id].round[CC_idP][ra->harq_pid] = 0;
if ((ra->msg4_TBsize - rrc_sdu_length - msg4_header) <= 2) {
@@ -1194,7 +1202,9 @@ generate_Msg4(module_id_t module_idP, int CC_idP, frame_t frameP,
UE_id),
rrc_sdu_length);
}
if(RC.mac[module_idP]->scheduler_mode == SCHED_MODE_FAIR_RR){
set_dl_ue_select_msg4(CC_idP, 4, UE_id, ra->rnti);
}
} // CCE Allocation feasible
} // msg4 frame/subframe
} // else rach_resource_type
@@ -1339,6 +1349,9 @@ check_Msg4_retransmission(module_id_t module_idP, int CC_idP,
(cc->p_eNB == 1) ? 1 : 2, // transmission mode
1, // num_bf_prb_per_subband
1); // num_bf_vector
if(RC.mac[module_idP]->scheduler_mode == SCHED_MODE_FAIR_RR){
set_dl_ue_select_msg4(CC_idP, 4, UE_id, ra->rnti);
}
} else
LOG_D(MAC,
"msg4 retransmission for rnti %x (round %d) fsf %d/%d CCE allocation failed!\n",
@@ -1355,10 +1368,7 @@ check_Msg4_retransmission(module_id_t module_idP, int CC_idP,
dci_dl_pdu_rel8.cce_idx);
// prepare frame for retransmission
if (ra->Msg4_subframe > 1)
ra->Msg4_frame++;
ra->Msg4_frame &= 1023;
ra->Msg4_subframe = (ra->Msg4_subframe + 8) % 10;
get_retransmission_timing(mac->common_channels[CC_idP].tdd_Config,&ra->Msg4_frame,&ra->Msg4_subframe);
LOG_W(MAC,
"[eNB %d][RAPROC] CC_id %d Frame %d, subframeP %d: Msg4 not acknowledged, adding ue specific dci (rnti %x) for RA (Msg4 Retransmission round %d in %d.%d)\n",
@@ -1376,6 +1386,7 @@ check_Msg4_retransmission(module_id_t module_idP, int CC_idP,
UE_id = find_UE_id(module_idP, ra->rnti);
DevAssert(UE_id != -1);
mac->UE_list.UE_template[UE_PCCID(module_idP, UE_id)][UE_id].configured = TRUE;
cancel_ra_proc(module_idP, CC_idP, frameP, ra->rnti);
}
}
@@ -1406,7 +1417,7 @@ schedule_RA(module_id_t module_idP, frame_t frameP, sub_frame_t subframeP)
if (ra->state == MSG2)
generate_Msg2(module_idP, CC_id, frameP, subframeP, ra);
else if (ra->state == MSG4)
else if (ra->state == MSG4 && ra->Msg4_frame == frameP && ra->Msg4_subframe == subframeP )
generate_Msg4(module_idP, CC_id, frameP, subframeP, ra);
else if (ra->state == WAITMSG4ACK)
check_Msg4_retransmission(module_idP, CC_id, frameP,
@@ -1442,6 +1453,8 @@ initiate_ra_proc(module_id_t module_idP,
struct PRACH_ConfigSIB_v1310 *ext4_prach = NULL;
PRACH_ParametersListCE_r13_t *prach_ParametersListCE_r13 = NULL;
static uint8_t failure_cnt = 0;
if (cc->radioResourceConfigCommon_BR
&& cc->radioResourceConfigCommon_BR->ext4) {
@@ -1494,11 +1507,22 @@ initiate_ra_proc(module_id_t module_idP,
ra[i].msg4_mpdcch_repetition_cnt = 0;
#endif
// DJP - this is because VNF is 2 subframes ahead of PNF and TX needs 4 subframes
if (nfapi_mode)
offset = 7;
else
offset = 5;
//TODO Fill in other TDD config. What about nfapi_mode?
if(cc->tdd_Config!=NULL){
switch(cc->tdd_Config->subframeAssignment){
default: printf("%s:%d: TODO\n", __FILE__, __LINE__); abort();
case 1 :
offset = 6;
break;
}
}else{//FDD
// DJP - this is because VNF is 2 subframes ahead of PNF and TX needs 4 subframes
if (nfapi_mode)
offset = 7;
else
offset = 5;
}
add_subframe(&msg2_frame, &msg2_subframe, offset);
@@ -1545,6 +1569,7 @@ initiate_ra_proc(module_id_t module_idP,
}
ra[i].RA_rnti = ra_rnti;
ra[i].preamble_index = preamble_index;
failure_cnt = 0;
LOG_D(MAC,
"[eNB %d][RAPROC] CC_id %d Frame %d Activating RAR generation in Frame %d, subframe %d for process %d, rnti %x, state %d\n",
module_idP, CC_id, frameP, ra[i].Msg2_frame,
@@ -1557,6 +1582,13 @@ initiate_ra_proc(module_id_t module_idP,
LOG_E(MAC,
"[eNB %d][RAPROC] FAILURE: CC_id %d Frame %d Initiating RA procedure for preamble index %d\n",
module_idP, CC_id, frameP, preamble_index);
failure_cnt++;
if(failure_cnt > 20) {
LOG_E(MAC,"[eNB %d][RAPROC] CC_id %d Frame %d Clear Random access information\n", module_idP, CC_id, frameP);
clear_ra_proc(module_idP, CC_id, frameP);
}
}
void
@@ -1579,6 +1611,22 @@ cancel_ra_proc(module_id_t module_idP, int CC_id, frame_t frameP,
ra[i].RRC_timer = 20;
ra[i].rnti = 0;
ra[i].msg3_round = 0;
LOG_I(MAC,"[eNB %d][RAPROC] CC_id %d Frame %d Canceled RA procedure for UE rnti %x\n", module_idP, CC_id, frameP, rnti);
}
}
}
void clear_ra_proc(module_id_t module_idP, int CC_id, frame_t frameP)
{
unsigned char i;
RA_t *ra = (RA_t *) & RC.mac[module_idP]->common_channels[CC_id].ra[0];
for (i = 0; i < NB_RA_PROC_MAX; i++) {
LOG_D(MAC,"[eNB %d][RAPROC] CC_id %d Frame %d Clear Random access information rnti %x\n", module_idP, CC_id, frameP, ra[i].rnti);
ra[i].state = IDLE;
ra[i].timing_offset = 0;
ra[i].RRC_timer = 20;
ra[i].rnti = 0;
ra[i].msg3_round = 0;
}
}
+86 -32
View File
@@ -368,21 +368,23 @@ set_ul_DAI(int module_idP, int UE_idP, int CC_idP, int frameP,
case 1:
switch (subframeP) {
case 0:
case 1:
UE_list->UE_template[CC_idP][UE_idP].DAI_ul[7] = DAI;
break;
case 4:
UE_list->UE_template[CC_idP][UE_idP].DAI_ul[8] = DAI;
break;
UE_list->UE_template[CC_idP][UE_idP].DAI_ul[8] = DAI;
break;
case 5:
case 6:
UE_list->UE_template[CC_idP][UE_idP].DAI_ul[2] = DAI;
break;
UE_list->UE_template[CC_idP][UE_idP].DAI_ul[2] = DAI;
break;
case 9:
UE_list->UE_template[CC_idP][UE_idP].DAI_ul[3] = DAI;
break;
UE_list->UE_template[CC_idP][UE_idP].DAI_ul[3] = DAI;
break;
}
case 2:
@@ -632,8 +634,7 @@ schedule_ue_spec(module_id_t module_idP,slice_id_t slice_idP,
break;
case 6:
case 7:
if ((tdd_sfa != 1) && (tdd_sfa != 2) && (tdd_sfa != 4)
&& (tdd_sfa != 5))
if ((tdd_sfa != 3) && (tdd_sfa != 4) && (tdd_sfa != 5))
return;
break;
case 8:
@@ -642,8 +643,7 @@ schedule_ue_spec(module_id_t module_idP,slice_id_t slice_idP,
return;
break;
case 9:
if ((tdd_sfa != 1) && (tdd_sfa != 3) && (tdd_sfa != 4)
&& (tdd_sfa != 6))
if (tdd_sfa == 0)
return;
break;
@@ -772,8 +772,7 @@ schedule_ue_spec(module_id_t module_idP,slice_id_t slice_idP,
nb_available_rb = ue_sched_ctl->pre_nb_available_rbs[CC_id];
if (cc->tdd_Config) harq_pid = ((frameP * 10) + subframeP) % 10;
else harq_pid = ((frameP * 10) + subframeP) & 7;
harq_pid = frame_subframe2_dl_harq_pid(cc->tdd_Config,frameP ,subframeP);
round = ue_sched_ctl->round[CC_id][harq_pid];
@@ -832,7 +831,7 @@ schedule_ue_spec(module_id_t module_idP,slice_id_t slice_idP,
if (cc[CC_id].tdd_Config != NULL) {
UE_list->UE_template[CC_id][UE_id].DAI++;
update_ul_dci(module_idP, CC_id, rnti,
UE_list->UE_template[CC_id][UE_id].DAI);
UE_list->UE_template[CC_id][UE_id].DAI, subframeP);
LOG_D(MAC,
"DAI update: CC_id %d subframeP %d: UE %d, DAI %d\n",
CC_id, subframeP, UE_id,
@@ -1005,7 +1004,7 @@ schedule_ue_spec(module_id_t module_idP,slice_id_t slice_idP,
if (TBS - ta_len - header_length_total - sdu_length_total - 3 > 0) {
rlc_status = mac_rlc_status_ind(module_idP, rnti, module_idP, frameP, subframeP, ENB_FLAG_YES, MBMS_FLAG_NO, DCCH,
TBS - ta_len - header_length_total - sdu_length_total - 3
#ifdef Rel14
#if (RRC_VERSION >= MAKE_VERSION(14, 0, 0))
,0, 0
#endif
);
@@ -1020,11 +1019,62 @@ schedule_ue_spec(module_id_t module_idP,slice_id_t slice_idP,
sdu_lengths[0] = mac_rlc_data_req(module_idP, rnti, module_idP, frameP, ENB_FLAG_YES, MBMS_FLAG_NO, DCCH,
TBS, //not used
(char *)&dlsch_buffer[0]
#ifdef Rel14
#if (RRC_VERSION >= MAKE_VERSION(14, 0, 0))
,0, 0
#endif
);
pthread_mutex_lock(&rrc_release_freelist);
if((rrc_release_info.num_UEs > 0) && (rlc_am_mui.rrc_mui_num > 0)){
uint16_t release_total = 0;
for(uint16_t release_num = 0;release_num < NUMBER_OF_UE_MAX;release_num++){
if(rrc_release_info.RRC_release_ctrl[release_num].flag > 0){
release_total++;
}else{
continue;
}
if(rrc_release_info.RRC_release_ctrl[release_num].flag == 1){
if(rrc_release_info.RRC_release_ctrl[release_num].rnti == rnti){
for(uint16_t mui_num = 0;mui_num < rlc_am_mui.rrc_mui_num;mui_num++){
if(rrc_release_info.RRC_release_ctrl[release_num].rrc_eNB_mui == rlc_am_mui.rrc_mui[mui_num]){
rrc_release_info.RRC_release_ctrl[release_num].flag = 3;
LOG_D(MAC,"DLSCH Release send:index %d rnti %x mui %d mui_num %d flag 1->3\n",release_num,rnti,rlc_am_mui.rrc_mui[mui_num],mui_num);
break;
}
}
}
}
if(rrc_release_info.RRC_release_ctrl[release_num].flag == 2){
if(rrc_release_info.RRC_release_ctrl[release_num].rnti == rnti){
for(uint16_t mui_num = 0;mui_num < rlc_am_mui.rrc_mui_num;mui_num++){
if(rrc_release_info.RRC_release_ctrl[release_num].rrc_eNB_mui == rlc_am_mui.rrc_mui[mui_num]){
rrc_release_info.RRC_release_ctrl[release_num].flag = 4;
LOG_D(MAC,"DLSCH Release send:index %d rnti %x mui %d mui_num %d flag 2->4\n",release_num,rnti,rlc_am_mui.rrc_mui[mui_num],mui_num);
break;
}
}
}
}
if(release_total >= rrc_release_info.num_UEs)
break;
}
}
pthread_mutex_unlock(&rrc_release_freelist);
RA_t *ra = &eNB->common_channels[CC_id].ra[0];
for (uint8_t ra_ii = 0; ra_ii < NB_RA_PROC_MAX; ra_ii++) {
if((ra[ra_ii].rnti == rnti) && (ra[ra_ii].state == MSGCRNTI)){
for(uint16_t mui_num = 0;mui_num < rlc_am_mui.rrc_mui_num;mui_num++){
if(ra[ra_ii].crnti_rrc_mui == rlc_am_mui.rrc_mui[mui_num]){
ra[ra_ii].crnti_harq_pid = harq_pid;
ra[ra_ii].state = MSGCRNTI_ACK;
break;
}
}
}
}
T(T_ENB_MAC_UE_DL_SDU, T_INT(module_idP),
T_INT(CC_id), T_INT(rnti), T_INT(frameP),
T_INT(subframeP), T_INT(harq_pid), T_INT(DCCH),
@@ -1063,7 +1113,7 @@ schedule_ue_spec(module_id_t module_idP,slice_id_t slice_idP,
if (TBS - ta_len - header_length_total - sdu_length_total - 3 > 0) {
rlc_status = mac_rlc_status_ind(module_idP, rnti, module_idP, frameP, subframeP, ENB_FLAG_YES, MBMS_FLAG_NO, DCCH + 1,
TBS - ta_len - header_length_total - sdu_length_total - 3
#ifdef Rel14
#if (RRC_VERSION >= MAKE_VERSION(14, 0, 0))
,0, 0
#endif
);
@@ -1079,7 +1129,7 @@ schedule_ue_spec(module_id_t module_idP,slice_id_t slice_idP,
sdu_lengths[num_sdus] += mac_rlc_data_req(module_idP, rnti, module_idP, frameP, ENB_FLAG_YES, MBMS_FLAG_NO, DCCH + 1,
TBS, //not used
(char *)&dlsch_buffer[sdu_length_total]
#ifdef Rel14
#if (RRC_VERSION >= MAKE_VERSION(14, 0, 0))
,0, 0
#endif
);
@@ -1134,7 +1184,7 @@ schedule_ue_spec(module_id_t module_idP,slice_id_t slice_idP,
MBMS_FLAG_NO,
lcid,
TBS - ta_len - header_length_total - sdu_length_total - 3
#ifdef Rel14
#if (RRC_VERSION >= MAKE_VERSION(14, 0, 0))
,0, 0
#endif
);
@@ -1152,7 +1202,7 @@ schedule_ue_spec(module_id_t module_idP,slice_id_t slice_idP,
sdu_lengths[num_sdus] = mac_rlc_data_req(module_idP, rnti, module_idP, frameP, ENB_FLAG_YES, MBMS_FLAG_NO, lcid,
TBS, //not used
(char *)&dlsch_buffer[sdu_length_total]
#ifdef Rel14
#if (RRC_VERSION >= MAKE_VERSION(14, 0, 0))
,0, 0
#endif
);
@@ -1368,18 +1418,18 @@ schedule_ue_spec(module_id_t module_idP,slice_id_t slice_idP,
if (cc[CC_id].tdd_Config != NULL) { // TDD
UE_list->UE_template[CC_id][UE_id].DAI++;
update_ul_dci(module_idP, CC_id, rnti,
UE_list->UE_template[CC_id][UE_id].
DAI);
UE_list->UE_template[CC_id][UE_id].DAI,
subframeP);
}
// do PUCCH power control
// this is the normalized RX power
eNB_UE_stats = &UE_list->eNB_UE_stats[CC_id][UE_id];
/* TODO: fix how we deal with power, unit is not dBm, it's special from nfapi */
normalized_rx_power = ue_sched_ctl->pucch1_snr[CC_id];
target_rx_power = 208;
/* unit is not dBm, it's special from nfapi */
// converting to dBm: ToDo: Noise power hard coded to 30
normalized_rx_power = (5*ue_sched_ctl->pucch1_snr[CC_id]-640)/10+30;
target_rx_power= eNB->puCch10xSnr/10 + 30;
// this assumes accumulated tpc
// make sure that we are only sending a tpc update once a frame, otherwise the control loop will freak out
int32_t framex10psubframe = UE_list->UE_template[CC_id][UE_id].pucch_tpc_tx_frame * 10 + UE_list->UE_template[CC_id][UE_id].pucch_tpc_tx_subframe;
@@ -1583,8 +1633,7 @@ fill_DLSCH_dci(module_id_t module_idP,
// clear scheduling flag
eNB_dlsch_info[module_idP][CC_id][UE_id].status = S_DL_WAITING;
rnti = UE_RNTI(module_idP, UE_id);
if (cc->tdd_Config) harq_pid = ((frameP * 10) + subframeP) % 10;
else harq_pid = ((frameP * 10) + subframeP) & 7;
harq_pid = frame_subframe2_dl_harq_pid(cc->tdd_Config,frameP ,subframeP);
nb_rb = UE_list->UE_template[CC_id][UE_id].nb_rb[harq_pid];
/// Synchronizing rballoc with rballoc_sub
@@ -1663,12 +1712,12 @@ unsigned char *get_dlsch_sdu(module_id_t module_idP,
//------------------------------------------------------------------------------
void
update_ul_dci(module_id_t module_idP,
uint8_t CC_idP, rnti_t rntiP, uint8_t daiP)
uint8_t CC_idP, rnti_t rntiP, uint8_t daiP, sub_frame_t subframe)
//------------------------------------------------------------------------------
{
nfapi_hi_dci0_request_t *HI_DCI0_req =
&RC.mac[module_idP]->HI_DCI0_req[CC_idP];
&RC.mac[module_idP]->HI_DCI0_req[CC_idP][subframe];
nfapi_hi_dci0_request_pdu_t *hi_dci0_pdu =
&HI_DCI0_req->hi_dci0_request_body.hi_dci0_pdu_list[0];
COMMON_channels_t *cc = &RC.mac[module_idP]->common_channels[CC_idP];
@@ -1677,7 +1726,7 @@ update_ul_dci(module_id_t module_idP,
if (cc->tdd_Config != NULL) { // TDD
for (i = 0;
i <HI_DCI0_req->hi_dci0_request_body.number_of_dci + HI_DCI0_req->hi_dci0_request_body.number_of_dci;
i <HI_DCI0_req->hi_dci0_request_body.number_of_dci + HI_DCI0_req->hi_dci0_request_body.number_of_hi;
i++) {
if ((hi_dci0_pdu[i].pdu_type == NFAPI_HI_DCI0_DCI_PDU_TYPE) &&
@@ -1816,7 +1865,7 @@ void schedule_PCH(module_id_t module_idP,frame_t frameP,sub_frame_t subframeP)
LOG_D(MAC,"[eNB %d] Frame %d subframe %d: PCCH->PCH CC_id %d UE_id %d, Received %d bytes \n", module_idP, frameP, subframeP, CC_id,i, pcch_sdu_length);
#ifdef FORMAT1C
//NO SIB
if ((subframeP == 1 || subframeP == 2 || subframeP == 4 || subframeP == 6 || subframeP == 9) ||
if ((subframeP == 0 || subframeP == 1 || subframeP == 2 || subframeP == 4 || subframeP == 6 || subframeP == 9) ||
(subframeP == 5 && ((frameP % 2) != 0 && (frameP % 8) != 1))) {
switch (n_rb_dl) {
#if 0
@@ -1935,7 +1984,7 @@ void schedule_PCH(module_id_t module_idP,frame_t frameP,sub_frame_t subframeP)
}
#else
//NO SIB
if ((subframeP == 1 || subframeP == 2 || subframeP == 4 || subframeP == 6 || subframeP == 9) ||
if ((subframeP == 0 || subframeP == 1 || subframeP == 2 || subframeP == 4 || subframeP == 6 || subframeP == 9) ||
(subframeP == 5 && ((frameP % 2) != 0 && (frameP % 8) != 1))) {
switch (n_rb_dl) {
case 25:
@@ -2027,6 +2076,10 @@ void schedule_PCH(module_id_t module_idP,frame_t frameP,sub_frame_t subframeP)
LOG_D(MAC,"Frame %d: Subframe %d : Adding common DCI for P_RNTI\n", frameP,subframeP);
dl_req->number_dci++;
dl_req->number_pdu++;
dl_req->tl.tag = NFAPI_DL_CONFIG_REQUEST_BODY_TAG;
eNB->DL_req[CC_id].sfn_sf = frameP<<4 | subframeP;
eNB->DL_req[CC_id].header.message_id = NFAPI_DL_CONFIG_REQUEST;
dl_config_pdu = &dl_req->dl_config_pdu_list[dl_req->number_pdu];
memset((void*)dl_config_pdu,0,sizeof(nfapi_dl_config_request_pdu_t));
dl_config_pdu->pdu_type = NFAPI_DL_CONFIG_DLSCH_PDU_TYPE;
@@ -2067,6 +2120,7 @@ void schedule_PCH(module_id_t module_idP,frame_t frameP,sub_frame_t subframeP)
TX_req->num_segments = 1;
TX_req->segments[0].segment_length = pcch_sdu_length;
TX_req->segments[0].segment_data = cc[CC_id].PCCH_pdu.payload;
eNB->TX_req[CC_id].tx_request_body.tl.tag = NFAPI_TX_REQUEST_BODY_TAG;
eNB->TX_req[CC_id].tx_request_body.number_of_pdus++;
} else {
LOG_E(MAC,"[eNB %d] CCid %d Frame %d, subframe %d : Cannot add DCI 1A/1C for Paging\n",module_idP, CC_id, frameP, subframeP);
File diff suppressed because it is too large Load Diff
+131
View File
@@ -0,0 +1,131 @@
/*
* Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership.
* The OpenAirInterface Software Alliance licenses this file to You under
* the OAI Public License, Version 1.1 (the "License"); you may not use this file
* except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.openairinterface.org/?page_id=698
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*-------------------------------------------------------------------------------
* For more information about the OpenAirInterface (OAI) Software Alliance:
* contact@openairinterface.org
*/
/*! \file eNB_scheduler_fairRR.h
* \brief eNB scheduler fair round robin header
* \author Masayuki Harada
* \date 2018
* \email masayuki.harada@jp.fujitsu.com
* \version 1.0
* @ingroup _mac
*/
#ifndef __LAYER2_MAC_ENB_SCHEDULER_FAIRRR_H__
#define __LAYER2_MAC_ENB_SCHEDULER_FAIRRR_H__
/* define */
enum SCH_UE_PRIORITY {
SCH_PRIORITY_NONE,
SCH_DL_SI,
SCH_DL_PAGING,
SCH_DL_MSG2,
SCH_DL_MSG4,
SCH_UL_PRACH,
SCH_UL_MSG3,
SCH_DL_RETRANS,
SCH_UL_RETRANS,
SCH_DL_FIRST,
SCH_UL_FIRST,
SCH_UL_INACTIVE
};
typedef struct {
int UE_id;
enum SCH_UE_PRIORITY ue_priority;
rnti_t rnti;
uint16_t nb_rb;
} DLSCH_UE_INFO;
typedef struct {
uint16_t ue_num;
DLSCH_UE_INFO list[20];
} DLSCH_UE_SELECT;
typedef struct {
int UE_id;
enum SCH_UE_PRIORITY ue_priority;
uint8_t start_rb;
uint8_t nb_rb;
uint16_t ul_total_buffer;
} ULSCH_UE_INFO;
typedef struct {
uint8_t ue_num;
ULSCH_UE_INFO list[20];
} ULSCH_UE_SELECT;
/* proto */
void set_dl_ue_select_msg2(int CC_idP, uint16_t nb_rb, int UE_id, rnti_t rnti);
void set_dl_ue_select_msg4(int CC_idP, uint16_t nb_rb, int UE_id, rnti_t rnti);
void dlsch_scheduler_pre_ue_select_fairRR(
module_id_t module_idP,
frame_t frameP,
sub_frame_t subframeP,
int* mbsfn_flag,
uint16_t nb_rbs_required[MAX_NUM_CCs][NUMBER_OF_UE_MAX],
DLSCH_UE_SELECT dlsch_ue_select[MAX_NUM_CCs]);
void dlsch_scheduler_pre_processor_fairRR (module_id_t Mod_id,
frame_t frameP,
sub_frame_t subframeP,
int N_RBG[MAX_NUM_CCs],
int *mbsfn_flag);
void fill_DLSCH_dci_fairRR(
module_id_t module_idP,
frame_t frameP,
sub_frame_t subframeP,
int* mbsfn_flagP);
void schedule_ue_spec_fairRR(module_id_t module_idP,
frame_t frameP, sub_frame_t subframeP, int *mbsfn_flag);
void ulsch_scheduler_pre_ue_select_fairRR(
module_id_t module_idP,
frame_t frameP,
sub_frame_t subframeP,
sub_frame_t sched_subframeP,
ULSCH_UE_SELECT ulsch_ue_select[MAX_NUM_CCs]);
void ulsch_scheduler_pre_processor_fairRR(module_id_t module_idP,
frame_t frameP,
sub_frame_t subframeP,
sub_frame_t sched_subframeP,
ULSCH_UE_SELECT ulsch_ue_select[MAX_NUM_CCs]);
void schedule_ulsch_fairRR(module_id_t module_idP, frame_t frameP,
sub_frame_t subframeP);
void schedule_ulsch_rnti_fairRR(module_id_t module_idP,
frame_t frameP,
sub_frame_t subframeP,
unsigned char sched_subframeP,
ULSCH_UE_SELECT ulsch_ue_select[MAX_NUM_CCs]);
/* extern */
extern DLSCH_UE_SELECT dlsch_ue_select[MAX_NUM_CCs];
extern int last_dlsch_ue_id[MAX_NUM_CCs];
extern int last_ulsch_ue_id[MAX_NUM_CCs];
#endif
+2 -2
View File
@@ -633,7 +633,7 @@ schedule_MBMS(module_id_t module_idP, uint8_t CC_id, frame_t frameP,
MTCH,
TBS - header_len_mcch - header_len_msi -
sdu_length_total - header_len_mtch
#ifdef Rel14
#if (RRC_VERSION >= MAKE_VERSION(14, 0, 0))
,0, 0
#endif
);
@@ -652,7 +652,7 @@ schedule_MBMS(module_id_t module_idP, uint8_t CC_id, frame_t frameP,
sdu_lengths[num_sdus] = mac_rlc_data_req(module_idP, 0, module_idP, frameP, ENB_FLAG_YES, MBMS_FLAG_YES, MTCH, 0, //not used
(char *)
&mch_buffer[sdu_length_total]
#ifdef Rel14
#if (RRC_VERSION >= MAKE_VERSION(14, 0, 0))
,0,
0
#endif
+5 -5
View File
@@ -213,7 +213,7 @@ void schedule_ulsch_phy_test(module_id_t module_idP,frame_t frameP,sub_frame_t s
if (sched_subframe<subframeP) sched_frame++;
nfapi_hi_dci0_request_body_t *hi_dci0_req = &eNB->HI_DCI0_req[CC_id].hi_dci0_request_body;
nfapi_hi_dci0_request_body_t *hi_dci0_req = &eNB->HI_DCI0_req[CC_id][subframeP].hi_dci0_request_body;
nfapi_hi_dci0_request_pdu_t *hi_dci0_pdu;
//nfapi_ul_config_request_pdu_t *ul_config_pdu = &ul_req->ul_config_pdu_list[0];;
@@ -221,7 +221,7 @@ void schedule_ulsch_phy_test(module_id_t module_idP,frame_t frameP,sub_frame_t s
eNB->UL_req[CC_id].sfn_sf = (sched_frame<<4) + sched_subframe;
eNB->HI_DCI0_req[CC_id].sfn_sf = (frameP<<4)+subframeP;
eNB->HI_DCI0_req[CC_id][subframeP].sfn_sf = (frameP<<4)+subframeP;
for (CC_id=0; CC_id<MAX_NUM_CCs; CC_id++) {
//rnti = UE_RNTI(module_idP,UE_id);
@@ -281,7 +281,7 @@ void schedule_ulsch_phy_test(module_id_t module_idP,frame_t frameP,sub_frame_t s
// save it for a potential retransmission
UE_template->cshift[harq_pid] = cshift;
hi_dci0_pdu = &hi_dci0_req->hi_dci0_pdu_list[eNB->HI_DCI0_req[CC_id].hi_dci0_request_body.number_of_dci+eNB->HI_DCI0_req[CC_id].hi_dci0_request_body.number_of_hi];
hi_dci0_pdu = &hi_dci0_req->hi_dci0_pdu_list[eNB->HI_DCI0_req[CC_id][subframeP].hi_dci0_request_body.number_of_dci+eNB->HI_DCI0_req[CC_id][subframeP].hi_dci0_request_body.number_of_hi];
memset((void*)hi_dci0_pdu,0,sizeof(nfapi_hi_dci0_request_pdu_t));
hi_dci0_pdu->pdu_type = NFAPI_HI_DCI0_DCI_PDU_TYPE;
hi_dci0_pdu->pdu_size = 2+sizeof(nfapi_hi_dci0_dci_pdu);
@@ -300,7 +300,7 @@ void schedule_ulsch_phy_test(module_id_t module_idP,frame_t frameP,sub_frame_t s
hi_dci0_pdu->dci_pdu.dci_pdu_rel8.dl_assignment_index = UE_template->DAI_ul[sched_subframe];
eNB->HI_DCI0_req[CC_id].hi_dci0_request_body.number_of_dci++;
eNB->HI_DCI0_req[CC_id][subframeP].hi_dci0_request_body.number_of_dci++;
// Add UL_config PDUs
@@ -325,7 +325,7 @@ void schedule_ulsch_phy_test(module_id_t module_idP,frame_t frameP,sub_frame_t s
0, // n_srs
get_TBS_UL(mcs,nb_rb)
);
#ifdef Rel14
#if (RRC_VERSION >= MAKE_VERSION(14, 0, 0))
if (UE_template->rach_resource_type>0) { // This is a BL/CE UE allocation
fill_nfapi_ulsch_config_request_emtc(&ul_req->ul_config_pdu_list[ul_req->number_of_pdus],
UE_template->rach_resource_type>2 ? 2 : 1,
+346 -84
View File
@@ -55,6 +55,7 @@
#define ENABLE_MAC_PAYLOAD_DEBUG
#define DEBUG_eNB_SCHEDULER 1
extern uint16_t frame_cnt;
#include "common/ran_context.h"
@@ -555,11 +556,61 @@ int is_UL_sf(COMMON_channels_t * ccP, sub_frame_t subframeP)
}
}
int is_S_sf(COMMON_channels_t * ccP, sub_frame_t subframeP)
{
// if FDD return dummy value
if (ccP->tdd_Config == NULL)
return (0);
switch (subframeP) {
case 1:
return (1);
break;
case 6:
if(ccP->tdd_Config->subframeAssignment == 0 || ccP->tdd_Config->subframeAssignment == 1
|| ccP->tdd_Config->subframeAssignment == 2 || ccP->tdd_Config->subframeAssignment == 6)
return (1);
break;
default:
return (0);
break;
}
return 0;
}
uint8_t ul_subframe2_k_phich(COMMON_channels_t * cc, sub_frame_t ul_subframe){
if(cc->tdd_Config){//TODO fill other tdd config
switch(cc->tdd_Config->subframeAssignment){
case 0:
break;
case 1:
if(ul_subframe == 2 || ul_subframe == 7)
return 4;
else if(ul_subframe == 3 || ul_subframe == 8)
return 6;
else return 255;
break;
case 2:
break;
case 3:
break;
case 4:
break;
case 5:
break;
}
}
return 4; //idk sf_ahead?
}
uint16_t get_pucch1_absSF(COMMON_channels_t * cc, uint16_t dlsch_absSF)
{
uint16_t sf, f, nextf;
if (cc->tdd_Config == NULL) { //FDD n+4
if (cc->tdd_Config == NULL) { //FDD n+4
return ((dlsch_absSF + 4) % 10240);
} else {
sf = dlsch_absSF % 10;
@@ -568,72 +619,93 @@ uint16_t get_pucch1_absSF(COMMON_channels_t * cc, uint16_t dlsch_absSF)
switch (cc->tdd_Config->subframeAssignment) {
case 0:
AssertFatal(1 == 0, "SFA 0 to be filled in now, :-)\n");
if ((sf == 0) || (sf == 5))
return ((10 * f) + sf + 4)% 10240; // ACK/NAK in SF 4,9 same frame
else if (sf == 6)
return ((10 * nextf) + 2)% 10240; // ACK/NAK in SF 2 next frame
else if (sf == 1)
return ((10 * f) + 7)% 10240; // ACK/NAK in SF 7 same frame
else
AssertFatal(1 == 0,
"Impossible dlsch subframe %d for TDD configuration 0\n",
sf);
break;
case 1:
if ((sf == 5) || (sf == 6))
return ((10 * nextf) + 2); // ACK/NAK in SF 2 next frame
return ((10 * nextf) + 2)% 10240; // ACK/NAK in SF 2 next frame
else if (sf == 9)
return ((10 * nextf) + 3); // ACK/NAK in SF 3 next frame
return ((10 * nextf) + 3)% 10240; // ACK/NAK in SF 3 next frame
else if ((sf == 0) || (sf == 1))
return ((10 * f) + 2); // ACK/NAK in SF 7 same frame
return ((10 * f) + 7)% 10240; // ACK/NAK in SF 7 same frame
else if (sf == 4)
return ((10 * f) + 8)% 10240; // ACK/NAK in SF 8 same frame
else
AssertFatal(1 == 0,
"Impossible dlsch subframe %d for TDD configuration 3\n",
sf);
AssertFatal(1 == 0,
"Impossible dlsch subframe %d for TDD configuration 1\n",
sf);
break;
case 2:
if ((sf == 4) || (sf == 5) || (sf == 6) || (sf == 8))
return ((10 * nextf) + 2); // ACK/NAK in SF 2 next frame
return ((10 * nextf) + 2)% 10240; // ACK/NAK in SF 2 next frame
else if (sf == 9)
return ((10 * nextf) + 7); // ACK/NAK in SF 7 next frame
return ((10 * nextf) + 7)% 10240; // ACK/NAK in SF 7 next frame
else if ((sf == 0) || (sf == 1) || (sf == 3))
return ((10 * f) + 7); // ACK/NAK in SF 7 same frame
return ((10 * f) + 7)% 10240; // ACK/NAK in SF 7 same frame
else
AssertFatal(1 == 0,
"Impossible dlsch subframe %d for TDD configuration 3\n",
sf);
AssertFatal(1 == 0,
"Impossible dlsch subframe %d for TDD configuration 2\n",
sf);
break;
case 3:
if ((sf == 5) || (sf == 6) || (sf == 7) || (sf == 8)
|| (sf == 9))
return ((10 * nextf) + (sf >> 1)); // ACK/NAK in 2,3,4 resp. next frame
|| (sf == 9))
return ((10 * nextf) + ((sf-1) >> 1))% 10240; // ACK/NAK in 2,3,4 resp. next frame
else if (sf == 1)
return ((10 * nextf) + 2); // ACK/NAK in 2 next frame
return ((10 * nextf) + 2)% 10240; // ACK/NAK in 2 next frame
else if (sf == 0)
return ((10 * f) + 4); // ACK/NAK in 4 same frame
return ((10 * f) + 4)% 10240; // ACK/NAK in 4 same frame
else
AssertFatal(1 == 0,
"Impossible dlsch subframe %d for TDD configuration 3\n",
sf);
AssertFatal(1 == 0,
"Impossible dlsch subframe %d for TDD configuration 3\n",
sf);
break;
case 4:
if ((sf == 6) || (sf == 7) || (sf == 8) || (sf == 9))
return (((10 * nextf) + 3) % 10240); // ACK/NAK in SF 3 next frame
return (((10 * nextf) + 3) % 10240); // ACK/NAK in SF 3 next frame
else if ((sf == 0) || (sf == 1) || (sf == 4) || (sf == 5))
return (((10 * nextf) + 2) % 10240); // ACK/NAK in SF 2 next frame
return (((10 * nextf) + 2) % 10240); // ACK/NAK in SF 2 next frame
else
AssertFatal(1 == 0,
"Impossible dlsch subframe %d for TDD configuration 4\n",
sf);
AssertFatal(1 == 0,
"Impossible dlsch subframe %d for TDD configuration 4\n",
sf);
break;
case 5:
if ((sf == 0) || (sf == 1) || (sf == 3) || (sf == 4)
|| (sf == 5) || (sf == 6) || (sf == 7) || (sf == 8))
return (((10 * nextf) + 2) % 10240); // ACK/NAK in SF 3 next frame
|| (sf == 5) || (sf == 6) || (sf == 7) || (sf == 8))
return (((10 * nextf) + 2) % 10240); // ACK/NAK in SF 3 next frame
else if (sf == 9)
return (((10 * (1 + nextf)) + 2) % 10240); // ACK/NAK in SF 2 next frame
return (((10 * (1 + nextf)) + 2) % 10240); // ACK/NAK in SF 2 next frame
else
AssertFatal(1 == 0,
"Impossible dlsch subframe %d for TDD configuration 5\n",
sf);
AssertFatal(1 == 0,
"Impossible dlsch subframe %d for TDD configuration 5\n",
sf);
break;
case 6:
AssertFatal(1 == 0, "SFA 6 To be filled in now, :-)\n");
if ((sf == 5) || (sf == 6))
return ((10 * f) + sf + 7)% 10240; // ACK/NAK in SF 2,3 next frame
else if (sf == 9)
return ((10 * nextf) + 4)% 10240; // ACK/NAK in SF 4 next frame
else if ((sf == 1) || (sf == 0))
return ((10 * f) + sf + 7)% 10240; // ACK/NAK in SF 7 same frame
else
AssertFatal(1 == 0,
"Impossible dlsch subframe %d for TDD configuration 6\n",
sf);
break;
default:
AssertFatal(1 == 0, "Illegal TDD subframe Assigment %d\n",
(int) cc->tdd_Config->subframeAssignment);
(int) cc->tdd_Config->subframeAssignment);
break;
}
}
@@ -1156,7 +1228,7 @@ program_dlsch_acknak(module_id_t module_idP, int CC_idP, int UE_idP,
}
}
if (ulsch_harq_information) fill_nfapi_ulsch_harq_information(module_idP, CC_idP, rnti, ulsch_harq_information);
if (ulsch_harq_information) fill_nfapi_ulsch_harq_information(module_idP, CC_idP, rnti, ulsch_harq_information, subframeP);
if (harq_information) fill_nfapi_harq_information(module_idP, CC_idP,
rnti,
@@ -1164,9 +1236,9 @@ program_dlsch_acknak(module_id_t module_idP, int CC_idP, int UE_idP,
harq_information, cce_idx);
}
uint8_t get_V_UL_DAI(module_id_t module_idP, int CC_idP, uint16_t rntiP)
uint8_t get_V_UL_DAI(module_id_t module_idP, int CC_idP, uint16_t rntiP,sub_frame_t subframeP)
{
nfapi_hi_dci0_request_body_t *HI_DCI0_req = &RC.mac[module_idP]->HI_DCI0_req[CC_idP].hi_dci0_request_body;
nfapi_hi_dci0_request_body_t *HI_DCI0_req = &RC.mac[module_idP]->HI_DCI0_req[CC_idP][subframeP].hi_dci0_request_body;
nfapi_hi_dci0_request_pdu_t *hi_dci0_pdu = &HI_DCI0_req->hi_dci0_pdu_list[0];
for (int i = 0; i < HI_DCI0_req->number_of_dci; i++) {
@@ -1181,7 +1253,8 @@ void
fill_nfapi_ulsch_harq_information(module_id_t module_idP,
int CC_idP,
uint16_t rntiP,
nfapi_ul_config_ulsch_harq_information *harq_information)
nfapi_ul_config_ulsch_harq_information *harq_information,
sub_frame_t subframeP)
{
eNB_MAC_INST *eNB = RC.mac[module_idP];
COMMON_channels_t *cc = &eNB->common_channels[CC_idP];
@@ -1232,7 +1305,7 @@ fill_nfapi_ulsch_harq_information(module_id_t module_
harq_information->harq_information_rel10.harq_size = 1;
else {
if (harq_information->harq_information_rel10.ack_nack_mode == 1)
harq_information->harq_information_rel10.harq_size = get_V_UL_DAI(module_idP, CC_idP, rntiP);
harq_information->harq_information_rel10.harq_size = get_V_UL_DAI(module_idP, CC_idP, rntiP, subframeP);
else
harq_information->harq_information_rel10.harq_size = 1;
}
@@ -1242,7 +1315,7 @@ fill_nfapi_ulsch_harq_information(module_id_t module_
harq_information->harq_information_rel10.harq_size = 2;
} else {
if (harq_information->harq_information_rel10.ack_nack_mode == 1)
harq_information->harq_information_rel10.harq_size = get_V_UL_DAI(module_idP, CC_idP, rntiP);
harq_information->harq_information_rel10.harq_size = get_V_UL_DAI(module_idP, CC_idP, rntiP, subframeP);
else
harq_information->harq_information_rel10.harq_size = 2;
}
@@ -1284,19 +1357,23 @@ fill_nfapi_harq_information(module_id_t module_idP,
case 6:
case 7:
if (cc->tdd_Config != NULL) {
AssertFatal(UE_list->UE_template[CC_idP][UE_id].physicalConfigDedicated->pucch_ConfigDedicated != NULL,
"pucch_ConfigDedicated is null for TDD!\n");
if ((UE_list->UE_template[CC_idP][UE_id].physicalConfigDedicated->pucch_ConfigDedicated->tdd_AckNackFeedbackMode != NULL)
// AssertFatal(UE_list->UE_template[CC_idP][UE_id].physicalConfigDedicated->pucch_ConfigDedicated != NULL,
// "pucch_ConfigDedicated is null for TDD!\n");
if (UE_list->UE_template[CC_idP][UE_id].physicalConfigDedicated != NULL
&& UE_list->UE_template[CC_idP][UE_id].physicalConfigDedicated->pucch_ConfigDedicated != NULL
&& (UE_list->UE_template[CC_idP][UE_id].physicalConfigDedicated->pucch_ConfigDedicated->tdd_AckNackFeedbackMode != NULL)
&& (*UE_list->UE_template[CC_idP][UE_id].physicalConfigDedicated->pucch_ConfigDedicated->tdd_AckNackFeedbackMode == PUCCH_ConfigDedicated__tdd_AckNackFeedbackMode_multiplexing))
{
harq_information->harq_information_rel10_tdd.harq_size = 2; // 2-bit ACK/NAK
harq_information->harq_information_rel10_tdd.ack_nack_mode = 1; // multiplexing
} else {
harq_information->harq_information_rel10_tdd.harq_size = 1; // 1-bit ACK/NAK
harq_information->harq_information_rel10_tdd.ack_nack_mode = 0; // bundling
{
harq_information->harq_information_rel10_tdd.harq_size = 2; // 2-bit ACK/NAK
harq_information->harq_information_rel10_tdd.ack_nack_mode = 1; // multiplexing
} else {
harq_information->harq_information_rel10_tdd.harq_size = 1; // 1-bit ACK/NAK
harq_information->harq_information_rel10_tdd.ack_nack_mode = 0; // bundling
}
harq_information->harq_information_rel10_tdd.tl.tag = NFAPI_UL_CONFIG_REQUEST_HARQ_INFORMATION_REL10_TDD_TAG;
harq_information->harq_information_rel10_tdd.n_pucch_1_0 = cc->radioResourceConfigCommon->pucch_ConfigCommon.n1PUCCH_AN + cce_idxP;
LTE_DL_FRAME_PARMS *frame_parms = &RC.eNB[module_idP][CC_idP]->frame_parms;
harq_information->harq_information_rel10_tdd.n_pucch_1_0 = get_Np(frame_parms->N_RB_DL,cce_idxP,0) +
cc->radioResourceConfigCommon->pucch_ConfigCommon.n1PUCCH_AN + cce_idxP;
harq_information->harq_information_rel10_tdd.number_of_pucch_resources = 1;
} else {
harq_information->harq_information_rel9_fdd.tl.tag = NFAPI_UL_CONFIG_REQUEST_HARQ_INFORMATION_REL9_FDD_TAG;
@@ -1374,7 +1451,7 @@ void
fill_nfapi_dlsch_config(eNB_MAC_INST * eNB,
nfapi_dl_config_request_body_t * dl_req,
uint16_t length,
uint16_t pdu_index,
int16_t pdu_index,
uint16_t rnti,
uint8_t resource_allocation_type,
uint8_t
@@ -1434,7 +1511,7 @@ uint16_t
fill_nfapi_tx_req(nfapi_tx_request_body_t *tx_req_body,
uint16_t absSF,
uint16_t pdu_length,
uint16_t pdu_index,
int16_t pdu_index,
uint8_t *pdu)
{
nfapi_tx_request_pdu_t *TX_req = &tx_req_body->tx_pdu_list[tx_req_body->number_of_pdus];
@@ -1485,7 +1562,8 @@ fill_nfapi_ulsch_config_request_rel8(nfapi_ul_config_request_pdu_t *ul_config_pd
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.number_of_resource_blocks = number_of_resource_blocks;
if (mcs < 11) ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.modulation_type = 2;
else if (mcs < 21) ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.modulation_type = 4;
else ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.modulation_type = 6;
else if(mcs < 29) ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.modulation_type = 6;
else ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.modulation_type = 0;
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.cyclic_shift_2_for_drms = cyclic_shift_2_for_drms;
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.frequency_hopping_enabled_flag = frequency_hopping_enabled_flag;
ul_config_pdu->ulsch_pdu.ulsch_pdu_rel8.frequency_hopping_bits = frequency_hopping_bits;
@@ -1967,17 +2045,30 @@ int rrc_mac_remove_ue(module_id_t mod_idP, rnti_t rntiP)
eNB_dlsch_info[mod_idP][pCC_id][UE_id].serving_num = 0;
// check if this has an RA process active
RA_t *ra;
for (i = 0; i < NB_RA_PROC_MAX; i++) {
ra = (RA_t *) & RC.mac[mod_idP]->common_channels[pCC_id].ra[i];
if (ra->rnti == rntiP) {
ra->state = IDLE;
ra->timing_offset = 0;
ra->RRC_timer = 20;
ra->rnti = 0;
//break;
if(find_RA_id(mod_idP, pCC_id, rntiP) != -1) {
cancel_ra_proc(mod_idP, pCC_id, 0, rntiP);
}
pthread_mutex_lock(&rrc_release_freelist);
if(rrc_release_info.num_UEs > 0){
uint16_t release_total = 0;
for(uint16_t release_num = 0;release_num < NUMBER_OF_UE_MAX;release_num++){
if(rrc_release_info.RRC_release_ctrl[release_num].flag > 0){
release_total++;
}else{
continue;
}
if(rrc_release_info.RRC_release_ctrl[release_num].rnti == rntiP){
rrc_release_info.RRC_release_ctrl[release_num].flag = 0;
rrc_release_info.num_UEs--;
release_total--;
}
if(release_total >= rrc_release_info.num_UEs){
break;
}
}
}
pthread_mutex_unlock(&rrc_release_freelist);
return 0;
}
@@ -2766,13 +2857,13 @@ get_nCCE_max(COMMON_channels_t * cc, int num_pdcch_symbols, int subframe)
// Allocate the CCEs
int
allocate_CCEs(int module_idP, int CC_idP, int subframeP, int test_onlyP)
allocate_CCEs(int module_idP, int CC_idP, frame_t frameP, sub_frame_t subframeP, int test_onlyP)
{
int *CCE_table = RC.mac[module_idP]->CCE_table[CC_idP];
nfapi_dl_config_request_body_t *DL_req =
&RC.mac[module_idP]->DL_req[CC_idP].dl_config_request_body;
nfapi_hi_dci0_request_body_t *HI_DCI0_req =
&RC.mac[module_idP]->HI_DCI0_req[CC_idP].hi_dci0_request_body;
&RC.mac[module_idP]->HI_DCI0_req[CC_idP][subframeP].hi_dci0_request_body;
nfapi_dl_config_request_pdu_t *dl_config_pdu =
&DL_req->dl_config_pdu_list[0];
nfapi_hi_dci0_request_pdu_t *hi_dci0_pdu =
@@ -2783,6 +2874,17 @@ allocate_CCEs(int module_idP, int CC_idP, int subframeP, int test_onlyP)
int fCCE;
int i, j, idci;
int nCCE = 0;
int max_symbol;
eNB_MAC_INST *eNB = RC.mac[module_idP];
COMMON_channels_t *cc = &eNB->common_channels[CC_idP];
int ackNAK_absSF = get_pucch1_absSF(cc, (frameP*10+subframeP));
if (cc->tdd_Config!=NULL && is_S_sf(cc,subframeP) > 0)
max_symbol = 2;
else
max_symbol = 3;
nfapi_ul_config_request_body_t *ul_req = &eNB->UL_req_tmp[CC_idP][ackNAK_absSF % 10].ul_config_request_body;
LOG_D(MAC,
"Allocate CCEs subframe %d, test %d : (DL PDU %d, DL DCI %d, UL %d)\n",
@@ -2811,7 +2913,7 @@ allocate_CCEs(int module_idP, int CC_idP, int subframeP, int test_onlyP)
if (nCCE +
(dl_config_pdu[i].dci_dl_pdu.
dci_dl_pdu_rel8.aggregation_level) > nCCE_max) {
if (DL_req->number_pdcch_ofdm_symbols == 3)
if (DL_req->number_pdcch_ofdm_symbols == max_symbol)
goto failed;
LOG_D(MAC,
"Can't fit DCI allocations with %d PDCCH symbols, increasing by 1\n",
@@ -2833,7 +2935,7 @@ allocate_CCEs(int module_idP, int CC_idP, int subframeP, int test_onlyP)
dci_dl_pdu.dci_dl_pdu_rel8.rnti,
subframeP);
if (fCCE == -1) {
if (DL_req->number_pdcch_ofdm_symbols == 3) {
if (DL_req->number_pdcch_ofdm_symbols == max_symbol) {
LOG_D(MAC,
"subframe %d: Dropping Allocation for RNTI %x\n",
subframeP,
@@ -2876,7 +2978,7 @@ allocate_CCEs(int module_idP, int CC_idP, int subframeP, int test_onlyP)
// the allocation is feasible, rnti rule passes
nCCE += dl_config_pdu[i].dci_dl_pdu.dci_dl_pdu_rel8.aggregation_level;
LOG_D(MAC, "Allocating at nCCE %d\n", fCCE);
if (test_onlyP == 0) {
if ((test_onlyP%2) == 0) {
dl_config_pdu[i].dci_dl_pdu.dci_dl_pdu_rel8.cce_idx = fCCE;
LOG_D(MAC,
"Allocate COMMON DCI CCEs subframe %d, test %d => L %d fCCE %d\n",
@@ -2904,7 +3006,7 @@ allocate_CCEs(int module_idP, int CC_idP, int subframeP, int test_onlyP)
nCCE, nCCE_max, DL_req->number_pdcch_ofdm_symbols);
if (nCCE + (hi_dci0_pdu[i].dci_pdu.dci_pdu_rel8.aggregation_level) > nCCE_max) {
if (DL_req->number_pdcch_ofdm_symbols == 3)
if (DL_req->number_pdcch_ofdm_symbols == max_symbol)
goto failed;
LOG_D(MAC,
"Can't fit DCI allocations with %d PDCCH symbols, increasing by 1\n",
@@ -2925,7 +3027,7 @@ allocate_CCEs(int module_idP, int CC_idP, int subframeP, int test_onlyP)
hi_dci0_pdu[i].dci_pdu.dci_pdu_rel8.
rnti, subframeP);
if (fCCE == -1) {
if (DL_req->number_pdcch_ofdm_symbols == 3) {
if (DL_req->number_pdcch_ofdm_symbols == max_symbol) {
LOG_D(MAC,
"subframe %d: Dropping Allocation for RNTI %x\n",
subframeP,
@@ -2965,7 +3067,7 @@ allocate_CCEs(int module_idP, int CC_idP, int subframeP, int test_onlyP)
// the allocation is feasible, rnti rule passes
nCCE += hi_dci0_pdu[i].dci_pdu.dci_pdu_rel8.aggregation_level;
LOG_D(MAC, "Allocating at nCCE %d\n", fCCE);
if (test_onlyP == 0) {
if ((test_onlyP%2) == 0) {
hi_dci0_pdu[i].dci_pdu.dci_pdu_rel8.cce_index = fCCE;
LOG_D(MAC, "Allocate CCEs subframe %d, test %d\n",
subframeP, test_onlyP);
@@ -2989,7 +3091,7 @@ allocate_CCEs(int module_idP, int CC_idP, int subframeP, int test_onlyP)
DL_req->number_pdcch_ofdm_symbols);
if (nCCE + (dl_config_pdu[i].dci_dl_pdu.dci_dl_pdu_rel8.aggregation_level) > nCCE_max) {
if (DL_req->number_pdcch_ofdm_symbols == 3)
if (DL_req->number_pdcch_ofdm_symbols == max_symbol)
goto failed;
LOG_D(MAC,
"Can't fit DCI allocations with %d PDCCH symbols, increasing by 1\n",
@@ -3007,7 +3109,7 @@ allocate_CCEs(int module_idP, int CC_idP, int subframeP, int test_onlyP)
dl_config_pdu[i].dci_dl_pdu.dci_dl_pdu_rel8.rnti,
subframeP);
if (fCCE == -1) {
if (DL_req->number_pdcch_ofdm_symbols == 3) {
if (DL_req->number_pdcch_ofdm_symbols == max_symbol) {
LOG_I(MAC,
"subframe %d: Dropping Allocation for RNTI %x\n",
subframeP,
@@ -3015,7 +3117,7 @@ allocate_CCEs(int module_idP, int CC_idP, int subframeP, int test_onlyP)
rnti);
for (j = 0; j <= i; j++) {
if (dl_config_pdu[j].pdu_type == NFAPI_DL_CONFIG_DCI_DL_PDU_TYPE)
LOG_I(MAC,
LOG_D(MAC,
"DCI %d/%d (%d,%d) : rnti %x dci format %d, aggreg %d nCCE %d / %d (num_pdcch_symbols %d)\n",
j,
DL_req->number_dci + HI_DCI0_req->number_of_dci,
@@ -3047,11 +3149,25 @@ allocate_CCEs(int module_idP, int CC_idP, int subframeP, int test_onlyP)
// the allocation is feasible, rnti rule passes
nCCE += dl_config_pdu[i].dci_dl_pdu.dci_dl_pdu_rel8.aggregation_level;
LOG_D(MAC, "Allocating at nCCE %d\n", fCCE);
if (test_onlyP == 0) {
if ((test_onlyP%2) == 0) {
dl_config_pdu[i].dci_dl_pdu.dci_dl_pdu_rel8.cce_idx = fCCE;
LOG_D(MAC, "Allocate CCEs subframe %d, test %d\n",
subframeP, test_onlyP);
}
if ((test_onlyP/2) == 1) {
for(int ack_int = 0;ack_int < ul_req->number_of_pdus; ack_int++){
if(((ul_req->ul_config_pdu_list[ack_int].pdu_type == NFAPI_UL_CONFIG_UCI_HARQ_PDU_TYPE) ||
(ul_req->ul_config_pdu_list[ack_int].pdu_type == NFAPI_UL_CONFIG_UCI_SR_HARQ_PDU_TYPE)) &&
(ul_req->ul_config_pdu_list[ack_int].uci_harq_pdu.ue_information.ue_information_rel8.rnti == dl_config_pdu[i].dci_dl_pdu.dci_dl_pdu_rel8.rnti)){
if (cc->tdd_Config==NULL)
ul_req->ul_config_pdu_list[ack_int].uci_harq_pdu.harq_information.harq_information_rel9_fdd.n_pucch_1_0 =
cc->radioResourceConfigCommon->pucch_ConfigCommon.n1PUCCH_AN + fCCE;
else
ul_req->ul_config_pdu_list[ack_int].uci_harq_pdu.harq_information.harq_information_rel10_tdd.n_pucch_1_0 =
cc->radioResourceConfigCommon->pucch_ConfigCommon.n1PUCCH_AN + fCCE + get_Np(to_prb(cc->mib->message.dl_Bandwidth),fCCE,0) ;
}
}
}
idci++;
}
} // for i = 0 ... num_DL_DCIs
@@ -3134,7 +3250,7 @@ CCE_allocation_infeasible(int module_idP,
{
nfapi_dl_config_request_body_t *DL_req = &RC.mac[module_idP]->DL_req[CC_idP].dl_config_request_body;
nfapi_dl_config_request_pdu_t *dl_config_pdu = &DL_req->dl_config_pdu_list[DL_req->number_pdu];
nfapi_hi_dci0_request_body_t *HI_DCI0_req = &RC.mac[module_idP]->HI_DCI0_req[CC_idP].hi_dci0_request_body;
nfapi_hi_dci0_request_body_t *HI_DCI0_req = &RC.mac[module_idP]->HI_DCI0_req[CC_idP][subframe].hi_dci0_request_body;
nfapi_hi_dci0_request_pdu_t *hi_dci0_pdu = &HI_DCI0_req->hi_dci0_pdu_list[HI_DCI0_req->number_of_dci + HI_DCI0_req->number_of_hi];
int ret;
boolean_t res = FALSE;
@@ -3158,7 +3274,7 @@ CCE_allocation_infeasible(int module_idP,
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.
aggregation_level,
dl_config_pdu->dci_dl_pdu.dci_dl_pdu_rel8.rnti_type);
ret = allocate_CCEs(module_idP, CC_idP, subframe, 0);
ret = allocate_CCEs(module_idP, CC_idP, 0, subframe, 0);
if (ret == -1) res = TRUE;
DL_req->number_pdu--;
}
@@ -3173,7 +3289,7 @@ CCE_allocation_infeasible(int module_idP,
hi_dci0_pdu->dci_pdu.dci_pdu_rel8.rnti = rnti;
hi_dci0_pdu->dci_pdu.dci_pdu_rel8.aggregation_level = aggregation;
HI_DCI0_req->number_of_dci++;
ret = allocate_CCEs(module_idP, CC_idP, subframe, 0);
ret = allocate_CCEs(module_idP, CC_idP, 0, subframe, 0);
if (ret == -1) res = TRUE;
HI_DCI0_req->number_of_dci--;
}
@@ -3181,6 +3297,78 @@ CCE_allocation_infeasible(int module_idP,
return res;
}
void get_retransmission_timing(TDD_Config_t *tdd_Config, frame_t *frameP,
sub_frame_t *subframeP)
{
if (tdd_Config == NULL)
{
if (*subframeP > 1)
*frameP = (*frameP + 1) % 1024;
*subframeP = (*subframeP + 8) % 10;
}
else
{
switch (tdd_Config->subframeAssignment)//TODO fill in other TDD configs
{
default: printf("%s:%d: TODO\n", __FILE__, __LINE__); abort();
case 1:
if (*subframeP == 0 || *subframeP == 5)
{
*subframeP += 19;
*frameP = (*frameP + *subframeP/10) % 1024;
*subframeP %= 10;
}
else if (*subframeP == 4 || *subframeP == 9)
{
*subframeP += 16;
*frameP = (*frameP + *subframeP/10) % 1024;
*subframeP %= 10;
}
else
{
AssertFatal(2 == 1,
"Illegal dl subframe %d for tdd config %d\n", *subframeP,
tdd_Config->subframeAssignment);
}
break;
}
}
}
uint8_t get_dl_subframe_count(int tdd_config_sfa, sub_frame_t subframeP){
uint8_t tdd1[10] = {1,-1,-1,-1,2,3,-1,-1,-1,4}; // special subframes 1,6 are excluded
switch(tdd_config_sfa){// TODO fill in other tdd configs
case 1 :
return tdd1[subframeP];
break;
}
return -1;
}
uint8_t frame_subframe2_dl_harq_pid(TDD_Config_t *tdd_Config, int abs_frameP, sub_frame_t subframeP){
int harq_pid;
if(tdd_Config){
switch(tdd_Config->subframeAssignment){ //TODO fill in other tdd config
case 1:
harq_pid = (((frame_cnt*1024 + abs_frameP) * 4) - 1 + get_dl_subframe_count(tdd_Config->subframeAssignment,subframeP))%7;//4 dl subframe in a frame
if(harq_pid < 0)
harq_pid += 7;
LOG_D(MAC,"[frame_subframe2_dl_harq_pid] (%d,%d) calculate harq_pid ((( %d * 1024 + %d) *4) - 1 + %d)%7 = %d \n",
(abs_frameP+1024)%1024,subframeP,frame_cnt,abs_frameP,
get_dl_subframe_count(tdd_Config->subframeAssignment,subframeP),harq_pid);
return harq_pid;
break;
}
}else{
return ((abs_frameP*10)+subframeP)&7;
}
return -1;
}
void
extract_harq(module_id_t mod_idP, int CC_idP, int UE_id,
@@ -3198,8 +3386,12 @@ extract_harq(module_id_t mod_idP, int CC_idP, int UE_id,
int pCCid = UE_list->pCC_id[UE_id];
int spatial_bundling = 0;
int tmode[5];
int i, j;
int i, j, m;
uint8_t *pdu;
LTE_DL_FRAME_PARMS *fp;
sub_frame_t subframe_tx;
int frame_tx;
uint8_t harq_pid;
#if (RRC_VERSION >= MAKE_VERSION(13, 0, 0))
if (UE_list->UE_template[pCCid][UE_id].physicalConfigDedicated != NULL &&
@@ -3211,7 +3403,7 @@ extract_harq(module_id_t mod_idP, int CC_idP, int UE_id,
&& (format == 1))))
spatial_bundling = 1;
#endif
fp=&(RC.eNB[mod_idP][CC_idP]->frame_parms);
for (i = 0; i < numCC; i++)
tmode[i] = get_tmode(mod_idP, i, UE_id);
@@ -3222,10 +3414,53 @@ extract_harq(module_id_t mod_idP, int CC_idP, int UE_id,
num_ack_nak = harq_indication_tdd->number_of_ack_nack;
switch (harq_indication_tdd->mode) {
case 0: // Format 1a/b
AssertFatal(numCC == 1,
"numCC %d > 1, should not be using Format1a/b\n",
numCC);
case 0: // Format 1a/b bundling
AssertFatal(numCC == 1, "numCC %d > 1, should not be using Format1a/b\n", numCC);
int M = ul_ACK_subframe2_M(fp,subframeP);
for(m=0;m<M;m++){
subframe_tx = ul_ACK_subframe2_dl_subframe(fp,subframeP,m);
if(frameP==1023&&subframeP>5)
frame_tx=-1;
else
frame_tx = subframeP < 4 ? frameP -1 : frameP;
harq_pid = frame_subframe2_dl_harq_pid(cc->tdd_Config,frame_tx,subframe_tx);
RA_t *ra = &RC.mac[mod_idP]->common_channels[CC_idP].ra[0];
if(num_ack_nak==1){
if(harq_indication_tdd->harq_data[0].bundling.value_0==1){ //ack
sched_ctl->round[CC_idP][harq_pid] = 8; // release HARQ process
sched_ctl->tbcnt[CC_idP][harq_pid] = 0;
LOG_D(MAC,"frame %d subframe %d Acking (%d,%d) harq_pid %d round %d\n",frameP,subframeP,frame_tx,subframe_tx,harq_pid,sched_ctl->round[CC_idP][harq_pid]);
}else{ //nack
if( sched_ctl->round[CC_idP][harq_pid]<8)
sched_ctl->round[CC_idP][harq_pid]++;
LOG_D(MAC,"frame %d subframe %d Nacking (%d,%d) harq_pid %d round %d\n",frameP,subframeP,frame_tx,subframe_tx,harq_pid,sched_ctl->round[CC_idP][harq_pid]);
if(sched_ctl->round[CC_idP][harq_pid] == 8){
for (uint8_t ra_i = 0; ra_i < NB_RA_PROC_MAX; ra_i++) {
if((ra[ra_i].rnti == rnti) && (ra[ra_i].state == WAITMSG4ACK)){
//Msg NACK num to MAC ,remove UE
// add UE info to freeList
LOG_I(RRC, "put UE %x into freeList\n", rnti);
put_UE_in_freelist(mod_idP, rnti, 1);
}
}
}
}
}
for (uint8_t ra_i = 0; ra_i < NB_RA_PROC_MAX; ra_i++) {
if ((ra[ra_i].rnti == rnti) && (ra[ra_i].state == MSGCRNTI_ACK) && (ra[ra_i].crnti_harq_pid == harq_pid)) {
LOG_D(MAC,"CRNTI Reconfiguration: ACK %d rnti %x round %d frame %d subframe %d \n",harq_indication_tdd->harq_data[0].bundling.value_0,rnti,sched_ctl->round[CC_idP][harq_pid],frameP,subframeP);
if(num_ack_nak == 1 && harq_indication_tdd->harq_data[0].bundling.value_0 == 1) {
cancel_ra_proc(mod_idP, CC_idP, frameP, ra[ra_i].rnti);
}else{
if(sched_ctl->round[CC_idP][harq_pid] == 7){
cancel_ra_proc(mod_idP, CC_idP, frameP, ra[ra_i].rnti);
}
}
break;
}
}
}
break;
case 1: // Channel Selection
break;
@@ -3241,7 +3476,7 @@ extract_harq(module_id_t mod_idP, int CC_idP, int UE_id,
num_ack_nak = harq_indication_fdd->number_of_ack_nack;
pdu = &harq_indication_fdd->harq_tb_n[0];
uint8_t harq_pid = ((10 * frameP) + subframeP + 10236) & 7;
harq_pid = ((10 * frameP) + subframeP + 10236) & 7;
LOG_D(MAC,"frame %d subframe %d harq_pid %d mode %d tmode[0] %d num_ack_nak %d round %d\n",frameP,subframeP,harq_pid,harq_indication_fdd->mode,tmode[0],num_ack_nak,sched_ctl->round[CC_idP][harq_pid]);
@@ -3265,6 +3500,22 @@ extract_harq(module_id_t mod_idP, int CC_idP, int UE_id,
LOG_D(MAC, "Received %d for harq_pid %d\n", pdu[0],
harq_pid);
RA_t *ra = &RC.mac[mod_idP]->common_channels[CC_idP].ra[0];
for (uint8_t ra_i = 0; ra_i < NB_RA_PROC_MAX; ra_i++) {
if ((ra[ra_i].rnti == rnti) && (ra[ra_i].state == MSGCRNTI_ACK) &&
(ra[ra_i].crnti_harq_pid == harq_pid)) {
LOG_D(MAC,"CRNTI Reconfiguration: ACK %d rnti %x round %d frame %d subframe %d \n",pdu[0],rnti,sched_ctl->round[CC_idP][harq_pid],frameP,subframeP);
if(pdu[0] == 1){
cancel_ra_proc(mod_idP, CC_idP, frameP, ra[ra_i].rnti);
}else{
if(sched_ctl->round[CC_idP][harq_pid] == 7){
cancel_ra_proc(mod_idP, CC_idP, frameP, ra[ra_i].rnti);
}
}
break;
}
}
if (pdu[0] == 1) { // ACK
sched_ctl->round[CC_idP][harq_pid] = 8; // release HARQ process
sched_ctl->tbcnt[CC_idP][harq_pid] = 0;
@@ -3274,6 +3525,16 @@ extract_harq(module_id_t mod_idP, int CC_idP, int UE_id,
sched_ctl->round[CC_idP][harq_pid] = 8; // release HARQ process
sched_ctl->tbcnt[CC_idP][harq_pid] = 0;
}
if (sched_ctl->round[CC_idP][harq_pid] == 8){
for (uint8_t ra_i = 0; ra_i < NB_RA_PROC_MAX; ra_i++) {
if((ra[ra_i].rnti == rnti) && (ra[ra_i].state == WAITMSG4ACK)){
//Msg NACK num to MAC ,remove UE
// add UE info to freeList
LOG_I(RRC, "put UE %x into freeList\n", rnti);
put_UE_in_freelist(mod_idP, rnti, 1);
}
}
}
}
} else {
// one or two ACK/NAK bits
@@ -4011,6 +4272,7 @@ cqi_indication(module_id_t mod_idP, int CC_idP, frame_t frameP,
extract_pusch_csi(mod_idP, CC_idP, UE_id, frameP, subframeP,
pdu, rel9->length);
LOG_D(MAC,"Frame %d Subframe %d update CQI:%d\n",frameP,subframeP,sched_ctl->dl_cqi[CC_idP]);
}
// timing advance
+181 -50
View File
@@ -107,6 +107,7 @@ char *ul_scheduler_type[MAX_NUM_SLICES] = {"schedule_ulsch_rnti",
"schedule_ulsch_rnti",
"schedule_ulsch_rnti"
};
extern mui_t rrc_eNB_mui;
/* Slice Function Pointer */
slice_scheduler_ul slice_sched_ul[MAX_NUM_SLICES] = {0};
@@ -196,6 +197,10 @@ rx_sdu(const module_id_t enb_mod_idP,
UE_list->UE_sched_ctrl[UE_id].round_UL[CC_idP][harq_pid],
ul_cqi);
if(ul_cqi>200){ // too high energy pattern
UE_list->UE_sched_ctrl[UE_id].pusch_snr[CC_idP] = ul_cqi;
}
// AssertFatal(1==0,"ulsch in error\n");
if (UE_list->UE_sched_ctrl[UE_id].round_UL[CC_idP][harq_pid] == 3) {
UE_list->UE_sched_ctrl[UE_id].ul_scheduled &= (~(1 << harq_pid));
@@ -207,6 +212,9 @@ rx_sdu(const module_id_t enb_mod_idP,
UE_list->UE_template[CC_idP][UE_id].scheduled_ul_bytes -= UE_list->UE_template[CC_idP][UE_id].TBS_UL[harq_pid];
if (UE_list->UE_template[CC_idP][UE_id].scheduled_ul_bytes < 0)
UE_list->UE_template[CC_idP][UE_id].scheduled_ul_bytes = 0;
if (find_RA_id(enb_mod_idP, CC_idP, current_rnti) != -1)
cancel_ra_proc(enb_mod_idP, CC_idP, frameP, current_rnti);
} else
UE_list->UE_sched_ctrl[UE_id].round_UL[CC_idP][harq_pid]++;
@@ -216,7 +224,9 @@ rx_sdu(const module_id_t enb_mod_idP,
LOG_D(MAC,
"Programming PHICH NACK for rnti %x harq_pid %d (first_rb %d)\n",
current_rnti, harq_pid, first_rb);
nfapi_hi_dci0_request_t *hi_dci0_req = &mac->HI_DCI0_req[CC_idP];
nfapi_hi_dci0_request_t *hi_dci0_req;
uint8_t sf_ahead_dl = ul_subframe2_k_phich(&mac->common_channels[CC_idP] , subframeP);
hi_dci0_req = &mac->HI_DCI0_req[CC_idP][(subframeP+sf_ahead_dl)%10];
nfapi_hi_dci0_request_body_t *hi_dci0_req_body = &hi_dci0_req->hi_dci0_request_body;
nfapi_hi_dci0_request_pdu_t *hi_dci0_pdu =
&hi_dci0_req_body->hi_dci0_pdu_list[hi_dci0_req_body->number_of_dci + hi_dci0_req_body->number_of_hi];
@@ -230,7 +240,7 @@ rx_sdu(const module_id_t enb_mod_idP,
hi_dci0_req_body->number_of_hi++;
hi_dci0_req_body->sfnsf = sfnsf_add_subframe(frameP,subframeP, 0);
hi_dci0_req_body->tl.tag = NFAPI_HI_DCI0_REQUEST_BODY_TAG;
hi_dci0_req->sfn_sf = sfnsf_add_subframe(frameP,subframeP, 4);
hi_dci0_req->sfn_sf = sfnsf_add_subframe(frameP,subframeP, sf_ahead_dl);
hi_dci0_req->header.message_id = NFAPI_HI_DCI0_REQUEST;
return;
@@ -260,7 +270,7 @@ rx_sdu(const module_id_t enb_mod_idP,
(int) mac->common_channels[CC_idP].
radioResourceConfigCommon->rach_ConfigCommon.
maxHARQ_Msg3Tx);
if (ra[RA_id].msg3_round == mac->common_channels[CC_idP].radioResourceConfigCommon->rach_ConfigCommon.maxHARQ_Msg3Tx - 1) {
if (ra[RA_id].msg3_round >= mac->common_channels[CC_idP].radioResourceConfigCommon->rach_ConfigCommon.maxHARQ_Msg3Tx - 1) {
cancel_ra_proc(enb_mod_idP, CC_idP, frameP, current_rnti);
}
@@ -268,8 +278,9 @@ rx_sdu(const module_id_t enb_mod_idP,
first_rb = UE_list->UE_template[CC_idP][UE_id].first_rb_ul[harq_pid];
ra[RA_id].msg3_round++;
// prepare handling of retransmission
ra[RA_id].Msg3_frame = (ra[RA_id].Msg3_frame + ((ra[RA_id].Msg3_subframe > 1) ? 1 : 0)) % 1024;
ra[RA_id].Msg3_subframe = (ra[RA_id].Msg3_subframe + 8) % 10;
get_Msg3allocret(&mac->common_channels[CC_idP],
ra[RA_id].Msg3_subframe, ra[RA_id].Msg3_frame,
&ra[RA_id].Msg3_frame, &ra[RA_id].Msg3_subframe);
add_msg3(enb_mod_idP, CC_idP, &ra[RA_id], frameP, subframeP);
}
@@ -285,6 +296,12 @@ rx_sdu(const module_id_t enb_mod_idP,
}
payload_ptr = parse_ulsch_header(sduP, &num_ce, &num_sdu, rx_ces, rx_lcids, rx_lengths, sdu_lenP);
if(payload_ptr == NULL){
LOG_E(MAC,"[eNB %d][PUSCH %d] CC_id %d ulsch header unknown lcid(rnti %x, UE_id %d)\n",
enb_mod_idP, harq_pid, CC_idP,current_rnti, UE_id);
return;
}
T(T_ENB_MAC_UE_UL_PDU, T_INT(enb_mod_idP), T_INT(CC_idP),
T_INT(current_rnti), T_INT(frameP), T_INT(subframeP),
T_INT(harq_pid), T_INT(sdu_lenP), T_INT(num_ce), T_INT(num_sdu));
@@ -332,8 +349,8 @@ rx_sdu(const module_id_t enb_mod_idP,
enb_mod_idP, frameP, subframeP, CC_idP, rx_ces[i], i,
num_ce, old_rnti, old_UE_id);
/* receiving CRNTI means that the current rnti has to go away */
cancel_ra_proc(enb_mod_idP, CC_idP, frameP,
current_rnti);
//cancel_ra_proc(enb_mod_idP, CC_idP, frameP,
// current_rnti);
if (old_UE_id != -1) {
/* TODO: if the UE did random access (followed by a MAC uplink with
* CRNTI) because none of its scheduling request was granted, then
@@ -346,16 +363,45 @@ rx_sdu(const module_id_t enb_mod_idP,
* We have to take care of this. As the code is, nothing is done and
* the UE state in the eNB is wrong.
*/
UE_id = old_UE_id;
UE_list->UE_sched_ctrl[UE_id].ul_inactivity_timer = 0;
UE_list->UE_sched_ctrl[UE_id].ul_failure_timer = 0;
if (UE_list->UE_sched_ctrl[UE_id].ul_out_of_sync > 0) {
UE_list->UE_sched_ctrl[UE_id].ul_out_of_sync = 0;
mac_eNB_rrc_ul_in_sync(enb_mod_idP, CC_idP, frameP,
subframeP, old_rnti);
}
current_rnti = old_rnti;
}
for (ii = 0; ii < NB_RA_PROC_MAX; ii++) {
ra = &mac->common_channels[CC_idP].ra[ii];
if ((ra->rnti == current_rnti) && (ra->state != IDLE)) {
mac_rrc_data_ind(enb_mod_idP,
CC_idP,
frameP, subframeP,
old_rnti,
DCCH,
(uint8_t *) payload_ptr,
rx_lengths[i],
0);
// prepare transmission of Msg4(RRCConnectionReconfiguration)
ra->state = MSGCRNTI;
LOG_I(MAC,
"[eNB %d] Frame %d, Subframe %d CC_id %d : (rnti %x UE_id %d) RRCConnectionReconfiguration(Msg4)\n",
enb_mod_idP, frameP, subframeP, CC_idP, old_rnti, old_UE_id);
UE_id = old_UE_id;
current_rnti = old_rnti;
ra->rnti = old_rnti;
ra->crnti_rrc_mui = rrc_eNB_mui-1;
ra->crnti_harq_pid = -1;
//clear timer
UE_list->UE_sched_ctrl[UE_id].uplane_inactivity_timer = 0;
UE_list->UE_sched_ctrl[UE_id].ul_inactivity_timer = 0;
UE_list->UE_sched_ctrl[UE_id].ul_failure_timer = 0;
if (UE_list->UE_sched_ctrl[UE_id].ul_out_of_sync > 0) {
UE_list->UE_sched_ctrl[UE_id].ul_out_of_sync = 0;
mac_eNB_rrc_ul_in_sync(enb_mod_idP, CC_idP, frameP,
subframeP, old_rnti);
}
UE_list->UE_template[CC_idP][UE_id].ul_SR = 1;
UE_list->UE_sched_ctrl[UE_id].crnti_reconfigurationcomplete_flag = 1;
break;
}
}
} else {
cancel_ra_proc(enb_mod_idP, CC_idP, frameP,current_rnti);
}
crnti_rx = 1;
payload_ptr += 2;
break;
@@ -550,8 +596,9 @@ rx_sdu(const module_id_t enb_mod_idP,
ra[ii].rach_resource_type
#endif
)) == -1) {
AssertFatal(1 == 0,
"[MAC][eNB] Max user count reached\n");
LOG_E(MAC,"[MAC][eNB] Max user count reached\n");
cancel_ra_proc(enb_mod_idP, CC_idP, frameP,current_rnti);
break;
// kill RA procedure
} else
LOG_D(MAC,
@@ -584,10 +631,22 @@ rx_sdu(const module_id_t enb_mod_idP,
// Program Msg4 PDCCH+DLSCH/MPDCCH transmission 4 subframes from now, // Check if this is ok for BL/CE, or if the rule is different
ra->Msg4_frame = frameP + ((subframeP > 5) ? 1 : 0);
ra->Msg4_subframe = (subframeP + 4) % 10;
if(mac->common_channels[CC_idP].tdd_Config!=NULL){
switch(mac->common_channels[CC_idP].tdd_Config->subframeAssignment){
case 1:
ra->Msg4_frame = frameP + ((subframeP > 2) ? 1 : 0);
ra->Msg4_subframe = (subframeP + 7) % 10;
break;
default: printf("%s:%d: TODO\n", __FILE__, __LINE__); abort();
// TODO need to be complete for other tdd configs.
}
}else{
// Program Msg4 PDCCH+DLSCH/MPDCCH transmission 4 subframes from now, // Check if this is ok for BL/CE, or if the rule is different
ra->Msg4_frame = frameP + ((subframeP > 5) ? 1 : 0);
ra->Msg4_subframe = (subframeP + 4) % 10;
}
UE_list->UE_sched_ctrl[UE_id].crnti_reconfigurationcomplete_flag = 0;
} // if process is active
} // loop on RA processes
@@ -714,7 +773,10 @@ rx_sdu(const module_id_t enb_mod_idP,
LOG_D(MAC,
"Programming PHICH ACK for rnti %x harq_pid %d (first_rb %d)\n",
current_rnti, harq_pid, first_rb);
nfapi_hi_dci0_request_t *hi_dci0_req = &mac->HI_DCI0_req[CC_idP];
nfapi_hi_dci0_request_t *hi_dci0_req;
uint8_t sf_ahead_dl = ul_subframe2_k_phich(&mac->common_channels[CC_idP] , subframeP);
hi_dci0_req = &mac->HI_DCI0_req[CC_idP][(subframeP+sf_ahead_dl)%10];
nfapi_hi_dci0_request_body_t *hi_dci0_req_body = &hi_dci0_req->hi_dci0_request_body;
nfapi_hi_dci0_request_pdu_t *hi_dci0_pdu =
&hi_dci0_req_body->hi_dci0_pdu_list[hi_dci0_req_body->number_of_dci + hi_dci0_req_body->number_of_hi];
@@ -728,7 +790,7 @@ rx_sdu(const module_id_t enb_mod_idP,
hi_dci0_req_body->number_of_hi++;
hi_dci0_req_body->sfnsf = sfnsf_add_subframe(frameP,subframeP, 0);
hi_dci0_req_body->tl.tag = NFAPI_HI_DCI0_REQUEST_BODY_TAG;
hi_dci0_req->sfn_sf = sfnsf_add_subframe(frameP,subframeP, 4);
hi_dci0_req->sfn_sf = sfnsf_add_subframe(frameP,subframeP, sf_ahead_dl);
hi_dci0_req->header.message_id = NFAPI_HI_DCI0_REQUEST;
/* NN--> FK: we could either check the payload, or use a phy helper to detect a false msg3 */
@@ -848,7 +910,8 @@ unsigned char *parse_ulsch_header(unsigned char *mac_header,
ce_len++;
} else {
LOG_E(MAC, "unknown CE %d \n", lcid);
AssertFatal(1 == 0, "unknown CE");
//AssertFatal(1 == 0, "unknown CE");
return NULL;
}
}
}
@@ -895,6 +958,7 @@ schedule_ulsch(module_id_t module_idP, frame_t frameP,
start_meas(&mac->schedule_ulsch);
int sched_frame=frameP;
int sched_subframe = (subframeP + 4) % 10;
cc = &mac->common_channels[0];
@@ -904,8 +968,10 @@ schedule_ulsch(module_id_t module_idP, frame_t frameP,
tdd_sfa = cc->tdd_Config->subframeAssignment;
switch (subframeP) {
case 0:
if ((tdd_sfa == 0) || (tdd_sfa == 3) || (tdd_sfa == 6))
if ((tdd_sfa == 0) || (tdd_sfa == 3))
sched_subframe = 4;
else if (tdd_sfa == 6)
sched_subframe = 7;
else
return;
break;
@@ -914,6 +980,8 @@ schedule_ulsch(module_id_t module_idP, frame_t frameP,
sched_subframe = 7;
else if (tdd_sfa == 6)
sched_subframe = 8;
else
return;
break;
default:
return;
@@ -936,12 +1004,12 @@ schedule_ulsch(module_id_t module_idP, frame_t frameP,
if (tdd_sfa == 0)
sched_subframe = 9;
else if (tdd_sfa == 6)
sched_subframe = 3;
sched_subframe = 2;
else
return;
break;
case 6:
if (tdd_sfa == 1)
if (tdd_sfa == 0 || tdd_sfa == 1)
sched_subframe = 2;
else if (tdd_sfa == 6)
sched_subframe = 3;
@@ -951,21 +1019,23 @@ schedule_ulsch(module_id_t module_idP, frame_t frameP,
case 7:
return;
case 8:
if ((tdd_sfa >= 2) || (tdd_sfa <= 5))
sched_subframe = 2;
if ((tdd_sfa >= 2) && (tdd_sfa <= 5))
sched_subframe = 2;
else
return;
return;
break;
case 9:
if ((tdd_sfa == 1) || (tdd_sfa == 3) || (tdd_sfa == 4))
sched_subframe = 3;
sched_subframe = 3;
else if (tdd_sfa == 6)
sched_subframe = 4;
sched_subframe = 4;
else
return;
return;
break;
}
}
if (sched_subframe < subframeP) sched_frame++;
for (CC_id = 0; CC_id < MAX_NUM_CCs; CC_id++) {
@@ -1112,8 +1182,7 @@ schedule_ulsch_rnti(module_id_t module_idP,
uint8_t status = 0;
uint8_t rb_table_index = -1;
uint32_t cqi_req, cshift, ndi, tpc;
int32_t normalized_rx_power;
int32_t target_rx_power = -90;
int32_t normalized_rx_power, target_rx_power;
static int32_t tpc_accumulated = 0;
int n;
int CC_id = 0;
@@ -1126,19 +1195,21 @@ schedule_ulsch_rnti(module_id_t module_idP,
UE_sched_ctrl *UE_sched_ctrl;
int sched_frame = frameP;
int rvidx_tab[4] = { 0, 2, 3, 1 };
uint16_t ul_req_index;
uint8_t dlsch_flag;
if (sched_subframeP < subframeP)
sched_frame++;
nfapi_hi_dci0_request_t *hi_dci0_req = &mac->HI_DCI0_req[CC_id];
nfapi_hi_dci0_request_t *hi_dci0_req = &mac->HI_DCI0_req[CC_id][subframeP];
nfapi_hi_dci0_request_body_t *hi_dci0_req_body = &hi_dci0_req->hi_dci0_request_body;
nfapi_hi_dci0_request_pdu_t *hi_dci0_pdu;
nfapi_ul_config_request_t *ul_req_tmp = &mac->UL_req_tmp[CC_id][sched_subframeP];
nfapi_ul_config_request_body_t *ul_req_tmp_body = &ul_req_tmp->ul_config_request_body;
nfapi_ul_config_ulsch_harq_information *ulsch_harq_information;
//LOG_D(MAC, "entering ulsch preprocesor\n");
ulsch_scheduler_pre_processor(module_idP, slice_id, frameP, subframeP, first_rb);
ulsch_scheduler_pre_processor(module_idP, slice_id, frameP, subframeP, sched_subframeP, first_rb);
//LOG_D(MAC, "exiting ulsch preprocesor\n");
@@ -1268,6 +1339,7 @@ schedule_ulsch_rnti(module_id_t module_idP,
cqi_req = 0;
} else {
cqi_req = 1;
UE_sched_ctrl->cqi_req_flag |= 1 << sched_subframeP;
}
UE_sched_ctrl->cqi_req_timer = 0;
} else
@@ -1277,9 +1349,10 @@ schedule_ulsch_rnti(module_id_t module_idP,
//compute the expected ULSCH RX power (for the stats)
// this is the normalized RX power and this should be constant (regardless of mcs
normalized_rx_power = UE_sched_ctrl->pusch_snr[CC_id];
target_rx_power = 178;
//is not in dBm, unit from nfapi, converting to dBm: ToDo: Noise power hard coded to 30
normalized_rx_power = (5*UE_sched_ctrl->pusch_snr[CC_id]-640)/10+30;
target_rx_power= mac->puSch10xSnr/10 + 30;
//printf("\n mac->puSch10xSnr = %d, normalized_rx_power = %d, target_rx_power = %d \n",mac->puSch10xSnr,normalized_rx_power,target_rx_power);
// this assumes accumulated tpc
// make sure that we are only sending a tpc update once a frame, otherwise the control loop will freak out
int32_t framex10psubframe = UE_template->pusch_tpc_tx_frame * 10 + UE_template->pusch_tpc_tx_subframe;
@@ -1404,9 +1477,10 @@ schedule_ulsch_rnti(module_id_t module_idP,
hi_dci0_pdu->dci_pdu.dci_pdu_rel8.tpc = tpc;
hi_dci0_pdu->dci_pdu.dci_pdu_rel8.cqi_csi_request = cqi_req;
hi_dci0_pdu->dci_pdu.dci_pdu_rel8.dl_assignment_index = UE_template->DAI_ul[sched_subframeP];
hi_dci0_pdu->dci_pdu.dci_pdu_rel8.harq_pid = harq_pid;
hi_dci0_req_body->number_of_dci++;
hi_dci0_req_body->sfnsf = sfnsf_add_subframe(frameP, subframeP, 4);
hi_dci0_req_body->sfnsf = sfnsf_add_subframe(sched_frame, sched_subframeP, 0); //(frameP, subframeP, 4);
hi_dci0_req_body->tl.tag = NFAPI_HI_DCI0_REQUEST_BODY_TAG;
hi_dci0_req->sfn_sf = frameP<<4|subframeP; // sfnsf_add_subframe(sched_frame, sched_subframeP, 0); // sunday!
@@ -1418,8 +1492,18 @@ schedule_ulsch_rnti(module_id_t module_idP,
harq_pid, frameP, subframeP, UE_id, rnti,
sched_frame, sched_subframeP);
ul_req_index = 0;
dlsch_flag = 0;
for(ul_req_index = 0;ul_req_index < ul_req_tmp_body->number_of_pdus;ul_req_index++){
if(ul_req_tmp_body->ul_config_pdu_list[ul_req_index].pdu_type == NFAPI_UL_CONFIG_UCI_HARQ_PDU_TYPE){
dlsch_flag = 1;
LOG_D(MAC,"Frame %d, Subframe %d:rnti %x ul_req_index %d Switched UCI HARQ to ULSCH HARQ(first)\n",frameP,subframeP,rnti,ul_req_index);
break;
}
}
// Add UL_config PDUs
fill_nfapi_ulsch_config_request_rel8(&ul_req_tmp_body->ul_config_pdu_list[ul_req_tmp_body->number_of_pdus], cqi_req, cc, UE_template->physicalConfigDedicated, get_tmode(module_idP, CC_id, UE_id), mac->ul_handle, rnti, first_rb[CC_id], // resource_block_start
fill_nfapi_ulsch_config_request_rel8(&ul_req_tmp_body->ul_config_pdu_list[ul_req_index], cqi_req, cc, UE_template->physicalConfigDedicated, get_tmode(module_idP, CC_id, UE_id), mac->ul_handle, rnti, first_rb[CC_id], // resource_block_start
rb_table[rb_table_index], // number_of_resource_blocks
UE_template->mcs_UL[harq_pid], cshift, // cyclic_shift_2_for_drms
0, // frequency_hopping_enabled_flag
@@ -1437,22 +1521,41 @@ schedule_ulsch_rnti(module_id_t module_idP,
[rb_table_index]));
#if (RRC_VERSION >= MAKE_VERSION(14, 0, 0))
if (UE_template->rach_resource_type > 0) { // This is a BL/CE UE allocation
fill_nfapi_ulsch_config_request_emtc(&ul_req_tmp_body->ul_config_pdu_list[ul_req_tmp_body->number_of_pdus], UE_template->rach_resource_type > 2 ? 2 : 1, 1, //total_number_of_repetitions
fill_nfapi_ulsch_config_request_emtc(&ul_req_tmp_body->ul_config_pdu_list[ul_req_index], UE_template->rach_resource_type > 2 ? 2 : 1, 1, //total_number_of_repetitions
1, //repetition_number
(frameP *
10) +
subframeP);
}
#endif
if(dlsch_flag == 1){
if(cqi_req == 1){
ul_req_tmp_body->ul_config_pdu_list[ul_req_index].pdu_type = NFAPI_UL_CONFIG_ULSCH_CQI_HARQ_RI_PDU_TYPE;
ulsch_harq_information = &ul_req_tmp_body->ul_config_pdu_list[ul_req_index].ulsch_cqi_harq_ri_pdu.harq_information;
ul_req_tmp_body->ul_config_pdu_list[ul_req_index].ulsch_cqi_harq_ri_pdu.initial_transmission_parameters.initial_transmission_parameters_rel8.tl.tag=NFAPI_UL_CONFIG_REQUEST_INITIAL_TRANSMISSION_PARAMETERS_REL8_TAG;
ul_req_tmp_body->ul_config_pdu_list[ul_req_index].ulsch_cqi_harq_ri_pdu.initial_transmission_parameters.initial_transmission_parameters_rel8.n_srs_initial = 0; // last symbol not punctured
ul_req_tmp_body->ul_config_pdu_list[ul_req_index].ulsch_cqi_harq_ri_pdu.initial_transmission_parameters.initial_transmission_parameters_rel8.initial_number_of_resource_blocks = rb_table[rb_table_index];
}else{
ul_req_tmp_body->ul_config_pdu_list[ul_req_index].pdu_type = NFAPI_UL_CONFIG_ULSCH_HARQ_PDU_TYPE;
ulsch_harq_information = &ul_req_tmp_body->ul_config_pdu_list[ul_req_index].ulsch_harq_pdu.harq_information;
ul_req_tmp_body->ul_config_pdu_list[ul_req_index].ulsch_harq_pdu.initial_transmission_parameters.initial_transmission_parameters_rel8.tl.tag = NFAPI_UL_CONFIG_REQUEST_INITIAL_TRANSMISSION_PARAMETERS_REL8_TAG;
ul_req_tmp_body->ul_config_pdu_list[ul_req_index].ulsch_harq_pdu.initial_transmission_parameters.initial_transmission_parameters_rel8.n_srs_initial = 0; // last symbol not punctured
ul_req_tmp_body->ul_config_pdu_list[ul_req_index].ulsch_harq_pdu.initial_transmission_parameters.initial_transmission_parameters_rel8.initial_number_of_resource_blocks = rb_table[rb_table_index];
}
fill_nfapi_ulsch_harq_information(module_idP, CC_id,rnti, ulsch_harq_information,subframeP);
}else{
ul_req_tmp_body->number_of_pdus++;
}
ul_req_tmp->header.message_id = NFAPI_UL_CONFIG_REQUEST;
ul_req_tmp_body->number_of_pdus++;
ul_req_tmp_body->tl.tag = NFAPI_UL_CONFIG_REQUEST_BODY_TAG;
mac->ul_handle++;
uint16_t ul_sched_frame = sched_frame;
uint16_t ul_sched_subframeP = sched_subframeP;
add_subframe(&ul_sched_frame, &ul_sched_subframeP, 2);
//add_subframe(&ul_sched_frame, &ul_sched_subframeP, 2);
ul_req_tmp->sfn_sf = ul_sched_frame<<4|ul_sched_subframeP;
add_ue_ulsch_info(module_idP,
@@ -1505,7 +1608,16 @@ schedule_ulsch_rnti(module_id_t module_idP,
"[PUSCH %d] Frame %d, Subframe %d: Adding UL CONFIG.Request for UE %d/%x, ulsch_frame %d, ulsch_subframe %d\n",
harq_pid, frameP, subframeP, UE_id, rnti,
sched_frame, sched_subframeP);
fill_nfapi_ulsch_config_request_rel8(&ul_req_tmp_body->ul_config_pdu_list[ul_req_tmp_body->number_of_pdus], cqi_req, cc, UE_template->physicalConfigDedicated, get_tmode(module_idP, CC_id, UE_id), mac->ul_handle, rnti, UE_template->first_rb_ul[harq_pid], // resource_block_start
ul_req_index = 0;
dlsch_flag = 0;
for(ul_req_index = 0;ul_req_index < ul_req_tmp_body->number_of_pdus;ul_req_index++){
if(ul_req_tmp_body->ul_config_pdu_list[ul_req_index].pdu_type == NFAPI_UL_CONFIG_UCI_HARQ_PDU_TYPE){
dlsch_flag = 1;
LOG_D(MAC,"Frame %d, Subframe %d:rnti %x ul_req_index %d Switched UCI HARQ to ULSCH HARQ(first)\n",frameP,subframeP,rnti,ul_req_index);
break;
}
}
fill_nfapi_ulsch_config_request_rel8(&ul_req_tmp_body->ul_config_pdu_list[ul_req_index], cqi_req, cc, UE_template->physicalConfigDedicated, get_tmode(module_idP, CC_id, UE_id), mac->ul_handle, rnti, UE_template->first_rb_ul[harq_pid], // resource_block_start
UE_template->nb_rb_ul[harq_pid], // number_of_resource_blocks
UE_template->mcs_UL[harq_pid], cshift, // cyclic_shift_2_for_drms
0, // frequency_hopping_enabled_flag
@@ -1520,14 +1632,33 @@ schedule_ulsch_rnti(module_id_t module_idP,
TBS_UL[harq_pid]);
#if (RRC_VERSION >= MAKE_VERSION(14, 0, 0))
if (UE_template->rach_resource_type > 0) { // This is a BL/CE UE allocation
fill_nfapi_ulsch_config_request_emtc(&ul_req_tmp_body->ul_config_pdu_list[ul_req_tmp_body->number_of_pdus], UE_template->rach_resource_type > 2 ? 2 : 1, 1, //total_number_of_repetitions
fill_nfapi_ulsch_config_request_emtc(&ul_req_tmp_body->ul_config_pdu_list[ul_req_index], UE_template->rach_resource_type > 2 ? 2 : 1, 1, //total_number_of_repetitions
1, //repetition_number
(frameP *
10) +
subframeP);
}
#endif
ul_req_tmp_body->number_of_pdus++;
if(dlsch_flag == 1){
if(cqi_req == 1){
ul_req_tmp_body->ul_config_pdu_list[ul_req_index].pdu_type = NFAPI_UL_CONFIG_ULSCH_CQI_HARQ_RI_PDU_TYPE;
ulsch_harq_information = &ul_req_tmp_body->ul_config_pdu_list[ul_req_index].ulsch_cqi_harq_ri_pdu.harq_information;
ul_req_tmp_body->ul_config_pdu_list[ul_req_index].ulsch_cqi_harq_ri_pdu.initial_transmission_parameters.initial_transmission_parameters_rel8.tl.tag=NFAPI_UL_CONFIG_REQUEST_INITIAL_TRANSMISSION_PARAMETERS_REL8_TAG;
ul_req_tmp_body->ul_config_pdu_list[ul_req_index].ulsch_cqi_harq_ri_pdu.initial_transmission_parameters.initial_transmission_parameters_rel8.n_srs_initial = 0; // last symbol not punctured
ul_req_tmp_body->ul_config_pdu_list[ul_req_index].ulsch_cqi_harq_ri_pdu.initial_transmission_parameters.initial_transmission_parameters_rel8.initial_number_of_resource_blocks = UE_template->nb_rb_ul[harq_pid];
}else{
ul_req_tmp_body->ul_config_pdu_list[ul_req_index].pdu_type = NFAPI_UL_CONFIG_ULSCH_HARQ_PDU_TYPE;
ulsch_harq_information = &ul_req_tmp_body->ul_config_pdu_list[ul_req_index].ulsch_harq_pdu.harq_information;
ul_req_tmp_body->ul_config_pdu_list[ul_req_index].ulsch_harq_pdu.initial_transmission_parameters.initial_transmission_parameters_rel8.tl.tag = NFAPI_UL_CONFIG_REQUEST_INITIAL_TRANSMISSION_PARAMETERS_REL8_TAG;
ul_req_tmp_body->ul_config_pdu_list[ul_req_index].ulsch_harq_pdu.initial_transmission_parameters.initial_transmission_parameters_rel8.n_srs_initial = 0; // last symbol not punctured
ul_req_tmp_body->ul_config_pdu_list[ul_req_index].ulsch_harq_pdu.initial_transmission_parameters.initial_transmission_parameters_rel8.initial_number_of_resource_blocks = UE_template->nb_rb_ul[harq_pid];
}
fill_nfapi_ulsch_harq_information(module_idP, CC_id,rnti, ulsch_harq_information,subframeP);
}else{
ul_req_tmp_body->number_of_pdus++;
}
mac->ul_handle++;
ul_req_tmp_body->tl.tag = NFAPI_UL_CONFIG_REQUEST_BODY_TAG;
+65 -13
View File
@@ -87,7 +87,7 @@
#define PCCH_PAYLOAD_SIZE_MAX 128
#define RAR_PAYLOAD_SIZE_MAX 128
#define SCH_PAYLOAD_SIZE_MAX 4096
#define SCH_PAYLOAD_SIZE_MAX 8192
#define DCH_PAYLOAD_SIZE_MAX 4096
/// Logical channel ids from 36-311 (Note BCCH is not specified in 36-311, uses the same as first DRB)
@@ -130,7 +130,7 @@
/*!\brief Maximum number od control elemenets */
#define MAX_NUM_CE 5
/*!\brief Maximum number of random access process */
#if defined(USRP_REC_PLAY)
#if 0 // #if defined(USRP_REC_PLAY)
#define NB_RA_PROC_MAX 1
#else
#define NB_RA_PROC_MAX 4
@@ -511,7 +511,9 @@ typedef enum {
MSG2,
WAITMSG3,
MSG4,
WAITMSG4ACK
WAITMSG4ACK,
MSGCRNTI,
MSGCRNTI_ACK
} RA_state;
/*!\brief UE ULSCH scheduling states*/
@@ -541,6 +543,12 @@ typedef enum {
CBA_RS /// random allocation
} CBA_POLICY;
/*!\brief scheduler mode */
typedef enum {
SCHED_MODE_DEFAULT = 0, /// default cheduler
SCHED_MODE_FAIR_RR /// fair raund robin
} SCHEDULER_MODES;
/*! \brief temporary struct for ULSCH sched */
typedef struct {
@@ -984,7 +992,9 @@ typedef struct {
uint8_t aperiodic_wideband_cqi1[NFAPI_CC_MAX];
uint8_t aperiodic_wideband_pmi1[NFAPI_CC_MAX];
uint8_t dl_cqi[NFAPI_CC_MAX];
int32_t uplane_inactivity_timer;
int32_t uplane_inactivity_timer;
uint8_t crnti_reconfigurationcomplete_flag;
uint8_t cqi_req_flag;
} UE_sched_ctrl;
/*! \brief eNB template for the Random access information */
typedef struct {
@@ -1043,6 +1053,8 @@ typedef struct {
uint8_t msg2_narrowband;
uint8_t msg34_narrowband;
#endif
int32_t crnti_rrc_mui;
int8_t crnti_harq_pid;
} RA_t;
@@ -1092,6 +1104,22 @@ typedef struct {
} UE_list_t;
/*! \brief deleting control information*/
typedef struct {
///rnti of UE
rnti_t rnti;
///remove UE context flag
boolean_t removeContextFlg;
} UE_free_ctrl;
/*! \brief REMOVE UE list used by eNB to order UEs/CC for deleting*/
typedef struct {
/// deleting control info
UE_free_ctrl UE_free_ctrl[NUMBER_OF_UE_MAX+1];
int num_UEs;
int head_freelist; ///the head position of the delete list
int tail_freelist; ///the tail position of the delete list
} UE_free_list_t;
/*! \brief eNB common channels */
typedef struct {
int physCellId;
@@ -1180,7 +1208,7 @@ typedef struct eNB_MAC_INST_s {
/// Common cell resources
COMMON_channels_t common_channels[NFAPI_CC_MAX];
/// current PDU index (BCH,MCH,DLSCH)
uint16_t pdu_index[NFAPI_CC_MAX];
int16_t pdu_index[NFAPI_CC_MAX];
/// NFAPI Config Request Structure
nfapi_config_request_t config[NFAPI_CC_MAX];
@@ -1201,9 +1229,9 @@ typedef struct eNB_MAC_INST_s {
nfapi_ul_config_request_t UL_req_tmp[NFAPI_CC_MAX][10];
/// Preallocated HI_DCI0 pdu list
nfapi_hi_dci0_request_pdu_t
hi_dci0_pdu_list[NFAPI_CC_MAX][MAX_NUM_HI_DCI0_PDU];
hi_dci0_pdu_list[NFAPI_CC_MAX][10][MAX_NUM_HI_DCI0_PDU];
/// NFAPI HI/DCI0 Config Request Structure
nfapi_hi_dci0_request_t HI_DCI0_req[NFAPI_CC_MAX];
nfapi_hi_dci0_request_t HI_DCI0_req[NFAPI_CC_MAX][10];
/// Prealocated TX pdu list
nfapi_tx_request_pdu_t
tx_request_pdu[NFAPI_CC_MAX][MAX_NUM_TX_REQUEST_PDU];
@@ -1242,6 +1270,13 @@ typedef struct eNB_MAC_INST_s {
time_stats_t rx_ulsch_sdu; // include rlc_data_ind
/// processing time of eNB PCH scheduler
time_stats_t schedule_pch;
UE_free_list_t UE_free_list;
/// for scheduling selection
SCHEDULER_MODES scheduler_mode;
int32_t puSch10xSnr;
int32_t puCch10xSnr;
} eNB_MAC_INST;
/*
@@ -1400,12 +1435,12 @@ typedef struct {
RAR_PDU RAR_pdu;
/// Incoming DLSCH pdu for PHY
DLSCH_PDU DLSCH_pdu[MAX_MOBILES_PER_ENB][2];
#ifdef Rel14
int sltx_active;
SLSCH_t slsch;
SLDCH_t sldch;
ULSCH_PDU slsch_pdu;
int slsch_lcid;
#if (RRC_VERSION >= MAKE_VERSION(14, 0, 0))
int sltx_active;
SLSCH_t slsch;
SLDCH_t sldch;
ULSCH_PDU slsch_pdu;
int slsch_lcid;
#endif
/// number of attempt for rach
uint8_t RA_attempt_number;
@@ -1513,6 +1548,23 @@ typedef struct {
uint8_t n_adj_cells;
} neigh_cell_id_t;
typedef struct {
volatile uint8_t flag;
rnti_t rnti;
mui_t rrc_eNB_mui;
}RRC_release_ctrl;
typedef struct {
uint16_t num_UEs;
RRC_release_ctrl RRC_release_ctrl[NUMBER_OF_UE_MAX];
} RRC_release_list_t;
typedef struct {
uint8_t rrc_mui_num;
mui_t rrc_mui[128];
}mac_rlc_am_muilist_t;
#include "mac_proto.h"
/*@}*/
#endif /*__LAYER2_MAC_DEFS_H__ */
+10
View File
@@ -76,4 +76,14 @@ extern uint32_t RRC_CONNECTION_FLAG;
extern uint8_t rb_table[34];
#if defined(PRE_SCD_THREAD)
extern uint16_t pre_nb_rbs_required[2][MAX_NUM_CCs][NUMBER_OF_UE_MAX];
extern uint8_t dlsch_ue_select_tbl_in_use;
extern uint8_t new_dlsch_ue_select_tbl_in_use;
extern boolean_t pre_scd_activeUE[NUMBER_OF_UE_MAX];
extern eNB_UE_STATS pre_scd_eNB_UE_stats[MAX_NUM_CCs][NUMBER_OF_UE_MAX];
#endif
extern mac_rlc_am_muilist_t rlc_am_mui;
extern SCHEDULER_MODES global_scheduler_mode;
#endif //DEF_H
+31 -12
View File
@@ -135,8 +135,7 @@ void schedule_ulsch_rnti(module_id_t module_idP, slice_id_t slice_idP, frame_t f
@param subframe Index of subframe
@param mbsfn_flag Indicates that this subframe is for MCH/MCCH
*/
void fill_DLSCH_dci(module_id_t module_idP, frame_t frameP,
sub_frame_t subframe, int *mbsfn_flag);
void fill_DLSCH_dci(module_id_t module_idP,frame_t frameP,sub_frame_t subframe,int *mbsfn_flag);
/** \brief UE specific DLSCH scheduling. Retrieves next ue to be schduled from round-robin scheduler and gets the appropriate harq_pid for the subframe from PHY. If the process is active and requires a retransmission, it schedules the retransmission with the same PRB count and MCS as the first transmission. Otherwise it consults RLC for DCCH/DTCH SDUs (status with maximum number of available PRBS), builds the MAC header (timing advance sent by default) and copies
@param Mod_id Instance ID of eNB
@@ -314,6 +313,9 @@ void cancel_ra_proc(module_id_t module_idP, int CC_id, frame_t frameP,
@param Msg3_frame frame where scheduling takes place
@param Msg3_subframe subframe where scheduling takes place
*/
void clear_ra_proc(module_id_t module_idP, int CC_id, frame_t frameP);
void set_msg3_subframe(module_id_t Mod_id,
int CC_id,
int frame,
@@ -427,7 +429,7 @@ int get_nCCE_offset(int *CCE_table,
const unsigned short rnti,
const unsigned char subframe);
int allocate_CCEs(int module_idP, int CC_idP, int subframe, int test_only);
int allocate_CCEs(int module_idP, int CC_idP, frame_t frameP, sub_frame_t subframeP, int test_only);
boolean_t CCE_allocation_infeasible(int module_idP,
int CC_idP,
@@ -543,7 +545,7 @@ void ue_send_mch_sdu(module_id_t module_idP, uint8_t CC_id, frame_t frameP,
@param[out] sync_area return the sync area
@param[out] mcch_active flag indicating whether this MCCH is active in this SF
*/
int ue_query_mch(uint8_t Mod_id, uint8_t CC_id, uint32_t frame,
int ue_query_mch(module_id_t Mod_id, uint8_t CC_id, uint32_t frame,
sub_frame_t subframe, uint8_t eNB_index,
uint8_t * sync_area, uint8_t * mcch_active);
@@ -683,9 +685,17 @@ int UE_num_active_CC(UE_list_t * listP, int ue_idP);
int UE_PCCID(module_id_t mod_idP, int ue_idP);
rnti_t UE_RNTI(module_id_t mod_idP, int ue_idP);
uint8_t find_rb_table_index(uint8_t average_rbs);
void set_ul_DAI(int module_idP,
int UE_idP,
int CC_idP,
int frameP,
int subframeP);
void ulsch_scheduler_pre_processor(module_id_t module_idP, slice_id_t slice_id, int frameP,
sub_frame_t subframeP,
unsigned char sched_subframeP,
uint16_t * first_rb);
void store_ulsch_buffer(module_id_t module_idP, int frameP,
sub_frame_t subframeP);
@@ -694,6 +704,7 @@ void assign_max_mcs_min_rb(module_id_t module_idP, int slice_id, int frameP,
sub_frame_t subframeP, uint16_t * first_rb);
void adjust_bsr_info(int buffer_occupancy, uint16_t TBS,
UE_TEMPLATE * UE_template);
int phy_stats_exist(module_id_t Mod_id, int rnti);
void sort_UEs(module_id_t Mod_idP, slice_id_t slice_id, int frameP, sub_frame_t subframeP);
@@ -860,7 +871,7 @@ uint32_t allocate_prbs_sub(int nb_rb, int N_RB_DL, int N_RBG,
uint8_t * rballoc);
void update_ul_dci(module_id_t module_idP, uint8_t CC_id, rnti_t rnti,
uint8_t dai);
uint8_t dai, sub_frame_t subframe);
int get_bw_index(module_id_t module_id, uint8_t CC_id);
@@ -1018,10 +1029,10 @@ int rrc_mac_config_req_ue(module_id_t module_idP,
,
uint8_t num_active_cba_groups, uint16_t cba_rnti
#endif
#if defined(Rel14)
,config_action_t config_action
,const uint32_t * const sourceL2Id
,const uint32_t * const destinationL2Id
#if (RRC_VERSION >= MAKE_VERSION(14, 0, 0))
,config_action_t config_action
,const uint32_t * const sourceL2Id
,const uint32_t * const destinationL2Id
#endif
);
@@ -1091,7 +1102,7 @@ void extract_pusch_csi(module_id_t mod_idP, int CC_idP, int UE_id,
uint16_t fill_nfapi_tx_req(nfapi_tx_request_body_t * tx_req_body,
uint16_t absSF, uint16_t pdu_length,
uint16_t pdu_index, uint8_t * pdu);
int16_t pdu_index, uint8_t * pdu);
void fill_nfapi_ulsch_config_request_rel8(nfapi_ul_config_request_pdu_t *
ul_config_pdu, uint8_t cqi_req,
@@ -1131,7 +1142,7 @@ void program_dlsch_acknak(module_id_t module_idP, int CC_idP, int UE_idP,
void fill_nfapi_dlsch_config(eNB_MAC_INST * eNB,
nfapi_dl_config_request_body_t * dl_req,
uint16_t length, uint16_t pdu_index,
uint16_t length, int16_t pdu_index,
uint16_t rnti,
uint8_t resource_allocation_type,
uint8_t
@@ -1165,7 +1176,8 @@ void fill_nfapi_ulsch_harq_information(module_id_t module_idP,
int CC_idP,
uint16_t rntiP,
nfapi_ul_config_ulsch_harq_information
* harq_information);
* harq_information,
sub_frame_t subframeP);
uint16_t fill_nfapi_uci_acknak(module_id_t module_idP,
int CC_idP,
@@ -1214,6 +1226,13 @@ uint32_t from_earfcn(int eutra_bandP, uint32_t dl_earfcn);
int32_t get_uldl_offset(int eutra_bandP);
int l2_init_ue(int eMBMS_active, char *uecap_xer, uint8_t cba_group_active,
uint8_t HO_active);
#if defined(PRE_SCD_THREAD)
void pre_scd_nb_rbs_required( module_id_t module_idP,
frame_t frameP,
sub_frame_t subframeP,
int min_rb_unit[MAX_NUM_CCs],
uint16_t nb_rbs_required[MAX_NUM_CCs][NUMBER_OF_UE_MAX]);
#endif
/*Slice related functions */
uint16_t flexran_nb_rbs_allowed_slice(float rb_percentage, int total_rbs);
+2
View File
@@ -142,4 +142,6 @@ DCI2_5MHz_2A_TDD_t DLSCH_alloc_pdu2;
DCI1E_5MHz_2A_M10PRB_TDD_t DLSCH_alloc_pdu1E;
mac_rlc_am_muilist_t rlc_am_mui;
SCHEDULER_MODES global_scheduler_mode;
#endif
+20 -15
View File
@@ -58,23 +58,27 @@ void mac_top_init_eNB(void)
RC.nb_macrlc_inst);
if (RC.nb_macrlc_inst > 0) {
RC.mac =
(eNB_MAC_INST **) malloc16(RC.nb_macrlc_inst *
sizeof(eNB_MAC_INST *));
if (RC.mac == NULL){
RC.mac =
(eNB_MAC_INST **) malloc16(RC.nb_macrlc_inst *
sizeof(eNB_MAC_INST *));
}
AssertFatal(RC.mac != NULL,
"can't ALLOCATE %zu Bytes for %d eNB_MAC_INST with size %zu \n",
RC.nb_macrlc_inst * sizeof(eNB_MAC_INST *),
RC.nb_macrlc_inst, sizeof(eNB_MAC_INST));
for (i = 0; i < RC.nb_macrlc_inst; i++) {
RC.mac[i] = (eNB_MAC_INST *) malloc16(sizeof(eNB_MAC_INST));
AssertFatal(RC.mac != NULL,
"can't ALLOCATE %zu Bytes for %d eNB_MAC_INST with size %zu \n",
RC.nb_macrlc_inst * sizeof(eNB_MAC_INST *),
RC.nb_macrlc_inst, sizeof(eNB_MAC_INST));
LOG_D(MAC,
"[MAIN] ALLOCATE %zu Bytes for %d eNB_MAC_INST @ %p\n",
sizeof(eNB_MAC_INST), RC.nb_macrlc_inst, RC.mac);
bzero(RC.mac[i], sizeof(eNB_MAC_INST));
if (RC.mac[i] == NULL) {
RC.mac[i] = (eNB_MAC_INST *) malloc16(sizeof(eNB_MAC_INST));
AssertFatal(RC.mac[i] != NULL,
"can't ALLOCATE %zu Bytes for %d eNB_MAC_INST with size %zu \n",
RC.nb_macrlc_inst * sizeof(eNB_MAC_INST *),
RC.nb_macrlc_inst, sizeof(eNB_MAC_INST));
LOG_D(MAC,
"[MAIN] ALLOCATE %zu Bytes for %d eNB_MAC_INST @ %p\n",
sizeof(eNB_MAC_INST), RC.nb_macrlc_inst, RC.mac);
bzero(RC.mac[i], sizeof(eNB_MAC_INST));
}
RC.mac[i]->Mod_id = i;
for (j = 0; j < MAX_NUM_CCs; j++) {
RC.mac[i]->DL_req[j].dl_config_request_body.
@@ -85,9 +89,10 @@ void mac_top_init_eNB(void)
RC.mac[i]->UL_req_tmp[j][k].
ul_config_request_body.ul_config_pdu_list =
RC.mac[i]->ul_config_pdu_list_tmp[j][k];
RC.mac[i]->HI_DCI0_req[j].
hi_dci0_request_body.hi_dci0_pdu_list =
RC.mac[i]->hi_dci0_pdu_list[j];
for(int sf=0;sf<10;sf++){
RC.mac[i]->HI_DCI0_req[j][sf].hi_dci0_request_body.hi_dci0_pdu_list =RC.mac[i]->hi_dci0_pdu_list[j][sf];
}
RC.mac[i]->TX_req[j].tx_request_body.tx_pdu_list =
RC.mac[i]->tx_request_pdu[j];
RC.mac[i]->ul_handle = 0;
+20 -18
View File
@@ -129,12 +129,12 @@ store_dlsch_buffer(module_id_t Mod_id, slice_id_t slice_id, frame_t frameP,
rnti = UE_RNTI(Mod_id, UE_id);
for (i = 0; i < MAX_NUM_LCID; i++) { // loop over all the logical channels
for (i = 0; i < MAX_NUM_LCID; i++) { // loop over all the logical channels
rlc_status =
mac_rlc_status_ind(Mod_id, rnti, Mod_id, frameP, subframeP,
ENB_FLAG_YES, MBMS_FLAG_NO, i, 0
#ifdef Rel14
#if (RRC_VERSION >= MAKE_VERSION(14, 0, 0))
,0, 0
#endif
);
@@ -318,10 +318,8 @@ maxround(module_id_t Mod_id, uint16_t rnti, int frame,
cc = &RC.mac[Mod_id]->common_channels[CC_id];
UE_id = find_UE_id(Mod_id, rnti);
if (cc->tdd_Config)
harq_pid = ((frame * 10) + subframe) % 10;
else
harq_pid = ((frame * 10) + subframe) & 7;
harq_pid = frame_subframe2_dl_harq_pid(cc->tdd_Config,frame ,subframe);
round = UE_list->UE_sched_ctrl[UE_id].round[CC_id][harq_pid];
if (round > round_max) {
@@ -501,8 +499,10 @@ void sort_UEs(module_id_t Mod_idP, slice_id_t slice_id, int frameP, sub_frame_t
continue;
if ((rnti = UE_RNTI(Mod_idP, i)) == NOT_A_RNTI)
continue;
#if 0
if (UE_list->UE_sched_ctrl[i].ul_out_of_sync == 1)
continue;
#endif
if (!ue_slice_membership(i, slice_id))
continue;
@@ -638,8 +638,10 @@ void dlsch_scheduler_pre_processor_accounting(module_id_t Mod_id,
if (rnti == NOT_A_RNTI)
continue;
#if 0
if (UE_list->UE_sched_ctrl[UE_id].ul_out_of_sync == 1)
continue;
#endif
if (!ue_slice_membership(UE_id, slice_id))
continue;
@@ -719,8 +721,10 @@ void dlsch_scheduler_pre_processor_accounting(module_id_t Mod_id,
if (rnti == NOT_A_RNTI)
continue;
#if 0
if (UE_list->UE_sched_ctrl[UE_id].ul_out_of_sync == 1)
continue;
#endif
if (!ue_slice_membership(UE_id, slice_id))
continue;
@@ -728,11 +732,7 @@ void dlsch_scheduler_pre_processor_accounting(module_id_t Mod_id,
CC_id = UE_list->ordered_CCids[ii][UE_id];
ue_sched_ctl = &UE_list->UE_sched_ctrl[UE_id];
cc = &RC.mac[Mod_id]->common_channels[CC_id];
// TODO Can we use subframe2harqpid() here?
if (cc->tdd_Config)
harq_pid = ((frameP * 10) + subframeP) % 10;
else
harq_pid = ((frameP * 10) + subframeP) & 7;
harq_pid = frame_subframe2_dl_harq_pid(cc->tdd_Config,frameP ,subframeP);
round = ue_sched_ctl->round[CC_id][harq_pid];
// control channel or retransmission
@@ -797,8 +797,10 @@ void dlsch_scheduler_pre_processor_accounting(module_id_t Mod_id,
// LOG_D(MAC,"UE %d rnti 0x\n", UE_id, rnti );
if (rnti == NOT_A_RNTI)
continue;
#if 0
if (UE_list->UE_sched_ctrl[UE_id].ul_out_of_sync == 1)
continue;
#endif
if (!ue_slice_membership(UE_id, slice_id))
continue;
@@ -1401,11 +1403,12 @@ dlsch_scheduler_pre_processor_allocate(module_id_t Mod_id,
/// ULSCH PRE_PROCESSOR
void
ulsch_scheduler_pre_processor(module_id_t module_idP,
slice_id_t slice_id, int frameP,
sub_frame_t subframeP, uint16_t * first_rb)
void ulsch_scheduler_pre_processor(module_id_t module_idP,
slice_id_t slice_id,
int frameP,
sub_frame_t subframeP,
unsigned char sched_subframeP,
uint16_t *first_rb)
{
int16_t i;
@@ -1530,7 +1533,7 @@ ulsch_scheduler_pre_processor(module_id_t module_idP,
CC_id = UE_list->ordered_ULCCids[n][UE_id];
UE_template = &UE_list->UE_template[CC_id][UE_id];
harq_pid = subframe2harqpid(&RC.mac[module_idP]->common_channels[CC_id],
frameP, subframeP);
frameP, sched_subframeP);
// mac_xface->get_ue_active_harq_pid(module_idP,CC_id,rnti,frameP,subframeP,&harq_pid,&round,openair_harq_UL);
@@ -1617,7 +1620,6 @@ ulsch_scheduler_pre_processor(module_id_t module_idP,
#endif
}
void
assign_max_mcs_min_rb(module_id_t module_idP, int slice_id, int frameP,
sub_frame_t subframeP, uint16_t * first_rb)
+2 -2
View File
@@ -410,7 +410,7 @@ PRACH_RESOURCES_t *ue_get_rach(module_id_t module_idP, int CC_id,
UE_mac_inst[module_idP].crnti,
eNB_indexP, frameP, subframeP,
ENB_FLAG_NO, MBMS_FLAG_NO, DCCH, 6
#ifdef Rel14
#if (RRC_VERSION >= MAKE_VERSION(14, 0, 0))
,0, 0
#endif
);
@@ -431,7 +431,7 @@ PRACH_RESOURCES_t *ue_get_rach(module_id_t module_idP, int CC_id,
sdu_lengths[0] = mac_rlc_data_req(module_idP, UE_mac_inst[module_idP].crnti, eNB_indexP, frameP, ENB_FLAG_NO, MBMS_FLAG_NO, DCCH, 6, //not used
(char *) &ulsch_buff[0]
#ifdef Rel14
#if (RRC_VERSION >= MAKE_VERSION(14, 0, 0))
,0,
0
#endif
+11 -1
View File
@@ -71,7 +71,16 @@ fill_rar(const module_id_t module_idP,
ra->timing_offset /= 16; //T_A = N_TA/16, where N_TA should be on a 30.72Msps
rar[0] = (uint8_t) (ra->timing_offset >> (2 + 4)); // 7 MSBs of timing advance + divide by 4
rar[1] = (uint8_t) (ra->timing_offset << (4 - 2)) & 0xf0; // 4 LSBs of timing advance + divide by 4
ra->msg3_first_rb = 6;
COMMON_channels_t *cc = &RC.mac[module_idP]->common_channels[CC_id];
if(N_RB_UL == 25){
ra->msg3_first_rb = 1;
}else{
if (cc->tdd_Config && N_RB_UL == 100) {
ra->msg3_first_rb = 3;
} else {
ra->msg3_first_rb = 2;
}
}
ra->msg3_nb_rb = 1;
uint16_t rballoc = mac_computeRIV(N_RB_UL, ra->msg3_first_rb, ra->msg3_nb_rb); // first PRB only for UL Grant
rar[1] |= (rballoc >> 7) & 7; // Hopping = 0 (bit 3), 3 MSBs of rballoc
@@ -80,6 +89,7 @@ fill_rar(const module_id_t module_idP,
ra->msg3_TPC = 3;
ra->msg3_ULdelay = 0;
ra->msg3_cqireq = 0;
ra->msg3_round = 0;
rar[2] |= ((ra->msg3_mcs & 0x8) >> 3); // mcs 10
rar[3] =
(((ra->msg3_mcs & 0x7) << 5)) | ((ra->msg3_TPC & 7) << 2) |
+3 -3
View File
@@ -1853,7 +1853,7 @@ ue_get_sdu(module_id_t module_idP, int CC_id, frame_t frameP,
lcid,
buflen_remain,
(char *)&ulsch_buff[sdu_length_total]
#ifdef Rel14
#if (RRC_VERSION >= MAKE_VERSION(14, 0, 0))
,0,
0
#endif
@@ -2840,7 +2840,7 @@ update_bsr(module_id_t module_idP, frame_t frameP,
rlc_status = mac_rlc_status_ind(module_idP, UE_mac_inst[module_idP].crnti,eNB_index,frameP,subframeP,ENB_FLAG_NO,MBMS_FLAG_NO,
lcid,
0xFFFF //TBS is not used in RLC at this step, set a special value for debug
#ifdef Rel14
#if (RRC_VERSION >= MAKE_VERSION(14, 0, 0))
,0, 0
#endif
);
@@ -3291,7 +3291,7 @@ SLSCH_t *ue_get_slsch(module_id_t module_idP,int CC_id,frame_t frameP,sub_frame_
ue->slsch_lcid,
req,
(char*)(ue->slsch_pdu.payload + sizeof(SLSCH_SUBHEADER_24_Bit_DST_LONG))
#ifdef Rel14
#if (RRC_VERSION >= MAKE_VERSION(14, 0, 0))
,ue->sourceL2Id,
ue->destinationL2Id
#endif
+4 -4
View File
@@ -83,7 +83,7 @@ boolean_t pdcp_data_req(
const sdu_size_t sdu_buffer_sizeP,
unsigned char *const sdu_buffer_pP,
const pdcp_transmission_mode_t modeP
#ifdef Rel14
#if (RRC_VERSION >= MAKE_VERSION(14, 0, 0))
,const uint32_t * const sourceL2Id
,const uint32_t * const destinationL2Id
#endif
@@ -170,7 +170,7 @@ boolean_t pdcp_data_req(
sdu_buffer_sizeP);
#endif
rlc_status = rlc_data_req(ctxt_pP, srb_flagP, MBMS_FLAG_YES, rb_idP, muiP, confirmP, sdu_buffer_sizeP, pdcp_pdu_p
#ifdef Rel14
#if (RRC_VERSION >= MAKE_VERSION(14, 0, 0))
,NULL, NULL
#endif
);
@@ -360,7 +360,7 @@ boolean_t pdcp_data_req(
LOG_F(PDCP,"\n");
#endif
rlc_status = rlc_data_req(ctxt_pP, srb_flagP, MBMS_FLAG_NO, rb_idP, muiP, confirmP, pdcp_pdu_size, pdcp_pdu_p
#ifdef Rel14
#if (RRC_VERSION >= MAKE_VERSION(14, 0, 0))
,sourceL2Id
,destinationL2Id
#endif
@@ -982,7 +982,7 @@ pdcp_run (
RRC_DCCH_DATA_REQ (msg_p).sdu_size,
RRC_DCCH_DATA_REQ (msg_p).sdu_p,
RRC_DCCH_DATA_REQ (msg_p).mode
#ifdef Rel14
#if (RRC_VERSION >= MAKE_VERSION(14, 0, 0))
, NULL, NULL
#endif
);
+4 -4
View File
@@ -260,7 +260,7 @@ public_pdcp(boolean_t pdcp_data_req(
const sdu_size_t sdu_buffer_size,
unsigned char* const sdu_buffer,
const pdcp_transmission_mode_t mode
#ifdef Rel14
#if (RRC_VERSION >= MAKE_VERSION(14, 0, 0))
,const uint32_t * const sourceL2Id
,const uint32_t * const destinationL2Id
#endif
@@ -437,7 +437,7 @@ typedef struct pdcp_data_req_header_s {
sdu_size_t data_size;
signed int inst;
ip_traffic_type_t traffic_type;
#ifdef Rel14
#if (RRC_VERSION >= MAKE_VERSION(14, 0, 0))
uint32_t sourceL2Id;
uint32_t destinationL2Id;
#endif
@@ -448,7 +448,7 @@ typedef struct pdcp_data_ind_header_s {
sdu_size_t data_size;
signed int inst;
ip_traffic_type_t dummy_traffic_type;
#ifdef Rel14
#if (RRC_VERSION >= MAKE_VERSION(14, 0, 0))
uint32_t sourceL2Id;
uint32_t destinationL2Id;
#endif
@@ -462,7 +462,7 @@ struct pdcp_netlink_element_s {
};
//TTN for D2D (PC5S)
#ifdef Rel14
#if (RRC_VERSION >= MAKE_VERSION(14, 0, 0))
#define PDCP_SOCKET_PORT_NO 9999 //temporary value
#define PC5_SIGNALLING_PAYLOAD_SIZE 100 //should be updated with a correct value
int pdcp_pc5_sockfd;
@@ -45,6 +45,7 @@ configure_pdcp_req (struct pdcp_entity *pdcpP, void *rlcP, uint8_t rlc_sap_typeP
mem_block *mb;
mb = get_free_mem_block (sizeof (struct cpdcp_primitive), __func__);
if(mb==NULL) return;
((struct cpdcp_primitive *) mb->data)->type = CPDCP_CONFIG_REQ;
((struct cpdcp_primitive *) mb->data)->primitive.config_req.rlc_sap = rlcP;
((struct cpdcp_primitive *) mb->data)->primitive.config_req.rlc_type_sap = rlc_sap_typeP;
+14 -14
View File
@@ -202,7 +202,7 @@ int pdcp_fifo_flush_sdus(const protocol_ctxt_t* const ctxt_pP)
cont = 0;
//TTN - for D2D (PC5S)
#ifdef Rel14
#if (RRC_VERSION >= MAKE_VERSION(14, 0, 0))
sidelink_pc5s_element *sl_pc5s_msg_recv = NULL;
char send_buf[BUFSIZE];
int rb_id = ((pdcp_data_ind_header_t *)(sdu_p->data))->rb_id;
@@ -452,7 +452,7 @@ int pdcp_fifo_read_input_sdus (const protocol_ctxt_t* const ctxt_pP)
pdcp_data_req(&ctxt, SRB_FLAG_NO, rab_id, RLC_MUI_UNDEFINED,
RLC_SDU_CONFIRM_NO, len, (unsigned char *)nl_rx_buf,
PDCP_TRANSMISSION_MODE_DATA
#ifdef Rel14
#if (RRC_VERSION >= MAKE_VERSION(14, 0, 0))
, NULL, NULL
#endif
);
@@ -488,7 +488,7 @@ int pdcp_fifo_read_input_sdus (const protocol_ctxt_t* const ctxt_pP)
pdcp_t* pdcp_p = NULL;
//TTN for D2D (PC5S)
#ifdef Rel14
#if (RRC_VERSION >= MAKE_VERSION(14, 0, 0))
int prose_addr_len;
char send_buf[BUFSIZE], receive_buf[BUFSIZE];
// Panos: Remove the following definitions due to warnings of unused variables.
@@ -568,7 +568,7 @@ int pdcp_fifo_read_input_sdus (const protocol_ctxt_t* const ctxt_pP)
data_p->pdcp_read_header.data_size,
data_p->data,
pdcp_mode
#ifdef Rel14
#if (RRC_VERSION >= MAKE_VERSION(14, 0, 0))
,NULL, NULL
#endif
);
@@ -596,7 +596,7 @@ int pdcp_fifo_read_input_sdus (const protocol_ctxt_t* const ctxt_pP)
data_p->pdcp_read_header.data_size,
data_p->data,
PDCP_TRANSMISSION_MODE_DATA
#ifdef Rel14
#if (RRC_VERSION >= MAKE_VERSION(14, 0, 0))
,NULL, NULL
#endif
);
@@ -613,7 +613,7 @@ int pdcp_fifo_read_input_sdus (const protocol_ctxt_t* const ctxt_pP)
data_p->pdcp_read_header.data_size,
data_p->data,
PDCP_TRANSMISSION_MODE_DATA
#ifdef Rel14
#if (RRC_VERSION >= MAKE_VERSION(14, 0, 0))
,NULL, NULL
#endif
);
@@ -633,7 +633,7 @@ int pdcp_fifo_read_input_sdus (const protocol_ctxt_t* const ctxt_pP)
//TTN for D2D (PC5S)
#ifdef Rel14
#if (RRC_VERSION >= MAKE_VERSION(14, 0, 0))
prose_addr_len = sizeof(prose_pdcp_addr);
// receive a message from ProSe App
memset(receive_buf, 0, BUFSIZE);
@@ -775,7 +775,7 @@ int pdcp_fifo_read_input_sdus (const protocol_ctxt_t* const ctxt_pP)
pc5s_header->data_size,
(unsigned char *)receive_buf,
PDCP_TRANSMISSION_MODE_DATA
#ifdef Rel14
#if (RRC_VERSION >= MAKE_VERSION(14, 0, 0))
,&pc5s_header->sourceL2Id
,&pc5s_header->destinationL2Id
#endif
@@ -833,7 +833,7 @@ int pdcp_fifo_read_input_sdus (const protocol_ctxt_t* const ctxt_pP)
pc5s_header->data_size,
(unsigned char *)receive_buf,
PDCP_TRANSMISSION_MODE_DATA
#ifdef Rel14
#if (RRC_VERSION >= MAKE_VERSION(14, 0, 0))
,&pc5s_header->sourceL2Id
,&pc5s_header->destinationL2Id
#endif
@@ -980,7 +980,7 @@ int pdcp_fifo_read_input_sdus (const protocol_ctxt_t* const ctxt_pP)
pdcp_read_header_g.data_size,
(unsigned char *)NLMSG_DATA(nas_nlh_rx),
PDCP_TRANSMISSION_MODE_DATA
#ifdef Rel14
#if (RRC_VERSION >= MAKE_VERSION(14, 0, 0))
,NULL, NULL
#endif
);
@@ -1017,7 +1017,7 @@ int pdcp_fifo_read_input_sdus (const protocol_ctxt_t* const ctxt_pP)
pdcp_read_header_g.data_size,
(unsigned char *)NLMSG_DATA(nas_nlh_rx),
PDCP_TRANSMISSION_MODE_DATA
#ifdef Rel14
#if (RRC_VERSION >= MAKE_VERSION(14, 0, 0))
,NULL, NULL
#endif
);
@@ -1083,7 +1083,7 @@ int pdcp_fifo_read_input_sdus (const protocol_ctxt_t* const ctxt_pP)
pdcp_read_header_g.data_size,
(unsigned char *)NLMSG_DATA(nas_nlh_rx),
PDCP_TRANSMISSION_MODE_DATA
#ifdef Rel14
#if (RRC_VERSION >= MAKE_VERSION(14, 0, 0))
,&pdcp_read_header_g.sourceL2Id
,&pdcp_read_header_g.destinationL2Id
#endif
@@ -1141,7 +1141,7 @@ int pdcp_fifo_read_input_sdus (const protocol_ctxt_t* const ctxt_pP)
pdcp_read_header_g.data_size,
(unsigned char *)NLMSG_DATA(nas_nlh_rx),
PDCP_TRANSMISSION_MODE_DATA
#ifdef Rel14
#if (RRC_VERSION >= MAKE_VERSION(14, 0, 0))
,&pdcp_read_header_g.sourceL2Id
,&pdcp_read_header_g.destinationL2Id
#endif
@@ -1189,7 +1189,7 @@ void pdcp_fifo_read_input_sdus_from_otg (const protocol_ctxt_t* const ctxt_pP)
}
//TTN for D2D (PC5S)
#ifdef Rel14
#if (RRC_VERSION >= MAKE_VERSION(14, 0, 0))
void
pdcp_pc5_socket_init() {
@@ -53,7 +53,7 @@ extern int reception_from_rohc_bs(void);
extern BOOL pdcp_data_ind (module_id_t module_idP, rb_id_t rab_idP, sdu_size_t data_sizeP, mem_block_t * sduP, uint8_t is_data_plane);
extern BOOL pdcp_data_req (module_id_t module_id, uint32_t frame, uint8_t eNB_flag, rb_id_t rab_id, uint32_t muiP, uint32_t confirmP, sdu_size_t sdu_buffer_size, unsigned char* sdu_buffer,
uint8_t is_data_pdu
#ifdef Rel14
#if (RRC_VERSION >= MAKE_VERSION(14, 0, 0))
,const uint32_t * const sourceL2Id
,const uint32_t * const destinationL2Id
#endif
+4 -2
View File
@@ -509,6 +509,7 @@ rlc_am_rx (
default:
LOG_E(RLC, PROTOCOL_RLC_AM_CTXT_FMT" TX UNKNOWN PROTOCOL STATE 0x%02X\n", PROTOCOL_RLC_AM_CTXT_ARGS(ctxt_pP, rlc), rlc->protocol_state);
list_free (&data_indP.data);
}
}
@@ -551,7 +552,9 @@ rlc_am_mac_status_indication (
rlc->last_absolute_subframe_status_indication = PROTOCOL_CTXT_TIME_MILLI_SECONDS(ctxt_pP);
rlc->nb_bytes_requested_by_mac = tb_sizeP;
if (tb_sizeP > 0) {
rlc->nb_bytes_requested_by_mac = tb_sizeP;
}
status_resp.buffer_occupancy_in_bytes = rlc_am_get_buffer_occupancy_in_bytes(ctxt_pP, rlc);
@@ -585,7 +588,6 @@ rlc_am_mac_status_indication (
sdu_size = ((rlc_am_tx_sdu_management_t *) (rlc->input_sdus[rlc->current_sdu_index].mem_block->data))->sdu_size;
sdu_remaining_size = ((rlc_am_tx_sdu_management_t *) (rlc->input_sdus[rlc->current_sdu_index].mem_block->data))->sdu_remaining_size;
status_resp.head_sdu_remaining_size_to_send = sdu_remaining_size;
if (sdu_size == sdu_remaining_size) {
+16 -2
View File
@@ -42,8 +42,17 @@ void rlc_am_free_in_sdu(
{
if (index_in_bufferP <= RLC_AM_SDU_CONTROL_BUFFER_SIZE) {
/* BugFix: SDU shall have been already freed during initial PDU segmentation or concatenation !! */
//Assertion(eNB)_PRAN_DesignDocument_annex No.761
if(rlcP->input_sdus[index_in_bufferP].mem_block != NULL)
{
LOG_E(RLC, "RLC AM Tx SDU Conf: Data Part is not empty index=%d LcId=%d\n",
index_in_bufferP,rlcP->channel_id);
return;
}
/*
AssertFatal(rlcP->input_sdus[index_in_bufferP].mem_block == NULL, "RLC AM Tx SDU Conf: Data Part is not empty index=%d LcId=%d\n",
index_in_bufferP,rlcP->channel_id);
*/
/*
if (rlcP->input_sdus[index_in_bufferP].mem_block != NULL) {
free_mem_block(rlcP->input_sdus[index_in_bufferP].mem_block, __func__);
@@ -121,8 +130,13 @@ rlc_am_pdu_sdu_data_cnf(
for (pdu_sdu_index = 0; pdu_sdu_index < rlc_pP->tx_data_pdu_buffer[snP % RLC_AM_WINDOW_SIZE].nb_sdus; pdu_sdu_index++) {
sdu_index = rlc_pP->tx_data_pdu_buffer[snP % RLC_AM_WINDOW_SIZE].sdus_index[pdu_sdu_index];
assert(sdu_index >= 0);
assert(sdu_index < RLC_AM_SDU_CONTROL_BUFFER_SIZE);
//assert(sdu_index >= 0);
//assert(sdu_index < RLC_AM_SDU_CONTROL_BUFFER_SIZE);
if(sdu_index < 0 || sdu_index >= RLC_AM_SDU_CONTROL_BUFFER_SIZE) {
LOG_E(RLC, "sdu_index error. sdu_index %d, pdu_sdu_index %d\n", sdu_index, pdu_sdu_index);
continue;
}
rlc_pP->input_sdus[sdu_index].nb_pdus_ack += 1;
if ((rlc_pP->input_sdus[sdu_index].nb_pdus_ack == rlc_pP->input_sdus[sdu_index].nb_pdus) &&
@@ -57,7 +57,12 @@ rlc_am_reassembly (
if (rlc_pP->output_sdu_in_construction == NULL) {
rlc_pP->output_sdu_in_construction = get_free_mem_block (RLC_SDU_MAX_SIZE, __func__);
rlc_pP->output_sdu_size_to_write = 0;
assert(rlc_pP->output_sdu_in_construction != NULL);
//assert(rlc_pP->output_sdu_in_construction != NULL);
if(rlc_pP->output_sdu_in_construction == NULL) {
LOG_E(RLC, PROTOCOL_RLC_AM_CTXT_FMT"[REASSEMBLY PAYLOAD] output_sdu_in_construction is NULL\n",
PROTOCOL_RLC_AM_CTXT_ARGS(ctxt_pP,rlc_pP));
return;
}
}
if (rlc_pP->output_sdu_in_construction != NULL) {
@@ -198,10 +203,16 @@ rlc_am_send_sdu (
PROTOCOL_RLC_AM_CTXT_ARGS(ctxt_pP,rlc_pP));
//msg("[RLC_AM][MOD %d] Freeing mem_block ...\n", rlc_pP->module_id);
//free_mem_block (rlc_pP->output_sdu_in_construction, __func__);
//Assertion(eNB)_PRAN_DesignDocument_annex No.764
LOG_E(RLC, PROTOCOL_RLC_AM_CTXT_FMT" SEND SDU REQUESTED %d bytes\n",
PROTOCOL_RLC_AM_CTXT_ARGS(ctxt_pP,rlc_pP),
rlc_pP->output_sdu_size_to_write);
/*
AssertFatal(3==4,
PROTOCOL_RLC_AM_CTXT_FMT" SEND SDU REQUESTED %d bytes",
PROTOCOL_RLC_AM_CTXT_ARGS(ctxt_pP,rlc_pP),
rlc_pP->output_sdu_size_to_write);
*/
}
rlc_pP->output_sdu_size_to_write = 0;
@@ -270,7 +281,9 @@ rlc_am_reassemble_pdu(
break;
default:
assert(0 != 0);
//Assertion(eNB)_PRAN_DesignDocument_annex No.1428
LOG_E(RLC, "RLC_E_FIXED_PART_DATA_FIELD_FOLLOW error pdu_info->fi[%d]\n", pdu_info->fi);
// assert(0 != 0);
}
} else {
switch (pdu_info->fi) {
@@ -386,7 +399,9 @@ rlc_am_reassemble_pdu(
break;
default:
assert(1 != 1);
//Assertion(eNB)_PRAN_DesignDocument_annex No.1429
LOG_E(RLC, "not RLC_E_FIXED_PART_DATA_FIELD_FOLLOW error pdu_info->fi[%d]\n", pdu_info->fi);
// assert(1 != 1);
}
}

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