bugfix in filling dci for rar
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@@ -584,7 +584,7 @@ void nr_generate_Msg2(module_id_t module_idP,
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dci_pdu_rel15[0].time_domain_assignment = time_domain_assignment;
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dci_pdu_rel15[0].vrb_to_prb_mapping = 0;
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dci_pdu_rel15[0].mcs = pdsch_pdu_rel15->mcsIndex[0];
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dci_pdu_rel15[0].tb_scaling = 1;
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dci_pdu_rel15[0].tb_scaling = 0;
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LOG_D(MAC, "[RAPROC] DCI type 1 payload: freq_alloc %d (%d,%d,%d), time_alloc %d, vrb to prb %d, mcs %d tb_scaling %d \n",
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dci_pdu_rel15[0].frequency_domain_assignment,
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@@ -598,7 +598,7 @@ void nr_generate_Msg2(module_id_t module_idP,
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nr_configure_pdcch(pdcch_pdu_rel15, 0, ss, scc, bwp);
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LOG_D(MAC, "Frame %d: Subframe %d : Adding common DL DCI for RA_RNTI %x CCEIndex %d\n", frameP, slotP, RA_rnti, CCEIndex);
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LOG_I(MAC, "Frame %d: Subframe %d : Adding common DL DCI for RA_RNTI %x CCEIndex %d\n", frameP, slotP, RA_rnti, CCEIndex);
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dci_pdu->RNTI[numDlDci] = RA_rnti;
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dci_pdu->ScramblingId[numDlDci] = *scc->physCellId;
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@@ -608,7 +608,6 @@ void nr_generate_Msg2(module_id_t module_idP,
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dci_pdu->CceIndex[numDlDci] = CCEIndex;
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dci_pdu->beta_PDCCH_1_0[numDlDci] = 0;
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dci_pdu->powerControlOffsetSS[numDlDci] = 1;
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dci_formats[0] = NR_DL_DCI_FORMAT_1_0;
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rnti_types[0] = NR_RNTI_RA;
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@@ -620,9 +619,9 @@ void nr_generate_Msg2(module_id_t module_idP,
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pdcch_pdu_rel15->StartSymbolIndex,
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pdcch_pdu_rel15->DurationSymbols);
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pdcch_pdu_rel15->numDlDci++;
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dci_pdu->PayloadSizeBits[0] = nr_dci_size(dci_formats[0], rnti_types[0], dci10_bw);
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fill_dci_pdu_rel15(pdcch_pdu_rel15, &dci_pdu_rel15[0], dci_formats, rnti_types,dci10_bw);
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pdcch_pdu_rel15->numDlDci++;
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dl_req->nPDUs+=2;
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@@ -558,34 +558,34 @@ void fill_dci_pdu_rel15(nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15,
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// Freq domain assignment
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fsize = (int)ceil( log2( (N_RB*(N_RB+1))>>1 ) );
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pos=fsize;
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*dci_pdu |= ((dci_pdu_rel15->frequency_domain_assignment&((1<<fsize)-1)) << (dci_size-pos));
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*dci_pdu |= (((uint64_t)dci_pdu_rel15->frequency_domain_assignment&((1<<fsize)-1)) << (dci_size-pos));
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#ifdef DEBUG_FILL_DCI
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LOG_D(MAC,"frequency-domain assignment %d (%d bits) N_RB_BWP %d=> %d (0x%lx)\n",dci_pdu_rel15->frequency_domain_assignment,fsize,N_RB,dci_size-pos,*dci_pdu);
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LOG_I(MAC,"frequency-domain assignment %d (%d bits) N_RB_BWP %d=> %d (0x%lx)\n",dci_pdu_rel15->frequency_domain_assignment,fsize,N_RB,dci_size-pos,*dci_pdu);
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#endif
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// Time domain assignment
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pos+=4;
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*dci_pdu |= (((uint64_t)dci_pdu_rel15->time_domain_assignment&0xf) << (dci_size-pos));
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#ifdef DEBUG_FILL_DCI
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LOG_D(MAC,"time-domain assignment %d (4 bits)=> %d (0x%lx)\n",dci_pdu_rel15->time_domain_assignment,dci_size-pos,*dci_pdu);
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LOG_I(MAC,"time-domain assignment %d (4 bits)=> %d (0x%lx)\n",dci_pdu_rel15->time_domain_assignment,dci_size-pos,*dci_pdu);
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#endif
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// VRB to PRB mapping
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pos++;
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*dci_pdu |= ((uint64_t)dci_pdu_rel15->vrb_to_prb_mapping&0x1)<<(dci_size-pos);
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#ifdef DEBUG_FILL_DCI
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LOG_D(MAC,"vrb to prb mapping %d (1 bits)=> %d (0x%lx)\n",dci_pdu_rel15->vrb_to_prb_mapping,dci_size-pos,*dci_pdu);
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LOG_I(MAC,"vrb to prb mapping %d (1 bits)=> %d (0x%lx)\n",dci_pdu_rel15->vrb_to_prb_mapping,dci_size-pos,*dci_pdu);
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#endif
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// MCS
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pos+=5;
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*dci_pdu |= ((uint64_t)dci_pdu_rel15->mcs&0x1f)<<(dci_size-pos);
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#ifdef DEBUG_FILL_DCI
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LOG_D(MAC,"mcs %d (5 bits)=> %d (0x%lx)\n",dci_pdu_rel15->mcs,dci_size-pos,*dci_pdu);
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LOG_I(MAC,"mcs %d (5 bits)=> %d (0x%lx)\n",dci_pdu_rel15->mcs,dci_size-pos,*dci_pdu);
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#endif
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// TB scaling
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pos+=2;
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*dci_pdu |= ((uint64_t)dci_pdu_rel15->tb_scaling&0x3)<<(dci_size-pos);
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#ifdef DEBUG_FILL_DCI
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LOG_D(MAC,"tb_scaling %d (2 bits)=> %d (0x%lx)\n",dci_pdu_rel15->tb_scaling,dci_size-pos,*dci_pdu);
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LOG_I(MAC,"tb_scaling %d (2 bits)=> %d (0x%lx)\n",dci_pdu_rel15->tb_scaling,dci_size-pos,*dci_pdu);
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#endif
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break;
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