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Refactor inactivity-based PUSCH allocation

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Write a single NR_sched_pusch_t structure in a single statement (where
possible). Assign to sched_ctrl->sched_pusch in one place, where the
post-processing functionality will be called in a follow-up commit.
This commit is contained in:
Robert Schmidt
2025-08-04 09:53:14 +02:00
parent 81b66fae5e
commit 5b39baacc3
1 changed files with 53 additions and 51 deletions
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openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c
+53 -51
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@@ -1879,7 +1879,6 @@ static void pf_ul(module_id_t module_id,
LOG_D(NR_MAC,"pf_ul: preparing UL scheduling for UE %04x\n",UE->rnti); LOG_D(NR_MAC,"pf_ul: preparing UL scheduling for UE %04x\n",UE->rnti);
NR_UE_UL_BWP_t *current_BWP = &UE->current_UL_BWP; NR_UE_UL_BWP_t *current_BWP = &UE->current_UL_BWP;
NR_sched_pusch_t *sched_pusch = &sched_ctrl->sched_pusch;
const NR_mac_dir_stats_t *stats = &UE->mac_stats.ul; const NR_mac_dir_stats_t *stats = &UE->mac_stats.ul;
/* Calculate throughput */ /* Calculate throughput */
@@ -1995,29 +1994,21 @@ static void pf_ul(module_id_t module_id,
continue; continue;
} }
sched_pusch->nrOfLayers = get_ul_nrOfLayers(sched_ctrl, current_BWP->dci_format); int tda = get_ul_tda(nrmac, sched_frame, sched_slot);
sched_pusch->time_domain_allocation = get_ul_tda(nrmac, sched_frame, sched_slot); NR_tda_info_t tda_info = get_ul_tda_info(current_BWP,
sched_pusch->tda_info = get_ul_tda_info(current_BWP,
sched_ctrl->coreset->controlResourceSetId, sched_ctrl->coreset->controlResourceSetId,
sched_ctrl->search_space->searchSpaceType->present, sched_ctrl->search_space->searchSpaceType->present,
TYPE_C_RNTI_, TYPE_C_RNTI_,
sched_pusch->time_domain_allocation); tda);
AssertFatal(sched_pusch->tda_info.valid_tda, "Invalid TDA from get_ul_tda_info\n"); AssertFatal(tda_info.valid_tda, "Invalid TDA from get_ul_tda_info\n");
sched_pusch->dmrs_info = get_ul_dmrs_params(scc, current_BWP, &sched_pusch->tda_info, sched_pusch->nrOfLayers);
int rbStart = 0; // wrt BWP start int rbStart = 0; // wrt BWP start
LOG_D(NR_MAC, LOG_D(NR_MAC, "Looking for min_rb %d RBs, starting at %d\n", min_rb, rbStart);
"Looking for min_rb %d RBs, starting at %d num_dmrs_cdm_grps_no_data %d\n", bwp_info_t bi = get_pusch_bwp_start_size(UE);
min_rb, const uint16_t slbitmap = SL_to_bitmap(tda_info.startSymbolIndex, tda_info.nrOfSymbols);
rbStart, while (rbStart < bi.bwpSize && (rballoc_mask[rbStart + bi.bwpStart] & slbitmap))
sched_pusch->dmrs_info.num_dmrs_cdm_grps_no_data);
bwp_info_t bwp_info = get_pusch_bwp_start_size(UE);
const uint32_t bwpStart = bwp_info.bwpStart;
const uint32_t bwpSize = bwp_info.bwpSize;
const uint16_t slbitmap = SL_to_bitmap(sched_pusch->tda_info.startSymbolIndex, sched_pusch->tda_info.nrOfSymbols);
while (rbStart < bwpSize && (rballoc_mask[rbStart + bwpStart] & slbitmap))
rbStart++; rbStart++;
if (rbStart + min_rb > bwpSize) { if (rbStart + min_rb > bi.bwpSize) {
LOG_D(NR_MAC, LOG_D(NR_MAC,
"[UE %04x][%4d.%2d] could not allocate continuous UL data: no resources (rbStart %d, min_rb %d, bwpSize %d)\n", "[UE %04x][%4d.%2d] could not allocate continuous UL data: no resources (rbStart %d, min_rb %d, bwpSize %d)\n",
UE->rnti, UE->rnti,
@@ -2025,7 +2016,7 @@ static void pf_ul(module_id_t module_id,
slot, slot,
rbStart, rbStart,
min_rb, min_rb,
bwpSize); bi.bwpSize);
reset_beam_status(&nrmac->beam_info, sched_frame, sched_slot, UE->UE_beam_index, slots_per_frame, beam.new_beam); reset_beam_status(&nrmac->beam_info, sched_frame, sched_slot, UE->UE_beam_index, slots_per_frame, beam.new_beam);
reset_beam_status(&nrmac->beam_info, frame, slot, UE->UE_beam_index, slots_per_frame, dci_beam.new_beam); reset_beam_status(&nrmac->beam_info, frame, slot, UE->UE_beam_index, slots_per_frame, dci_beam.new_beam);
continue; continue;
@@ -2034,47 +2025,58 @@ static void pf_ul(module_id_t module_id,
sched_ctrl->cce_index = CCEIndex; sched_ctrl->cce_index = CCEIndex;
fill_pdcch_vrb_map(nrmac, CC_id, &sched_ctrl->sched_pdcch, CCEIndex, sched_ctrl->aggregation_level, dci_beam.idx); fill_pdcch_vrb_map(nrmac, CC_id, &sched_ctrl->sched_pdcch, CCEIndex, sched_ctrl->aggregation_level, dci_beam.idx);
NR_sched_pusch_t *sched_pusch = &sched_ctrl->sched_pusch; int nrOfLayers = get_ul_nrOfLayers(sched_ctrl, current_BWP->dci_format);
sched_pusch->mcs = selected_mcs; NR_sched_pusch_t sched = {
update_ul_ue_R_Qm(sched_pusch->mcs, current_BWP->mcs_table, current_BWP->pusch_Config, &sched_pusch->R, &sched_pusch->Qm); .frame = sched_frame,
sched_pusch->rbStart = rbStart; .slot = sched_slot,
sched_pusch->rbSize = min_rb; .rbSize = min_rb,
sched_pusch->bwp_info = bwp_info; .rbStart = rbStart,
sched_pusch->frame = sched_frame; .mcs = selected_mcs,
sched_pusch->slot = sched_slot; // R, Qm, tb_size below
sched_pusch->ul_harq_pid = -1; // new transmission .ul_harq_pid = -1, // new transmission
sched_pusch->tb_size = nr_compute_tbs(sched_pusch->Qm, .nrOfLayers = nrOfLayers,
sched_pusch->R, // tpmi in post-process
sched_pusch->rbSize, .time_domain_allocation = tda,
sched_pusch->tda_info.nrOfSymbols, .tda_info = tda_info,
sched_pusch->dmrs_info.N_PRB_DMRS * sched_pusch->dmrs_info.num_dmrs_symb, .dmrs_info = get_ul_dmrs_params(scc, current_BWP, &tda_info, nrOfLayers),
0, // nb_rb_oh .bwp_info = bi,
0, // phr_txpower_calc below
sched_pusch->nrOfLayers) >> 3; };
update_ul_ue_R_Qm(sched.mcs, current_BWP->mcs_table, current_BWP->pusch_Config, &sched.R, &sched.Qm);
sched.tb_size = nr_compute_tbs(sched.Qm,
sched.R,
sched.rbSize,
sched.tda_info.nrOfSymbols,
sched.dmrs_info.N_PRB_DMRS * sched.dmrs_info.num_dmrs_symb,
0, // nb_rb_oh
0,
sched.nrOfLayers)
>> 3;
long *deltaMCS = current_BWP->pusch_Config ? current_BWP->pusch_Config->pusch_PowerControl->deltaMCS : NULL; long *deltaMCS = current_BWP->pusch_Config ? current_BWP->pusch_Config->pusch_PowerControl->deltaMCS : NULL;
sched_pusch->phr_txpower_calc = compute_ph_factor(current_BWP->scs, sched.phr_txpower_calc = compute_ph_factor(current_BWP->scs,
sched_pusch->tb_size << 3, sched.tb_size << 3,
sched_pusch->rbSize, sched.rbSize,
sched_pusch->nrOfLayers, sched.nrOfLayers,
sched_pusch->tda_info.nrOfSymbols, sched.tda_info.nrOfSymbols,
sched_pusch->dmrs_info.N_PRB_DMRS * sched_pusch->dmrs_info.num_dmrs_symb, sched.dmrs_info.N_PRB_DMRS * sched.dmrs_info.num_dmrs_symb,
deltaMCS, deltaMCS,
false); false);
sched_ctrl->sched_pusch = sched;
LOG_D(NR_MAC, LOG_D(NR_MAC,
"pf_ul %d.%d UE %x Scheduling PUSCH (no data) nrb %d mcs %d tbs %d bits phr_txpower %d\n", "pf_ul %d.%d UE %x Scheduling PUSCH (no data) nrb %d mcs %d tbs %d bits phr_txpower %d\n",
frame, frame,
slot, slot,
UE->rnti, UE->rnti,
sched_pusch->rbSize, sched.rbSize,
sched_pusch->mcs, sched.mcs,
sched_pusch->tb_size << 3, sched.tb_size << 3,
sched_pusch->phr_txpower_calc); sched.phr_txpower_calc);
/* Mark the corresponding RBs as used */ /* Mark the corresponding RBs as used */
n_rb_sched[beam.idx] -= sched_pusch->rbSize; n_rb_sched[beam.idx] -= sched.rbSize;
for (int rb = bwpStart; rb < sched_ctrl->sched_pusch.rbSize; rb++) for (int rb = bi.bwpStart; rb < sched.rbSize; rb++)
rballoc_mask[rb + sched_ctrl->sched_pusch.rbStart] |= slbitmap; rballoc_mask[rb + sched.rbStart] |= slbitmap;
remainUEs[beam.idx]--; remainUEs[beam.idx]--;
continue; continue;