Merge branch 'integration_2023_w16b' into 'develop'

integration_2023_w16b

See merge request oai/openairinterface5g!2069

* !1952 Fix problems detected by UBsan
* !1924 NR UL 256 QAM
* !1988 PUCCH2 for N = 64
* !2053 separating MAC and PHY procedures for TA
* !2058 fix interoperability with accelleran CU
* !2060 avoid duplicated function in nr_common for supported bandwidth
* !2064 CI AW2S config file fix
* !2065 bugfix for msg3 retransmission scheduling frame
* !2067 Modification of tagging develop images on OC
This commit is contained in:
Robert Schmidt
2023-04-24 06:05:11 +00:00
91 changed files with 2713 additions and 3243 deletions
+10 -3
View File
@@ -263,7 +263,6 @@ class Cluster:
baseTag = 'develop'
forceBaseImageBuild = False
imageTag = 'develop'
if self.ranAllowMerge: # merging MR branch into develop -> temporary image
imageTag = f'{self.ranBranch}-{self.ranCommitID[0:8]}'
if self.ranTargetBranch == 'develop':
@@ -273,6 +272,7 @@ class Cluster:
forceBaseImageBuild = True
baseTag = 'ci-temp'
else:
imageTag = f'develop-{self.ranCommitID[0:8]}'
forceBaseImageBuild = True
# logging to OC Cluster and then switch to corresponding project
@@ -332,11 +332,18 @@ class Cluster:
ranbuild_job = self._start_build('ran-build')
attemptedImages += ['ran-build']
wait = ranbuild_job is not None and physim_job is not None and self._wait_build_end([ranbuild_job, physim_job], 1200)
if not wait: logging.error('error during build of ranbuild_job or physim_job')
self._recreate_is_tag('oai-clang', imageTag, 'openshift/oai-clang-is.yaml')
self._recreate_bc('oai-clang', imageTag, 'openshift/oai-clang-bc.yaml')
self._retag_image_statement('ran-base', 'image-registry.openshift-image-registry.svc:5000/oaicicd-ran/ran-base', baseTag, 'docker/Dockerfile.clang.rhel8.2')
clang_job = self._start_build('oai-clang')
attemptedImages += ['oai-clang']
wait = ranbuild_job is not None and physim_job is not None and clang_job is not None and self._wait_build_end([ranbuild_job, physim_job, clang_job], 1200)
if not wait: logging.error('error during build of ranbuild_job or physim_job or clang_job')
status = status and wait
self.cmd.run(f'oc logs {ranbuild_job} &> cmake_targets/log/ran-build.log')
self.cmd.run(f'oc logs {physim_job} &> cmake_targets/log/oai-physim.log')
self.cmd.run(f'oc logs {clang_job} &> cmake_targets/log/oai-clang.log')
self.cmd.run(f'oc get pods.metrics.k8s.io &>> cmake_targets/log/build-metrics.log', '\$', 10)
if status:
+1 -1
View File
@@ -114,7 +114,7 @@ class PhySim:
logging.debug('Merging with the target branch: ' + self.ranTargetBranch)
mySSH.command('git merge --ff origin/' + self.ranTargetBranch + ' -m "Temporary merge for CI"', '\$', 30)
else:
imageTag = "develop"
imageTag = f'develop-{self.ranCommitID[0:8]}'
# logging to OC Cluster and then switch to corresponding project
mySSH.command(f'oc login -u {ocUserName} -p {ocPassword} --server https://api.oai.cs.eurecom.fr:6443', '\$', 30)
@@ -199,7 +199,7 @@ MACRLCs = (
tr_n_preference = "local_RRC";
pusch_TargetSNRx10 = 200;
pucch_TargetSNRx10 = 200;
ulsch_max_frame_inactivity=0;
ulsch_max_frame_inactivity = 10;
ul_max_mcs = 15;
}
);
+25 -19
View File
@@ -289,11 +289,13 @@
(Test10: Format 2 9-bit 2/106 PRB),
(Test11: Format 2 10-bit 2/106 PRB),
(Test12: Format 2 11-bit 2/106 PRB),
(Test13: Format 2 12-bit 8/106 PRB),
(Test14: Format 2 19-bit 8/106 PRB),
(Test15: Format 2 32-bit 8/106 PRB),
(Test16: Format 2 32-bit 16/106 PRB),
(Test17: Format 2 64-bit 16/106 PRB)</desc>
(Test13: Format 2 12-bit 4/106 PRB),
(Test14: Format 2 19-bit 4/106 PRB),
(Test15: Format 2 12-bit 8/106 PRB),
(Test16: Format 2 19-bit 8/106 PRB),
(Test17: Format 2 32-bit 8/106 PRB),
(Test18: Format 2 32-bit 16/106 PRB),
(Test19: Format 2 64-bit 16/106 PRB)</desc>
<main_exec>nr_pucchsim</main_exec>
<main_exec_args>-R 106 -i 1 -P 0 -b 1 -s-2 -n1000
-R 106 -i 1 -P 0 -b 2 -s-2 -n1000
@@ -307,12 +309,14 @@
-R 106 -i 1 -P 2 -b 9 -s5 -n1000
-R 106 -i 1 -P 2 -b 10 -s6 -n1000
-R 106 -i 1 -P 2 -b 11 -s6 -n1000
-R 106 -i 1 -P 2 -q4 -b 12 -s-3 -n1000
-R 106 -i 1 -P 2 -q4 -b 19 -s-3 -n1000
-R 106 -i 1 -P 2 -q8 -b 12 -s-3 -n1000
-R 106 -i 1 -P 2 -q8 -b 19 -s-3 -n1000
-R 106 -i 1 -P 2 -q8 -b 32 -s-3 -n1000
-R 106 -i 1 -P 2 -q16 -b 32 -s-3 -n1000
-R 106 -i 1 -P 2 -q16 -b 64 -s-3 -n1000</main_exec_args>
<tags>test1 test2 test3 test4 test5 test6 test7 test8 test9 test10 test11 test12 test13 test14 test15 test16 test17</tags>
<tags>test1 test2 test3 test4 test5 test6 test7 test8 test9 test10 test11 test12 test13 test14 test15 test16 test17 test18 test19</tags>
<search_expr_true>PUCCH test OK</search_expr_true>
<search_expr_false>segmentation fault|assertion|exiting|fatal</search_expr_false>
<nruns>3</nruns>
@@ -351,22 +355,24 @@
</testCase>
<testCase id="nr_ulsim.misc">
<desc>nr_ulsim Test cases. (Test1: MCS 9, 106 PRBs),
(Test2: MCS 16, 50 PRBs),
(Test3: MCS 28, 50 PRBs),
(Test4: MCS 9, 217 PRBs),
(Test5: MCS 9, 273 PRBs),
(Test6: PUSCH Type A, 2 DMRS Symbols),
(Test7: PUSCH Type A, 3 DMRS, 4 PTRS, 5 Interpolated Symbols),
(Test8: PUSCH Type B, 3 DMRS, 2 PTRS, 7 Interpolated Symbols),
(Test9: PUSCH Type B, 3 DMRS, 2 PTRS, 3 Interpolated Symbols),
(Test10: 25 PRBs, 15 kHz SCS),
(Test11: MCS 0, low SNR performance)
(Test12: MCS 28, 106 PRBs, Time shift 8)</desc>
<desc>nr_ulsim Test cases. (Test1: MCS 9 106 PRBs),
(Test2: MCS 16 50 PRBs),
(Test3: MCS 28 50 PRBs),
(Test4: MCS 27 50 PRBs 256QAM),
(Test5: MCS 9 217 PRBs),
(Test6: MCS 9 273 PRBs),
(Test7: PUSCH Type A, 2 DMRS Symbols),
(Test8: PUSCH Type A, 3 DMRS, 4 PTRS, 5 Interpolated Symbols),
(Test9: PUSCH Type B, 3 DMRS, 2 PTRS, 7 Interpolated Symbols),
(Test10: PUSCH Type B, 3 DMRS, 2 PTRS, 3 Interpolated Symbols),
(Test11: 25 PRBs, 15 kHz SCS),
(Test12: MCS 0, low SNR performance)
(Test13: MCS 28, 106 PRBs, Time shift 8)</desc>
<main_exec>nr_ulsim</main_exec>
<main_exec_args>-n100 -m9 -r106 -s5
-n100 -m16 -s10
-n100 -m28 -s20
-n100 -m27 -s25 -q1
-n100 -m9 -R217 -r217 -s5
-n100 -m9 -R273 -r273 -s5
-n100 -s5 -U 0,1,1,1
@@ -376,7 +382,7 @@
-n100 -u0 -m0 -R25 -r25 -i 1,0
-n100 -m0 -S -0.6 -i 1,0
-n100 -m 28 -R106 -r106 -t90 -s24 -S24 -d 8</main_exec_args>
<tags>test1 test2 test3 test4 test5 test6 test7 test8 test9 test10 test11 test12</tags>
<tags>test1 test2 test3 test4 test5 test6 test7 test8 test9 test10 test11 test12 test13</tags>
<search_expr_true>PUSCH test OK</search_expr_true>
<search_expr_false>segmentation fault|assertion|exiting|fatal</search_expr_false>
<nruns>3</nruns>
+1 -1
View File
@@ -81,7 +81,7 @@
#define RLC_TX_MAXSIZE 10000000
#define RLC_RX_MAXSIZE 10000000
#define SEND_MRW_ON 240
#define MAX_ANT 8
// CBA constant
#define NUM_MAX_CBA_GROUP 4
+20 -132
View File
@@ -49,8 +49,8 @@ int get_supported_band_index(int scs, int band, int n_rbs)
int scs_index = scs;
if (band > 256)
scs_index++;
for (int i = 0; i < 11; i++) {
if(n_rbs == tables_5_3_2[scs][i])
for (int i = 0; i < 12; i++) {
if(n_rbs == tables_5_3_2[scs_index][i])
return i;
}
return (-1); // not found
@@ -130,34 +130,34 @@ const nr_bandentry_t nr_bandtable[] = {
{261,27500040,28350000,27500040,28350000, 2,2070833, 120}
};
int get_supported_bw_khz(frequency_range_t frequency_range, int bw_index)
int get_supported_bw_mhz(frequency_range_t frequency_range, int bw_index)
{
if (frequency_range == FR1) {
switch (bw_index) {
case 0 :
return 5000; // 5MHz
return 5; // 5MHz
case 1 :
return 10000;
return 10;
case 2 :
return 15000;
return 15;
case 3 :
return 20000;
return 20;
case 4 :
return 25000;
return 25;
case 5 :
return 30000;
return 30;
case 6 :
return 40000;
return 40;
case 7 :
return 50000;
return 50;
case 8 :
return 60000;
return 60;
case 9 :
return 80000;
return 80;
case 10 :
return 90000;
return 90;
case 11 :
return 100000;
return 100;
default :
AssertFatal(false, "Invalid band index for FR1 %d\n", bw_index);
}
@@ -165,13 +165,13 @@ int get_supported_bw_khz(frequency_range_t frequency_range, int bw_index)
else {
switch (bw_index) {
case 0 :
return 50000; // 50MHz
return 50; // 50MHz
case 1 :
return 100000;
return 100;
case 2 :
return 200000;
return 200;
case 3 :
return 400000;
return 400;
default :
AssertFatal(false, "Invalid band index for FR2 %d\n", bw_index);
}
@@ -184,7 +184,7 @@ bool compare_relative_ul_channel_bw(int nr_band, int scs, int nb_ul, frame_type_
// Relative channel bandwidth <= 4% for TDD bands and <= 3% for FDD bands
int index = get_nr_table_idx(nr_band, scs);
int bw_index = get_supported_band_index(scs, nr_band, nb_ul);
int band_size_khz = get_supported_bw_khz(nr_band > 256 ? FR2 : FR1, bw_index);
int band_size_khz = get_supported_bw_mhz(nr_band > 256 ? FR2 : FR1, bw_index) * 1000;
float limit = frame_type == TDD ? 0.04 : 0.03;
float rel_bw = (float) (2 * band_size_khz) / (float) (nr_bandtable[index].ul_max + nr_bandtable[index].ul_min);
return rel_bw <= limit;
@@ -382,118 +382,6 @@ int32_t get_delta_duplex(int nr_bandP, uint8_t scs_index)
return delta_duplex;
}
uint16_t config_bandwidth(int mu, int nb_rb, int nr_band)
{
if (nr_band < 100) { //FR1
switch(mu) {
case 0 :
if (nb_rb<=25)
return 5;
if (nb_rb<=52)
return 10;
if (nb_rb<=79)
return 15;
if (nb_rb<=106)
return 20;
if (nb_rb<=133)
return 25;
if (nb_rb<=160)
return 30;
if (nb_rb<=216)
return 40;
if (nb_rb<=270)
return 50;
AssertFatal(1==0,"Number of DL resource blocks %d undefined for mu %d and band %d\n", nb_rb, mu, nr_band);
break;
case 1 :
if (nb_rb<=11)
return 5;
if (nb_rb<=24)
return 10;
if (nb_rb<=38)
return 15;
if (nb_rb<=51)
return 20;
if (nb_rb<=65)
return 25;
if (nb_rb<=78)
return 30;
if (nb_rb<=106)
return 40;
if (nb_rb<=133)
return 50;
if (nb_rb<=162)
return 60;
if (nb_rb<=189)
return 70;
if (nb_rb<=217)
return 80;
if (nb_rb<=245)
return 90;
if (nb_rb<=273)
return 100;
AssertFatal(1==0,"Number of DL resource blocks %d undefined for mu %d and band %d\n", nb_rb, mu, nr_band);
break;
case 2 :
if (nb_rb<=11)
return 10;
if (nb_rb<=18)
return 15;
if (nb_rb<=24)
return 20;
if (nb_rb<=31)
return 25;
if (nb_rb<=38)
return 30;
if (nb_rb<=51)
return 40;
if (nb_rb<=65)
return 50;
if (nb_rb<=79)
return 60;
if (nb_rb<=93)
return 70;
if (nb_rb<=107)
return 80;
if (nb_rb<=121)
return 90;
if (nb_rb<=135)
return 100;
AssertFatal(1==0,"Number of DL resource blocks %d undefined for mu %d and band %d\n", nb_rb, mu, nr_band);
break;
default:
AssertFatal(1==0,"Numerology %d undefined for band %d in FR1\n", mu,nr_band);
}
}
else {
switch(mu) {
case 2 :
if (nb_rb<=66)
return 50;
if (nb_rb<=132)
return 100;
if (nb_rb<=264)
return 200;
AssertFatal(1==0,"Number of DL resource blocks %d undefined for mu %d and band %d\n", nb_rb, mu, nr_band);
break;
case 3 :
if (nb_rb<=32)
return 50;
if (nb_rb<=66)
return 100;
if (nb_rb<=132)
return 200;
if (nb_rb<=264)
return 400;
AssertFatal(1==0,"Number of DL resource blocks %d undefined for mu %d and band %d\n", nb_rb, mu, nr_band);
break;
default:
AssertFatal(1==0,"Numerology %d undefined for band %d in FR1\n", mu,nr_band);
}
}
}
// Returns the corresponding row index of the NR table
int get_nr_table_idx(int nr_bandP, uint8_t scs_index) {
int scs_khz = 15 << scs_index;
+1 -1
View File
@@ -76,7 +76,6 @@ int get_first_ul_slot(int nrofDownlinkSlots, int nrofDownlinkSymbols, int nrofUp
int cce_to_reg_interleaving(const int R, int k, int n_shift, const int C, int L, const int N_regs);
int get_SLIV(uint8_t S, uint8_t L);
void get_coreset_rballoc(uint8_t *FreqDomainResource,int *n_rb,int *rb_offset);
uint16_t config_bandwidth(int mu, int nb_rb, int nr_band);
int get_nr_table_idx(int nr_bandP, uint8_t scs_index);
int32_t get_delta_duplex(int nr_bandP, uint8_t scs_index);
frame_type_t get_frame_type(uint16_t nr_bandP, uint8_t scs_index);
@@ -94,6 +93,7 @@ int get_supported_band_index(int scs, int band, int n_rbs);
long rrc_get_max_nr_csrs(const int max_rbs, long b_SRS);
void get_K1_K2(int N1, int N2, int *K1, int *K2);
bool compare_relative_ul_channel_bw(int nr_band, int scs, int nb_ul, frame_type_t frame_type);
int get_supported_bw_mhz(frequency_range_t frequency_range, int bw_index);
void get_samplerate_and_bw(int mu,
int n_rb,
int8_t threequarter_fs,
@@ -96,10 +96,7 @@ void measurcmd_display_phyta(telnet_printfunc_t prnt)
PHY_VARS_NR_UE *UE = PHY_vars_UE_g[0][0];
prnt("%s PHY TA stats\n", HDR);
prnt("N_TA_offset %d\n", UE->N_TA_offset);
for (int i = 0; i < UE->n_connected_gNB; ++i) {
NR_UL_TIME_ALIGNMENT_t *ta = &UE->ul_time_alignment[i];
prnt("gNB %d TA command %d TA total %d TAG ID %d\n", i, ta->ta_command, ta->ta_total, ta->tag_id);
}
prnt("TA command %d\n", UE->ta_command);
prnt("timing_advance %d (samples)\n", UE->timing_advance);
}
/*
+9 -7
View File
@@ -153,15 +153,17 @@ static inline void start_meas(time_stats_t *ts) {
static inline void stop_meas(time_stats_t *ts) {
if (opp_enabled) {
long long out = rdtsc_oai();
ts->diff += (out-ts->in);
/// process duration is the difference between two clock points
ts->p_time = (out-ts->in);
ts->diff_square += ((double)out-ts->in)*((double)out-ts->in);
if (ts->in) {
ts->diff += (out - ts->in);
/// process duration is the difference between two clock points
ts->p_time = (out - ts->in);
ts->diff_square += ((double)out - ts->in) * ((double)out - ts->in);
if ((out-ts->in) > ts->max)
ts->max = out-ts->in;
if ((out - ts->in) > ts->max)
ts->max = out - ts->in;
ts->meas_flag=0;
ts->meas_flag = 0;
}
}
}
+2
View File
@@ -259,6 +259,7 @@ The following features are valid for the gNB and the 5G-NR UE.
- PTRS support
- Support for 1, 2 and 4 TX antennas
- Support for up to 2 layers (currently limited to DMRS configuration type 2)
- Support for 256 QAM
* NR-CSIRS Generation of sequence at PHY
* NR-PUSCH (including Segmentation, LDPC encoding, rate matching, scrambling, modulation, RB mapping, etc).
- PUSCH mapping type A and B
@@ -267,6 +268,7 @@ The following features are valid for the gNB and the 5G-NR UE.
- PTRS support
- Support for up to 2 RX antenna
- Support for up to 2 layers
- Support for 256 QAM
* NR-PUCCH
- Format 0 (2 bits, for ACK/NACK and SR)
- Format 2 (up to 11 bits, mainly for CSI feedback)
+43
View File
@@ -0,0 +1,43 @@
#/*
# * Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
# * contributor license agreements. See the NOTICE file distributed with
# * this work for additional information regarding copyright ownership.
# * The OpenAirInterface Software Alliance licenses this file to You under
# * the OAI Public License, Version 1.1 (the "License"); you may not use this file
# * except in compliance with the License.
# * You may obtain a copy of the License at
# *
# * http://www.openairinterface.org/?page_id=698
# *
# * Unless required by applicable law or agreed to in writing, software
# * distributed under the License is distributed on an "AS IS" BASIS,
# * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
# * See the License for the specific language governing permissions and
# * limitations under the License.
# *-------------------------------------------------------------------------------
# * For more information about the OpenAirInterface (OAI) Software Alliance:
# * contact@openairinterface.org
# */
#---------------------------------------------------------------------
#
# Dockerfile for the Open-Air-Interface BUILD service
# Valid for RHEL8
#
#---------------------------------------------------------------------
FROM ran-base:latest AS oai-clang
RUN rm -Rf /oai-ran
WORKDIR /oai-ran
COPY . .
#only install LLVM (clang, ...) for this container, the others don't need it
RUN yum install -y llvm-toolset
#run build_oai to build the target image
RUN /bin/sh oaienv && \
cd cmake_targets && \
mkdir -p log && \
export CC=/usr/bin/clang && \
export CXX=/usr/bin/clang++ && \
./build_oai --phy_simulators --gNB --eNB --nrUE --UE --ninja --verbose-ci --noavx512 -c --cmake-opt -DCMAKE_C_FLAGS=-Werror --cmake-opt -DCMAKE_CXX_FLAGS=-Werror
+4 -5
View File
@@ -31,16 +31,14 @@ RUN rm -Rf /oai-ran
WORKDIR /oai-ran
COPY . .
#only install address sanitizer and LLVM (clang, ...) for this container, the others don't need it
RUN yum install -y libasan llvm-toolset
#only install address and undefined behavior sanitizer for this container, the others don't need it
RUN yum install -y libasan libubsan
#run build_oai to build the target image
RUN /bin/sh oaienv && \
cd cmake_targets && \
mkdir -p log && \
export CC=/usr/bin/clang && \
export CXX=/usr/bin/clang++ && \
./build_oai --phy_simulators --gNB --eNB --nrUE --UE --ninja --verbose-ci --sanitize-address --noavx512 -c --cmake-opt -DCMAKE_C_FLAGS=-Werror --cmake-opt -DCMAKE_CXX_FLAGS=-Werror
./build_oai --phy_simulators --ninja --verbose-ci --sanitize --noavx512 -c --cmake-opt -DCMAKE_C_FLAGS=-Werror --cmake-opt -DCMAKE_CXX_FLAGS=-Werror
#start from scratch for target executable
FROM registry.access.redhat.com/ubi8/ubi:latest as oai-physim
@@ -89,6 +87,7 @@ COPY --from=phy-sim-build \
/lib64/libexslt.so.0 \
/lib64/libxslt.so.1 \
/usr/lib64/libasan.so.5 \
/usr/lib64/libubsan.so.1 \
/oai-ran/cmake_targets/ran_build/build/libdfts.so \
/oai-ran/cmake_targets/ran_build/build/libldpc.so \
/oai-ran/cmake_targets/ran_build/build/libldpc_orig.so \
+3 -6
View File
@@ -154,7 +154,6 @@ void init_nr_ue_vars(PHY_VARS_NR_UE *ue,
int nb_connected_gNB = 1;
ue->Mod_id = UE_id;
ue->mac_enabled = 1;
ue->if_inst = nr_ue_if_module_init(0);
ue->dci_thres = 0;
ue->target_Nid_cell = -1;
@@ -259,8 +258,6 @@ static void *NRUE_phy_stub_standalone_pnf_task(void *arg)
reset_queue(&nr_ul_dci_req_queue);
reset_queue(&nr_ul_tti_req_queue);
NR_UL_TIME_ALIGNMENT_t ul_time_alignment;
memset(&ul_time_alignment, 0, sizeof(ul_time_alignment));
int last_sfn_slot = -1;
uint16_t sfn_slot = 0;
@@ -305,7 +302,7 @@ static void *NRUE_phy_stub_standalone_pnf_task(void *arg)
if (get_softmodem_params()->sa && mac->mib == NULL) {
LOG_D(NR_MAC, "We haven't gotten MIB. Lets see if we received it\n");
nr_ue_dl_indication(&mac->dl_info, &ul_time_alignment);
nr_ue_dl_indication(&mac->dl_info);
process_queued_nr_nfapi_msgs(mac, sfn_slot);
}
if (mac->scc == NULL && mac->scc_SIB == NULL) {
@@ -347,7 +344,7 @@ static void *NRUE_phy_stub_standalone_pnf_task(void *arg)
mac->dl_info.slot = slot;
mac->dl_info.dci_ind = NULL;
mac->dl_info.rx_ind = NULL;
nr_ue_dl_indication(&mac->dl_info, &ul_time_alignment);
nr_ue_dl_indication(&mac->dl_info);
}
if (pthread_mutex_unlock(&mac->mutex_dl_info)) abort();
@@ -628,7 +625,7 @@ nr_phy_data_t UE_dl_preprocessing(PHY_VARS_NR_UE *UE, UE_nr_rxtx_proc_t *proc) {
if(UE->if_inst != NULL && UE->if_inst->dl_indication != NULL) {
nr_downlink_indication_t dl_indication;
nr_fill_dl_indication(&dl_indication, NULL, NULL, proc, UE, &phy_data);
UE->if_inst->dl_indication(&dl_indication, NULL);
UE->if_inst->dl_indication(&dl_indication);
}
uint64_t a=rdtsc_oai();
@@ -50,7 +50,8 @@
#define FAPI_NR_DL_CONFIG_TYPE_P_DLSCH 0x05
#define FAPI_NR_DL_CONFIG_TYPE_CSI_RS 0x06
#define FAPI_NR_DL_CONFIG_TYPE_CSI_IM 0x07
#define FAPI_NR_DL_CONFIG_TYPES 0x07
#define FAPI_NR_CONFIG_TA_COMMAND 0x08
#define FAPI_NR_DL_CONFIG_TYPES 0x08
#define FAPI_NR_CCE_REG_MAPPING_TYPE_INTERLEAVED 0x01
#define FAPI_NR_CCE_REG_MAPPING_TYPE_NON_INTERLEAVED 0x02
@@ -526,6 +526,11 @@ typedef struct {
fapi_nr_dl_config_csiim_pdu_rel15_t csiim_config_rel15;
} fapi_nr_dl_config_csiim_pdu;
typedef struct {
int ta_frame;
int ta_slot;
int ta_command;
} fapi_nr_ta_command_pdu;
typedef struct {
uint8_t pdu_type;
@@ -534,6 +539,7 @@ typedef struct {
fapi_nr_dl_config_dlsch_pdu dlsch_config_pdu;
fapi_nr_dl_config_csirs_pdu csirs_config_pdu;
fapi_nr_dl_config_csiim_pdu csiim_config_pdu;
fapi_nr_ta_command_pdu ta_command_pdu;
};
} fapi_nr_dl_config_request_pdu_t;
+1 -1
View File
@@ -127,7 +127,7 @@ int main(int argc, char *argv[])
time_t currentTime;
char fileName[512], currentTimeInfo[25];
char folderName[] = ".";
FILE *logFile;
FILE *logFile = NULL;
/*folderName=getenv("HOME");
strcat(folderName,"/Desktop/polartestResults");*/
+53 -63
View File
@@ -44,16 +44,16 @@
/*ref 36-212 v8.6.0 , pp 8-9 */
/* the highest degree is set by default */
unsigned int poly24a = 0x864cfb00; // 1000 0110 0100 1100 1111 1011
// D^24 + D^23 + D^18 + D^17 + D^14 + D^11 + D^10 + D^7 + D^6 + D^5 + D^4 + D^3 + D + 1
unsigned int poly24b = 0x80006300; // 1000 0000 0000 0000 0110 0011
// D^24 + D^23 + D^6 + D^5 + D + 1
unsigned int poly24c = 0xb2b11700; // 1011 0010 1011 0001 0001 0111
// D^24+D^23+D^21+D^20+D^17+D^15+D^13+D^12+D^8+D^4+D^2+D+1
uint32_t poly24a = 0x864cfb00; // 1000 0110 0100 1100 1111 1011
// D^24 + D^23 + D^18 + D^17 + D^14 + D^11 + D^10 + D^7 + D^6 + D^5 + D^4 + D^3 + D + 1
uint32_t poly24b = 0x80006300; // 1000 0000 0000 0000 0110 0011
// D^24 + D^23 + D^6 + D^5 + D + 1
uint32_t poly24c = 0xb2b11700; // 1011 0010 1011 0001 0001 0111
// D^24+D^23+D^21+D^20+D^17+D^15+D^13+D^12+D^8+D^4+D^2+D+1
unsigned int poly16 = 0x10210000; // 0001 0000 0010 0001 D^16 + D^12 + D^5 + 1
unsigned int poly12 = 0x80F00000; // 1000 0000 1111 D^12 + D^11 + D^3 + D^2 + D + 1
unsigned int poly8 = 0x9B000000; // 1001 1011 D^8 + D^7 + D^4 + D^3 + D + 1
uint32_t poly16 = 0x10210000; // 0001 0000 0010 0001 D^16 + D^12 + D^5 + 1
uint32_t poly12 = 0x80F00000; // 1000 0000 1111 D^12 + D^11 + D^3 + D^2 + D + 1
uint32_t poly8 = 0x9B000000; // 1001 1011 D^8 + D^7 + D^4 + D^3 + D + 1
uint32_t poly6 = 0x84000000; // 10000100000... -> D^6+D^5+1
uint32_t poly11 = 0xc4200000; //11000100001000... -> D^11+D^10+D^9+D^5+1
@@ -65,14 +65,12 @@ For initialization && verification purposes,
The first bit is in the MSB of each byte
*********************************************************/
unsigned int crcbit (unsigned char * inputptr,
int octetlen,
unsigned int poly)
uint32_t crcbit(unsigned char* inputptr, int octetlen, uint32_t poly)
{
unsigned int i, crc = 0, c;
uint32_t i, crc = 0, c;
while (octetlen-- > 0) {
c = ((unsigned int)(*inputptr++)) << 24;
c = ((uint32_t)(*inputptr++)) << 24;
for (i = 8; i != 0; i--) {
if ((1U << 31) & (c ^ crc))
@@ -92,14 +90,14 @@ unsigned int crcbit (unsigned char * inputptr,
crc table initialization
*********************************************************/
static unsigned int crc24aTable[256];
static unsigned int crc24bTable[256];
static unsigned int crc24cTable[256];
static unsigned short crc16Table[256];
static unsigned short crc12Table[256];
static unsigned short crc11Table[256];
static unsigned char crc8Table[256];
static unsigned char crc6Table[256];
static uint32_t crc24aTable[256];
static uint32_t crc24bTable[256];
static uint32_t crc24cTable[256];
static uint32_t crc16Table[256];
static uint32_t crc12Table[256];
static uint32_t crc11Table[256];
static uint32_t crc8Table[256];
static uint32_t crc6Table[256];
#if USE_INTEL_CRC
static DECLARE_ALIGNED(struct crc_pclmulqdq_ctx lte_crc24a_pclmulqdq, 16) = {
@@ -131,11 +129,11 @@ void crcTableInit (void)
crc24aTable[c] = crcbit (&c, 1, poly24a);
crc24bTable[c] = crcbit (&c, 1, poly24b);
crc24cTable[c] = crcbit (&c, 1, poly24c);
crc16Table[c] = (unsigned short) (crcbit (&c, 1, poly16) >> 16);
crc12Table[c] = (unsigned short) (crcbit (&c, 1, poly12) >> 16);
crc11Table[c] = (unsigned short) (crcbit (&c, 1, poly11) >> 16);
crc8Table[c] = (unsigned char) (crcbit (&c, 1, poly8) >> 24);
crc6Table[c] = (unsigned char) (crcbit (&c, 1, poly6) >> 24);
crc16Table[c] = crcbit(&c, 1, poly16) >> 16;
crc12Table[c] = crcbit(&c, 1, poly12) >> 16;
crc11Table[c] = crcbit(&c, 1, poly11) >> 16;
crc8Table[c] = crcbit(&c, 1, poly8) >> 24;
crc6Table[c] = crcbit(&c, 1, poly6) >> 24;
} while (++c);
#if USE_INTEL_CRC
crc_xmm_be_le_swap128 = _mm_setr_epi32(0x0c0d0e0f, 0x08090a0b,
@@ -151,19 +149,18 @@ assuming initial byte is 0 padded (in MSB) if necessary
can use SIMD optimized Intel CRC for LTE/NR 24a/24b variants
*********************************************************/
unsigned int crc24a (unsigned char * inptr,
int bitlen)
uint32_t crc24a(unsigned char* inptr, int bitlen)
{
int octetlen = bitlen / 8; /* Change in octets */
if ( bitlen % 8 || !USE_INTEL_CRC ) {
unsigned int crc = 0;
int resbit= (bitlen % 8);
uint32_t crc = 0;
int resbit = (bitlen % 8);
while (octetlen-- > 0) {
// printf("crc24a: in %x => crc %x\n",crc,*inptr);
crc = (crc << 8) ^ crc24aTable[(*inptr++) ^ (crc >> 24)];
}
while (octetlen-- > 0) {
// printf("crc24a: in %x => crc %x\n",crc,*inptr);
crc = (crc << 8) ^ crc24aTable[(*inptr++) ^ (crc >> 24)];
}
if (resbit > 0)
crc = (crc << resbit) ^ crc24aTable[((*inptr) >> (8 - resbit)) ^ (crc >> (32 - resbit))];
@@ -188,19 +185,18 @@ static DECLARE_ALIGNED(struct crc_pclmulqdq_ctx lte_crc24b_pclmulqdq, 16) = {
0ULL /**< res */
};
#endif
unsigned int crc24b (unsigned char * inptr,
int bitlen)
uint32_t crc24b(unsigned char* inptr, int bitlen)
{
int octetlen = bitlen / 8; /* Change in octets */
if ( bitlen % 8 || !USE_INTEL_CRC ) {
unsigned int crc = 0;
int resbit = (bitlen % 8);
uint32_t crc = 0;
int resbit = (bitlen % 8);
while (octetlen-- > 0) {
// printf("crc24b: in %x => crc %x (%x)\n",crc,*inptr,crc24bTable[(*inptr) ^ (crc >> 24)]);
crc = (crc << 8) ^ crc24bTable[(*inptr++) ^ (crc >> 24)];
}
while (octetlen-- > 0) {
// printf("crc24b: in %x => crc %x (%x)\n",crc,*inptr,crc24bTable[(*inptr) ^ (crc >> 24)]);
crc = (crc << 8) ^ crc24bTable[(*inptr++) ^ (crc >> 24)];
}
if (resbit > 0)
crc = (crc << resbit) ^ crc24bTable[((*inptr) >> (8 - resbit)) ^ (crc >> (32 - resbit))];
@@ -215,11 +211,10 @@ unsigned int crc24b (unsigned char * inptr,
#endif
}
unsigned int crc24c (unsigned char * inptr,
int bitlen)
uint32_t crc24c(unsigned char* inptr, int bitlen)
{
int octetlen, resbit;
unsigned int crc = 0;
uint32_t crc = 0;
octetlen = bitlen / 8; /* Change in octets */
resbit = (bitlen % 8);
@@ -234,11 +229,10 @@ unsigned int crc24c (unsigned char * inptr,
return crc;
}
unsigned int
crc16 (unsigned char * inptr, int bitlen)
uint32_t crc16(unsigned char* inptr, int bitlen)
{
int octetlen, resbit;
unsigned int crc = 0;
uint32_t crc = 0;
octetlen = bitlen / 8; /* Change in octets */
resbit = (bitlen % 8);
@@ -253,11 +247,10 @@ crc16 (unsigned char * inptr, int bitlen)
return crc;
}
unsigned int
crc12 (unsigned char * inptr, int bitlen)
uint32_t crc12(unsigned char* inptr, int bitlen)
{
int octetlen, resbit;
unsigned int crc = 0;
uint32_t crc = 0;
octetlen = bitlen / 8; /* Change in octets */
resbit = (bitlen % 8);
@@ -271,11 +264,10 @@ crc12 (unsigned char * inptr, int bitlen)
return crc;
}
unsigned int
crc11 (unsigned char * inptr, int bitlen)
uint32_t crc11(unsigned char* inptr, int bitlen)
{
int octetlen, resbit;
unsigned int crc = 0;
uint32_t crc = 0;
octetlen = bitlen / 8; /* Change in octets */
resbit = (bitlen % 8);
@@ -289,29 +281,27 @@ crc11 (unsigned char * inptr, int bitlen)
return crc;
}
unsigned int
crc8 (unsigned char * inptr, int bitlen)
uint32_t crc8(unsigned char* inptr, int bitlen)
{
int octetlen, resbit;
unsigned int crc = 0;
uint32_t crc = 0;
octetlen = bitlen / 8; /* Change in octets */
resbit = (bitlen % 8);
while (octetlen-- > 0) {
crc = ((unsigned int)crc8Table[(*inptr++) ^ (crc >> 24)]) << 24;
crc = ((uint32_t)crc8Table[(*inptr++) ^ (crc >> 24)]) << 24;
}
if (resbit > 0)
crc = (crc << resbit) ^ ((unsigned int)(crc8Table[((*inptr) >> (8 - resbit)) ^ (crc >> (32 - resbit))]) << 24);
crc = (crc << resbit) ^ ((uint32_t)(crc8Table[((*inptr) >> (8 - resbit)) ^ (crc >> (32 - resbit))]) << 24);
return crc;
}
unsigned int
crc6 (unsigned char * inptr, int bitlen)
uint32_t crc6(unsigned char* inptr, int bitlen)
{
int octetlen, resbit;
unsigned int crc = 0;
uint32_t crc = 0;
octetlen = bitlen / 8; /* Change in octets */
resbit = (bitlen % 8);
File diff suppressed because it is too large Load Diff
File diff suppressed because it is too large Load Diff
@@ -34,6 +34,21 @@
#include "time_meas.h"
#endif
#include "nrLDPCdecoder_defs.h"
typedef struct {
uint8_t* d;
int dim1;
int dim2;
} arr8_t;
typedef struct {
uint16_t* d;
int dim1;
int dim2;
} arr16_t;
typedef struct {
uint32_t* d;
int dim1;
int dim2;
} arr32_t;
// ==============================================================================
// TYPES
@@ -46,12 +61,12 @@ typedef struct nrLDPC_lut {
const uint8_t* numBnInBnGroups; /**< Number of CNs in every BN group */
const uint32_t* startAddrBnGroups; /**< Start addresses for BN groups in BN processing buffer */
const uint16_t* startAddrBnGroupsLlr; /**< Start addresses for BN groups in LLR processing buffer */
const uint16_t** circShift[NR_LDPC_NUM_CN_GROUPS_BG1]; /**< LUT for circular shift values for all CN groups and Zs */
const uint32_t** startAddrBnProcBuf[NR_LDPC_NUM_CN_GROUPS_BG1]; /**< LUT of start addresses of CN groups in BN proc buffer */
const uint8_t** bnPosBnProcBuf[NR_LDPC_NUM_CN_GROUPS_BG1]; /**< LUT of BN positions in BG for CN groups */
arr16_t circShift[NR_LDPC_NUM_CN_GROUPS_BG1]; /**< LUT for circular shift values for all CN groups and Zs */
arr32_t startAddrBnProcBuf[NR_LDPC_NUM_CN_GROUPS_BG1]; /**< LUT of start addresses of CN groups in BN proc buffer */
arr8_t bnPosBnProcBuf[NR_LDPC_NUM_CN_GROUPS_BG1]; /**< LUT of BN positions in BG for CN groups */
const uint16_t* llr2llrProcBufAddr; /**< LUT for transferring input LLRs to LLR processing buffer */
const uint8_t* llr2llrProcBufBnPos; /**< LUT BN position in BG */
const uint8_t** posBnInCnProcBuf[NR_LDPC_NUM_CN_GROUPS_BG1]; /**< LUT for llr2cnProcBuf */
arr8_t posBnInCnProcBuf[NR_LDPC_NUM_CN_GROUPS_BG1]; /**< LUT for llr2cnProcBuf */
} t_nrLDPC_lut;
/**
@@ -342,7 +342,8 @@ void build_polar_tables(t_nrPolar_params *polarParams) {
}
}
AssertFatal(polarParams->N==512 || polarParams->N==256 || polarParams->N==128,"N = %d, not done yet\n",polarParams->N);
AssertFatal(polarParams->N == 512 || polarParams->N == 256 || polarParams->N == 128 || polarParams->N == 64, "N = %d, not done yet\n", polarParams->N);
// build G bit vectors for information bit positions and convert the bit as bytes tables in nr_polar_kronecker_power_matrices.c to 64 bit packed vectors.
// keep only rows of G which correspond to information/crc bits
polarParams->G_N_tab = (uint64_t **)calloc((polarParams->K + polarParams->n_pc),sizeof(int64_t *));
@@ -410,19 +411,34 @@ void build_polar_tables(t_nrPolar_params *polarParams) {
firstingroup_in,firstingroup_in+ccnt,
firstingroup_out,firstingroup_out+ccnt);
#endif
AssertFatal(mingroupsize==4 || mingroupsize==8 || mingroupsize==16,"mingroupsize %d, needs to be handled\n",mingroupsize);
polarParams->groupsize=mingroupsize;
int shift=3;
if (mingroupsize == 16) shift=4;
else if (mingroupsize == 4) shift=2;
polarParams->groupsize = mingroupsize;
int shift = 0;
switch (mingroupsize) {
case 2:
shift = 1;
break;
case 4:
shift = 2;
break;
case 8:
shift = 3;
break;
case 16:
shift = 4;
break;
default:
AssertFatal(1 == 0, "mingroupsize = %i is not supported\n", mingroupsize);
break;
}
polarParams->rm_tab = (int *)malloc(sizeof(int) * (polarParams->encoderLength >> shift));
polarParams->rm_tab=(int *)malloc(sizeof(int)*polarParams->encoderLength/mingroupsize);
// rerun again to create groups
int tcnt=0;
for (int outpos=0; outpos<polarParams->encoderLength; outpos+=mingroupsize,tcnt++)
polarParams->rm_tab[tcnt] = polarParams->rate_matching_pattern[outpos]>>shift;
int tcnt = 0;
for (int outpos = 0; outpos < polarParams->encoderLength; outpos += mingroupsize, tcnt++)
polarParams->rm_tab[tcnt] = polarParams->rate_matching_pattern[outpos] >> shift;
}
void polar_encoder_fast(uint64_t *A,
@@ -699,6 +715,11 @@ void polar_encoder_fast(uint64_t *A,
#endif
}
}
} else if (polarParams->N == 64) {
for (int i = 0; i < ((len > 63) ? 64 : len); i++) {
Cprime_i = -((Cprime[0] >> i) & 1);
D[0] ^= (Cprime_i & polarParams->G_N_tab[off + i][0]);
}
}
memset((void*)out,0,polarParams->encoderLength>>3);
polar_rate_matching(polarParams,(void *)D, out);
+45 -31
View File
@@ -85,10 +85,8 @@ static void nr_polar_delete(void) {
pthread_mutex_unlock(&PolarListMutex);
}
t_nrPolar_params * nr_polar_params(int8_t messageType,
uint16_t messageLength,
uint8_t aggregation_level,
int decoder_flag) {
t_nrPolar_params *nr_polar_params(int8_t messageType, uint16_t messageLength, uint8_t aggregation_level, int decoder_flag)
{
// The lock is weak, because we never delete in the list, only at exit time
// therefore, returning t_nrPolar_params * from the list is safe for future usage
pthread_mutex_lock(&PolarListMutex);
@@ -123,8 +121,8 @@ t_nrPolar_params * nr_polar_params(int8_t messageType,
newPolarInitNode->idx = PolarKey;
newPolarInitNode->nextPtr = NULL;
//printf("newPolarInitNode->idx %d, (%d,%d,%d:%d)\n",newPolarInitNode->idx,messageType,messageLength,aggregation_prime,aggregation_level);
if (messageType == 0) { //PBCH
if (messageType == NR_POLAR_PBCH_MESSAGE_TYPE) {
newPolarInitNode->n_max = NR_POLAR_PBCH_N_MAX;
newPolarInitNode->i_il = NR_POLAR_PBCH_I_IL;
newPolarInitNode->i_seg = NR_POLAR_PBCH_I_SEG;
@@ -135,9 +133,10 @@ t_nrPolar_params * nr_polar_params(int8_t messageType,
newPolarInitNode->payloadBits = NR_POLAR_PBCH_PAYLOAD_BITS;
newPolarInitNode->encoderLength = NR_POLAR_PBCH_E;
newPolarInitNode->crcCorrectionBits = NR_POLAR_PBCH_CRC_ERROR_CORRECTION_BITS;
newPolarInitNode->crc_generator_matrix = crc24c_generator_matrix(newPolarInitNode->payloadBits);//G_P
newPolarInitNode->crc_generator_matrix = crc24c_generator_matrix(newPolarInitNode->payloadBits); // G_P
//printf("Initializing polar parameters for PBCH (K %d, E %d)\n",newPolarInitNode->payloadBits,newPolarInitNode->encoderLength);
} else if (messageType == 1) { //DCI
} else if (messageType == NR_POLAR_DCI_MESSAGE_TYPE) {
newPolarInitNode->n_max = NR_POLAR_DCI_N_MAX;
newPolarInitNode->i_il = NR_POLAR_DCI_I_IL;
newPolarInitNode->i_seg = NR_POLAR_DCI_I_SEG;
@@ -146,40 +145,55 @@ t_nrPolar_params * nr_polar_params(int8_t messageType,
newPolarInitNode->i_bil = NR_POLAR_DCI_I_BIL;
newPolarInitNode->crcParityBits = NR_POLAR_DCI_CRC_PARITY_BITS;
newPolarInitNode->payloadBits = messageLength;
newPolarInitNode->encoderLength = aggregation_level*108;
newPolarInitNode->encoderLength = aggregation_level * 108;
newPolarInitNode->crcCorrectionBits = NR_POLAR_DCI_CRC_ERROR_CORRECTION_BITS;
newPolarInitNode->crc_generator_matrix=crc24c_generator_matrix(newPolarInitNode->payloadBits+newPolarInitNode->crcParityBits);//G_P
newPolarInitNode->crc_generator_matrix = crc24c_generator_matrix(newPolarInitNode->payloadBits + newPolarInitNode->crcParityBits); // G_P
//printf("Initializing polar parameters for DCI (K %d, E %d, L %d)\n",newPolarInitNode->payloadBits,newPolarInitNode->encoderLength,aggregation_level);
} else if (messageType == 2) { //UCI PUCCH2
AssertFatal(aggregation_level>2,"Aggregation level (%d) for PUCCH 2 encoding is NPRB and should be > 2\n",aggregation_level);
AssertFatal(messageLength>11,"Message length %d is too short for polar encoding of UCI\n",messageLength);
newPolarInitNode->n_max = NR_POLAR_PUCCH_N_MAX;
newPolarInitNode->i_il = NR_POLAR_PUCCH_I_IL;
} else if (messageType == NR_POLAR_UCI_PUCCH_MESSAGE_TYPE) {
AssertFatal(aggregation_level > 2, "Aggregation level (%d) for PUCCH 2 encoding is NPRB and should be > 2\n", aggregation_level);
AssertFatal(messageLength > 11, "Message length %d is too short for polar encoding of UCI\n", messageLength);
// TS 38.212 - Section 6.3.1.2.1 UCI encoded by Polar code
int L = 0;
if (messageLength >= 12 && messageLength <= 19) {
L = 6;
} else if (messageLength >= 20) {
L = 11;
} else {
AssertFatal(1 == 0, "L = %i is an invalid value\n", L);
}
newPolarInitNode->encoderLength = aggregation_level * 16;
newPolarInitNode->i_seg = 0;
if ((messageLength >= 360 && newPolarInitNode->encoderLength >= 1088)||
(messageLength >= 1013)) newPolarInitNode->i_seg = 1;
newPolarInitNode->crcParityBits = 11;
newPolarInitNode->n_pc = 0;
newPolarInitNode->n_pc_wm = 0;
if (messageLength < 20) {
newPolarInitNode->crcParityBits = 6;
newPolarInitNode->n_pc = 3;
if ((newPolarInitNode->encoderLength - messageLength - 6 + 3) < 193) newPolarInitNode->n_pc_wm = 1;
if ((messageLength >= 360 && newPolarInitNode->encoderLength >= 1088) || (messageLength >= 1013)) {
newPolarInitNode->i_seg = 1;
AssertFatal(1 == 0, "Segmentation is not supported yet (i_seg = %i)\n", newPolarInitNode->i_seg);
}
// TS 38.212 - Section 6.3.1.3.1 UCI encoded by Polar code
newPolarInitNode->n_max = NR_POLAR_PUCCH_N_MAX;
newPolarInitNode->i_il = NR_POLAR_PUCCH_I_IL;
newPolarInitNode->crcParityBits = L;
int Kr = messageLength + L;
if (Kr >= 18 && Kr <= 25) {
newPolarInitNode->n_pc = 3;
if ((newPolarInitNode->encoderLength - Kr + 3) > 192) {
newPolarInitNode->n_pc_wm = 1;
} else {
newPolarInitNode->n_pc_wm = 0;
}
} else if (Kr > 30) {
newPolarInitNode->n_pc = 0;
newPolarInitNode->n_pc_wm = 0;
} else {
AssertFatal(1 == 0, "Kr = %i is an invalid value\n", Kr);
}
newPolarInitNode->i_bil = NR_POLAR_PUCCH_I_BIL;
newPolarInitNode->payloadBits = messageLength;
newPolarInitNode->crcCorrectionBits = NR_POLAR_PUCCH_CRC_ERROR_CORRECTION_BITS;
//newPolarInitNode->crc_generator_matrix=crc24c_generator_matrix(newPolarInitNode->payloadBits+newPolarInitNode->crcParityBits);//G_P
//LOG_D(PHY,"New polar node, encoderLength %d, aggregation_level %d\n",newPolarInitNode->encoderLength,aggregation_level);
} else {
AssertFatal(1 == 0, "[nr_polar_init] Incorrect Message Type(%d)", messageType);
}
+17 -7
View File
@@ -706,23 +706,24 @@ int phy_init_nr_gNB(PHY_VARS_gNB *gNB)
pusch->rxdataF_comp = (int32_t **)malloc16(n_buf * sizeof(int32_t *));
pusch->ul_ch_mag0 = (int32_t **)malloc16(n_buf * sizeof(int32_t *));
pusch->ul_ch_magb0 = (int32_t **)malloc16(n_buf * sizeof(int32_t *));
pusch->ul_ch_magc0 = (int32_t **)malloc16(n_buf * sizeof(int32_t *));
pusch->ul_ch_mag = (int32_t **)malloc16(n_buf * sizeof(int32_t *));
pusch->ul_ch_magb = (int32_t **)malloc16(n_buf * sizeof(int32_t *));
pusch->ul_ch_magc = (int32_t **)malloc16(n_buf * sizeof(int32_t *));
pusch->rho = (int32_t ***)malloc16(Prx * sizeof(int32_t **));
pusch->llr_layers = (int16_t **)malloc16(max_ul_mimo_layers * sizeof(int32_t *));
for (i=0; i<Prx; i++) {
for (i = 0; i < Prx; i++) {
pusch->rxdataF_ext[i] = (int32_t *)malloc16_clear(sizeof(int32_t) * nb_re_pusch2 * fp->symbols_per_slot);
pusch->rho[i] = (int32_t **)malloc16_clear(NR_MAX_NB_LAYERS * NR_MAX_NB_LAYERS * sizeof(int32_t *));
for (int j=0; j< max_ul_mimo_layers; j++) {
for (int k=0; k<max_ul_mimo_layers; k++) {
for (int j = 0; j < max_ul_mimo_layers; j++) {
for (int k = 0; k < max_ul_mimo_layers; k++) {
pusch->rho[i][j * max_ul_mimo_layers + k] =
(int32_t *)malloc16_clear(sizeof(int32_t) * nb_re_pusch2 * fp->symbols_per_slot);
}
}
}
for (i=0; i<n_buf; i++) {
for (i = 0; i < n_buf; i++) {
pusch->ul_ch_estimates[i] = (int32_t *)malloc16_clear(sizeof(int32_t) * fp->ofdm_symbol_size * fp->symbols_per_slot);
pusch->ul_ch_estimates_ext[i] = (int32_t *)malloc16_clear(sizeof(int32_t) * nb_re_pusch2 * fp->symbols_per_slot);
pusch->ul_ch_estimates_time[i] = (int32_t *)malloc16_clear(sizeof(int32_t) * fp->ofdm_symbol_size);
@@ -730,8 +731,10 @@ int phy_init_nr_gNB(PHY_VARS_gNB *gNB)
pusch->rxdataF_comp[i] = (int32_t *)malloc16_clear(sizeof(int32_t) * nb_re_pusch2 * fp->symbols_per_slot);
pusch->ul_ch_mag0[i] = (int32_t *)malloc16_clear(sizeof(int32_t) * nb_re_pusch2 * fp->symbols_per_slot);
pusch->ul_ch_magb0[i] = (int32_t *)malloc16_clear(sizeof(int32_t) * nb_re_pusch2 * fp->symbols_per_slot);
pusch->ul_ch_magc0[i] = (int32_t *)malloc16_clear(sizeof(int32_t) * nb_re_pusch2 * fp->symbols_per_slot);
pusch->ul_ch_mag[i] = (int32_t *)malloc16_clear(sizeof(int32_t) * nb_re_pusch2 * fp->symbols_per_slot);
pusch->ul_ch_magb[i] = (int32_t *)malloc16_clear(sizeof(int32_t) * nb_re_pusch2 * fp->symbols_per_slot);
pusch->ul_ch_magc[i] = (int32_t *)malloc16_clear(sizeof(int32_t) * nb_re_pusch2 * fp->symbols_per_slot);
}
for (i=0; i< max_ul_mimo_layers; i++) {
@@ -753,7 +756,9 @@ void phy_free_nr_gNB(PHY_VARS_gNB *gNB)
const int Prx = gNB->gNB_config.carrier_config.num_rx_ant.value;
const int max_ul_mimo_layers = 4; // taken from phy_init_nr_gNB()
const int n_buf = Prx * max_ul_mimo_layers;
PHY_MEASUREMENTS_gNB *meas=&gNB->measurements;
free_and_zero(meas->n0_subband_power);
free_and_zero(meas->n0_subband_power_dB);
int max_dl_mimo_layers =(fp->nb_antennas_tx<NR_MAX_NB_LAYERS) ? fp->nb_antennas_tx : NR_MAX_NB_LAYERS;
if (fp->nb_antennas_tx>1) {
for (int nl = 0; nl < max_dl_mimo_layers; nl++) {
@@ -867,8 +872,10 @@ void phy_free_nr_gNB(PHY_VARS_gNB *gNB)
free_and_zero(pusch_vars->rxdataF_comp[i]);
free_and_zero(pusch_vars->ul_ch_mag0[i]);
free_and_zero(pusch_vars->ul_ch_magb0[i]);
free_and_zero(pusch_vars->ul_ch_magc0[i]);
free_and_zero(pusch_vars->ul_ch_mag[i]);
free_and_zero(pusch_vars->ul_ch_magb[i]);
free_and_zero(pusch_vars->ul_ch_magc[i]);
}
free_and_zero(pusch_vars->llr_layers);
free_and_zero(pusch_vars->rxdataF_ext);
@@ -880,8 +887,10 @@ void phy_free_nr_gNB(PHY_VARS_gNB *gNB)
free_and_zero(pusch_vars->rxdataF_comp);
free_and_zero(pusch_vars->ul_ch_mag0);
free_and_zero(pusch_vars->ul_ch_magb0);
free_and_zero(pusch_vars->ul_ch_magc0);
free_and_zero(pusch_vars->ul_ch_mag);
free_and_zero(pusch_vars->ul_ch_magb);
free_and_zero(pusch_vars->ul_ch_magc);
free_and_zero(pusch_vars->rho);
free_and_zero(pusch_vars->llr);
@@ -954,7 +963,8 @@ void nr_phy_config_request_sim(PHY_VARS_gNB *gNB,
}
fp->threequarter_fs = 0;
gNB_config->carrier_config.dl_bandwidth.value = config_bandwidth(mu, N_RB_DL, fp->nr_band);
int bw_index = get_supported_band_index(mu, fp->nr_band, N_RB_DL);
gNB_config->carrier_config.dl_bandwidth.value = get_supported_bw_mhz(fp->nr_band > 256 ? FR2 : FR1, bw_index);
nr_init_frame_parms(gNB_config, fp);
+2 -3
View File
@@ -234,9 +234,6 @@ int init_nr_ue_signal(PHY_VARS_NR_UE *ue, int nb_connected_gNB)
ue->bitrate[gNB_id] = 0;
ue->total_received_bits[gNB_id] = 0;
ue->ul_time_alignment[gNB_id].apply_ta = 0;
ue->ul_time_alignment[gNB_id].ta_frame = -1;
ue->ul_time_alignment[gNB_id].ta_slot = -1;
}
// init NR modulation lookup tables
nr_generate_modulation_table();
@@ -691,6 +688,8 @@ void init_N_TA_offset(PHY_VARS_NR_UE *ue){
}
ue->N_TA_offset = (int)(N_TA_offset * factor);
ue->ta_frame = -1;
ue->ta_slot = -1;
LOG_I(PHY,"UE %d Setting N_TA_offset to %d samples (factor %f, UL Freq %lu, N_RB %d, mu %d)\n", ue->Mod_id, ue->N_TA_offset, factor, fp->ul_CarrierFreq, fp->N_RB_DL, fp->numerology_index);
}
@@ -1024,7 +1024,7 @@ void lte_ue_measurements(PHY_VARS_UE *ue,
#elif defined(__arm__) || defined(__aarch64__)
int16x8_t *dl_ch0_128, *dl_ch1_128;
#endif
int *dl_ch0,*dl_ch1;
int *dl_ch0=NULL,*dl_ch1=NULL;
LTE_DL_FRAME_PARMS *frame_parms = &ue->frame_parms;
int nb_subbands,subband_size,last_subband_size;
+10 -11
View File
@@ -352,16 +352,16 @@ void conv_rballoc(uint8_t ra_header,uint32_t rb_alloc,uint32_t N_RB_DL,uint32_t
if (ra_header==0) {
for (i=16; i>0; i--) {
if ((rb_alloc&(1<<i)) != 0)
rb_alloc2[(3*(16-i))>>5] |= (7<<((3*(16-i))%32));
if ((rb_alloc & (1 << i)) != 0)
rb_alloc2[(3 * (16 - i)) >> 5] |= (7U << ((3 * (16 - i)) % 32));
}
// bit mask across
if ((rb_alloc2[0]>>31)==1)
rb_alloc2[1] |= 1;
rb_alloc2[1] |= 1;
if ((rb_alloc&1) != 0)
rb_alloc2[1] |= (3<<16);
rb_alloc2[1] |= (3 << 16);
}
else {
LOG_W(PHY,"resource type 1 not supported for N_RB_DL=50\n");
@@ -371,10 +371,10 @@ void conv_rballoc(uint8_t ra_header,uint32_t rb_alloc,uint32_t N_RB_DL,uint32_t
case 100:
if (ra_header==0) {
for (i=0; i<25; i++) {
if ((rb_alloc&(1<<(24-i))) != 0)
rb_alloc2[(4*i)>>5] |= (0xf<<((4*i)%32));
if ((rb_alloc & (1 << (24 - i))) != 0)
rb_alloc2[(4 * i) >> 5] |= (0xfU << ((4 * i) % 32));
// printf("rb_alloc2[%d] (type 0) %x (%d)\n",(4*i)>>5,rb_alloc2[(4*i)>>5],rb_alloc&(1<<i));
// printf("rb_alloc2[%d] (type 0) %x (%d)\n",(4*i)>>5,rb_alloc2[(4*i)>>5],rb_alloc&(1<<i));
}
}
else {
@@ -960,8 +960,8 @@ uint8_t subframe2harq_pid(LTE_DL_FRAME_PARMS *frame_parms,uint32_t frame,uint8_t
case 2:
if ((subframe!=2) && (subframe!=7)) {
LOG_E(PHY,"subframe2_harq_pid, Illegal subframe %d for TDD mode %d\n",subframe,frame_parms->tdd_config);
ret=255;
LOG_E(PHY, "subframe2_harq_pid, Illegal subframe %d for TDD mode %d\n", subframe, frame_parms->tdd_config);
ret = 255;
}
else ret = (subframe/7);
break;
@@ -996,8 +996,7 @@ uint8_t subframe2harq_pid(LTE_DL_FRAME_PARMS *frame_parms,uint32_t frame,uint8_t
}
}
AssertFatal(ret!=255,
"invalid harq_pid(%d) at SFN/SF = %d/%d\n", (int8_t)ret, frame, subframe);
AssertFatal(ret != 255, "invalid harq_pid(%d) at SFN/SF = %d/%d\n", (int8_t)ret, frame, subframe);
return ret;
}
+12 -12
View File
@@ -840,16 +840,16 @@ int allocate_REs_in_RB_no_pilots_16QAM_tm2(PHY_VARS_eNB* phy_vars_eNB,
(((uint32_t)x0p[4])<<5)|(((uint32_t)x0p[6])<<4)|
(((uint32_t)x0p[5])<<7)|(((uint32_t)x0p[7])<<6);
txF0[0]=qam_table16_0[qam16_table_offset];
txF1[0]=qam_table16_1[qam16_table_offset];
memcpy(txF0, &qam_table16_0[qam16_table_offset], sizeof(*txF0));
memcpy(txF1, &qam_table16_1[qam16_table_offset], sizeof(*txF1));
x0p+=8;
qam16_table_offset=(((uint32_t)x0p[0])<<1)|(((uint32_t)x0p[2]))|
(((uint32_t)x0p[1])<<3)|(((uint32_t)x0p[3])<<2) |
(((uint32_t)x0p[4])<<5)|(((uint32_t)x0p[6])<<4) |
(((uint32_t)x0p[5])<<7)|(((uint32_t)x0p[7])<<6);
txF0[1]=qam_table16_0[qam16_table_offset];
txF1[1]=qam_table16_1[qam16_table_offset];
memcpy(txF0 + 1, &qam_table16_0[qam16_table_offset], sizeof(*txF0));
memcpy(txF1 + 1, &qam_table16_1[qam16_table_offset], sizeof(*txF1));
x0p+=8;
qam16_table_offset=(((uint32_t)x0p[0])<<1)|(((uint32_t)x0p[2]))|
@@ -857,8 +857,8 @@ int allocate_REs_in_RB_no_pilots_16QAM_tm2(PHY_VARS_eNB* phy_vars_eNB,
(((uint32_t)x0p[4])<<5)|(((uint32_t)x0p[6])<<4) |
(((uint32_t)x0p[5])<<7)|(((uint32_t)x0p[7])<<6);
txF0[2]=qam_table16_0[qam16_table_offset];
txF1[2]=qam_table16_1[qam16_table_offset];
memcpy(txF0 + 2, &qam_table16_0[qam16_table_offset], sizeof(*txF0));
memcpy(txF1 + 2, &qam_table16_1[qam16_table_offset], sizeof(*txF1));
if(skip_half==0) {
if (skip_dc>0) {
@@ -872,23 +872,23 @@ int allocate_REs_in_RB_no_pilots_16QAM_tm2(PHY_VARS_eNB* phy_vars_eNB,
(((uint32_t)x0p[4])<<5)|(((uint32_t)x0p[6])<<4) |
(((uint32_t)x0p[5])<<7)|(((uint32_t)x0p[7])<<6);
txF0[3]=qam_table16_0[qam16_table_offset];
txF1[3]=qam_table16_1[qam16_table_offset];
memcpy(txF0 + 3, &qam_table16_0[qam16_table_offset], sizeof(*txF0));
memcpy(txF1 + 3, &qam_table16_1[qam16_table_offset], sizeof(*txF1));
x0p+=8;
qam16_table_offset=(((uint32_t)x0p[0])<<1)|(((uint32_t)x0p[2]))|
(((uint32_t)x0p[1])<<3)|(((uint32_t)x0p[3])<<2) |
(((uint32_t)x0p[4])<<5)|(((uint32_t)x0p[6])<<4) |
(((uint32_t)x0p[5])<<7)|(((uint32_t)x0p[7])<<6);
txF0[4]=qam_table16_0[qam16_table_offset];
txF1[4]=qam_table16_1[qam16_table_offset];
memcpy(txF0 + 4, &qam_table16_0[qam16_table_offset], sizeof(*txF0));
memcpy(txF1 + 4, &qam_table16_1[qam16_table_offset], sizeof(*txF1));
x0p+=8;
qam16_table_offset=(((uint32_t)x0p[0])<<1)|(((uint32_t)x0p[2]))|
(((uint32_t)x0p[1])<<3)|(((uint32_t)x0p[3])<<2) |
(((uint32_t)x0p[4])<<5)|(((uint32_t)x0p[6])<<4) |
(((uint32_t)x0p[5])<<7)|(((uint32_t)x0p[7])<<6);
txF0[5]=qam_table16_0[qam16_table_offset];
txF1[5]=qam_table16_1[qam16_table_offset];
memcpy(txF0 + 5, &qam_table16_0[qam16_table_offset], sizeof(*txF0));
memcpy(txF1 + 5, &qam_table16_1[qam16_table_offset], sizeof(*txF1));
}
if(skip_half!=0)
{
@@ -4706,7 +4706,8 @@ unsigned short dlsch_extract_rbs_single(int **rxdataF,
}
if (rb_alloc_ind==1) {
*pmi_ext = (pmi>>((rb>>2)<<1))&3;
uint32_t tmp = (rb >> 2) << 1;
*pmi_ext = tmp >= 16 ? 0 : (pmi >> tmp) & 3;
memcpy(dl_ch0_ext,dl_ch0,12*sizeof(int));
/*
@@ -146,7 +146,19 @@ void gNB_I0_measurements(PHY_VARS_gNB *gNB,int slot, int first_symb,int num_symb
PHY_MEASUREMENTS_gNB *measurements = &gNB->measurements;
int rb, nb_symb[275]={0};
memset(measurements->n0_subband_power, 0, sizeof(measurements->n0_subband_power));
allocCast2D(n0_subband_power,
unsigned int,
gNB->measurements.n0_subband_power,
frame_parms->nb_antennas_rx,
frame_parms->N_RB_UL,
false);
clearArray(gNB->measurements.n0_subband_power, unsigned int);
allocCast2D(n0_subband_power_dB,
unsigned int,
gNB->measurements.n0_subband_power_dB,
frame_parms->nb_antennas_rx,
frame_parms->N_RB_UL,
false);
for (int s=first_symb;s<(first_symb+num_symb);s++) {
int offset0 = ((slot&3)*frame_parms->symbols_per_slot + s) * frame_parms->ofdm_symbol_size;
@@ -166,7 +178,7 @@ void gNB_I0_measurements(PHY_VARS_gNB *gNB,int slot, int first_symb,int num_symb
} else {
signal_energy = signal_energy_nodc(ul_ch, 12);
}
measurements->n0_subband_power[aarx][rb] += signal_energy;
n0_subband_power[aarx][rb] += signal_energy;
LOG_D(PHY,"slot %d symbol %d RB %d aarx %d n0_subband_power %d\n", slot, s, rb, aarx, signal_energy);
} //antenna
}
@@ -182,10 +194,10 @@ void gNB_I0_measurements(PHY_VARS_gNB *gNB,int slot, int first_symb,int num_symb
int32_t n0_subband_tot_perPRB=0;
if (nb_symb[rb] > 0) {
for (int aarx=0;aarx<frame_parms->nb_antennas_rx;aarx++) {
measurements->n0_subband_power[aarx][rb]/=nb_symb[rb];
measurements->n0_subband_power_dB[aarx][rb] = dB_fixed(measurements->n0_subband_power[aarx][rb]);
n0_subband_tot_perPRB+=measurements->n0_subband_power[aarx][rb];
n0_subband_tot_perANT[aarx]+=measurements->n0_subband_power[aarx][rb];
n0_subband_power[aarx][rb] /= nb_symb[rb];
n0_subband_power_dB[aarx][rb] = dB_fixed(n0_subband_power[aarx][rb]);
n0_subband_tot_perPRB += n0_subband_power[aarx][rb];
n0_subband_tot_perANT[aarx] += n0_subband_power[aarx][rb];
}
n0_subband_tot_perPRB/=frame_parms->nb_antennas_rx;
measurements->n0_subband_power_tot_dB[rb] = dB_fixed(n0_subband_tot_perPRB);
@@ -218,30 +230,31 @@ void nr_gnb_measurements(PHY_VARS_gNB *gNB,
unsigned short rx_power_avg_dB;
unsigned short rx_power_tot_dB;
double rx_gain = openair0_cfg[0].rx_gain[0];
double rx_gain_offset = openair0_cfg[0].rx_gain_offset[0];
double rx_gain = openair0_cfg[0].rx_gain[0];
double rx_gain_offset = openair0_cfg[0].rx_gain_offset[0];
PHY_MEASUREMENTS_gNB *meas = &gNB->measurements;
NR_DL_FRAME_PARMS *fp = &gNB->frame_parms;
int ch_offset = fp->ofdm_symbol_size * symbol;
NR_DL_FRAME_PARMS *fp = &gNB->frame_parms;
int ch_offset = fp->ofdm_symbol_size * symbol;
int N_RB_UL = ulsch->harq_process->ulsch_pdu.rb_size;
ulsch_measurements_gNB *ulsch_measurements = &ulsch->ulsch_measurements;
int rx_power[fp->nb_antennas_rx];
allocCast2D(rx_spatial_power, int, ulsch_measurements->rx_spatial_power, nrOfLayers, fp->nb_antennas_rx, true);
allocCast2D(rx_spatial_power_dB, unsigned short, ulsch_measurements->rx_spatial_power_dB, nrOfLayers, fp->nb_antennas_rx, true);
for (int aarx = 0; aarx < fp->nb_antennas_rx; aarx++){
rx_power[aarx] = 0;
for (int aatx = 0; aatx < nrOfLayers; aatx++){
ulsch_measurements->rx_spatial_power[aatx][aarx] =
rx_spatial_power[aatx][aarx] =
(signal_energy_nodc(&pusch_vars->ul_ch_estimates[aatx * fp->nb_antennas_rx + aarx][ch_offset],
N_RB_UL * NR_NB_SC_PER_RB));
if (ulsch_measurements->rx_spatial_power[aatx][aarx] < 0) {
ulsch_measurements->rx_spatial_power[aatx][aarx] = 0;
if (rx_spatial_power[aatx][aarx] < 0) {
rx_spatial_power[aatx][aarx] = 0;
}
ulsch_measurements->rx_spatial_power_dB[aatx][aarx] =
(unsigned short)dB_fixed(ulsch_measurements->rx_spatial_power[aatx][aarx]);
rx_power[aarx] += ulsch_measurements->rx_spatial_power[aatx][aarx];
rx_spatial_power_dB[aatx][aarx] = (unsigned short)dB_fixed(rx_spatial_power[aatx][aarx]);
rx_power[aarx] += rx_spatial_power[aatx][aarx];
}
LOG_D(PHY, "[RNTI %04x] RX power in antenna %d = %d\n", ulsch->rnti, aarx, rx_power[aarx]);
+5 -1
View File
@@ -72,7 +72,11 @@ void nr_chest_time_domain_avg(NR_DL_FRAME_PARMS *frame_parms,
uint16_t dmrs_bitmap,
uint16_t num_rbs);
static inline uint8_t is_dmrs_symbol(uint8_t l, uint16_t dmrsSymbMask ) { return ((dmrsSymbMask >> l) & 0x1); }
static inline uint8_t is_dmrs_symbol(uint8_t l, uint16_t dmrsSymbMask)
{
DevAssert(l < 32);
return ((dmrsSymbMask >> l) & 0x1);
}
#undef EXTERN
#endif /* DMRS_NR_H */
+4 -7
View File
@@ -373,7 +373,7 @@ int8_t nr_ptrs_process_slot(uint16_t dmrsSymbPos,
}
/* check for left side first */
/* right side a DMRS symbol then we need to left extrapolate */
if(is_dmrs_symbol(rightRef,dmrsSymbPos)) {
if (rightRef != -1 && is_dmrs_symbol(rightRef, dmrsSymbPos)) {
/* calculate slope from next valid estimates*/
tmp = get_next_estimate_in_slot(ptrsSymbPos,dmrsSymbPos,rightRef+1,symbInSlot);
/* Special case when DMRS is not followed by PTRS symbol then reuse old slope */
@@ -382,22 +382,19 @@ int8_t nr_ptrs_process_slot(uint16_t dmrsSymbPos,
}
ptrs_estimate_from_slope(estPerSymb,slope_p,leftRef, rightRef);
symb = rightRef -1;
}
else if(is_ptrs_symbol(rightRef,ptrsSymbPos)) {
} else if (rightRef != -1 && is_ptrs_symbol(rightRef, ptrsSymbPos)) {
/* calculate slope from next valid estimates */
get_slope_from_estimates(leftRef,rightRef,estPerSymb, slope_p);
ptrs_estimate_from_slope(estPerSymb,slope_p,leftRef, rightRef);
symb = rightRef -1;
}
else if((rightRef ==-1) && (symb <symbInSlot)) {
} else if ((rightRef == -1) && (symb < symbInSlot)) {
// in right extrapolation use the last slope
#ifdef DEBUG_PTRS
printf("[PHY][PTRS]: Last Slop Reused :(%4f %4f)\n", slope_p[0],slope_p[1]);
#endif
ptrs_estimate_from_slope(estPerSymb,slope_p,symb-1,symbInSlot);
symb = symbInSlot;
}
else {
} else {
printf("Wrong PTRS Setup, PTRS compensation will be skipped !");
return -1;
}
+50 -25
View File
@@ -404,43 +404,68 @@ void nr_generate_pdsch(processingData_L1tx_t *msgTx,
}
}
else {
__m64 *txF=(__m64*)&txdataF_precoding[nl][((l*frame_parms->ofdm_symbol_size+start_sc)<<1)];
__m128i *txF = (__m128i *)&txdataF_precoding[nl][((l * frame_parms->ofdm_symbol_size + start_sc) << 1)];
__m64 *txl = (__m64*)&tx_layers[nl][m<<1];
__m64 amp64=_mm_set1_pi16(amp);
for (int i=0; i<(upper_limit>>1); i++) {
txF[i] = _mm_mulhrs_pi16(amp64,txl[i]);
__m128i *txl = (__m128i *)&tx_layers[nl][m << 1];
__m128i amp64 = _mm_set1_epi16(amp);
int i;
for (i = 0; i < (upper_limit >> 2); i++) {
const __m128i txL = _mm_loadu_si128(txl + i);
_mm_storeu_si128(txF + i, _mm_mulhrs_epi16(amp64, txL));
#ifdef DEBUG_DLSCH_MAPPING
if ((i&1) > 0)
printf("m %d\t l %d \t k %d \t txdataF: %d %d\n",
m, l, start_sc+(i>>1), txdataF_precoding[nl][((l*frame_parms->ofdm_symbol_size + start_sc+(i>>1))<<1)],
txdataF_precoding[nl][((l*frame_parms->ofdm_symbol_size + start_sc+(i>>1))<<1) + 1]);
printf("m %d\t l %d \t k %d \t txdataF: %d %d\n",
m,
l,
start_sc + (i >> 1),
txdataF_precoding[nl][((l * frame_parms->ofdm_symbol_size + start_sc + (i >> 1)) << 1)],
txdataF_precoding[nl][((l * frame_parms->ofdm_symbol_size + start_sc + (i >> 1)) << 1) + 1]);
#endif
/* handle this, mute RE */
/*else {
txdataF_precoding[nl][((l*frame_parms->ofdm_symbol_size + k)<<1) ] = 0;
txdataF_precoding[anl][((l*frame_parms->ofdm_symbol_size + k)<<1) + 1] = 0;
}*/
} //RE loop, first part
}*/
}
if (i * 4 != upper_limit) {
c16_t *txFc = (c16_t *)&txdataF_precoding[nl][((l * frame_parms->ofdm_symbol_size + start_sc) << 1)];
c16_t *txlc = (c16_t *)&tx_layers[nl][m << 1];
for (i = (upper_limit >> 2) << 2; i < upper_limit; i++) {
txFc[i].r = ((txlc[i].r * amp) >> 14) + 1;
txFc[i].i = ((txlc[i].i * amp) >> 14) + 1;
}
}
m+=upper_limit;
if (remaining_re > 0) {
txF = (__m64*)&txdataF_precoding[nl][((l*frame_parms->ofdm_symbol_size)<<1)];
txl = (__m64*)&tx_layers[nl][m<<1];
for (int i=0; i<(remaining_re>>1); i++) {
txF[i] = _mm_mulhrs_pi16(amp64,txl[i]);
txF = (__m128i *)&txdataF_precoding[nl][((l * frame_parms->ofdm_symbol_size) << 1)];
txl = (__m128i *)&tx_layers[nl][m << 1];
int i;
for (i = 0; i < (remaining_re >> 2); i++) {
const __m128i txL = _mm_loadu_si128(txl + i);
_mm_storeu_si128(txF + i, _mm_mulhrs_epi16(amp64, txL));
#ifdef DEBUG_DLSCH_MAPPING
if ((i&1) > 0)
printf("m %d\t l %d \t k %d \t txdataF: %d %d\n",
m, l, i>>1, txdataF_precoding[nl][((l*frame_parms->ofdm_symbol_size + (i>>1))<<1) ],
txdataF_precoding[nl][((l*frame_parms->ofdm_symbol_size + (i>>1))<<1) + 1]);
if ((i & 1) > 0)
printf("m %d\t l %d \t k %d \t txdataF: %d %d\n",
m,
l,
i >> 1,
txdataF_precoding[nl][((l * frame_parms->ofdm_symbol_size + (i >> 1)) << 1)],
txdataF_precoding[nl][((l * frame_parms->ofdm_symbol_size + (i >> 1)) << 1) + 1]);
#endif
/* handle this, mute RE */
/*else {
txdataF_precoding[nl][((l*frame_parms->ofdm_symbol_size + k)<<1) ] = 0;
txdataF_precoding[nl][((l*frame_parms->ofdm_symbol_size + k)<<1) + 1] = 0;
}*/
} //RE loop, second part
/* handle this, mute RE */
/*else {
txdataF_precoding[nl][((l*frame_parms->ofdm_symbol_size + k)<<1) ] = 0;
txdataF_precoding[nl][((l*frame_parms->ofdm_symbol_size + k)<<1) + 1] = 0;
}*/
} // RE loop, second part
if (i * 4 != remaining_re) {
c16_t *txFc = (c16_t *)&txdataF_precoding[nl][((l * frame_parms->ofdm_symbol_size) << 1)];
c16_t *txlc = (c16_t *)&tx_layers[nl][m << 1];
for (i = (remaining_re >> 2) << 2; i < remaining_re; i++) {
txFc[i].r = ((txlc[i].r * amp) >> 14) + 1;
txFc[i].i = ((txlc[i].i * amp) >> 14) + 1;
}
}
} //
m+=remaining_re;
} // N_RB_DL even
+22 -2
View File
@@ -176,8 +176,9 @@ void nr_ulsch_channel_level(int **ul_ch_estimates_ext,
/** \brief This function performs channel compensation (matched filtering) on the received RBs for this allocation. In addition, it computes the squared-magnitude of the channel with weightings for 16QAM/64QAM detection as well as dual-stream detection (cross-correlation)
@param rxdataF_ext Frequency-domain received signal in RBs to be demodulated
@param ul_ch_estimates_ext Frequency-domain channel estimates in RBs to be demodulated
@param ul_ch_mag First Channel magnitudes (16QAM/64QAM)
@param ul_ch_magb Second weighted Channel magnitudes (64QAM)
@param ul_ch_mag First Channel magnitudes (16QAM/64QAM/256QAM)
@param ul_ch_magb Second weighted Channel magnitudes (64QAM/256QAM)
@param ul_ch_magc Third weighted Channel magnitudes (256QAM)
@param rxdataF_comp Compensated received waveform
@param frame_parms Pointer to frame descriptor
@param symbol Symbol on which to operate
@@ -189,6 +190,7 @@ void nr_ulsch_channel_compensation(int **rxdataF_ext,
int **ul_ch_estimates_ext,
int **ul_ch_mag,
int **ul_ch_magb,
int **ul_ch_magc,
int **rxdataF_comp,
int ***rho,
NR_DL_FRAME_PARMS *frame_parms,
@@ -250,6 +252,23 @@ void nr_ulsch_64qam_llr(int32_t *rxdataF_comp,
uint32_t nb_re,
uint8_t symbol);
/** \brief This function generates log-likelihood ratios (decoder input) for single-stream 256 QAM received waveforms.
@param rxdataF_comp Compensated channel output
@param ul_ch_mag uplink channel magnitude multiplied by the 1st amplitude threshold in QAM 256
@param ul_ch_magb uplink channel magnitude multiplied by the 2bd amplitude threshold in QAM 256
@param ul_ch_magc uplink channel magnitude multiplied by the 3rd amplitude threshold in QAM 256
@param ulsch_llr llr output
@param nb_re number of REs for this allocation
@param symbol OFDM symbol index in sub-frame
*/
void nr_ulsch_256qam_llr(int32_t *rxdataF_comp,
int32_t **ul_ch_mag,
int32_t **ul_ch_magb,
int32_t **ul_ch_magc,
int16_t *ulsch_llr,
uint32_t nb_rb,
uint32_t nb_re,
uint8_t symbol);
/** \brief This function computes the log-likelihood ratios for 4, 16, and 64 QAM
@param rxdataF_comp Compensated channel output
@@ -263,6 +282,7 @@ void nr_ulsch_64qam_llr(int32_t *rxdataF_comp,
void nr_ulsch_compute_llr(int32_t *rxdataF_comp,
int32_t *ul_ch_mag,
int32_t *ul_ch_magb,
int32_t *ul_ch_magc,
int16_t *ulsch_llr,
uint32_t nb_rb,
uint32_t nb_re,
+1 -2
View File
@@ -88,8 +88,7 @@ void nr_fill_ulsch(PHY_VARS_gNB *gNB, int frame, int slot, nfapi_nr_pusch_pdu_t
harq->round++;
memcpy(&ulsch->harq_process->ulsch_pdu, ulsch_pdu, sizeof(ulsch->harq_process->ulsch_pdu));
LOG_D(PHY, "Initializing nFAPI for ULSCH, harq_pid %d\n", harq_pid);
LOG_D(PHY, "Initializing nFAPI for ULSCH, harq_pid %d, layers %d\n", harq_pid, ulsch_pdu->nrOfLayers);
}
void reset_active_ulsch(PHY_VARS_gNB *gNB, int frame)
@@ -93,7 +93,7 @@ NR_gNB_ULSCH_t new_gNB_ulsch(uint8_t max_ldpc_iterations, uint16_t N_RB_UL)
}
uint32_t ulsch_bytes = a_segments * 1056; // allocated bytes per segment
NR_gNB_ULSCH_t ulsch;
NR_gNB_ULSCH_t ulsch = {0};
ulsch.max_ldpc_iterations = max_ldpc_iterations;
ulsch.harq_pid = -1;
@@ -568,6 +568,7 @@ void nr_ulsch_channel_compensation(int **rxdataF_ext,
int **ul_ch_estimates_ext,
int **ul_ch_mag,
int **ul_ch_magb,
int **ul_ch_magc,
int **rxdataF_comp,
int ***rho,
NR_DL_FRAME_PARMS *frame_parms,
@@ -625,8 +626,8 @@ void nr_ulsch_channel_compensation(int **rxdataF_ext,
unsigned short rb;
unsigned char aatx,aarx;
__m128i *ul_ch128,*ul_ch128_2,*ul_ch_mag128,*ul_ch_mag128b,*rxdataF128,*rxdataF_comp128,*rho128;
__m128i mmtmpD0,mmtmpD1,mmtmpD2,mmtmpD3,QAM_amp128={0},QAM_amp128b={0};
__m128i *ul_ch128,*ul_ch128_2,*ul_ch_mag128,*ul_ch_mag128b,*ul_ch_mag128c,*rxdataF128,*rxdataF_comp128,*rho128;
__m128i mmtmpD0,mmtmpD1,mmtmpD2,mmtmpD3,QAM_amp128={0},QAM_amp128b={0},QAM_amp128c={0};
QAM_amp128b = _mm_setzero_si128();
uint32_t nb_rb_0 = length/12 + ((length%12)?1:0);
@@ -634,10 +635,17 @@ void nr_ulsch_channel_compensation(int **rxdataF_ext,
if (mod_order == 4) {
QAM_amp128 = _mm_set1_epi16(QAM16_n1); // 2/sqrt(10)
QAM_amp128b = _mm_setzero_si128();
QAM_amp128c = _mm_setzero_si128();
}
else if (mod_order == 6) {
QAM_amp128 = _mm_set1_epi16(QAM64_n1); //
QAM_amp128b = _mm_set1_epi16(QAM64_n2);
QAM_amp128c = _mm_setzero_si128();
}
else if (mod_order == 8) {
QAM_amp128 = _mm_set1_epi16(QAM256_n1); //
QAM_amp128b = _mm_set1_epi16(QAM256_n2);
QAM_amp128c = _mm_set1_epi16(QAM256_n3);
}
// printf("comp: rxdataF_comp %p, symbol %d\n",rxdataF_comp[0],symbol);
@@ -646,6 +654,7 @@ void nr_ulsch_channel_compensation(int **rxdataF_ext,
ul_ch128 = (__m128i *)&ul_ch_estimates_ext[aatx*frame_parms->nb_antennas_rx+aarx][symbol*(off+(nb_rb*12))];
ul_ch_mag128 = (__m128i *)&ul_ch_mag[aatx*frame_parms->nb_antennas_rx+aarx][symbol*(off+(nb_rb*12))];
ul_ch_mag128b = (__m128i *)&ul_ch_magb[aatx*frame_parms->nb_antennas_rx+aarx][symbol*(off+(nb_rb*12))];
ul_ch_mag128c = (__m128i *)&ul_ch_magc[aatx*frame_parms->nb_antennas_rx+aarx][symbol*(off+(nb_rb*12))];
rxdataF128 = (__m128i *)&rxdataF_ext[aarx][symbol*(off+(nb_rb*12))];
rxdataF_comp128 = (__m128i *)&rxdataF_comp[aatx*frame_parms->nb_antennas_rx+aarx][symbol*(off+(nb_rb*12))];
@@ -668,37 +677,32 @@ void nr_ulsch_channel_compensation(int **rxdataF_ext,
ul_ch_mag128[0] = _mm_unpacklo_epi16(mmtmpD0,mmtmpD0);
ul_ch_mag128b[0] = ul_ch_mag128[0];
ul_ch_mag128[0] = _mm_mulhi_epi16(ul_ch_mag128[0],QAM_amp128);
ul_ch_mag128[0] = _mm_slli_epi16(ul_ch_mag128[0],1);
ul_ch_mag128b[0] = _mm_mulhi_epi16(ul_ch_mag128b[0],QAM_amp128b);
ul_ch_mag128b[0] = _mm_slli_epi16(ul_ch_mag128b[0],1);
ul_ch_mag128c[0] = ul_ch_mag128[0];
ul_ch_mag128[0] = _mm_mulhrs_epi16(ul_ch_mag128[0],QAM_amp128);
ul_ch_mag128b[0] = _mm_mulhrs_epi16(ul_ch_mag128b[0],QAM_amp128b);
ul_ch_mag128c[0] = _mm_mulhrs_epi16(ul_ch_mag128c[0],QAM_amp128c);
// print_ints("ch: = ",(int32_t*)&mmtmpD0);
// print_shorts("QAM_amp:",(int16_t*)&QAM_amp128);
// print_shorts("mag:",(int16_t*)&ul_ch_mag128[0]);
ul_ch_mag128[1] = _mm_unpackhi_epi16(mmtmpD0,mmtmpD0);
ul_ch_mag128[1] = _mm_unpackhi_epi16(mmtmpD0,mmtmpD0);
ul_ch_mag128b[1] = ul_ch_mag128[1];
ul_ch_mag128[1] = _mm_mulhi_epi16(ul_ch_mag128[1],QAM_amp128);
ul_ch_mag128[1] = _mm_slli_epi16(ul_ch_mag128[1],1);
ul_ch_mag128b[1] = _mm_mulhi_epi16(ul_ch_mag128b[1],QAM_amp128b);
ul_ch_mag128b[1] = _mm_slli_epi16(ul_ch_mag128b[1],1);
ul_ch_mag128c[1] = ul_ch_mag128[1];
ul_ch_mag128[1] = _mm_mulhrs_epi16(ul_ch_mag128[1],QAM_amp128);
ul_ch_mag128b[1] = _mm_mulhrs_epi16(ul_ch_mag128b[1],QAM_amp128b);
ul_ch_mag128c[1] = _mm_mulhrs_epi16(ul_ch_mag128c[1],QAM_amp128c);
mmtmpD0 = _mm_madd_epi16(ul_ch128[2],ul_ch128[2]);
mmtmpD0 = _mm_srai_epi32(mmtmpD0,output_shift);
mmtmpD1 = _mm_packs_epi32(mmtmpD0,mmtmpD0);
ul_ch_mag128[2] = _mm_unpacklo_epi16(mmtmpD1,mmtmpD1);
ul_ch_mag128[2] = _mm_unpacklo_epi16(mmtmpD1,mmtmpD1);
ul_ch_mag128b[2] = ul_ch_mag128[2];
ul_ch_mag128c[2] = ul_ch_mag128[2];
ul_ch_mag128[2] = _mm_mulhi_epi16(ul_ch_mag128[2],QAM_amp128);
ul_ch_mag128[2] = _mm_slli_epi16(ul_ch_mag128[2],1);
ul_ch_mag128b[2] = _mm_mulhi_epi16(ul_ch_mag128b[2],QAM_amp128b);
ul_ch_mag128b[2] = _mm_slli_epi16(ul_ch_mag128b[2],1);
ul_ch_mag128[2] = _mm_mulhrs_epi16(ul_ch_mag128[2],QAM_amp128);
ul_ch_mag128b[2] = _mm_mulhrs_epi16(ul_ch_mag128b[2],QAM_amp128b);
ul_ch_mag128c[2] = _mm_mulhrs_epi16(ul_ch_mag128c[2],QAM_amp128c);
}
// Multiply received data by conjugated channel
@@ -709,6 +713,7 @@ void nr_ulsch_channel_compensation(int **rxdataF_ext,
ul_ch128 += 3;
ul_ch_mag128 += 3;
ul_ch_mag128b += 3;
ul_ch_mag128c += 3;
rxdataF128 += 3;
rxdataF_comp128 += 3;
}
@@ -1075,6 +1080,7 @@ void nr_ulsch_detection_mrc(NR_DL_FRAME_PARMS *frame_parms,
int32_t **rxdataF_comp,
int32_t **ul_ch_mag,
int32_t **ul_ch_magb,
int32_t **ul_ch_magc,
int32_t ***rho,
uint8_t nrOfLayers,
uint8_t symbol,
@@ -1082,7 +1088,7 @@ void nr_ulsch_detection_mrc(NR_DL_FRAME_PARMS *frame_parms,
int length) {
int n_rx = frame_parms->nb_antennas_rx;
#if defined(__x86_64__) || defined(__i386__)
__m128i *rxdataF_comp128[2],*ul_ch_mag128[2],*ul_ch_mag128b[2];
__m128i *rxdataF_comp128[2],*ul_ch_mag128[2],*ul_ch_mag128b[2],*ul_ch_mag128c[2];
#elif defined(__arm__) || defined(__aarch64__)
int16x8_t *rxdataF_comp128_0,*ul_ch_mag128_0,*ul_ch_mag128_0b;
int16x8_t *rxdataF_comp128_1,*ul_ch_mag128_1,*ul_ch_mag128_1b;
@@ -1100,17 +1106,20 @@ void nr_ulsch_detection_mrc(NR_DL_FRAME_PARMS *frame_parms,
rxdataF_comp128[0] = (__m128i *)&rxdataF_comp[aatx*frame_parms->nb_antennas_rx][(symbol*(nb_re + off))];
ul_ch_mag128[0] = (__m128i *)&ul_ch_mag[aatx*frame_parms->nb_antennas_rx][(symbol*(nb_re + off))];
ul_ch_mag128b[0] = (__m128i *)&ul_ch_magb[aatx*frame_parms->nb_antennas_rx][(symbol*(nb_re + off))];
ul_ch_mag128c[0] = (__m128i *)&ul_ch_magc[aatx*frame_parms->nb_antennas_rx][(symbol*(nb_re + off))];
for (int aa=1;aa < n_rx;aa++) {
rxdataF_comp128[1] = (__m128i *)&rxdataF_comp[aatx*frame_parms->nb_antennas_rx+aa][(symbol*(nb_re + off))];
ul_ch_mag128[1] = (__m128i *)&ul_ch_mag[aatx*frame_parms->nb_antennas_rx+aa][(symbol*(nb_re + off))];
ul_ch_mag128b[1] = (__m128i *)&ul_ch_magb[aatx*frame_parms->nb_antennas_rx+aa][(symbol*(nb_re + off))];
ul_ch_mag128c[1] = (__m128i *)&ul_ch_magc[aatx*frame_parms->nb_antennas_rx+aa][(symbol*(nb_re + off))];
// MRC on each re of rb, both on MF output and magnitude (for 16QAM/64QAM llr computation)
for (i=0; i<nb_rb_0*3; i++) {
rxdataF_comp128[0][i] = _mm_adds_epi16(rxdataF_comp128[0][i],rxdataF_comp128[1][i]);
ul_ch_mag128[0][i] = _mm_adds_epi16(ul_ch_mag128[0][i],ul_ch_mag128[1][i]);
ul_ch_mag128b[0][i] = _mm_adds_epi16(ul_ch_mag128b[0][i],ul_ch_mag128b[1][i]);
ul_ch_mag128c[0][i] = _mm_adds_epi16(ul_ch_mag128c[0][i],ul_ch_mag128c[1][i]);
//rxdataF_comp128[0][i] = _mm_add_epi16(rxdataF_comp128_0[i],(*(__m128i *)&jitterc[0]));
}
}
@@ -1475,6 +1484,7 @@ uint8_t nr_ulsch_mmse_2layers(NR_DL_FRAME_PARMS *frame_parms,
int **rxdataF_comp,
int **ul_ch_mag,
int **ul_ch_magb,
int **ul_ch_magc,
int **ul_ch_estimates_ext,
unsigned short nb_rb,
unsigned char n_rx,
@@ -1738,33 +1748,41 @@ uint8_t nr_ulsch_mmse_2layers(NR_DL_FRAME_PARMS *frame_parms,
*
*
**************************************************************************/
__m128i *rxdataF_comp128_0, *rxdataF_comp128_1, *ul_ch_mag128_0 = NULL, *ul_ch_mag128b_0 = NULL, *ul_ch_mag128_1 = NULL, *ul_ch_mag128b_1 = NULL, *determ_fin_128;
__m128i *ul_ch_mag128_0 = NULL, *ul_ch_mag128b_0 = NULL, *ul_ch_mag128c_0 = NULL; // Layer 0
__m128i *ul_ch_mag128_1 = NULL, *ul_ch_mag128b_1 = NULL, *ul_ch_mag128c_1 = NULL; // Layer 1
__m128i mmtmpD0, mmtmpD1, mmtmpD2, mmtmpD3;
__m128i *after_mf_a_128, *after_mf_b_128, *after_mf_c_128, *after_mf_d_128;
__m128i QAM_amp128 = {0}, QAM_amp128b = {0};
__m128i QAM_amp128 = {0}, QAM_amp128b = {0}, QAM_amp128c = {0};
determ_fin_128 = (__m128i *)&determ_fin[0];
__m128i *determ_fin_128 = (__m128i *)&determ_fin[0];
rxdataF_comp128_0 = (__m128i *)&rxdataF_comp[0][symbol*(off+nb_rb*12)];//aatx=0 @ aarx =0
rxdataF_comp128_1 = (__m128i *)&rxdataF_comp[n_rx][symbol*(off+nb_rb*12)];//aatx=1 @ aarx =0
__m128i *rxdataF_comp128_0 = (__m128i *)&rxdataF_comp[0][symbol * (off + nb_rb * 12)]; // aatx=0 @ aarx =0
__m128i *rxdataF_comp128_1 = (__m128i *)&rxdataF_comp[n_rx][symbol * (off + nb_rb * 12)]; // aatx=1 @ aarx =0
after_mf_a_128 = (__m128i *)af_mf_00;
after_mf_b_128 = (__m128i *)af_mf_01;
after_mf_c_128 = (__m128i *)af_mf_10;
after_mf_d_128 = (__m128i *)af_mf_11;
__m128i *after_mf_a_128 = (__m128i *)af_mf_00;
__m128i *after_mf_b_128 = (__m128i *)af_mf_01;
__m128i *after_mf_c_128 = (__m128i *)af_mf_10;
__m128i *after_mf_d_128 = (__m128i *)af_mf_11;
if (mod_order>2) {
if (mod_order > 2) {
if (mod_order == 4) {
QAM_amp128 = _mm_set1_epi16(QAM16_n1); //2/sqrt(10)
QAM_amp128 = _mm_set1_epi16(QAM16_n1); // 2/sqrt(10)
QAM_amp128b = _mm_setzero_si128();
QAM_amp128c = _mm_setzero_si128();
} else if (mod_order == 6) {
QAM_amp128 = _mm_set1_epi16(QAM64_n1); //4/sqrt{42}
QAM_amp128b = _mm_set1_epi16(QAM64_n2); //2/sqrt{42}
QAM_amp128 = _mm_set1_epi16(QAM64_n1); // 4/sqrt{42}
QAM_amp128b = _mm_set1_epi16(QAM64_n2); // 2/sqrt{42}
QAM_amp128c = _mm_setzero_si128();
} else if (mod_order == 8) {
QAM_amp128 = _mm_set1_epi16(QAM256_n1);
QAM_amp128b = _mm_set1_epi16(QAM256_n2);
QAM_amp128c = _mm_set1_epi16(QAM256_n3);
}
ul_ch_mag128_0 = (__m128i *)&ul_ch_mag[0][symbol * (off + nb_rb * 12)];
ul_ch_mag128b_0 = (__m128i *)&ul_ch_magb[0][symbol * (off + nb_rb * 12)];
ul_ch_mag128c_0 = (__m128i *)&ul_ch_magc[0][symbol * (off + nb_rb * 12)];
ul_ch_mag128_1 = (__m128i *)&ul_ch_mag[frame_parms->nb_antennas_rx][symbol * (off + nb_rb * 12)];
ul_ch_mag128b_1 = (__m128i *)&ul_ch_magb[frame_parms->nb_antennas_rx][symbol * (off + nb_rb * 12)];
ul_ch_mag128c_1 = (__m128i *)&ul_ch_magc[frame_parms->nb_antennas_rx][symbol * (off + nb_rb * 12)];
}
for (int rb = 0; rb < 3 * nb_rb_0; rb++) {
@@ -1790,18 +1808,24 @@ uint8_t nr_ulsch_mmse_2layers(NR_DL_FRAME_PARMS *frame_parms,
// Layer 0
ul_ch_mag128_0[0] = mmtmpD2;
ul_ch_mag128b_0[0] = mmtmpD2;
ul_ch_mag128c_0[0] = mmtmpD2;
ul_ch_mag128_0[0] = _mm_mulhi_epi16(ul_ch_mag128_0[0], QAM_amp128);
ul_ch_mag128_0[0] = _mm_slli_epi16(ul_ch_mag128_0[0], 1);
ul_ch_mag128b_0[0] = _mm_mulhi_epi16(ul_ch_mag128b_0[0], QAM_amp128b);
ul_ch_mag128b_0[0] = _mm_slli_epi16(ul_ch_mag128b_0[0], 1);
ul_ch_mag128c_0[0] = _mm_mulhi_epi16(ul_ch_mag128c_0[0], QAM_amp128c);
ul_ch_mag128c_0[0] = _mm_slli_epi16(ul_ch_mag128c_0[0], 1);
// Layer 1
ul_ch_mag128_1[0] = mmtmpD2;
ul_ch_mag128b_1[0] = mmtmpD2;
ul_ch_mag128c_1[0] = mmtmpD2;
ul_ch_mag128_1[0] = _mm_mulhi_epi16(ul_ch_mag128_1[0], QAM_amp128);
ul_ch_mag128_1[0] = _mm_slli_epi16(ul_ch_mag128_1[0], 1);
ul_ch_mag128b_1[0] = _mm_mulhi_epi16(ul_ch_mag128b_1[0], QAM_amp128b);
ul_ch_mag128b_1[0] = _mm_slli_epi16(ul_ch_mag128b_1[0], 1);
ul_ch_mag128c_1[0] = _mm_mulhi_epi16(ul_ch_mag128c_1[0], QAM_amp128c);
ul_ch_mag128c_1[0] = _mm_slli_epi16(ul_ch_mag128c_1[0], 1);
}
// multiply by channel Inv
@@ -1834,6 +1858,8 @@ uint8_t nr_ulsch_mmse_2layers(NR_DL_FRAME_PARMS *frame_parms,
ul_ch_mag128_1 += 1;
ul_ch_mag128b_0 += 1;
ul_ch_mag128b_1 += 1;
ul_ch_mag128c_0 += 1;
ul_ch_mag128c_1 += 1;
rxdataF_comp128_0 += 1;
rxdataF_comp128_1 += 1;
after_mf_a_128 += 1;
@@ -1905,7 +1931,12 @@ void nr_rx_pusch(PHY_VARS_gNB *gNB,
}
nr_gnb_measurements(gNB, ulsch, pusch_vars, symbol, rel15_ul->nrOfLayers);
allocCast2D(n0_subband_power,
unsigned int,
gNB->measurements.n0_subband_power,
frame_parms->nb_antennas_rx,
frame_parms->N_RB_UL,
false);
for (aarx = 0; aarx < frame_parms->nb_antennas_rx; aarx++) {
if (symbol == rel15_ul->start_symbol_index) {
pusch_vars->ulsch_power[aarx] = 0;
@@ -1918,7 +1949,7 @@ void nr_rx_pusch(PHY_VARS_gNB *gNB,
}
for (int rb = 0; rb < rel15_ul->rb_size; rb++) {
pusch_vars->ulsch_noise_power[aarx] +=
gNB->measurements.n0_subband_power[aarx][rel15_ul->bwp_start + rel15_ul->rb_start + rb] / rel15_ul->rb_size;
n0_subband_power[aarx][rel15_ul->bwp_start + rel15_ul->rb_start + rb] / rel15_ul->rb_size;
}
LOG_D(PHY,
"aa %d, bwp_start%d, rb_start %d, rb_size %d: ulsch_power %d, ulsch_noise_power %d\n",
@@ -2030,11 +2061,12 @@ void nr_rx_pusch(PHY_VARS_gNB *gNB,
//--------------------- Channel Compensation ---------------
//----------------------------------------------------------
start_meas(&gNB->ulsch_channel_compensation_stats);
LOG_D(PHY, "Doing channel compensations log2_maxh %d, avgs %d (%d,%d)\n", pusch_vars->log2_maxh, avgs, avg[0], avg[1]);
LOG_D(PHY, "Doing channel compensations log2_maxh %d, avgs %d (%d,%d)\n" ,pusch_vars->log2_maxh, avgs,avg[0], avg[1]);
nr_ulsch_channel_compensation(pusch_vars->rxdataF_ext,
pusch_vars->ul_ch_estimates_ext,
pusch_vars->ul_ch_mag0,
pusch_vars->ul_ch_magb0,
pusch_vars->ul_ch_magc0,
pusch_vars->rxdataF_comp,
(rel15_ul->nrOfLayers > 1) ? pusch_vars->rho : NULL,
frame_parms,
@@ -2052,6 +2084,7 @@ void nr_rx_pusch(PHY_VARS_gNB *gNB,
pusch_vars->rxdataF_comp,
pusch_vars->ul_ch_mag0,
pusch_vars->ul_ch_magb0,
pusch_vars->ul_ch_magc0,
(rel15_ul->nrOfLayers > 1) ? pusch_vars->rho : NULL,
rel15_ul->nrOfLayers,
symbol,
@@ -2064,6 +2097,7 @@ void nr_rx_pusch(PHY_VARS_gNB *gNB,
pusch_vars->rxdataF_comp,
pusch_vars->ul_ch_mag0,
pusch_vars->ul_ch_magb0,
pusch_vars->ul_ch_magc0,
pusch_vars->ul_ch_estimates_ext,
rel15_ul->rb_size,
frame_parms->nb_antennas_rx,
@@ -2110,15 +2144,15 @@ void nr_rx_pusch(PHY_VARS_gNB *gNB,
/*-----------------------------------------------------------------------------------------------------*/
start_meas(&gNB->ulsch_llr_stats);
for (aatx=0; aatx < rel15_ul->nrOfLayers; aatx++) {
nr_ulsch_compute_llr(
&pusch_vars->rxdataF_comp[aatx * frame_parms->nb_antennas_rx][symbol * (off + rel15_ul->rb_size * NR_NB_SC_PER_RB)],
pusch_vars->ul_ch_mag0[aatx * frame_parms->nb_antennas_rx],
pusch_vars->ul_ch_magb0[aatx * frame_parms->nb_antennas_rx],
&pusch_vars->llr_layers[aatx][rxdataF_ext_offset * rel15_ul->qam_mod_order],
rel15_ul->rb_size,
pusch_vars->ul_valid_re_per_slot[symbol],
symbol,
rel15_ul->qam_mod_order);
nr_ulsch_compute_llr(&pusch_vars->rxdataF_comp[aatx*frame_parms->nb_antennas_rx][symbol * (off + rel15_ul->rb_size * NR_NB_SC_PER_RB)],
pusch_vars->ul_ch_mag0[aatx*frame_parms->nb_antennas_rx],
pusch_vars->ul_ch_magb0[aatx*frame_parms->nb_antennas_rx],
pusch_vars->ul_ch_magc0[aatx*frame_parms->nb_antennas_rx],
&pusch_vars->llr_layers[aatx][rxdataF_ext_offset * rel15_ul->qam_mod_order],
rel15_ul->rb_size,
pusch_vars->ul_valid_re_per_slot[symbol],
symbol,
rel15_ul->qam_mod_order);
}
stop_meas(&gNB->ulsch_llr_stats);
rxdataF_ext_offset += pusch_vars->ul_valid_re_per_slot[symbol];
@@ -352,10 +352,118 @@ void nr_ulsch_64qam_llr(int32_t *rxdataF_comp,
#endif
}
void nr_ulsch_256qam_llr(int32_t *rxdataF_comp,
int32_t *ul_ch_mag,
int32_t *ul_ch_magb,
int32_t *ul_ch_magc,
int16_t *ulsch_llr,
uint32_t nb_rb,
uint32_t nb_re,
uint8_t symbol)
{
int off = ((nb_rb&1) == 1)? 4:0;
simde__m256i *rxF = (simde__m256i*)rxdataF_comp;
simde__m256i *ch_mag,*ch_magb,*ch_magc;
register simde__m256i xmm0,xmm1,xmm2,xmm3,xmm4,xmm5,xmm6;
simde__m256i *llr256=(simde__m256i*)ulsch_llr;
ch_mag = (simde__m256i*)&ul_ch_mag[(symbol*(off+(nb_rb*12)))];
ch_magb = (simde__m256i*)&ul_ch_magb[(symbol*(off+(nb_rb*12)))];
ch_magc = (simde__m256i*)&ul_ch_magc[(symbol*(off+(nb_rb*12)))];
int len_mod8 = nb_re&7;
int nb_re256 = nb_re>>3; // length in 256-bit words (8 REs)
for (int i=0; i<nb_re256; i++) {
xmm0 = simde_mm256_abs_epi16(rxF[i]); // registers of even index in xmm0-> |y_R|, registers of odd index in xmm0-> |y_I|
xmm0 = simde_mm256_subs_epi16(ch_mag[i],xmm0); // registers of even index in xmm0-> |y_R|-|h|^2, registers of odd index in xmm0-> |y_I|-|h|^2
// xmmtmpD2 contains 16 LLRs
xmm1 = simde_mm256_abs_epi16(xmm0);
xmm1 = simde_mm256_subs_epi16(ch_magb[i],xmm1); // contains 16 LLRs
xmm2 = simde_mm256_abs_epi16(xmm1);
xmm2 = simde_mm256_subs_epi16(ch_magc[i],xmm2); // contains 16 LLRs
// rxF[i] A0 A1 A2 A3 A4 A5 A6 A7 bits 7,6
// xmm0 B0 B1 B2 B3 B4 B5 B6 B7 bits 5,4
// xmm1 C0 C1 C2 C3 C4 C5 C6 C7 bits 3,2
// xmm2 D0 D1 D2 D3 D4 D5 D6 D7 bits 1,0
xmm3 = simde_mm256_unpacklo_epi32(rxF[i],xmm0); // A0 B0 A1 B1 A4 B4 A5 B5
xmm4 = simde_mm256_unpackhi_epi32(rxF[i],xmm0); // A2 B2 A3 B3 A6 B6 A7 B7
xmm5 = simde_mm256_unpacklo_epi32(xmm1,xmm2); // C0 D0 C1 D1 C4 D4 C5 D5
xmm6 = simde_mm256_unpackhi_epi32(xmm1,xmm2); // C2 D2 C3 D3 C6 D6 C7 D7
xmm0 = simde_mm256_unpacklo_epi64(xmm3,xmm5); // A0 B0 C0 D0 A4 B4 C4 D4
xmm1 = simde_mm256_unpackhi_epi64(xmm3,xmm5); // A1 B1 C1 D1 A5 B5 C5 D5
xmm2 = simde_mm256_unpacklo_epi64(xmm4,xmm6); // A2 B2 C2 D2 A6 B6 C6 D6
xmm3 = simde_mm256_unpackhi_epi64(xmm4,xmm6); // A3 B3 C3 D3 A7 B7 C7 D7
llr256[0] = simde_mm256_permute2x128_si256(xmm0, xmm1, 0x20); // A0 B0 C0 D0 A1 B1 C1 D1
llr256[1] = simde_mm256_permute2x128_si256(xmm2, xmm3, 0x20); // A2 B2 C2 D2 A3 B3 C3 D3
llr256[2] = simde_mm256_permute2x128_si256(xmm0, xmm1, 0x31); // A4 B4 C4 D4 A5 B5 C5 D5
llr256[3] = simde_mm256_permute2x128_si256(xmm2, xmm3, 0x31); // A6 B6 C6 D6 A7 B7 C7 D7
llr256+=4;
}
simde__m128i *llr128 = (simde__m128i*)llr256;
if (len_mod8 >= 4) {
int nb_re128 = nb_re>>2;
simde__m128i xmm0,xmm1,xmm2,xmm3,xmm4,xmm5,xmm6;
simde__m128i *rxF = (simde__m128i*)rxdataF_comp;
simde__m128i *ch_mag = (simde__m128i*)&ul_ch_mag[(symbol*(off+(nb_rb*12)))];
simde__m128i *ch_magb = (simde__m128i*)&ul_ch_magb[(symbol*(off+(nb_rb*12)))];
simde__m128i *ch_magc = (simde__m128i*)&ul_ch_magc[(symbol*(off+(nb_rb*12)))];
xmm0 = simde_mm_abs_epi16(rxF[nb_re128-1]); // registers of even index in xmm0-> |y_R|, registers of odd index in xmm0-> |y_I|
xmm0 = simde_mm_subs_epi16(ch_mag[nb_re128-1],xmm0); // registers of even index in xmm0-> |y_R|-|h|^2, registers of odd index in xmm0-> |y_I|-|h|^2
// xmmtmpD2 contains 8 LLRs
xmm1 = simde_mm_abs_epi16(xmm0);
xmm1 = simde_mm_subs_epi16(ch_magb[nb_re128-1],xmm1); // contains 8 LLRs
xmm2 = simde_mm_abs_epi16(xmm1);
xmm2 = simde_mm_subs_epi16(ch_magc[nb_re128-1],xmm2); // contains 8 LLRs
// rxF[i] A0 A1 A2 A3
// xmm0 B0 B1 B2 B3
// xmm1 C0 C1 C2 C3
// xmm2 D0 D1 D2 D3
xmm3 = simde_mm_unpacklo_epi32(rxF[nb_re128-1],xmm0); // A0 B0 A1 B1
xmm4 = simde_mm_unpackhi_epi32(rxF[nb_re128-1],xmm0); // A2 B2 A3 B3
xmm5 = simde_mm_unpacklo_epi32(xmm1,xmm2); // C0 D0 C1 D1
xmm6 = simde_mm_unpackhi_epi32(xmm1,xmm2); // C2 D2 C3 D3
llr128[0] = simde_mm_unpacklo_epi64(xmm3,xmm5); // A0 B0 C0 D0
llr128[1] = simde_mm_unpackhi_epi64(xmm3,xmm5); // A1 B1 C1 D1
llr128[2] = simde_mm_unpacklo_epi64(xmm4,xmm6); // A2 B2 C2 D2
llr128[3] = simde_mm_unpackhi_epi64(xmm4,xmm6); // A3 B3 C3 D3
llr128+=4;
}
if (len_mod8 == 6) {
int nb_re64 = nb_re>>1;
simde__m64 *llr64 = (simde__m64 *)llr128;
simde__m64 xmm0,xmm1,xmm2;
simde__m64 *rxF = (simde__m64*)rxdataF_comp;
simde__m64 *ch_mag = (simde__m64*)&ul_ch_mag[(symbol*(off+(nb_rb*12)))];
simde__m64 *ch_magb = (simde__m64*)&ul_ch_magb[(symbol*(off+(nb_rb*12)))];
simde__m64 *ch_magc = (simde__m64*)&ul_ch_magc[(symbol*(off+(nb_rb*12)))];
xmm0 = simde_mm_abs_pi16(rxF[nb_re64-1]); // registers of even index in xmm0-> |y_R|, registers of odd index in xmm0-> |y_I|
xmm0 = simde_mm_subs_pi16(ch_mag[nb_re-1],xmm0); // registers of even index in xmm0-> |y_R|-|h|^2, registers of odd index in xmm0-> |y_I|-|h|^2
// xmmtmpD2 contains 4 LLRs
xmm1 = simde_mm_abs_pi16(xmm0);
xmm1 = simde_mm_subs_pi16(ch_magb[nb_re64-1],xmm1); // contains 4 LLRs
xmm2 = simde_mm_abs_pi16(xmm1);
xmm2 = simde_mm_subs_pi16(ch_magc[nb_re64-1],xmm2); // contains 4 LLRs
// rxF[i] A0 A1
// xmm0 B0 B1
// xmm1 C0 C1
// xmm2 D0 D1
llr64[0] = simde_m_punpckldq(rxF[nb_re64-1],xmm0); // A0 B0
llr64[2] = simde_m_punpckhdq(rxF[nb_re64-1],xmm0); // A1 B1
llr64[1] = simde_m_punpckldq(xmm1,xmm2); // C0 D0
llr64[3] = simde_m_punpckhdq(xmm1,xmm2); // C1 D1
}
}
void nr_ulsch_compute_llr(int32_t *rxdataF_comp,
int32_t *ul_ch_mag,
int32_t *ul_ch_magb,
int32_t *ul_ch_magc,
int16_t *ulsch_llr,
uint32_t nb_rb,
uint32_t nb_re,
@@ -386,8 +494,18 @@ void nr_ulsch_compute_llr(int32_t *rxdataF_comp,
nb_re,
symbol);
break;
case 8:
nr_ulsch_256qam_llr(rxdataF_comp,
ul_ch_mag,
ul_ch_magb,
ul_ch_magc,
ulsch_llr,
nb_rb,
nb_re,
symbol);
break;
default:
LOG_E(PHY,"nr_ulsch_compute_llr: invalid Qm value, symbol = %d, Qm = %d\n",symbol, mod_order);
AssertFatal(1==0,"nr_ulsch_compute_llr: invalid Qm value, symbol = %d, Qm = %d\n",symbol, mod_order);
break;
}
}
+4 -2
View File
@@ -1704,8 +1704,10 @@ void nr_decode_pucch2(PHY_VARS_gNB *gNB,
((int16_t*)&llrs[half_prb])[7]);
} // half_prb
} // symb
// run polar decoder on llrs
decoderState = polar_decoder_int16((int16_t*)llrs, decodedPayload, 0, 2,nb_bit,pucch_pdu->prb_size);
decoderState = polar_decoder_int16((int16_t *)llrs, decodedPayload, 0, NR_POLAR_UCI_PUCCH_MESSAGE_TYPE, nb_bit, pucch_pdu->prb_size);
LOG_D(PHY,"UCI decoderState %d, payload[0] %llu\n",decoderState,(unsigned long long)decodedPayload[0]);
if (decoderState>0) decoderState=1;
corr_dB = dB_fixed64(corr);
@@ -1774,7 +1776,7 @@ void nr_decode_pucch2(PHY_VARS_gNB *gNB,
}
bit_left = pucch_pdu->bit_len_csi_part1-((csi_part1_bytes-1)<<3);
uci_pdu->csi_part1.csi_part1_payload[i] = decodedPayload[0] & ((1<<bit_left)-1);
decodedPayload[0] >>= pucch_pdu->bit_len_csi_part1;
decodedPayload[0] = pucch_pdu->bit_len_csi_part1 < 64 ? decodedPayload[0] >> pucch_pdu->bit_len_csi_part1 : 0;
}
if (pucch_pdu->bit_len_csi_part2>0) {
@@ -88,6 +88,21 @@ void nr_ue_measurements(PHY_VARS_NR_UE *ue,
ue->measurements.nb_antennas_rx = frame_parms->nb_antennas_rx;
allocCast3D(rx_spatial_power,
int,
ue->measurements.rx_spatial_power,
NUMBER_OF_CONNECTED_gNB_MAX,
frame_parms->nb_antenna_ports_gNB,
frame_parms->nb_antennas_rx,
false);
allocCast3D(rx_spatial_power_dB,
unsigned short,
ue->measurements.rx_spatial_power_dB,
NUMBER_OF_CONNECTED_gNB_MAX,
frame_parms->nb_antenna_ports_gNB,
frame_parms->nb_antennas_rx,
false);
// signal measurements
for (gNB_id = 0; gNB_id < ue->n_connected_gNB; gNB_id++){
@@ -98,15 +113,14 @@ void nr_ue_measurements(PHY_VARS_NR_UE *ue,
ue->measurements.rx_power[gNB_id][aarx] = 0;
for (aatx = 0; aatx < frame_parms->nb_antenna_ports_gNB; aatx++){
const int z=signal_energy_nodc(&dl_ch_estimates[gNB_id][ch_offset], N_RB_DL * NR_NB_SC_PER_RB);
rx_spatial_power[gNB_id][aatx][aarx] = z;
ue->measurements.rx_spatial_power[gNB_id][aatx][aarx] = (signal_energy_nodc(&dl_ch_estimates[gNB_id][ch_offset], N_RB_DL*NR_NB_SC_PER_RB));
if (ue->measurements.rx_spatial_power[gNB_id][aatx][aarx]<0)
ue->measurements.rx_spatial_power[gNB_id][aatx][aarx] = 0;
ue->measurements.rx_spatial_power_dB[gNB_id][aatx][aarx] = (unsigned short) dB_fixed(ue->measurements.rx_spatial_power[gNB_id][aatx][aarx]);
ue->measurements.rx_power[gNB_id][aarx] += ue->measurements.rx_spatial_power[gNB_id][aatx][aarx];
if (rx_spatial_power[gNB_id][aatx][aarx] < 0)
rx_spatial_power[gNB_id][aatx][aarx] = 0;
rx_spatial_power_dB[gNB_id][aatx][aarx] = (unsigned short)dB_fixed(rx_spatial_power[gNB_id][aatx][aarx]);
ue->measurements.rx_power[gNB_id][aarx] += rx_spatial_power[gNB_id][aatx][aarx];
}
ue->measurements.rx_power_dB[gNB_id][aarx] = (unsigned short) dB_fixed(ue->measurements.rx_power[gNB_id][aarx]);
+2 -3
View File
@@ -980,9 +980,8 @@ int nr_ue_csi_rs_procedures(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, c16_t r
fapi_nr_rx_indication_t rx_ind = {0};
nr_fill_dl_indication(&dl_indication, NULL, &rx_ind, proc, ue, NULL);
nr_fill_rx_indication(&rx_ind, FAPI_NR_CSIRS_IND, ue, NULL, NULL, 1, proc, (void *)&csirs_measurements, NULL);
if (ue->if_inst && ue->if_inst->dl_indication) {
ue->if_inst->dl_indication(&dl_indication, NULL);
}
if (ue->if_inst && ue->if_inst->dl_indication)
ue->if_inst->dl_indication(&dl_indication);
return 0;
}
@@ -515,7 +515,7 @@ int nr_initial_sync(UE_nr_rxtx_proc_t *proc,
}
// if stand alone and sync on ssb do sib1 detection as part of initial sync
if (sa==1 && ret==0) {
if (sa == 1 && ret == 0) {
nr_ue_dlsch_init(phy_data.dlsch, 1, ue->max_ldpc_iterations);
bool dec = false;
proc->gNB_id = 0; //FIXME
@@ -524,7 +524,7 @@ int nr_initial_sync(UE_nr_rxtx_proc_t *proc,
int32_t pdcch_est_size = ((((fp->symbols_per_slot*(fp->ofdm_symbol_size+LTE_CE_FILTER_LENGTH))+15)/16)*16);
__attribute__ ((aligned(16))) int32_t pdcch_dl_ch_estimates[4*fp->nb_antennas_rx][pdcch_est_size];
for(int n_ss = 0; n_ss<phy_pdcch_config->nb_search_space; n_ss++) {
for(int n_ss = 0; n_ss < phy_pdcch_config->nb_search_space; n_ss++) {
proc->nr_slot_rx = phy_pdcch_config->slot; // setting PDCCH slot to proc
uint8_t nb_symb_pdcch = phy_pdcch_config->pdcch_config[n_ss].coreset.duration;
int start_symb = phy_pdcch_config->pdcch_config[n_ss].coreset.StartSymbolIndex;
+2 -2
View File
@@ -520,7 +520,7 @@ int nr_rx_pbch(PHY_VARS_NR_UE *ue,
nr_fill_dl_indication(&dl_indication, NULL, &rx_ind, proc, ue, phy_data);
nr_fill_rx_indication(&rx_ind, FAPI_NR_RX_PDU_TYPE_SSB, ue, NULL, NULL, number_pdus, proc, NULL, NULL);
if (ue->if_inst && ue->if_inst->dl_indication)
ue->if_inst->dl_indication(&dl_indication, NULL);
ue->if_inst->dl_indication(&dl_indication);
return(decoderState);
}
// printf("polar decoder output 0x%08x\n",pbch_a_prime);
@@ -591,7 +591,7 @@ int nr_rx_pbch(PHY_VARS_NR_UE *ue,
nr_fill_rx_indication(&rx_ind, FAPI_NR_RX_PDU_TYPE_SSB, ue, NULL, NULL, number_pdus, proc, (void *)result, NULL);
if (ue->if_inst && ue->if_inst->dl_indication)
ue->if_inst->dl_indication(&dl_indication, NULL);
ue->if_inst->dl_indication(&dl_indication);
return 0;
}
@@ -403,7 +403,7 @@ int generate_srs_nr(nfapi_nr_srs_pdu_t *srs_config_pdu,
LOG_I(NR_PHY,"(%d) \t%i\t%i\n", subcarrier_log, (int16_t)(r_real_amp&0xFFFF), (int16_t)(r_imag_amp&0xFFFF));
#endif
txdataF[p_index][symbol_offset+l_line_offset+subcarrier] = (r_real_amp & 0xFFFF) + ((r_imag_amp<<16)&0xFFFF0000);
*(c16_t *)&txdataF[p_index][symbol_offset + l_line_offset + subcarrier] = (c16_t){r_real_amp, r_imag_amp};
// Subcarrier increment
subcarrier += K_TC;
+74
View File
@@ -34,6 +34,7 @@
#include <assert.h>
#include "PHY/sse_intrin.h"
#include "common/utils/assertions.h"
#include "common/utils/utils.h"
#if defined(__x86_64__) || defined(__i386__)
#define simd_q15_t __m128i
@@ -94,6 +95,79 @@ extern "C" {
int64_t i;
} c64_t;
typedef struct {
int dim1;
int dim2;
int dim3;
int dim4;
uint8_t data[];
} fourDimArray_t;
static inline fourDimArray_t *allocateFourDimArray(int elmtSz, int dim1, int dim2, int dim3, int dim4)
{
int sz = elmtSz;
DevAssert(dim1 > 0);
sz *= dim1;
if (dim2) {
sz *= dim2;
if (dim3) {
sz *= dim3;
if (dim4)
sz *= dim4;
}
}
fourDimArray_t *tmp = (fourDimArray_t *)malloc16_clear(sizeof(*tmp) + sz);
AssertFatal(tmp, "no more memory\n");
*tmp = (fourDimArray_t){dim1, dim2, dim3, dim4};
return tmp;
}
#define CheckArrAllocated(workingVar, elementType, ArraY, diM1, diM2, diM3, diM4, resizeAllowed) \
if (!(ArraY)) \
ArraY = allocateFourDimArray(sizeof(elementType), diM1, diM2, diM3, diM4); \
else { \
if ((resizeAllowed) \
&& ((diM1) != (ArraY)->dim1 || (diM2) != (ArraY)->dim2 || (diM3) != (ArraY)->dim3 || (diM4) != (ArraY)->dim4)) { \
LOG_I(PHY, "resizing %s to %d/%d/%d/%d\n", #ArraY, (diM1), (diM2), (diM3), (diM4)); \
free(ArraY); \
ArraY = allocateFourDimArray(sizeof(elementType), diM1, diM2, diM3, diM4); \
} else \
DevAssert((diM1) == (ArraY)->dim1 && (diM2) == (ArraY)->dim2 && (diM3) == (ArraY)->dim3 && (diM4) == (ArraY)->dim4); \
}
#define cast1Darray(workingVar, elementType, ArraY) elementType *workingVar = (elementType *)((ArraY)->data);
#define allocCast1D(workingVar, elementType, ArraY, dim1, resizeAllowed) \
CheckArrAllocated(workingVar, elementType, ArraY, dim1, 0, 0, 0, resizeAllowed); \
cast1Darray(workingVar, elementType, ArraY);
#define cast2Darray(workingVar, elementType, ArraY) \
elementType(*workingVar)[(ArraY)->dim2] = (elementType(*)[(ArraY)->dim2])((ArraY)->data);
#define allocCast2D(workingVar, elementType, ArraY, dim1, dim2, resizeAllowed) \
CheckArrAllocated(workingVar, elementType, ArraY, dim1, dim2, 0, 0, resizeAllowed); \
cast2Darray(workingVar, elementType, ArraY);
#define cast3Darray(workingVar, elementType, ArraY) \
elementType(*workingVar)[(ArraY)->dim2][(ArraY)->dim3] = (elementType(*)[(ArraY)->dim2][(ArraY)->dim3])((ArraY)->data);
#define allocCast3D(workingVar, elementType, ArraY, dim1, dim2, dim3, resizeAllowed) \
CheckArrAllocated(workingVar, elementType, ArraY, dim1, dim2, dim3, 0, resizeAllowed); \
cast3Darray(workingVar, elementType, ArraY);
#define cast4Darray(workingVar, elementType, ArraY) \
elementType(*workingVar)[(ArraY)->dim2][(ArraY)->dim3][(ArraY)->dim4] = \
(elementType(*)[(ArraY)->dim2][(ArraY)->dim3][(ArraY)->dim4])((ArraY)->data);
#define allocCast4D(workingVar, elementType, ArraY, dim1, dim2, dim3, dim4, resizeAllowed) \
CheckArrAllocated(workingVar, elementType, ArraY, dim1, dim2, dim3, dim4, resizeAllowed); \
cast4Darray(workingVar, elementType, ArraY);
#define clearArray(ArraY, elementType) \
memset((ArraY)->data, \
0, \
sizeof(elementType) * (ArraY)->dim1 * max((ArraY)->dim2, 1) * max((ArraY)->dim3, 1) * max((ArraY)->dim4, 1))
#define squaredMod(a) ((a).r*(a).r + (a).i*(a).i)
#define csum(res, i1, i2) (res).r = (i1).r + (i2).r ; (res).i = (i1).i + (i2).i
+22 -11
View File
@@ -103,8 +103,8 @@ typedef struct {
int total_bytes_rx;
int current_Qm;
int current_RI;
int power[NB_ANTENNAS_RX];
int noise_power[NB_ANTENNAS_RX];
int power[MAX_ANT];
int noise_power[MAX_ANT];
int DTX;
int sync_pos;
} NR_gNB_SCH_STATS_t;
@@ -229,9 +229,9 @@ typedef struct {
typedef struct {
//! estimated received spatial signal power (linear)
unsigned int rx_spatial_power[NB_ANTENNAS_TX][NB_ANTENNAS_RX];
fourDimArray_t * rx_spatial_power;
//! estimated received spatial signal power (dB)
unsigned int rx_spatial_power_dB[NB_ANTENNAS_TX][NB_ANTENNAS_RX];
fourDimArray_t * rx_spatial_power_dB;
//! estimated rssi (dBm)
int rx_rssi_dBm;
//! estimated correlation (wideband linear) between spatial channels (computed in dlsch_demodulation)
@@ -353,28 +353,40 @@ typedef struct {
/// - first index: rx antenna id [0..nb_antennas_rx[
/// - second index: ? [0..12*N_RB_UL*frame_parms->symbols_per_tti[
int32_t **ul_ch_magb;
/// \brief Magnitude of the UL channel estimates scaled for 4th bit level thresholds in LLR computation
/// - first index: rx antenna id [0..nb_antennas_rx[
/// - second index: ? [0..12*N_RB_UL*frame_parms->symbols_per_tti[
int32_t **ul_ch_magc;
/// \brief Cross-correlation of two UE signals.
/// - first index: rx antenna [0..nb_antennas_rx[
/// - second index: symbol [0..]
int32_t ***rho;
/// \f$\log_2(\max|H_i|^2)\f$
int16_t log2_maxh;
/// \brief Magnitude of Uplink Channel first layer (16QAM level/First 64QAM level).
/// \brief Magnitude of Uplink Channel first layer (16QAM level/First 64QAM level/First 256QAM level).
/// - first index: ? [0..7] (hard coded) FIXME! accessed via \c nb_antennas_rx
/// - second index: ? [0..168*N_RB_UL[
int32_t **ul_ch_mag0;
/// \brief Magnitude of Uplink Channel second layer (16QAM level/First 64QAM level).
/// \brief Magnitude of Uplink Channel second layer (16QAM level/First 64QAM level/First 256QAM level).
/// - first index: ? [0..7] (hard coded) FIXME! accessed via \c nb_antennas_rx
/// - second index: ? [0..168*N_RB_UL[
int32_t **ul_ch_mag1[8][8];
/// \brief Magnitude of Uplink Channel, first layer (2nd 64QAM level).
/// \brief Magnitude of Uplink Channel, first layer (2nd 64QAM/256QAM level).
/// - first index: ? [0..7] (hard coded) FIXME! accessed via \c nb_antennas_rx
/// - second index: ? [0..168*N_RB_UL[
int32_t **ul_ch_magb0;
/// \brief Magnitude of Uplink Channel second layer (2nd 64QAM level).
/// \brief Magnitude of Uplink Channel second layer (2nd 64QAM/256QAM level).
/// - first index: ? [0..7] (hard coded) FIXME! accessed via \c nb_antennas_rx
/// - second index: ? [0..168*N_RB_UL[
int32_t **ul_ch_magb1[8][8];
/// \brief Magnitude of Uplink Channel, first layer (3rd 256QAM level).
/// - first index: ? [0..7] (hard coded) FIXME! accessed via \c nb_antennas_rx
/// - second index: ? [0..168*N_RB_UL[
int32_t **ul_ch_magc0;
/// \brief Magnitude of Uplink Channel second layer (3rd 256QAM level).
/// - first index: ? [0..7] (hard coded) FIXME! accessed via \c nb_antennas_rx
/// - second index: ? [0..168*N_RB_UL[
int32_t **ul_ch_magc1[8][8];
/// measured RX power based on DRS
int ulsch_power[8];
/// total signal over antennas
@@ -546,9 +558,9 @@ typedef struct {
//! estimated avg noise power (dB)
unsigned int n0_power_tot_dB;
//! estimated avg noise power per RB per RX ant (lin)
unsigned int n0_subband_power[NB_ANTENNAS_RX][275];
fourDimArray_t *n0_subband_power;
//! estimated avg noise power per RB per RX ant (dB)
unsigned int n0_subband_power_dB[NB_ANTENNAS_RX][275];
fourDimArray_t *n0_subband_power_dB;
//! estimated avg subband noise power (dB)
unsigned int n0_subband_power_avg_dB;
//! estimated avg subband noise power per antenna (dB)
@@ -557,7 +569,6 @@ typedef struct {
int n0_subband_power_tot_dB[275];
//! estimated avg noise power per RB (dBm)
int n0_subband_power_tot_dBm[275];
/// PRACH background noise level
int prach_I0;
+7 -21
View File
@@ -151,9 +151,9 @@ typedef struct {
// UE measurements
//! estimated received spatial signal power (linear)
int rx_spatial_power[NUMBER_OF_CONNECTED_gNB_MAX][2][2];
fourDimArray_t *rx_spatial_power;
//! estimated received spatial signal power (dB)
unsigned short rx_spatial_power_dB[NUMBER_OF_CONNECTED_gNB_MAX][2][2];
fourDimArray_t *rx_spatial_power_dB;
/// estimated received signal power (sum over all TX antennas)
int rx_power[NUMBER_OF_CONNECTED_gNB_MAX][NB_ANTENNAS_RX];
@@ -358,18 +358,6 @@ typedef struct UE_NR_SCAN_INFO_s {
int32_t freq_offset_Hz[3][10];
} UE_NR_SCAN_INFO_t;
typedef struct NR_UL_TIME_ALIGNMENT {
/// flag used by MAC to inform PHY about a TA to be applied
unsigned char apply_ta;
/// frame and slot when to apply the TA as stated in TS 38.213 setion 4.2
int16_t ta_frame;
char ta_slot;
/// TA command and TAGID received from the gNB
uint16_t ta_command;
uint32_t ta_total;
uint8_t tag_id;
} NR_UL_TIME_ALIGNMENT_t;
/// Top-level PHY Data Structure for UE
typedef struct {
/// \brief Module ID indicator for this instance
@@ -519,7 +507,6 @@ typedef struct {
int dlsch_mcch_trials[MAX_MBSFN_AREA][NUMBER_OF_CONNECTED_gNB_MAX];
int dlsch_mtch_trials[MAX_MBSFN_AREA][NUMBER_OF_CONNECTED_gNB_MAX];
int current_dlsch_cqi[NUMBER_OF_CONNECTED_gNB_MAX];
unsigned char first_run_timing_advance[NUMBER_OF_CONNECTED_gNB_MAX];
uint8_t decode_SIB;
uint8_t decode_MIB;
uint8_t init_sync_frame;
@@ -533,9 +520,11 @@ typedef struct {
/// Timing Advance updates variables
/// Timing advance update computed from the TA command signalled from gNB
int timing_advance;
int N_TA_offset; ///timing offset used in TDD
NR_UL_TIME_ALIGNMENT_t ul_time_alignment[NUMBER_OF_CONNECTED_gNB_MAX];
int timing_advance;
int N_TA_offset; ///timing offset used in TDD
int ta_frame;
int ta_slot;
int ta_command;
/// Flag to tell if UE is secondary user (cognitive mode)
unsigned char is_secondary_ue;
@@ -546,9 +535,6 @@ typedef struct {
/// holds the maximum channel/precoder coefficient
char log2_maxp;
/// if ==0 enables phy only test mode
int mac_enabled;
/// Flag to initialize averaging of PHY measurements
int init_averaging;
+1 -1
View File
@@ -1360,7 +1360,7 @@ void pusch_procedures(PHY_VARS_eNB *eNB,L1_rxtx_proc_t *proc) {
rb<=ulsch_harq->nb_rb;
rb++) {
int rb2 = rb+ulsch_harq->first_rb;
eNB->rb_mask_ul[rb2>>5] |= (1<<(rb2&31));
eNB->rb_mask_ul[rb2>>5] |= (1L<<(rb2&31));
}
LOG_D(PHY,"[eNB %d] frame %d, subframe %d: Scheduling ULSCH Reception for UE %d \n", eNB->Mod_id, frame, subframe, i);
+2 -1
View File
@@ -631,7 +631,8 @@ void fill_ul_rb_mask(PHY_VARS_gNB *gNB, int frame_rx, int slot_rx) {
nfapi_nr_srs_pdu_t *srs_pdu = &srs->srs_pdu;
for(int symbol = 0; symbol<(1<<srs_pdu->num_symbols); symbol++) {
for(rb = srs_pdu->bwp_start; rb < (srs_pdu->bwp_start+srs_pdu->bwp_size); rb++) {
gNB->rb_mask_ul[gNB->frame_parms.symbols_per_slot-srs_pdu->time_start_position-1+symbol][rb>>5] |= 1<<(rb&31);
gNB->rb_mask_ul[gNB->frame_parms.symbols_per_slot - srs_pdu->time_start_position - 1 + symbol][rb >> 5] |= 1U
<< (rb & 31);
}
}
}
+186 -80
View File
@@ -40,10 +40,11 @@
#include "PHY/impl_defs_nr.h"
#include "utils.h"
#include "openair2/PHY_INTERFACE/queue_t.h"
#include "SCHED_NR_UE/phy_sch_processing_time.h"
extern PHY_VARS_NR_UE ***PHY_vars_UE_g;
const char *dl_pdu_type[]={"DCI", "DLSCH", "RA_DLSCH", "SI_DLSCH", "P_DLSCH", "CSI_RS", "CSI_IM"};
const char *dl_pdu_type[]={"DCI", "DLSCH", "RA_DLSCH", "SI_DLSCH", "P_DLSCH", "CSI_RS", "CSI_IM", "TA"};
const char *ul_pdu_type[]={"PRACH", "PUCCH", "PUSCH", "SRS"};
queue_t nr_rx_ind_queue;
queue_t nr_crc_ind_queue;
@@ -331,6 +332,62 @@ void configure_dlsch(NR_UE_DLSCH_t *dlsch0,
}
void configure_ta_command(PHY_VARS_NR_UE *ue, fapi_nr_ta_command_pdu *ta_command_pdu)
{
/* Time Alignment procedure
// - UE processing capability 1
// - Setting the TA update to be applied after the reception of the TA command
// - Timing adjustment computed according to TS 38.213 section 4.2
// - Durations of N1 and N2 symbols corresponding to PDSCH and PUSCH are
// computed according to sections 5.3 and 6.4 of TS 38.214 */
const int numerology = ue->frame_parms.numerology_index;
const int ofdm_symbol_size = ue->frame_parms.ofdm_symbol_size;
const int nb_prefix_samples = ue->frame_parms.nb_prefix_samples;
const int samples_per_subframe = ue->frame_parms.samples_per_subframe;
const int slots_per_frame = ue->frame_parms.slots_per_frame;
const int slots_per_subframe = ue->frame_parms.slots_per_subframe;
const double tc_factor = 1.0 / samples_per_subframe;
// convert time factor "16 * 64 * T_c / (2^mu)" in N_TA calculation in TS38.213 section 4.2 to samples by multiplying with samples per second
// 16 * 64 * T_c / (2^mu) * samples_per_second
// = 16 * T_s / (2^mu) * samples_per_second
// = 16 * 1 / (15 kHz * 2048) / (2^mu) * (15 kHz * 2^mu * ofdm_symbol_size)
// = 16 * 1 / 2048 * ofdm_symbol_size
// = 16 * ofdm_symbol_size / 2048
uint16_t bw_scaling = 16 * ofdm_symbol_size / 2048;
const int Ta_max = 3846; // Max value of 12 bits TA Command
const double N_TA_max = Ta_max * bw_scaling * tc_factor;
// symbols corresponding to a PDSCH processing time for UE processing capability 1
// when additional PDSCH DM-RS is configured
int N_1 = pdsch_N_1_capability_1[numerology][3];
/* PUSCH preapration time N_2 for processing capability 1 */
const int N_2 = pusch_N_2_timing_capability_1[numerology][1];
/* N_t_1 time duration in msec of N_1 symbols corresponding to a PDSCH reception time
// N_t_2 time duration in msec of N_2 symbols corresponding to a PUSCH preparation time */
double N_t_1 = N_1 * (ofdm_symbol_size + nb_prefix_samples) * tc_factor;
double N_t_2 = N_2 * (ofdm_symbol_size + nb_prefix_samples) * tc_factor;
/* Time alignment procedure */
// N_t_1 + N_t_2 + N_TA_max must be in msec
const double t_subframe = 1.0; // subframe duration of 1 msec
const int ul_tx_timing_adjustment = 1 + (int)ceil(slots_per_subframe*(N_t_1 + N_t_2 + N_TA_max + 0.5)/t_subframe);
ue->ta_slot = (ta_command_pdu->ta_slot + ul_tx_timing_adjustment) % slots_per_frame;
if (ta_command_pdu->ta_slot + ul_tx_timing_adjustment > slots_per_frame)
ue->ta_frame = (ta_command_pdu->ta_frame + 1) % 1024;
else
ue->ta_frame = ta_command_pdu->ta_frame;
ue->ta_command = ta_command_pdu->ta_command;
LOG_D(PHY,"TA command received in Frame.Slot %d.%d -- Starting UL time alignment procedures. TA update will be applied at frame %d slot %d\n",
ta_command_pdu->ta_frame, ta_command_pdu->ta_slot, ue->ta_frame, ue->ta_slot);
}
int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){
bool found = false;
@@ -341,9 +398,6 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){
int slot = scheduled_response->slot;
// Note: we have to handle the thread IDs for this. To be revisited completely.
NR_UE_DLSCH_t *dlsch0 = &((nr_phy_data_t *)scheduled_response->phy_data)->dlsch[0];
NR_UE_ULSCH_t *ulsch = &((nr_phy_data_tx_t *)scheduled_response->phy_data)->ulsch;
NR_UE_PUCCH *pucch_vars = &((nr_phy_data_tx_t *)scheduled_response->phy_data)->pucch_vars;
NR_UE_CSI_IM *csiim_vars = PHY_vars_UE_g[module_id][cc_id]->csiim_vars[0];
NR_UE_CSI_RS *csirs_vars = PHY_vars_UE_g[module_id][cc_id]->csirs_vars[0];
NR_UE_PDCCH_CONFIG *phy_pdcch_config = NULL;
@@ -384,26 +438,32 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){
memcpy((void*)&(csirs_vars->csirs_config_pdu), (void*)csirs_config_pdu, sizeof(fapi_nr_dl_config_csirs_pdu_rel15_t));
csirs_vars->active = true;
break;
case FAPI_NR_DL_CONFIG_TYPE_RA_DLSCH:
case FAPI_NR_DL_CONFIG_TYPE_RA_DLSCH: {
dlsch_config_pdu = &dl_config->dl_config_list[i].dlsch_config_pdu.dlsch_config_rel15;
NR_UE_DLSCH_t *dlsch0 = &((nr_phy_data_t *)scheduled_response->phy_data)->dlsch[0];
dlsch0->rnti_type = _RA_RNTI_;
dlsch0->dlsch_config = *dlsch_config_pdu;
configure_dlsch(dlsch0, PHY_vars_UE_g[module_id][cc_id]->dl_harq_processes[0], dlsch_config_pdu, module_id,
dl_config->dl_config_list[i].dlsch_config_pdu.rnti);
break;
case FAPI_NR_DL_CONFIG_TYPE_SI_DLSCH:
} break;
case FAPI_NR_DL_CONFIG_TYPE_SI_DLSCH: {
dlsch_config_pdu = &dl_config->dl_config_list[i].dlsch_config_pdu.dlsch_config_rel15;
NR_UE_DLSCH_t *dlsch0 = &((nr_phy_data_t *)scheduled_response->phy_data)->dlsch[0];
dlsch0->rnti_type = _SI_RNTI_;
dlsch0->dlsch_config = *dlsch_config_pdu;
configure_dlsch(dlsch0, PHY_vars_UE_g[module_id][cc_id]->dl_harq_processes[0], dlsch_config_pdu, module_id,
dl_config->dl_config_list[i].dlsch_config_pdu.rnti);
break;
case FAPI_NR_DL_CONFIG_TYPE_DLSCH:
} break;
case FAPI_NR_DL_CONFIG_TYPE_DLSCH: {
dlsch_config_pdu = &dl_config->dl_config_list[i].dlsch_config_pdu.dlsch_config_rel15;
NR_UE_DLSCH_t *dlsch0 = &((nr_phy_data_t *)scheduled_response->phy_data)->dlsch[0];
dlsch0->rnti_type = _C_RNTI_;
dlsch0->dlsch_config = *dlsch_config_pdu;
configure_dlsch(dlsch0, PHY_vars_UE_g[module_id][cc_id]->dl_harq_processes[0], dlsch_config_pdu, module_id,
dl_config->dl_config_list[i].dlsch_config_pdu.rnti);
} break;
case FAPI_NR_CONFIG_TA_COMMAND:
configure_ta_command(PHY_vars_UE_g[module_id][cc_id], &dl_config->dl_config_list[i].ta_command_pdu);
break;
}
}
@@ -435,90 +495,136 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){
fapi_nr_ul_config_srs_pdu *srs_config_pdu;
switch (pdu_type){
case FAPI_NR_UL_CONFIG_TYPE_PUSCH: {
// pusch config pdu
pusch_config_pdu = &ul_config->ul_config_list[i].pusch_config_pdu;
current_harq_pid = pusch_config_pdu->pusch_data.harq_process_id;
NR_UL_UE_HARQ_t *harq_process_ul_ue = &PHY_vars_UE_g[module_id][cc_id]->ul_harq_processes[current_harq_pid];
NR_UE_ULSCH_t *ulsch = &((nr_phy_data_tx_t *)scheduled_response->phy_data)->ulsch;
nfapi_nr_ue_pusch_pdu_t *pusch_pdu = &ulsch->pusch_pdu;
case (FAPI_NR_UL_CONFIG_TYPE_PUSCH):
// pusch config pdu
pusch_config_pdu = &ul_config->ul_config_list[i].pusch_config_pdu;
current_harq_pid = pusch_config_pdu->pusch_data.harq_process_id;
NR_UL_UE_HARQ_t *harq_process_ul_ue = &PHY_vars_UE_g[module_id][cc_id]->ul_harq_processes[current_harq_pid];
LOG_D(PHY,
"In %s i %d: copy pusch_config_pdu nrOfLayers:%d, num_dmrs_cdm_grps_no_data:%d \n",
__FUNCTION__,
i,
pusch_config_pdu->nrOfLayers,
pusch_config_pdu->num_dmrs_cdm_grps_no_data);
nfapi_nr_ue_pusch_pdu_t *pusch_pdu = &ulsch->pusch_pdu;
memcpy(pusch_pdu, pusch_config_pdu, sizeof(nfapi_nr_ue_pusch_pdu_t));
if (scheduled_response->tx_request) {
for (int j = 0; j < scheduled_response->tx_request->number_of_pdus; j++) {
fapi_nr_tx_request_body_t *tx_req_body = &scheduled_response->tx_request->tx_request_body[j];
if ((tx_req_body->pdu_index == i) && (tx_req_body->pdu_length > 0)) {
LOG_D(PHY,
"%d.%d Copying %d bytes to harq_process_ul_ue->a (harq_pid %d)\n",
scheduled_response->frame,
slot,
tx_req_body->pdu_length,
current_harq_pid);
memcpy(harq_process_ul_ue->a, tx_req_body->pdu, tx_req_body->pdu_length);
break;
}
}
LOG_D(PHY, "In %s i %d: copy pusch_config_pdu nrOfLayers:%d, num_dmrs_cdm_grps_no_data:%d \n", __FUNCTION__, i, pusch_config_pdu->nrOfLayers,pusch_config_pdu->num_dmrs_cdm_grps_no_data);
harq_process_ul_ue->status = ACTIVE;
ul_config->ul_config_list[i].pdu_type = FAPI_NR_UL_CONFIG_TYPE_DONE; // not handle it any more
pdu_done++;
LOG_D(PHY,
"%d.%d ul A ul_config %p t %d pdu_done %d number_pdus %d\n",
scheduled_response->frame,
slot,
ul_config,
pdu_type,
pdu_done,
ul_config->number_pdus);
memcpy(pusch_pdu, pusch_config_pdu, sizeof(nfapi_nr_ue_pusch_pdu_t));
if (scheduled_response->tx_request) {
for (int j=0; j<scheduled_response->tx_request->number_of_pdus; j++) {
fapi_nr_tx_request_body_t *tx_req_body = &scheduled_response->tx_request->tx_request_body[j];
if ((tx_req_body->pdu_index == i) && (tx_req_body->pdu_length > 0)) {
LOG_D(PHY,"%d.%d Copying %d bytes to harq_process_ul_ue->a (harq_pid %d)\n",scheduled_response->frame,slot,tx_req_body->pdu_length,current_harq_pid);
memcpy(harq_process_ul_ue->a, tx_req_body->pdu, tx_req_body->pdu_length);
} else {
LOG_E(PHY, "[phy_procedures_nrUE_TX] harq_process_ul_ue is NULL !!\n");
return -1;
}
} break;
case FAPI_NR_UL_CONFIG_TYPE_PUCCH: {
NR_UE_PUCCH *pucch_vars = &((nr_phy_data_tx_t *)scheduled_response->phy_data)->pucch_vars;
found = false;
pucch_config_pdu = &ul_config->ul_config_list[i].pucch_config_pdu;
for (int j = 0; j < 2; j++) {
if (pucch_vars->active[j] == false) {
LOG_D(PHY, "%d.%d Copying pucch pdu to UE PHY\n", scheduled_response->frame, slot);
memcpy((void *)&(pucch_vars->pucch_pdu[j]), (void *)pucch_config_pdu, sizeof(fapi_nr_ul_config_pucch_pdu));
pucch_vars->active[j] = true;
found = true;
ul_config->ul_config_list[i].pdu_type = FAPI_NR_UL_CONFIG_TYPE_DONE; // not handle it any more
pdu_done++;
LOG_D(PHY,
"%d.%d ul A ul_config %p t %d pdu_done %d number_pdus %d\n",
scheduled_response->frame,
slot,
ul_config,
pdu_type,
pdu_done,
ul_config->number_pdus);
break;
}
}
if (!found)
LOG_E(PHY, "Couldn't find allocation for PUCCH PDU in PUCCH VARS\n");
} break;
harq_process_ul_ue->status = ACTIVE;
case FAPI_NR_UL_CONFIG_TYPE_PRACH:
// prach config pdu
prach_config_pdu = &ul_config->ul_config_list[i].prach_config_pdu;
memcpy((void *)&(PHY_vars_UE_g[module_id][cc_id]->prach_vars[gNB_id]->prach_pdu),
(void *)prach_config_pdu,
sizeof(fapi_nr_ul_config_prach_pdu));
PHY_vars_UE_g[module_id][cc_id]->prach_vars[gNB_id]->active = true;
ul_config->ul_config_list[i].pdu_type = FAPI_NR_UL_CONFIG_TYPE_DONE; // not handle it any more
pdu_done++;
LOG_D(PHY, "%d.%d ul A ul_config %p t %d pdu_done %d number_pdus %d\n", scheduled_response->frame, slot, ul_config, pdu_type, pdu_done, ul_config->number_pdus);
LOG_D(PHY,
"%d.%d ul A ul_config %p t %d pdu_done %d number_pdus %d\n",
scheduled_response->frame,
slot,
ul_config,
pdu_type,
pdu_done,
ul_config->number_pdus);
break;
} else {
case FAPI_NR_UL_CONFIG_TYPE_DONE:
pdu_done++; // count the no of pdu processed
LOG_D(PHY,
"%d.%d ul A ul_config %p t %d pdu_done %d number_pdus %d\n",
scheduled_response->frame,
slot,
ul_config,
pdu_type,
pdu_done,
ul_config->number_pdus);
break;
LOG_E(PHY, "[phy_procedures_nrUE_TX] harq_process_ul_ue is NULL !!\n");
return -1;
case FAPI_NR_UL_CONFIG_TYPE_SRS:
// srs config pdu
srs_config_pdu = &ul_config->ul_config_list[i].srs_config_pdu;
memcpy((void *)&(PHY_vars_UE_g[module_id][cc_id]->srs_vars[gNB_id]->srs_config_pdu),
(void *)srs_config_pdu,
sizeof(fapi_nr_ul_config_srs_pdu));
PHY_vars_UE_g[module_id][cc_id]->srs_vars[gNB_id]->active = true;
ul_config->ul_config_list[i].pdu_type = FAPI_NR_UL_CONFIG_TYPE_DONE; // not handle it any more
pdu_done++;
break;
}
break;
case (FAPI_NR_UL_CONFIG_TYPE_PUCCH):
found = false;
pucch_config_pdu = &ul_config->ul_config_list[i].pucch_config_pdu;
for(int j=0; j<2; j++) {
if(pucch_vars->active[j] == false) {
LOG_D(PHY,"%d.%d Copying pucch pdu to UE PHY\n",scheduled_response->frame,slot);
memcpy((void*)&(pucch_vars->pucch_pdu[j]), (void*)pucch_config_pdu, sizeof(fapi_nr_ul_config_pucch_pdu));
pucch_vars->active[j] = true;
found = true;
ul_config->ul_config_list[i].pdu_type = FAPI_NR_UL_CONFIG_TYPE_DONE; // not handle it any more
pdu_done++;
LOG_D(PHY, "%d.%d ul A ul_config %p t %d pdu_done %d number_pdus %d\n", scheduled_response->frame, slot, ul_config, pdu_type, pdu_done, ul_config->number_pdus);
break;
}
}
if (!found)
LOG_E(PHY, "Couldn't find allocation for PUCCH PDU in PUCCH VARS\n");
break;
case (FAPI_NR_UL_CONFIG_TYPE_PRACH):
// prach config pdu
prach_config_pdu = &ul_config->ul_config_list[i].prach_config_pdu;
memcpy((void*)&(PHY_vars_UE_g[module_id][cc_id]->prach_vars[gNB_id]->prach_pdu), (void*)prach_config_pdu, sizeof(fapi_nr_ul_config_prach_pdu));
PHY_vars_UE_g[module_id][cc_id]->prach_vars[gNB_id]->active = true;
ul_config->ul_config_list[i].pdu_type = FAPI_NR_UL_CONFIG_TYPE_DONE; // not handle it any more
pdu_done++;
LOG_D(PHY, "%d.%d ul A ul_config %p t %d pdu_done %d number_pdus %d\n", scheduled_response->frame, slot, ul_config, pdu_type, pdu_done, ul_config->number_pdus);
break;
case (FAPI_NR_UL_CONFIG_TYPE_DONE):
pdu_done++; // count the no of pdu processed
LOG_D(PHY, "%d.%d ul A ul_config %p t %d pdu_done %d number_pdus %d\n", scheduled_response->frame, slot, ul_config, pdu_type, pdu_done, ul_config->number_pdus);
break;
case (FAPI_NR_UL_CONFIG_TYPE_SRS):
// srs config pdu
srs_config_pdu = &ul_config->ul_config_list[i].srs_config_pdu;
memcpy((void*)&(PHY_vars_UE_g[module_id][cc_id]->srs_vars[gNB_id]->srs_config_pdu), (void*)srs_config_pdu, sizeof(fapi_nr_ul_config_srs_pdu));
PHY_vars_UE_g[module_id][cc_id]->srs_vars[gNB_id]->active = true;
ul_config->ul_config_list[i].pdu_type = FAPI_NR_UL_CONFIG_TYPE_DONE; // not handle it any more
pdu_done++;
break;
default:
ul_config->ul_config_list[i].pdu_type = FAPI_NR_UL_CONFIG_TYPE_DONE; // not handle it any more
pdu_done++; // count the no of pdu processed
LOG_D(PHY, "%d.%d ul A ul_config %p t %d pdu_done %d number_pdus %d\n", scheduled_response->frame, slot, ul_config, pdu_type, pdu_done, ul_config->number_pdus);
break;
default:
ul_config->ul_config_list[i].pdu_type = FAPI_NR_UL_CONFIG_TYPE_DONE; // not handle it any more
pdu_done++; // count the no of pdu processed
LOG_D(PHY,
"%d.%d ul A ul_config %p t %d pdu_done %d number_pdus %d\n",
scheduled_response->frame,
slot,
ul_config,
pdu_type,
pdu_done,
ul_config->number_pdus);
break;
}
}
+28 -172
View File
@@ -50,7 +50,6 @@
#endif
#include "executables/softmodem-common.h"
#include "executables/nr-uesoftmodem.h"
#include "LAYER2/NR_MAC_UE/mac_proto.h"
#include "SCHED_NR_UE/pucch_uci_ue_nr.h"
#include <openair1/PHY/TOOLS/phy_scope_interface.h>
@@ -87,8 +86,8 @@ void nr_fill_dl_indication(nr_downlink_indication_t *dl_ind,
fapi_nr_rx_indication_t *rx_ind,
UE_nr_rxtx_proc_t *proc,
PHY_VARS_NR_UE *ue,
void *phy_data){
void *phy_data)
{
memset((void*)dl_ind, 0, sizeof(nr_downlink_indication_t));
dl_ind->gNB_index = proc->gNB_id;
@@ -223,49 +222,37 @@ int get_tx_amp_prach(int power_dBm, int power_max_dBm, int N_RB_UL){
return (amp_x_100);
}
// convert time factor "16 * 64 * T_c / (2^mu)" in N_TA calculation in TS38.213 section 4.2 to samples by multiplying with samples per second
// 16 * 64 * T_c / (2^mu) * samples_per_second
// = 16 * T_s / (2^mu) * samples_per_second
// = 16 * 1 / (15 kHz * 2048) / (2^mu) * (15 kHz * 2^mu * ofdm_symbol_size)
// = 16 * 1 / 2048 * ofdm_symbol_size
// = 16 * ofdm_symbol_size / 2048
static inline
uint16_t get_bw_scaling(uint16_t ofdm_symbol_size){
return 16 * ofdm_symbol_size / 2048;
}
// UL time alignment procedures:
// - If the current tx frame and slot match the TA configuration in ul_time_alignment
// - If the current tx frame and slot match the TA configuration
// then timing advance is processed and set to be applied in the next UL transmission
// - Application of timing adjustment according to TS 38.213 p4.2
// todo:
// - handle RAR TA application as per ch 4.2 TS 38.213
void ue_ta_procedures(PHY_VARS_NR_UE *ue, int slot_tx, int frame_tx){
void ue_ta_procedures(PHY_VARS_NR_UE *ue, int slot_tx, int frame_tx)
{
if (frame_tx == ue->ta_frame && slot_tx == ue->ta_slot) {
if (ue->mac_enabled == 1) {
uint16_t ofdm_symbol_size = ue->frame_parms.ofdm_symbol_size;
uint8_t gNB_id = 0;
NR_UL_TIME_ALIGNMENT_t *ul_time_alignment = &ue->ul_time_alignment[gNB_id];
// convert time factor "16 * 64 * T_c / (2^mu)" in N_TA calculation in TS38.213 section 4.2 to samples by multiplying with samples per second
// 16 * 64 * T_c / (2^mu) * samples_per_second
// = 16 * T_s / (2^mu) * samples_per_second
// = 16 * 1 / (15 kHz * 2048) / (2^mu) * (15 kHz * 2^mu * ofdm_symbol_size)
// = 16 * 1 / 2048 * ofdm_symbol_size
// = 16 * ofdm_symbol_size / 2048
uint16_t bw_scaling = 16 * ofdm_symbol_size / 2048;
if (frame_tx == ul_time_alignment->ta_frame && slot_tx == ul_time_alignment->ta_slot) {
ue->timing_advance += (ue->ta_command - 31) * bw_scaling;
uint16_t ofdm_symbol_size = ue->frame_parms.ofdm_symbol_size;
uint16_t bw_scaling = get_bw_scaling(ofdm_symbol_size);
LOG_D(PHY, "[UE %d] [%d.%d] Got timing advance command %u from MAC, new value is %d\n",
ue->Mod_id,
frame_tx,
slot_tx,
ue->ta_command,
ue->timing_advance);
ue->timing_advance += (ul_time_alignment->ta_command - 31) * bw_scaling;
LOG_D(PHY, "In %s: [UE %d] [%d.%d] Got timing advance command %u from MAC, new value is %d\n",
__FUNCTION__,
ue->Mod_id,
frame_tx,
slot_tx,
ul_time_alignment->ta_command,
ue->timing_advance);
ul_time_alignment->ta_frame = -1;
ul_time_alignment->ta_slot = -1;
}
ue->ta_frame = -1;
ue->ta_slot = -1;
}
}
@@ -516,7 +503,7 @@ int nr_ue_pdcch_procedures(PHY_VARS_NR_UE *ue,
// fill dl_indication message
nr_fill_dl_indication(&dl_indication, &dci_ind, NULL, proc, ue, phy_data);
// send to mac
ue->if_inst->dl_indication(&dl_indication, NULL);
ue->if_inst->dl_indication(&dl_indication);
stop_meas(&ue->dlsch_rx_pdcch_stats);
@@ -544,7 +531,7 @@ int nr_ue_pdsch_procedures(PHY_VARS_NR_UE *ue,
if (!(NR_MAX_NB_LAYERS>4)) {
NR_UE_DLSCH_t *dlsch0 = &dlsch[0];
int harq_pid = dlsch0->dlsch_config.harq_process_nbr;
NR_DL_UE_HARQ_t *dlsch0_harq = ue->dl_harq_processes[harq_pid];
NR_DL_UE_HARQ_t *dlsch0_harq = &ue->dl_harq_processes[0][harq_pid];
uint16_t BWPStart = dlsch0->dlsch_config.BWPStart;
uint16_t pdsch_start_rb = dlsch0->dlsch_config.start_rb;
uint16_t pdsch_nb_rb = dlsch0->dlsch_config.number_rbs;
@@ -705,13 +692,10 @@ bool nr_ue_dlsch_procedures(PHY_VARS_NR_UE *ue,
nr_downlink_indication_t dl_indication;
fapi_nr_rx_indication_t rx_ind = {0};
uint16_t number_pdus = 1;
// params for UL time alignment procedure
NR_UL_TIME_ALIGNMENT_t *ul_time_alignment = &ue->ul_time_alignment[gNB_id];
uint8_t is_cw0_active = dl_harq0->status;
uint8_t is_cw1_active = dl_harq1->status;
uint16_t nb_symb_sch = dlsch[0].dlsch_config.number_symbols;
uint16_t start_symbol = dlsch[0].dlsch_config.start_symbol;
uint8_t dmrs_type = dlsch[0].dlsch_config.dmrsConfigType;
uint8_t nb_re_dmrs;
@@ -805,7 +789,7 @@ bool nr_ue_dlsch_procedures(PHY_VARS_NR_UE *ue,
nr_fill_dl_indication(&dl_indication, NULL, &rx_ind, proc, ue, NULL);
nr_fill_rx_indication(&rx_ind, ind_type, ue, &dlsch[0], NULL, number_pdus, proc, NULL, p_b);
LOG_D(PHY, "In %s DL PDU length in bits: %d, in bytes: %d \n", __FUNCTION__, dlsch[0].dlsch_config.TBS, dlsch[0].dlsch_config.TBS / 8);
LOG_D(PHY, "DL PDU length in bits: %d, in bytes: %d \n", dlsch[0].dlsch_config.TBS, dlsch[0].dlsch_config.TBS / 8);
stop_meas(&ue->dlsch_decoding_stats);
if (cpumeas(CPUMEAS_GETSTATE)) {
@@ -857,9 +841,10 @@ bool nr_ue_dlsch_procedures(PHY_VARS_NR_UE *ue,
}
LOG_D(PHY, "harq_pid: %d, TBS expected dlsch1: %d \n", harq_pid, dlsch[1].dlsch_config.TBS);
}
// send to mac
if (ue->if_inst && ue->if_inst->dl_indication) {
ue->if_inst->dl_indication(&dl_indication, ul_time_alignment);
ue->if_inst->dl_indication(&dl_indication);
}
// DLSCH decoding finished! don't wait anymore
@@ -869,135 +854,6 @@ bool nr_ue_dlsch_procedures(PHY_VARS_NR_UE *ue,
if (ue->phy_sim_dlsch_b)
memcpy(ue->phy_sim_dlsch_b, p_b, dlsch_bytes);
if (ue->mac_enabled == 1) { // TODO: move this from PHY to MAC layer!
/* Time Alignment procedure
// - UE processing capability 1
// - Setting the TA update to be applied after the reception of the TA command
// - Timing adjustment computed according to TS 38.213 section 4.2
// - Durations of N1 and N2 symbols corresponding to PDSCH and PUSCH are
// computed according to sections 5.3 and 6.4 of TS 38.214 */
const int numerology = ue->frame_parms.numerology_index;
const int ofdm_symbol_size = ue->frame_parms.ofdm_symbol_size;
const int nb_prefix_samples = ue->frame_parms.nb_prefix_samples;
const int samples_per_subframe = ue->frame_parms.samples_per_subframe;
const int slots_per_frame = ue->frame_parms.slots_per_frame;
const int slots_per_subframe = ue->frame_parms.slots_per_subframe;
const double tc_factor = 1.0 / samples_per_subframe;
const uint16_t bw_scaling = get_bw_scaling(ofdm_symbol_size);
const int Ta_max = 3846; // Max value of 12 bits TA Command
const double N_TA_max = Ta_max * bw_scaling * tc_factor;
NR_UE_MAC_INST_t *mac = get_mac_inst(0);
NR_BWP_Id_t ul_bwp = mac->current_UL_BWP.bwp_id;
NR_PUSCH_TimeDomainResourceAllocationList_t *pusch_TimeDomainAllocationList = NULL;
if(ul_bwp){
if (mac->ULbwp[ul_bwp-1] &&
mac->ULbwp[ul_bwp-1]->bwp_Dedicated &&
mac->ULbwp[ul_bwp-1]->bwp_Dedicated->pusch_Config &&
mac->ULbwp[ul_bwp-1]->bwp_Dedicated->pusch_Config->choice.setup &&
mac->ULbwp[ul_bwp-1]->bwp_Dedicated->pusch_Config->choice.setup->pusch_TimeDomainAllocationList) {
pusch_TimeDomainAllocationList = mac->ULbwp[ul_bwp-1]->bwp_Dedicated->pusch_Config->choice.setup->pusch_TimeDomainAllocationList->choice.setup;
}
else if (mac->ULbwp[ul_bwp-1] &&
mac->ULbwp[ul_bwp-1]->bwp_Common &&
mac->ULbwp[ul_bwp-1]->bwp_Common->pusch_ConfigCommon &&
mac->ULbwp[ul_bwp-1]->bwp_Common->pusch_ConfigCommon->choice.setup &&
mac->ULbwp[ul_bwp-1]->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList) {
pusch_TimeDomainAllocationList = mac->ULbwp[ul_bwp-1]->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList;
}
}
else if (mac->scc_SIB &&
mac->scc_SIB->uplinkConfigCommon &&
mac->scc_SIB->uplinkConfigCommon->initialUplinkBWP.pusch_ConfigCommon &&
mac->scc_SIB->uplinkConfigCommon->initialUplinkBWP.pusch_ConfigCommon->choice.setup &&
mac->scc_SIB->uplinkConfigCommon->initialUplinkBWP.pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList) {
pusch_TimeDomainAllocationList = mac->scc_SIB->uplinkConfigCommon->initialUplinkBWP.pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList;
}
long mapping_type_ul = pusch_TimeDomainAllocationList ? pusch_TimeDomainAllocationList->list.array[0]->mappingType : NR_PUSCH_TimeDomainResourceAllocation__mappingType_typeA;
NR_PDSCH_Config_t *pdsch_Config = mac->current_DL_BWP.pdsch_Config;
NR_PDSCH_TimeDomainResourceAllocationList_t *pdsch_TimeDomainAllocationList = mac->current_DL_BWP.tdaList_Common;
long mapping_type_dl = pdsch_TimeDomainAllocationList ? pdsch_TimeDomainAllocationList->list.array[0]->mappingType : NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeA;
NR_DMRS_DownlinkConfig_t *NR_DMRS_dlconfig = NULL;
if (pdsch_Config) {
if (mapping_type_dl == NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeA)
NR_DMRS_dlconfig = (NR_DMRS_DownlinkConfig_t *)pdsch_Config->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup;
else
NR_DMRS_dlconfig = (NR_DMRS_DownlinkConfig_t *)pdsch_Config->dmrs_DownlinkForPDSCH_MappingTypeB->choice.setup;
}
pdsch_dmrs_AdditionalPosition_t add_pos_dl = pdsch_dmrs_pos2;
if (NR_DMRS_dlconfig && NR_DMRS_dlconfig->dmrs_AdditionalPosition)
add_pos_dl = *NR_DMRS_dlconfig->dmrs_AdditionalPosition;
/* PDSCH decoding time N_1 for processing capability 1 */
int N_1;
if (add_pos_dl == pdsch_dmrs_pos0)
N_1 = pdsch_N_1_capability_1[numerology][1];
else if (add_pos_dl == pdsch_dmrs_pos1 || add_pos_dl == pdsch_dmrs_pos2)
N_1 = pdsch_N_1_capability_1[numerology][2];
else
N_1 = pdsch_N_1_capability_1[numerology][3];
/* PUSCH preapration time N_2 for processing capability 1 */
const int N_2 = pusch_N_2_timing_capability_1[numerology][1];
/* d_1_1 depending on the number of PDSCH symbols allocated */
const int d = 0; // TODO number of overlapping symbols of the scheduling PDCCH and the scheduled PDSCH
int d_1_1 = 0;
if (mapping_type_dl == NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeA)
if (nb_symb_sch + start_symbol < 7)
d_1_1 = 7 - (nb_symb_sch + start_symbol);
else
d_1_1 = 0;
else // mapping type B
switch (nb_symb_sch){
case 7: d_1_1 = 0; break;
case 4: d_1_1 = 3; break;
case 2: d_1_1 = 3 + d; break;
default: break;
}
/* d_2_1 */
int d_2_1;
if (mapping_type_ul == NR_PUSCH_TimeDomainResourceAllocation__mappingType_typeB && start_symbol != 0)
d_2_1 = 0;
else
d_2_1 = 1;
/* d_2_2 */
const double d_2_2 = pusch_d_2_2_timing_capability_1[numerology][1];
/* N_t_1 time duration in msec of N_1 symbols corresponding to a PDSCH reception time
// N_t_2 time duration in msec of N_2 symbols corresponding to a PUSCH preparation time */
double N_t_1 = (N_1 + d_1_1) * (ofdm_symbol_size + nb_prefix_samples) * tc_factor;
double N_t_2 = (N_2 + d_2_1) * (ofdm_symbol_size + nb_prefix_samples) * tc_factor;
if (N_t_2 < d_2_2) N_t_2 = d_2_2;
/* Time alignment procedure */
// N_t_1 + N_t_2 + N_TA_max must be in msec
const double t_subframe = 1.0; // subframe duration of 1 msec
const int ul_tx_timing_adjustment = 1 + (int)ceil(slots_per_subframe*(N_t_1 + N_t_2 + N_TA_max + 0.5)/t_subframe);
if (ul_time_alignment->apply_ta == 1){
ul_time_alignment->ta_slot = (nr_slot_rx + ul_tx_timing_adjustment) % slots_per_frame;
if (nr_slot_rx + ul_tx_timing_adjustment > slots_per_frame){
ul_time_alignment->ta_frame = (frame_rx + 1) % 1024;
} else {
ul_time_alignment->ta_frame = frame_rx;
}
// reset TA flag
ul_time_alignment->apply_ta = 0;
LOG_D(PHY,"Frame %d slot %d -- Starting UL time alignment procedures. TA update will be applied at frame %d slot %d\n",
frame_rx, nr_slot_rx, ul_time_alignment->ta_frame, ul_time_alignment->ta_slot);
}
}
return dec;
}
@@ -50,7 +50,7 @@
// when PDSCH DM-RS position l1 for the additional DM-RS is != 1,2
*/
int8_t pdsch_N_1_capability_1[4][4] = {
static const int8_t pdsch_N_1_capability_1[4][4] = {
/* mu A B C */
{ 0, 8, 14, 13 },
{ 1, 10, 13, 13 },
@@ -69,7 +69,7 @@ int8_t pdsch_N_1_capability_1[4][4] = {
// dmrs-DownlinkForPDSCH-MappingTypeA and dmrs-DownlinkForPDSCH-MappingTypeB
// mu == 2 is for FR1 only
*/
float pdsch_N_1_capability_2[3][2] = {
static const float pdsch_N_1_capability_2[3][2] = {
/* mu A */
{ 0, 3 },
{ 1, 4.5 },
@@ -84,7 +84,7 @@ float pdsch_N_1_capability_2[3][2] = {
// carrying the DCI scheduling the PUSCH was transmitted
// mu_UL is the SCS of the UL channel with which PUSCH to be transmitted
*/
int8_t pusch_N_2_timing_capability_1[4][2] = {
static const int8_t pusch_N_2_timing_capability_1[4][2] = {
/* mu N_2 */
{ 0, 10 },
{ 1, 12 },
@@ -101,7 +101,7 @@ int8_t pusch_N_2_timing_capability_1[4][2] = {
// mu_UL is the SCS of the UL channel with which PUSCH to be transmitted
// mu == 2 is for FR1 only
*/
float pusch_N_2_timing_capability_2[3][2] = {
static const float pusch_N_2_timing_capability_2[3][2] = {
/* mu N_2 */
{ 0, 5 },
{ 1, 5.5 },
@@ -116,7 +116,7 @@ float pusch_N_2_timing_capability_2[3][2] = {
// carrying the DCI scheduling the PUSCH was transmitted
// mu_UL is the SCS of the UL channel with which PUSCH to be transmitted
*/
float pusch_d_2_2_timing_capability_1[4][2] = {
static const float pusch_d_2_2_timing_capability_1[4][2] = {
/* mu d_2_2 */
{ 0, 1 },
{ 1, 2 },
@@ -132,7 +132,7 @@ float pusch_d_2_2_timing_capability_1[4][2] = {
// carrying the DCI scheduling the PUSCH was transmitted
// mu_UL is the SCS of the UL channel with which PUSCH to be transmitted
*/
float pusch_d_2_2_timing_capability_2[4][2] = {
static const float pusch_d_2_2_timing_capability_2[4][2] = {
/* mu d_2_2 */
{ 0, 3 },
{ 1, 5 },
+1 -3
View File
@@ -2080,9 +2080,7 @@ int main(int argc, char **argv) {
squareRoot(&UE->dlsch_demodulation_stats),
median(table_rx_demod), q1(table_rx_demod), q3(table_rx_demod));
//fprintf(time_meas_fd,"DEC;\n");
fprintf(time_meas_fd,"%f;%f;%f;%f\n",
squareRoot(&UE->dlsch_decoding_stats[subframe]),
median(table_rx_dec), q1(table_rx_dec), q3(table_rx_dec));
fprintf(time_meas_fd, "%f;%f;%f;%f\n", squareRoot(&UE->dlsch_decoding_stats[UE->current_thread_id[subframe]]), median(table_rx_dec), q1(table_rx_dec), q3(table_rx_dec));
printf("[passed] effective rate : %f (%2.1f%%,%f)): log and break \n",rate*effective_rate, 100*effective_rate, rate );
test_passed = 1;
break;
+2 -3
View File
@@ -53,8 +53,7 @@
#include "executables/lte-softmodem.h"
#include "common/ran_context.h"
#include "PHY/LTE_ESTIMATION/lte_estimation.h"
#include "openair1/PHY/LTE_TRANSPORT/dlsch_tbs.h"
#include "openair1/PHY/LTE_TRANSPORT/dlsch_tbs_full.h"
const char *__asan_default_options()
{
/* don't do leak checking in ulsim, not finished yet */
@@ -806,7 +805,7 @@ int main(int argc, char **argv) {
if (cqi_flag == 1) coded_bits_per_codeword-=UE->ulsch[0]->O;
rate = (double)dlsch_tbs25[get_I_TBS(mcs)][nb_rb-1]/(coded_bits_per_codeword);
rate = (double)TBStable[get_I_TBS(mcs)][nb_rb - 1] / (coded_bits_per_codeword);
printf("Rate = %f (mod %d), coded bits %u\n",rate,get_Qm_ul(mcs),coded_bits_per_codeword);
for (ch_realization=0; ch_realization<n_ch_rlz; ch_realization++) {
+6 -10
View File
@@ -707,7 +707,7 @@ int main(int argc, char **argv)
NR_UE_NR_Capability_t* UE_Capability_nr = CALLOC(1,sizeof(NR_UE_NR_Capability_t));
prepare_sim_uecap(UE_Capability_nr,scc,mu,
N_RB_DL,g_mcsTableIdx);
N_RB_DL,g_mcsTableIdx,0);
// TODO do a UECAP for phy-sim
const gNB_RrcConfigurationReq conf = {
@@ -831,6 +831,7 @@ int main(int argc, char **argv)
PHY_vars_UE_g[0][0] = UE;
memcpy(&UE->frame_parms,frame_parms,sizeof(NR_DL_FRAME_PARMS));
UE->frame_parms.nb_antennas_rx = n_rx;
UE->frame_parms.nb_antenna_ports_gNB = n_tx;
UE->max_ldpc_iterations = max_ldpc_iterations;
if (run_initial_sync==1)
@@ -1372,16 +1373,11 @@ int main(int argc, char **argv)
void update_ptrs_config(NR_CellGroupConfig_t *secondaryCellGroup, uint16_t *rbSize, uint8_t *mcsIndex, int8_t *ptrs_arg)
{
NR_BWP_Downlink_t *bwp=secondaryCellGroup->spCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList->list.array[0];
int *ptrsFreqDenst = calloc(2, sizeof(long));
ptrsFreqDenst[0]= 25;
ptrsFreqDenst[1]= 115;
int *ptrsTimeDenst = calloc(3, sizeof(long));
ptrsTimeDenst[0]= 2;
ptrsTimeDenst[1]= 4;
ptrsTimeDenst[2]= 10;
long ptrsFreqDenst[] = {25, 115};
long ptrsTimeDenst[] = {2, 4, 10};
int epre_Ratio = 0;
int reOffset = 0;
long epre_Ratio = 0;
long reOffset = 0;
if(ptrs_arg[0] ==0) {
ptrsTimeDenst[2]= *mcsIndex -1;
+2 -1
View File
@@ -172,7 +172,8 @@ void nr_phy_config_request_sim_pbchsim(PHY_VARS_gNB *gNB,
else fp->nr_band = 78;
fp->threequarter_fs= 0;
gNB_config->carrier_config.dl_bandwidth.value = config_bandwidth(mu, N_RB_DL, fp->nr_band);
int bw_index = get_supported_band_index(mu, fp->nr_band, N_RB_DL);
gNB_config->carrier_config.dl_bandwidth.value = get_supported_bw_mhz(fp->nr_band > 256 ? FR2 : FR1, bw_index);
fp->ofdm_offset_divisor = UINT_MAX;
nr_init_frame_parms(gNB_config, fp);
+1 -1
View File
@@ -401,7 +401,7 @@ int main(int argc, char **argv)
srand(time(NULL)); // Initialization, should only be called once.
actual_payload = rand(); // Returns a pseudo-random integer between 0 and RAND_MAX.
}
actual_payload &= ((1<<nr_bit)-1);
actual_payload &= nr_bit < 64 ? (1UL << nr_bit) - 1: 0xffffffffffffffff;
printf("Transmitted payload is %ld, do_DTX = %d\n",actual_payload,do_DTX);
+9 -3
View File
@@ -169,6 +169,7 @@ int main(int argc, char **argv)
uint8_t Imcs = 9;
uint8_t Nl = 1;
uint8_t max_ldpc_iterations = 5;
uint8_t mcs_table = 0;
double DS_TDL = .03;
@@ -182,7 +183,7 @@ int main(int argc, char **argv)
randominit(0);
//while ((c = getopt(argc, argv, "df:hpg:i:j:n:l:m:r:s:S:y:z:M:N:F:R:P:")) != -1) {
while ((c = getopt(argc, argv, "hg:n:s:S:py:z:M:N:R:F:m:l:r:W:")) != -1) {
while ((c = getopt(argc, argv, "hg:n:s:S:py:z:M:N:R:F:m:l:q:r:W:")) != -1) {
switch (c) {
/*case 'f':
write_output_file = 1;
@@ -346,6 +347,10 @@ int main(int argc, char **argv)
nb_symb_sch = atoi(optarg);
break;
case 'q':
mcs_table = atoi(optarg);
break;
case 'r':
nb_rb = atoi(optarg);
break;
@@ -476,8 +481,8 @@ int main(int argc, char **argv)
if ((Nl==4)||(Nl==3))
nb_re_dmrs = nb_re_dmrs*2;
mod_order = nr_get_Qm_ul(Imcs, 0);
code_rate = nr_get_code_rate_ul(Imcs, 0);
mod_order = nr_get_Qm_ul(Imcs, mcs_table);
code_rate = nr_get_code_rate_ul(Imcs, mcs_table);
available_bits = nr_get_G(nb_rb, nb_symb_sch, nb_re_dmrs, length_dmrs, mod_order, Nl);
TBS = nr_compute_tbs(mod_order,code_rate, nb_rb, nb_symb_sch, nb_re_dmrs*length_dmrs, 0, 0, Nl);
@@ -513,6 +518,7 @@ int main(int argc, char **argv)
N_RE_prime = NR_NB_SC_PER_RB*nb_symb_sch - nb_re_dmrs - N_PRB_oh;
ulsch_ue->pusch_pdu.rnti = n_rnti;
ulsch_ue->pusch_pdu.mcs_table = mcs_table;
ulsch_ue->pusch_pdu.mcs_index = Imcs;
ulsch_ue->pusch_pdu.nrOfLayers = Nl;
ulsch_ue->pusch_pdu.rb_size = nb_rb;
+7 -2
View File
@@ -631,6 +631,10 @@ int main(int argc, char **argv)
NR_ServingCellConfig_t *scd = calloc(1,sizeof(NR_ServingCellConfig_t));
prepare_scd(scd);
NR_UE_NR_Capability_t* UE_Capability_nr = CALLOC(1,sizeof(NR_UE_NR_Capability_t));
prepare_sim_uecap(UE_Capability_nr,scc,mu,
N_RB_UL,0,mcs_table);
// TODO do a UECAP for phy-sim
const gNB_RrcConfigurationReq conf = {
.pdsch_AntennaPorts = { .N1 = 1, .N2 = 1, .XP = 1 },
@@ -640,7 +644,8 @@ int main(int argc, char **argv)
.do_SRS = 0,
.force_256qam_off = false
};
NR_CellGroupConfig_t *secondaryCellGroup = get_default_secondaryCellGroup(scc, scd, NULL, 0, 1, &conf, 0);
NR_CellGroupConfig_t *secondaryCellGroup = get_default_secondaryCellGroup(scc, scd, UE_Capability_nr, 0, 1, &conf, 0);
/* RRC parameter validation for secondaryCellGroup */
fix_scd(scd);
@@ -873,7 +878,7 @@ int main(int argc, char **argv)
if (input_fd != NULL || n_trials == 1) max_rounds=1;
if(1<<ptrs_time_density >= nb_symb_sch)
if (enable_ptrs && 1 << ptrs_time_density >= nb_symb_sch)
pdu_bit_map &= ~PUSCH_PDU_BITMAP_PUSCH_PTRS; // disable PUSCH PTRS
printf("\n");
@@ -869,7 +869,6 @@ uint32_t tst_ue_get_SR(module_id_t module_idP,int CC_id,frame_t frameP,uint8_t e
*********************************************************************/
void tst_set_sr_config(PHY_VARS_NR_UE *ue, int gNB_id) {
ue->mac_enabled = 1;
ue->scheduling_request_config[gNB_id].sr_ConfigIndex = 0;
p_nr_ue_get_SR = tst_ue_get_SR;
}
+2 -2
View File
@@ -190,7 +190,7 @@ void tableNor(unsigned long seed)
return;
}
double __attribute__ ((no_sanitize_address)) gaussZiggurat(double mean, double variance)
double __attribute__ ((no_sanitize("address", "undefined"))) gaussZiggurat(double mean, double variance)
{
if (!tableNordDone) {
// let's make reasonnable constant tables
@@ -200,7 +200,7 @@ double __attribute__ ((no_sanitize_address)) gaussZiggurat(double mean, double v
}
hz = SHR3;
iz = hz & 127;
return abs(hz) < kn[iz] ? hz * wn[iz] : nfix();
return hz != INT32_MIN && abs(hz) < kn[iz] ? hz * wn[iz] : nfix();
}
#ifdef MAIN
@@ -2764,8 +2764,8 @@ uint8_t get_L_ptrs(uint8_t mcs1, uint8_t mcs2, uint8_t mcs3, uint8_t I_mcs, uint
*
*********************************************************************/
uint8_t get_K_ptrs(uint16_t nrb0, uint16_t nrb1, uint16_t N_RB) {
uint8_t get_K_ptrs(uint32_t nrb0, uint32_t nrb1, uint32_t N_RB)
{
if (N_RB < nrb0) {
LOG_D(PHY,"PUSH PT-RS is not present.\n");
return -1;
@@ -3836,7 +3836,7 @@ uint8_t get_pusch_mcs_table(long *mcs_Table,
if (*mcs_Table == NR_PUSCH_Config__mcs_Table_qam256)
return 1;
else
return (2+(is_tp<<1));
return (2 + (is_tp << 1));
}
else {
if ((*mcs_Table == NR_PUSCH_Config__mcs_Table_qam256) &&
@@ -3847,14 +3847,12 @@ uint8_t get_pusch_mcs_table(long *mcs_Table,
if ((*mcs_Table == NR_PUSCH_Config__mcs_Table_qam64LowSE) &&
(target_ss == NR_SearchSpace__searchSpaceType_PR_ue_Specific) &&
((rnti_type == NR_RNTI_C ) || (rnti_type == NR_RNTI_SP_CSI)))
return (2+(is_tp<<1));
return (2 + (is_tp << 1));
if (rnti_type == NR_RNTI_MCS_C)
return (2+(is_tp<<1));
AssertFatal(1==0,"Invalid configuration to set MCS table");
return (2 + (is_tp << 1));
}
}
else
return (0+(is_tp*3));
return (0 + (is_tp * 3));
}
@@ -176,7 +176,7 @@ uint8_t get_l0_ul(uint8_t mapping_type, uint8_t dmrs_typeA_position);
int32_t get_l_prime(uint8_t duration_in_symbols, uint8_t mapping_type, pusch_dmrs_AdditionalPosition_t additional_pos, pusch_maxLength_t pusch_maxLength, uint8_t start_symbolt, uint8_t dmrs_typeA_position);
uint8_t get_L_ptrs(uint8_t mcs1, uint8_t mcs2, uint8_t mcs3, uint8_t I_mcs, uint8_t mcs_table);
uint8_t get_K_ptrs(uint16_t nrb0, uint16_t nrb1, uint16_t N_RB);
uint8_t get_K_ptrs(uint32_t nrb0, uint32_t nrb1, uint32_t N_RB);
uint32_t nr_compute_tbs(uint16_t Qm,
uint16_t R,
+181 -174
View File
@@ -117,7 +117,6 @@ void set_tdd_config_nr_ue(fapi_nr_config_request_t *cfg,
}
void config_common_ue_sa(NR_UE_MAC_INST_t *mac,
module_id_t module_id,
int cc_idP) {
@@ -131,18 +130,20 @@ void config_common_ue_sa(NR_UE_MAC_INST_t *mac,
LOG_D(MAC, "Entering SA UE Config Common\n");
// carrier config
cfg->carrier_config.dl_bandwidth = config_bandwidth(scc->downlinkConfigCommon.frequencyInfoDL.scs_SpecificCarrierList.list.array[0]->subcarrierSpacing,
scc->downlinkConfigCommon.frequencyInfoDL.scs_SpecificCarrierList.list.array[0]->carrierBandwidth,
*scc->downlinkConfigCommon.frequencyInfoDL.frequencyBandList.list.array[0]->freqBandIndicatorNR);
NR_FrequencyInfoDL_SIB_t *frequencyInfoDL = &scc->downlinkConfigCommon.frequencyInfoDL;
int bw_index = get_supported_band_index(frequencyInfoDL->scs_SpecificCarrierList.list.array[0]->subcarrierSpacing,
*frequencyInfoDL->frequencyBandList.list.array[0]->freqBandIndicatorNR,
frequencyInfoDL->scs_SpecificCarrierList.list.array[0]->carrierBandwidth);
cfg->carrier_config.dl_bandwidth = get_supported_bw_mhz(*frequencyInfoDL->frequencyBandList.list.array[0]->freqBandIndicatorNR > 256 ? FR2 : FR1, bw_index);
uint64_t dl_bw_khz = (12*scc->downlinkConfigCommon.frequencyInfoDL.scs_SpecificCarrierList.list.array[0]->carrierBandwidth)*
(15<<scc->downlinkConfigCommon.frequencyInfoDL.scs_SpecificCarrierList.list.array[0]->subcarrierSpacing);
uint64_t dl_bw_khz = (12 * frequencyInfoDL->scs_SpecificCarrierList.list.array[0]->carrierBandwidth) *
(15 << frequencyInfoDL->scs_SpecificCarrierList.list.array[0]->subcarrierSpacing);
cfg->carrier_config.dl_frequency = (downlink_frequency[cc_idP][0]/1000) - (dl_bw_khz>>1);
for (int i=0; i<5; i++) {
if (i==scc->downlinkConfigCommon.frequencyInfoDL.scs_SpecificCarrierList.list.array[0]->subcarrierSpacing) {
cfg->carrier_config.dl_grid_size[i] = scc->downlinkConfigCommon.frequencyInfoDL.scs_SpecificCarrierList.list.array[0]->carrierBandwidth;
cfg->carrier_config.dl_k0[i] = scc->downlinkConfigCommon.frequencyInfoDL.scs_SpecificCarrierList.list.array[0]->offsetToCarrier;
if (i == frequencyInfoDL->scs_SpecificCarrierList.list.array[0]->subcarrierSpacing) {
cfg->carrier_config.dl_grid_size[i] = frequencyInfoDL->scs_SpecificCarrierList.list.array[0]->carrierBandwidth;
cfg->carrier_config.dl_k0[i] = frequencyInfoDL->scs_SpecificCarrierList.list.array[0]->offsetToCarrier;
}
else {
cfg->carrier_config.dl_grid_size[i] = 0;
@@ -150,23 +151,25 @@ void config_common_ue_sa(NR_UE_MAC_INST_t *mac,
}
}
cfg->carrier_config.uplink_bandwidth = config_bandwidth(scc->uplinkConfigCommon->frequencyInfoUL.scs_SpecificCarrierList.list.array[0]->subcarrierSpacing,
scc->uplinkConfigCommon->frequencyInfoUL.scs_SpecificCarrierList.list.array[0]->carrierBandwidth,
scc->uplinkConfigCommon->frequencyInfoUL.frequencyBandList==NULL ?
*scc->downlinkConfigCommon.frequencyInfoDL.frequencyBandList.list.array[0]->freqBandIndicatorNR :
*scc->uplinkConfigCommon->frequencyInfoUL.frequencyBandList->list.array[0]->freqBandIndicatorNR);
NR_FrequencyInfoUL_SIB_t *frequencyInfoUL = &scc->uplinkConfigCommon->frequencyInfoUL;
int UL_band_ind = frequencyInfoUL->frequencyBandList == NULL ?
*frequencyInfoDL->frequencyBandList.list.array[0]->freqBandIndicatorNR :
*frequencyInfoUL->frequencyBandList->list.array[0]->freqBandIndicatorNR;
bw_index = get_supported_band_index(frequencyInfoUL->scs_SpecificCarrierList.list.array[0]->subcarrierSpacing,
UL_band_ind,
frequencyInfoUL->scs_SpecificCarrierList.list.array[0]->carrierBandwidth);
cfg->carrier_config.uplink_bandwidth = get_supported_bw_mhz(UL_band_ind > 256 ? FR2 : FR1, bw_index);
if (scc->uplinkConfigCommon->frequencyInfoUL.absoluteFrequencyPointA == NULL)
if (frequencyInfoUL->absoluteFrequencyPointA == NULL)
cfg->carrier_config.uplink_frequency = cfg->carrier_config.dl_frequency;
else
// TODO check if corresponds to what reported in SIB1
cfg->carrier_config.uplink_frequency = (downlink_frequency[cc_idP][0]/1000) + uplink_frequency_offset[cc_idP][0];
for (int i=0; i<5; i++) {
if (i==scc->uplinkConfigCommon->frequencyInfoUL.scs_SpecificCarrierList.list.array[0]->subcarrierSpacing) {
cfg->carrier_config.ul_grid_size[i] = scc->uplinkConfigCommon->frequencyInfoUL.scs_SpecificCarrierList.list.array[0]->carrierBandwidth;
cfg->carrier_config.ul_k0[i] = scc->uplinkConfigCommon->frequencyInfoUL.scs_SpecificCarrierList.list.array[0]->offsetToCarrier;
for (int i = 0; i < 5; i++) {
if (i == frequencyInfoUL->scs_SpecificCarrierList.list.array[0]->subcarrierSpacing) {
cfg->carrier_config.ul_grid_size[i] = frequencyInfoUL->scs_SpecificCarrierList.list.array[0]->carrierBandwidth;
cfg->carrier_config.ul_k0[i] = frequencyInfoUL->scs_SpecificCarrierList.list.array[0]->offsetToCarrier;
}
else {
cfg->carrier_config.ul_grid_size[i] = 0;
@@ -185,7 +188,7 @@ void config_common_ue_sa(NR_UE_MAC_INST_t *mac,
cfg->ssb_config.scs_common = get_softmodem_params()->numerology;
// SSB Table config
cfg->ssb_table.ssb_offset_point_a = scc->downlinkConfigCommon.frequencyInfoDL.offsetToPointA;
cfg->ssb_table.ssb_offset_point_a = frequencyInfoDL->offsetToPointA;
cfg->ssb_table.ssb_period = scc->ssb_PeriodicityServingCell;
cfg->ssb_table.ssb_subcarrier_offset = mac->ssb_subcarrier_offset;
@@ -203,26 +206,27 @@ void config_common_ue_sa(NR_UE_MAC_INST_t *mac,
// TDD Table Configuration
if (cfg->cell_config.frame_duplex_type == TDD){
set_tdd_config_nr_ue(cfg,
scc->uplinkConfigCommon->frequencyInfoUL.scs_SpecificCarrierList.list.array[0]->subcarrierSpacing,
frequencyInfoUL->scs_SpecificCarrierList.list.array[0]->subcarrierSpacing,
scc->tdd_UL_DL_ConfigurationCommon);
}
// PRACH configuration
uint8_t nb_preambles = 64;
if(scc->uplinkConfigCommon->initialUplinkBWP.rach_ConfigCommon->choice.setup->totalNumberOfRA_Preambles != NULL)
nb_preambles = *scc->uplinkConfigCommon->initialUplinkBWP.rach_ConfigCommon->choice.setup->totalNumberOfRA_Preambles;
NR_RACH_ConfigCommon_t *rach_ConfigCommon = scc->uplinkConfigCommon->initialUplinkBWP.rach_ConfigCommon->choice.setup;
if(rach_ConfigCommon->totalNumberOfRA_Preambles != NULL)
nb_preambles = *rach_ConfigCommon->totalNumberOfRA_Preambles;
cfg->prach_config.prach_sequence_length = scc->uplinkConfigCommon->initialUplinkBWP.rach_ConfigCommon->choice.setup->prach_RootSequenceIndex.present-1;
cfg->prach_config.prach_sequence_length = rach_ConfigCommon->prach_RootSequenceIndex.present-1;
if (scc->uplinkConfigCommon->initialUplinkBWP.rach_ConfigCommon->choice.setup->msg1_SubcarrierSpacing)
cfg->prach_config.prach_sub_c_spacing = *scc->uplinkConfigCommon->initialUplinkBWP.rach_ConfigCommon->choice.setup->msg1_SubcarrierSpacing;
if (rach_ConfigCommon->msg1_SubcarrierSpacing)
cfg->prach_config.prach_sub_c_spacing = *rach_ConfigCommon->msg1_SubcarrierSpacing;
else
cfg->prach_config.prach_sub_c_spacing = scc->downlinkConfigCommon.frequencyInfoDL.scs_SpecificCarrierList.list.array[0]->subcarrierSpacing;
cfg->prach_config.prach_sub_c_spacing = frequencyInfoDL->scs_SpecificCarrierList.list.array[0]->subcarrierSpacing;
cfg->prach_config.restricted_set_config = scc->uplinkConfigCommon->initialUplinkBWP.rach_ConfigCommon->choice.setup->restrictedSetConfig;
cfg->prach_config.restricted_set_config = rach_ConfigCommon->restrictedSetConfig;
switch (scc->uplinkConfigCommon->initialUplinkBWP.rach_ConfigCommon->choice.setup->rach_ConfigGeneric.msg1_FDM) {
switch (rach_ConfigCommon->rach_ConfigGeneric.msg1_FDM) {
case 0 :
cfg->prach_config.num_prach_fd_occasions = 1;
break;
@@ -236,25 +240,26 @@ void config_common_ue_sa(NR_UE_MAC_INST_t *mac,
cfg->prach_config.num_prach_fd_occasions = 8;
break;
default:
AssertFatal(1==0,"msg1 FDM identifier %ld undefined (0,1,2,3) \n", scc->uplinkConfigCommon->initialUplinkBWP.rach_ConfigCommon->choice.setup->rach_ConfigGeneric.msg1_FDM);
AssertFatal(1==0,"msg1 FDM identifier %ld undefined (0,1,2,3) \n", rach_ConfigCommon->rach_ConfigGeneric.msg1_FDM);
}
cfg->prach_config.num_prach_fd_occasions_list = (fapi_nr_num_prach_fd_occasions_t *) malloc(cfg->prach_config.num_prach_fd_occasions*sizeof(fapi_nr_num_prach_fd_occasions_t));
for (int i=0; i<cfg->prach_config.num_prach_fd_occasions; i++) {
cfg->prach_config.num_prach_fd_occasions_list[i].num_prach_fd_occasions = i;
fapi_nr_num_prach_fd_occasions_t *prach_fd_occasion = &cfg->prach_config.num_prach_fd_occasions_list[i];
prach_fd_occasion->num_prach_fd_occasions = i;
if (cfg->prach_config.prach_sequence_length)
cfg->prach_config.num_prach_fd_occasions_list[i].prach_root_sequence_index = scc->uplinkConfigCommon->initialUplinkBWP.rach_ConfigCommon->choice.setup->prach_RootSequenceIndex.choice.l139;
prach_fd_occasion->prach_root_sequence_index = rach_ConfigCommon->prach_RootSequenceIndex.choice.l139;
else
cfg->prach_config.num_prach_fd_occasions_list[i].prach_root_sequence_index = scc->uplinkConfigCommon->initialUplinkBWP.rach_ConfigCommon->choice.setup->prach_RootSequenceIndex.choice.l839;
cfg->prach_config.num_prach_fd_occasions_list[i].k1 = NRRIV2PRBOFFSET(scc->uplinkConfigCommon->initialUplinkBWP.genericParameters.locationAndBandwidth, MAX_BWP_SIZE) +
scc->uplinkConfigCommon->initialUplinkBWP.rach_ConfigCommon->choice.setup->rach_ConfigGeneric.msg1_FrequencyStart +
(get_N_RA_RB(cfg->prach_config.prach_sub_c_spacing, scc->uplinkConfigCommon->frequencyInfoUL.scs_SpecificCarrierList.list.array[0]->subcarrierSpacing ) * i);
cfg->prach_config.num_prach_fd_occasions_list[i].prach_zero_corr_conf = scc->uplinkConfigCommon->initialUplinkBWP.rach_ConfigCommon->choice.setup->rach_ConfigGeneric.zeroCorrelationZoneConfig;
cfg->prach_config.num_prach_fd_occasions_list[i].num_root_sequences = compute_nr_root_seq(scc->uplinkConfigCommon->initialUplinkBWP.rach_ConfigCommon->choice.setup,
nb_preambles, mac->frame_type, mac->frequency_range);
//cfg->prach_config.num_prach_fd_occasions_list[i].num_unused_root_sequences = ???
prach_fd_occasion->prach_root_sequence_index = rach_ConfigCommon->prach_RootSequenceIndex.choice.l839;
prach_fd_occasion->k1 = NRRIV2PRBOFFSET(scc->uplinkConfigCommon->initialUplinkBWP.genericParameters.locationAndBandwidth, MAX_BWP_SIZE) +
rach_ConfigCommon->rach_ConfigGeneric.msg1_FrequencyStart +
(get_N_RA_RB(cfg->prach_config.prach_sub_c_spacing, frequencyInfoUL->scs_SpecificCarrierList.list.array[0]->subcarrierSpacing ) * i);
prach_fd_occasion->prach_zero_corr_conf = rach_ConfigCommon->rach_ConfigGeneric.zeroCorrelationZoneConfig;
prach_fd_occasion->num_root_sequences = compute_nr_root_seq(rach_ConfigCommon,
nb_preambles, mac->frame_type, mac->frequency_range);
//prach_fd_occasion->num_unused_root_sequences = ???
}
cfg->prach_config.ssb_per_rach = scc->uplinkConfigCommon->initialUplinkBWP.rach_ConfigCommon->choice.setup->ssb_perRACH_OccasionAndCB_PreamblesPerSSB->present-1;
cfg->prach_config.ssb_per_rach = rach_ConfigCommon->ssb_perRACH_OccasionAndCB_PreamblesPerSSB->present-1;
}
@@ -264,7 +269,6 @@ void config_common_ue(NR_UE_MAC_INST_t *mac,
{
fapi_nr_config_request_t *cfg = &mac->phy_config.config_req;
NR_ServingCellConfigCommon_t *scc = mac->scc;
int i;
mac->phy_config.Mod_id = module_id;
mac->phy_config.CC_id = cc_idP;
@@ -272,124 +276,127 @@ void config_common_ue(NR_UE_MAC_INST_t *mac,
// carrier config
LOG_D(MAC, "Entering UE Config Common\n");
AssertFatal(scc!=NULL,"scc cannot be null\n");
AssertFatal(scc != NULL, "scc cannot be null\n");
if (scc) {
cfg->carrier_config.dl_bandwidth = config_bandwidth(scc->downlinkConfigCommon->frequencyInfoDL->scs_SpecificCarrierList.list.array[0]->subcarrierSpacing,
scc->downlinkConfigCommon->frequencyInfoDL->scs_SpecificCarrierList.list.array[0]->carrierBandwidth,
*scc->downlinkConfigCommon->frequencyInfoDL->frequencyBandList.list.array[0]);
struct NR_FrequencyInfoDL *frequencyInfoDL = scc->downlinkConfigCommon->frequencyInfoDL;
int bw_index = get_supported_band_index(frequencyInfoDL->scs_SpecificCarrierList.list.array[0]->subcarrierSpacing,
*frequencyInfoDL->frequencyBandList.list.array[0],
frequencyInfoDL->scs_SpecificCarrierList.list.array[0]->carrierBandwidth);
cfg->carrier_config.dl_bandwidth = get_supported_bw_mhz(*frequencyInfoDL->frequencyBandList.list.array[0] > 256 ? FR2 : FR1, bw_index);
cfg->carrier_config.dl_frequency = from_nrarfcn(*scc->downlinkConfigCommon->frequencyInfoDL->frequencyBandList.list.array[0],
*scc->ssbSubcarrierSpacing,
scc->downlinkConfigCommon->frequencyInfoDL->absoluteFrequencyPointA)/1000; // freq in kHz
cfg->carrier_config.dl_frequency = from_nrarfcn(*frequencyInfoDL->frequencyBandList.list.array[0],
*scc->ssbSubcarrierSpacing,
frequencyInfoDL->absoluteFrequencyPointA)/1000; // freq in kHz
for (i=0; i<5; i++) {
if (i==scc->downlinkConfigCommon->frequencyInfoDL->scs_SpecificCarrierList.list.array[0]->subcarrierSpacing) {
cfg->carrier_config.dl_grid_size[i] = scc->downlinkConfigCommon->frequencyInfoDL->scs_SpecificCarrierList.list.array[0]->carrierBandwidth;
cfg->carrier_config.dl_k0[i] = scc->downlinkConfigCommon->frequencyInfoDL->scs_SpecificCarrierList.list.array[0]->offsetToCarrier;
}
else {
cfg->carrier_config.dl_grid_size[i] = 0;
cfg->carrier_config.dl_k0[i] = 0;
}
for (int i = 0; i < 5; i++) {
if (i == frequencyInfoDL->scs_SpecificCarrierList.list.array[0]->subcarrierSpacing) {
cfg->carrier_config.dl_grid_size[i] = frequencyInfoDL->scs_SpecificCarrierList.list.array[0]->carrierBandwidth;
cfg->carrier_config.dl_k0[i] = frequencyInfoDL->scs_SpecificCarrierList.list.array[0]->offsetToCarrier;
}
cfg->carrier_config.uplink_bandwidth = config_bandwidth(scc->uplinkConfigCommon->frequencyInfoUL->scs_SpecificCarrierList.list.array[0]->subcarrierSpacing,
scc->uplinkConfigCommon->frequencyInfoUL->scs_SpecificCarrierList.list.array[0]->carrierBandwidth,
*scc->uplinkConfigCommon->frequencyInfoUL->frequencyBandList->list.array[0]);
int UL_pointA;
if (scc->uplinkConfigCommon->frequencyInfoUL->absoluteFrequencyPointA == NULL)
UL_pointA = scc->downlinkConfigCommon->frequencyInfoDL->absoluteFrequencyPointA;
else
UL_pointA = *scc->uplinkConfigCommon->frequencyInfoUL->absoluteFrequencyPointA;
cfg->carrier_config.uplink_frequency = from_nrarfcn(*scc->uplinkConfigCommon->frequencyInfoUL->frequencyBandList->list.array[0],
*scc->ssbSubcarrierSpacing,
UL_pointA)/1000; // freq in kHz
for (i=0; i<5; i++) {
if (i==scc->uplinkConfigCommon->frequencyInfoUL->scs_SpecificCarrierList.list.array[0]->subcarrierSpacing) {
cfg->carrier_config.ul_grid_size[i] = scc->uplinkConfigCommon->frequencyInfoUL->scs_SpecificCarrierList.list.array[0]->carrierBandwidth;
cfg->carrier_config.ul_k0[i] = scc->uplinkConfigCommon->frequencyInfoUL->scs_SpecificCarrierList.list.array[0]->offsetToCarrier;
}
else {
cfg->carrier_config.ul_grid_size[i] = 0;
cfg->carrier_config.ul_k0[i] = 0;
}
else {
cfg->carrier_config.dl_grid_size[i] = 0;
cfg->carrier_config.dl_k0[i] = 0;
}
uint32_t band = *scc->downlinkConfigCommon->frequencyInfoDL->frequencyBandList.list.array[0];
mac->frequency_range = band<100?FR1:FR2;
frame_type_t frame_type = get_frame_type(*scc->downlinkConfigCommon->frequencyInfoDL->frequencyBandList.list.array[0], *scc->ssbSubcarrierSpacing);
// cell config
cfg->cell_config.phy_cell_id = *scc->physCellId;
cfg->cell_config.frame_duplex_type = frame_type;
// SSB config
cfg->ssb_config.ss_pbch_power = scc->ss_PBCH_BlockPower;
cfg->ssb_config.scs_common = *scc->ssbSubcarrierSpacing;
// SSB Table config
int scs_scaling = 1<<(cfg->ssb_config.scs_common);
if (scc->downlinkConfigCommon->frequencyInfoDL->absoluteFrequencyPointA < 600000)
scs_scaling = scs_scaling*3;
if (scc->downlinkConfigCommon->frequencyInfoDL->absoluteFrequencyPointA > 2016666)
scs_scaling = scs_scaling>>2;
uint32_t absolute_diff = (*scc->downlinkConfigCommon->frequencyInfoDL->absoluteFrequencySSB - scc->downlinkConfigCommon->frequencyInfoDL->absoluteFrequencyPointA);
cfg->ssb_table.ssb_offset_point_a = absolute_diff/(12*scs_scaling) - 10;
cfg->ssb_table.ssb_period = *scc->ssb_periodicityServingCell;
}
// NSA -> take ssb offset from SCS
cfg->ssb_table.ssb_subcarrier_offset = absolute_diff%(12*scs_scaling);
switch (scc->ssb_PositionsInBurst->present) {
case 1 :
cfg->ssb_table.ssb_mask_list[0].ssb_mask = scc->ssb_PositionsInBurst->choice.shortBitmap.buf[0]<<24;
cfg->ssb_table.ssb_mask_list[1].ssb_mask = 0;
break;
case 2 :
cfg->ssb_table.ssb_mask_list[0].ssb_mask = ((uint32_t) scc->ssb_PositionsInBurst->choice.mediumBitmap.buf[0]) << 24;
cfg->ssb_table.ssb_mask_list[1].ssb_mask = 0;
break;
case 3 :
cfg->ssb_table.ssb_mask_list[0].ssb_mask = 0;
cfg->ssb_table.ssb_mask_list[1].ssb_mask = 0;
for (i=0; i<4; i++) {
cfg->ssb_table.ssb_mask_list[0].ssb_mask += (scc->ssb_PositionsInBurst->choice.longBitmap.buf[3-i]<<i*8);
cfg->ssb_table.ssb_mask_list[1].ssb_mask += (scc->ssb_PositionsInBurst->choice.longBitmap.buf[7-i]<<i*8);
}
break;
default:
AssertFatal(1==0,"SSB bitmap size value %d undefined (allowed values 1,2,3) \n", scc->ssb_PositionsInBurst->present);
}
// TDD Table Configuration
if (cfg->cell_config.frame_duplex_type == TDD){
set_tdd_config_nr_ue(cfg,
scc->uplinkConfigCommon->frequencyInfoUL->scs_SpecificCarrierList.list.array[0]->subcarrierSpacing,
scc->tdd_UL_DL_ConfigurationCommon);
}
struct NR_FrequencyInfoUL *frequencyInfoUL = scc->uplinkConfigCommon->frequencyInfoUL;
bw_index = get_supported_band_index(frequencyInfoUL->scs_SpecificCarrierList.list.array[0]->subcarrierSpacing,
*frequencyInfoUL->frequencyBandList->list.array[0],
frequencyInfoUL->scs_SpecificCarrierList.list.array[0]->carrierBandwidth);
cfg->carrier_config.uplink_bandwidth = get_supported_bw_mhz(*frequencyInfoUL->frequencyBandList->list.array[0] > 256 ? FR2 : FR1, bw_index);
// PRACH configuration
uint8_t nb_preambles = 64;
if(scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->totalNumberOfRA_Preambles != NULL)
nb_preambles = *scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->totalNumberOfRA_Preambles;
int UL_pointA;
if (frequencyInfoUL->absoluteFrequencyPointA == NULL)
UL_pointA = frequencyInfoDL->absoluteFrequencyPointA;
else
UL_pointA = *frequencyInfoUL->absoluteFrequencyPointA;
cfg->carrier_config.uplink_frequency = from_nrarfcn(*frequencyInfoUL->frequencyBandList->list.array[0],
*scc->ssbSubcarrierSpacing,
UL_pointA) / 1000; // freq in kHz
for (int i = 0; i < 5; i++) {
if (i == frequencyInfoUL->scs_SpecificCarrierList.list.array[0]->subcarrierSpacing) {
cfg->carrier_config.ul_grid_size[i] = frequencyInfoUL->scs_SpecificCarrierList.list.array[0]->carrierBandwidth;
cfg->carrier_config.ul_k0[i] = frequencyInfoUL->scs_SpecificCarrierList.list.array[0]->offsetToCarrier;
}
else {
cfg->carrier_config.ul_grid_size[i] = 0;
cfg->carrier_config.ul_k0[i] = 0;
}
}
uint32_t band = *frequencyInfoDL->frequencyBandList.list.array[0];
mac->frequency_range = band<100?FR1:FR2;
frame_type_t frame_type = get_frame_type(*frequencyInfoDL->frequencyBandList.list.array[0], *scc->ssbSubcarrierSpacing);
// cell config
cfg->cell_config.phy_cell_id = *scc->physCellId;
cfg->cell_config.frame_duplex_type = frame_type;
// SSB config
cfg->ssb_config.ss_pbch_power = scc->ss_PBCH_BlockPower;
cfg->ssb_config.scs_common = *scc->ssbSubcarrierSpacing;
// SSB Table config
int scs_scaling = 1<<(cfg->ssb_config.scs_common);
if (frequencyInfoDL->absoluteFrequencyPointA < 600000)
scs_scaling = scs_scaling*3;
if (frequencyInfoDL->absoluteFrequencyPointA > 2016666)
scs_scaling = scs_scaling>>2;
uint32_t absolute_diff = (*frequencyInfoDL->absoluteFrequencySSB - frequencyInfoDL->absoluteFrequencyPointA);
cfg->ssb_table.ssb_offset_point_a = absolute_diff/(12*scs_scaling) - 10;
cfg->ssb_table.ssb_period = *scc->ssb_periodicityServingCell;
// NSA -> take ssb offset from SCS
cfg->ssb_table.ssb_subcarrier_offset = absolute_diff%(12*scs_scaling);
switch (scc->ssb_PositionsInBurst->present) {
case 1 :
cfg->ssb_table.ssb_mask_list[0].ssb_mask = scc->ssb_PositionsInBurst->choice.shortBitmap.buf[0]<<24;
cfg->ssb_table.ssb_mask_list[1].ssb_mask = 0;
break;
case 2 :
cfg->ssb_table.ssb_mask_list[0].ssb_mask = ((uint32_t) scc->ssb_PositionsInBurst->choice.mediumBitmap.buf[0]) << 24;
cfg->ssb_table.ssb_mask_list[1].ssb_mask = 0;
break;
case 3 :
cfg->ssb_table.ssb_mask_list[0].ssb_mask = 0;
cfg->ssb_table.ssb_mask_list[1].ssb_mask = 0;
for (int i = 0; i < 4; i++) {
cfg->ssb_table.ssb_mask_list[0].ssb_mask += (scc->ssb_PositionsInBurst->choice.longBitmap.buf[3-i]<<i*8);
cfg->ssb_table.ssb_mask_list[1].ssb_mask += (scc->ssb_PositionsInBurst->choice.longBitmap.buf[7-i]<<i*8);
}
break;
default:
AssertFatal(1==0,"SSB bitmap size value %d undefined (allowed values 1,2,3) \n", scc->ssb_PositionsInBurst->present);
}
// TDD Table Configuration
if (cfg->cell_config.frame_duplex_type == TDD){
set_tdd_config_nr_ue(cfg,
frequencyInfoUL->scs_SpecificCarrierList.list.array[0]->subcarrierSpacing,
scc->tdd_UL_DL_ConfigurationCommon);
}
// PRACH configuration
uint8_t nb_preambles = 64;
NR_RACH_ConfigCommon_t *rach_ConfigCommon = scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup;
if(rach_ConfigCommon->totalNumberOfRA_Preambles != NULL)
nb_preambles = *rach_ConfigCommon->totalNumberOfRA_Preambles;
cfg->prach_config.prach_sequence_length = rach_ConfigCommon->prach_RootSequenceIndex.present-1;
if (rach_ConfigCommon->msg1_SubcarrierSpacing)
cfg->prach_config.prach_sub_c_spacing = *rach_ConfigCommon->msg1_SubcarrierSpacing;
else
cfg->prach_config.prach_sub_c_spacing = frequencyInfoDL->scs_SpecificCarrierList.list.array[0]->subcarrierSpacing;
cfg->prach_config.restricted_set_config = rach_ConfigCommon->restrictedSetConfig;
cfg->prach_config.prach_sequence_length = scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->prach_RootSequenceIndex.present-1;
if (scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->msg1_SubcarrierSpacing)
cfg->prach_config.prach_sub_c_spacing = *scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->msg1_SubcarrierSpacing;
else
cfg->prach_config.prach_sub_c_spacing = scc->downlinkConfigCommon->frequencyInfoDL->scs_SpecificCarrierList.list.array[0]->subcarrierSpacing;
cfg->prach_config.restricted_set_config = scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->restrictedSetConfig;
switch (scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rach_ConfigGeneric.msg1_FDM) {
switch (rach_ConfigCommon->rach_ConfigGeneric.msg1_FDM) {
case 0 :
cfg->prach_config.num_prach_fd_occasions = 1;
break;
@@ -403,28 +410,28 @@ void config_common_ue(NR_UE_MAC_INST_t *mac,
cfg->prach_config.num_prach_fd_occasions = 8;
break;
default:
AssertFatal(1==0,"msg1 FDM identifier %ld undefined (0,1,2,3) \n", scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rach_ConfigGeneric.msg1_FDM);
}
cfg->prach_config.num_prach_fd_occasions_list = (fapi_nr_num_prach_fd_occasions_t *) malloc(cfg->prach_config.num_prach_fd_occasions*sizeof(fapi_nr_num_prach_fd_occasions_t));
for (i=0; i<cfg->prach_config.num_prach_fd_occasions; i++) {
cfg->prach_config.num_prach_fd_occasions_list[i].num_prach_fd_occasions = i;
if (cfg->prach_config.prach_sequence_length)
cfg->prach_config.num_prach_fd_occasions_list[i].prach_root_sequence_index = scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->prach_RootSequenceIndex.choice.l139;
else
cfg->prach_config.num_prach_fd_occasions_list[i].prach_root_sequence_index = scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->prach_RootSequenceIndex.choice.l839;
cfg->prach_config.num_prach_fd_occasions_list[i].k1 = scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rach_ConfigGeneric.msg1_FrequencyStart;
cfg->prach_config.num_prach_fd_occasions_list[i].prach_zero_corr_conf = scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rach_ConfigGeneric.zeroCorrelationZoneConfig;
cfg->prach_config.num_prach_fd_occasions_list[i].num_root_sequences = compute_nr_root_seq(scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup,
nb_preambles, frame_type,mac->frequency_range);
//cfg->prach_config.num_prach_fd_occasions_list[i].num_unused_root_sequences = ???
}
AssertFatal(1==0,"msg1 FDM identifier %ld undefined (0,1,2,3) \n", rach_ConfigCommon->rach_ConfigGeneric.msg1_FDM);
}
cfg->prach_config.ssb_per_rach = scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->ssb_perRACH_OccasionAndCB_PreamblesPerSSB->present-1;
} // scc
cfg->prach_config.num_prach_fd_occasions_list = (fapi_nr_num_prach_fd_occasions_t *) malloc(cfg->prach_config.num_prach_fd_occasions*sizeof(fapi_nr_num_prach_fd_occasions_t));
for (int i = 0; i < cfg->prach_config.num_prach_fd_occasions; i++) {
fapi_nr_num_prach_fd_occasions_t *prach_fd_occasion = &cfg->prach_config.num_prach_fd_occasions_list[i];
prach_fd_occasion->num_prach_fd_occasions = i;
if (cfg->prach_config.prach_sequence_length)
prach_fd_occasion->prach_root_sequence_index = rach_ConfigCommon->prach_RootSequenceIndex.choice.l139;
else
prach_fd_occasion->prach_root_sequence_index = rach_ConfigCommon->prach_RootSequenceIndex.choice.l839;
prach_fd_occasion->k1 = rach_ConfigCommon->rach_ConfigGeneric.msg1_FrequencyStart;
prach_fd_occasion->prach_zero_corr_conf = rach_ConfigCommon->rach_ConfigGeneric.zeroCorrelationZoneConfig;
prach_fd_occasion->num_root_sequences = compute_nr_root_seq(rach_ConfigCommon,
nb_preambles,
frame_type,
mac->frequency_range);
//prach_fd_occasion->num_unused_root_sequences = ???
}
cfg->prach_config.ssb_per_rach = rach_ConfigCommon->ssb_perRACH_OccasionAndCB_PreamblesPerSSB->present-1;
}
/** \brief This function is relavant for the UE procedures for control. It loads the search spaces, the BWPs and the CORESETs into the MAC instance and
+15 -4
View File
@@ -378,6 +378,16 @@ typedef struct {
} NR_SSB_meas_t;
typedef struct NR_UL_TIME_ALIGNMENT {
/// TA command and TAGID received from the gNB
bool ta_apply;
int ta_command;
int ta_total;
uint32_t tag_id;
int frame;
int slot;
} NR_UL_TIME_ALIGNMENT_t;
/*!\brief Top level UE MAC structure */
typedef struct {
NR_UE_L2_STATE_t state;
@@ -400,11 +410,12 @@ typedef struct {
NR_UE_DL_BWP_t current_DL_BWP;
NR_UE_UL_BWP_t current_UL_BWP;
NR_UL_TIME_ALIGNMENT_t ul_time_alignment;
NR_BWP_Downlink_t *DLbwp[MAX_NUM_BWP_UE];
NR_BWP_Uplink_t *ULbwp[MAX_NUM_BWP_UE];
NR_ControlResourceSet_t *coreset[MAX_NUM_BWP_UE][FAPI_NR_MAX_CORESET_PER_BWP];
NR_SearchSpace_t *SSpace[MAX_NUM_BWP_UE][FAPI_NR_MAX_SS];
NR_BWP_Downlink_t *DLbwp[MAX_NUM_BWP_UE];
NR_BWP_Uplink_t *ULbwp[MAX_NUM_BWP_UE];
NR_ControlResourceSet_t *coreset[MAX_NUM_BWP_UE][FAPI_NR_MAX_CORESET_PER_BWP];
NR_SearchSpace_t *SSpace[MAX_NUM_BWP_UE][FAPI_NR_MAX_SS];
bool phy_config_request_sent;
frame_type_t frame_type;
+2 -3
View File
@@ -232,11 +232,9 @@ uint8_t get_rsrp_diff_index(int best_rsrp,int current_rsrp);
@returns void
*/
void nr_ue_send_sdu(nr_downlink_indication_t *dl_info,
NR_UL_TIME_ALIGNMENT_t *ul_time_alignment,
int pdu_id);
void nr_ue_process_mac_pdu(nr_downlink_indication_t *dl_info,
NR_UL_TIME_ALIGNMENT_t *ul_time_alignment,
int pdu_id);
int nr_write_ce_ulsch_pdu(uint8_t *mac_ce,
@@ -322,6 +320,7 @@ void nr_ue_prach_scheduler(module_id_t module_idP, frame_t frameP, sub_frame_t s
void nr_ue_pucch_scheduler(module_id_t module_idP, frame_t frameP, int slotP, void *phy_data);
void nr_schedule_csirs_reception(NR_UE_MAC_INST_t *mac, int frame, int slot);
void nr_schedule_csi_for_im(NR_UE_MAC_INST_t *mac, int frame, int slot);
void schedule_ta_command(fapi_nr_dl_config_request_t *dl_config, NR_UL_TIME_ALIGNMENT_t *ul_time_alignment);
/* \brief This function schedules the Msg3 transmission
@param
@@ -356,7 +355,7 @@ random-access procedure
@param selected_rar_buffer the output buffer for storing the selected RAR header and RAR payload
@returns timing advance or 0xffff if preamble doesn't match
*/
int nr_ue_process_rar(nr_downlink_indication_t *dl_info, NR_UL_TIME_ALIGNMENT_t *ul_time_alignment, int pdu_id);
int nr_ue_process_rar(nr_downlink_indication_t *dl_info, int pdu_id);
void nr_ue_contention_resolution(module_id_t module_id, int cc_id, frame_t frame, int slot, NR_PRACH_RESOURCES_t *prach_resources);
+3 -9
View File
@@ -51,16 +51,10 @@ NR_UE_MAC_INST_t * nr_l2_init_ue(NR_UE_RRC_INST_t* rrc_inst) {
//LOG_I(MAC, "[MAIN] init UE MAC functions \n");
//init mac here
nr_ue_mac_inst = (NR_UE_MAC_INST_t *)calloc(sizeof(NR_UE_MAC_INST_t),NB_NR_UE_MAC_INST);
nr_ue_mac_inst->first_sync_frame = -1;
nr_ue_mac_inst->sib1_decoded = false;
nr_ue_mac_inst->phy_config_request_sent = false;
nr_ue_mac_inst->state = UE_NOT_SYNC;
memset(&nr_ue_mac_inst->ssb_measurements, 0, sizeof(nr_ue_mac_inst->ssb_measurements));
nr_ue_mac_inst = (NR_UE_MAC_INST_t *)calloc(sizeof(NR_UE_MAC_INST_t), NB_NR_UE_MAC_INST);
for (int j=0;j<NB_NR_UE_MAC_INST;j++) {
nr_ue_init_mac(j);
}
for (int j = 0; j < NB_NR_UE_MAC_INST; j++)
nr_ue_init_mac(j);
if (rrc_inst && rrc_inst->scell_group_config) {
+31 -23
View File
@@ -151,9 +151,8 @@ const initial_pucch_resource_t initial_pucch_resource[16] = {
};
void nr_ue_init_mac(module_id_t module_idP) {
int i;
void nr_ue_init_mac(module_id_t module_idP)
{
NR_UE_MAC_INST_t *mac = get_mac_inst(module_idP);
// default values as deined in 38.331 sec 9.2.2
LOG_I(NR_MAC, "[UE%d] Applying default macMainConfig\n", module_idP);
@@ -182,7 +181,7 @@ void nr_ue_init_mac(module_id_t module_idP) {
// mac->scheduling_info.PathlossChange_db = nr_get_db_dl_PathlossChange(mac->scheduling_info.PathlossChange);
// mac->PHR_reporting_active = 0;
for (i = 0; i < NR_MAX_NUM_LCID; i++) {
for (int i = 0; i < NR_MAX_NUM_LCID; i++) {
LOG_D(NR_MAC, "[UE%d] Applying default logical channel config for LCGID %d\n",
module_idP, i);
mac->scheduling_info.Bj[i] = -1;
@@ -196,8 +195,16 @@ void nr_ue_init_mac(module_id_t module_idP) {
mac->scheduling_info.LCID_status[i] = LCID_EMPTY;
mac->scheduling_info.LCID_buffer_remain[i] = 0;
for (int i=0;i<NR_MAX_HARQ_PROCESSES;i++) mac->first_ul_tx[i]=1;
for (int i = 0; i < NR_MAX_HARQ_PROCESSES; i++)
mac->first_ul_tx[i] = 1;
}
mac->first_sync_frame = -1;
mac->sib1_decoded = false;
mac->phy_config_request_sent = false;
mac->state = UE_NOT_SYNC;
memset(&mac->ssb_measurements, 0, sizeof(mac->ssb_measurements));
memset(&mac->ul_time_alignment, 0, sizeof(mac->ul_time_alignment));
}
NR_BWP_DownlinkCommon_t *get_bwp_downlink_common(NR_UE_MAC_INST_t *mac, NR_BWP_Id_t dl_bwp_id) {
@@ -2609,6 +2616,7 @@ uint8_t get_ssb_rsrp_payload(NR_UE_MAC_INST_t *mac,
int ssbri_bits = ceil(log2(nb_ssb));
int ssb_rsrp[2][nb_meas]; // the array contains index and RSRP of each SSB to be reported (nb_meas highest RSRPs)
memset(ssb_rsrp, 0, sizeof(ssb_rsrp));
//TODO replace the following 2 lines with a function to order the nb_meas highest SSB RSRPs
for (int i=0; i<nb_ssb; i++) {
@@ -2808,8 +2816,8 @@ uint8_t get_rsrp_diff_index(int best_rsrp,int current_rsrp) {
}
void nr_ue_send_sdu(nr_downlink_indication_t *dl_info, NR_UL_TIME_ALIGNMENT_t *ul_time_alignment, int pdu_id){
void nr_ue_send_sdu(nr_downlink_indication_t *dl_info, int pdu_id)
{
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_SEND_SDU, VCD_FUNCTION_IN);
LOG_D(MAC, "In %s [%d.%d] Handling DLSCH PDU...\n", __FUNCTION__, dl_info->frame, dl_info->slot);
@@ -2818,10 +2826,10 @@ void nr_ue_send_sdu(nr_downlink_indication_t *dl_info, NR_UL_TIME_ALIGNMENT_t *u
// it parses MAC CEs subheaders, MAC CEs, SDU subheaderds and SDUs
switch (dl_info->rx_ind->rx_indication_body[pdu_id].pdu_type){
case FAPI_NR_RX_PDU_TYPE_DLSCH:
nr_ue_process_mac_pdu(dl_info, ul_time_alignment, pdu_id);
nr_ue_process_mac_pdu(dl_info, pdu_id);
break;
case FAPI_NR_RX_PDU_TYPE_RAR:
nr_ue_process_rar(dl_info, ul_time_alignment, pdu_id);
nr_ue_process_rar(dl_info, pdu_id);
break;
default:
break;
@@ -3535,8 +3543,8 @@ static uint8_t nr_extract_dci_info(NR_UE_MAC_INST_t *mac,
// R: Reserved bit, set to zero.
////////////////////////////////
void nr_ue_process_mac_pdu(nr_downlink_indication_t *dl_info,
NR_UL_TIME_ALIGNMENT_t *ul_time_alignment,
int pdu_id){
int pdu_id)
{
module_id_t module_idP = dl_info->module_id;
frame_t frameP = dl_info->frame;
@@ -3656,11 +3664,14 @@ void nr_ue_process_mac_pdu(nr_downlink_indication_t *dl_info,
const int ta = ((NR_MAC_CE_TA *)pduP)[1].TA_COMMAND;
const int tag = ((NR_MAC_CE_TA *)pduP)[1].TAGID;
ul_time_alignment->apply_ta = 1;
ul_time_alignment->ta_command = ta; //here
NR_UL_TIME_ALIGNMENT_t *ul_time_alignment = &mac->ul_time_alignment;
ul_time_alignment->ta_total += ta - 31;
ul_time_alignment->tag_id = tag;
ul_time_alignment->ta_command = ta;
ul_time_alignment->frame = frameP;
ul_time_alignment->slot = slot;
ul_time_alignment->ta_apply = true;
/*
#ifdef DEBUG_HEADER_PARSING
LOG_D(MAC, "[UE] CE %d : UE Timing Advance : %d\n", i, pduP[1]);
@@ -3943,8 +3954,8 @@ int nr_write_ce_ulsch_pdu(uint8_t *mac_ce,
// - b buffer
// - ulsch power offset
// - optimize: mu_pusch, j and table_6_1_2_1_1_2_time_dom_res_alloc_A are already defined in nr_ue_procedures
int nr_ue_process_rar(nr_downlink_indication_t *dl_info, NR_UL_TIME_ALIGNMENT_t *ul_time_alignment, int pdu_id){
int nr_ue_process_rar(nr_downlink_indication_t *dl_info, int pdu_id)
{
module_id_t mod_id = dl_info->module_id;
frame_t frame = dl_info->frame;
int slot = dl_info->slot;
@@ -4029,12 +4040,12 @@ int nr_ue_process_rar(nr_downlink_indication_t *dl_info, NR_UL_TIME_ALIGNMENT_t
#endif
// TA command
ul_time_alignment->apply_ta = 1;
NR_UL_TIME_ALIGNMENT_t *ul_time_alignment = &mac->ul_time_alignment;
const int ta = rar->TA2 + (rar->TA1 << 5);
ul_time_alignment->ta_command = 31 + ta;
ul_time_alignment->ta_total = ta;
LOG_W(MAC, "received TA command %d\n", ul_time_alignment->ta_command);
ul_time_alignment->ta_apply = true;
LOG_W(MAC, "received TA command %d\n", 31 + ta);
#ifdef DEBUG_RAR
// CSI
csi_req = (unsigned char) (rar->UL_GRANT_4 & 0x01);
@@ -4102,7 +4113,7 @@ int nr_ue_process_rar(nr_downlink_indication_t *dl_info, NR_UL_TIME_ALIGNMENT_t
mod_id,
rar_grant.Msg3_t_alloc,
rar_grant.Msg3_f_alloc,
ul_time_alignment->ta_command,
ta_command,
rar_grant.mcs,
rar_grant.freq_hopping,
tpc_command,
@@ -4148,10 +4159,7 @@ int nr_ue_process_rar(nr_downlink_indication_t *dl_info, NR_UL_TIME_ALIGNMENT_t
}
} else {
ra->t_crnti = 0;
ul_time_alignment->ta_command = (0xffff);
}
return ret;
@@ -1024,6 +1024,8 @@ void nr_ue_dl_scheduler(nr_downlink_indication_t *dl_info)
nr_ue_dcireq(&dcireq); //to be replaced with function pointer later
*dl_config = dcireq.dl_config_req;
if(mac->ul_time_alignment.ta_apply)
schedule_ta_command(dl_config, &mac->ul_time_alignment);
nr_schedule_csirs_reception(mac, rx_frame, rx_slot);
nr_schedule_csi_for_im(mac, rx_frame, rx_slot);
dcireq.dl_config_req = *dl_config;
@@ -1037,6 +1039,8 @@ void nr_ue_dl_scheduler(nr_downlink_indication_t *dl_info)
else if (mac->state == UE_PERFORMING_RA) {
// this is for Msg2/Msg4
if (mac->ra.ra_state >= WAIT_RAR) {
if(mac->ul_time_alignment.ta_apply)
schedule_ta_command(dl_config, &mac->ul_time_alignment);
fapi_nr_dl_config_dci_dl_pdu_rel15_t *rel15 = &dl_config->dl_config_list[dl_config->number_pdus].dci_config_pdu.dci_config_rel15;
rel15->num_dci_options = mac->ra.ra_state == WAIT_RAR ? 1 : 2;
rel15->dci_format_options[0] = NR_DL_DCI_FORMAT_1_0;
@@ -3171,5 +3175,15 @@ uint8_t nr_ue_get_sdu(module_id_t module_idP,
#endif
return num_sdus > 0 ? 1 : 0;
}
void schedule_ta_command(fapi_nr_dl_config_request_t *dl_config, NR_UL_TIME_ALIGNMENT_t *ul_time_alignment)
{
fapi_nr_ta_command_pdu *ta = &dl_config->dl_config_list[dl_config->number_pdus].ta_command_pdu;
ta->ta_frame = ul_time_alignment->frame;
ta->ta_slot = ul_time_alignment->slot;
ta->ta_command = ul_time_alignment->ta_command;
dl_config->dl_config_list[dl_config->number_pdus].pdu_type = FAPI_NR_CONFIG_TA_COMMAND;
dl_config->number_pdus += 1;
ul_time_alignment->ta_apply = false;
}
+66 -55
View File
@@ -170,24 +170,25 @@ void config_common(gNB_MAC_INST *nrmac, int pdsch_AntennaPorts, int pusch_Antenn
nrmac->common_channels[0].ServingCellConfigCommon = scc;
// Carrier configuration
cfg->carrier_config.dl_bandwidth.value = config_bandwidth(scc->downlinkConfigCommon->frequencyInfoDL->scs_SpecificCarrierList.list.array[0]->subcarrierSpacing,
scc->downlinkConfigCommon->frequencyInfoDL->scs_SpecificCarrierList.list.array[0]->carrierBandwidth,
*scc->downlinkConfigCommon->frequencyInfoDL->frequencyBandList.list.array[0]);
struct NR_FrequencyInfoDL *frequencyInfoDL = scc->downlinkConfigCommon->frequencyInfoDL;
int bw_index = get_supported_band_index(frequencyInfoDL->scs_SpecificCarrierList.list.array[0]->subcarrierSpacing,
*frequencyInfoDL->frequencyBandList.list.array[0],
frequencyInfoDL->scs_SpecificCarrierList.list.array[0]->carrierBandwidth);
cfg->carrier_config.dl_bandwidth.value = get_supported_bw_mhz(*frequencyInfoDL->frequencyBandList.list.array[0] > 256 ? FR2 : FR1, bw_index);
cfg->carrier_config.dl_bandwidth.tl.tag = NFAPI_NR_CONFIG_DL_BANDWIDTH_TAG; //temporary
cfg->num_tlv++;
LOG_I(NR_MAC,"%s() dl_BandwidthP:%d\n", __FUNCTION__, cfg->carrier_config.dl_bandwidth.value);
cfg->carrier_config.dl_frequency.value = from_nrarfcn(*scc->downlinkConfigCommon->frequencyInfoDL->frequencyBandList.list.array[0],
cfg->carrier_config.dl_frequency.value = from_nrarfcn(*frequencyInfoDL->frequencyBandList.list.array[0],
*scc->ssbSubcarrierSpacing,
scc->downlinkConfigCommon->frequencyInfoDL->absoluteFrequencyPointA)/1000; // freq in kHz
frequencyInfoDL->absoluteFrequencyPointA)/1000; // freq in kHz
cfg->carrier_config.dl_frequency.tl.tag = NFAPI_NR_CONFIG_DL_FREQUENCY_TAG;
cfg->num_tlv++;
for (int i=0; i<5; i++) {
if (i==scc->downlinkConfigCommon->frequencyInfoDL->scs_SpecificCarrierList.list.array[0]->subcarrierSpacing) {
cfg->carrier_config.dl_grid_size[i].value = scc->downlinkConfigCommon->frequencyInfoDL->scs_SpecificCarrierList.list.array[0]->carrierBandwidth;
cfg->carrier_config.dl_k0[i].value = scc->downlinkConfigCommon->frequencyInfoDL->scs_SpecificCarrierList.list.array[0]->offsetToCarrier;
for (int i = 0; i < 5; i++) {
if (i == frequencyInfoDL->scs_SpecificCarrierList.list.array[0]->subcarrierSpacing) {
cfg->carrier_config.dl_grid_size[i].value = frequencyInfoDL->scs_SpecificCarrierList.list.array[0]->carrierBandwidth;
cfg->carrier_config.dl_k0[i].value = frequencyInfoDL->scs_SpecificCarrierList.list.array[0]->offsetToCarrier;
cfg->carrier_config.dl_grid_size[i].tl.tag = NFAPI_NR_CONFIG_DL_GRID_SIZE_TAG;
cfg->carrier_config.dl_k0[i].tl.tag = NFAPI_NR_CONFIG_DL_K0_TAG;
cfg->num_tlv++;
@@ -198,30 +199,31 @@ void config_common(gNB_MAC_INST *nrmac, int pdsch_AntennaPorts, int pusch_Antenn
cfg->carrier_config.dl_k0[i].value = 0;
}
}
cfg->carrier_config.uplink_bandwidth.value = config_bandwidth(scc->uplinkConfigCommon->frequencyInfoUL->scs_SpecificCarrierList.list.array[0]->subcarrierSpacing,
scc->uplinkConfigCommon->frequencyInfoUL->scs_SpecificCarrierList.list.array[0]->carrierBandwidth,
*scc->uplinkConfigCommon->frequencyInfoUL->frequencyBandList->list.array[0]);
struct NR_FrequencyInfoUL *frequencyInfoUL = scc->uplinkConfigCommon->frequencyInfoUL;
bw_index = get_supported_band_index(frequencyInfoUL->scs_SpecificCarrierList.list.array[0]->subcarrierSpacing,
*frequencyInfoUL->frequencyBandList->list.array[0],
frequencyInfoUL->scs_SpecificCarrierList.list.array[0]->carrierBandwidth);
cfg->carrier_config.uplink_bandwidth.value = get_supported_bw_mhz(*frequencyInfoUL->frequencyBandList->list.array[0] > 256 ? FR2 : FR1, bw_index);
cfg->carrier_config.uplink_bandwidth.tl.tag = NFAPI_NR_CONFIG_UPLINK_BANDWIDTH_TAG; //temporary
cfg->num_tlv++;
LOG_I(NR_MAC,"%s() dl_BandwidthP:%d\n", __FUNCTION__, cfg->carrier_config.uplink_bandwidth.value);
int UL_pointA;
if (scc->uplinkConfigCommon->frequencyInfoUL->absoluteFrequencyPointA == NULL)
UL_pointA = scc->downlinkConfigCommon->frequencyInfoDL->absoluteFrequencyPointA;
if (frequencyInfoUL->absoluteFrequencyPointA == NULL)
UL_pointA = frequencyInfoDL->absoluteFrequencyPointA;
else
UL_pointA = *scc->uplinkConfigCommon->frequencyInfoUL->absoluteFrequencyPointA;
UL_pointA = *frequencyInfoUL->absoluteFrequencyPointA;
cfg->carrier_config.uplink_frequency.value = from_nrarfcn(*scc->uplinkConfigCommon->frequencyInfoUL->frequencyBandList->list.array[0],
cfg->carrier_config.uplink_frequency.value = from_nrarfcn(*frequencyInfoUL->frequencyBandList->list.array[0],
*scc->ssbSubcarrierSpacing,
UL_pointA)/1000; // freq in kHz
cfg->carrier_config.uplink_frequency.tl.tag = NFAPI_NR_CONFIG_UPLINK_FREQUENCY_TAG;
cfg->num_tlv++;
for (int i=0; i<5; i++) {
if (i==scc->uplinkConfigCommon->frequencyInfoUL->scs_SpecificCarrierList.list.array[0]->subcarrierSpacing) {
cfg->carrier_config.ul_grid_size[i].value = scc->uplinkConfigCommon->frequencyInfoUL->scs_SpecificCarrierList.list.array[0]->carrierBandwidth;
cfg->carrier_config.ul_k0[i].value = scc->uplinkConfigCommon->frequencyInfoUL->scs_SpecificCarrierList.list.array[0]->offsetToCarrier;
for (int i = 0; i < 5; i++) {
if (i == frequencyInfoUL->scs_SpecificCarrierList.list.array[0]->subcarrierSpacing) {
cfg->carrier_config.ul_grid_size[i].value = frequencyInfoUL->scs_SpecificCarrierList.list.array[0]->carrierBandwidth;
cfg->carrier_config.ul_k0[i].value = frequencyInfoUL->scs_SpecificCarrierList.list.array[0]->offsetToCarrier;
cfg->carrier_config.ul_grid_size[i].tl.tag = NFAPI_NR_CONFIG_UL_GRID_SIZE_TAG;
cfg->carrier_config.ul_k0[i].tl.tag = NFAPI_NR_CONFIG_UL_K0_TAG;
cfg->num_tlv++;
@@ -233,10 +235,10 @@ void config_common(gNB_MAC_INST *nrmac, int pdsch_AntennaPorts, int pusch_Antenn
}
}
uint32_t band = *scc->downlinkConfigCommon->frequencyInfoDL->frequencyBandList.list.array[0];
uint32_t band = *frequencyInfoDL->frequencyBandList.list.array[0];
frequency_range_t frequency_range = band<100?FR1:FR2;
frame_type_t frame_type = get_frame_type(*scc->downlinkConfigCommon->frequencyInfoDL->frequencyBandList.list.array[0], *scc->ssbSubcarrierSpacing);
frame_type_t frame_type = get_frame_type(*frequencyInfoDL->frequencyBandList.list.array[0], *scc->ssbSubcarrierSpacing);
nrmac->common_channels[0].frame_type = frame_type;
// Cell configuration
@@ -265,27 +267,28 @@ void config_common(gNB_MAC_INST *nrmac, int pdsch_AntennaPorts, int pusch_Antenn
// PRACH configuration
uint8_t nb_preambles = 64;
if(scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->totalNumberOfRA_Preambles != NULL)
nb_preambles = *scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->totalNumberOfRA_Preambles;
NR_RACH_ConfigCommon_t *rach_ConfigCommon = scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup;
if(rach_ConfigCommon->totalNumberOfRA_Preambles != NULL)
nb_preambles = *rach_ConfigCommon->totalNumberOfRA_Preambles;
cfg->prach_config.prach_sequence_length.value = scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->prach_RootSequenceIndex.present-1;
cfg->prach_config.prach_sequence_length.value = rach_ConfigCommon->prach_RootSequenceIndex.present-1;
cfg->prach_config.prach_sequence_length.tl.tag = NFAPI_NR_CONFIG_PRACH_SEQUENCE_LENGTH_TAG;
cfg->num_tlv++;
cfg->num_tlv++;
if (scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->msg1_SubcarrierSpacing)
cfg->prach_config.prach_sub_c_spacing.value = *scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->msg1_SubcarrierSpacing;
else
cfg->prach_config.prach_sub_c_spacing.value = scc->downlinkConfigCommon->frequencyInfoDL->scs_SpecificCarrierList.list.array[0]->subcarrierSpacing;
if (rach_ConfigCommon->msg1_SubcarrierSpacing)
cfg->prach_config.prach_sub_c_spacing.value = *rach_ConfigCommon->msg1_SubcarrierSpacing;
else
cfg->prach_config.prach_sub_c_spacing.value = frequencyInfoDL->scs_SpecificCarrierList.list.array[0]->subcarrierSpacing;
cfg->prach_config.prach_sub_c_spacing.tl.tag = NFAPI_NR_CONFIG_PRACH_SUB_C_SPACING_TAG;
cfg->num_tlv++;
cfg->prach_config.restricted_set_config.value = scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->restrictedSetConfig;
cfg->prach_config.restricted_set_config.value = rach_ConfigCommon->restrictedSetConfig;
cfg->prach_config.restricted_set_config.tl.tag = NFAPI_NR_CONFIG_RESTRICTED_SET_CONFIG_TAG;
cfg->num_tlv++;
cfg->prach_config.prach_ConfigurationIndex.value = scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rach_ConfigGeneric.prach_ConfigurationIndex;
cfg->prach_config.prach_ConfigurationIndex.value = rach_ConfigCommon->rach_ConfigGeneric.prach_ConfigurationIndex;
cfg->prach_config.prach_ConfigurationIndex.tl.tag = NFAPI_NR_CONFIG_PRACH_CONFIG_INDEX_TAG;
cfg->num_tlv++;
switch (scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rach_ConfigGeneric.msg1_FDM) {
switch (rach_ConfigCommon->rach_ConfigGeneric.msg1_FDM) {
case 0 :
cfg->prach_config.num_prach_fd_occasions.value = 1;
break;
@@ -299,48 +302,57 @@ void config_common(gNB_MAC_INST *nrmac, int pdsch_AntennaPorts, int pusch_Antenn
cfg->prach_config.num_prach_fd_occasions.value = 8;
break;
default:
AssertFatal(1==0,"msg1 FDM identifier %ld undefined (0,1,2,3) \n", scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rach_ConfigGeneric.msg1_FDM);
AssertFatal(1==0,"msg1 FDM identifier %ld undefined (0,1,2,3) \n", rach_ConfigCommon->rach_ConfigGeneric.msg1_FDM);
}
cfg->prach_config.num_prach_fd_occasions.tl.tag = NFAPI_NR_CONFIG_NUM_PRACH_FD_OCCASIONS_TAG;
cfg->num_tlv++;
cfg->prach_config.prach_ConfigurationIndex.value = scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rach_ConfigGeneric.prach_ConfigurationIndex;
cfg->prach_config.prach_ConfigurationIndex.value = rach_ConfigCommon->rach_ConfigGeneric.prach_ConfigurationIndex;
cfg->prach_config.prach_ConfigurationIndex.tl.tag = NFAPI_NR_CONFIG_PRACH_CONFIG_INDEX_TAG;
cfg->num_tlv++;
cfg->prach_config.num_prach_fd_occasions_list = (nfapi_nr_num_prach_fd_occasions_t *) malloc(cfg->prach_config.num_prach_fd_occasions.value*sizeof(nfapi_nr_num_prach_fd_occasions_t));
for (int i=0; i<cfg->prach_config.num_prach_fd_occasions.value; i++) {
// cfg->prach_config.num_prach_fd_occasions_list[i].num_prach_fd_occasions = i;
nfapi_nr_num_prach_fd_occasions_t *prach_fd_occasion = &cfg->prach_config.num_prach_fd_occasions_list[i];
// prach_fd_occasion->num_prach_fd_occasions = i;
if (cfg->prach_config.prach_sequence_length.value)
cfg->prach_config.num_prach_fd_occasions_list[i].prach_root_sequence_index.value = scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->prach_RootSequenceIndex.choice.l139;
prach_fd_occasion->prach_root_sequence_index.value = rach_ConfigCommon->prach_RootSequenceIndex.choice.l139;
else
cfg->prach_config.num_prach_fd_occasions_list[i].prach_root_sequence_index.value = scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->prach_RootSequenceIndex.choice.l839;
cfg->prach_config.num_prach_fd_occasions_list[i].prach_root_sequence_index.tl.tag = NFAPI_NR_CONFIG_PRACH_ROOT_SEQUENCE_INDEX_TAG;
prach_fd_occasion->prach_root_sequence_index.value = rach_ConfigCommon->prach_RootSequenceIndex.choice.l839;
prach_fd_occasion->prach_root_sequence_index.tl.tag = NFAPI_NR_CONFIG_PRACH_ROOT_SEQUENCE_INDEX_TAG;
cfg->num_tlv++;
cfg->prach_config.num_prach_fd_occasions_list[i].k1.value = NRRIV2PRBOFFSET(scc->uplinkConfigCommon->initialUplinkBWP->genericParameters.locationAndBandwidth, MAX_BWP_SIZE) + scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rach_ConfigGeneric.msg1_FrequencyStart + (get_N_RA_RB( cfg->prach_config.prach_sub_c_spacing.value, scc->uplinkConfigCommon->frequencyInfoUL->scs_SpecificCarrierList.list.array[0]->subcarrierSpacing ) * i);
prach_fd_occasion->k1.value = NRRIV2PRBOFFSET(scc->uplinkConfigCommon->initialUplinkBWP->genericParameters.locationAndBandwidth, MAX_BWP_SIZE) +
rach_ConfigCommon->rach_ConfigGeneric.msg1_FrequencyStart +
(get_N_RA_RB(cfg->prach_config.prach_sub_c_spacing.value, frequencyInfoUL->scs_SpecificCarrierList.list.array[0]->subcarrierSpacing ) * i);
if (get_softmodem_params()->sa) {
cfg->prach_config.num_prach_fd_occasions_list[i].k1.value = NRRIV2PRBOFFSET(scc->uplinkConfigCommon->initialUplinkBWP->genericParameters.locationAndBandwidth, MAX_BWP_SIZE) + scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rach_ConfigGeneric.msg1_FrequencyStart + (get_N_RA_RB( cfg->prach_config.prach_sub_c_spacing.value, scc->uplinkConfigCommon->frequencyInfoUL->scs_SpecificCarrierList.list.array[0]->subcarrierSpacing ) * i);
prach_fd_occasion->k1.value = NRRIV2PRBOFFSET(scc->uplinkConfigCommon->initialUplinkBWP->genericParameters.locationAndBandwidth, MAX_BWP_SIZE) +
rach_ConfigCommon->rach_ConfigGeneric.msg1_FrequencyStart +
(get_N_RA_RB(cfg->prach_config.prach_sub_c_spacing.value, frequencyInfoUL->scs_SpecificCarrierList.list.array[0]->subcarrierSpacing ) * i);
} else {
cfg->prach_config.num_prach_fd_occasions_list[i].k1.value = scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rach_ConfigGeneric.msg1_FrequencyStart + (get_N_RA_RB( cfg->prach_config.prach_sub_c_spacing.value, scc->uplinkConfigCommon->frequencyInfoUL->scs_SpecificCarrierList.list.array[0]->subcarrierSpacing ) * i);
prach_fd_occasion->k1.value = rach_ConfigCommon->rach_ConfigGeneric.msg1_FrequencyStart +
(get_N_RA_RB(cfg->prach_config.prach_sub_c_spacing.value, frequencyInfoUL->scs_SpecificCarrierList.list.array[0]->subcarrierSpacing ) * i);
}
cfg->prach_config.num_prach_fd_occasions_list[i].k1.tl.tag = NFAPI_NR_CONFIG_K1_TAG;
prach_fd_occasion->k1.tl.tag = NFAPI_NR_CONFIG_K1_TAG;
cfg->num_tlv++;
cfg->prach_config.num_prach_fd_occasions_list[i].prach_zero_corr_conf.value = scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->rach_ConfigGeneric.zeroCorrelationZoneConfig;
cfg->prach_config.num_prach_fd_occasions_list[i].prach_zero_corr_conf.tl.tag = NFAPI_NR_CONFIG_PRACH_ZERO_CORR_CONF_TAG;
prach_fd_occasion->prach_zero_corr_conf.value = rach_ConfigCommon->rach_ConfigGeneric.zeroCorrelationZoneConfig;
prach_fd_occasion->prach_zero_corr_conf.tl.tag = NFAPI_NR_CONFIG_PRACH_ZERO_CORR_CONF_TAG;
cfg->num_tlv++;
cfg->prach_config.num_prach_fd_occasions_list[i].num_root_sequences.value = compute_nr_root_seq(scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup,nb_preambles, frame_type, frequency_range);
cfg->prach_config.num_prach_fd_occasions_list[i].num_root_sequences.tl.tag = NFAPI_NR_CONFIG_NUM_ROOT_SEQUENCES_TAG;
prach_fd_occasion->num_root_sequences.value = compute_nr_root_seq(rach_ConfigCommon,
nb_preambles,
frame_type,
frequency_range);
prach_fd_occasion->num_root_sequences.tl.tag = NFAPI_NR_CONFIG_NUM_ROOT_SEQUENCES_TAG;
cfg->num_tlv++;
cfg->prach_config.num_prach_fd_occasions_list[i].num_unused_root_sequences.value = 1;
prach_fd_occasion->num_unused_root_sequences.value = 1;
}
cfg->prach_config.ssb_per_rach.value = scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->ssb_perRACH_OccasionAndCB_PreamblesPerSSB->present-1;
cfg->prach_config.ssb_per_rach.value = rach_ConfigCommon->ssb_perRACH_OccasionAndCB_PreamblesPerSSB->present-1;
cfg->prach_config.ssb_per_rach.tl.tag = NFAPI_NR_CONFIG_SSB_PER_RACH_TAG;
cfg->num_tlv++;
// SSB Table Configuration
uint32_t absolute_diff = (*scc->downlinkConfigCommon->frequencyInfoDL->absoluteFrequencySSB - scc->downlinkConfigCommon->frequencyInfoDL->absoluteFrequencyPointA);
const int scaling_5khz = scc->downlinkConfigCommon->frequencyInfoDL->absoluteFrequencyPointA < 600000 ? 3 : 1;
uint32_t absolute_diff = (*frequencyInfoDL->absoluteFrequencySSB - frequencyInfoDL->absoluteFrequencyPointA);
const int scaling_5khz = frequencyInfoDL->absoluteFrequencyPointA < 600000 ? 3 : 1;
int sco = (absolute_diff/scaling_5khz) % 24;
if(frequency_range == FR2)
sco >>= 1; // this assumes 120kHz SCS for SSB and subCarrierSpacingCommon (only option supported by OAI for
@@ -428,7 +440,7 @@ void config_common(gNB_MAC_INST *nrmac, int pdsch_AntennaPorts, int pusch_Antenn
}
LOG_I(NR_MAC, "Setting TDD configuration period to %d\n", cfg->tdd_table.tdd_period.value);
int periods_per_frame = set_tdd_config_nr(cfg,
scc->uplinkConfigCommon->frequencyInfoUL->scs_SpecificCarrierList.list.array[0]->subcarrierSpacing,
frequencyInfoUL->scs_SpecificCarrierList.list.array[0]->subcarrierSpacing,
scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofDownlinkSlots,
scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofDownlinkSymbols,
scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSlots,
@@ -441,7 +453,6 @@ void config_common(gNB_MAC_INST *nrmac, int pdsch_AntennaPorts, int pusch_Antenn
nrmac->tdd_beam_association = (int16_t *)malloc16(periods_per_frame*sizeof(int16_t));
}
}
}
int nr_mac_enable_ue_rrc_processing_timer(module_id_t Mod_idP, rnti_t rnti, NR_SubcarrierSpacing_t subcarrierSpacing, uint32_t rrc_reconfiguration_delay) {
@@ -715,7 +715,7 @@ void nr_generate_Msg3_retransmission(module_id_t module_idP,
NR_PUSCH_TimeDomainResourceAllocationList_t *pusch_TimeDomainAllocationList = ul_bwp->tdaList_Common;
int mu = ul_bwp->scs;
uint8_t K2 = *pusch_TimeDomainAllocationList->list.array[ra->Msg3_tda_id]->k2;
const int sched_frame = frame + (slot + K2 >= nr_slots_per_frame[mu]);
const int sched_frame = (frame + (slot + K2 >= nr_slots_per_frame[mu])) % 1024;
const int sched_slot = (slot + K2) % nr_slots_per_frame[mu];
if (is_xlsch_in_slot(nr_mac->ulsch_slot_bitmap[sched_slot / 64], sched_slot)) {
@@ -108,10 +108,8 @@ int nr_write_ce_dlsch_pdu(module_id_t module_idP,
AssertFatal(timing_advance_cmd < 64, "timing_advance_cmd %d > 63\n", timing_advance_cmd);
((NR_MAC_CE_TA *) ce_ptr)->TA_COMMAND = timing_advance_cmd; //(timing_advance_cmd+31)&0x3f;
if (gNB->tag->tag_Id != 0) {
tag_id = gNB->tag->tag_Id;
((NR_MAC_CE_TA *) ce_ptr)->TAGID = tag_id;
}
tag_id = gNB->tag->tag_Id;
((NR_MAC_CE_TA *) ce_ptr)->TAGID = tag_id;
LOG_D(NR_MAC, "NR MAC CE timing advance command = %d (%d) TAG ID = %d\n", timing_advance_cmd, ((NR_MAC_CE_TA *) ce_ptr)->TA_COMMAND, tag_id);
mac_ce_size = sizeof(NR_MAC_CE_TA);
@@ -1191,7 +1189,7 @@ void nr_schedule_ue_spec(module_id_t module_id,
T_INT(frame), T_INT(slot), T_INT(current_harq_pid), T_INT(harq->round), T_BUFFER(harq->transportBlock, TBS));
UE->mac_stats.dl.total_rbs_retx += sched_pdsch->rbSize;
} else { /* initial transmission */
LOG_D(NR_MAC, "[%s] Initial HARQ transmission in %d.%d\n", __FUNCTION__, frame, slot);
LOG_D(NR_MAC, "Initial HARQ transmission in %d.%d\n", frame, slot);
uint8_t *buf = (uint8_t *) harq->transportBlock;
/* first, write all CEs that might be there */
int written = nr_write_ce_dlsch_pdu(module_id,
@@ -1662,7 +1662,8 @@ void pf_ul(module_id_t module_id,
}
const NR_bler_options_t *bo = &nrmac->ul_bler;
const int max_mcs = bo->max_mcs; /* no per-user maximum MCS yet */
const int max_mcs_table = (current_BWP->mcs_table == 0 || current_BWP->mcs_table == 2) ? 28 : 27;
const int max_mcs = min(bo->max_mcs, max_mcs_table); /* no per-user maximum MCS yet */
if (bo->harq_round_max == 1)
sched_pusch->mcs = max_mcs;
else
@@ -2102,7 +2103,7 @@ void nr_schedule_ulsch(module_id_t module_id, frame_t frame, sub_frame_t slot, n
sched_ctrl->last_ul_slot = sched_pusch->slot;
LOG_D(NR_MAC,
"ULSCH/PUSCH: %4d.%2d RNTI %04x UL sched %4d.%2d DCI L %d start %2d RBS %3d startSymbol %2d nb_symbol %2d dmrs_pos %x MCS %2d nrOfLayers %2d num_dmrs_cdm_grps_no_data %2d TBS %4d HARQ PID %2d round %d RV %d NDI %d est %6d sched %6d est BSR %6d TPC %d\n",
"ULSCH/PUSCH: %4d.%2d RNTI %04x UL sched %4d.%2d DCI L %d start %2d RBS %3d startSymbol %2d nb_symbol %2d dmrs_pos %x MCS Table %2d MCS %2d nrOfLayers %2d num_dmrs_cdm_grps_no_data %2d TBS %4d HARQ PID %2d round %d RV %d NDI %d est %6d sched %6d est BSR %6d TPC %d\n",
frame,
slot,
rnti,
@@ -2114,6 +2115,7 @@ void nr_schedule_ulsch(module_id_t module_id, frame_t frame, sub_frame_t slot, n
sched_pusch->tda_info.startSymbolIndex,
sched_pusch->tda_info.nrOfSymbols,
sched_pusch->dmrs_info.ul_dmrs_symb_pos,
current_BWP->mcs_table,
sched_pusch->mcs,
sched_pusch->nrOfLayers,
sched_pusch->dmrs_info.num_dmrs_cdm_grps_no_data,
+1 -1
View File
@@ -151,7 +151,7 @@ void nr_rlc_pdu_encoder_init(nr_rlc_pdu_encoder_t *encoder,
{
encoder->byte = 0;
encoder->bit = 0;
encoder->buffer = buffer;
encoder->buffer = (unsigned char *)buffer;
encoder->size = size;
}
+1 -1
View File
@@ -71,7 +71,7 @@ int nr_rlc_pdu_decoder_get_bits(nr_rlc_pdu_decoder_t *decoder, int count);
typedef struct {
int byte; /* next byte to encode */
int bit; /* next bit in next byte to encode */
char *buffer;
unsigned char *buffer;
int size;
} nr_rlc_pdu_encoder_t;
+13 -18
View File
@@ -443,9 +443,7 @@ static void copy_dl_tti_req_to_dl_info(nr_downlink_indication_t *dl_info, nfapi_
rx_ind->sfn = dl_tti_request->SFN;
rx_ind->slot = dl_tti_request->Slot;
fill_mib_in_rx_ind(pdu_list, rx_ind, 0, FAPI_NR_RX_PDU_TYPE_SSB);
NR_UL_TIME_ALIGNMENT_t ul_time_alignment;
memset(&ul_time_alignment, 0, sizeof(ul_time_alignment));
nr_ue_dl_indication(&mac->dl_info, &ul_time_alignment);
nr_ue_dl_indication(&mac->dl_info);
}
}
dl_info->slot = dl_tti_request->Slot;
@@ -729,15 +727,12 @@ void check_and_process_dci(nfapi_nr_dl_tti_request_t *dl_tti_request,
return;
}
NR_UL_TIME_ALIGNMENT_t ul_time_alignment;
memset(&ul_time_alignment, 0, sizeof(ul_time_alignment));
if (dl_tti_request || tx_data_request || ul_dci_request) {
fapi_nr_dl_config_request_t *dl_config = get_dl_config_request(mac, slot);
fill_dci_from_dl_config(&mac->dl_info, dl_config);
}
nr_ue_dl_scheduler(&mac->dl_info);
nr_ue_dl_indication(&mac->dl_info, &ul_time_alignment);
nr_ue_dl_indication(&mac->dl_info);
if (pthread_mutex_unlock(&mac->mutex_dl_info)) abort();
@@ -1085,7 +1080,8 @@ void handle_ssb_meas(NR_UE_MAC_INST_t *mac, uint8_t ssb_index, int16_t rsrp_dbm)
// L2 Abstraction Layer
// Note: sdu should always be processed because data and timing advance updates are transmitted by the UE
int8_t handle_dlsch(nr_downlink_indication_t *dl_info, NR_UL_TIME_ALIGNMENT_t *ul_time_alignment, int pdu_id){
int8_t handle_dlsch(nr_downlink_indication_t *dl_info, int pdu_id)
{
/* L1 assigns harq_pid, but in emulated L1 mode we need to assign
the harq_pid based on the saved global g_harq_pid. Because we are
emulating L1, no antenna measurements are conducted to calculate
@@ -1097,7 +1093,7 @@ int8_t handle_dlsch(nr_downlink_indication_t *dl_info, NR_UL_TIME_ALIGNMENT_t *u
dl_info->rx_ind->rx_indication_body[pdu_id].pdsch_pdu.harq_pid,
dl_info->rx_ind->rx_indication_body[pdu_id].pdsch_pdu.ack_nack);
if(dl_info->rx_ind->rx_indication_body[pdu_id].pdsch_pdu.ack_nack)
nr_ue_send_sdu(dl_info, ul_time_alignment, pdu_id);
nr_ue_send_sdu(dl_info, pdu_id);
return 0;
}
@@ -1142,8 +1138,8 @@ int nr_ue_ul_indication(nr_uplink_indication_t *ul_info)
return 0;
}
int nr_ue_dl_indication(nr_downlink_indication_t *dl_info, NR_UL_TIME_ALIGNMENT_t *ul_time_alignment){
int nr_ue_dl_indication(nr_downlink_indication_t *dl_info)
{
pthread_mutex_lock(&mac_IF_mutex);
uint32_t ret_mask = 0x0;
module_id_t module_id = dl_info->module_id;
@@ -1193,13 +1189,12 @@ int nr_ue_dl_indication(nr_downlink_indication_t *dl_info, NR_UL_TIME_ALIGNMENT_
if (dl_info->rx_ind != NULL) {
for (int i=0; i<dl_info->rx_ind->number_pdus; ++i) {
for (int i = 0; i < dl_info->rx_ind->number_pdus; ++i) {
fapi_nr_rx_indication_body_t rx_indication_body = dl_info->rx_ind->rx_indication_body[i];
LOG_D(NR_MAC, "In %s sending DL indication to MAC. 1 PDU type %d of %d total number of PDUs \n",
__FUNCTION__,
rx_indication_body.pdu_type,
dl_info->rx_ind->number_pdus);
LOG_D(NR_MAC, "Sending DL indication to MAC. 1 PDU type %d of %d total number of PDUs \n",
rx_indication_body.pdu_type,
dl_info->rx_ind->number_pdus);
switch(rx_indication_body.pdu_type){
case FAPI_NR_RX_PDU_TYPE_SSB:
@@ -1226,10 +1221,10 @@ int nr_ue_dl_indication(nr_downlink_indication_t *dl_info, NR_UL_TIME_ALIGNMENT_
rx_indication_body.pdsch_pdu.pdu_length)) << FAPI_NR_RX_PDU_TYPE_SIB;
break;
case FAPI_NR_RX_PDU_TYPE_DLSCH:
ret_mask |= (handle_dlsch(dl_info, ul_time_alignment, i)) << FAPI_NR_RX_PDU_TYPE_DLSCH;
ret_mask |= (handle_dlsch(dl_info, i)) << FAPI_NR_RX_PDU_TYPE_DLSCH;
break;
case FAPI_NR_RX_PDU_TYPE_RAR:
ret_mask |= (handle_dlsch(dl_info, ul_time_alignment, i)) << FAPI_NR_RX_PDU_TYPE_RAR;
ret_mask |= (handle_dlsch(dl_info, i)) << FAPI_NR_RX_PDU_TYPE_RAR;
break;
case FAPI_NR_CSIRS_IND:
ret_mask |= (handle_csirs_measurements(dl_info->module_id,
+2 -2
View File
@@ -195,7 +195,7 @@ typedef void (nr_ue_synch_request_f)(nr_synch_request_t *synch_request);
* -1: Failed to consume bytes. Abort the mission.
* Non-negative return values indicate success, and ignored.
*/
typedef int (nr_ue_dl_indication_f)(nr_downlink_indication_t *dl_info, NR_UL_TIME_ALIGNMENT_t *ul_time_alignment);
typedef int (nr_ue_dl_indication_f)(nr_downlink_indication_t *dl_info);
/*
* Generic type of an application-defined callback to return various
@@ -256,7 +256,7 @@ int nr_ue_if_module_kill(uint32_t module_id);
/**\brief interface between L1/L2, indicating the downlink related information, like dci_ind and rx_req
\param dl_info including dci_ind and rx_request messages*/
int nr_ue_dl_indication(nr_downlink_indication_t *dl_info, NR_UL_TIME_ALIGNMENT_t *ul_time_alignment);
int nr_ue_dl_indication(nr_downlink_indication_t *dl_info);
int nr_ue_ul_indication(nr_uplink_indication_t *ul_info);
+1 -1
View File
@@ -489,7 +489,7 @@ void fill_mastercellGroupConfig(NR_CellGroupConfig_t *cellGroupConfig, NR_CellGr
// DRB Configuration
for (int i = bearer_id_start; i < bearer_id_start + nb_bearers_to_setup; i++ ){
const NR_RLC_Config_PR rlc_conf = use_rlc_um_for_drb ? NR_RLC_Config_PR_um_Bi_Directional : NR_RLC_Config_PR_am;
NR_RLC_BearerConfig_t *rlc_BearerConfig = get_DRB_RLC_BearerConfig(3 + i, i, rlc_conf, priority[0]); // Fixme: priority hardcoded see caller function, all is wrong
NR_RLC_BearerConfig_t *rlc_BearerConfig = get_DRB_RLC_BearerConfig(3 + i, i, rlc_conf, priority[i - 1]);
asn1cSeqAdd(&cellGroupConfig->rlc_BearerToAddModList->list, rlc_BearerConfig);
asn1cSeqAdd(&ue_context_mastercellGroup->rlc_BearerToAddModList->list, rlc_BearerConfig);
}
+65 -10
View File
@@ -619,7 +619,8 @@ void prepare_sim_uecap(NR_UE_NR_Capability_t *cap,
NR_ServingCellConfigCommon_t *scc,
int numerology,
int rbsize,
int mcs_table) {
int mcs_table_dl,
int mcs_table_ul) {
NR_Phy_Parameters_t *phy_Parameters = &cap->phy_Parameters;
int band = *scc->downlinkConfigCommon->frequencyInfoDL->frequencyBandList.list.array[0];
@@ -627,10 +628,15 @@ void prepare_sim_uecap(NR_UE_NR_Capability_t *cap,
nr_bandnr->bandNR = band;
asn1cSeqAdd(&cap->rf_Parameters.supportedBandListNR.list,
nr_bandnr);
if (mcs_table == 1) {
NR_BandNR_t *bandNRinfo = cap->rf_Parameters.supportedBandListNR.list.array[0];
if (mcs_table_ul == 1) {
bandNRinfo->pusch_256QAM = CALLOC(1,sizeof(*bandNRinfo->pusch_256QAM));
*bandNRinfo->pusch_256QAM = NR_BandNR__pusch_256QAM_supported;
}
if (mcs_table_dl == 1) {
int bw = get_supported_band_index(numerology, band, rbsize);
if (band>256) {
NR_BandNR_t *bandNRinfo = cap->rf_Parameters.supportedBandListNR.list.array[0];
bandNRinfo->pdsch_256QAM_FR2 = CALLOC(1,sizeof(*bandNRinfo->pdsch_256QAM_FR2));
*bandNRinfo->pdsch_256QAM_FR2 = NR_BandNR__pdsch_256QAM_FR2_supported;
}
@@ -949,11 +955,54 @@ static void scheduling_request_config(const NR_ServingCellConfigCommon_t *scc, N
asn1cSeqAdd(&pucch_Config->schedulingRequestResourceToAddModList->list,schedulingRequestResourceConfig);
}
static void set_ul_mcs_table(const NR_UE_NR_Capability_t *cap,
const NR_ServingCellConfigCommon_t *scc,
NR_PUSCH_Config_t *pusch_Config)
{
if (cap == NULL){
pusch_Config->mcs_Table = NULL;
return;
}
int band;
if (scc->uplinkConfigCommon->frequencyInfoUL->frequencyBandList)
band = *scc->uplinkConfigCommon->frequencyInfoUL->frequencyBandList->list.array[0];
else
band = *scc->downlinkConfigCommon->frequencyInfoDL->frequencyBandList.list.array[0];
bool supported = false;
for (int i=0;i<cap->rf_Parameters.supportedBandListNR.list.count;i++) {
NR_BandNR_t *bandNRinfo = cap->rf_Parameters.supportedBandListNR.list.array[i];
if(bandNRinfo->bandNR == band && bandNRinfo->pusch_256QAM) {
supported = true;
break;
}
}
if (supported) {
if(pusch_Config->transformPrecoder == NULL ||
*pusch_Config->transformPrecoder == NR_PUSCH_Config__transformPrecoder_disabled) {
if(pusch_Config->mcs_Table == NULL)
pusch_Config->mcs_Table = calloc(1, sizeof(*pusch_Config->mcs_Table));
*pusch_Config->mcs_Table = NR_PUSCH_Config__mcs_Table_qam256;
}
else {
if(pusch_Config->mcs_TableTransformPrecoder == NULL)
pusch_Config->mcs_TableTransformPrecoder = calloc(1, sizeof(*pusch_Config->mcs_TableTransformPrecoder));
*pusch_Config->mcs_TableTransformPrecoder = NR_PUSCH_Config__mcs_TableTransformPrecoder_qam256;
}
}
else {
pusch_Config->mcs_Table = NULL;
pusch_Config->mcs_TableTransformPrecoder = NULL;
}
}
static void set_dl_mcs_table(int scs,
const NR_UE_NR_Capability_t *cap,
NR_BWP_DownlinkDedicated_t *bwp_Dedicated,
const NR_ServingCellConfigCommon_t *scc)
{
if (cap == NULL){
bwp_Dedicated->pdsch_Config->choice.setup->mcs_Table = NULL;
return;
@@ -992,7 +1041,9 @@ static void set_dl_mcs_table(int scs,
bwp_Dedicated->pdsch_Config->choice.setup->mcs_Table = NULL;
}
static struct NR_SetupRelease_PUSCH_Config *config_pusch(NR_PUSCH_Config_t *pusch_Config)
static struct NR_SetupRelease_PUSCH_Config *config_pusch(NR_PUSCH_Config_t *pusch_Config,
const NR_ServingCellConfigCommon_t *scc,
const NR_UE_NR_Capability_t *uecap)
{
struct NR_SetupRelease_PUSCH_Config *setup_puschconfig = calloc(1, sizeof(*setup_puschconfig));
setup_puschconfig->present = NR_SetupRelease_PUSCH_Config_PR_setup;
@@ -1057,8 +1108,7 @@ static struct NR_SetupRelease_PUSCH_Config *config_pusch(NR_PUSCH_Config_t *pusc
pusch_Config->resourceAllocation = NR_PUSCH_Config__resourceAllocation_resourceAllocationType1;
pusch_Config->pusch_TimeDomainAllocationList = NULL;
pusch_Config->pusch_AggregationFactor = NULL;
pusch_Config->mcs_Table = NULL;
pusch_Config->mcs_TableTransformPrecoder = NULL;
set_ul_mcs_table(uecap, scc, pusch_Config);
pusch_Config->transformPrecoder = NULL;
if (!pusch_Config->codebookSubset)
pusch_Config->codebookSubset = calloc(1, sizeof(*pusch_Config->codebookSubset));
@@ -1261,7 +1311,7 @@ static void config_uplinkBWP(NR_BWP_Uplink_t *ubwp,
bwp_loop < servingcellconfigdedicated->uplinkConfig->uplinkBWP_ToAddModList->list.count) {
pusch_Config = servingcellconfigdedicated->uplinkConfig->uplinkBWP_ToAddModList->list.array[bwp_loop]->bwp_Dedicated->pusch_Config->choice.setup;
}
ubwp->bwp_Dedicated->pusch_Config = config_pusch(pusch_Config);
ubwp->bwp_Dedicated->pusch_Config = config_pusch(pusch_Config, scc, configuration->force_256qam_off ? NULL : uecap);
long maxMIMO_Layers = servingcellconfigdedicated &&
servingcellconfigdedicated->uplinkConfig
@@ -2057,7 +2107,7 @@ static NR_SpCellConfig_t *get_initial_SpCellConfig(int uid,
config_pucch_resset1(pucch_Config, NULL);
set_pucch_power_config(pucch_Config, configuration->do_CSIRS);
initialUplinkBWP->pusch_Config = config_pusch(NULL);
initialUplinkBWP->pusch_Config = config_pusch(NULL, scc, NULL);
long maxMIMO_Layers = uplinkConfig && uplinkConfig->pusch_ServingCellConfig
&& uplinkConfig->pusch_ServingCellConfig->choice.setup->ext1
@@ -2385,6 +2435,10 @@ void update_cellGroupConfig(NR_CellGroupConfig_t *cellGroupConfig,
configuration->force_256qam_off ? NULL : uecap,
bwp_Dedicated,
scc);
NR_BWP_UplinkDedicated_t *ul_bwp_Dedicated = SpCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP;
set_ul_mcs_table(configuration->force_256qam_off ? NULL : uecap, scc, ul_bwp_Dedicated->pusch_Config->choice.setup);
struct NR_ServingCellConfig__downlinkBWP_ToAddModList *DL_BWP_list =
SpCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList;
struct NR_UplinkConfig__uplinkBWP_ToAddModList *UL_BWP_list = uplinkConfig->uplinkBWP_ToAddModList;
@@ -2395,12 +2449,13 @@ void update_cellGroupConfig(NR_CellGroupConfig_t *cellGroupConfig,
set_dl_mcs_table(scs, configuration->force_256qam_off ? NULL : uecap, bwp->bwp_Dedicated, scc);
}
}
if (configuration->do_SRS && UL_BWP_list) {
if (UL_BWP_list) {
for (int i = 0; i < UL_BWP_list->list.count; i++) {
NR_BWP_Uplink_t *ul_bwp = UL_BWP_list->list.array[i];
int bwp_size = NRRIV2BW(ul_bwp->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
if (ul_bwp->bwp_Dedicated->pusch_Config) {
NR_PUSCH_Config_t *pusch_Config = ul_bwp->bwp_Dedicated->pusch_Config->choice.setup;
set_ul_mcs_table(configuration->force_256qam_off ? NULL : uecap, scc, pusch_Config);
if (pusch_Config->maxRank == NULL) {
pusch_Config->maxRank = calloc(1, sizeof(*pusch_Config->maxRank));
}
@@ -2609,7 +2664,7 @@ NR_CellGroupConfig_t *get_default_secondaryCellGroup(const NR_ServingCellConfigC
pusch_Config =
servingcellconfigdedicated->uplinkConfig->uplinkBWP_ToAddModList->list.array[0]->bwp_Dedicated->pusch_Config->choice.setup;
}
initialUplinkBWP->pusch_Config = config_pusch(pusch_Config);
initialUplinkBWP->pusch_Config = config_pusch(pusch_Config, servingcellconfigcommon, uecap);
long maxMIMO_Layers =
servingcellconfigdedicated->uplinkConfig && servingcellconfigdedicated->uplinkConfig->pusch_ServingCellConfig
+2 -3
View File
@@ -44,8 +44,8 @@ void prepare_sim_uecap(NR_UE_NR_Capability_t *cap,
NR_ServingCellConfigCommon_t *scc,
int numerology,
int rbsize,
int mcs_table);
int mcs_table_dl,
int mcs_table_ul);
NR_BCCH_BCH_Message_t *get_new_MIB_NR(const NR_ServingCellConfigCommon_t *scc);
void free_MIB_NR(NR_BCCH_BCH_Message_t *mib);
@@ -80,5 +80,4 @@ NR_CellGroupConfig_t *get_default_secondaryCellGroup(const NR_ServingCellConfigC
const gNB_RrcConfigurationReq *configuration,
int uid);
#endif
+1 -1
View File
@@ -121,7 +121,7 @@ void nr_rrc_trigger(protocol_ctxt_t *ctxt, int CC_id, int frame, int subframe);
\ *ptrsMcs Pointer to L_ptrs MCS related parameters
\ *epre_Ratio Pointer to ep_ratio
\ *reOffset Pointer to RE Offset Value */
void rrc_config_dl_ptrs_params(NR_BWP_Downlink_t *bwp, int *ptrsNrb, int *ptrsMcs, int *epre_Ratio, int * reOffset);
void rrc_config_dl_ptrs_params(NR_BWP_Downlink_t *bwp, long *ptrsNrb, long *ptrsMcs, long *epre_Ratio, long *reOffset);
void nr_rrc_mac_remove_ue(rnti_t rntiP);
void nr_rrc_mac_update_cellgroup(rnti_t rntiMaybeUEid, NR_CellGroupConfig_t *cgc);
+2 -1
View File
@@ -664,7 +664,7 @@ rrc_gNB_generate_dedicatedRRCReconfiguration(
//-----------------------------------------------------------------------------
{
gNB_RRC_INST *rrc = RC.nrrrc[ctxt_pP->module_id];
long drb_priority[1] = {13}; // For now, we assume only one drb per pdu sessions with a default preiority (will be dynamique in future)
long drb_priority[NGAP_MAX_DRBS_PER_UE];
NR_CellGroupConfig_t *cellGroupConfig = NULL;
int xid = -1;
@@ -696,6 +696,7 @@ rrc_gNB_generate_dedicatedRRCReconfiguration(
}
xid = ue_p->pduSession[j].xid;
drb_priority[DRB_config->drb_Identity - 1] = 13; // For now, we assume only one drb per pdu sessions with a default preiority (will be dynamique in future)
}
/* If list is empty free the list and reset the address */
+21 -18
View File
@@ -77,36 +77,39 @@ void fill_default_reconfig(NR_ServingCellConfigCommon_t *servingcellconfigcommon
}
/* Function to set or overwrite PTRS DL RRC parameters */
void rrc_config_dl_ptrs_params(NR_BWP_Downlink_t *bwp, int *ptrsNrb, int *ptrsMcs, int *epre_Ratio, int * reOffset)
void rrc_config_dl_ptrs_params(NR_BWP_Downlink_t *bwp, long *ptrsNrb, long *ptrsMcs, long *epre_Ratio, long *reOffset)
{
int i=0;
NR_DMRS_DownlinkConfig_t *tmp = bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup;
// struct NR_SetupRelease_PTRS_DownlinkConfig *tmp=bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->phaseTrackingRS;
/* check for memory allocation */
if(bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->phaseTrackingRS == NULL) {
bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->phaseTrackingRS=calloc(1,sizeof(*bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->phaseTrackingRS));
bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->phaseTrackingRS->present = NR_SetupRelease_PTRS_DownlinkConfig_PR_setup;
bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->phaseTrackingRS->choice.setup= calloc(1, sizeof(*bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->phaseTrackingRS->choice.setup));
bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->phaseTrackingRS->choice.setup->frequencyDensity = calloc(1,sizeof(*bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->phaseTrackingRS->choice.setup->frequencyDensity));
bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->phaseTrackingRS->choice.setup->timeDensity = calloc(1, sizeof(*bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->phaseTrackingRS->choice.setup->timeDensity));
bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->phaseTrackingRS->choice.setup->epre_Ratio = calloc(1,sizeof(long));
bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->phaseTrackingRS->choice.setup->resourceElementOffset = calloc(1,sizeof(long));
if (tmp->phaseTrackingRS == NULL) {
asn1cCalloc(tmp->phaseTrackingRS, TrackingRS);
TrackingRS->present = NR_SetupRelease_PTRS_DownlinkConfig_PR_setup;
asn1cCalloc(TrackingRS->choice.setup, setup);
asn1cCalloc(setup->frequencyDensity, freqD);
/* Fill the given values */
for(i = 0; i < 2; i++) {
asn1cSeqAdd(&bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->phaseTrackingRS->choice.setup->frequencyDensity->list,&ptrsNrb[i]);
asn1cSequenceAdd(freqD->list, long, nbr);
*nbr = ptrsNrb[i];
}
asn1cCalloc(setup->timeDensity, timeD);
for(i = 0; i < 3; i++) {
asn1cSeqAdd(&bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->phaseTrackingRS->choice.setup->timeDensity->list,&ptrsMcs[i]);
asn1cSequenceAdd(timeD->list, long, mcs);
*mcs = ptrsMcs[i];
}
}// if memory exist then over write the old values
else {
asn1cCallocOne(setup->epre_Ratio, epre_Ratio[0]);
asn1cCallocOne(setup->resourceElementOffset, reOffset[0]);
} else {
NR_PTRS_DownlinkConfig_t *TrackingRS = tmp->phaseTrackingRS->choice.setup;
for(i = 0; i < 2; i++) {
*bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->phaseTrackingRS->choice.setup->frequencyDensity->list.array[i] = ptrsNrb[i];
*TrackingRS->frequencyDensity->list.array[i] = ptrsNrb[i];
}
for(i = 0; i < 3; i++) {
*bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->phaseTrackingRS->choice.setup->timeDensity->list.array[i] = ptrsMcs[i];
*TrackingRS->timeDensity->list.array[i] = ptrsMcs[i];
}
*TrackingRS->epre_Ratio = epre_Ratio[0];
*TrackingRS->resourceElementOffset = reOffset[0];
}
*bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->phaseTrackingRS->choice.setup->epre_Ratio = *epre_Ratio;
*bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->phaseTrackingRS->choice.setup->resourceElementOffset = *reOffset;
}
#endif
@@ -55,9 +55,11 @@ int encode_fgs_payload_container(FGSPayloadContainer *paycontainer, uint8_t iei,
encoded += encode_result;
}
if(iei > 0){
*(uint16_t*) (buffer+1) = htons(encoded - 3);
uint16_t tmp = htons(encoded - 3);
memcpy(buffer + 1, &tmp, sizeof(tmp));
} else {
*(uint16_t*) (buffer) = htons(encoded - 2);
uint16_t tmp = htons(encoded - 2);
memcpy(buffer, &tmp, sizeof(tmp));
}
return encoded;
@@ -35,14 +35,18 @@ void capture_pdu_session_establishment_accept_msg(uint8_t *buffer, uint32_t msg_
pdu_session_establishment_accept_msg_t psea_msg;
sec_nas_hdr.epd = *(buffer + (offset++));
sec_nas_hdr.sht = *(buffer + (offset++));
sec_nas_hdr.mac = htonl(*(uint32_t *)(buffer + offset));
uint32_t tmp;
memcpy(&tmp, buffer + offset, sizeof(tmp));
sec_nas_hdr.mac = htonl(tmp);
offset+=sizeof(sec_nas_hdr.mac);
sec_nas_hdr.sqn = *(buffer + (offset++));
sec_nas_msg.epd = *(buffer + (offset++));
sec_nas_msg.sht = *(buffer + (offset++));
sec_nas_msg.msg_type = *(buffer + (offset++));
sec_nas_msg.payload_type = *(buffer + (offset++));
sec_nas_msg.payload_len = htons(*(uint16_t *)(buffer + offset));
uint16_t tmp16;
memcpy(&tmp16, buffer + offset, sizeof(tmp16));
sec_nas_msg.payload_len = htons(tmp16);
offset+=sizeof(sec_nas_msg.payload_len);
/* Mandatory Presence IEs */
psea_msg.epd = *(buffer + (offset++));
@@ -51,12 +55,14 @@ void capture_pdu_session_establishment_accept_msg(uint8_t *buffer, uint32_t msg_
psea_msg.msg_type = *(buffer + (offset++));
psea_msg.pdu_type = *(buffer + offset) & 0x0f;
psea_msg.ssc_mode = (*(buffer + (offset++)) & 0xf0) >> 4;
psea_msg.qos_rules.length = htons(*(uint16_t *)(buffer + offset));
memcpy(&tmp16, buffer + offset, sizeof(tmp16));
psea_msg.qos_rules.length = htons(tmp16);
offset+=sizeof(psea_msg.qos_rules.length);
/* Supports the capture of only one QoS Rule, it should be changed for multiple QoS Rules */
qos_rule_t qos_rule;
qos_rule.id = *(buffer + (offset++));
qos_rule.length = htons(*(uint16_t *)(buffer + offset));
memcpy(&tmp16, buffer + offset, sizeof(tmp16));
qos_rule.length = htons(tmp16);
offset+=sizeof(qos_rule.length);
qos_rule.oc = (*(buffer + offset) & 0xE0) >> 5;
qos_rule.dqr = (*(buffer + offset) & 0x10) >> 4;
@@ -76,7 +76,8 @@ int encode_fgc_nas_message_container(FGCNasMessageContainer *nasmessagecontainer
if ((encode_result = encode_octet_string(&nasmessagecontainer->nasmessagecontainercontents, buffer + encoded, len - encoded)) < 0) {
return encode_result;
} else {
*(uint16_t*) (buffer+1) = htons(encoded + encode_result - 3);
uint16_t tmp = htons(encoded + encode_result - 3);
memcpy(buffer + 1, &tmp, sizeof(tmp));
encoded += encode_result;
}
+7 -4
View File
@@ -53,8 +53,9 @@ int decode_5gs_mobile_identity(FGSMobileIdentity *fgsmobileidentity, uint8_t iei
CHECK_IEI_DECODER(iei, *buffer);
decoded++;
}
ielen = *(uint16_t*)(buffer + decoded); /* length is two bytes */
uint16_t tmp;
memcpy(&tmp, buffer + decoded, sizeof(tmp));
ielen = (uint8_t)tmp;
decoded += 2;
CHECK_LENGTH_DECODER(len - decoded, ielen);
@@ -106,9 +107,11 @@ int encode_5gs_mobile_identity(FGSMobileIdentity *fgsmobileidentity, uint8_t iei
}
if(iei > 0){
*(uint16_t*) (buffer+1) = htons(encoded + encoded_rc - 3);
uint16_t tmp = htons(encoded + encoded_rc - 3);
memcpy(buffer + 1, &tmp, sizeof(tmp));
} else {
*(uint16_t*) buffer = htons(encoded + encoded_rc - 2);
uint16_t tmp = htons(encoded + encoded_rc - 2);
memcpy(buffer, &tmp, sizeof(tmp));
}
return (encoded + encoded_rc);
+7 -3
View File
@@ -41,9 +41,13 @@
vALUE = ntohl(*(uint32_t*)(bUFFER)) >> 8; \
sIZE += sizeof(uint8_t) + sizeof(uint16_t)
#define DECODE_U32(bUFFER, vALUE, sIZE) \
vALUE = ntohl(*(uint32_t*)(bUFFER)); \
sIZE += sizeof(uint32_t)
#define DECODE_U32(bUFFER, vALUE, sIZE) \
{ \
uint32_t v; \
memcpy(&v, bUFFER, sizeof(v)); \
vALUE = ntohl(v); \
} \
sIZE += sizeof(uint32_t)
#if (BYTE_ORDER == LITTLE_ENDIAN)
# define DECODE_LENGTH_U16(bUFFER, vALUE, sIZE) \
+6 -3
View File
@@ -36,9 +36,12 @@
*(uint32_t*)(buffer) = htonl(value); \
size += sizeof(uint8_t) + sizeof(uint16_t)
#define ENCODE_U32(buffer, value, size) \
*(uint32_t*)(buffer) = htonl(value); \
size += sizeof(uint32_t)
#define ENCODE_U32(buffer, value, size) \
{ \
uint32_t tmp = htonl(value); \
memcpy(buffer, &tmp, sizeof(tmp)); \
} \
size += sizeof(uint32_t)
#define IES_ENCODE_U8(buffer, encoded, value) \
ENCODE_U8(buffer + encoded, value, encoded)
+3 -1
View File
@@ -883,7 +883,9 @@ uint8_t get_msg_type(uint8_t *pdu_buffer, uint32_t length) {
msg_type = ((mm_msg_header_t *)(pdu_buffer + offset))->message_type;
if (msg_type == FGS_DOWNLINK_NAS_TRANSPORT) {
msg_type = ((dl_nas_transport_t *)(pdu_buffer+ offset))->sm_nas_msg_header.message_type;
dl_nas_transport_t tmp;
memcpy(&tmp, pdu_buffer + offset, sizeof(tmp));
msg_type = tmp.sm_nas_msg_header.message_type;
}
}
} else { // plain 5GS NAS message
+39
View File
@@ -0,0 +1,39 @@
#/*
# * Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
# * contributor license agreements. See the NOTICE file distributed with
# * this work for additional information regarding copyright ownership.
# * The OpenAirInterface Software Alliance licenses this file to You under
# * the OAI Public License, Version 1.1 (the "License"); you may not use this file
# * except in compliance with the License.
# * You may obtain a copy of the License at
# *
# * http://www.openairinterface.org/?page_id=698
# *
# * Unless required by applicable law or agreed to in writing, software
# * distributed under the License is distributed on an "AS IS" BASIS,
# * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
# * See the License for the specific language governing permissions and
# * limitations under the License.
# *-------------------------------------------------------------------------------
# * For more information about the OpenAirInterface (OAI) Software Alliance:
# * contact@openairinterface.org
# */
#---------------------------------------------------------------------
kind: BuildConfig
apiVersion: build.openshift.io/v1
metadata:
name: "oai-clang"
spec:
runPolicy: "Serial"
nodeSelector:
kubernetes.io/hostname: theseus
source:
type: "Binary"
strategy:
dockerStrategy:
dockerfilePath: "docker/Dockerfile.clang.rhel8.2"
output:
to:
kind: "ImageStreamTag"
name: "oai-clang:latest"
+30
View File
@@ -0,0 +1,30 @@
#/*
# * Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
# * contributor license agreements. See the NOTICE file distributed with
# * this work for additional information regarding copyright ownership.
# * The OpenAirInterface Software Alliance licenses this file to You under
# * the OAI Public License, Version 1.1 (the "License"); you may not use this file
# * except in compliance with the License.
# * You may obtain a copy of the License at
# *
# * http://www.openairinterface.org/?page_id=698
# *
# * Unless required by applicable law or agreed to in writing, software
# * distributed under the License is distributed on an "AS IS" BASIS,
# * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
# * See the License for the specific language governing permissions and
# * limitations under the License.
# *-------------------------------------------------------------------------------
# * For more information about the OpenAirInterface (OAI) Software Alliance:
# * contact@openairinterface.org
# */
#---------------------------------------------------------------------
#
apiVersion: image.openshift.io/v1
kind: ImageStream
metadata:
name: oai-clang
namespace: oaicicd-ran
spec:
lookupPolicy:
local: true