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Merge branch 'integration_2025_w10' into 'develop'

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Integration: `2025.w10`

See merge request oai/openairinterface5g!3299

* !3265 Remove some unnecessary extern files
* !3288 FeedbackDisabled removed from RA
* !3294 Fix OAI UE uplink_frequency in FDD mode
* !3282 Use common function to prepare DL PDUs in gNB RA
* !3290 Fix get_nr_prach_info_from_index() for FDD and long format
* !3244 Add F1 handover CI test
* !3292 Ensure clean exit of NR UE
* !3298 Preventing segmentation fault in print_rrc_meas (if reviewed and CI is OK)
* !3297 Reset timing_advance on sync/re-sync
* !3289 use slot type for slots in NR
This commit is contained in:
Jaroslava Fiedlerova
2025-03-12 07:41:54 +00:00
parent 0515cf98b3 20accaaceb
commit 60b0c1827d
53 changed files with 1387 additions and 1755 deletions
Download Patch File Download Diff File Expand all files Collapse all files
CMakeLists.txt
+1 -1
View File
@@ -1250,7 +1250,7 @@ set (MAC_NR_SRC_UE
${NR_UE_PHY_INTERFACE_DIR}/NR_Packet_Drop.c
${NR_UE_MAC_DIR}/config_ue.c
${NR_UE_MAC_DIR}/config_ue_sl.c
${NR_UE_MAC_DIR}/mac_vars.c
${NR_UE_MAC_DIR}/mac_tables.c
${NR_UE_MAC_DIR}/main_ue_nr.c
${NR_UE_MAC_DIR}/nr_ue_procedures.c
${NR_UE_MAC_DIR}/nr_ue_procedures_sl.c
ci-scripts/xml_files/container_5g_f1_rfsim.xml
+38 -2
View File
@@ -45,6 +45,10 @@
040023
020022
040024
000024
040025
000031
030021
100021
222222
</TestCaseRequestedList>
@@ -73,9 +77,9 @@
<testCase id="000022">
<class>Deploy_Object</class>
<desc>Deploy OAI 5G CU+DU+UE RF sim SA</desc>
<desc>Deploy OAI 5G CU + DU-PCI0 + UE RF sim SA</desc>
<yaml_path>ci-scripts/yaml_files/5g_f1_rfsimulator</yaml_path>
<services>oai-cu oai-du oai-nr-ue</services>
<services>oai-cu oai-du-pci0 oai-nr-ue</services>
<eNB_instance>0</eNB_instance>
<eNB_serverId>0</eNB_serverId>
</testCase>
@@ -86,6 +90,12 @@
<idle_sleep_time_in_sec>5</idle_sleep_time_in_sec>
</testCase>
<testCase id="000031">
<class>IdleSleep</class>
<desc>Sleep</desc>
<idle_sleep_time_in_sec>2</idle_sleep_time_in_sec>
</testCase>
<testCase id="000023">
<class>Attach_UE</class>
<desc>Attach OAI UE (Wait for IP)</desc>
@@ -93,6 +103,15 @@
<nodes>cacofonix</nodes>
</testCase>
<testCase id="000024">
<class>Deploy_Object</class>
<desc>Deploy OAI 5G (target) DU-PCI1 RF sim SA</desc>
<yaml_path>ci-scripts/yaml_files/5g_f1_rfsimulator</yaml_path>
<services>oai-du-pci1</services>
<eNB_instance>0</eNB_instance>
<eNB_serverId>0</eNB_serverId>
</testCase>
<testCase id="020021">
<class>Ping</class>
<desc>Ping ext-dn from all NR-UEs</desc>
@@ -151,6 +170,15 @@
<ping_packetloss_threshold>80</ping_packetloss_threshold>
</testCase>
<testCase id="020023">
<class>Ping</class>
<desc>Ping ext-dn from all NR-UEs</desc>
<id>rfsim5g_ue</id>
<nodes>cacofonix</nodes>
<ping_args> -c 5 192.168.72.135 -i0.5 -w25</ping_args>
<ping_packetloss_threshold>80</ping_packetloss_threshold>
</testCase>
<testCase id="040002">
<class>Custom_Command</class>
<desc>Verify Reestablishment</desc>
@@ -191,6 +219,14 @@
<command_fail>yes</command_fail>
</testCase>
<testCase id="040025">
<class>Custom_Command</class>
<desc>Trigger Handover</desc>
<node>cacofonix</node>
<command>echo ci trigger_f1_ho | nc 192.168.71.150 9090</command>
<command_fail>yes</command_fail>
</testCase>
<testCase id="100021">
<class>Undeploy_Object</class>
<always_exec>true</always_exec>
ci-scripts/yaml_files/5g_f1_rfsimulator/docker-compose.yaml
+39 -5
View File
@@ -90,6 +90,7 @@ services:
environment:
USE_ADDITIONAL_OPTIONS: --log_config.global_log_options level,nocolor,time
--rfsimulator.options chanmod
--gNBs.[0].remote_s_address 0.0.0.0
--telnetsrv --telnetsrv.listenaddr 192.168.71.150
--telnetsrv.shrmod ci
ASAN_OPTIONS: detect_leaks=0:detect_odr_violation=0
@@ -106,9 +107,9 @@ services:
timeout: 5s
retries: 5
oai-du:
oai-du-pci0:
image: ${REGISTRY:-oaisoftwarealliance}/${GNB_IMG:-oai-gnb}:${TAG:-develop}
container_name: rfsim5g-oai-du
container_name: rfsim5g-oai-du-pci0
cap_drop:
- ALL
environment:
@@ -117,9 +118,11 @@ services:
--rfsimulator.options chanmod
--telnetsrv --telnetsrv.listenaddr 192.168.71.171
--telnetsrv.shrmod ci
--rfsimulator.serveraddr 192.168.71.181
ASAN_OPTIONS: detect_leaks=0:detect_odr_violation=0
depends_on:
- oai-cu
- oai-nr-ue
networks:
public_net:
ipv4_address: 192.168.71.171
@@ -131,6 +134,37 @@ services:
timeout: 5s
retries: 5
oai-du-pci1:
image: ${REGISTRY:-oaisoftwarealliance}/${GNB_IMG:-oai-gnb}:${TAG:-develop}
container_name: rfsim5g-oai-du-pci1
cap_drop:
- ALL
environment:
USE_ADDITIONAL_OPTIONS: --rfsim
--log_config.global_log_options level,nocolor,time
--gNBs.[0].gNB_DU_ID 3585
--gNBs.[0].nr_cellid 11111111
--gNBs.[0].servingCellConfigCommon.[0].physCellId 1
--gNBs.[0].servingCellConfigCommon.[0].absoluteFrequencySSB 643296
--gNBs.[0].servingCellConfigCommon.[0].dl_absoluteFrequencyPointA 642024
--gNBs.[0].servingCellConfigCommon.[0].ssb_PositionsInBurst_Bitmap 3
--MACRLCs.[0].local_n_address 192.168.71.172
--rfsimulator.serveraddr 192.168.71.181
ASAN_OPTIONS: detect_leaks=0:detect_odr_violation=0
depends_on:
- oai-cu
- oai-nr-ue
networks:
public_net:
ipv4_address: 192.168.71.172
volumes:
- ../../conf_files/gnb-du.sa.band78.106prb.rfsim.conf:/opt/oai-gnb/etc/gnb.conf
healthcheck:
test: /bin/bash -c "pgrep nr-softmodem"
interval: 10s
timeout: 5s
retries: 5
oai-nr-ue:
image: ${REGISTRY:-oaisoftwarealliance}/${NRUE_IMG:-oai-nr-ue}:${TAG:-develop}
container_name: rfsim5g-oai-nr-ue
@@ -143,12 +177,12 @@ services:
USE_ADDITIONAL_OPTIONS: --rfsim --log_config.global_log_options level,nocolor,time
-r 106 --numerology 1 -C 3619200000
--uicc0.imsi 208990100001100
--rfsimulator.serveraddr 192.168.71.171
--rfsimulator.options chanmod
--rfsimulator.serveraddr server
--telnetsrv --telnetsrv.shrmod ciUE --telnetsrv.listenaddr 192.168.71.181 --telnetsrv.listenport 8091
--channelmod.modellist_rfsimu_1.[0].model_name rfsimu_channel_ue0
--channelmod.modellist_rfsimu_1.[1].model_name rfsimu_channel_ue1
ASAN_OPTIONS: detect_odr_violation=0
depends_on:
- oai-du
networks:
public_net:
ipv4_address: 192.168.71.181
common/utils/nr/nr_common.c
+5 -5
View File
@@ -726,12 +726,12 @@ int get_slot_idx_in_period(const int slot, const frame_structure_t *fs)
int get_dmrs_port(int nl, uint16_t dmrs_ports)
{
if (dmrs_ports == 0) return 0; // dci 1_0
if (dmrs_ports == 0)
return 0; // dci 1_0
int p = -1;
int found = -1;
for (int i=0; i<12; i++) { // loop over dmrs ports
if((dmrs_ports>>i)&0x01) { // check if current bit is 1
for (int i = 0; i < 12; i++) { // loop over dmrs ports
if((dmrs_ports >> i) & 0x01) { // check if current bit is 1
found++;
if (found == nl) { // found antenna port number corresponding to current layer
p = i;
@@ -739,7 +739,7 @@ int get_dmrs_port(int nl, uint16_t dmrs_ports)
}
}
}
AssertFatal(p>-1,"No dmrs port corresponding to layer %d found\n",nl);
AssertFatal(p > -1, "No dmrs port corresponding to layer %d found\n", nl);
return p;
}
common/utils/nr/nr_common.h
+1 -2
View File
@@ -204,11 +204,10 @@ bool nr_timer_is_active(const NR_timer_t *timer);
uint32_t nr_timer_elapsed_time(const NR_timer_t *timer);
int set_default_nta_offset(frequency_range_t freq_range, uint32_t samples_per_subframe);
extern const nr_bandentry_t nr_bandtable[];
extern simde__m128i byte2bit16_lut[256];
void init_byte2bit16(void);
void init_byte2m128i(void);
void init_byte2m128i(void);
static inline simde__m128i byte2bit16(uint8_t b)
{
doc/Doxyfile
+1 -4
View File
@@ -1619,7 +1619,6 @@ INPUT = \
@CMAKE_CURRENT_SOURCE_DIR@/../openair2/NETWORK_DRIVER/MESH/ioctl.h \
@CMAKE_CURRENT_SOURCE_DIR@/../openair2/NETWORK_DRIVER/MESH/constant.h \
@CMAKE_CURRENT_SOURCE_DIR@/../openair2/NETWORK_DRIVER/MESH/rrc_nas_primitives.h \
@CMAKE_CURRENT_SOURCE_DIR@/../openair2/LAYER2/NR_MAC_COMMON/nr_mac_extern.h \
@CMAKE_CURRENT_SOURCE_DIR@/../openair2/LAYER2/NR_MAC_COMMON/nr_compute_tbs_common.c \
@CMAKE_CURRENT_SOURCE_DIR@/../openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.c \
@CMAKE_CURRENT_SOURCE_DIR@/../openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.h \
@@ -1690,13 +1689,12 @@ INPUT = \
@CMAKE_CURRENT_SOURCE_DIR@/../openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_bch.c \
@CMAKE_CURRENT_SOURCE_DIR@/../openair2/LAYER2/openair2_proc.c \
@CMAKE_CURRENT_SOURCE_DIR@/../openair2/LAYER2/RLC/rlc.h \
@CMAKE_CURRENT_SOURCE_DIR@/../openair2/LAYER2/NR_MAC_UE/mac_vars.c \
@CMAKE_CURRENT_SOURCE_DIR@/../openair2/LAYER2/NR_MAC_UE/mac_tables.c \
@CMAKE_CURRENT_SOURCE_DIR@/../openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c \
@CMAKE_CURRENT_SOURCE_DIR@/../openair2/LAYER2/NR_MAC_UE/mac_defs.h \
@CMAKE_CURRENT_SOURCE_DIR@/../openair2/LAYER2/NR_MAC_UE/mac_proto.h \
@CMAKE_CURRENT_SOURCE_DIR@/../openair2/LAYER2/NR_MAC_UE/nr_ue_power_procedures.c \
@CMAKE_CURRENT_SOURCE_DIR@/../openair2/LAYER2/NR_MAC_UE/config_ue.c \
@CMAKE_CURRENT_SOURCE_DIR@/../openair2/LAYER2/NR_MAC_UE/mac_extern.h \
@CMAKE_CURRENT_SOURCE_DIR@/../openair2/LAYER2/NR_MAC_UE/nr_ra_procedures.c \
@CMAKE_CURRENT_SOURCE_DIR@/../openair2/LAYER2/NR_MAC_UE/main_ue_nr.c \
@CMAKE_CURRENT_SOURCE_DIR@/../openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c \
@@ -1864,7 +1862,6 @@ INPUT = \
@CMAKE_CURRENT_SOURCE_DIR@/../openair2/RRC/NR/rrc_gNB.c \
@CMAKE_CURRENT_SOURCE_DIR@/../openair2/RRC/NR/nr_rrc_config.h \
@CMAKE_CURRENT_SOURCE_DIR@/../openair2/RRC/NR/rrc_gNB_radio_bearers.h \
@CMAKE_CURRENT_SOURCE_DIR@/../openair2/RRC/NR/nr_rrc_extern.h \
@CMAKE_CURRENT_SOURCE_DIR@/../openair2/RRC/NR/rrc_gNB_reconfig.c \
@CMAKE_CURRENT_SOURCE_DIR@/../openair2/RRC/NR/rrc_gNB_NGAP.c \
@CMAKE_CURRENT_SOURCE_DIR@/../openair2/RRC/NR/mac_rrc_dl_f1ap.c \
executables/nr-gnb.c
-1
View File
@@ -48,7 +48,6 @@
#include "PHY/MODULATION/nr_modulation.h"
#include "PHY/NR_TRANSPORT/nr_dlsch.h"
#include "openair2/NR_PHY_INTERFACE/nr_sched_response.h"
#include "LAYER2/NR_MAC_COMMON/nr_mac_extern.h"
#include "LAYER2/NR_MAC_gNB/mac_proto.h"
#include "radio/COMMON/common_lib.h"
executables/nr-softmodem.c
-1
View File
@@ -47,7 +47,6 @@ unsigned short config_frames[4] = {2,9,11,13};
#include <string.h>
#include <unistd.h>
#include "LAYER2/nr_pdcp/nr_pdcp_oai_api.h"
#include "NR_MAC_COMMON/nr_mac_extern.h"
#include "NR_PHY_INTERFACE/NR_IF_Module.h"
#include "LAYER2/NR_MAC_gNB/nr_mac_gNB.h"
#include "PHY/INIT/nr_phy_init.h"
executables/nr-ue.c
+4 -4
View File
@@ -970,6 +970,8 @@ void *UE_thread(void *arg)
syncMsg->UE = UE;
memset(&syncMsg->proc, 0, sizeof(syncMsg->proc));
pushNotifiedFIFO(&UE->sync_actor.fifo, Msg);
timing_advance = 0;
UE->timing_advance = 0;
trashed_frames = 0;
syncRunning = true;
continue;
@@ -1162,13 +1164,11 @@ void init_NR_UE(int nb_inst, char *uecap_file, char *reconfig_file, char *rbconf
}
void init_NR_UE_threads(PHY_VARS_NR_UE *UE) {
pthread_t thread;
char thread_name[16];
sprintf(thread_name, "UEthread_%d", UE->Mod_id);
threadCreate(&thread, UE_thread, (void *)UE, thread_name, -1, OAI_PRIORITY_RT_MAX);
threadCreate(&UE->main_thread, UE_thread, (void *)UE, thread_name, -1, OAI_PRIORITY_RT_MAX);
if (!IS_SOFTMODEM_NOSTATS) {
pthread_t stat_pthread;
sprintf(thread_name, "L1_UE_stats_%d", UE->Mod_id);
threadCreate(&stat_pthread, nrL1_UE_stats_thread, UE, thread_name, -1, OAI_PRIORITY_RT_LOW);
threadCreate(&UE->stat_thread, nrL1_UE_stats_thread, UE, thread_name, -1, OAI_PRIORITY_RT_LOW);
}
}
executables/nr-uesoftmodem.c
+15 -2
View File
@@ -24,6 +24,7 @@
#include <sched.h>
#include <stdbool.h>
#include <signal.h>
#include <errno.h>
#include "T.h"
#include "common/oai_version.h"
@@ -572,8 +573,20 @@ int main(int argc, char **argv)
if (PHY_vars_UE_g && PHY_vars_UE_g[0]) {
for (int CC_id = 0; CC_id < MAX_NUM_CCs; CC_id++) {
PHY_VARS_NR_UE *phy_vars = PHY_vars_UE_g[0][CC_id];
if (phy_vars && phy_vars->rfdevice.trx_end_func)
phy_vars->rfdevice.trx_end_func(&phy_vars->rfdevice);
if (phy_vars) {
shutdown_actor(&phy_vars->ul_actor);
for (int i = 0; i < NUM_DL_ACTORS; i++) {
shutdown_actor(&phy_vars->dl_actors[i]);
}
int ret = pthread_join(phy_vars->main_thread, NULL);
AssertFatal(ret == 0, "pthread_join error %d, errno %d (%s)\n", ret, errno, strerror(errno));
if (!IS_SOFTMODEM_NOSTATS) {
ret = pthread_join(phy_vars->stat_thread, NULL);
AssertFatal(ret == 0, "pthread_join error %d, errno %d (%s)\n", ret, errno, strerror(errno));
}
if (phy_vars->rfdevice.trx_end_func)
phy_vars->rfdevice.trx_end_func(&phy_vars->rfdevice);
}
}
}
nfapi/oai_integration/aerial/fapi_vnf_p7.c
+1 -1
View File
@@ -93,7 +93,7 @@ int aerial_phy_nr_uci_indication(nfapi_nr_uci_indication_t *ind)
return 1;
}
void gNB_dlsch_ulsch_scheduler(module_id_t module_idP, frame_t frame, sub_frame_t slot, NR_Sched_Rsp_t* sched_info);
void gNB_dlsch_ulsch_scheduler(module_id_t module_idP, frame_t frame, slot_t slot, NR_Sched_Rsp_t* sched_info);
int oai_fapi_dl_tti_req(nfapi_nr_dl_tti_request_t *dl_config_req);
int oai_fapi_ul_tti_req(nfapi_nr_ul_tti_request_t *ul_tti_req);
int oai_fapi_tx_data_req(nfapi_nr_tx_data_request_t* tx_data_req);
nfapi/oai_integration/nfapi_vnf.c
+1 -1
View File
@@ -1079,7 +1079,7 @@ int phy_cqi_indication(struct nfapi_vnf_p7_config *config, nfapi_cqi_indication_
NR_Sched_Rsp_t g_sched_resp;
void gNB_dlsch_ulsch_scheduler(module_id_t module_idP, frame_t frame, sub_frame_t slot, NR_Sched_Rsp_t* sched_info);
void gNB_dlsch_ulsch_scheduler(module_id_t module_idP, frame_t frame, slot_t slot, NR_Sched_Rsp_t* sched_info);
int oai_nfapi_dl_tti_req(nfapi_nr_dl_tti_request_t *dl_config_req);
int oai_nfapi_ul_tti_req(nfapi_nr_ul_tti_request_t *ul_tti_req);
int oai_nfapi_tx_data_req(nfapi_nr_tx_data_request_t* tx_data_req);
openair1/PHY/defs_nr_UE.h
+2
View File
@@ -549,6 +549,8 @@ typedef struct PHY_VARS_NR_UE_s {
Actor_t dl_actors[NUM_DL_ACTORS];
Actor_t ul_actor;
ntn_config_message_t* ntn_config_message;
pthread_t main_thread;
pthread_t stat_thread;
} PHY_VARS_NR_UE;
typedef struct {
openair1/SCHED_NR/fapi_nr_l1.c
+1 -1
View File
@@ -202,7 +202,7 @@ void nr_schedule_response(NR_Sched_Rsp_t *Sched_INFO)
// copy data from L2 interface into L1 structures
module_id_t Mod_id = Sched_INFO->module_id;
frame_t frame = Sched_INFO->frame;
sub_frame_t slot = Sched_INFO->slot;
slot_t slot = Sched_INFO->slot;
AssertFatal(RC.gNB != NULL, "RC.gNB is null\n");
AssertFatal(RC.gNB[Mod_id] != NULL, "RC.gNB[%d] is null\n", Mod_id);
openair1/SIMULATION/NR_PHY/dlsim.c
+1 -1
View File
@@ -148,7 +148,7 @@ extern void fix_scd(NR_ServingCellConfig_t *scd);// forward declaration
/* specific dlsim DL preprocessor: uses rbStart/rbSize/mcs/nrOfLayers from command line of dlsim */
int g_mcsIndex = -1, g_mcsTableIdx = 0, g_rbStart = -1, g_rbSize = -1, g_nrOfLayers = 1, g_pmi = 0;
void nr_dlsim_preprocessor(module_id_t module_id, frame_t frame, sub_frame_t slot)
void nr_dlsim_preprocessor(module_id_t module_id, frame_t frame, slot_t slot)
{
NR_UE_info_t *UE_info = RC.nrmac[module_id]->UE_info.list[0];
AssertFatal(RC.nrmac[module_id]->UE_info.list[1]==NULL, "can have only a single UE\n");
openair1/SIMULATION/NR_PHY/psbchsim.c
-1
View File
@@ -37,7 +37,6 @@
#include "openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.h"
#include "openair1/SIMULATION/TOOLS/sim.h"
#include "common/utils/nr/nr_common.h"
#include "openair2/RRC/NR/nr_rrc_extern.h"
#include "openair2/RRC/LTE/rrc_vars.h"
#include "PHY/NR_UE_TRANSPORT/nr_transport_proto_ue.h"
#include "PHY/INIT/nr_phy_init.h"
openair1/SIMULATION/NR_PHY/ulsim.c
+1 -1
View File
@@ -1021,7 +1021,7 @@ int main(int argc, char *argv[])
while (round < max_rounds && crc_status) {
round_trials[round]++;
rv_index = nr_rv_round_map[round % 4];
rv_index = nr_get_rv(round % 4);
/// gNB UL PDUs
openair2/GNB_APP/gnb_config.c
-1
View File
@@ -44,7 +44,6 @@
#include "PHY/defs_gNB.h"
#include "PHY/defs_nr_common.h"
#include "RRC/NR/nr_rrc_config.h"
#include "RRC/NR/nr_rrc_extern.h"
#include "RRC_nr_paramsvalues.h"
#include "T.h"
#include "asn_SEQUENCE_OF.h"
openair2/LAYER2/MAC/pre_processor.c
-1
View File
@@ -36,7 +36,6 @@
#include "LAYER2/MAC/mac.h"
#include "LAYER2/MAC/mac_proto.h"
#include "LAYER2/MAC/mac_extern.h"
#include <openair2/LAYER2/NR_MAC_COMMON/nr_mac_extern.h>
#include "common/utils/LOG/log.h"
#include "common/utils/LOG/vcd_signal_dumper.h"
#include "UTIL/OPT/opt.h"
openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.c
+17 -162
View File
@@ -45,6 +45,12 @@ const uint32_t NR_SHORT_BSR_TABLE[NR_SHORT_BSR_TABLE_SIZE] = {
20516, 28581, 39818, 55474, 77284, 107669, 150000, 300000
};
uint32_t get_short_bsr_value(int idx)
{
AssertFatal(idx < NR_SHORT_BSR_TABLE_SIZE, "Short BSR table index %d exceeding its size\n", idx);
return NR_SHORT_BSR_TABLE[idx];
}
//38.321 Table 6.1.3.1-2
const uint32_t NR_LONG_BSR_TABLE[NR_LONG_BSR_TABLE_SIZE] ={
0, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 22, 23, 25, 26,
@@ -65,6 +71,12 @@ const uint32_t NR_LONG_BSR_TABLE[NR_LONG_BSR_TABLE_SIZE] ={
35910462, 38241455, 40723756, 43367187, 46182206, 49179951, 52372284, 55771835, 59392055, 63247269, 67352729, 71724679, 76380419, 81338368, 162676736, 4294967295
};
uint32_t get_long_bsr_value(int idx)
{
AssertFatal(idx < NR_LONG_BSR_TABLE_SIZE, "Short BSR table index %d exceeding its size\n", idx);
return NR_LONG_BSR_TABLE[idx];
}
// start symbols for SSB types A,B,C,D,E
static const uint16_t symbol_ssb_AC[8] = {2, 8, 16, 22, 30, 36, 44, 50};
static const uint16_t symbol_ssb_BD[64] = {4, 8, 16, 20, 32, 36, 44, 48, 60, 64, 72, 76, 88, 92, 100, 104,
@@ -305,113 +317,6 @@ const uint8_t table_5_1_2_1_1_5_time_dom_res_alloc_C_dmrs_typeA_pos3[16][4]={
{1,0,2,6} // row index 16
};
// TS 38.211 - Table 6.3.1.5-1: Precoding matrix W for single-layer transmission using two antenna ports, 'n' = -1 and 'o' = -j
const char table_38211_6_3_1_5_1[6][2][1] = {
{{'1'}, {'0'}}, // tpmi 0
{{'0'}, {'1'}}, // tpmi 1
{{'1'}, {'1'}}, // tpmi 2
{{'1'}, {'n'}}, // tpmi 3
{{'1'}, {'j'}}, // tpmi 4
{{'1'}, {'o'}} // tpmi 5
};
// TS 38.211 - Table 6.3.1.5-2: Precoding matrix W for single-layer transmission using four antenna ports with transform precoding enabled, 'n' = -1 and 'o' = -j
const char table_38211_6_3_1_5_2[28][4][1] = {
{{'1'}, {'0'}, {'0'}, {'0'}}, // tpmi 0
{{'0'}, {'1'}, {'0'}, {'0'}}, // tpmi 1
{{'0'}, {'0'}, {'1'}, {'0'}}, // tpmi 2
{{'0'}, {'0'}, {'0'}, {'1'}}, // tpmi 3
{{'1'}, {'0'}, {'1'}, {'0'}}, // tpmi 4
{{'1'}, {'0'}, {'n'}, {'0'}}, // tpmi 5
{{'1'}, {'0'}, {'j'}, {'0'}}, // tpmi 6
{{'1'}, {'0'}, {'o'}, {'0'}}, // tpmi 7
{{'0'}, {'1'}, {'0'}, {'1'}}, // tpmi 8
{{'0'}, {'1'}, {'0'}, {'n'}}, // tpmi 9
{{'0'}, {'1'}, {'0'}, {'j'}}, // tpmi 10
{{'0'}, {'1'}, {'0'}, {'o'}}, // tpmi 11
{{'1'}, {'1'}, {'1'}, {'n'}}, // tpmi 12
{{'1'}, {'1'}, {'j'}, {'j'}}, // tpmi 13
{{'1'}, {'1'}, {'n'}, {'1'}}, // tpmi 14
{{'1'}, {'1'}, {'o'}, {'o'}}, // tpmi 15
{{'1'}, {'j'}, {'1'}, {'j'}}, // tpmi 16
{{'1'}, {'j'}, {'j'}, {'1'}}, // tpmi 17
{{'1'}, {'j'}, {'n'}, {'o'}}, // tpmi 18
{{'1'}, {'j'}, {'o'}, {'n'}}, // tpmi 19
{{'1'}, {'n'}, {'1'}, {'1'}}, // tpmi 20
{{'1'}, {'n'}, {'j'}, {'o'}}, // tpmi 21
{{'1'}, {'n'}, {'n'}, {'n'}}, // tpmi 22
{{'1'}, {'n'}, {'o'}, {'j'}}, // tpmi 23
{{'1'}, {'o'}, {'1'}, {'o'}}, // tpmi 24
{{'1'}, {'o'}, {'j'}, {'n'}}, // tpmi 25
{{'1'}, {'o'}, {'n'}, {'j'}}, // tpmi 26
{{'1'}, {'o'}, {'o'}, {'1'}} // tpmi 27
};
// TS 38.211 - Table 6.3.1.5-3: Precoding matrix W for single-layer transmission using four antenna ports with transform precoding disabled, 'n' = -1 and 'o' = -j
const char table_38211_6_3_1_5_3[28][4][1] = {
{{'1'}, {'0'}, {'0'}, {'0'}}, // tpmi 0
{{'0'}, {'1'}, {'0'}, {'0'}}, // tpmi 1
{{'0'}, {'0'}, {'1'}, {'0'}}, // tpmi 2
{{'0'}, {'0'}, {'0'}, {'1'}}, // tpmi 3
{{'1'}, {'0'}, {'1'}, {'0'}}, // tpmi 4
{{'1'}, {'0'}, {'n'}, {'0'}}, // tpmi 5
{{'1'}, {'0'}, {'j'}, {'0'}}, // tpmi 6
{{'1'}, {'0'}, {'o'}, {'0'}}, // tpmi 7
{{'0'}, {'1'}, {'0'}, {'1'}}, // tpmi 8
{{'0'}, {'1'}, {'0'}, {'n'}}, // tpmi 9
{{'0'}, {'1'}, {'0'}, {'j'}}, // tpmi 10
{{'0'}, {'1'}, {'0'}, {'o'}}, // tpmi 11
{{'1'}, {'1'}, {'1'}, {'1'}}, // tpmi 12
{{'1'}, {'1'}, {'j'}, {'j'}}, // tpmi 13
{{'1'}, {'1'}, {'n'}, {'n'}}, // tpmi 14
{{'1'}, {'1'}, {'o'}, {'o'}}, // tpmi 15
{{'1'}, {'j'}, {'1'}, {'j'}}, // tpmi 16
{{'1'}, {'j'}, {'j'}, {'n'}}, // tpmi 17
{{'1'}, {'j'}, {'n'}, {'o'}}, // tpmi 18
{{'1'}, {'j'}, {'o'}, {'1'}}, // tpmi 19
{{'1'}, {'n'}, {'1'}, {'n'}}, // tpmi 20
{{'1'}, {'n'}, {'j'}, {'o'}}, // tpmi 21
{{'1'}, {'n'}, {'n'}, {'1'}}, // tpmi 22
{{'1'}, {'n'}, {'o'}, {'j'}}, // tpmi 23
{{'1'}, {'o'}, {'1'}, {'o'}}, // tpmi 24
{{'1'}, {'o'}, {'j'}, {'1'}}, // tpmi 25
{{'1'}, {'o'}, {'n'}, {'j'}}, // tpmi 26
{{'1'}, {'o'}, {'o'}, {'n'}} // tpmi 27
};
// TS 38.211 - Table 6.3.1.5-4: Precoding matrix W for two-layer transmission using two antenna ports, 'n' = -1 and 'o' = -j
const char table_38211_6_3_1_5_4[3][2][2] = {
{{'1', '0'}, {'0', '1'}}, // tpmi 0
{{'1', '1'}, {'1', 'n'}}, // tpmi 1
{{'1', '1'}, {'j', 'o'}} // tpmi 2
};
// TS 38.211 - Table 6.3.1.5-5: Precoding matrix W for two-layer transmission using four antenna ports, 'n' = -1 and 'o' = -j
const char table_38211_6_3_1_5_5[22][4][2] = {
{{'1', '0'}, {'0', '1'}, {'0', '0'}, {'0', '0'}}, // tpmi 0
{{'1', '0'}, {'0', '0'}, {'0', '1'}, {'0', '0'}}, // tpmi 1
{{'1', '0'}, {'0', '0'}, {'0', '0'}, {'0', '1'}}, // tpmi 2
{{'0', '0'}, {'1', '0'}, {'0', '1'}, {'0', '0'}}, // tpmi 3
{{'0', '0'}, {'1', '0'}, {'0', '0'}, {'0', '1'}}, // tpmi 4
{{'0', '0'}, {'0', '0'}, {'1', '0'}, {'0', '1'}}, // tpmi 5
{{'1', '0'}, {'0', '1'}, {'1', '0'}, {'0', 'o'}}, // tpmi 6
{{'1', '0'}, {'0', '1'}, {'1', '0'}, {'0', 'j'}}, // tpmi 7
{{'1', '0'}, {'0', '1'}, {'o', '0'}, {'0', '1'}}, // tpmi 8
{{'1', '0'}, {'0', '1'}, {'o', '0'}, {'0', 'n'}}, // tpmi 9
{{'1', '0'}, {'0', '1'}, {'n', '0'}, {'0', 'o'}}, // tpmi 10
{{'1', '0'}, {'0', '1'}, {'n', '0'}, {'0', 'j'}}, // tpmi 11
{{'1', '0'}, {'0', '1'}, {'j', '0'}, {'0', '1'}}, // tpmi 12
{{'1', '0'}, {'0', '1'}, {'j', '0'}, {'0', 'n'}}, // tpmi 13
{{'1', '1'}, {'1', '1'}, {'1', 'n'}, {'1', 'n'}}, // tpmi 14
{{'1', '1'}, {'1', '1'}, {'j', 'o'}, {'j', 'o'}}, // tpmi 15
{{'1', '1'}, {'j', 'j'}, {'1', 'n'}, {'j', 'o'}}, // tpmi 16
{{'1', '1'}, {'j', 'j'}, {'j', 'o'}, {'n', '1'}}, // tpmi 17
{{'1', '1'}, {'n', 'n'}, {'1', 'n'}, {'n', '1'}}, // tpmi 18
{{'1', '1'}, {'n', 'n'}, {'j', 'o'}, {'o', 'j'}}, // tpmi 19
{{'1', '1'}, {'o', 'o'}, {'1', 'n'}, {'o', 'j'}}, // tpmi 20
{{'1', '1'}, {'o', 'o'}, {'j', 'o'}, {'1', 'n'}} // tpmi 21
};
// Default PUSCH time domain resource allocation tables from 38.214
const uint8_t table_6_1_2_1_1_2[16][4] = {
{0, 0, 0, 14}, // row index 1
@@ -1909,10 +1814,13 @@ int get_nr_prach_info_from_index(uint8_t index,
s_map = table_6_3_3_2_2_prachConfig_Index[index][4];
if ((s_map>>subframe) & 0x01) {
*N_RA_slot = table_6_3_3_2_2_prachConfig_Index[index][6]; // Number of RACH slots within a subframe
if (mu == 1) {
if ((*N_RA_slot <= 1) && (slot % 2 == 0)){
if (index >= 87) {
if ((mu == 1) && (*N_RA_slot <= 1) && (slot % 2 == 0)) {
return 0; // no prach in even slots @ 30kHz for 1 prach per subframe
}
} else {
if ((slot % 2) && (mu > 0))
return 0; // slot does not contain start symbol of this prach time resource
}
for(int i = 0; i <= subframe ; i++) {
if ((s_map >> i) & 0x01) {
@@ -2176,59 +2084,6 @@ static const uint16_t table_7_3_1_1_2_32[3][15] = {
{0, 1, 2, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
};
void nr_get_tbs_dl(nfapi_nr_dl_tti_pdsch_pdu *pdsch_pdu,
int x_overhead,
uint8_t numdmrscdmgroupnodata,
uint8_t tb_scaling) {
LOG_D(MAC, "TBS calculation\n");
nfapi_nr_dl_tti_pdsch_pdu_rel15_t *pdsch_rel15 = &pdsch_pdu->pdsch_pdu_rel15;
uint16_t N_PRB_oh = x_overhead;
uint8_t N_PRB_DMRS;
if (pdsch_rel15->dmrsConfigType == NFAPI_NR_DMRS_TYPE1) {
// if no data in dmrs cdm group is 1 only even REs have no data
// if no data in dmrs cdm group is 2 both odd and even REs have no data
N_PRB_DMRS = numdmrscdmgroupnodata*6;
}
else {
N_PRB_DMRS = numdmrscdmgroupnodata*4;
}
uint8_t N_sh_symb = pdsch_rel15->NrOfSymbols;
uint8_t Imcs = pdsch_rel15->mcsIndex[0];
uint16_t dmrs_length = get_num_dmrs(pdsch_rel15->dlDmrsSymbPos);
uint16_t N_RE_prime = NR_NB_SC_PER_RB*N_sh_symb - N_PRB_DMRS*dmrs_length - N_PRB_oh;
LOG_D(MAC, "N_RE_prime %d for %d symbols %d DMRS per PRB and %d overhead\n", N_RE_prime, N_sh_symb, N_PRB_DMRS, N_PRB_oh);
uint32_t TBS=0;
/*uint8_t mcs_table = config.pdsch_config.mcs_table.value;
uint8_t ss_type = params_rel15.search_space_type;
uint8_t dci_format = params_rel15.dci_format;
get_table_idx(mcs_table, dci_format, rnti_type, ss_type);*/
uint8_t table_idx = 0;
uint16_t R = nr_get_code_rate_dl(Imcs, table_idx);
uint8_t Qm = nr_get_Qm_dl(Imcs, table_idx);
TBS = nr_compute_tbs(Qm,
R,
pdsch_rel15->rbSize,
N_sh_symb,
N_PRB_DMRS*dmrs_length,
N_PRB_oh,
tb_scaling,
pdsch_rel15->nrOfLayers)>>3;
pdsch_rel15->targetCodeRate[0] = R;
pdsch_rel15->qamModOrder[0] = Qm;
pdsch_rel15->TBSize[0] = TBS;
// pdsch_rel15->nb_mod_symbols = N_RE_prime*pdsch_rel15->n_prb*pdsch_rel15->nb_codewords;
pdsch_rel15->mcsTable[0] = table_idx;
LOG_D(MAC, "TBS %d bytes: N_PRB_DMRS %d N_sh_symb %d N_PRB_oh %d R %d Qm %d table %d nb_symbols %d\n",
TBS, N_PRB_DMRS, N_sh_symb, N_PRB_oh, R, Qm, table_idx,N_RE_prime*pdsch_rel15->rbSize*pdsch_rel15->NrOfCodewords );
}
// the following tables contain 10 times the value reported in 214 (in line with SCF specification and to avoid fractional values)
//Table 5.1.3.1-1 of 38.214
static const uint16_t Table_51311[32][2] = {{2, 1200}, {2, 1570}, {2, 1930}, {2, 2510}, {2, 3080}, {2, 3790}, {2, 4490}, {2, 5260},
openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.h
+2 -1
View File
@@ -55,7 +55,8 @@ typedef enum {
uint32_t get_Y(const NR_SearchSpace_t *ss, int slot, rnti_t rnti);
uint8_t get_BG(uint32_t A, uint16_t R);
uint32_t get_short_bsr_value(int idx);
uint32_t get_long_bsr_value(int idx);
int16_t fill_dmrs_mask(const NR_PDSCH_Config_t *pdsch_Config,
int dci_format,
int dmrs_TypeA_Position,
openair2/LAYER2/NR_MAC_COMMON/nr_mac_extern.h
-114
View File
@@ -1,114 +0,0 @@
/*
* Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership.
* The OpenAirInterface Software Alliance licenses this file to You under
* the OAI Public License, Version 1.1 (the "License"); you may not use this file
* except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.openairinterface.org/?page_id=698
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*-------------------------------------------------------------------------------
* For more information about the OpenAirInterface (OAI) Software Alliance:
* contact@openairinterface.org
*/
/*! \file nr_mac_extern.h
* \brief NR mac externs
* \author Navid Nikaein, Raymond Knopp, Guido Casati
* \date 2019
* \version 1.0
* \email navid.nikaein@eurecom.fr, guido.casati@iis.fraunhofer.de
* @ingroup _mac
*/
#ifndef __NR_MAC_EXTERN_H__
#define __NR_MAC_EXTERN_H__
#include "common/ran_context.h"
#include "nr_mac.h"
/*#include "PHY/defs_common.h"*/
/* Scheduler */
extern RAN_CONTEXT_t RC;
extern uint8_t nfapi_mode;
extern const uint32_t NR_SHORT_BSR_TABLE[NR_SHORT_BSR_TABLE_SIZE];
extern const uint32_t NR_LONG_BSR_TABLE[NR_LONG_BSR_TABLE_SIZE];
// Type0-PDCCH search space
extern const int32_t table_38213_13_1_c1[16];
extern const int32_t table_38213_13_1_c2[16];
extern const int32_t table_38213_13_1_c3[16];
extern const int32_t table_38213_13_1_c4[16];
extern const int32_t table_38213_13_2_c1[16];
extern const int32_t table_38213_13_2_c2[16];
extern const int32_t table_38213_13_2_c3[16];
extern const int32_t table_38213_13_2_c4[16];
extern const int32_t table_38213_13_3_c1[16];
extern const int32_t table_38213_13_3_c2[16];
extern const int32_t table_38213_13_3_c3[16];
extern const int32_t table_38213_13_3_c4[16];
extern const int32_t table_38213_13_4_c1[16];
extern const int32_t table_38213_13_4_c2[16];
extern const int32_t table_38213_13_4_c3[16];
extern const int32_t table_38213_13_4_c4[16];
extern const int32_t table_38213_13_5_c1[16];
extern const int32_t table_38213_13_5_c2[16];
extern const int32_t table_38213_13_5_c3[16];
extern const int32_t table_38213_13_5_c4[16];
extern const int32_t table_38213_13_6_c1[16];
extern const int32_t table_38213_13_6_c2[16];
extern const int32_t table_38213_13_6_c3[16];
extern const int32_t table_38213_13_6_c4[16];
extern const int32_t table_38213_13_7_c1[16];
extern const int32_t table_38213_13_7_c2[16];
extern const int32_t table_38213_13_7_c3[16];
extern const int32_t table_38213_13_7_c4[16];
extern const int32_t table_38213_13_8_c1[16];
extern const int32_t table_38213_13_8_c2[16];
extern const int32_t table_38213_13_8_c3[16];
extern const int32_t table_38213_13_8_c4[16];
extern const int32_t table_38213_13_9_c1[16];
extern const int32_t table_38213_13_9_c2[16];
extern const int32_t table_38213_13_9_c3[16];
extern const int32_t table_38213_13_9_c4[16];
extern const int32_t table_38213_13_10_c1[16];
extern const int32_t table_38213_13_10_c2[16];
extern const int32_t table_38213_13_10_c3[16];
extern const int32_t table_38213_13_10_c4[16];
extern const float table_38213_13_11_c1[16];
extern const int32_t table_38213_13_11_c2[16];
extern const float table_38213_13_11_c3[16];
extern const int32_t table_38213_13_11_c4[16];
extern const float table_38213_13_12_c1[16];
extern const int32_t table_38213_13_12_c2[16];
extern const float table_38213_13_12_c3[16];
extern const int32_t table_38213_10_1_1_c2[5];
extern const char table_38211_6_3_1_5_1[6][2][1];
extern const char table_38211_6_3_1_5_2[28][4][1];
extern const char table_38211_6_3_1_5_3[28][4][1];
extern const char table_38211_6_3_1_5_4[3][2][2];
extern const char table_38211_6_3_1_5_5[22][4][2];
#endif //DEF_H
openair2/LAYER2/NR_MAC_UE/config_ue.c
+1 -2
View File
@@ -125,8 +125,7 @@ static void config_common_ue_sa(NR_UE_MAC_INST_t *mac, NR_ServingCellConfigCommo
if (frequencyInfoUL->absoluteFrequencyPointA == NULL)
cfg->carrier_config.uplink_frequency = cfg->carrier_config.dl_frequency;
else
// TODO check if corresponds to what reported in SIB1
cfg->carrier_config.uplink_frequency = (downlink_frequency[cc_idP][0]/1000) + uplink_frequency_offset[cc_idP][0];
cfg->carrier_config.uplink_frequency = cfg->carrier_config.dl_frequency + (uplink_frequency_offset[cc_idP][0] / 1000);
for (int i = 0; i < 5; i++) {
if (i == frequencyInfoUL->scs_SpecificCarrierList.list.array[0]->subcarrierSpacing) {
openair2/LAYER2/NR_MAC_UE/mac_defs.h
-1
View File
@@ -45,7 +45,6 @@
/* MAC */
#include "LAYER2/NR_MAC_COMMON/nr_mac.h"
#include "LAYER2/NR_MAC_COMMON/nr_mac_common.h"
#include "NR_MAC_COMMON/nr_mac_extern.h"
#include "mac_defs_sl.h"
/* RRC */
openair2/LAYER2/NR_MAC_UE/mac_extern.h
-79
View File
@@ -1,79 +0,0 @@
/*
* Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership.
* The OpenAirInterface Software Alliance licenses this file to You under
* the OAI Public License, Version 1.1 (the "License"); you may not use this file
* except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.openairinterface.org/?page_id=698
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*-------------------------------------------------------------------------------
* For more information about the OpenAirInterface (OAI) Software Alliance:
* contact@openairinterface.org
*/
/* \file extern.h
* \brief extern variables for MAC layer
* \author R. Knopp, K.H. HSU
* \date 2018
* \version 0.1
* \company Eurecom / NTUST
* \email: knopp@eurecom.fr, kai-hsiang.hsu@eurecom.fr
* \note
* \warning
*/
#include "mac_defs.h"
//extern NR_UE_MAC_INST_t *UE_mac_inst;
// DCI extraction
// for PUSCH from TS 38.214 subclause 6.1.2.1.1
extern uint8_t table_6_1_2_1_1_2_time_dom_res_alloc_A[16][3];
// for PDSCH from TS 38.214 subclause 5.1.2.1.1
extern uint8_t table_5_1_2_1_1_2_time_dom_res_alloc_A[16][3];
extern int64_t table_6_3_3_2_3_prachConfig_Index [256][9];
// DCI
extern const uint8_t table_7_3_1_1_2_2_3_4_5[64][20];
extern const uint8_t table_7_3_1_1_2_12[14][3];
extern const uint8_t table_7_3_1_1_2_13[10][4];
extern const uint8_t table_7_3_1_1_2_14[3][5];
extern const uint8_t table_7_3_1_1_2_15[4][6];
extern const uint8_t table_7_3_1_1_2_16[12][2];
extern const uint8_t table_7_3_1_1_2_17[7][3];
extern const uint8_t table_7_3_1_1_2_18[3][4];
extern const uint8_t table_7_3_1_1_2_19[2][5];
extern const uint8_t table_7_3_1_1_2_20[28][3];
extern const uint8_t table_7_3_1_1_2_21[19][4];
extern const uint8_t table_7_3_1_1_2_22[6][5];
extern const uint8_t table_7_3_1_1_2_23[5][6];
extern const uint8_t table_7_3_2_3_3_1[12][5];
extern const uint8_t table_7_3_2_3_3_2_oneCodeword[31][10];
extern const uint8_t table_7_3_2_3_3_2_twoCodeword[4][10];
extern const uint8_t table_7_3_2_3_3_3_oneCodeword[24][7];
extern const uint8_t table_7_3_2_3_3_3_twoCodeword[2][7];
extern const uint8_t table_7_3_2_3_3_4_oneCodeword[58][14];
extern const uint8_t table_7_3_2_3_3_4_twoCodeword[6][14];
extern const uint16_t table_7_2_1[16];
extern void mac_rlc_data_ind(const module_id_t module_idP,
const rnti_t rntiP,
const eNB_index_t eNB_index,
const frame_t frameP,
const eNB_flag_t enb_flagP,
const MBMS_flag_t MBMS_flagP,
const logical_chan_id_t channel_idP,
char *buffer_pP,
const tb_size_t tb_sizeP,
num_tb_t num_tbP,
crc_t *crcs_pP);
openair2/LAYER2/NR_MAC_UE/mac_proto.h
+13 -8
View File
@@ -192,7 +192,11 @@ void config_dci_pdu(NR_UE_MAC_INST_t *mac,
const NR_SearchSpace_t *ss);
void ue_dci_configuration(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_request_t *dl_config, const frame_t frame, const int slot);
void set_precoding_information_parameters(nfapi_nr_ue_pusch_pdu_t *pusch_config_pdu,
int n_antenna_port,
long transformPrecoder,
int precoding_information,
NR_PUSCH_Config_t *pusch_Config);
void set_harq_status(NR_UE_MAC_INST_t *mac,
uint8_t pucch_id,
uint8_t harq_id,
@@ -207,7 +211,7 @@ void set_harq_status(NR_UE_MAC_INST_t *mac,
bool get_downlink_ack(NR_UE_MAC_INST_t *mac, frame_t frame, int slot, PUCCH_sched_t *pucch);
initial_pucch_resource_t get_initial_pucch_resource(const int idx);
void multiplex_pucch_resource(NR_UE_MAC_INST_t *mac, PUCCH_sched_t *pucch, int num_res);
uint32_t get_backoff_indicator(int idx);
int16_t get_pucch_tx_power_ue(NR_UE_MAC_INST_t *mac,
int scs,
NR_PUCCH_Config_t *pucch_Config,
@@ -262,11 +266,15 @@ float nr_get_Pcmax(int p_Max,
int start_prb);
float nr_get_Pcmin(int bandwidth_index);
void set_antenna_port_parameters(fapi_nr_dl_config_dlsch_pdu_rel15_t *dlsch_pdu, int n_cw, long *max_length, long *dmrs, int ant);
int get_sum_delta_pucch(NR_UE_MAC_INST_t *mac, int slot, frame_t frame);
void ul_ports_config(NR_UE_MAC_INST_t *mac,
int *n_front_load_symb,
nfapi_nr_ue_pusch_pdu_t *pusch_config_pdu,
dci_pdu_rel15_t *dci,
nr_dci_format_t dci_format);
/* Random Access */
/* \brief This function schedules the PRACH according to prach_ConfigurationIndex and TS 38.211 tables 6.3.3.2.x
and fills the PRACH PDU per each FD occasion.
@param mac pointer to MAC instance
@@ -288,10 +296,7 @@ void configure_csi_resource_mapping(fapi_nr_dl_config_csirs_pdu_rel15_t *csirs_c
@param
@returns void
*/
void nr_ue_msg3_scheduler(NR_UE_MAC_INST_t *mac,
frame_t current_frame,
sub_frame_t current_slot,
uint8_t Msg3_tda_id);
void nr_ue_msg3_scheduler(NR_UE_MAC_INST_t *mac, frame_t current_frame, slot_t current_slot, uint8_t Msg3_tda_id);
void nr_ue_contention_resolution(NR_UE_MAC_INST_t *mac, int cc_id, frame_t frame, int slot, NR_PRACH_RESOURCES_t *prach_resources);
openair2/LAYER2/NR_MAC_UE/mac_tables.c
+703
View File
@@ -0,0 +1,703 @@
/*
* Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership.
* The OpenAirInterface Software Alliance licenses this file to You under
* the OAI Public License, Version 1.1 (the "License"); you may not use this file
* except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.openairinterface.org/?page_id=698
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*-------------------------------------------------------------------------------
* For more information about the OpenAirInterface (OAI) Software Alliance:
* contact@openairinterface.org
*/
/* \file vars.h
* \brief MAC Layer variables
* \author R. Knopp, K.H. HSU
* \date 2018
* \version 0.1
* \company Eurecom / NTUST
* \email: knopp@eurecom.fr, kai-hsiang.hsu@eurecom.fr
* \note
* \warning
*/
#include <stdint.h>
#include "NR_MAC_UE/mac_proto.h"
// table_7_3_1_1_2_2_3_4_5 contains values for number of layers and precoding information for tables 7.3.1.1.2-2/3/4/5 from TS 38.212 subclause 7.3.1.1.2
// the first 6 columns contain table 7.3.1.1.2-2: Precoding information and number of layers, for 4 antenna ports, if transformPrecoder=disabled and maxRank = 2 or 3 or 4
// next six columns contain table 7.3.1.1.2-3: Precoding information and number of layers for 4 antenna ports, if transformPrecoder= enabled, or if transformPrecoder=disabled and maxRank = 1
// next four columns contain table 7.3.1.1.2-4: Precoding information and number of layers, for 2 antenna ports, if transformPrecoder=disabled and maxRank = 2
// next four columns contain table 7.3.1.1.2-5: Precoding information and number of layers, for 2 antenna ports, if transformPrecoder= enabled, or if transformPrecoder= disabled and maxRank = 1
static const uint8_t table_7_3_1_1_2_2_3_4_5[64][20] = {
{1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0},
{1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1},
{1, 2, 1, 2, 1, 2, 1, 2, 1, 2, 1, 2, 2, 0, 2, 0, 1, 2, 0, 0},
{1, 3, 1, 3, 1, 3, 1, 3, 1, 3, 1, 3, 1, 2, 0, 0, 1, 3, 0, 0},
{2, 0, 2, 0, 2, 0, 1, 4, 1, 4, 0, 0, 1, 3, 0, 0, 1, 4, 0, 0},
{2, 1, 2, 1, 2, 1, 1, 5, 1, 5, 0, 0, 1, 4, 0, 0, 1, 5, 0, 0},
{2, 2, 2, 2, 2, 2, 1, 6, 1, 6, 0, 0, 1, 5, 0, 0, 0, 0, 0, 0},
{2, 3, 2, 3, 2, 3, 1, 7, 1, 7, 0, 0, 2, 1, 0, 0, 0, 0, 0, 0},
{2, 4, 2, 4, 2, 4, 1, 8, 1, 8, 0, 0, 2, 2, 0, 0, 0, 0, 0, 0},
{2, 5, 2, 5, 2, 5, 1, 9, 1, 9, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
{3, 0, 3, 0, 3, 0, 1, 10, 1, 10, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
{4, 0, 4, 0, 4, 0, 1, 11, 1, 11, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
{1, 4, 1, 4, 0, 0, 1, 12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
{1, 5, 1, 5, 0, 0, 1, 13, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
{1, 6, 1, 6, 0, 0, 1, 14, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
{1, 7, 1, 7, 0, 0, 1, 15, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
{1, 8, 1, 8, 0, 0, 1, 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
{1, 9, 1, 9, 0, 0, 1, 17, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
{1, 10, 1, 10, 0, 0, 1, 18, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
{1, 11, 1, 11, 0, 0, 1, 19, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
{2, 6, 2, 6, 0, 0, 1, 20, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
{2, 7, 2, 7, 0, 0, 1, 21, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
{2, 8, 2, 8, 0, 0, 1, 22, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
{2, 9, 2, 9, 0, 0, 1, 23, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
{2, 10, 2, 10, 0, 0, 1, 24, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
{2, 11, 2, 11, 0, 0, 1, 25, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
{2, 12, 2, 12, 0, 0, 1, 26, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
{2, 13, 2, 13, 0, 0, 1, 27, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
{3, 1, 3, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
{3, 2, 3, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
{4, 1, 4, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
{4, 2, 4, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
{1, 12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
{1, 13, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
{1, 14, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
{1, 15, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
{1, 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
{1, 17, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
{1, 18, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
{1, 19, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
{1, 20, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
{1, 21, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
{1, 22, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
{1, 23, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
{1, 24, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
{1, 25, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
{1, 26, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
{1, 27, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
{2, 14, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
{2, 15, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
{2, 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
{2, 17, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
{2, 18, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
{2, 19, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
{2, 20, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
{2, 21, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
{3, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
{3, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
{3, 5, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
{3, 6, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
{4, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
{4, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}
};
static const uint8_t table_7_3_1_1_2_12[14][3] = {
{1,0,1},
{1,1,1},
{2,0,1},
{2,1,1},
{2,2,1},
{2,3,1},
{2,0,2},
{2,1,2},
{2,2,2},
{2,3,2},
{2,4,2},
{2,5,2},
{2,6,2},
{2,7,2}
};
static const uint8_t table_7_3_1_1_2_13[10][4] = {
{1,0,1,1},
{2,0,1,1},
{2,2,3,1},
{2,0,2,1},
{2,0,1,2},
{2,2,3,2},
{2,4,5,2},
{2,6,7,2},
{2,0,4,2},
{2,2,6,2}
};
static const uint8_t table_7_3_1_1_2_14[3][5] = {
{2,0,1,2,1},
{2,0,1,4,2},
{2,2,3,6,2}
};
static const uint8_t table_7_3_1_1_2_15[4][6] = {
{2,0,1,2,3,1},
{2,0,1,4,5,2},
{2,2,3,6,7,2},
{2,0,2,4,6,2}
};
static const uint8_t table_7_3_1_1_2_16[12][2] = {
{1,0},
{1,1},
{2,0},
{2,1},
{2,2},
{2,3},
{3,0},
{3,1},
{3,2},
{3,3},
{3,4},
{3,5}
};
static const uint8_t table_7_3_1_1_2_17[7][3] = {
{1,0,1},
{2,0,1},
{2,2,3},
{3,0,1},
{3,2,3},
{3,4,5},
{2,0,2}
};
static const uint8_t table_7_3_1_1_2_18[3][4] = {
{2,0,1,2},
{3,0,1,2},
{3,3,4,5}
};
static const uint8_t table_7_3_1_1_2_19[2][5] = {
{2,0,1,2,3},
{3,0,1,2,3}
};
static const uint8_t table_7_3_1_1_2_20[28][3] = {
{1,0,1},
{1,1,1},
{2,0,1},
{2,1,1},
{2,2,1},
{2,3,1},
{3,0,1},
{3,1,1},
{3,2,1},
{3,3,1},
{3,4,1},
{3,5,1},
{3,0,2},
{3,1,2},
{3,2,2},
{3,3,2},
{3,4,2},
{3,5,2},
{3,6,2},
{3,7,2},
{3,8,2},
{3,9,2},
{3,10,2},
{3,11,2},
{1,0,2},
{1,1,2},
{1,6,2},
{1,7,2}
};
static const uint8_t table_7_3_1_1_2_21[19][4] = {
{1,0,1,1},
{2,0,1,1},
{2,2,3,1},
{3,0,1,1},
{3,2,3,1},
{3,4,5,1},
{2,0,2,1},
{3,0,1,2},
{3,2,3,2},
{3,4,5,2},
{3,6,7,2},
{3,8,9,2},
{3,10,11,2},
{1,0,1,2},
{1,6,7,2},
{2,0,1,2},
{2,2,3,2},
{2,6,7,2},
{2,8,9,2}
};
static const uint8_t table_7_3_1_1_2_22[6][5] = {
{2,0,1,2,1},
{3,0,1,2,1},
{3,3,4,5,1},
{3,0,1,6,2},
{3,2,3,8,2},
{3,4,5,10,2}
};
static const uint8_t table_7_3_1_1_2_23[5][6] = {
{2,0,1,2,3,1},
{3,0,1,2,3,1},
{3,0,1,6,7,2},
{3,2,3,8,9,2},
{3,4,5,10,11,2}
};
static const uint8_t table_7_3_2_3_3_1[12][5] = {
{1,1,0,0,0},
{1,0,1,0,0},
{1,1,1,0,0},
{2,1,0,0,0},
{2,0,1,0,0},
{2,0,0,1,0},
{2,0,0,0,1},
{2,1,1,0,0},
{2,0,0,1,1},
{2,1,1,1,0},
{2,1,1,1,1},
{2,1,0,1,0}
};
static const uint8_t table_7_3_2_3_3_2_oneCodeword[31][10] = {
{1,1,0,0,0,0,0,0,0,1},
{1,0,1,0,0,0,0,0,0,1},
{1,1,1,0,0,0,0,0,0,1},
{2,1,0,0,0,0,0,0,0,1},
{2,0,1,0,0,0,0,0,0,1},
{2,0,0,1,0,0,0,0,0,1},
{2,0,0,0,1,0,0,0,0,1},
{2,1,1,0,0,0,0,0,0,1},
{2,0,0,1,1,0,0,0,0,1},
{2,1,1,1,0,0,0,0,0,1},
{2,1,1,1,1,0,0,0,0,1},
{2,1,0,1,0,0,0,0,0,1},
{2,1,0,0,0,0,0,0,0,2},
{2,0,1,0,0,0,0,0,0,2},
{2,0,0,1,0,0,0,0,0,2},
{2,0,0,0,1,0,0,0,0,2},
{2,0,0,0,0,1,0,0,0,2},
{2,0,0,0,0,0,1,0,0,2},
{2,0,0,0,0,0,0,1,0,2},
{2,0,0,0,0,0,0,0,1,2},
{2,1,1,0,0,0,0,0,0,2},
{2,0,0,1,1,0,0,0,0,2},
{2,0,0,0,0,1,1,0,0,2},
{2,0,0,0,0,0,0,1,1,2},
{2,1,0,0,0,1,0,0,0,2},
{2,0,0,1,0,0,0,1,0,2},
{2,1,1,0,0,1,0,0,0,2},
{2,0,0,1,1,0,0,1,0,2},
{2,1,1,0,0,1,1,0,0,2},
{2,0,0,1,1,0,0,1,1,2},
{2,1,0,1,0,1,0,1,0,2}
};
static const uint8_t table_7_3_2_3_3_2_twoCodeword[4][10] = {
{2,1,1,1,1,1,0,0,0,2},
{2,1,1,1,1,1,0,1,0,2},
{2,1,1,1,1,1,1,1,0,2},
{2,1,1,1,1,1,1,1,1,2}
};
static const uint8_t table_7_3_2_3_3_3_oneCodeword[24][7] = {
{1,1,0,0,0,0,0},
{1,0,1,0,0,0,0},
{1,1,1,0,0,0,0},
{2,1,0,0,0,0,0},
{2,0,1,0,0,0,0},
{2,0,0,1,0,0,0},
{2,0,0,0,1,0,0},
{2,1,1,0,0,0,0},
{2,0,0,1,1,0,0},
{2,1,1,1,0,0,0},
{2,1,1,1,1,0,0},
{3,1,0,0,0,0,0},
{3,0,1,0,0,0,0},
{3,0,0,1,0,0,0},
{3,0,0,0,1,0,0},
{3,0,0,0,0,1,0},
{3,0,0,0,0,0,1},
{3,1,1,0,0,0,0},
{3,0,0,1,1,0,0},
{3,0,0,0,0,1,1},
{3,1,1,1,0,0,0},
{3,0,0,0,1,1,1},
{3,1,1,1,1,0,0},
{3,1,0,1,0,0,0}
};
static const uint8_t table_7_3_2_3_3_3_twoCodeword[2][7] = {
{3,1,1,1,1,1,0},
{3,1,1,1,1,1,1}
};
static const uint8_t table_7_3_2_3_3_4_oneCodeword[58][14] = {
{1,1,0,0,0,0,0,0,0,0,0,0,0,1},
{1,0,1,0,0,0,0,0,0,0,0,0,0,1},
{1,1,1,0,0,0,0,0,0,0,0,0,0,1},
{2,1,0,0,0,0,0,0,0,0,0,0,0,1},
{2,0,1,0,0,0,0,0,0,0,0,0,0,1},
{2,0,0,1,0,0,0,0,0,0,0,0,0,1},
{2,0,0,0,1,0,0,0,0,0,0,0,0,1},
{2,1,1,0,0,0,0,0,0,0,0,0,0,1},
{2,0,0,1,1,0,0,0,0,0,0,0,0,1},
{2,1,1,1,0,0,0,0,0,0,0,0,0,1},
{2,1,1,1,1,0,0,0,0,0,0,0,0,1},
{3,1,0,0,0,0,0,0,0,0,0,0,0,1},
{3,0,1,0,0,0,0,0,0,0,0,0,0,1},
{3,0,0,1,0,0,0,0,0,0,0,0,0,1},
{3,0,0,0,1,0,0,0,0,0,0,0,0,1},
{3,0,0,0,0,1,0,0,0,0,0,0,0,1},
{3,0,0,0,0,0,1,0,0,0,0,0,0,1},
{3,1,1,0,0,0,0,0,0,0,0,0,0,1},
{3,0,0,1,1,0,0,0,0,0,0,0,0,1},
{3,0,0,0,0,1,1,0,0,0,0,0,0,1},
{3,1,1,1,0,0,0,0,0,0,0,0,0,1},
{3,0,0,0,1,1,1,0,0,0,0,0,0,1},
{3,1,1,1,1,0,0,0,0,0,0,0,0,1},
{2,1,0,1,0,0,0,0,0,0,0,0,0,1},
{3,1,0,0,0,0,0,0,0,0,0,0,0,2},
{3,0,1,0,0,0,0,0,0,0,0,0,0,2},
{3,0,0,1,0,0,0,0,0,0,0,0,0,2},
{3,0,0,0,1,0,0,0,0,0,0,0,0,2},
{3,0,0,0,0,1,0,0,0,0,0,0,0,2},
{3,0,0,0,0,0,1,0,0,0,0,0,0,2},
{3,0,0,0,0,0,0,1,0,0,0,0,0,2},
{3,0,0,0,0,0,0,0,1,0,0,0,0,2},
{3,0,0,0,0,0,0,0,0,1,0,0,0,2},
{3,0,0,0,0,0,0,0,0,0,1,0,0,2},
{3,0,0,0,0,0,0,0,0,0,0,1,0,2},
{3,0,0,0,0,0,0,0,0,0,0,0,1,2},
{3,1,1,0,0,0,0,0,0,0,0,0,0,2},
{3,0,0,1,1,0,0,0,0,0,0,0,0,2},
{3,0,0,0,0,1,1,0,0,0,0,0,0,2},
{3,0,0,0,0,0,0,1,1,0,0,0,0,2},
{3,0,0,0,0,0,0,0,0,1,1,0,0,2},
{3,0,0,0,0,0,0,0,0,0,0,1,1,2},
{3,1,1,0,0,0,0,1,0,0,0,0,0,2},
{3,0,0,1,1,0,0,0,0,1,0,0,0,2},
{3,0,0,0,0,1,1,0,0,0,0,1,0,2},
{3,1,1,0,0,0,0,1,1,0,0,0,0,2},
{3,0,0,1,1,0,0,0,0,1,1,0,0,2},
{3,0,0,0,0,1,1,0,0,0,0,1,1,2},
{1,1,0,0,0,0,0,0,0,0,0,0,0,2},
{1,0,1,0,0,0,0,0,0,0,0,0,0,2},
{1,0,0,0,0,0,0,1,0,0,0,0,0,2},
{1,0,0,0,0,0,0,0,1,0,0,0,0,2},
{1,1,1,0,0,0,0,0,0,0,0,0,0,2},
{1,0,0,0,0,0,0,1,1,0,0,0,0,2},
{2,1,1,0,0,0,0,0,0,0,0,0,0,2},
{2,0,0,1,1,0,0,0,0,0,0,0,0,2},
{2,0,0,0,0,0,0,1,1,0,0,0,0,2},
{2,0,0,0,0,0,0,0,0,1,1,0,0,2}
};
static const uint8_t table_7_3_2_3_3_4_twoCodeword[6][14] = {
{3,1,1,1,1,1,0,0,0,0,0,0,0,1},
{3,1,1,1,1,1,1,0,0,0,0,0,0,1},
{2,1,1,1,1,0,0,1,0,0,0,0,0,2},
{2,1,1,1,1,0,0,1,0,1,0,0,0,2},
{2,1,1,1,1,0,0,1,1,1,0,0,0,2},
{2,1,1,1,1,0,0,1,1,1,1,0,0,2},
};
// table 7.2-1 TS 38.321
static const uint32_t table_7_2_1[16] = {
5, // row index 0
10, // row index 1
20, // row index 2
30, // row index 3
40, // row index 4
60, // row index 5
80, // row index 6
120, // row index 7
160, // row index 8
240, // row index 9
320, // row index 10
480, // row index 11
960, // row index 12
1920, // row index 13
};
uint32_t get_backoff_indicator(int idx)
{
AssertFatal(idx < 16, "Backoff indicator index %d exeeding table size\n", idx);
return table_7_2_1[idx];
}
static inline uint16_t packBits(const uint8_t *toPack, const int nb)
{
int res = 0;
for (int i = 0; i < nb; i++)
res += (*toPack++) << i;
return res;
}
void set_antenna_port_parameters(fapi_nr_dl_config_dlsch_pdu_rel15_t *dlsch_pdu, int n_cw, long *max_length, long *dmrs, int ant)
{
if (dmrs == NULL) {
if (max_length == NULL) {
// Table 7.3.1.2.2-1: Antenna port(s) (1000 + DMRS port), dmrs-Type=1, maxLength=1
dlsch_pdu->n_dmrs_cdm_groups = table_7_3_2_3_3_1[ant][0];
dlsch_pdu->dmrs_ports = packBits(&table_7_3_2_3_3_1[ant][1], 4);
} else {
// Table 7.3.1.2.2-2: Antenna port(s) (1000 + DMRS port), dmrs-Type=1, maxLength=2
if (n_cw == 1) {
dlsch_pdu->n_dmrs_cdm_groups = table_7_3_2_3_3_2_oneCodeword[ant][0];
dlsch_pdu->dmrs_ports = packBits(&table_7_3_2_3_3_2_oneCodeword[ant][1], 8);
dlsch_pdu->n_front_load_symb = table_7_3_2_3_3_2_oneCodeword[ant][9];
}
if (n_cw == 2) {
dlsch_pdu->n_dmrs_cdm_groups = table_7_3_2_3_3_2_twoCodeword[ant][0];
dlsch_pdu->dmrs_ports = packBits(&table_7_3_2_3_3_2_twoCodeword[ant][1], 8);
dlsch_pdu->n_front_load_symb = table_7_3_2_3_3_2_twoCodeword[ant][9];
}
}
} else {
if (max_length == NULL) {
// Table 7.3.1.2.2-3: Antenna port(s) (1000 + DMRS port), dmrs-Type=2, maxLength=1
if (n_cw == 1) {
dlsch_pdu->n_dmrs_cdm_groups = table_7_3_2_3_3_3_oneCodeword[ant][0];
dlsch_pdu->dmrs_ports = packBits(&table_7_3_2_3_3_3_oneCodeword[ant][1], 6);
}
if (n_cw == 2) {
dlsch_pdu->n_dmrs_cdm_groups = table_7_3_2_3_3_3_twoCodeword[ant][0];
dlsch_pdu->dmrs_ports = packBits(&table_7_3_2_3_3_3_twoCodeword[ant][1], 6);
}
} else {
// Table 7.3.1.2.2-4: Antenna port(s) (1000 + DMRS port), dmrs-Type=2, maxLength=2
if (n_cw == 1) {
dlsch_pdu->n_dmrs_cdm_groups = table_7_3_2_3_3_4_oneCodeword[ant][0];
dlsch_pdu->dmrs_ports = packBits(&table_7_3_2_3_3_4_oneCodeword[ant][1], 12);
dlsch_pdu->n_front_load_symb = table_7_3_2_3_3_4_oneCodeword[ant][13];
}
if (n_cw == 2) {
dlsch_pdu->n_dmrs_cdm_groups = table_7_3_2_3_3_4_twoCodeword[ant][0];
dlsch_pdu->dmrs_ports = packBits(&table_7_3_2_3_3_4_twoCodeword[ant][1], 12);
dlsch_pdu->n_front_load_symb = table_7_3_2_3_3_4_twoCodeword[ant][13];
}
}
}
}
void ul_ports_config(NR_UE_MAC_INST_t *mac,
int *n_front_load_symb,
nfapi_nr_ue_pusch_pdu_t *pusch_config_pdu,
dci_pdu_rel15_t *dci,
nr_dci_format_t dci_format)
{
uint8_t rank = pusch_config_pdu->nrOfLayers;
NR_PUSCH_Config_t *pusch_Config = mac->current_UL_BWP->pusch_Config;
AssertFatal(pusch_Config != NULL, "pusch_Config shouldn't be null\n");
long transformPrecoder = pusch_config_pdu->transform_precoding;
LOG_D(NR_MAC,
"transformPrecoder %s\n",
transformPrecoder == NR_PUSCH_Config__transformPrecoder_disabled ? "disabled" : "enabled");
long *max_length = NULL;
long *dmrs_type = NULL;
if (pusch_Config->dmrs_UplinkForPUSCH_MappingTypeA) {
max_length = pusch_Config->dmrs_UplinkForPUSCH_MappingTypeA->choice.setup->maxLength;
dmrs_type = pusch_Config->dmrs_UplinkForPUSCH_MappingTypeA->choice.setup->dmrs_Type;
} else {
max_length = pusch_Config->dmrs_UplinkForPUSCH_MappingTypeB->choice.setup->maxLength;
dmrs_type = pusch_Config->dmrs_UplinkForPUSCH_MappingTypeB->choice.setup->dmrs_Type;
}
int val = dci->antenna_ports.val;
LOG_D(NR_MAC,
"MappingType%s max_length %s, dmrs_type %s, antenna_ports %d\n",
pusch_Config->dmrs_UplinkForPUSCH_MappingTypeA ? "A" : "B",
max_length ? "len2" : "len1",
dmrs_type ? "type2" : "type1",
val);
if ((transformPrecoder == NR_PUSCH_Config__transformPrecoder_enabled)
&& (dmrs_type == NULL)
&& (max_length == NULL)) { // tables 7.3.1.1.2-6
pusch_config_pdu->num_dmrs_cdm_grps_no_data = 2;
pusch_config_pdu->dmrs_ports = 1 << val;
}
if ((transformPrecoder == NR_PUSCH_Config__transformPrecoder_enabled)
&& (dmrs_type == NULL)
&& (max_length != NULL)) { // tables 7.3.1.1.2-7
pusch_config_pdu->num_dmrs_cdm_grps_no_data = 2; //TBC
pusch_config_pdu->dmrs_ports = 1 << ((val > 3) ? (val - 4) : (val));
*n_front_load_symb = (val > 3) ? 2 : 1;
}
if ((transformPrecoder == NR_PUSCH_Config__transformPrecoder_disabled)
&& (dmrs_type == NULL)
&& (max_length == NULL)) { // tables 7.3.1.1.2-8/9/10/11
if (rank == 1) {
pusch_config_pdu->num_dmrs_cdm_grps_no_data = (val > 1) ? 2 : 1;
pusch_config_pdu->dmrs_ports = 1 << ((val > 1) ? (val - 2) : (val));
}
if (rank == 2) {
pusch_config_pdu->num_dmrs_cdm_grps_no_data = (val > 0) ? 2 : 1;
pusch_config_pdu->dmrs_ports = (val > 1) ? ((val > 2) ? 0x5 : 0xc) : 0x3;
}
if (rank == 3) {
pusch_config_pdu->num_dmrs_cdm_grps_no_data = 2;
pusch_config_pdu->dmrs_ports = 0x7; // ports 0-2
}
if (rank == 4) {
pusch_config_pdu->num_dmrs_cdm_grps_no_data = 2;
pusch_config_pdu->dmrs_ports = 0xf; // ports 0-3
}
}
if ((transformPrecoder == NR_PUSCH_Config__transformPrecoder_disabled)
&& (dmrs_type == NULL)
&& (max_length != NULL)) { // tables 7.3.1.1.2-12/13/14/15
if (rank == 1) {
pusch_config_pdu->num_dmrs_cdm_grps_no_data = table_7_3_1_1_2_12[val][0];
pusch_config_pdu->dmrs_ports = 1 << table_7_3_1_1_2_12[val][1];
*n_front_load_symb = table_7_3_1_1_2_12[val][2];
}
if (rank == 2) {
pusch_config_pdu->num_dmrs_cdm_grps_no_data = table_7_3_1_1_2_13[val][0];
pusch_config_pdu->dmrs_ports = packBits(&table_7_3_1_1_2_13[val][1], 2);
*n_front_load_symb = table_7_3_1_1_2_13[val][3];
}
if (rank == 3) {
pusch_config_pdu->num_dmrs_cdm_grps_no_data = table_7_3_1_1_2_14[val][0];
pusch_config_pdu->dmrs_ports = packBits(&table_7_3_1_1_2_14[val][1], 3);
*n_front_load_symb = table_7_3_1_1_2_14[val][4];
}
if (rank == 4) {
pusch_config_pdu->num_dmrs_cdm_grps_no_data = table_7_3_1_1_2_15[val][0];
pusch_config_pdu->dmrs_ports = packBits(&table_7_3_1_1_2_15[val][1], 4);
*n_front_load_symb = table_7_3_1_1_2_15[val][5];
}
}
if ((transformPrecoder == NR_PUSCH_Config__transformPrecoder_disabled)
&& (dmrs_type != NULL)
&& (max_length == NULL)) { // tables 7.3.1.1.2-16/17/18/19
if (rank == 1) {
pusch_config_pdu->num_dmrs_cdm_grps_no_data = table_7_3_1_1_2_16[val][0];
pusch_config_pdu->dmrs_ports = 1 << table_7_3_1_1_2_16[val][1];
}
if (rank == 2) {
pusch_config_pdu->num_dmrs_cdm_grps_no_data = table_7_3_1_1_2_17[val][0];
pusch_config_pdu->dmrs_ports = packBits(&table_7_3_1_1_2_17[val][1], 2);
}
if (rank == 3) {
pusch_config_pdu->num_dmrs_cdm_grps_no_data = table_7_3_1_1_2_18[val][0];
pusch_config_pdu->dmrs_ports = packBits(&table_7_3_1_1_2_18[val][1], 3);
}
if (rank == 4) {
pusch_config_pdu->num_dmrs_cdm_grps_no_data = table_7_3_1_1_2_19[val][0];
pusch_config_pdu->dmrs_ports = packBits(&table_7_3_1_1_2_19[val][1], 4);
}
}
if ((transformPrecoder == NR_PUSCH_Config__transformPrecoder_disabled)
&& (dmrs_type != NULL)
&& (max_length != NULL)) { // tables 7.3.1.1.2-20/21/22/23
if (rank == 1) {
pusch_config_pdu->num_dmrs_cdm_grps_no_data = table_7_3_1_1_2_20[val][0];
pusch_config_pdu->dmrs_ports = 1 << table_7_3_1_1_2_20[val][1];
*n_front_load_symb = table_7_3_1_1_2_20[val][2];
}
if (rank == 2) {
pusch_config_pdu->num_dmrs_cdm_grps_no_data = table_7_3_1_1_2_21[val][0];
pusch_config_pdu->dmrs_ports = packBits(&table_7_3_1_1_2_21[val][1], 2);
*n_front_load_symb = table_7_3_1_1_2_21[val][3];
}
if (rank == 3) {
pusch_config_pdu->num_dmrs_cdm_grps_no_data = table_7_3_1_1_2_22[val][0];
pusch_config_pdu->dmrs_ports = packBits(&table_7_3_1_1_2_22[val][1], 3);
*n_front_load_symb = table_7_3_1_1_2_22[val][4];
}
if (rank == 4) {
pusch_config_pdu->num_dmrs_cdm_grps_no_data = table_7_3_1_1_2_23[val][0];
pusch_config_pdu->dmrs_ports = packBits(&table_7_3_1_1_2_23[val][1], 4);
*n_front_load_symb = table_7_3_1_1_2_23[val][5];
}
}
LOG_D(NR_MAC,
"num_dmrs_cdm_grps_no_data %d, dmrs_ports %d\n",
pusch_config_pdu->num_dmrs_cdm_grps_no_data,
pusch_config_pdu->dmrs_ports);
}
void set_precoding_information_parameters(nfapi_nr_ue_pusch_pdu_t *pusch_config_pdu,
int n_antenna_port,
long transformPrecoder,
int precoding_information,
NR_PUSCH_Config_t *pusch_Config)
{
// 1 antenna port and the higher layer parameter txConfig = codebook 0 bits
if (n_antenna_port == 4) { // 4 antenna port and the higher layer parameter txConfig = codebook
// Table 7.3.1.1.2-2: transformPrecoder=disabled and maxRank = 2 or 3 or 4
if ((transformPrecoder == NR_PUSCH_Config__transformPrecoder_disabled)
&& ((*pusch_Config->maxRank == 2) || (*pusch_Config->maxRank == 3) || (*pusch_Config->maxRank == 4))) {
if (*pusch_Config->codebookSubset == NR_PUSCH_Config__codebookSubset_fullyAndPartialAndNonCoherent) {
pusch_config_pdu->nrOfLayers = table_7_3_1_1_2_2_3_4_5[precoding_information][0];
pusch_config_pdu->Tpmi = table_7_3_1_1_2_2_3_4_5[precoding_information][1];
}
if (*pusch_Config->codebookSubset == NR_PUSCH_Config__codebookSubset_partialAndNonCoherent){
pusch_config_pdu->nrOfLayers = table_7_3_1_1_2_2_3_4_5[precoding_information][2];
pusch_config_pdu->Tpmi = table_7_3_1_1_2_2_3_4_5[precoding_information][3];
}
if (*pusch_Config->codebookSubset == NR_PUSCH_Config__codebookSubset_nonCoherent){
pusch_config_pdu->nrOfLayers = table_7_3_1_1_2_2_3_4_5[precoding_information][4];
pusch_config_pdu->Tpmi = table_7_3_1_1_2_2_3_4_5[precoding_information][5];
}
}
// Table 7.3.1.1.2-3: transformPrecoder= enabled, or transformPrecoder=disabled and maxRank = 1
if (((transformPrecoder == NR_PUSCH_Config__transformPrecoder_enabled)
|| (transformPrecoder == NR_PUSCH_Config__transformPrecoder_disabled))
&& (*pusch_Config->maxRank == 1)) {
if (*pusch_Config->codebookSubset == NR_PUSCH_Config__codebookSubset_fullyAndPartialAndNonCoherent) {
pusch_config_pdu->nrOfLayers = table_7_3_1_1_2_2_3_4_5[precoding_information][6];
pusch_config_pdu->Tpmi = table_7_3_1_1_2_2_3_4_5[precoding_information][7];
}
if (*pusch_Config->codebookSubset == NR_PUSCH_Config__codebookSubset_partialAndNonCoherent){
pusch_config_pdu->nrOfLayers = table_7_3_1_1_2_2_3_4_5[precoding_information][8];
pusch_config_pdu->Tpmi = table_7_3_1_1_2_2_3_4_5[precoding_information][9];
}
if (*pusch_Config->codebookSubset == NR_PUSCH_Config__codebookSubset_nonCoherent){
pusch_config_pdu->nrOfLayers = table_7_3_1_1_2_2_3_4_5[precoding_information][10];
pusch_config_pdu->Tpmi = table_7_3_1_1_2_2_3_4_5[precoding_information][11];
}
}
}
if (n_antenna_port == 2) {
// 2 antenna port and the higher layer parameter txConfig = codebook
// Table 7.3.1.1.2-4: transformPrecoder=disabled and maxRank = 2
if ((transformPrecoder == NR_PUSCH_Config__transformPrecoder_disabled) && (*pusch_Config->maxRank == 2)) {
if (*pusch_Config->codebookSubset == NR_PUSCH_Config__codebookSubset_fullyAndPartialAndNonCoherent) {
pusch_config_pdu->nrOfLayers = table_7_3_1_1_2_2_3_4_5[precoding_information][12];
pusch_config_pdu->Tpmi = table_7_3_1_1_2_2_3_4_5[precoding_information][13];
}
if (*pusch_Config->codebookSubset == NR_PUSCH_Config__codebookSubset_nonCoherent){
pusch_config_pdu->nrOfLayers = table_7_3_1_1_2_2_3_4_5[precoding_information][14];
pusch_config_pdu->Tpmi = table_7_3_1_1_2_2_3_4_5[precoding_information][15];
}
}
// Table 7.3.1.1.2-5: transformPrecoder= enabled, or transformPrecoder= disabled and maxRank = 1
if (((transformPrecoder == NR_PUSCH_Config__transformPrecoder_enabled)
|| (transformPrecoder == NR_PUSCH_Config__transformPrecoder_disabled))
&& (*pusch_Config->maxRank == 1)) {
if (*pusch_Config->codebookSubset == NR_PUSCH_Config__codebookSubset_fullyAndPartialAndNonCoherent) {
pusch_config_pdu->nrOfLayers = table_7_3_1_1_2_2_3_4_5[precoding_information][16];
pusch_config_pdu->Tpmi = table_7_3_1_1_2_2_3_4_5[precoding_information][17];
}
if (*pusch_Config->codebookSubset == NR_PUSCH_Config__codebookSubset_nonCoherent){
pusch_config_pdu->nrOfLayers = table_7_3_1_1_2_2_3_4_5[precoding_information][18];
pusch_config_pdu->Tpmi = table_7_3_1_1_2_2_3_4_5[precoding_information][19];
}
}
}
}
openair2/LAYER2/NR_MAC_UE/mac_vars.c
-430
View File
@@ -1,430 +0,0 @@
/*
* Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership.
* The OpenAirInterface Software Alliance licenses this file to You under
* the OAI Public License, Version 1.1 (the "License"); you may not use this file
* except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.openairinterface.org/?page_id=698
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*-------------------------------------------------------------------------------
* For more information about the OpenAirInterface (OAI) Software Alliance:
* contact@openairinterface.org
*/
/* \file vars.h
* \brief MAC Layer variables
* \author R. Knopp, K.H. HSU
* \date 2018
* \version 0.1
* \company Eurecom / NTUST
* \email: knopp@eurecom.fr, kai-hsiang.hsu@eurecom.fr
* \note
* \warning
*/
#include <stdint.h>
// table_7_3_1_1_2_2_3_4_5 contains values for number of layers and precoding information for tables 7.3.1.1.2-2/3/4/5 from TS 38.212 subclause 7.3.1.1.2
// the first 6 columns contain table 7.3.1.1.2-2: Precoding information and number of layers, for 4 antenna ports, if transformPrecoder=disabled and maxRank = 2 or 3 or 4
// next six columns contain table 7.3.1.1.2-3: Precoding information and number of layers for 4 antenna ports, if transformPrecoder= enabled, or if transformPrecoder=disabled and maxRank = 1
// next four columns contain table 7.3.1.1.2-4: Precoding information and number of layers, for 2 antenna ports, if transformPrecoder=disabled and maxRank = 2
// next four columns contain table 7.3.1.1.2-5: Precoding information and number of layers, for 2 antenna ports, if transformPrecoder= enabled, or if transformPrecoder= disabled and maxRank = 1
const uint8_t table_7_3_1_1_2_2_3_4_5[64][20] = {
{1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0, 1, 0},
{1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1},
{1, 2, 1, 2, 1, 2, 1, 2, 1, 2, 1, 2, 2, 0, 2, 0, 1, 2, 0, 0},
{1, 3, 1, 3, 1, 3, 1, 3, 1, 3, 1, 3, 1, 2, 0, 0, 1, 3, 0, 0},
{2, 0, 2, 0, 2, 0, 1, 4, 1, 4, 0, 0, 1, 3, 0, 0, 1, 4, 0, 0},
{2, 1, 2, 1, 2, 1, 1, 5, 1, 5, 0, 0, 1, 4, 0, 0, 1, 5, 0, 0},
{2, 2, 2, 2, 2, 2, 1, 6, 1, 6, 0, 0, 1, 5, 0, 0, 0, 0, 0, 0},
{2, 3, 2, 3, 2, 3, 1, 7, 1, 7, 0, 0, 2, 1, 0, 0, 0, 0, 0, 0},
{2, 4, 2, 4, 2, 4, 1, 8, 1, 8, 0, 0, 2, 2, 0, 0, 0, 0, 0, 0},
{2, 5, 2, 5, 2, 5, 1, 9, 1, 9, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
{3, 0, 3, 0, 3, 0, 1, 10, 1, 10, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
{4, 0, 4, 0, 4, 0, 1, 11, 1, 11, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
{1, 4, 1, 4, 0, 0, 1, 12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
{1, 5, 1, 5, 0, 0, 1, 13, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
{1, 6, 1, 6, 0, 0, 1, 14, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
{1, 7, 1, 7, 0, 0, 1, 15, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
{1, 8, 1, 8, 0, 0, 1, 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
{1, 9, 1, 9, 0, 0, 1, 17, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
{1, 10, 1, 10, 0, 0, 1, 18, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
{1, 11, 1, 11, 0, 0, 1, 19, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
{2, 6, 2, 6, 0, 0, 1, 20, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
{2, 7, 2, 7, 0, 0, 1, 21, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
{2, 8, 2, 8, 0, 0, 1, 22, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
{2, 9, 2, 9, 0, 0, 1, 23, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
{2, 10, 2, 10, 0, 0, 1, 24, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
{2, 11, 2, 11, 0, 0, 1, 25, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
{2, 12, 2, 12, 0, 0, 1, 26, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
{2, 13, 2, 13, 0, 0, 1, 27, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
{3, 1, 3, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
{3, 2, 3, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
{4, 1, 4, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
{4, 2, 4, 2, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
{1, 12, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
{1, 13, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
{1, 14, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
{1, 15, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
{1, 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
{1, 17, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
{1, 18, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
{1, 19, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
{1, 20, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
{1, 21, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
{1, 22, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
{1, 23, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
{1, 24, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
{1, 25, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
{1, 26, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
{1, 27, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
{2, 14, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
{2, 15, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
{2, 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
{2, 17, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
{2, 18, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
{2, 19, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
{2, 20, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
{2, 21, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
{3, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
{3, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
{3, 5, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
{3, 6, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
{4, 3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
{4, 4, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}
};
const uint8_t table_7_3_1_1_2_12[14][3] = {
{1,0,1},
{1,1,1},
{2,0,1},
{2,1,1},
{2,2,1},
{2,3,1},
{2,0,2},
{2,1,2},
{2,2,2},
{2,3,2},
{2,4,2},
{2,5,2},
{2,6,2},
{2,7,2}
};
const uint8_t table_7_3_1_1_2_13[10][4] = {
{1,0,1,1},
{2,0,1,1},
{2,2,3,1},
{2,0,2,1},
{2,0,1,2},
{2,2,3,2},
{2,4,5,2},
{2,6,7,2},
{2,0,4,2},
{2,2,6,2}
};
const uint8_t table_7_3_1_1_2_14[3][5] = {
{2,0,1,2,1},
{2,0,1,4,2},
{2,2,3,6,2}
};
const uint8_t table_7_3_1_1_2_15[4][6] = {
{2,0,1,2,3,1},
{2,0,1,4,5,2},
{2,2,3,6,7,2},
{2,0,2,4,6,2}
};
const uint8_t table_7_3_1_1_2_16[12][2] = {
{1,0},
{1,1},
{2,0},
{2,1},
{2,2},
{2,3},
{3,0},
{3,1},
{3,2},
{3,3},
{3,4},
{3,5}
};
const uint8_t table_7_3_1_1_2_17[7][3] = {
{1,0,1},
{2,0,1},
{2,2,3},
{3,0,1},
{3,2,3},
{3,4,5},
{2,0,2}
};
const uint8_t table_7_3_1_1_2_18[3][4] = {
{2,0,1,2},
{3,0,1,2},
{3,3,4,5}
};
const uint8_t table_7_3_1_1_2_19[2][5] = {
{2,0,1,2,3},
{3,0,1,2,3}
};
const uint8_t table_7_3_1_1_2_20[28][3] = {
{1,0,1},
{1,1,1},
{2,0,1},
{2,1,1},
{2,2,1},
{2,3,1},
{3,0,1},
{3,1,1},
{3,2,1},
{3,3,1},
{3,4,1},
{3,5,1},
{3,0,2},
{3,1,2},
{3,2,2},
{3,3,2},
{3,4,2},
{3,5,2},
{3,6,2},
{3,7,2},
{3,8,2},
{3,9,2},
{3,10,2},
{3,11,2},
{1,0,2},
{1,1,2},
{1,6,2},
{1,7,2}
};
const uint8_t table_7_3_1_1_2_21[19][4] = {
{1,0,1,1},
{2,0,1,1},
{2,2,3,1},
{3,0,1,1},
{3,2,3,1},
{3,4,5,1},
{2,0,2,1},
{3,0,1,2},
{3,2,3,2},
{3,4,5,2},
{3,6,7,2},
{3,8,9,2},
{3,10,11,2},
{1,0,1,2},
{1,6,7,2},
{2,0,1,2},
{2,2,3,2},
{2,6,7,2},
{2,8,9,2}
};
const uint8_t table_7_3_1_1_2_22[6][5] = {
{2,0,1,2,1},
{3,0,1,2,1},
{3,3,4,5,1},
{3,0,1,6,2},
{3,2,3,8,2},
{3,4,5,10,2}
};
const uint8_t table_7_3_1_1_2_23[5][6] = {
{2,0,1,2,3,1},
{3,0,1,2,3,1},
{3,0,1,6,7,2},
{3,2,3,8,9,2},
{3,4,5,10,11,2}
};
const uint8_t table_7_3_2_3_3_1[12][5] = {
{1,1,0,0,0},
{1,0,1,0,0},
{1,1,1,0,0},
{2,1,0,0,0},
{2,0,1,0,0},
{2,0,0,1,0},
{2,0,0,0,1},
{2,1,1,0,0},
{2,0,0,1,1},
{2,1,1,1,0},
{2,1,1,1,1},
{2,1,0,1,0}
};
const uint8_t table_7_3_2_3_3_2_oneCodeword[31][10] = {
{1,1,0,0,0,0,0,0,0,1},
{1,0,1,0,0,0,0,0,0,1},
{1,1,1,0,0,0,0,0,0,1},
{2,1,0,0,0,0,0,0,0,1},
{2,0,1,0,0,0,0,0,0,1},
{2,0,0,1,0,0,0,0,0,1},
{2,0,0,0,1,0,0,0,0,1},
{2,1,1,0,0,0,0,0,0,1},
{2,0,0,1,1,0,0,0,0,1},
{2,1,1,1,0,0,0,0,0,1},
{2,1,1,1,1,0,0,0,0,1},
{2,1,0,1,0,0,0,0,0,1},
{2,1,0,0,0,0,0,0,0,2},
{2,0,1,0,0,0,0,0,0,2},
{2,0,0,1,0,0,0,0,0,2},
{2,0,0,0,1,0,0,0,0,2},
{2,0,0,0,0,1,0,0,0,2},
{2,0,0,0,0,0,1,0,0,2},
{2,0,0,0,0,0,0,1,0,2},
{2,0,0,0,0,0,0,0,1,2},
{2,1,1,0,0,0,0,0,0,2},
{2,0,0,1,1,0,0,0,0,2},
{2,0,0,0,0,1,1,0,0,2},
{2,0,0,0,0,0,0,1,1,2},
{2,1,0,0,0,1,0,0,0,2},
{2,0,0,1,0,0,0,1,0,2},
{2,1,1,0,0,1,0,0,0,2},
{2,0,0,1,1,0,0,1,0,2},
{2,1,1,0,0,1,1,0,0,2},
{2,0,0,1,1,0,0,1,1,2},
{2,1,0,1,0,1,0,1,0,2}
};
const uint8_t table_7_3_2_3_3_2_twoCodeword[4][10] = {
{2,1,1,1,1,1,0,0,0,2},
{2,1,1,1,1,1,0,1,0,2},
{2,1,1,1,1,1,1,1,0,2},
{2,1,1,1,1,1,1,1,1,2}
};
const uint8_t table_7_3_2_3_3_3_oneCodeword[24][7] = {
{1,1,0,0,0,0,0},
{1,0,1,0,0,0,0},
{1,1,1,0,0,0,0},
{2,1,0,0,0,0,0},
{2,0,1,0,0,0,0},
{2,0,0,1,0,0,0},
{2,0,0,0,1,0,0},
{2,1,1,0,0,0,0},
{2,0,0,1,1,0,0},
{2,1,1,1,0,0,0},
{2,1,1,1,1,0,0},
{3,1,0,0,0,0,0},
{3,0,1,0,0,0,0},
{3,0,0,1,0,0,0},
{3,0,0,0,1,0,0},
{3,0,0,0,0,1,0},
{3,0,0,0,0,0,1},
{3,1,1,0,0,0,0},
{3,0,0,1,1,0,0},
{3,0,0,0,0,1,1},
{3,1,1,1,0,0,0},
{3,0,0,0,1,1,1},
{3,1,1,1,1,0,0},
{3,1,0,1,0,0,0}
};
const uint8_t table_7_3_2_3_3_3_twoCodeword[2][7] = {
{3,1,1,1,1,1,0},
{3,1,1,1,1,1,1}
};
const uint8_t table_7_3_2_3_3_4_oneCodeword[58][14] = {
{1,1,0,0,0,0,0,0,0,0,0,0,0,1},
{1,0,1,0,0,0,0,0,0,0,0,0,0,1},
{1,1,1,0,0,0,0,0,0,0,0,0,0,1},
{2,1,0,0,0,0,0,0,0,0,0,0,0,1},
{2,0,1,0,0,0,0,0,0,0,0,0,0,1},
{2,0,0,1,0,0,0,0,0,0,0,0,0,1},
{2,0,0,0,1,0,0,0,0,0,0,0,0,1},
{2,1,1,0,0,0,0,0,0,0,0,0,0,1},
{2,0,0,1,1,0,0,0,0,0,0,0,0,1},
{2,1,1,1,0,0,0,0,0,0,0,0,0,1},
{2,1,1,1,1,0,0,0,0,0,0,0,0,1},
{3,1,0,0,0,0,0,0,0,0,0,0,0,1},
{3,0,1,0,0,0,0,0,0,0,0,0,0,1},
{3,0,0,1,0,0,0,0,0,0,0,0,0,1},
{3,0,0,0,1,0,0,0,0,0,0,0,0,1},
{3,0,0,0,0,1,0,0,0,0,0,0,0,1},
{3,0,0,0,0,0,1,0,0,0,0,0,0,1},
{3,1,1,0,0,0,0,0,0,0,0,0,0,1},
{3,0,0,1,1,0,0,0,0,0,0,0,0,1},
{3,0,0,0,0,1,1,0,0,0,0,0,0,1},
{3,1,1,1,0,0,0,0,0,0,0,0,0,1},
{3,0,0,0,1,1,1,0,0,0,0,0,0,1},
{3,1,1,1,1,0,0,0,0,0,0,0,0,1},
{2,1,0,1,0,0,0,0,0,0,0,0,0,1},
{3,1,0,0,0,0,0,0,0,0,0,0,0,2},
{3,0,1,0,0,0,0,0,0,0,0,0,0,2},
{3,0,0,1,0,0,0,0,0,0,0,0,0,2},
{3,0,0,0,1,0,0,0,0,0,0,0,0,2},
{3,0,0,0,0,1,0,0,0,0,0,0,0,2},
{3,0,0,0,0,0,1,0,0,0,0,0,0,2},
{3,0,0,0,0,0,0,1,0,0,0,0,0,2},
{3,0,0,0,0,0,0,0,1,0,0,0,0,2},
{3,0,0,0,0,0,0,0,0,1,0,0,0,2},
{3,0,0,0,0,0,0,0,0,0,1,0,0,2},
{3,0,0,0,0,0,0,0,0,0,0,1,0,2},
{3,0,0,0,0,0,0,0,0,0,0,0,1,2},
{3,1,1,0,0,0,0,0,0,0,0,0,0,2},
{3,0,0,1,1,0,0,0,0,0,0,0,0,2},
{3,0,0,0,0,1,1,0,0,0,0,0,0,2},
{3,0,0,0,0,0,0,1,1,0,0,0,0,2},
{3,0,0,0,0,0,0,0,0,1,1,0,0,2},
{3,0,0,0,0,0,0,0,0,0,0,1,1,2},
{3,1,1,0,0,0,0,1,0,0,0,0,0,2},
{3,0,0,1,1,0,0,0,0,1,0,0,0,2},
{3,0,0,0,0,1,1,0,0,0,0,1,0,2},
{3,1,1,0,0,0,0,1,1,0,0,0,0,2},
{3,0,0,1,1,0,0,0,0,1,1,0,0,2},
{3,0,0,0,0,1,1,0,0,0,0,1,1,2},
{1,1,0,0,0,0,0,0,0,0,0,0,0,2},
{1,0,1,0,0,0,0,0,0,0,0,0,0,2},
{1,0,0,0,0,0,0,1,0,0,0,0,0,2},
{1,0,0,0,0,0,0,0,1,0,0,0,0,2},
{1,1,1,0,0,0,0,0,0,0,0,0,0,2},
{1,0,0,0,0,0,0,1,1,0,0,0,0,2},
{2,1,1,0,0,0,0,0,0,0,0,0,0,2},
{2,0,0,1,1,0,0,0,0,0,0,0,0,2},
{2,0,0,0,0,0,0,1,1,0,0,0,0,2},
{2,0,0,0,0,0,0,0,0,1,1,0,0,2}
};
const uint8_t table_7_3_2_3_3_4_twoCodeword[6][14] = {
{3,1,1,1,1,1,0,0,0,0,0,0,0,1},
{3,1,1,1,1,1,1,0,0,0,0,0,0,1},
{2,1,1,1,1,0,0,1,0,0,0,0,0,2},
{2,1,1,1,1,0,0,1,0,1,0,0,0,2},
{2,1,1,1,1,0,0,1,1,1,0,0,0,2},
{2,1,1,1,1,0,0,1,1,1,1,0,0,2},
};
// table 7.2-1 TS 38.321
const uint16_t table_7_2_1[16] = {
5, // row index 0
10, // row index 1
20, // row index 2
30, // row index 3
40, // row index 4
60, // row index 5
80, // row index 6
120, // row index 7
160, // row index 8
240, // row index 9
320, // row index 10
480, // row index 11
960, // row index 12
1920, // row index 13
};
openair2/LAYER2/NR_MAC_UE/nr_ra_procedures.c
-2
View File
@@ -34,10 +34,8 @@
#include "RRC/NR_UE/L2_interface_ue.h"
/* MAC */
#include "LAYER2/NR_MAC_COMMON/nr_mac_extern.h"
#include "NR_MAC_COMMON/nr_mac.h"
#include "LAYER2/NR_MAC_UE/mac_proto.h"
#include <executables/softmodem-common.h>
#include "openair2/LAYER2/RLC/rlc.h"
#include "openair2/LAYER2/NR_MAC_UE/mac_defs.h"
openair2/LAYER2/NR_MAC_UE/nr_ue_dci_configuration.c
-1
View File
@@ -33,7 +33,6 @@
#include "mac_proto.h"
#include "mac_defs.h"
#include "assertions.h"
#include "LAYER2/NR_MAC_UE/mac_extern.h"
#include "mac_defs.h"
#include "common/utils/nr/nr_common.h"
#include "executables/softmodem-common.h"
openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c
+4 -57
View File
@@ -43,8 +43,6 @@
/* MAC */
#include "NR_MAC_COMMON/nr_mac.h"
#include "NR_MAC_UE/mac_proto.h"
#include "NR_MAC_UE/mac_extern.h"
#include "NR_MAC_COMMON/nr_mac_extern.h"
#include "common/utils/nr/nr_common.h"
#include "openair2/NR_UE_PHY_INTERFACE/NR_Packet_Drop.h"
@@ -56,6 +54,7 @@
#include "oai_asn1.h"
#include "common/utils/LOG/log.h"
#include "common/utils/LOG/vcd_signal_dumper.h"
#include "openair2/LAYER2/RLC/rlc.h"
// #define DEBUG_MIB
// #define ENABLE_MAC_PAYLOAD_DEBUG 1
@@ -973,14 +972,6 @@ static int nr_ue_process_dci_dl_10(NR_UE_MAC_INST_t *mac,
return 0;
}
static inline uint16_t packBits(const uint8_t *toPack, const int nb)
{
int res = 0;
for (int i = 0; i < nb; i++)
res += (*toPack++) << i;
return res;
}
static int nr_ue_process_dci_dl_11(NR_UE_MAC_INST_t *mac,
frame_t frame,
int slot,
@@ -1179,53 +1170,9 @@ static int nr_ue_process_dci_dl_11(NR_UE_MAC_INST_t *mac,
long *dmrs_type = dl_dmrs_config->dmrs_Type;
dlsch_pdu->n_front_load_symb = 1; // default value
const int ant = dci->antenna_ports.val;
set_antenna_port_parameters(dlsch_pdu, n_codewords, max_length, dmrs_type, dci->antenna_ports.val);
if (dmrs_type == NULL) {
if (max_length == NULL) {
// Table 7.3.1.2.2-1: Antenna port(s) (1000 + DMRS port), dmrs-Type=1, maxLength=1
dlsch_pdu->n_dmrs_cdm_groups = table_7_3_2_3_3_1[ant][0];
dlsch_pdu->dmrs_ports = packBits(&table_7_3_2_3_3_1[ant][1], 4);
} else {
// Table 7.3.1.2.2-2: Antenna port(s) (1000 + DMRS port), dmrs-Type=1, maxLength=2
if (n_codewords == 1) {
dlsch_pdu->n_dmrs_cdm_groups = table_7_3_2_3_3_2_oneCodeword[ant][0];
dlsch_pdu->dmrs_ports = packBits(&table_7_3_2_3_3_2_oneCodeword[ant][1], 8);
dlsch_pdu->n_front_load_symb = table_7_3_2_3_3_2_oneCodeword[ant][9];
}
if (n_codewords == 2) {
dlsch_pdu->n_dmrs_cdm_groups = table_7_3_2_3_3_2_twoCodeword[ant][0];
dlsch_pdu->dmrs_ports = packBits(&table_7_3_2_3_3_2_twoCodeword[ant][1], 8);
dlsch_pdu->n_front_load_symb = table_7_3_2_3_3_2_twoCodeword[ant][9];
}
}
} else {
if (max_length == NULL) {
// Table 7.3.1.2.2-3: Antenna port(s) (1000 + DMRS port), dmrs-Type=2, maxLength=1
if (n_codewords == 1) {
dlsch_pdu->n_dmrs_cdm_groups = table_7_3_2_3_3_3_oneCodeword[ant][0];
dlsch_pdu->dmrs_ports = packBits(&table_7_3_2_3_3_3_oneCodeword[ant][1], 6);
}
if (n_codewords == 2) {
dlsch_pdu->n_dmrs_cdm_groups = table_7_3_2_3_3_3_twoCodeword[ant][0];
dlsch_pdu->dmrs_ports = packBits(&table_7_3_2_3_3_3_twoCodeword[ant][1], 6);
}
} else {
// Table 7.3.1.2.2-4: Antenna port(s) (1000 + DMRS port), dmrs-Type=2, maxLength=2
if (n_codewords == 1) {
dlsch_pdu->n_dmrs_cdm_groups = table_7_3_2_3_3_4_oneCodeword[ant][0];
dlsch_pdu->dmrs_ports = packBits(&table_7_3_2_3_3_4_oneCodeword[ant][1], 12);
dlsch_pdu->n_front_load_symb = table_7_3_2_3_3_4_oneCodeword[ant][13];
}
if (n_codewords == 2) {
dlsch_pdu->n_dmrs_cdm_groups = table_7_3_2_3_3_4_twoCodeword[ant][0];
dlsch_pdu->dmrs_ports = packBits(&table_7_3_2_3_3_4_twoCodeword[ant][1], 12);
dlsch_pdu->n_front_load_symb = table_7_3_2_3_3_4_twoCodeword[ant][13];
}
}
}
/* dmrs symbol positions*/
/* dmrs symbol positions*/
dlsch_pdu->dlDmrsSymbPos = fill_dmrs_mask(pdsch_Config,
NR_DL_DCI_FORMAT_1_1,
mac->dmrs_TypeA_Position,
@@ -3968,7 +3915,7 @@ static void nr_ue_process_rar(NR_UE_MAC_INST_t *mac, nr_downlink_indication_t *d
n_subPDUs++;
LOG_I(NR_MAC, "[UE %d][RAPROC][RA-RNTI %04x] Got RAPID RAR subPDU\n", mac->ue_id, rnti);
} else {
ra->RA_backoff_indicator = table_7_2_1[((NR_RA_HEADER_BI *)rarh)->BI];
ra->RA_backoff_indicator = get_backoff_indicator(((NR_RA_HEADER_BI *)rarh)->BI);
ra->RA_BI_found = 1;
LOG_I(NR_MAC, "[UE %d][RAPROC][RA-RNTI %04x] Got BI RAR subPDU %d ms\n", mac->ue_id, ra->RA_backoff_indicator, rnti);
if ( ((NR_RA_HEADER_BI *)rarh)->E == 1) {
openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c
+36 -280
View File
@@ -39,7 +39,6 @@
#include "NR_MAC_COMMON/nr_mac.h"
#include "NR_MAC_COMMON/nr_mac_common.h"
#include "NR_MAC_UE/mac_proto.h"
#include "NR_MAC_UE/mac_extern.h"
/* utils */
#include "assertions.h"
@@ -48,8 +47,6 @@
#include "utils.h"
#include <executables/softmodem-common.h>
#include "LAYER2/NR_MAC_COMMON/nr_mac_extern.h"
#include "LAYER2/RLC/rlc.h"
#include "RRC/NR_UE/L2_interface_ue.h"
@@ -60,7 +57,7 @@
AssertFatal(ret == 0, "Failure in mutex management ret=%d\n", a); \
}
static void nr_ue_prach_scheduler(NR_UE_MAC_INST_t *mac, frame_t frameP, sub_frame_t slotP);
static void nr_ue_prach_scheduler(NR_UE_MAC_INST_t *mac, frame_t frameP, slot_t slotP);
static void schedule_ta_command(fapi_nr_dl_config_request_t *dl_config, NR_UE_MAC_INST_t *mac);
static void schedule_ntn_config_command(fapi_nr_dl_config_request_t *dl_config, NR_UE_MAC_INST_t *mac);
@@ -68,12 +65,12 @@ static void nr_ue_fill_phr(NR_UE_MAC_INST_t *mac,
NR_SINGLE_ENTRY_PHR_MAC_CE *phr,
float P_CMAX,
float tx_power,
frame_t frameP,
sub_frame_t subframe);
frame_t frame,
slot_t slot);
static uint8_t nr_ue_get_sdu(NR_UE_MAC_INST_t *mac,
int cc_id,
frame_t frameP,
sub_frame_t subframe,
frame_t frame,
slot_t slot,
uint8_t gNB_index,
uint8_t *ulsch_buffer,
const uint32_t buflen,
@@ -305,269 +302,18 @@ void ul_layers_config(NR_UE_MAC_INST_t *mac, nfapi_nr_ue_pusch_pdu_t *pusch_conf
NR_UE_UL_BWP_t *current_UL_BWP = mac->current_UL_BWP;
NR_SRS_Config_t *srs_config = current_UL_BWP->srs_Config;
NR_PUSCH_Config_t *pusch_Config = current_UL_BWP->pusch_Config;
long transformPrecoder = pusch_config_pdu->transform_precoding;
/* PRECOD_NBR_LAYERS */
// 0 bits if the higher layer parameter txConfig = nonCodeBook
if (*pusch_Config->txConfig == NR_PUSCH_Config__txConfig_codebook){
// The UE shall transmit PUSCH using the same antenna port(s) as the SRS port(s) in the SRS resource indicated by the DCI format 0_1
// 38.214 Section 6.1.1
uint8_t n_antenna_port = get_pusch_nb_antenna_ports(pusch_Config, srs_config, dci->srs_resource_indicator);
// 1 antenna port and the higher layer parameter txConfig = codebook 0 bits
if (n_antenna_port == 4) { // 4 antenna port and the higher layer parameter txConfig = codebook
// Table 7.3.1.1.2-2: transformPrecoder=disabled and maxRank = 2 or 3 or 4
if ((transformPrecoder == NR_PUSCH_Config__transformPrecoder_disabled)
&& ((*pusch_Config->maxRank == 2) || (*pusch_Config->maxRank == 3) || (*pusch_Config->maxRank == 4))) {
if (*pusch_Config->codebookSubset == NR_PUSCH_Config__codebookSubset_fullyAndPartialAndNonCoherent) {
pusch_config_pdu->nrOfLayers = table_7_3_1_1_2_2_3_4_5[dci->precoding_information.val][0];
pusch_config_pdu->Tpmi = table_7_3_1_1_2_2_3_4_5[dci->precoding_information.val][1];
}
if (*pusch_Config->codebookSubset == NR_PUSCH_Config__codebookSubset_partialAndNonCoherent){
pusch_config_pdu->nrOfLayers = table_7_3_1_1_2_2_3_4_5[dci->precoding_information.val][2];
pusch_config_pdu->Tpmi = table_7_3_1_1_2_2_3_4_5[dci->precoding_information.val][3];
}
if (*pusch_Config->codebookSubset == NR_PUSCH_Config__codebookSubset_nonCoherent){
pusch_config_pdu->nrOfLayers = table_7_3_1_1_2_2_3_4_5[dci->precoding_information.val][4];
pusch_config_pdu->Tpmi = table_7_3_1_1_2_2_3_4_5[dci->precoding_information.val][5];
}
}
// Table 7.3.1.1.2-3: transformPrecoder= enabled, or transformPrecoder=disabled and maxRank = 1
if (((transformPrecoder == NR_PUSCH_Config__transformPrecoder_enabled)
|| (transformPrecoder == NR_PUSCH_Config__transformPrecoder_disabled))
&& (*pusch_Config->maxRank == 1)) {
if (*pusch_Config->codebookSubset == NR_PUSCH_Config__codebookSubset_fullyAndPartialAndNonCoherent) {
pusch_config_pdu->nrOfLayers = table_7_3_1_1_2_2_3_4_5[dci->precoding_information.val][6];
pusch_config_pdu->Tpmi = table_7_3_1_1_2_2_3_4_5[dci->precoding_information.val][7];
}
if (*pusch_Config->codebookSubset == NR_PUSCH_Config__codebookSubset_partialAndNonCoherent){
pusch_config_pdu->nrOfLayers = table_7_3_1_1_2_2_3_4_5[dci->precoding_information.val][8];
pusch_config_pdu->Tpmi = table_7_3_1_1_2_2_3_4_5[dci->precoding_information.val][9];
}
if (*pusch_Config->codebookSubset == NR_PUSCH_Config__codebookSubset_nonCoherent){
pusch_config_pdu->nrOfLayers = table_7_3_1_1_2_2_3_4_5[dci->precoding_information.val][10];
pusch_config_pdu->Tpmi = table_7_3_1_1_2_2_3_4_5[dci->precoding_information.val][11];
}
}
}
if (n_antenna_port == 2) {
// 2 antenna port and the higher layer parameter txConfig = codebook
// Table 7.3.1.1.2-4: transformPrecoder=disabled and maxRank = 2
if ((transformPrecoder == NR_PUSCH_Config__transformPrecoder_disabled) && (*pusch_Config->maxRank == 2)) {
if (*pusch_Config->codebookSubset == NR_PUSCH_Config__codebookSubset_fullyAndPartialAndNonCoherent) {
pusch_config_pdu->nrOfLayers = table_7_3_1_1_2_2_3_4_5[dci->precoding_information.val][12];
pusch_config_pdu->Tpmi = table_7_3_1_1_2_2_3_4_5[dci->precoding_information.val][13];
}
if (*pusch_Config->codebookSubset == NR_PUSCH_Config__codebookSubset_nonCoherent){
pusch_config_pdu->nrOfLayers = table_7_3_1_1_2_2_3_4_5[dci->precoding_information.val][14];
pusch_config_pdu->Tpmi = table_7_3_1_1_2_2_3_4_5[dci->precoding_information.val][15];
}
}
// Table 7.3.1.1.2-5: transformPrecoder= enabled, or transformPrecoder= disabled and maxRank = 1
if (((transformPrecoder == NR_PUSCH_Config__transformPrecoder_enabled)
|| (transformPrecoder == NR_PUSCH_Config__transformPrecoder_disabled))
&& (*pusch_Config->maxRank == 1)) {
if (*pusch_Config->codebookSubset == NR_PUSCH_Config__codebookSubset_fullyAndPartialAndNonCoherent) {
pusch_config_pdu->nrOfLayers = table_7_3_1_1_2_2_3_4_5[dci->precoding_information.val][16];
pusch_config_pdu->Tpmi = table_7_3_1_1_2_2_3_4_5[dci->precoding_information.val][17];
}
if (*pusch_Config->codebookSubset == NR_PUSCH_Config__codebookSubset_nonCoherent){
pusch_config_pdu->nrOfLayers = table_7_3_1_1_2_2_3_4_5[dci->precoding_information.val][18];
pusch_config_pdu->Tpmi = table_7_3_1_1_2_2_3_4_5[dci->precoding_information.val][19];
}
}
}
uint8_t n = get_pusch_nb_antenna_ports(pusch_Config, srs_config, dci->srs_resource_indicator);
set_precoding_information_parameters(pusch_config_pdu, n, transformPrecoder, dci->precoding_information.val, pusch_Config);
}
}
// todo: this function shall be reviewed completely because of the many comments left by the author
void ul_ports_config(NR_UE_MAC_INST_t *mac, int *n_front_load_symb, nfapi_nr_ue_pusch_pdu_t *pusch_config_pdu, dci_pdu_rel15_t *dci, nr_dci_format_t dci_format)
{
uint8_t rank = pusch_config_pdu->nrOfLayers;
NR_PUSCH_Config_t *pusch_Config = mac->current_UL_BWP->pusch_Config;
AssertFatal(pusch_Config!=NULL,"pusch_Config shouldn't be null\n");
long transformPrecoder = pusch_config_pdu->transform_precoding;
LOG_D(NR_MAC,"transformPrecoder %s\n", transformPrecoder==NR_PUSCH_Config__transformPrecoder_disabled ? "disabled" : "enabled");
long *max_length = NULL;
long *dmrs_type = NULL;
if (pusch_Config->dmrs_UplinkForPUSCH_MappingTypeA) {
max_length = pusch_Config->dmrs_UplinkForPUSCH_MappingTypeA->choice.setup->maxLength;
dmrs_type = pusch_Config->dmrs_UplinkForPUSCH_MappingTypeA->choice.setup->dmrs_Type;
}
else {
max_length = pusch_Config->dmrs_UplinkForPUSCH_MappingTypeB->choice.setup->maxLength;
dmrs_type = pusch_Config->dmrs_UplinkForPUSCH_MappingTypeB->choice.setup->dmrs_Type;
}
LOG_D(NR_MAC,"MappingType%s max_length %s, dmrs_type %s, antenna_ports %d\n",
pusch_Config->dmrs_UplinkForPUSCH_MappingTypeA?"A":"B",max_length?"len2":"len1",dmrs_type?"type2":"type1",dci->antenna_ports.val);
if ((transformPrecoder == NR_PUSCH_Config__transformPrecoder_enabled) &&
(dmrs_type == NULL) && (max_length == NULL)) { // tables 7.3.1.1.2-6
pusch_config_pdu->num_dmrs_cdm_grps_no_data = 2;
pusch_config_pdu->dmrs_ports = 1 << dci->antenna_ports.val;
}
if ((transformPrecoder == NR_PUSCH_Config__transformPrecoder_enabled) &&
(dmrs_type == NULL) && (max_length != NULL)) { // tables 7.3.1.1.2-7
pusch_config_pdu->num_dmrs_cdm_grps_no_data = 2; //TBC
pusch_config_pdu->dmrs_ports = 1<<((dci->antenna_ports.val > 3)?(dci->antenna_ports.val-4):(dci->antenna_ports.val));
*n_front_load_symb = (dci->antenna_ports.val > 3)?2:1;
}
if ((transformPrecoder == NR_PUSCH_Config__transformPrecoder_disabled) && (dmrs_type == NULL)
&& (max_length == NULL)) { // tables 7.3.1.1.2-8/9/10/11
if (rank == 1) {
pusch_config_pdu->num_dmrs_cdm_grps_no_data = (dci->antenna_ports.val > 1)?2:1;
pusch_config_pdu->dmrs_ports =1<<((dci->antenna_ports.val > 1)?(dci->antenna_ports.val-2):(dci->antenna_ports.val));
}
if (rank == 2){
pusch_config_pdu->num_dmrs_cdm_grps_no_data = (dci->antenna_ports.val > 0)?2:1;
pusch_config_pdu->dmrs_ports = (dci->antenna_ports.val > 1)?((dci->antenna_ports.val> 2)?0x5:0xc):0x3;
}
if (rank == 3){
pusch_config_pdu->num_dmrs_cdm_grps_no_data = 2;
pusch_config_pdu->dmrs_ports = 0x7; // ports 0-2
}
if (rank == 4){
pusch_config_pdu->num_dmrs_cdm_grps_no_data = 2;
pusch_config_pdu->dmrs_ports = 0xf; // ports 0-3
}
}
if ((transformPrecoder == NR_PUSCH_Config__transformPrecoder_disabled) && (dmrs_type == NULL)
&& (max_length != NULL)) { // tables 7.3.1.1.2-12/13/14/15
if (rank == 1){
pusch_config_pdu->num_dmrs_cdm_grps_no_data = (dci->antenna_ports.val > 1)?2:1; //TBC
pusch_config_pdu->dmrs_ports = 1<<((dci->antenna_ports.val > 1)?(dci->antenna_ports.val > 5 ?(dci->antenna_ports.val-6):(dci->antenna_ports.val-2)):dci->antenna_ports.val);
*n_front_load_symb = (dci->antenna_ports.val > 6)?2:1;
}
if (rank == 2){
pusch_config_pdu->num_dmrs_cdm_grps_no_data = (dci->antenna_ports.val > 0)?2:1; //TBC
pusch_config_pdu->dmrs_ports = 0; //FIXME
//pusch_config_pdu->dmrs_ports[0] = table_7_3_1_1_2_13[dci->antenna_ports.val][1];
//pusch_config_pdu->dmrs_ports[1] = table_7_3_1_1_2_13[dci->antenna_ports.val][2];
//n_front_load_symb = (dci->antenna_ports.val > 3)?2:1; // FIXME
}
if (rank == 3){
pusch_config_pdu->num_dmrs_cdm_grps_no_data = 2; //TBC
pusch_config_pdu->dmrs_ports = 0; //FIXME
//pusch_config_pdu->dmrs_ports[0] = table_7_3_1_1_2_14[dci->antenna_ports.val][1];
//pusch_config_pdu->dmrs_ports[1] = table_7_3_1_1_2_14[dci->antenna_ports.val][2];
//pusch_config_pdu->dmrs_ports[2] = table_7_3_1_1_2_14[dci->antenna_ports.val][3];
//n_front_load_symb = (dci->antenna_ports.val > 1)?2:1; //FIXME
}
if (rank == 4){
pusch_config_pdu->num_dmrs_cdm_grps_no_data = 2; //TBC
pusch_config_pdu->dmrs_ports = 0; //FIXME
//pusch_config_pdu->dmrs_ports[0] = table_7_3_1_1_2_15[dci->antenna_ports.val][1];
//pusch_config_pdu->dmrs_ports[1] = table_7_3_1_1_2_15[dci->antenna_ports.val][2];
//pusch_config_pdu->dmrs_ports[2] = table_7_3_1_1_2_15[dci->antenna_ports.val][3];
//pusch_config_pdu->dmrs_ports[3] = table_7_3_1_1_2_15[dci->antenna_ports.val][4];
//n_front_load_symb = (dci->antenna_ports.val > 1)?2:1; //FIXME
}
}
if ((transformPrecoder == NR_PUSCH_Config__transformPrecoder_disabled) && (dmrs_type != NULL)
&& (max_length == NULL)) { // tables 7.3.1.1.2-16/17/18/19
if (rank == 1){
pusch_config_pdu->num_dmrs_cdm_grps_no_data = (dci->antenna_ports.val > 1)?((dci->antenna_ports.val > 5)?3:2):1; //TBC
pusch_config_pdu->dmrs_ports = (dci->antenna_ports.val > 1)?(dci->antenna_ports.val > 5 ?(dci->antenna_ports.val-6):(dci->antenna_ports.val-2)):dci->antenna_ports.val; //TBC
}
if (rank == 2){
pusch_config_pdu->num_dmrs_cdm_grps_no_data = (dci->antenna_ports.val > 0)?((dci->antenna_ports.val > 2)?3:2):1; //TBC
pusch_config_pdu->dmrs_ports = 0; //FIXME
//pusch_config_pdu->dmrs_ports[0] = table_7_3_1_1_2_17[dci->antenna_ports.val][1];
//pusch_config_pdu->dmrs_ports[1] = table_7_3_1_1_2_17[dci->antenna_ports.val][2];
}
if (rank == 3){
pusch_config_pdu->num_dmrs_cdm_grps_no_data = (dci->antenna_ports.val > 0)?3:2; //TBC
pusch_config_pdu->dmrs_ports = 0; //FIXME
//pusch_config_pdu->dmrs_ports[0] = table_7_3_1_1_2_18[dci->antenna_ports.val][1];
//pusch_config_pdu->dmrs_ports[1] = table_7_3_1_1_2_18[dci->antenna_ports.val][2];
//pusch_config_pdu->dmrs_ports[2] = table_7_3_1_1_2_18[dci->antenna_ports.val][3];
}
if (rank == 4){
pusch_config_pdu->num_dmrs_cdm_grps_no_data = dci->antenna_ports.val + 2; //TBC
pusch_config_pdu->dmrs_ports = 0; //FIXME
//pusch_config_pdu->dmrs_ports[0] = 0;
//pusch_config_pdu->dmrs_ports[1] = 1;
//pusch_config_pdu->dmrs_ports[2] = 2;
//pusch_config_pdu->dmrs_ports[3] = 3;
}
}
if ((transformPrecoder == NR_PUSCH_Config__transformPrecoder_disabled) && (dmrs_type != NULL)
&& (max_length != NULL)) { // tables 7.3.1.1.2-20/21/22/23
if (rank == 1){
pusch_config_pdu->num_dmrs_cdm_grps_no_data = table_7_3_1_1_2_20[dci->antenna_ports.val][0]; //TBC
pusch_config_pdu->dmrs_ports = table_7_3_1_1_2_20[dci->antenna_ports.val][1]; //TBC
//n_front_load_symb = table_7_3_1_1_2_20[dci->antenna_ports.val][2]; //FIXME
}
if (rank == 2){
pusch_config_pdu->num_dmrs_cdm_grps_no_data = table_7_3_1_1_2_21[dci->antenna_ports.val][0]; //TBC
pusch_config_pdu->dmrs_ports = 0; //FIXME
//pusch_config_pdu->dmrs_ports[0] = table_7_3_1_1_2_21[dci->antenna_ports.val][1];
//pusch_config_pdu->dmrs_ports[1] = table_7_3_1_1_2_21[dci->antenna_ports.val][2];
//n_front_load_symb = table_7_3_1_1_2_21[dci->antenna_ports.val][3]; //FIXME
}
if (rank == 3){
pusch_config_pdu->num_dmrs_cdm_grps_no_data = table_7_3_1_1_2_22[dci->antenna_ports.val][0]; //TBC
pusch_config_pdu->dmrs_ports = 0; //FIXME
//pusch_config_pdu->dmrs_ports[0] = table_7_3_1_1_2_22[dci->antenna_ports.val][1];
//pusch_config_pdu->dmrs_ports[1] = table_7_3_1_1_2_22[dci->antenna_ports.val][2];
//pusch_config_pdu->dmrs_ports[2] = table_7_3_1_1_2_22[dci->antenna_ports.val][3];
//n_front_load_symb = table_7_3_1_1_2_22[dci->antenna_ports.val][4]; //FIXME
}
if (rank == 4){
pusch_config_pdu->num_dmrs_cdm_grps_no_data = table_7_3_1_1_2_23[dci->antenna_ports.val][0]; //TBC
pusch_config_pdu->dmrs_ports = 0; //FIXME
//pusch_config_pdu->dmrs_ports[0] = table_7_3_1_1_2_23[dci->antenna_ports.val][1];
//pusch_config_pdu->dmrs_ports[1] = table_7_3_1_1_2_23[dci->antenna_ports.val][2];
//pusch_config_pdu->dmrs_ports[2] = table_7_3_1_1_2_23[dci->antenna_ports.val][3];
//pusch_config_pdu->dmrs_ports[3] = table_7_3_1_1_2_23[dci->antenna_ports.val][4];
//n_front_load_symb = table_7_3_1_1_2_23[dci->antenna_ports.val][5]; //FIXME
}
}
LOG_D(NR_MAC,"num_dmrs_cdm_grps_no_data %d, dmrs_ports %d\n",pusch_config_pdu->num_dmrs_cdm_grps_no_data,pusch_config_pdu->dmrs_ports);
}
// Configuration of Msg3 PDU according to clauses:
// - 8.3 of 3GPP TS 38.213 version 16.3.0 Release 16
// - 6.1.2.2 of TS 38.214
@@ -1701,28 +1447,38 @@ void nr_ue_ul_scheduler(NR_UE_MAC_INST_t *mac, nr_uplink_indication_t *ul_info)
}
}
static uint8_t nr_locate_BsrIndexByBufferSize(const uint32_t *table, int size, int value)
static uint8_t nr_locate_BsrIndexByBufferSize(int size, int value)
{
if (value == 0) {
return 0; //elseif (value > 150000) return 63;
}
uint32_t (*get_bsr_value)(int);
if (size == NR_SHORT_BSR_TABLE_SIZE)
get_bsr_value = &get_short_bsr_value;
else
get_bsr_value = &get_long_bsr_value;
int jl = 0; // lower bound
int ju = size - 1; // upper bound
bool ascend = table[ju] >= table[jl] ? 1 : 0; // determine the order of the the table: 1 if ascending order of table, 0 otherwise
// determine the order of the the table: 1 if ascending order of table, 0 otherwise
bool ascend = (*get_bsr_value)(ju) >= (*get_bsr_value)(jl) ? 1 : 0;
while (ju - jl > 1) { //If we are not yet done,
int jm = (ju + jl) / 2; // compute a midpoint,
if ((value >= table[jm]) == ascend) {
if ((value >= (*get_bsr_value)(jm)) == ascend) {
jl = jm; // replace the lower limit
} else {
ju = jm; //replace the upper limit
}
LOG_T(NR_MAC, "[UE] searching BSR index %d for (BSR TABLE %d < value %d)\n",
jm, table[jm], value);
LOG_T(NR_MAC,
"[UE] searching BSR index %d for (BSR TABLE %d < value %d)\n",
jm,
(*get_bsr_value)(jm),
value);
}
if (value == table[jl]) {
if (value == (*get_bsr_value)(jl)) {
return jl;
} else {
return jl + 1; //equally ju
@@ -2829,7 +2585,7 @@ void nr_schedule_csirs_reception(NR_UE_MAC_INST_t *mac, int frame, int slot)
// PRACH formats 9, 10, 11 are corresponding to dual PRACH format configurations A1/B1, A2/B2, A3/B3.
// - todo:
// - Partial configuration is actually already stored in (fapi_nr_prach_config_t) &mac->phy_config.config_req->prach_config
static void nr_ue_prach_scheduler(NR_UE_MAC_INST_t *mac, frame_t frameP, sub_frame_t slotP)
static void nr_ue_prach_scheduler(NR_UE_MAC_INST_t *mac, frame_t frameP, slot_t slotP)
{
RA_config_t *ra = &mac->ra;
ra->RA_offset = 2; // to compensate the rx frame offset at the gNB
@@ -3045,8 +2801,8 @@ typedef struct {
static void nr_ue_get_sdu_mac_ce_pre(NR_UE_MAC_INST_t *mac,
int CC_id,
frame_t frameP,
sub_frame_t subframe,
frame_t frame,
slot_t slot,
uint8_t gNB_index,
uint8_t *ulsch_buffer,
uint32_t buflen,
@@ -3086,7 +2842,7 @@ static void nr_ue_get_sdu_mac_ce_pre(NR_UE_MAC_INST_t *mac,
if (buflen >= bsr_len + needed) {
if (mac->scheduling_info.phr_info.phr_reporting) {
mac_ce_p->phr_len = needed;
nr_ue_fill_phr(mac, &mac_ce_p->phr, P_CMAX, tx_power, frameP, subframe);
nr_ue_fill_phr(mac, &mac_ce_p->phr, P_CMAX, tx_power, frame, slot);
}
}
}
@@ -3151,7 +2907,7 @@ static void nr_ue_get_sdu_mac_ce_post(NR_UE_MAC_INST_t *mac,
mac_ce_p->bsr.type_bsr = b_short;
mac_ce_p->bsr.bsr.s.LcgID = lcg_id_bsr_max;
mac_ce_p->bsr.bsr.s.Buffer_size =
nr_locate_BsrIndexByBufferSize(NR_SHORT_BSR_TABLE, NR_SHORT_BSR_TABLE_SIZE, LCG_bytes[lcg_id_bsr_max]);
nr_locate_BsrIndexByBufferSize(NR_SHORT_BSR_TABLE_SIZE, LCG_bytes[lcg_id_bsr_max]);
LOG_D(NR_MAC,
"[UE %d] sfn %d.%d BSR Trigger=0x%x report SHORT BSR with level %d for LCGID %d\n",
mac->ue_id,
@@ -3166,7 +2922,7 @@ static void nr_ue_get_sdu_mac_ce_post(NR_UE_MAC_INST_t *mac,
mac_ce_p->bsr.type_bsr = b_long;
uint8_t *tmp = mac_ce_p->bsr.bsr.lcg_bsr;
for (int lcg_id = 0; lcg_id < 8; lcg_id++) {
tmp[lcg_id] = nr_locate_BsrIndexByBufferSize(NR_LONG_BSR_TABLE, NR_LONG_BSR_TABLE_SIZE, LCG_bytes[lcg_id]);
tmp[lcg_id] = nr_locate_BsrIndexByBufferSize(NR_LONG_BSR_TABLE_SIZE, LCG_bytes[lcg_id]);
}
LOG_D(NR_MAC,
"[UE %d] sfn %d.%d BSR Trig=0x%x report LONG BSR (level LCGID %d %d %d %d %d %d %d %d)\n",
@@ -3186,7 +2942,7 @@ static void nr_ue_get_sdu_mac_ce_post(NR_UE_MAC_INST_t *mac,
mac_ce_p->bsr.type_bsr = b_short_trunc;
mac_ce_p->bsr.bsr.s.LcgID = lcg_id_bsr_max;
mac_ce_p->bsr.bsr.s.Buffer_size =
nr_locate_BsrIndexByBufferSize(NR_SHORT_BSR_TABLE, NR_SHORT_BSR_TABLE_SIZE, LCG_bytes[lcg_id_bsr_max]);
nr_locate_BsrIndexByBufferSize(NR_SHORT_BSR_TABLE_SIZE, LCG_bytes[lcg_id_bsr_max]);
} else if (padding_len >= sizeof(NR_BSR_LONG) + sizeof(NR_MAC_SUBHEADER_SHORT)) {
mac_ce_p->bsr.type_bsr = b_long_trunc;
// Fixme: this should be sorted by (TS 38.321, 5.4.5)
@@ -3195,7 +2951,7 @@ static void nr_ue_get_sdu_mac_ce_post(NR_UE_MAC_INST_t *mac,
// available for transmission) in each of these LCG(s), and in case of equal priority, in increasing order of LCGID
uint8_t *tmp = mac_ce_p->bsr.bsr.lcg_bsr;
for (int lcg_id = 0; lcg_id < 8; lcg_id++) {
tmp[lcg_id] = nr_locate_BsrIndexByBufferSize(NR_LONG_BSR_TABLE, NR_LONG_BSR_TABLE_SIZE, LCG_bytes[lcg_id]);
tmp[lcg_id] = nr_locate_BsrIndexByBufferSize(NR_LONG_BSR_TABLE_SIZE, LCG_bytes[lcg_id]);
}
} else
LOG_D(NR_MAC, "Can't add any BSR, not enough padding\n");
@@ -3638,8 +3394,8 @@ static void nr_ue_fill_phr(NR_UE_MAC_INST_t *mac,
NR_SINGLE_ENTRY_PHR_MAC_CE *phr,
float P_CMAX,
float tx_power,
frame_t frameP,
sub_frame_t subframe)
frame_t frame,
slot_t slot)
{
nr_phr_info_t *phr_info = &mac->scheduling_info.phr_info;
// Value mapping according to 38.133 10.1.18.1
@@ -3656,9 +3412,9 @@ static void nr_ue_fill_phr(NR_UE_MAC_INST_t *mac,
}
LOG_D(NR_MAC,
"PHR Reporting sfn.subframe %d.%d reason = %d, P_CMAX = %d (%5.2f dBm), headrom = %d (%d dB) tx_power = %5.2f dBm\n",
frameP,
subframe,
"PHR Reporting sfn.slot %d.%d reason = %d, P_CMAX = %d (%5.2f dBm), headrom = %d (%d dB) tx_power = %5.2f dBm\n",
frame,
slot,
phr_info->phr_reporting,
phr->PCMAX,
P_CMAX,
openair2/LAYER2/NR_MAC_gNB/config.c
-1
View File
@@ -39,7 +39,6 @@
#include "LAYER2/NR_MAC_COMMON/nr_mac_common.h"
#include "LAYER2/NR_MAC_gNB/mac_proto.h"
#include "NR_MIB.h"
#include "NR_MAC_COMMON/nr_mac_extern.h"
#include "NR_MAC_gNB/nr_mac_gNB.h"
#include "NR_BCCH-BCH-Message.h"
#include "NR_ServingCellConfigCommon.h"
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c
+9 -5
View File
@@ -32,7 +32,6 @@
#include "assertions.h"
#include "NR_MAC_COMMON/nr_mac_extern.h"
#include "NR_MAC_gNB/mac_proto.h"
#include "common/utils/LOG/log.h"
@@ -53,12 +52,17 @@
#include <errno.h>
#include <string.h>
const uint8_t nr_rv_round_map[4] = {0, 2, 3, 1};
uint8_t nr_get_rv(int rel_round)
{
const uint8_t nr_rv_round_map[4] = {0, 2, 3, 1};
AssertFatal(rel_round < 4, "Invalid index %d for rv\n", rel_round);
return nr_rv_round_map[rel_round];
}
void clear_nr_nfapi_information(gNB_MAC_INST *gNB,
int CC_idP,
frame_t frameP,
sub_frame_t slotP,
slot_t slotP,
nfapi_nr_dl_tti_request_t *DL_req,
nfapi_nr_tx_data_request_t *TX_req,
nfapi_nr_ul_dci_request_t *UL_dci_req)
@@ -156,7 +160,7 @@ static void copy_ul_tti_req(nfapi_nr_ul_tti_request_t *to, nfapi_nr_ul_tti_reque
to->groups_list[i] = from->groups_list[i];
}
void gNB_dlsch_ulsch_scheduler(module_id_t module_idP, frame_t frame, sub_frame_t slot, NR_Sched_Rsp_t *sched_info)
void gNB_dlsch_ulsch_scheduler(module_id_t module_idP, frame_t frame, slot_t slot, NR_Sched_Rsp_t *sched_info)
{
protocol_ctxt_t ctxt = {0};
PROTOCOL_CTXT_SET_BY_MODULE_ID(&ctxt, module_idP, ENB_FLAG_YES, NOT_A_RNTI, frame, slot,module_idP);
@@ -229,7 +233,7 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP, frame_t frame, sub_frame_
(schedule_nr_prach will assert if resources are not free). */
const int n_slots_ahead = slots_frame - cc->prach_len + get_NTN_Koffset(scc);
const frame_t f = (frame + (slot + n_slots_ahead) / slots_frame) % 1024;
const sub_frame_t s = (slot + n_slots_ahead) % slots_frame;
const slot_t s = (slot + n_slots_ahead) % slots_frame;
schedule_nr_prach(module_idP, f, s);
}
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c
+266 -388
View File
@@ -33,7 +33,6 @@
/* MAC */
#include "nr_mac_gNB.h"
#include "NR_MAC_gNB/mac_proto.h"
#include "NR_MAC_COMMON/nr_mac_extern.h"
/* Utils */
#include "common/utils/LOG/log.h"
@@ -65,7 +64,7 @@ static const float ssb_per_rach_occasion[8] = {0.125, 0.25, 0.5, 1, 2, 4, 8};
static int16_t ssb_index_from_prach(module_id_t module_idP,
frame_t frameP,
sub_frame_t slotP,
slot_t slotP,
uint16_t preamble_index,
uint8_t freq_index,
uint8_t symbol)
@@ -256,7 +255,7 @@ static void schedule_nr_MsgA_pusch(NR_UplinkConfigCommon_t *uplinkConfigCommon,
gNB_MAC_INST *nr_mac,
module_id_t module_idP,
frame_t frameP,
sub_frame_t slotP,
slot_t slotP,
nfapi_nr_prach_pdu_t *prach_pdu,
uint16_t dmrs_TypeA_Position,
NR_PhysCellId_t physCellId)
@@ -357,7 +356,7 @@ static void schedule_nr_MsgA_pusch(NR_UplinkConfigCommon_t *uplinkConfigCommon,
}
static void fill_vrb(const frame_t frame,
const sub_frame_t slot,
const slot_t slot,
int nb_rb,
int beam_idx,
int vrb_size,
@@ -377,7 +376,7 @@ static void fill_vrb(const frame_t frame,
}
}
void schedule_nr_prach(module_id_t module_idP, frame_t frameP, sub_frame_t slotP)
void schedule_nr_prach(module_id_t module_idP, frame_t frameP, slot_t slotP)
{
gNB_MAC_INST *gNB = RC.nrmac[module_idP];
/* already mutex protected: held in gNB_dlsch_ulsch_scheduler() */
@@ -827,7 +826,7 @@ static void start_ra_contention_resolution_timer(NR_RA_t *ra, const long ra_Cont
static void nr_generate_Msg3_retransmission(module_id_t module_idP,
int CC_id,
frame_t frame,
sub_frame_t slot,
slot_t slot,
NR_RA_t *ra,
nfapi_nr_ul_dci_request_t *ul_dci_req)
{
@@ -1192,7 +1191,7 @@ static void fill_msg3_pusch_pdu(nfapi_nr_pusch_pdu_t *pusch_pdu,
pusch_pdu->start_symbol_index = start_symbol_index;
pusch_pdu->nr_of_symbols = nr_of_symbols;
//Optional Data only included if indicated in pduBitmap
pusch_pdu->pusch_data.rv_index = nr_rv_round_map[ra->msg3_round % 4];
pusch_pdu->pusch_data.rv_index = nr_get_rv(ra->msg3_round % 4);
pusch_pdu->pusch_data.harq_process_id = 0;
pusch_pdu->pusch_data.new_data_indicator = (ra->msg3_round == 0) ? 1 : 0;;
pusch_pdu->pusch_data.num_cb = 0;
@@ -1228,7 +1227,7 @@ static void fill_msg3_pusch_pdu(nfapi_nr_pusch_pdu_t *pusch_pdu,
}
}
static void nr_add_msg3(module_id_t module_idP, int CC_id, frame_t frameP, sub_frame_t slotP, NR_RA_t *ra, uint8_t *RAR_pdu)
static void nr_add_msg3(module_id_t module_idP, int CC_id, frame_t frameP, slot_t slotP, NR_RA_t *ra, uint8_t *RAR_pdu)
{
gNB_MAC_INST *mac = RC.nrmac[module_idP];
NR_COMMON_channels_t *cc = &mac->common_channels[CC_id];
@@ -1433,10 +1432,197 @@ static bool msg2_in_response_window(int rach_frame,
return in_window;
}
static void prepare_dl_pdus(gNB_MAC_INST *nr_mac,
NR_RA_t *ra,
NR_UE_DL_BWP_t *dl_bwp,
nfapi_nr_dl_tti_request_body_t *dl_req,
NR_sched_pucch_t *pucch,
NR_pdsch_dmrs_t dmrs_info,
NR_tda_info_t tda,
nr_rnti_type_t rnti_type,
int aggregation_level,
int CCEIndex,
int tb_size,
int ndi,
int tpc,
int delta_PRI,
int current_harq_pid,
int time_domain_assignment,
int CC_id,
int rnti,
int round,
int mcsIndex,
int tb_scaling,
int pduindex,
long BWPStart,
long BWPSize,
int rbStart,
int rbSize)
{
// look up the PDCCH PDU for this CC, BWP, and CORESET. If it does not exist, create it. This is especially
// important if we have multiple RAs, and the DLSCH has to reuse them, so we need to mark them
NR_ControlResourceSet_t *coreset = ra->coreset;
const int coresetid = coreset->controlResourceSetId;
nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15 = nr_mac->pdcch_pdu_idx[CC_id][coresetid];
if (!pdcch_pdu_rel15) {
nfapi_nr_dl_tti_request_pdu_t *dl_tti_pdcch_pdu = &dl_req->dl_tti_pdu_list[dl_req->nPDUs];
memset(dl_tti_pdcch_pdu, 0, sizeof(nfapi_nr_dl_tti_request_pdu_t));
dl_tti_pdcch_pdu->PDUType = NFAPI_NR_DL_TTI_PDCCH_PDU_TYPE;
dl_tti_pdcch_pdu->PDUSize = (uint8_t)(2 + sizeof(nfapi_nr_dl_tti_pdcch_pdu));
dl_req->nPDUs += 1;
pdcch_pdu_rel15 = &dl_tti_pdcch_pdu->pdcch_pdu.pdcch_pdu_rel15;
nr_configure_pdcch(pdcch_pdu_rel15, coreset, &ra->sched_pdcch, false);
nr_mac->pdcch_pdu_idx[CC_id][coresetid] = pdcch_pdu_rel15;
}
nfapi_nr_dl_tti_request_pdu_t *dl_tti_pdsch_pdu = &dl_req->dl_tti_pdu_list[dl_req->nPDUs];
memset((void *)dl_tti_pdsch_pdu, 0, sizeof(nfapi_nr_dl_tti_request_pdu_t));
dl_tti_pdsch_pdu->PDUType = NFAPI_NR_DL_TTI_PDSCH_PDU_TYPE;
dl_tti_pdsch_pdu->PDUSize = (uint8_t)(2 + sizeof(nfapi_nr_dl_tti_pdsch_pdu));
dl_req->nPDUs += 1;
nfapi_nr_dl_tti_pdsch_pdu_rel15_t *pdsch_pdu_rel15 = &dl_tti_pdsch_pdu->pdsch_pdu.pdsch_pdu_rel15;
NR_COMMON_channels_t *cc = &nr_mac->common_channels[CC_id];
NR_ServingCellConfigCommon_t *scc = cc->ServingCellConfigCommon;
int mcsTableIdx = dl_bwp->mcsTableIdx;
pdsch_pdu_rel15->pduBitmap = 0;
pdsch_pdu_rel15->rnti = rnti;
pdsch_pdu_rel15->pduIndex = pduindex;
pdsch_pdu_rel15->BWPSize = BWPSize;
pdsch_pdu_rel15->BWPStart = BWPStart;
pdsch_pdu_rel15->SubcarrierSpacing = dl_bwp->scs;
pdsch_pdu_rel15->CyclicPrefix = 0;
pdsch_pdu_rel15->NrOfCodewords = 1;
int R = nr_get_code_rate_dl(mcsIndex, mcsTableIdx);
pdsch_pdu_rel15->targetCodeRate[0] = R;
int Qm = nr_get_Qm_dl(mcsIndex, mcsTableIdx);
pdsch_pdu_rel15->qamModOrder[0] = Qm;
pdsch_pdu_rel15->TBSize[0] = tb_size;
pdsch_pdu_rel15->mcsIndex[0] = mcsIndex;
pdsch_pdu_rel15->mcsTable[0] = mcsTableIdx;
pdsch_pdu_rel15->rvIndex[0] = nr_get_rv(round % 4);
pdsch_pdu_rel15->dataScramblingId = *scc->physCellId;
pdsch_pdu_rel15->nrOfLayers = 1;
pdsch_pdu_rel15->transmissionScheme = 0;
pdsch_pdu_rel15->refPoint = 0;
pdsch_pdu_rel15->dmrsConfigType = dmrs_info.dmrsConfigType;
pdsch_pdu_rel15->dlDmrsScramblingId = *scc->physCellId;
pdsch_pdu_rel15->SCID = 0;
pdsch_pdu_rel15->numDmrsCdmGrpsNoData = dmrs_info.numDmrsCdmGrpsNoData;
pdsch_pdu_rel15->dmrsPorts = 1;
pdsch_pdu_rel15->resourceAlloc = 1;
pdsch_pdu_rel15->rbStart = rbStart;
pdsch_pdu_rel15->rbSize = rbSize;
pdsch_pdu_rel15->VRBtoPRBMapping = 0;
pdsch_pdu_rel15->StartSymbolIndex = tda.startSymbolIndex;
pdsch_pdu_rel15->NrOfSymbols = tda.nrOfSymbols;
pdsch_pdu_rel15->dlDmrsSymbPos = dmrs_info.dl_dmrs_symb_pos;
pdsch_pdu_rel15->maintenance_parms_v3.tbSizeLbrmBytes = nr_compute_tbslbrm(mcsTableIdx, ra->sc_info.dl_bw_tbslbrm, 1);
pdsch_pdu_rel15->maintenance_parms_v3.ldpcBaseGraph = get_BG(tb_size << 3, R);
pdsch_pdu_rel15->precodingAndBeamforming.num_prgs = 1;
pdsch_pdu_rel15->precodingAndBeamforming.prg_size = 275;
pdsch_pdu_rel15->precodingAndBeamforming.dig_bf_interfaces = 1;
pdsch_pdu_rel15->precodingAndBeamforming.prgs_list[0].pm_idx = 0;
pdsch_pdu_rel15->precodingAndBeamforming.prgs_list[0].dig_bf_interface_list[0].beam_idx = ra->beam_id;
/* Fill PDCCH DL DCI PDU */
nfapi_nr_dl_dci_pdu_t *dci_pdu = &pdcch_pdu_rel15->dci_pdu[pdcch_pdu_rel15->numDlDci];
pdcch_pdu_rel15->numDlDci++;
dci_pdu->RNTI = rnti;
dci_pdu->ScramblingId = *scc->physCellId;
dci_pdu->ScramblingRNTI = 0;
dci_pdu->AggregationLevel = aggregation_level;
dci_pdu->CceIndex = CCEIndex;
dci_pdu->beta_PDCCH_1_0 = 0;
dci_pdu->powerControlOffsetSS = 1;
dci_pdu->precodingAndBeamforming.num_prgs = 0;
dci_pdu->precodingAndBeamforming.prg_size = 0;
dci_pdu->precodingAndBeamforming.dig_bf_interfaces = 1;
dci_pdu->precodingAndBeamforming.prgs_list[0].pm_idx = 0;
dci_pdu->precodingAndBeamforming.prgs_list[0].dig_bf_interface_list[0].beam_idx = ra->beam_id;
dci_pdu_rel15_t dci_payload;
dci_payload.frequency_domain_assignment.val = PRBalloc_to_locationandbandwidth0(pdsch_pdu_rel15->rbSize,
pdsch_pdu_rel15->rbStart,
BWPSize);
dci_payload.time_domain_assignment.val = time_domain_assignment;
dci_payload.vrb_to_prb_mapping.val = 0;
dci_payload.mcs = pdsch_pdu_rel15->mcsIndex[0];
dci_payload.tb_scaling = tb_scaling;
if (rnti_type == TYPE_TC_RNTI_) {
dci_payload.format_indicator = 1;
dci_payload.rv = pdsch_pdu_rel15->rvIndex[0];
dci_payload.harq_pid.val = current_harq_pid;
dci_payload.ndi = ndi;
dci_payload.dai[0].val = pucch ? (pucch->dai_c-1) & 3 : 0;
dci_payload.tpc = tpc; // TPC for PUCCH: table 7.2.1-1 in 38.213
dci_payload.pucch_resource_indicator = delta_PRI; // This is delta_PRI from 9.2.1 in 38.213
dci_payload.pdsch_to_harq_feedback_timing_indicator.val = pucch ? pucch->timing_indicator : 0;
}
LOG_D(NR_MAC,
"DCI 1_0 payload: freq_alloc %d (%d,%d,%d), time_alloc %d, vrb to prb %d, mcs %d tb_scaling %d pucchres %d harqtiming %d\n",
dci_payload.frequency_domain_assignment.val,
pdsch_pdu_rel15->rbStart,
pdsch_pdu_rel15->rbSize,
pdsch_pdu_rel15->BWPSize,
dci_payload.time_domain_assignment.val,
dci_payload.vrb_to_prb_mapping.val,
dci_payload.mcs,
dci_payload.tb_scaling,
dci_payload.pucch_resource_indicator,
dci_payload.pdsch_to_harq_feedback_timing_indicator.val);
LOG_D(NR_MAC,
"DCI params: rnti 0x%x, rnti_type %d, dci_format %d coreset params: FreqDomainResource %llx, start_symbol %d "
"n_symb %d, BWPsize %d\n",
pdcch_pdu_rel15->dci_pdu[0].RNTI,
rnti_type,
NR_DL_DCI_FORMAT_1_0,
(unsigned long long)pdcch_pdu_rel15->FreqDomainResource,
pdcch_pdu_rel15->StartSymbolIndex,
pdcch_pdu_rel15->DurationSymbols,
pdsch_pdu_rel15->BWPSize);
fill_dci_pdu_rel15(&ra->sc_info,
dl_bwp,
&ra->UL_BWP,
&pdcch_pdu_rel15->dci_pdu[pdcch_pdu_rel15->numDlDci - 1],
&dci_payload,
NR_DL_DCI_FORMAT_1_0,
rnti_type,
dl_bwp->bwp_id,
ra->ra_ss,
coreset,
0, // parameter not needed for DCI 1_0
nr_mac->cset0_bwp_size);
LOG_D(NR_MAC, "BWPSize: %i\n", pdcch_pdu_rel15->BWPSize);
LOG_D(NR_MAC, "BWPStart: %i\n", pdcch_pdu_rel15->BWPStart);
LOG_D(NR_MAC, "SubcarrierSpacing: %i\n", pdcch_pdu_rel15->SubcarrierSpacing);
LOG_D(NR_MAC, "CyclicPrefix: %i\n", pdcch_pdu_rel15->CyclicPrefix);
LOG_D(NR_MAC, "StartSymbolIndex: %i\n", pdcch_pdu_rel15->StartSymbolIndex);
LOG_D(NR_MAC, "DurationSymbols: %i\n", pdcch_pdu_rel15->DurationSymbols);
for (int n = 0; n < 6; n++)
LOG_D(NR_MAC, "FreqDomainResource[%i]: %x\n", n, pdcch_pdu_rel15->FreqDomainResource[n]);
LOG_D(NR_MAC, "CceRegMappingType: %i\n", pdcch_pdu_rel15->CceRegMappingType);
LOG_D(NR_MAC, "RegBundleSize: %i\n", pdcch_pdu_rel15->RegBundleSize);
LOG_D(NR_MAC, "InterleaverSize: %i\n", pdcch_pdu_rel15->InterleaverSize);
LOG_D(NR_MAC, "CoreSetType: %i\n", pdcch_pdu_rel15->CoreSetType);
LOG_D(NR_MAC, "ShiftIndex: %i\n", pdcch_pdu_rel15->ShiftIndex);
LOG_D(NR_MAC, "precoderGranularity: %i\n", pdcch_pdu_rel15->precoderGranularity);
LOG_D(NR_MAC, "numDlDci: %i\n", pdcch_pdu_rel15->numDlDci);
}
static void nr_generate_Msg2(module_id_t module_idP,
int CC_id,
frame_t frameP,
sub_frame_t slotP,
slot_t slotP,
NR_RA_t *ra,
nfapi_nr_dl_tti_request_t *DL_req,
nfapi_nr_tx_data_request_t *TX_req)
@@ -1563,33 +1749,6 @@ static void nr_generate_Msg2(module_id_t module_idP,
LOG_D(NR_MAC, "Msg2 startSymbolIndex.nrOfSymbols %d.%d\n", tda_info.startSymbolIndex, tda_info.nrOfSymbols);
// look up the PDCCH PDU for this CC, BWP, and CORESET. If it does not exist, create it. This is especially
// important if we have multiple RAs, and the DLSCH has to reuse them, so we need to mark them
nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15 = nr_mac->pdcch_pdu_idx[CC_id][coresetid];
if (!pdcch_pdu_rel15) {
nfapi_nr_dl_tti_request_pdu_t *dl_tti_pdcch_pdu = &dl_req->dl_tti_pdu_list[dl_req->nPDUs];
memset(dl_tti_pdcch_pdu, 0, sizeof(nfapi_nr_dl_tti_request_pdu_t));
dl_tti_pdcch_pdu->PDUType = NFAPI_NR_DL_TTI_PDCCH_PDU_TYPE;
dl_tti_pdcch_pdu->PDUSize = (uint8_t)(2 + sizeof(nfapi_nr_dl_tti_pdcch_pdu));
dl_req->nPDUs += 1;
pdcch_pdu_rel15 = &dl_tti_pdcch_pdu->pdcch_pdu.pdcch_pdu_rel15;
nr_configure_pdcch(pdcch_pdu_rel15, coreset, &ra->sched_pdcch, false);
nr_mac->pdcch_pdu_idx[CC_id][coresetid] = pdcch_pdu_rel15;
}
nfapi_nr_dl_tti_request_pdu_t *dl_tti_pdsch_pdu = &dl_req->dl_tti_pdu_list[dl_req->nPDUs];
memset((void *)dl_tti_pdsch_pdu, 0, sizeof(nfapi_nr_dl_tti_request_pdu_t));
dl_tti_pdsch_pdu->PDUType = NFAPI_NR_DL_TTI_PDSCH_PDU_TYPE;
dl_tti_pdsch_pdu->PDUSize = (uint8_t)(2 + sizeof(nfapi_nr_dl_tti_pdsch_pdu));
dl_req->nPDUs += 1;
nfapi_nr_dl_tti_pdsch_pdu_rel15_t *pdsch_pdu_rel15 = &dl_tti_pdsch_pdu->pdsch_pdu.pdsch_pdu_rel15;
pdsch_pdu_rel15->precodingAndBeamforming.num_prgs = 0;
pdsch_pdu_rel15->precodingAndBeamforming.prg_size = 0;
pdsch_pdu_rel15->precodingAndBeamforming.dig_bf_interfaces = 0;
pdsch_pdu_rel15->precodingAndBeamforming.prgs_list[0].pm_idx = 0;
pdsch_pdu_rel15->precodingAndBeamforming.prgs_list[0].dig_bf_interface_list[0].beam_idx = ra->beam_id;
// Distance calculation according to SCF222.10.02 RACH.indication (table 3-74) and 38.213 4.2/38.211 4.3.1
// T_c according to 38.211 4.1
float T_c_ns = 0.509;
@@ -1598,14 +1757,13 @@ static void nr_generate_Msg2(module_id_t module_idP,
float speed_of_light_in_meters_per_second = 299792458.0f;
float distance_in_meters = speed_of_light_in_meters_per_second * rtt_ns / 1000 / 1000 / 1000 / 2;
LOG_A(NR_MAC,
"UE %04x: %d.%d Generating RA-Msg2 DCI, RA RNTI 0x%x, state %d, CoreSetType %d, preamble_index(RAPID) %d, "
"UE %04x: %d.%d Generating RA-Msg2 DCI, RA RNTI 0x%x, state %d, preamble_index(RAPID) %d, "
"timing_offset = %d (estimated distance %.1f [m])\n",
ra->rnti,
frameP,
slotP,
ra->RA_rnti,
ra->ra_state,
pdcch_pdu_rel15->CoreSetType,
ra->preamble_index,
ra->timing_offset,
distance_in_meters);
@@ -1617,32 +1775,6 @@ static void nr_generate_Msg2(module_id_t module_idP,
NR_pdsch_dmrs_t dmrs_parms = get_dl_dmrs_params(scc, dl_bwp, &tda_info, 1);
pdsch_pdu_rel15->pduBitmap = 0;
pdsch_pdu_rel15->rnti = ra->RA_rnti;
pdsch_pdu_rel15->pduIndex = pduindex;
pdsch_pdu_rel15->BWPSize = BWPSize;
pdsch_pdu_rel15->BWPStart = BWPStart;
pdsch_pdu_rel15->SubcarrierSpacing = dl_bwp->scs;
pdsch_pdu_rel15->CyclicPrefix = 0;
pdsch_pdu_rel15->NrOfCodewords = 1;
pdsch_pdu_rel15->mcsTable[0] = mcsTableIdx;
pdsch_pdu_rel15->rvIndex[0] = 0;
pdsch_pdu_rel15->dataScramblingId = *scc->physCellId;
pdsch_pdu_rel15->nrOfLayers = 1;
pdsch_pdu_rel15->transmissionScheme = 0;
pdsch_pdu_rel15->refPoint = 0;
pdsch_pdu_rel15->dmrsConfigType = dmrs_parms.dmrsConfigType;
pdsch_pdu_rel15->dlDmrsScramblingId = *scc->physCellId;
pdsch_pdu_rel15->SCID = 0;
pdsch_pdu_rel15->numDmrsCdmGrpsNoData = dmrs_parms.numDmrsCdmGrpsNoData;
pdsch_pdu_rel15->dmrsPorts = 1;
pdsch_pdu_rel15->resourceAlloc = 1;
pdsch_pdu_rel15->rbStart = rbStart;
pdsch_pdu_rel15->rbSize = rbSize;
pdsch_pdu_rel15->VRBtoPRBMapping = 0;
pdsch_pdu_rel15->StartSymbolIndex = tda_info.startSymbolIndex;
pdsch_pdu_rel15->NrOfSymbols = tda_info.nrOfSymbols;
pdsch_pdu_rel15->dlDmrsSymbPos = dmrs_parms.dl_dmrs_symb_pos;
uint8_t tb_scaling = 0;
int R, Qm;
@@ -1661,77 +1793,34 @@ static void nr_generate_Msg2(module_id_t module_idP,
tb_scaling, // tb scaling
1)
>> 3; // layers
pdsch_pdu_rel15->targetCodeRate[0] = R;
pdsch_pdu_rel15->qamModOrder[0] = Qm;
pdsch_pdu_rel15->mcsIndex[0] = mcsIndex;
pdsch_pdu_rel15->TBSize[0] = TBS;
}
pdsch_pdu_rel15->maintenance_parms_v3.tbSizeLbrmBytes = nr_compute_tbslbrm(mcsTableIdx, sc_info->dl_bw_tbslbrm, 1);
pdsch_pdu_rel15->maintenance_parms_v3.ldpcBaseGraph = get_BG(TBS << 3, R);
// Fill PDCCH DL DCI PDU
nfapi_nr_dl_dci_pdu_t *dci_pdu = &pdcch_pdu_rel15->dci_pdu[pdcch_pdu_rel15->numDlDci];
pdcch_pdu_rel15->numDlDci++;
dci_pdu->RNTI = ra->RA_rnti;
dci_pdu->ScramblingId = *scc->physCellId;
dci_pdu->ScramblingRNTI = 0;
dci_pdu->AggregationLevel = aggregation_level;
dci_pdu->CceIndex = CCEIndex;
dci_pdu->beta_PDCCH_1_0 = 0;
dci_pdu->powerControlOffsetSS = 1;
dci_pdu->precodingAndBeamforming.num_prgs = 0;
dci_pdu->precodingAndBeamforming.prg_size = 0;
dci_pdu->precodingAndBeamforming.dig_bf_interfaces = 1;
dci_pdu->precodingAndBeamforming.prgs_list[0].pm_idx = 0;
dci_pdu->precodingAndBeamforming.prgs_list[0].dig_bf_interface_list[0].beam_idx = ra->beam_id;
dci_pdu_rel15_t dci_payload;
dci_payload.frequency_domain_assignment.val =
PRBalloc_to_locationandbandwidth0(pdsch_pdu_rel15->rbSize, pdsch_pdu_rel15->rbStart, BWPSize);
LOG_D(NR_MAC, "Msg2 rbSize.rbStart.BWPsize %d.%d.%ld\n", pdsch_pdu_rel15->rbSize, pdsch_pdu_rel15->rbStart, BWPSize);
dci_payload.time_domain_assignment.val = time_domain_assignment;
dci_payload.vrb_to_prb_mapping.val = 0;
dci_payload.mcs = pdsch_pdu_rel15->mcsIndex[0];
dci_payload.tb_scaling = tb_scaling;
LOG_D(NR_MAC,
"DCI type 1 payload: freq_alloc %d (%d,%d,%ld), time_alloc %d, vrb to prb %d, mcs %d tb_scaling %d \n",
dci_payload.frequency_domain_assignment.val,
pdsch_pdu_rel15->rbStart,
pdsch_pdu_rel15->rbSize,
BWPSize,
dci_payload.time_domain_assignment.val,
dci_payload.vrb_to_prb_mapping.val,
dci_payload.mcs,
dci_payload.tb_scaling);
LOG_D(NR_MAC,
"DCI params: rnti 0x%x, rnti_type %d, dci_format %d coreset params: FreqDomainResource %llx, start_symbol %d "
"n_symb %d\n",
pdcch_pdu_rel15->dci_pdu[0].RNTI,
TYPE_RA_RNTI_,
NR_DL_DCI_FORMAT_1_0,
*(unsigned long long *)pdcch_pdu_rel15->FreqDomainResource,
pdcch_pdu_rel15->StartSymbolIndex,
pdcch_pdu_rel15->DurationSymbols);
fill_dci_pdu_rel15(sc_info,
dl_bwp,
&ra->UL_BWP,
&pdcch_pdu_rel15->dci_pdu[pdcch_pdu_rel15->numDlDci - 1],
&dci_payload,
NR_DL_DCI_FORMAT_1_0,
TYPE_RA_RNTI_,
dl_bwp->bwp_id,
ss,
coreset,
0, // parameter not needed for DCI 1_0
nr_mac->cset0_bwp_size);
prepare_dl_pdus(nr_mac,
ra,
dl_bwp,
dl_req,
NULL,
dmrs_parms,
tda_info,
TYPE_RA_RNTI_,
aggregation_level,
CCEIndex,
TBS,
0,
0,
0,
0,
time_domain_assignment,
CC_id,
ra->RA_rnti,
0,
mcsIndex,
tb_scaling,
pduindex,
BWPStart,
BWPSize,
rbStart,
rbSize);
// DL TX request
nfapi_nr_pdu_t *tx_req = &TX_req->pdu_list[TX_req->Number_of_PDUs];
@@ -1769,8 +1858,8 @@ static void nr_generate_Msg2(module_id_t module_idP,
tx_req->PDU_index = pduindex;
tx_req->num_TLV = 1;
tx_req->TLVs[0].length = pdsch_pdu_rel15->TBSize[0];
tx_req->PDU_length = compute_PDU_length(tx_req->num_TLV, pdsch_pdu_rel15->TBSize[0]);
tx_req->TLVs[0].length = TBS;
tx_req->PDU_length = compute_PDU_length(tx_req->num_TLV, TBS);
TX_req->SFN = frameP;
TX_req->Number_of_PDUs++;
TX_req->Slot = slotP;
@@ -1793,208 +1882,10 @@ static void nr_generate_Msg2(module_id_t module_idP,
ra->ra_state = nrRA_WAIT_Msg3;
}
static void prepare_dl_pdus(gNB_MAC_INST *nr_mac,
NR_RA_t *ra,
NR_UE_DL_BWP_t *dl_bwp,
nfapi_nr_dl_tti_request_body_t *dl_req,
NR_sched_pucch_t *pucch,
NR_pdsch_dmrs_t dmrs_info,
NR_tda_info_t tda,
int aggregation_level,
int CCEIndex,
int tb_size,
int ndi,
int tpc,
int delta_PRI,
int current_harq_pid,
int time_domain_assignment,
int CC_id,
int rnti,
int round,
int mcsIndex,
int tb_scaling,
int pduindex,
int rbStart,
int rbSize)
{
// look up the PDCCH PDU for this CC, BWP, and CORESET. If it does not exist, create it. This is especially
// important if we have multiple RAs, and the DLSCH has to reuse them, so we need to mark them
NR_ControlResourceSet_t *coreset = ra->coreset;
const int coresetid = coreset->controlResourceSetId;
nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15 = nr_mac->pdcch_pdu_idx[CC_id][coresetid];
if (!pdcch_pdu_rel15) {
nfapi_nr_dl_tti_request_pdu_t *dl_tti_pdcch_pdu = &dl_req->dl_tti_pdu_list[dl_req->nPDUs];
memset(dl_tti_pdcch_pdu, 0, sizeof(nfapi_nr_dl_tti_request_pdu_t));
dl_tti_pdcch_pdu->PDUType = NFAPI_NR_DL_TTI_PDCCH_PDU_TYPE;
dl_tti_pdcch_pdu->PDUSize = (uint8_t)(2 + sizeof(nfapi_nr_dl_tti_pdcch_pdu));
dl_req->nPDUs += 1;
pdcch_pdu_rel15 = &dl_tti_pdcch_pdu->pdcch_pdu.pdcch_pdu_rel15;
nr_configure_pdcch(pdcch_pdu_rel15, coreset, &ra->sched_pdcch, false);
nr_mac->pdcch_pdu_idx[CC_id][coresetid] = pdcch_pdu_rel15;
}
nfapi_nr_dl_tti_request_pdu_t *dl_tti_pdsch_pdu = &dl_req->dl_tti_pdu_list[dl_req->nPDUs];
memset((void *)dl_tti_pdsch_pdu,0,sizeof(nfapi_nr_dl_tti_request_pdu_t));
dl_tti_pdsch_pdu->PDUType = NFAPI_NR_DL_TTI_PDSCH_PDU_TYPE;
dl_tti_pdsch_pdu->PDUSize = (uint8_t)(2+sizeof(nfapi_nr_dl_tti_pdsch_pdu));
dl_req->nPDUs+=1;
nfapi_nr_dl_tti_pdsch_pdu_rel15_t *pdsch_pdu_rel15 = &dl_tti_pdsch_pdu->pdsch_pdu.pdsch_pdu_rel15;
NR_COMMON_channels_t *cc = &nr_mac->common_channels[CC_id];
NR_ServingCellConfigCommon_t *scc = cc->ServingCellConfigCommon;
long BWPStart = 0;
long BWPSize = 0;
NR_Type0_PDCCH_CSS_config_t *type0_PDCCH_CSS_config = NULL;
NR_SearchSpace_t *ss = ra->ra_ss;
if(*ss->controlResourceSetId!=0) {
BWPStart = dl_bwp->BWPStart;
BWPSize = dl_bwp->BWPSize;
} else {
type0_PDCCH_CSS_config = &nr_mac->type0_PDCCH_CSS_config[cc->ssb_index[ra->beam_id]];
BWPStart = type0_PDCCH_CSS_config->cset_start_rb;
BWPSize = type0_PDCCH_CSS_config->num_rbs;
}
int mcsTableIdx = dl_bwp->mcsTableIdx;
pdsch_pdu_rel15->pduBitmap = 0;
pdsch_pdu_rel15->rnti = rnti;
pdsch_pdu_rel15->pduIndex = pduindex;
pdsch_pdu_rel15->BWPSize = BWPSize;
pdsch_pdu_rel15->BWPStart = BWPStart;
pdsch_pdu_rel15->SubcarrierSpacing = dl_bwp->scs;
pdsch_pdu_rel15->CyclicPrefix = 0;
pdsch_pdu_rel15->NrOfCodewords = 1;
int R = nr_get_code_rate_dl(mcsIndex,mcsTableIdx);
pdsch_pdu_rel15->targetCodeRate[0] = R;
int Qm = nr_get_Qm_dl(mcsIndex, mcsTableIdx);
pdsch_pdu_rel15->qamModOrder[0] = Qm;
pdsch_pdu_rel15->mcsIndex[0] = mcsIndex;
pdsch_pdu_rel15->mcsTable[0] = mcsTableIdx;
pdsch_pdu_rel15->rvIndex[0] = nr_rv_round_map[round % 4];
pdsch_pdu_rel15->dataScramblingId = *scc->physCellId;
pdsch_pdu_rel15->nrOfLayers = 1;
pdsch_pdu_rel15->transmissionScheme = 0;
pdsch_pdu_rel15->refPoint = 0;
pdsch_pdu_rel15->dmrsConfigType = dmrs_info.dmrsConfigType;
pdsch_pdu_rel15->dlDmrsScramblingId = *scc->physCellId;
pdsch_pdu_rel15->SCID = 0;
pdsch_pdu_rel15->numDmrsCdmGrpsNoData = dmrs_info.numDmrsCdmGrpsNoData;
pdsch_pdu_rel15->dmrsPorts = 1;
pdsch_pdu_rel15->resourceAlloc = 1;
pdsch_pdu_rel15->rbStart = rbStart;
pdsch_pdu_rel15->rbSize = rbSize;
pdsch_pdu_rel15->VRBtoPRBMapping = 0;
pdsch_pdu_rel15->StartSymbolIndex = tda.startSymbolIndex;
pdsch_pdu_rel15->NrOfSymbols = tda.nrOfSymbols;
pdsch_pdu_rel15->dlDmrsSymbPos = dmrs_info.dl_dmrs_symb_pos;
int x_Overhead = 0;
nr_get_tbs_dl(&dl_tti_pdsch_pdu->pdsch_pdu, x_Overhead, pdsch_pdu_rel15->numDmrsCdmGrpsNoData, tb_scaling);
pdsch_pdu_rel15->maintenance_parms_v3.tbSizeLbrmBytes = nr_compute_tbslbrm(mcsTableIdx, ra->sc_info.dl_bw_tbslbrm, 1);
pdsch_pdu_rel15->maintenance_parms_v3.ldpcBaseGraph = get_BG(tb_size<<3,R);
pdsch_pdu_rel15->precodingAndBeamforming.num_prgs=1;
pdsch_pdu_rel15->precodingAndBeamforming.prg_size=275;
pdsch_pdu_rel15->precodingAndBeamforming.dig_bf_interfaces=1;
pdsch_pdu_rel15->precodingAndBeamforming.prgs_list[0].pm_idx = 0;
pdsch_pdu_rel15->precodingAndBeamforming.prgs_list[0].dig_bf_interface_list[0].beam_idx = ra->beam_id;
/* Fill PDCCH DL DCI PDU */
nfapi_nr_dl_dci_pdu_t *dci_pdu = &pdcch_pdu_rel15->dci_pdu[pdcch_pdu_rel15->numDlDci];
pdcch_pdu_rel15->numDlDci++;
dci_pdu->RNTI = rnti;
dci_pdu->ScramblingId = *scc->physCellId;
dci_pdu->ScramblingRNTI = 0;
dci_pdu->AggregationLevel = aggregation_level;
dci_pdu->CceIndex = CCEIndex;
dci_pdu->beta_PDCCH_1_0 = 0;
dci_pdu->powerControlOffsetSS = 1;
dci_pdu->precodingAndBeamforming.num_prgs = 0;
dci_pdu->precodingAndBeamforming.prg_size = 0;
dci_pdu->precodingAndBeamforming.dig_bf_interfaces = 1;
dci_pdu->precodingAndBeamforming.prgs_list[0].pm_idx = 0;
dci_pdu->precodingAndBeamforming.prgs_list[0].dig_bf_interface_list[0].beam_idx = ra->beam_id;
dci_pdu_rel15_t dci_payload;
dci_payload.frequency_domain_assignment.val = PRBalloc_to_locationandbandwidth0(pdsch_pdu_rel15->rbSize,
pdsch_pdu_rel15->rbStart,
BWPSize);
dci_payload.format_indicator = 1;
dci_payload.time_domain_assignment.val = time_domain_assignment;
dci_payload.vrb_to_prb_mapping.val = 0;
dci_payload.mcs = pdsch_pdu_rel15->mcsIndex[0];
dci_payload.tb_scaling = tb_scaling;
dci_payload.rv = pdsch_pdu_rel15->rvIndex[0];
dci_payload.harq_pid.val = current_harq_pid;
dci_payload.ndi = ndi;
dci_payload.dai[0].val = pucch ? (pucch->dai_c-1) & 3 : 0;
dci_payload.tpc = tpc; // TPC for PUCCH: table 7.2.1-1 in 38.213
dci_payload.pucch_resource_indicator = delta_PRI; // This is delta_PRI from 9.2.1 in 38.213
dci_payload.pdsch_to_harq_feedback_timing_indicator.val = pucch ? pucch->timing_indicator : 0;
LOG_D(NR_MAC,
"DCI 1_0 payload: freq_alloc %d (%d,%d,%d), time_alloc %d, vrb to prb %d, mcs %d tb_scaling %d pucchres %d harqtiming %d\n",
dci_payload.frequency_domain_assignment.val,
pdsch_pdu_rel15->rbStart,
pdsch_pdu_rel15->rbSize,
pdsch_pdu_rel15->BWPSize,
dci_payload.time_domain_assignment.val,
dci_payload.vrb_to_prb_mapping.val,
dci_payload.mcs,
dci_payload.tb_scaling,
dci_payload.pucch_resource_indicator,
dci_payload.pdsch_to_harq_feedback_timing_indicator.val);
LOG_D(NR_MAC,
"DCI params: rnti 0x%x, rnti_type %d, dci_format %d coreset params: FreqDomainResource %llx, start_symbol %d "
"n_symb %d, BWPsize %d\n",
pdcch_pdu_rel15->dci_pdu[0].RNTI,
TYPE_TC_RNTI_,
NR_DL_DCI_FORMAT_1_0,
(unsigned long long)pdcch_pdu_rel15->FreqDomainResource,
pdcch_pdu_rel15->StartSymbolIndex,
pdcch_pdu_rel15->DurationSymbols,
pdsch_pdu_rel15->BWPSize);
fill_dci_pdu_rel15(&ra->sc_info,
dl_bwp,
&ra->UL_BWP,
&pdcch_pdu_rel15->dci_pdu[pdcch_pdu_rel15->numDlDci - 1],
&dci_payload,
NR_DL_DCI_FORMAT_1_0,
TYPE_TC_RNTI_,
dl_bwp->bwp_id,
ss,
coreset,
0, // parameter not needed for DCI 1_0
nr_mac->cset0_bwp_size);
LOG_D(NR_MAC, "BWPSize: %i\n", pdcch_pdu_rel15->BWPSize);
LOG_D(NR_MAC, "BWPStart: %i\n", pdcch_pdu_rel15->BWPStart);
LOG_D(NR_MAC, "SubcarrierSpacing: %i\n", pdcch_pdu_rel15->SubcarrierSpacing);
LOG_D(NR_MAC, "CyclicPrefix: %i\n", pdcch_pdu_rel15->CyclicPrefix);
LOG_D(NR_MAC, "StartSymbolIndex: %i\n", pdcch_pdu_rel15->StartSymbolIndex);
LOG_D(NR_MAC, "DurationSymbols: %i\n", pdcch_pdu_rel15->DurationSymbols);
for (int n = 0; n < 6; n++)
LOG_D(NR_MAC, "FreqDomainResource[%i]: %x\n", n, pdcch_pdu_rel15->FreqDomainResource[n]);
LOG_D(NR_MAC, "CceRegMappingType: %i\n", pdcch_pdu_rel15->CceRegMappingType);
LOG_D(NR_MAC, "RegBundleSize: %i\n", pdcch_pdu_rel15->RegBundleSize);
LOG_D(NR_MAC, "InterleaverSize: %i\n", pdcch_pdu_rel15->InterleaverSize);
LOG_D(NR_MAC, "CoreSetType: %i\n", pdcch_pdu_rel15->CoreSetType);
LOG_D(NR_MAC, "ShiftIndex: %i\n", pdcch_pdu_rel15->ShiftIndex);
LOG_D(NR_MAC, "precoderGranularity: %i\n", pdcch_pdu_rel15->precoderGranularity);
LOG_D(NR_MAC, "numDlDci: %i\n", pdcch_pdu_rel15->numDlDci);
}
static void nr_generate_Msg4_MsgB(module_id_t module_idP,
int CC_id,
frame_t frameP,
sub_frame_t slotP,
slot_t slotP,
NR_RA_t *ra,
nfapi_nr_dl_tti_request_t *DL_req,
nfapi_nr_tx_data_request_t *TX_req)
@@ -2148,6 +2039,16 @@ static void nr_generate_Msg4_MsgB(module_id_t module_idP,
return;
}
const int delta_PRI = 0;
int r_pucch = nr_get_pucch_resource(coreset, ra->UL_BWP.pucch_Config, CCEIndex);
LOG_D(NR_MAC, "Msg4 r_pucch %d (CCEIndex %d, delta_PRI %d)\n", r_pucch, CCEIndex, delta_PRI);
int alloc = nr_acknack_scheduling(nr_mac, UE, frameP, slotP, ra->beam_id, r_pucch, 1);
if (alloc < 0) {
LOG_D(NR_MAC,"Couldn't find a pucch allocation for ack nack (msg4) in frame %d slot %d\n", frameP, slotP);
reset_beam_status(&nr_mac->beam_info, frameP, slotP, ra->beam_id, n_slots_frame, beam.new_beam);
return;
}
// HARQ management
if (current_harq_pid < 0) {
AssertFatal(sched_ctrl->available_dl_harq.head >= 0,
@@ -2156,39 +2057,16 @@ static void nr_generate_Msg4_MsgB(module_id_t module_idP,
remove_front_nr_list(&sched_ctrl->available_dl_harq);
}
const int delta_PRI = 0;
int alloc = -1;
if (!get_FeedbackDisabled(UE->sc_info.downlinkHARQ_FeedbackDisabled_r17, current_harq_pid)) {
int r_pucch = nr_get_pucch_resource(coreset, ra->UL_BWP.pucch_Config, CCEIndex);
LOG_D(NR_MAC, "Msg4 r_pucch %d (CCEIndex %d, delta_PRI %d)\n", r_pucch, CCEIndex, delta_PRI);
alloc = nr_acknack_scheduling(nr_mac, UE, frameP, slotP, ra->beam_id, r_pucch, 1);
if (alloc < 0) {
LOG_D(NR_MAC,"Couldn't find a pucch allocation for ack nack (msg4) in frame %d slot %d\n", frameP, slotP);
reset_beam_status(&nr_mac->beam_info, frameP, slotP, ra->beam_id, n_slots_frame, beam.new_beam);
return;
}
}
NR_UE_harq_t *harq = &sched_ctrl->harq_processes[current_harq_pid];
NR_sched_pucch_t *pucch = NULL;
NR_sched_pucch_t *pucch = &sched_ctrl->sched_pucch[alloc];
DevAssert(!harq->is_waiting);
if (alloc < 0) {
finish_nr_dl_harq(sched_ctrl, current_harq_pid);
} else {
pucch = &sched_ctrl->sched_pucch[alloc];
add_tail_nr_list(&sched_ctrl->feedback_dl_harq, current_harq_pid);
harq->feedback_slot = pucch->ul_slot;
harq->feedback_frame = pucch->frame;
harq->is_waiting = true;
}
add_tail_nr_list(&sched_ctrl->feedback_dl_harq, current_harq_pid);
harq->feedback_slot = pucch->ul_slot;
harq->feedback_frame = pucch->frame;
harq->is_waiting = true;
ra->harq_pid = current_harq_pid;
UE->mac_stats.dl.rounds[harq->round]++;
harq->tb_size = tb_size;
uint8_t *buf = allocate_transportBlock_buffer(&harq->transportBlock, tb_size);
// Bytes to be transmitted
if (harq->round == 0) {
@@ -2243,7 +2121,20 @@ static void nr_generate_Msg4_MsgB(module_id_t module_idP,
rnti_t rnti = ra->ra_type == RA_4_STEP ? ra->rnti : ra->MsgB_rnti;
const int pduindex = nr_mac->pdu_index[CC_id]++;
prepare_dl_pdus(nr_mac, ra, dl_bwp, dl_req, pucch, dmrs_info, msg4_tda, aggregation_level, CCEIndex, tb_size, harq->ndi, sched_ctrl->tpc1, delta_PRI,
prepare_dl_pdus(nr_mac,
ra,
dl_bwp,
dl_req,
pucch,
dmrs_info,
msg4_tda,
TYPE_TC_RNTI_,
aggregation_level,
CCEIndex,
tb_size,
harq->ndi,
sched_ctrl->tpc1,
delta_PRI,
current_harq_pid,
time_domain_assignment,
CC_id,
@@ -2252,6 +2143,8 @@ static void nr_generate_Msg4_MsgB(module_id_t module_idP,
mcsIndex,
tb_scaling,
pduindex,
BWPStart,
BWPSize,
rbStart,
rbSize);
@@ -2293,33 +2186,18 @@ static void nr_generate_Msg4_MsgB(module_id_t module_idP,
vrb_map[BWPStart + rb + rbStart] |= SL_to_bitmap(msg4_tda.startSymbolIndex, msg4_tda.nrOfSymbols);
}
if (pucch == NULL) {
LOG_A(NR_MAC, "(UE RNTI 0x%04x) Skipping Ack of RA-Msg4. CBRA procedure succeeded!\n", ra->rnti);
UE->Msg4_MsgB_ACKed = true;
// Pause scheduling according to:
// 3GPP TS 38.331 Section 12 Table 12.1-1: UE performance requirements for RRC procedures for UEs
// Msg4 may transmit a RRCReconfiguration, for example when UE sends RRCReestablishmentComplete and MAC CE for C-RNTI in Msg3.
// In that case, gNB will generate a RRCReconfiguration that will be transmitted in Msg4, so we need to apply CellGroup after the Ack,
// UE->reconfigCellGroup was already set when processing RRCReestablishment message
int delay = nr_mac_get_reconfig_delay_slots(UE->current_UL_BWP.scs);
nr_mac_interrupt_ue_transmission(nr_mac, UE, UE->interrupt_action, delay);
nr_clear_ra_proc(ra);
} else {
ra->ra_state = nrRA_WAIT_Msg4_MsgB_ACK;
LOG_I(NR_MAC,
"UE %04x Generate %s: feedback at %4d.%2d, payload %d bytes, next state nrRA_WAIT_Msg4_MsgB_ACK\n",
ra->rnti,
ra_type_str,
pucch->frame,
pucch->ul_slot,
harq->tb_size);
}
ra->ra_state = nrRA_WAIT_Msg4_MsgB_ACK;
LOG_I(NR_MAC,
"UE %04x Generate %s: feedback at %4d.%2d, payload %d bytes, next state nrRA_WAIT_Msg4_MsgB_ACK\n",
ra->rnti,
ra_type_str,
pucch->frame,
pucch->ul_slot,
harq->tb_size);
}
}
static void nr_check_Msg4_MsgB_Ack(module_id_t module_id, int CC_id, frame_t frame, sub_frame_t slot, NR_RA_t *ra)
static void nr_check_Msg4_MsgB_Ack(module_id_t module_id, int CC_id, frame_t frame, slot_t slot, NR_RA_t *ra)
{
const char *ra_type_str = ra->ra_type == RA_2_STEP ? "MsgB" : "Msg4";
NR_UE_info_t *UE = find_nr_UE(&RC.nrmac[module_id]->UE_info, ra->rnti);
@@ -2496,7 +2374,7 @@ static void nr_fill_rar(uint8_t Mod_idP, NR_RA_t *ra, uint8_t *dlsch_buffer, nfa
void nr_schedule_RA(module_id_t module_idP,
frame_t frameP,
sub_frame_t slotP,
slot_t slotP,
nfapi_nr_ul_dci_request_t *ul_dci_req,
nfapi_nr_dl_tti_request_t *DL_req,
nfapi_nr_tx_data_request_t *TX_req)
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_bch.c
+5 -6
View File
@@ -33,7 +33,6 @@
#include "assertions.h"
#include "NR_MAC_gNB/nr_mac_gNB.h"
#include "NR_MAC_gNB/mac_proto.h"
#include "NR_MAC_COMMON/nr_mac_extern.h"
#include "common/utils/LOG/log.h"
#include "common/utils/LOG/vcd_signal_dumper.h"
#include "UTIL/OPT/opt.h"
@@ -46,7 +45,7 @@
#include "executables/softmodem-common.h"
static void schedule_ssb(frame_t frame,
sub_frame_t slot,
slot_t slot,
NR_ServingCellConfigCommon_t *scc,
nfapi_nr_dl_tti_request_body_t *dl_req,
int i_ssb,
@@ -115,7 +114,7 @@ static int encode_mib(NR_BCCH_BCH_Message_t *mib, frame_t frame, uint8_t *buffer
return encode_size;
}
void schedule_nr_mib(module_id_t module_idP, frame_t frameP, sub_frame_t slotP, nfapi_nr_dl_tti_request_t *DL_req)
void schedule_nr_mib(module_id_t module_idP, frame_t frameP, slot_t slotP, nfapi_nr_dl_tti_request_t *DL_req)
{
gNB_MAC_INST *gNB = RC.nrmac[module_idP];
/* already mutex protected: held in gNB_dlsch_ulsch_scheduler() */
@@ -549,7 +548,7 @@ static void nr_fill_nfapi_dl_SIB_pdu(int Mod_idP,
pdsch_pdu_rel15->qamModOrder[0] = nr_get_Qm_dl(pdsch->mcs, mcsTableIdx);
pdsch_pdu_rel15->mcsIndex[0] = pdsch->mcs;
pdsch_pdu_rel15->mcsTable[0] = mcsTableIdx;
pdsch_pdu_rel15->rvIndex[0] = nr_rv_round_map[0];
pdsch_pdu_rel15->rvIndex[0] = nr_get_rv(0);
pdsch_pdu_rel15->dataScramblingId = *scc->physCellId;
pdsch_pdu_rel15->nrOfLayers = 1;
pdsch_pdu_rel15->transmissionScheme = 0;
@@ -658,7 +657,7 @@ static void nr_fill_nfapi_dl_SIB_pdu(int Mod_idP,
void schedule_nr_sib1(module_id_t module_idP,
frame_t frameP,
sub_frame_t slotP,
slot_t slotP,
nfapi_nr_dl_tti_request_t *DL_req,
nfapi_nr_tx_data_request_t *TX_req)
{
@@ -785,7 +784,7 @@ struct NR_SchedulingInfo2_r17 *find_sib19_sched_info(const struct NR_SI_Scheduli
void schedule_nr_sib19(module_id_t module_idP,
frame_t frameP,
sub_frame_t slotP,
slot_t slotP,
nfapi_nr_dl_tti_request_t *DL_req,
nfapi_nr_tx_data_request_t *TX_req,
int sib19_bcch_length,
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c
+7 -8
View File
@@ -33,7 +33,6 @@
/*MAC*/
#include "NR_MAC_COMMON/nr_mac.h"
#include "NR_MAC_gNB/nr_mac_gNB.h"
#include "NR_MAC_COMMON/nr_mac_extern.h"
#include "LAYER2/NR_MAC_gNB/mac_proto.h"
#include "LAYER2/RLC/rlc.h"
@@ -322,7 +321,7 @@ int nr_write_ce_dlsch_pdu(module_id_t module_idP,
return offset;
}
static void nr_store_dlsch_buffer(module_id_t module_id, frame_t frame, sub_frame_t slot)
static void nr_store_dlsch_buffer(module_id_t module_id, frame_t frame, slot_t slot)
{
UE_iterator(RC.nrmac[module_id]->UE_info.list, UE) {
NR_UE_sched_ctrl_t *sched_ctrl = &UE->UE_sched_ctrl;
@@ -426,7 +425,7 @@ static dl_bwp_info_t get_bwp_start_size(gNB_MAC_INST *mac, NR_UE_info_t *UE)
static bool allocate_dl_retransmission(module_id_t module_id,
frame_t frame,
sub_frame_t slot,
slot_t slot,
int *n_rb_sched,
NR_UE_info_t *UE,
int beam_idx,
@@ -600,7 +599,7 @@ static int comparator(const void *p, const void *q) {
static void pf_dl(module_id_t module_id,
frame_t frame,
sub_frame_t slot,
slot_t slot,
NR_UE_info_t **UE_list,
int max_num_ue,
int num_beams,
@@ -870,7 +869,7 @@ static void pf_dl(module_id_t module_id,
}
}
static void nr_dlsch_preprocessor(module_id_t module_id, frame_t frame, sub_frame_t slot)
static void nr_dlsch_preprocessor(module_id_t module_id, frame_t frame, slot_t slot)
{
gNB_MAC_INST *mac = RC.nrmac[module_id];
NR_UEs_t *UE_info = &mac->UE_info;
@@ -928,7 +927,7 @@ nr_pp_impl_dl nr_init_dlsch_preprocessor(int CC_id) {
void nr_schedule_ue_spec(module_id_t module_id,
frame_t frame,
sub_frame_t slot,
slot_t slot,
nfapi_nr_dl_tti_request_t *DL_req,
nfapi_nr_tx_data_request_t *TX_req)
{
@@ -1031,7 +1030,7 @@ void nr_schedule_ue_spec(module_id_t module_id,
TBS,
current_harq_pid,
harq->round,
nr_rv_round_map[harq->round%4],
nr_get_rv(harq->round % 4),
harq->ndi,
pucch->timing_indicator,
pucch->frame,
@@ -1091,7 +1090,7 @@ void nr_schedule_ue_spec(module_id_t module_id,
pdsch_pdu->mcsTable[0] = 0;
}
AssertFatal(harq->round < gNB_mac->dl_bler.harq_round_max,"%d", harq->round);
pdsch_pdu->rvIndex[0] = nr_rv_round_map[harq->round % 4];
pdsch_pdu->rvIndex[0] = nr_get_rv(harq->round % 4);
pdsch_pdu->TBSize[0] = TBS;
pdsch_pdu->dataScramblingId = *scc->physCellId;
pdsch_pdu->nrOfLayers = nrOfLayers;
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c
+3 -3
View File
@@ -43,7 +43,7 @@
/* This function checks whether the given Dl/UL slot is set
in the input bitmap (per period), which is a mask indicating in which
slot to transmit (among those available in the TDD configuration) */
static bool is_xlsch_in_slot(uint64_t bitmap, sub_frame_t slot)
static bool is_xlsch_in_slot(uint64_t bitmap, slot_t slot)
{
AssertFatal(slot < 64, "Unable to handle periods with length larger than 64 slots in phy-test mode\n");
return (bitmap >> slot) & 0x01;
@@ -55,7 +55,7 @@ uint32_t target_dl_bw = 50;
uint64_t dlsch_slot_bitmap = (1<<1);
/* schedules whole bandwidth for first user, all the time */
void nr_preprocessor_phytest(module_id_t module_id, frame_t frame, sub_frame_t slot)
void nr_preprocessor_phytest(module_id_t module_id, frame_t frame, slot_t slot)
{
gNB_MAC_INST *mac = RC.nrmac[module_id];
/* already mutex protected: held in gNB_dlsch_ulsch_scheduler() */
@@ -217,7 +217,7 @@ uint32_t target_ul_mcs = 9;
uint32_t target_ul_bw = 50;
uint32_t target_ul_Nl = 1;
uint64_t ulsch_slot_bitmap = (1 << 8);
bool nr_ul_preprocessor_phytest(module_id_t module_id, frame_t frame, sub_frame_t slot)
bool nr_ul_preprocessor_phytest(module_id_t module_id, frame_t frame, slot_t slot)
{
gNB_MAC_INST *nr_mac = RC.nrmac[module_id];
/* already mutex protected: held in gNB_dlsch_ulsch_scheduler() */
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c
+3 -7
View File
@@ -33,8 +33,6 @@
#include "assertions.h"
#include "NR_MAC_gNB/nr_mac_gNB.h"
#include "NR_MAC_COMMON/nr_mac_extern.h"
#include "NR_MAC_gNB/mac_proto.h"
#include "common/utils/LOG/log.h"
#include "common/utils/LOG/vcd_signal_dumper.h"
@@ -2777,7 +2775,7 @@ int get_pdsch_to_harq_feedback(NR_PUCCH_Config_t *pucch_Config,
}
}
void nr_csirs_scheduling(int Mod_idP, frame_t frame, sub_frame_t slot, nfapi_nr_dl_tti_request_t *DL_req)
void nr_csirs_scheduling(int Mod_idP, frame_t frame, slot_t slot, nfapi_nr_dl_tti_request_t *DL_req)
{
int CC_id = 0;
NR_UEs_t *UE_info = &RC.nrmac[Mod_idP]->UE_info;
@@ -3038,7 +3036,7 @@ static void nr_mac_clean_cellgroup(NR_CellGroupConfig_t *cell_group)
free_and_zero(cell_group->rlc_BearerToAddModList->list.array[i]->reestablishRLC);
}
static void nr_mac_apply_cellgroup(gNB_MAC_INST *mac, NR_UE_info_t *UE, frame_t frame, sub_frame_t slot)
static void nr_mac_apply_cellgroup(gNB_MAC_INST *mac, NR_UE_info_t *UE, frame_t frame, slot_t slot)
{
LOG_D(NR_MAC, "%4d.%2d RNTI %04x: UE inactivity timer expired\n", frame, slot, UE->rnti);
@@ -3141,9 +3139,7 @@ void nr_mac_release_ue(gNB_MAC_INST *mac, int rnti)
mac_remove_nr_ue(mac, rnti);
}
void nr_mac_update_timers(module_id_t module_id,
frame_t frame,
sub_frame_t slot)
void nr_mac_update_timers(module_id_t module_id, frame_t frame, slot_t slot)
{
gNB_MAC_INST *mac = RC.nrmac[module_id];
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_srs.c
-1
View File
@@ -27,7 +27,6 @@
#include <softmodem-common.h>
#include "NR_MAC_gNB/nr_mac_gNB.h"
#include "NR_MAC_COMMON/nr_mac_extern.h"
#include "NR_MAC_gNB/mac_proto.h"
#include "common/ran_context.h"
#include "nfapi/oai_integration/vendor_ext.h"
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c
+8 -19
View File
@@ -28,16 +28,11 @@
#include <softmodem-common.h>
#include "NR_MAC_gNB/nr_mac_gNB.h"
#include "NR_MAC_COMMON/nr_mac_extern.h"
#include "NR_MAC_gNB/mac_proto.h"
#include "common/ran_context.h"
#include "common/utils/nr/nr_common.h"
#include "nfapi/oai_integration/vendor_ext.h"
static void nr_fill_nfapi_pucch(gNB_MAC_INST *nrmac,
frame_t frame,
sub_frame_t slot,
const NR_sched_pucch_t *pucch,
NR_UE_info_t* UE)
static void nr_fill_nfapi_pucch(gNB_MAC_INST *nrmac, frame_t frame, slot_t slot, const NR_sched_pucch_t *pucch, NR_UE_info_t* UE)
{
const int index = ul_buffer_index(pucch->frame,
@@ -176,7 +171,7 @@ static int get_pucch_index(int frame, int slot, const frame_structure_t *fs, int
return (frame_start + ul_period_start + ul_period_slot) % sched_pucch_size;
}
void nr_schedule_pucch(gNB_MAC_INST *nrmac, frame_t frameP, sub_frame_t slotP)
void nr_schedule_pucch(gNB_MAC_INST *nrmac, frame_t frameP, slot_t slotP)
{
/* already mutex protected: held in gNB_dlsch_ulsch_scheduler() */
NR_SCHED_ENSURE_LOCKED(&nrmac->sched_lock);
@@ -212,7 +207,7 @@ void nr_schedule_pucch(gNB_MAC_INST *nrmac, frame_t frameP, sub_frame_t slotP)
}
}
void nr_csi_meas_reporting(int Mod_idP,frame_t frame, sub_frame_t slot)
void nr_csi_meas_reporting(int Mod_idP,frame_t frame, slot_t slot)
{
const int CC_id = 0;
gNB_MAC_INST *nrmac = RC.nrmac[Mod_idP];
@@ -721,7 +716,7 @@ static void extract_pucch_csi_report(NR_CSI_MeasConfig_t *csi_MeasConfig,
}
}
static NR_UE_harq_t *find_harq(frame_t frame, sub_frame_t slot, NR_UE_info_t * UE, int harq_round_max)
static NR_UE_harq_t *find_harq(frame_t frame, slot_t slot, NR_UE_info_t * UE, int harq_round_max)
{
/* In case of realtime problems: we can only identify a HARQ process by
* timing. If the HARQ process's feedback_frame/feedback_slot is not the one we
@@ -769,10 +764,7 @@ static NR_UE_harq_t *find_harq(frame_t frame, sub_frame_t slot, NR_UE_info_t * U
return harq;
}
void handle_nr_uci_pucch_0_1(module_id_t mod_id,
frame_t frame,
sub_frame_t slot,
const nfapi_nr_uci_pucch_pdu_format_0_1_t *uci_01)
void handle_nr_uci_pucch_0_1(module_id_t mod_id, frame_t frame, slot_t slot, const nfapi_nr_uci_pucch_pdu_format_0_1_t *uci_01)
{
gNB_MAC_INST *nrmac = RC.nrmac[mod_id];
int rssi_threshold = nrmac->pucch_rssi_threshold;
@@ -827,10 +819,7 @@ void handle_nr_uci_pucch_0_1(module_id_t mod_id,
NR_SCHED_UNLOCK(&nrmac->sched_lock);
}
void handle_nr_uci_pucch_2_3_4(module_id_t mod_id,
frame_t frame,
sub_frame_t slot,
const nfapi_nr_uci_pucch_pdu_format_2_3_4_t *uci_234)
void handle_nr_uci_pucch_2_3_4(module_id_t mod_id, frame_t frame, slot_t slot, const nfapi_nr_uci_pucch_pdu_format_2_3_4_t *uci_234)
{
gNB_MAC_INST *nrmac = RC.nrmac[mod_id];
NR_SCHED_LOCK(&nrmac->sched_lock);
@@ -1001,7 +990,7 @@ bool check_bits_vs_coderate_limit(NR_PUCCH_Config_t *pucch_Config, int O_uci, in
int nr_acknack_scheduling(gNB_MAC_INST *mac,
NR_UE_info_t *UE,
frame_t frame,
sub_frame_t slot,
slot_t slot,
int ue_beam,
int r_pucch,
int is_common)
@@ -1138,7 +1127,7 @@ int nr_acknack_scheduling(gNB_MAC_INST *mac,
}
void nr_sr_reporting(gNB_MAC_INST *nrmac, frame_t SFN, sub_frame_t slot)
void nr_sr_reporting(gNB_MAC_INST *nrmac, frame_t SFN, slot_t slot)
{
/* already mutex protected: held in gNB_dlsch_ulsch_scheduler() */
NR_SCHED_ENSURE_LOCKED(&nrmac->sched_lock);
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c
+126 -22
View File
@@ -34,7 +34,6 @@
#include "common/utils/nr/nr_common.h"
#include "utils.h"
#include <openair2/UTIL/OPT/opt.h>
#include "LAYER2/NR_MAC_COMMON/nr_mac_extern.h"
#include "LAYER2/nr_rlc/nr_rlc_oai_api.h"
#include "LAYER2/RLC/rlc.h"
@@ -112,9 +111,9 @@ static int estimate_ul_buffer_short_bsr(const NR_BSR_SHORT *bsr)
* differentiate them */
int rep_idx = bsr->Buffer_size;
int estim_idx = overestim_bsr_index(rep_idx);
int max = sizeofArray(NR_SHORT_BSR_TABLE) - 1;
int max = NR_SHORT_BSR_TABLE_SIZE - 1;
int idx = min(estim_idx, max);
int estim_size = NR_SHORT_BSR_TABLE[idx];
int estim_size = get_short_bsr_value(idx);
LOG_D(NR_MAC, "short BSR LCGID %d index %d estim index %d size %d\n", bsr->LcgID, rep_idx, estim_idx, estim_size);
return estim_size;
}
@@ -134,7 +133,7 @@ static int estimate_ul_buffer_long_bsr(const NR_BSR_LONG *bsr)
bool bsr_active[8] = {bsr->LcgID0 != 0, bsr->LcgID1 != 0, bsr->LcgID2 != 0, bsr->LcgID3 != 0, bsr->LcgID4 != 0, bsr->LcgID5 != 0, bsr->LcgID6 != 0, bsr->LcgID7 != 0};
int estim_size = 0;
int max = sizeofArray(NR_LONG_BSR_TABLE) - 1;
int max = NR_LONG_BSR_TABLE_SIZE - 1;
uint8_t *payload = ((uint8_t*) bsr) + 1;
int m = 0;
const int total_lcgids = 8; /* see 38.321 6.1.3.1 */
@@ -144,7 +143,7 @@ static int estimate_ul_buffer_long_bsr(const NR_BSR_LONG *bsr)
int rep_idx = payload[m];
int estim_idx = overestim_bsr_index(rep_idx);
int idx = min(estim_idx, max);
estim_size += NR_LONG_BSR_TABLE[idx];
estim_size += get_long_bsr_value(idx);
LOG_D(NR_MAC, "LONG BSR LCGID/m %d/%d Index %d estim index %d size %d", n, m, rep_idx, estim_idx, estim_size);
m++;
@@ -266,7 +265,7 @@ static int nr_process_mac_pdu(instance_t module_idP,
NR_UE_info_t *UE,
uint8_t CC_id,
frame_t frameP,
sub_frame_t slot,
slot_t slot,
uint8_t *pduP,
uint32_t pdu_len,
const int8_t harq_pid)
@@ -575,7 +574,7 @@ static void abort_nr_ul_harq(NR_UE_info_t *UE, int8_t harq_pid)
static bool get_UE_waiting_CFRA_msg3(const gNB_MAC_INST *gNB_mac,
const int CC_id,
const frame_t frame,
const sub_frame_t slot,
const slot_t slot,
rnti_t rnti)
{
bool UE_waiting_CFRA_msg3 = false;
@@ -589,11 +588,7 @@ static bool get_UE_waiting_CFRA_msg3(const gNB_MAC_INST *gNB_mac,
return UE_waiting_CFRA_msg3;
}
void handle_nr_ul_harq(const int CC_idP,
module_id_t mod_id,
frame_t frame,
sub_frame_t slot,
const nfapi_nr_crc_t *crc_pdu)
void handle_nr_ul_harq(const int CC_idP, module_id_t mod_id, frame_t frame, slot_t slot, const nfapi_nr_crc_t *crc_pdu)
{
gNB_MAC_INST *nrmac = RC.nrmac[mod_id];
if (nrmac->radio_config.disable_harq) {
@@ -696,7 +691,7 @@ static void handle_msg3_failed_rx(NR_RA_t *ra, int i, int harq_round_max)
static void _nr_rx_sdu(const module_id_t gnb_mod_idP,
const int CC_idP,
const frame_t frameP,
const sub_frame_t slotP,
const slot_t slotP,
const rnti_t rntiP,
uint8_t *sduP,
const uint32_t sdu_lenP,
@@ -1006,7 +1001,7 @@ static void _nr_rx_sdu(const module_id_t gnb_mod_idP,
void nr_rx_sdu(const module_id_t gnb_mod_idP,
const int CC_idP,
const frame_t frameP,
const sub_frame_t slotP,
const slot_t slotP,
const rnti_t rntiP,
uint8_t *sduP,
const uint32_t sdu_lenP,
@@ -1237,6 +1232,113 @@ static uint8_t get_max_tpmi(const NR_PUSCH_Config_t *pusch_Config,
return max_tpmi;
}
// TS 38.211 - Table 6.3.1.5-1: Precoding matrix W for single-layer transmission using two antenna ports, 'n' = -1 and 'o' = -j
const char table_38211_6_3_1_5_1[6][2][1] = {
{{'1'}, {'0'}}, // tpmi 0
{{'0'}, {'1'}}, // tpmi 1
{{'1'}, {'1'}}, // tpmi 2
{{'1'}, {'n'}}, // tpmi 3
{{'1'}, {'j'}}, // tpmi 4
{{'1'}, {'o'}} // tpmi 5
};
// TS 38.211 - Table 6.3.1.5-2: Precoding matrix W for single-layer transmission using four antenna ports with transform precoding enabled, 'n' = -1 and 'o' = -j
const char table_38211_6_3_1_5_2[28][4][1] = {
{{'1'}, {'0'}, {'0'}, {'0'}}, // tpmi 0
{{'0'}, {'1'}, {'0'}, {'0'}}, // tpmi 1
{{'0'}, {'0'}, {'1'}, {'0'}}, // tpmi 2
{{'0'}, {'0'}, {'0'}, {'1'}}, // tpmi 3
{{'1'}, {'0'}, {'1'}, {'0'}}, // tpmi 4
{{'1'}, {'0'}, {'n'}, {'0'}}, // tpmi 5
{{'1'}, {'0'}, {'j'}, {'0'}}, // tpmi 6
{{'1'}, {'0'}, {'o'}, {'0'}}, // tpmi 7
{{'0'}, {'1'}, {'0'}, {'1'}}, // tpmi 8
{{'0'}, {'1'}, {'0'}, {'n'}}, // tpmi 9
{{'0'}, {'1'}, {'0'}, {'j'}}, // tpmi 10
{{'0'}, {'1'}, {'0'}, {'o'}}, // tpmi 11
{{'1'}, {'1'}, {'1'}, {'n'}}, // tpmi 12
{{'1'}, {'1'}, {'j'}, {'j'}}, // tpmi 13
{{'1'}, {'1'}, {'n'}, {'1'}}, // tpmi 14
{{'1'}, {'1'}, {'o'}, {'o'}}, // tpmi 15
{{'1'}, {'j'}, {'1'}, {'j'}}, // tpmi 16
{{'1'}, {'j'}, {'j'}, {'1'}}, // tpmi 17
{{'1'}, {'j'}, {'n'}, {'o'}}, // tpmi 18
{{'1'}, {'j'}, {'o'}, {'n'}}, // tpmi 19
{{'1'}, {'n'}, {'1'}, {'1'}}, // tpmi 20
{{'1'}, {'n'}, {'j'}, {'o'}}, // tpmi 21
{{'1'}, {'n'}, {'n'}, {'n'}}, // tpmi 22
{{'1'}, {'n'}, {'o'}, {'j'}}, // tpmi 23
{{'1'}, {'o'}, {'1'}, {'o'}}, // tpmi 24
{{'1'}, {'o'}, {'j'}, {'n'}}, // tpmi 25
{{'1'}, {'o'}, {'n'}, {'j'}}, // tpmi 26
{{'1'}, {'o'}, {'o'}, {'1'}} // tpmi 27
};
// TS 38.211 - Table 6.3.1.5-3: Precoding matrix W for single-layer transmission using four antenna ports with transform precoding disabled, 'n' = -1 and 'o' = -j
const char table_38211_6_3_1_5_3[28][4][1] = {
{{'1'}, {'0'}, {'0'}, {'0'}}, // tpmi 0
{{'0'}, {'1'}, {'0'}, {'0'}}, // tpmi 1
{{'0'}, {'0'}, {'1'}, {'0'}}, // tpmi 2
{{'0'}, {'0'}, {'0'}, {'1'}}, // tpmi 3
{{'1'}, {'0'}, {'1'}, {'0'}}, // tpmi 4
{{'1'}, {'0'}, {'n'}, {'0'}}, // tpmi 5
{{'1'}, {'0'}, {'j'}, {'0'}}, // tpmi 6
{{'1'}, {'0'}, {'o'}, {'0'}}, // tpmi 7
{{'0'}, {'1'}, {'0'}, {'1'}}, // tpmi 8
{{'0'}, {'1'}, {'0'}, {'n'}}, // tpmi 9
{{'0'}, {'1'}, {'0'}, {'j'}}, // tpmi 10
{{'0'}, {'1'}, {'0'}, {'o'}}, // tpmi 11
{{'1'}, {'1'}, {'1'}, {'1'}}, // tpmi 12
{{'1'}, {'1'}, {'j'}, {'j'}}, // tpmi 13
{{'1'}, {'1'}, {'n'}, {'n'}}, // tpmi 14
{{'1'}, {'1'}, {'o'}, {'o'}}, // tpmi 15
{{'1'}, {'j'}, {'1'}, {'j'}}, // tpmi 16
{{'1'}, {'j'}, {'j'}, {'n'}}, // tpmi 17
{{'1'}, {'j'}, {'n'}, {'o'}}, // tpmi 18
{{'1'}, {'j'}, {'o'}, {'1'}}, // tpmi 19
{{'1'}, {'n'}, {'1'}, {'n'}}, // tpmi 20
{{'1'}, {'n'}, {'j'}, {'o'}}, // tpmi 21
{{'1'}, {'n'}, {'n'}, {'1'}}, // tpmi 22
{{'1'}, {'n'}, {'o'}, {'j'}}, // tpmi 23
{{'1'}, {'o'}, {'1'}, {'o'}}, // tpmi 24
{{'1'}, {'o'}, {'j'}, {'1'}}, // tpmi 25
{{'1'}, {'o'}, {'n'}, {'j'}}, // tpmi 26
{{'1'}, {'o'}, {'o'}, {'n'}} // tpmi 27
};
// TS 38.211 - Table 6.3.1.5-4: Precoding matrix W for two-layer transmission using two antenna ports, 'n' = -1 and 'o' = -j
const char table_38211_6_3_1_5_4[3][2][2] = {
{{'1', '0'}, {'0', '1'}}, // tpmi 0
{{'1', '1'}, {'1', 'n'}}, // tpmi 1
{{'1', '1'}, {'j', 'o'}} // tpmi 2
};
// TS 38.211 - Table 6.3.1.5-5: Precoding matrix W for two-layer transmission using four antenna ports, 'n' = -1 and 'o' = -j
const char table_38211_6_3_1_5_5[22][4][2] = {
{{'1', '0'}, {'0', '1'}, {'0', '0'}, {'0', '0'}}, // tpmi 0
{{'1', '0'}, {'0', '0'}, {'0', '1'}, {'0', '0'}}, // tpmi 1
{{'1', '0'}, {'0', '0'}, {'0', '0'}, {'0', '1'}}, // tpmi 2
{{'0', '0'}, {'1', '0'}, {'0', '1'}, {'0', '0'}}, // tpmi 3
{{'0', '0'}, {'1', '0'}, {'0', '0'}, {'0', '1'}}, // tpmi 4
{{'0', '0'}, {'0', '0'}, {'1', '0'}, {'0', '1'}}, // tpmi 5
{{'1', '0'}, {'0', '1'}, {'1', '0'}, {'0', 'o'}}, // tpmi 6
{{'1', '0'}, {'0', '1'}, {'1', '0'}, {'0', 'j'}}, // tpmi 7
{{'1', '0'}, {'0', '1'}, {'o', '0'}, {'0', '1'}}, // tpmi 8
{{'1', '0'}, {'0', '1'}, {'o', '0'}, {'0', 'n'}}, // tpmi 9
{{'1', '0'}, {'0', '1'}, {'n', '0'}, {'0', 'o'}}, // tpmi 10
{{'1', '0'}, {'0', '1'}, {'n', '0'}, {'0', 'j'}}, // tpmi 11
{{'1', '0'}, {'0', '1'}, {'j', '0'}, {'0', '1'}}, // tpmi 12
{{'1', '0'}, {'0', '1'}, {'j', '0'}, {'0', 'n'}}, // tpmi 13
{{'1', '1'}, {'1', '1'}, {'1', 'n'}, {'1', 'n'}}, // tpmi 14
{{'1', '1'}, {'1', '1'}, {'j', 'o'}, {'j', 'o'}}, // tpmi 15
{{'1', '1'}, {'j', 'j'}, {'1', 'n'}, {'j', 'o'}}, // tpmi 16
{{'1', '1'}, {'j', 'j'}, {'j', 'o'}, {'n', '1'}}, // tpmi 17
{{'1', '1'}, {'n', 'n'}, {'1', 'n'}, {'n', '1'}}, // tpmi 18
{{'1', '1'}, {'n', 'n'}, {'j', 'o'}, {'o', 'j'}}, // tpmi 19
{{'1', '1'}, {'o', 'o'}, {'1', 'n'}, {'o', 'j'}}, // tpmi 20
{{'1', '1'}, {'o', 'o'}, {'j', 'o'}, {'1', 'n'}} // tpmi 21
};
static void get_precoder_matrix_coef(char *w,
const uint8_t ul_ri,
const uint16_t num_ue_srs_ports,
@@ -1352,7 +1454,7 @@ static int nr_srs_tpmi_estimation(const NR_PUSCH_Config_t *pusch_Config,
void handle_nr_srs_measurements(const module_id_t module_id,
const frame_t frame,
const sub_frame_t slot,
const slot_t slot,
nfapi_nr_srs_indication_pdu_t *srs_ind)
{
gNB_MAC_INST *nrmac = RC.nrmac[module_id];
@@ -1524,7 +1626,7 @@ long get_K2(NR_PUSCH_TimeDomainResourceAllocationList_t *tdaList,
static bool nr_UE_is_to_be_scheduled(const frame_structure_t *fs,
NR_UE_info_t *UE,
frame_t frame,
sub_frame_t slot,
slot_t slot,
uint32_t ulsch_max_frame_inactivity)
{
const int n = fs->numb_slots_frame;
@@ -1645,7 +1747,7 @@ static void nr_ue_max_mcs_min_rb(int mu,
static bool allocate_ul_retransmission(gNB_MAC_INST *nrmac,
frame_t frame,
sub_frame_t slot,
slot_t slot,
uint16_t *rballoc_mask,
int *n_rb_sched,
int dci_beam_idx,
@@ -2198,7 +2300,7 @@ static void pf_ul(module_id_t module_id,
}
}
static bool nr_ulsch_preprocessor(module_id_t module_id, frame_t frame, sub_frame_t slot)
static bool nr_ulsch_preprocessor(module_id_t module_id, frame_t frame, slot_t slot)
{
gNB_MAC_INST *nr_mac = RC.nrmac[module_id];
// no UEs
@@ -2266,7 +2368,7 @@ nr_pp_impl_ul nr_init_ulsch_preprocessor(int CC_id)
return nr_ulsch_preprocessor;
}
void nr_schedule_ulsch(module_id_t module_id, frame_t frame, sub_frame_t slot, nfapi_nr_ul_dci_request_t *ul_dci_req)
void nr_schedule_ulsch(module_id_t module_id, frame_t frame, slot_t slot, nfapi_nr_ul_dci_request_t *ul_dci_req)
{
gNB_MAC_INST *nr_mac = RC.nrmac[module_id];
/* already mutex protected: held in gNB_dlsch_ulsch_scheduler() */
@@ -2395,7 +2497,7 @@ void nr_schedule_ulsch(module_id_t module_id, frame_t frame, sub_frame_t slot, n
sched_pusch->tb_size,
harq_id,
cur_harq->round,
nr_rv_round_map[cur_harq->round%4],
nr_get_rv(cur_harq->round % 4),
cur_harq->ndi,
sched_ctrl->estimated_ul_buffer,
sched_ctrl->sched_ul_bytes,
@@ -2509,8 +2611,10 @@ void nr_schedule_ulsch(module_id_t module_id, frame_t frame, sub_frame_t slot, n
pusch_pdu->nr_of_symbols = sched_pusch->tda_info.nrOfSymbols;
/* PUSCH PDU */
AssertFatal(cur_harq->round < nr_mac->ul_bler.harq_round_max, "Indexing nr_rv_round_map[%d] is out of bounds\n", cur_harq->round%4);
pusch_pdu->pusch_data.rv_index = nr_rv_round_map[cur_harq->round%4];
AssertFatal(cur_harq->round < nr_mac->ul_bler.harq_round_max,
"RV index %d is out of bounds\n",
cur_harq->round % 4);
pusch_pdu->pusch_data.rv_index = nr_get_rv(cur_harq->round % 4);
pusch_pdu->pusch_data.harq_process_id = harq_id;
pusch_pdu->pusch_data.new_data_indicator = (cur_harq->round == 0) ? 1 : 0; // not NDI but indicator for new transmission
pusch_pdu->pusch_data.tb_size = sched_pusch->tb_size;
openair2/LAYER2/NR_MAC_gNB/mac_proto.h
+23 -32
View File
@@ -70,23 +70,21 @@ int nr_transmission_action_indicator_stop(gNB_MAC_INST *mac, NR_UE_info_t *UE_in
void clear_nr_nfapi_information(gNB_MAC_INST *gNB,
int CC_idP,
frame_t frameP,
sub_frame_t slotP,
slot_t slotP,
nfapi_nr_dl_tti_request_t *DL_req,
nfapi_nr_tx_data_request_t *TX_req,
nfapi_nr_ul_dci_request_t *UL_dci_req);
void nr_mac_update_timers(module_id_t module_id,
frame_t frame,
sub_frame_t slot);
void nr_mac_update_timers(module_id_t module_id, frame_t frame, slot_t slot);
void gNB_dlsch_ulsch_scheduler(module_id_t module_idP, frame_t frame_rxP, sub_frame_t slot_rxP, NR_Sched_Rsp_t *sched_info);
void gNB_dlsch_ulsch_scheduler(module_id_t module_idP, frame_t frame_rxP, slot_t slot_rxP, NR_Sched_Rsp_t *sched_info);
/* \brief main DL scheduler function. Calls a preprocessor to decide on
* resource allocation, then "post-processes" resource allocation (nFAPI
* messages, statistics, HARQ handling, CEs, ... */
void nr_schedule_ue_spec(module_id_t module_id,
frame_t frame,
sub_frame_t slot,
slot_t slot,
nfapi_nr_dl_tti_request_t *DL_req,
nfapi_nr_tx_data_request_t *TX_req);
@@ -95,13 +93,13 @@ nr_pp_impl_dl nr_init_dlsch_preprocessor(int CC_id);
void schedule_nr_sib1(module_id_t module_idP,
frame_t frameP,
sub_frame_t slotP,
slot_t slotP,
nfapi_nr_dl_tti_request_t *DL_req,
nfapi_nr_tx_data_request_t *TX_req);
void schedule_nr_sib19(module_id_t module_idP,
frame_t frameP,
sub_frame_t slotP,
slot_t slotP,
nfapi_nr_dl_tti_request_t *DL_req,
nfapi_nr_tx_data_request_t *TX_req,
int sib19_bcch_length,
@@ -109,12 +107,12 @@ void schedule_nr_sib19(module_id_t module_idP,
struct NR_SchedulingInfo2_r17* find_sib19_sched_info(const struct NR_SI_SchedulingInfo_v1700*);
void schedule_nr_mib(module_id_t module_idP, frame_t frameP, sub_frame_t slotP, nfapi_nr_dl_tti_request_t *DL_req);
void schedule_nr_mib(module_id_t module_idP, frame_t frameP, slot_t slotP, nfapi_nr_dl_tti_request_t *DL_req);
/* \brief main UL scheduler function. Calls a preprocessor to decide on
* resource allocation, then "post-processes" resource allocation (nFAPI
* messages, statistics, HARQ handling, ... */
void nr_schedule_ulsch(module_id_t module_id, frame_t frame, sub_frame_t slot, nfapi_nr_ul_dci_request_t *ul_dci_req);
void nr_schedule_ulsch(module_id_t module_id, frame_t frame, slot_t slot, nfapi_nr_ul_dci_request_t *ul_dci_req);
/* \brief default UL preprocessor init routine, returns preprocessor to call */
nr_pp_impl_ul nr_init_ulsch_preprocessor(int CC_id);
@@ -123,7 +121,7 @@ nr_pp_impl_ul nr_init_ulsch_preprocessor(int CC_id);
void nr_schedule_RA(module_id_t module_idP,
frame_t frameP,
sub_frame_t slotP,
slot_t slotP,
nfapi_nr_ul_dci_request_t *ul_dci_req,
nfapi_nr_dl_tti_request_t *DL_req,
nfapi_nr_tx_data_request_t *TX_req);
@@ -140,9 +138,9 @@ void nr_initiate_ra_proc(module_id_t module_idP,
void nr_clear_ra_proc(NR_RA_t *ra);
int nr_allocate_CCEs(int module_idP, int CC_idP, frame_t frameP, sub_frame_t slotP, int test_only);
int nr_allocate_CCEs(int module_idP, int CC_idP, frame_t frameP, slot_t slotP, int test_only);
void schedule_nr_prach(module_id_t module_idP, frame_t frameP, sub_frame_t slotP);
void schedule_nr_prach(module_id_t module_idP, frame_t frameP, slot_t slotP);
uint16_t nr_mac_compute_RIV(uint16_t N_RB_DL, uint16_t RBstart, uint16_t Lcrbs);
@@ -150,18 +148,18 @@ uint16_t nr_mac_compute_RIV(uint16_t N_RB_DL, uint16_t RBstart, uint16_t Lcrbs);
/* \brief preprocessor for phytest: schedules UE_id 0 with fixed MCS on all
* freq resources */
void nr_preprocessor_phytest(module_id_t module_id, frame_t frame, sub_frame_t slot);
void nr_preprocessor_phytest(module_id_t module_id, frame_t frame, slot_t slot);
/* \brief UL preprocessor for phytest: schedules UE_id 0 with fixed MCS on a
* fixed set of resources */
bool nr_ul_preprocessor_phytest(module_id_t module_id, frame_t frame, sub_frame_t slot);
bool nr_ul_preprocessor_phytest(module_id_t module_id, frame_t frame, slot_t slot);
void handle_nr_uci_pucch_0_1(module_id_t mod_id,
frame_t frame,
sub_frame_t slot,
slot_t slot,
const nfapi_nr_uci_pucch_pdu_format_0_1_t *uci_01);
void handle_nr_uci_pucch_2_3_4(module_id_t mod_id,
frame_t frame,
sub_frame_t slot,
slot_t slot,
const nfapi_nr_uci_pucch_pdu_format_2_3_4_t *uci_234);
void config_uldci(const NR_UE_ServingCell_Info_t *sc_info,
@@ -174,9 +172,7 @@ void config_uldci(const NR_UE_ServingCell_Info_t *sc_info,
uint8_t ndi,
NR_UE_UL_BWP_t *ul_bwp);
void nr_schedule_pucch(gNB_MAC_INST *nrmac,
frame_t frameP,
sub_frame_t slotP);
void nr_schedule_pucch(gNB_MAC_INST *nrmac, frame_t frameP, slot_t slotP);
void nr_srs_ri_computation(const nfapi_nr_srs_normalized_channel_iq_matrix_t *nr_srs_normalized_channel_iq_matrix,
const NR_UE_UL_BWP_t *current_BWP,
@@ -186,14 +182,14 @@ int get_pucch_resourceid(NR_PUCCH_Config_t *pucch_Config, int O_uci, int pucch_r
void nr_schedule_srs(int module_id, frame_t frame, int slot);
void nr_csirs_scheduling(int Mod_idP, frame_t frame, sub_frame_t slot, nfapi_nr_dl_tti_request_t *DL_req);
void nr_csirs_scheduling(int Mod_idP, frame_t frame, slot_t slot, nfapi_nr_dl_tti_request_t *DL_req);
void nr_csi_meas_reporting(int Mod_idP, frame_t frameP, sub_frame_t slotP);
void nr_csi_meas_reporting(int Mod_idP, frame_t frameP, slot_t slotP);
int nr_acknack_scheduling(gNB_MAC_INST *mac,
NR_UE_info_t *UE,
frame_t frameP,
sub_frame_t slotP,
slot_t slotP,
int beam_index,
int r_pucch,
int do_common);
@@ -305,11 +301,6 @@ int get_spf(nfapi_nr_config_request_scf_t *cfg);
int to_absslot(nfapi_nr_config_request_scf_t *cfg,int frame,int slot);
void nr_get_tbs_dl(nfapi_nr_dl_tti_pdsch_pdu *pdsch_pdu,
int x_overhead,
uint8_t numdmrscdmgroupnodata,
uint8_t tb_scaling);
int NRRIV2BW(int locationAndBandwidth,int N_RB);
int NRRIV2PRBOFFSET(int locationAndBandwidth,int N_RB);
@@ -360,7 +351,7 @@ int binomial(int n, int k);
void nr_rx_sdu(const module_id_t gnb_mod_idP,
const int CC_idP,
const frame_t frameP,
const sub_frame_t subframeP,
const slot_t subframeP,
const rnti_t rntiP,
uint8_t * sduP,
const uint32_t sdu_lenP,
@@ -380,7 +371,7 @@ void reset_ul_harq_list(NR_UE_sched_ctrl_t *sched_ctrl);
void handle_nr_ul_harq(const int CC_idP,
module_id_t mod_id,
frame_t frame,
sub_frame_t slot,
slot_t slot,
const nfapi_nr_crc_t *crc_pdu);
uint8_t *allocate_transportBlock_buffer(byte_array_t *tb, uint32_t needed);
@@ -388,7 +379,7 @@ void free_transportBlock_buffer(byte_array_t *tb);
void handle_nr_srs_measurements(const module_id_t module_id,
const frame_t frame,
const sub_frame_t slot,
const slot_t slot,
nfapi_nr_srs_indication_pdu_t *srs_ind);
void find_SSB_and_RO_available(gNB_MAC_INST *nrmac);
@@ -451,7 +442,7 @@ int get_fapi_beamforming_index(gNB_MAC_INST *mac, int ssb_idx);
NR_beam_alloc_t beam_allocation_procedure(NR_beam_info_t *beam_info, int frame, int slot, int beam_index, int slots_per_frame);
void reset_beam_status(NR_beam_info_t *beam_info, int frame, int slot, int beam_index, int slots_per_frame, bool new_beam);
void beam_selection_procedures(gNB_MAC_INST *mac, NR_UE_info_t *UE);
void nr_sr_reporting(gNB_MAC_INST *nrmac, frame_t frameP, sub_frame_t slotP);
void nr_sr_reporting(gNB_MAC_INST *nrmac, frame_t frameP, slot_t slotP);
size_t dump_mac_stats(gNB_MAC_INST *gNB, char *output, size_t strlen, bool reset_rsrp);
openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h
+5 -10
View File
@@ -86,7 +86,6 @@
#include "mac_rrc_ul.h"
/* MAC */
#include "LAYER2/NR_MAC_COMMON/nr_mac_extern.h"
#include "LAYER2/NR_MAC_COMMON/nr_mac_common.h"
#include "NR_TAG.h"
@@ -103,7 +102,7 @@
#define MAX_NUM_NR_PRACH_PREAMBLES 64
#define MIN_NUM_PRBS_TO_SCHEDULE 5
extern const uint8_t nr_rv_round_map[4];
uint8_t nr_get_rv(int rel_round);
/*! \brief NR_list_t is a "list" (of users, HARQ processes, slices, ...).
* Especially useful in the scheduler and to keep "classes" of users. */
@@ -213,7 +212,7 @@ typedef struct {
/// Frame where Msg2 is to be sent
frame_t Msg2_frame;
/// Subframe where Msg3 is to be sent
sub_frame_t Msg3_slot;
slot_t Msg3_slot;
/// Frame where Msg3 is to be sent
frame_t Msg3_frame;
/// Msg3 time domain allocation index
@@ -623,7 +622,7 @@ typedef struct {
/// For UL synchronization: store last UL scheduling grant
frame_t last_ul_frame;
sub_frame_t last_ul_slot;
slot_t last_ul_slot;
/// total amount of data awaiting for this UE
uint32_t num_total_bytes;
@@ -798,12 +797,8 @@ typedef struct {
#define UE_iterator(BaSe, VaR) NR_UE_info_t ** VaR##pptr=BaSe, *VaR; while ((VaR=*(VaR##pptr++)))
typedef void (*nr_pp_impl_dl)(module_id_t mod_id,
frame_t frame,
sub_frame_t slot);
typedef bool (*nr_pp_impl_ul)(module_id_t mod_id,
frame_t frame,
sub_frame_t slot);
typedef void (*nr_pp_impl_dl)(module_id_t mod_id, frame_t frame, slot_t slot);
typedef bool (*nr_pp_impl_ul)(module_id_t mod_id, frame_t frame, slot_t slot);
typedef struct f1_config_t {
f1ap_setup_req_t *setup_req;
openair2/NR_PHY_INTERFACE/NR_IF_Module.c
+2 -2
View File
@@ -99,7 +99,7 @@ static void handle_nr_uci(NR_UL_IND_t *UL_info)
const module_id_t mod_id = UL_info->module_id;
const frame_t frame = UL_info->uci_ind.sfn;
const sub_frame_t slot = UL_info->uci_ind.slot;
const slot_t slot = UL_info->uci_ind.slot;
int num_ucis = UL_info->uci_ind.num_ucis;
nfapi_nr_uci_t *uci_list = UL_info->uci_ind.uci_list;
@@ -225,7 +225,7 @@ static void handle_nr_srs(NR_UL_IND_t *UL_info)
const module_id_t module_id = UL_info->module_id;
const frame_t frame = UL_info->srs_ind.sfn;
const sub_frame_t slot = UL_info->srs_ind.slot;
const slot_t slot = UL_info->srs_ind.slot;
const int num_srs = UL_info->srs_ind.number_of_pdus;
nfapi_nr_srs_indication_pdu_t *srs_list = UL_info->srs_ind.pdu_list;
openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c
-1
View File
@@ -38,7 +38,6 @@
#include "NR_IF_Module.h"
#include "NR_MAC_UE/mac_proto.h"
#include "assertions.h"
#include "NR_MAC_UE/mac_extern.h"
#include "SCHED_NR_UE/fapi_nr_ue_l1.h"
#include "executables/softmodem-common.h"
#include "openair2/RRC/NR_UE/L2_interface_ue.h"
openair2/RRC/LTE/rrc_vars.h
-1
View File
@@ -35,7 +35,6 @@
#include "LAYER2/RLC/rlc.h"
#include "COMMON/mac_rrc_primitives.h"
#include "LAYER2/MAC/mac.h"
#include "openair2/RRC/NR/nr_rrc_extern.h"
UE_PF_PO_t UE_PF_PO[NFAPI_CC_MAX][MAX_MOBILES_PER_ENB];
pthread_mutex_t ue_pf_po_mutex;
openair2/RRC/NR/MESSAGES/asn1_msg.c
+3 -7
View File
@@ -49,7 +49,6 @@
#include "openair3/SECU/key_nas_deriver.h"
#include "RRC/NR/nr_rrc_extern.h"
#include "NR_DL-CCCH-Message.h"
#include "NR_UL-CCCH-Message.h"
#include "NR_DL-DCCH-Message.h"
@@ -1416,15 +1415,12 @@ int do_NR_Paging(uint8_t Mod_id, uint8_t *buffer, uint32_t tmsi)
* in encoded form which we decode + add to the handoverPreparationInformation */
int do_NR_HandoverPreparationInformation(const uint8_t *uecap_buf, int uecap_buf_size, uint8_t *buf, int buf_size)
{
NR_HandoverPreparationInformation_t *hpi = calloc(1, sizeof(*hpi));
AssertFatal(hpi != NULL, "out of memory\n");
NR_HandoverPreparationInformation_t *hpi = calloc_or_fail(1, sizeof(*hpi));
hpi->criticalExtensions.present = NR_HandoverPreparationInformation__criticalExtensions_PR_c1;
hpi->criticalExtensions.choice.c1 = calloc(1, sizeof(*hpi->criticalExtensions.choice.c1));
AssertFatal(hpi->criticalExtensions.choice.c1 != NULL, "out of memory\n");
hpi->criticalExtensions.choice.c1 = calloc_or_fail(1, sizeof(*hpi->criticalExtensions.choice.c1));
hpi->criticalExtensions.choice.c1->present =
NR_HandoverPreparationInformation__criticalExtensions__c1_PR_handoverPreparationInformation;
NR_HandoverPreparationInformation_IEs_t *hpi_ie = calloc(1, sizeof(*hpi_ie));
AssertFatal(hpi_ie != NULL, "out of memory\n");
NR_HandoverPreparationInformation_IEs_t *hpi_ie = calloc_or_fail(1, sizeof(*hpi_ie));
hpi->criticalExtensions.choice.c1->choice.handoverPreparationInformation = hpi_ie;
NR_UE_CapabilityRAT_ContainerList_t *list = NULL;
openair2/RRC/NR/nr_rrc_extern.h
-38
View File
@@ -1,38 +0,0 @@
/*
* Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership.
* The OpenAirInterface Software Alliance licenses this file to You under
* the OAI Public License, Version 1.1 (the "License"); you may not use this file
* except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.openairinterface.org/?page_id=698
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*-------------------------------------------------------------------------------
* For more information about the OpenAirInterface (OAI) Software Alliance:
* contact@openairinterface.org
*/
/*! \file nr_rrc_extern.h
* \brief rrc external vars
* \author Navid Nikaein and Raymond Knopp, WEI-TAI CHEN
* \date 2011, 2018
* \version 1.0
* \company Eurecom, NTUST
* \email: navid.nikaein@eurecom.fr, kroempa@gmail.com
*/
#ifndef __OPENAIR_NR_RRC_EXTERN_H__
#define __OPENAIR_NR_RRC_EXTERN_H__
#include "nr_rrc_defs.h"
#include "COMMON/mac_rrc_primitives.h"
#include "LAYER2/RLC/rlc.h"
#include "openair2/RRC/common.h"
void openair_rrc_gNB_configuration(gNB_RRC_INST *rrc, gNB_RrcConfigurationReq *configuration);
#endif
openair2/RRC/NR/nr_rrc_proto.h
+1 -1
View File
@@ -129,5 +129,5 @@ void rrc_gNB_generate_UeContextModificationRequest(const gNB_RRC_INST *rrc,
pdusession_level_qos_parameter_t *get_qos_characteristics(const int qfi, rrc_pdu_session_param_t *pduSession);
f1ap_qos_characteristics_t get_qos_char_from_qos_flow_param(const pdusession_level_qos_parameter_t *qos_param);
void openair_rrc_gNB_configuration(gNB_RRC_INST *rrc, gNB_RrcConfigurationReq *configuration);
#endif
openair2/RRC/NR/rrc_gNB.c
+32 -19
View File
@@ -76,7 +76,6 @@
#include "nr_pdcp/nr_pdcp_entity.h"
#include "nr_pdcp/nr_pdcp_oai_api.h"
#include "nr_rrc_defs.h"
#include "nr_rrc_extern.h"
#include "oai_asn1.h"
#include "openair2/F1AP/f1ap_common.h"
#include "openair2/F1AP/f1ap_ids.h"
@@ -270,8 +269,7 @@ void openair_rrc_gNB_configuration(gNB_RRC_INST *rrc, gNB_RrcConfigurationReq *c
rrc->configuration = *configuration;
/// System Information INIT
init_NR_SI(rrc);
return;
} // END openair_rrc_gNB_configuration
}
static void rrc_gNB_process_AdditionRequestInformation(const module_id_t gnb_mod_idP, x2ap_ENDC_sgnb_addition_req_t *m)
{
@@ -421,12 +419,13 @@ static void rrc_gNB_generate_RRCSetup(instance_t instance,
freeSRBlist(SRBs);
f1_ue_data_t ue_data = cu_get_f1_ue_data(ue_p->rrc_ue_id);
RETURN_IF_INVALID_ASSOC_ID(ue_data.du_assoc_id);
int srbid = 0;
f1ap_dl_rrc_message_t dl_rrc = {
.gNB_CU_ue_id = ue_p->rrc_ue_id,
.gNB_DU_ue_id = ue_data.secondary_ue,
.rrc_container = buf,
.rrc_container_length = size,
.srb_id = CCCH
.srb_id = srbid
};
rrc->mac_rrc.dl_rrc_message_transfer(ue_data.du_assoc_id, &dl_rrc);
}
@@ -451,12 +450,13 @@ static void rrc_gNB_generate_RRCReject(module_id_t module_id, rrc_gNB_ue_context
f1_ue_data_t ue_data = cu_get_f1_ue_data(ue_p->rrc_ue_id);
RETURN_IF_INVALID_ASSOC_ID(ue_data.du_assoc_id);
int srbid = 0;
f1ap_dl_rrc_message_t dl_rrc = {
.gNB_CU_ue_id = ue_p->rrc_ue_id,
.gNB_DU_ue_id = ue_data.secondary_ue,
.rrc_container = buf,
.rrc_container_length = size,
.srb_id = CCCH,
.srb_id = srbid,
.execute_duplication = 1,
.RAT_frequency_priority_information.en_dc = 0
};
@@ -1276,7 +1276,11 @@ static void process_Event_Based_Measurement_Report(gNB_RRC_UE_t *ue, NR_ReportCo
break;
case NR_EventTriggerConfig__eventId_PR_eventA3: {
LOG_W(NR_RRC, "HO LOG: Event A3 Report - Neighbour Becomes Better than Serving!\n");
LOG_W(NR_RRC, "HO LOG: Event A3 Report for UE %d - Neighbour Becomes Better than Serving!\n", ue->rrc_ue_id);
if (!measurementReport->criticalExtensions.choice.measurementReport) {
LOG_E(NR_RRC, "HO LOG: Event A3 Report: measurementReport is null\n");
break;
}
const NR_MeasResults_t *measResults = &measurementReport->criticalExtensions.choice.measurementReport->measResults;
for (int serving_cell_idx = 0; serving_cell_idx < measResults->measResultServingMOList.list.count; serving_cell_idx++) {
@@ -1290,11 +1294,11 @@ static void process_Event_Based_Measurement_Report(gNB_RRC_UE_t *ue, NR_ReportCo
LOG_D(NR_RRC, "Serving Cell RSRP: %d\n", servingCellRSRP);
}
if (measResults->measResultNeighCells == NULL)
break;
if (measResults->measResultNeighCells->present != NR_MeasResults__measResultNeighCells_PR_measResultListNR)
if (measResults->measResultNeighCells == NULL ||
measResults->measResultNeighCells->present != NR_MeasResults__measResultNeighCells_PR_measResultListNR) {
LOG_D(NR_RRC, "HO LOG: No neighbor cell measurements available\n");
break;
}
const NR_MeasResultListNR_t *measResultListNR = measResults->measResultNeighCells->choice.measResultListNR;
for (int neigh_meas_idx = 0; neigh_meas_idx < measResultListNR->list.count; neigh_meas_idx++) {
@@ -1392,7 +1396,7 @@ static void rrc_gNB_process_MeasurementReport(gNB_RRC_UE_t *UE, NR_MeasurementRe
}
}
if (report_config == NULL) {
if (report_config == NULL || report_config->choice.reportConfigNR == NULL) {
LOG_E(NR_RRC, "There is no related report configuration for this measId!\n");
return;
}
@@ -1741,7 +1745,11 @@ static int rrc_gNB_decode_dcch(gNB_RRC_INST *rrc, const f1ap_ul_rrc_message_t *m
break;
case NR_UL_DCCH_MessageType__c1_PR_measurementReport:
rrc_gNB_process_MeasurementReport(UE, ul_dcch_msg->message.choice.c1->choice.measurementReport);
if (ul_dcch_msg->message.choice.c1->choice.measurementReport != NULL) {
rrc_gNB_process_MeasurementReport(UE, ul_dcch_msg->message.choice.c1->choice.measurementReport);
} else {
LOG_E(NR_RRC, "UE %d: No measurementReport CHOICE is given\n", ue_context_p->ue_context.rrc_ue_id);
}
break;
case NR_UL_DCCH_MessageType__c1_PR_ulInformationTransfer:
@@ -2026,19 +2034,20 @@ static void rrc_CU_process_ue_context_release_request(MessageDef *msg_p, sctp_as
gNB_RRC_INST *rrc = RC.nrrrc[instance];
rrc_gNB_ue_context_t *ue_context_p = rrc_gNB_get_ue_context(rrc, req->gNB_CU_ue_id);
// TODO what happens if no AMF connected? should also handle, set an_release true
int srbid = 1;
if (!ue_context_p) {
LOG_W(RRC, "could not find UE context for CU UE ID %u: auto-generate release command\n", req->gNB_CU_ue_id);
uint8_t buffer[RRC_BUF_SIZE] = {0};
int size = do_NR_RRCRelease(buffer, RRC_BUF_SIZE, rrc_gNB_get_next_transaction_identifier(0));
uint8_t buffer[NR_RRC_BUF_SIZE] = {0};
int size = do_NR_RRCRelease(buffer, NR_RRC_BUF_SIZE, rrc_gNB_get_next_transaction_identifier(0));
f1ap_ue_context_release_cmd_t ue_context_release_cmd = {
.gNB_CU_ue_id = req->gNB_CU_ue_id,
.gNB_DU_ue_id = req->gNB_DU_ue_id,
.cause = F1AP_CAUSE_RADIO_NETWORK,
.cause_value = 10, // 10 = F1AP_CauseRadioNetwork_normal_release
.srb_id = DCCH,
.srb_id = srbid,
};
deliver_ue_ctxt_release_data_t data = {.rrc = rrc, .release_cmd = &ue_context_release_cmd};
nr_pdcp_data_req_srb(req->gNB_CU_ue_id, DCCH, rrc_gNB_mui++, size, buffer, rrc_deliver_ue_ctxt_release_cmd, &data);
nr_pdcp_data_req_srb(req->gNB_CU_ue_id, srbid, rrc_gNB_mui++, size, buffer, rrc_deliver_ue_ctxt_release_cmd, &data);
return;
}
@@ -2401,8 +2410,11 @@ static void print_rrc_meas(FILE *f, const NR_MeasResults_t *measresults)
NR_MeasResultServMO_t *measresultservmo = measresults->measResultServingMOList.list.array[0];
NR_MeasResultNR_t *measresultnr = &measresultservmo->measResultServingCell;
NR_MeasQuantityResults_t *mqr = measresultnr->measResult.cellResults.resultsSSB_Cell;
fprintf(f, " servingCellId %ld MeasResultNR for phyCellId %ld:\n resultSSB:", measresultservmo->servCellId, *measresultnr->physCellId);
if (measresultnr->physCellId)
fprintf(f,
" servingCellId %ld MeasResultNR for phyCellId %ld:\n resultSSB:",
measresultservmo->servCellId,
*measresultnr->physCellId);
if (mqr != NULL) {
const long rrsrp = *mqr->rsrp - 156;
const float rrsrq = (float) (*mqr->rsrq - 87) / 2.0f;
@@ -2418,7 +2430,8 @@ static void print_rrc_meas(FILE *f, const NR_MeasResults_t *measresults)
for (int i = 0; i < meas_neigh->list.count; ++i) {
NR_MeasResultNR_t *measresultneigh = meas_neigh->list.array[i];
NR_MeasQuantityResults_t *neigh_mqr = measresultneigh->measResult.cellResults.resultsSSB_Cell;
fprintf(f, " neighboring cell for phyCellId %ld:\n resultSSB:", *measresultneigh->physCellId);
if (measresultneigh->physCellId)
fprintf(f, " neighboring cell for phyCellId %ld:\n resultSSB:", *measresultneigh->physCellId);
if (mqr != NULL) {
const long rrsrp = *neigh_mqr->rsrp - 156;
const float rrsrq = (float)(*neigh_mqr->rsrq - 87) / 2.0f;
openair2/RRC/NR/rrc_gNB_mobility.c
+7 -11
View File
@@ -39,15 +39,12 @@
typedef enum { HO_CTX_BOTH, HO_CTX_SOURCE, HO_CTX_TARGET } ho_ctx_type_t;
static nr_handover_context_t *alloc_ho_ctx(ho_ctx_type_t type)
{
nr_handover_context_t *ho_ctx = calloc(1, sizeof(*ho_ctx));
AssertFatal(ho_ctx != NULL, "out of memory\n");
nr_handover_context_t *ho_ctx = calloc_or_fail(1, sizeof(*ho_ctx));
if (type == HO_CTX_SOURCE || type == HO_CTX_BOTH) {
ho_ctx->source = calloc(1, sizeof(*ho_ctx->source));
AssertFatal(ho_ctx->source != NULL, "out of memory\n");
ho_ctx->source = calloc_or_fail(1, sizeof(*ho_ctx->source));
}
if (type == HO_CTX_TARGET || type == HO_CTX_BOTH) {
ho_ctx->target = calloc(1, sizeof(*ho_ctx->target));
AssertFatal(ho_ctx->target != NULL, "out of memory\n");
ho_ctx->target = calloc_or_fail(1, sizeof(*ho_ctx->target));
}
return ho_ctx;
}
@@ -132,9 +129,9 @@ static void nr_initiate_handover(const gNB_RRC_INST *rrc,
.handoverPreparationInfo_length = ho_prep_len,
};
f1ap_drb_to_be_setup_t drbs[32] = {0}; // maximum DRB can be 32
f1ap_drb_to_be_setup_t drbs[MAX_DRBS_PER_UE] = {0};
int nb_drb = 0;
for (int i = 0; i < 32; ++i) { /* for each DRB */
for (int i = 0; i < sizeofArray(drbs); ++i) {
drb_t *rrc_drb = &ue->established_drbs[i];
if (rrc_drb->status == DRB_INACTIVE)
continue;
@@ -157,8 +154,7 @@ static void nr_initiate_handover(const gNB_RRC_INST *rrc,
// this changes
AssertFatal(pdu->param.nb_qos == 1, "only 1 Qos flow supported\n");
drb->drb_info.flows_to_be_setup_length = 1;
drb->drb_info.flows_mapped_to_drb = calloc(1, sizeof(f1ap_flows_mapped_to_drb_t));
AssertFatal(drb->drb_info.flows_mapped_to_drb, "could not allocate memory\n");
drb->drb_info.flows_mapped_to_drb = calloc_or_fail(1, sizeof(f1ap_flows_mapped_to_drb_t));
int qfi = rrc_drb->cnAssociation.sdap_config.mappedQoS_FlowsToAdd[0];
DevAssert(qfi > 0);
drb->drb_info.flows_mapped_to_drb[0].qfi = qfi;
@@ -283,7 +279,7 @@ static void nr_rrc_f1_ho_complete(gNB_RRC_INST *rrc, gNB_RRC_UE_t *UE)
f1ap_ue_context_release_cmd_t cmd = {
.gNB_CU_ue_id = UE->rrc_ue_id,
.gNB_DU_ue_id = source_ctx->du_ue_id,
.cause = F1AP_CAUSE_RADIO_NETWORK, // better
.cause = F1AP_CAUSE_RADIO_NETWORK,
.cause_value = 5, // 5 = F1AP_CauseRadioNetwork_interaction_with_other_procedure
.srb_id = DL_SCH_LCID_DCCH,
};
targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb-cu.sa.f1.conf
-1
View File
@@ -1,7 +1,6 @@
Active_gNBs = ( "cu-rfsim");
# Asn1_verbosity, choice in: none, info, annoying
Asn1_verbosity = "none";
Num_Threads_PUSCH = 8;
gNBs =
(