first time UE connection established
This commit is contained in:
@@ -49,7 +49,7 @@ int phy_init_top(LTE_DL_FRAME_PARMS *frame_parms);
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/*!
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\brief Allocate and Initialize the PHY variables relevant to the LTE implementation.
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\brief Allocate and Initialize the PHY variables relevant to the LTE ue signal buffers.
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\details Only a subset of phy_vars_ue is initialized.
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@param[out] phy_vars_ue Pointer to UE Variables
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@param nb_connected_eNB Number of eNB that UE can process in one PDSCH demodulation subframe
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@@ -58,9 +58,16 @@ int phy_init_top(LTE_DL_FRAME_PARMS *frame_parms);
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@returns -1 if any memory allocation failed
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@note The current implementation will never return -1, but segfault.
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*/
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int phy_init_lte_ue(PHY_VARS_UE *phy_vars_ue,
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int nb_connected_eNB,
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uint8_t abstraction_flag);
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int phy_init_lte_ue_signal(PHY_VARS_UE *phy_vars_ue,
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int nb_connected_eNB,
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uint8_t abstraction_flag);
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/*!
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\brief Allocate and initialize the PHY variables releated to the transport channel buffers (UL/DL)
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@param ue Pointer to UE L1 context
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@param abstraction flag Indicates that abstraction is used in L1
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*/
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void init_lte_ue_transport(PHY_VARS_UE *ue,int absraction_flag);
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/*!
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\brief Allocate and initialize the PHY variables relevant to the LTE implementation (eNB).
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@@ -304,7 +311,7 @@ void phy_config_dedicated_eNB_step2(PHY_VARS_eNB *phy_vars_eNB);
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int phy_init_secsys_eNB(PHY_VARS_eNB *phy_vars_eNb);
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void phy_init_lte_top(LTE_DL_FRAME_PARMS *lte_frame_parms);
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void init_lte_top(LTE_DL_FRAME_PARMS *lte_frame_parms);
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//void copy_lte_parms_to_phy_framing(LTE_DL_FRAME_PARMS *frame_parm, PHY_FRAMING *phy_framing);
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@@ -57,22 +57,24 @@ void phy_config_mib_eNB(int Mod_id,
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Mod_id, CC_id, eutra_band, N_RB_DL_array[dl_Bandwidth], Nid_cell, p_eNB,dl_CarrierFreq);
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if (RC.eNB == NULL) {
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RC.eNB = (PHY_VARS_eNB ***)malloc((1+NUMBER_OF_eNB_MAX)*sizeof(PHY_VARS_eNB***));
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RC.eNB = (PHY_VARS_eNB ***)malloc((1+NUMBER_OF_eNB_MAX)*sizeof(PHY_VARS_eNB***));
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LOG_I(PHY,"RC.eNB = %p\n",RC.eNB);
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memset(RC.eNB,0,(1+NUMBER_OF_eNB_MAX)*sizeof(PHY_VARS_eNB***));
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}
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if (RC.eNB[Mod_id] == NULL) {
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RC.eNB[Mod_id] = (PHY_VARS_eNB **)malloc((1+MAX_NUM_CCs)*sizeof(PHY_VARS_eNB**));
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RC.eNB[Mod_id] = (PHY_VARS_eNB **)malloc((1+MAX_NUM_CCs)*sizeof(PHY_VARS_eNB**));
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LOG_I(PHY,"RC.eNB[%d] = %p\n",Mod_id,RC.eNB[Mod_id]);
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memset(RC.eNB[Mod_id],0,(1+MAX_NUM_CCs)*sizeof(PHY_VARS_eNB***));
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}
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if (RC.eNB[Mod_id][CC_id] == NULL) {
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RC.eNB[Mod_id][CC_id] = (PHY_VARS_eNB *)malloc(sizeof(PHY_VARS_eNB));
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LOG_I(PHY,"RC.eNB[%d][%d] = %p\n",Mod_id,CC_id,RC.eNB[Mod_id][CC_id]);
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RC.eNB[Mod_id][CC_id]->Mod_id = Mod_id;
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RC.eNB[Mod_id][CC_id]->CC_id = CC_id;
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RC.eNB[Mod_id][CC_id]->Mod_id = Mod_id;
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RC.eNB[Mod_id][CC_id]->CC_id = CC_id;
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}
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RC.eNB[Mod_id][CC_id]->mac_enabled = 1;
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fp = &RC.eNB[Mod_id][CC_id]->frame_parms;
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fp->N_RB_DL = N_RB_DL_array[dl_Bandwidth];
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@@ -92,7 +94,7 @@ void phy_config_mib_eNB(int Mod_id,
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fp->frame_type = FDD;
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init_frame_parms(fp,1);
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phy_init_lte_top(fp);
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init_lte_top(fp);
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}
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@@ -1014,7 +1016,7 @@ void phy_config_cba_rnti (module_id_t Mod_id,int CC_id,eNB_flag_t eNB_flag, uin
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}
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}
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void phy_init_lte_top(LTE_DL_FRAME_PARMS *frame_parms)
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void init_lte_top(LTE_DL_FRAME_PARMS *frame_parms)
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{
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crcTableInit();
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@@ -1047,6 +1049,7 @@ void phy_init_lte_top(LTE_DL_FRAME_PARMS *frame_parms)
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init_scrambling_lut();
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//set_taus_seed(1328);
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}
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/*! \brief Helper function to allocate memory for DLSCH data structures.
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@@ -1100,9 +1103,9 @@ void phy_init_lte_ue__PDSCH( LTE_UE_PDSCH* const pdsch, const LTE_DL_FRAME_PARMS
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}
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int phy_init_lte_ue(PHY_VARS_UE *ue,
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int nb_connected_eNB,
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uint8_t abstraction_flag)
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int init_lte_ue_signal(PHY_VARS_UE *ue,
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int nb_connected_eNB,
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uint8_t abstraction_flag)
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{
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// create shortcuts
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@@ -1123,6 +1126,13 @@ int phy_init_lte_ue(PHY_VARS_UE *ue,
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LOG_D(PHY,"Initializing UE vars (abstraction %"PRIu8") for eNB TXant %"PRIu8", UE RXant %"PRIu8"\n",abstraction_flag,fp->nb_antennas_tx,fp->nb_antennas_rx);
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LOG_D(PHY,"[MSC_NEW][FRAME 00000][PHY_UE][MOD %02u][]\n", ue->Mod_id+NB_eNB_INST);
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init_frame_parms(&ue->frame_parms,1);
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init_lte_top(&ue->frame_parms);
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init_ul_hopping(&ue->frame_parms);
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// many memory allocation sizes are hard coded
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AssertFatal( fp->nb_antennas_rx <= 2, "hard coded allocation for ue_common_vars->dl_ch_estimates[eNB_id]" );
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AssertFatal( ue->n_connected_eNB <= NUMBER_OF_CONNECTED_eNB_MAX, "n_connected_eNB is too large" );
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@@ -1324,6 +1334,30 @@ int phy_init_lte_ue(PHY_VARS_UE *ue,
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return 0;
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}
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void init_lte_ue_transport(PHY_VARS_UE *ue,int abstraction_flag) {
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int i,j;
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for (i=0; i<NUMBER_OF_CONNECTED_eNB_MAX; i++) {
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for (j=0; j<2; j++) {
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AssertFatal((ue->dlsch[i][j] = new_ue_dlsch(1,NUMBER_OF_HARQ_PID_MAX,NSOFT,MAX_TURBO_ITERATIONS,ue->frame_parms.N_RB_DL, abstraction_flag))!=NULL,"Can't get ue dlsch structures\n");
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LOG_D(PHY,"dlsch[%d][%d] => %p\n",ue->Mod_id,i,ue->dlsch[i][j]);
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}
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AssertFatal((ue->ulsch[i] = new_ue_ulsch(ue->frame_parms.N_RB_UL, abstraction_flag))!=NULL,"Can't get ue ulsch structures\n");
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ue->dlsch_SI[i] = new_ue_dlsch(1,1,NSOFT,MAX_TURBO_ITERATIONS,ue->frame_parms.N_RB_DL, abstraction_flag);
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ue->dlsch_ra[i] = new_ue_dlsch(1,1,NSOFT,MAX_TURBO_ITERATIONS,ue->frame_parms.N_RB_DL, abstraction_flag);
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ue->transmission_mode[i] = ue->frame_parms.nb_antenna_ports_eNB==1 ? 1 : 2;
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}
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ue->frame_parms.pucch_config_common.deltaPUCCH_Shift = 1;
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ue->dlsch_MCH[0] = new_ue_dlsch(1,NUMBER_OF_HARQ_PID_MAX,NSOFT,MAX_TURBO_ITERATIONS_MBSFN,ue->frame_parms.N_RB_DL,0);
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}
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int phy_init_RU(RU_t *ru) {
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@@ -96,7 +96,7 @@ void lte_param_init(unsigned char N_tx_port_eNB,
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eNB->transmission_mode[0] = transmission_mode;
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UE->transmission_mode[0] = transmission_mode;
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phy_init_lte_top(frame_parms);
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init_lte_top(frame_parms);
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dump_frame_parms(frame_parms);
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UE->measurements.n_adj_cells=0;
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@@ -106,7 +106,7 @@ void lte_param_init(unsigned char N_tx_port_eNB,
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for (i=0; i<3; i++)
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lte_gold(frame_parms,UE->lte_gold_table[i],Nid_cell+i);
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phy_init_lte_ue(UE,1,0);
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init_lte_ue(UE,1,0);
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phy_init_lte_eNB(eNB,0,0);
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generate_pcfich_reg_mapping(&UE->frame_parms);
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@@ -80,17 +80,15 @@ int init_frame_parms(LTE_DL_FRAME_PARMS *frame_parms,uint8_t osf)
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break;
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default:
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printf("Illegal oversampling %d\n",osf);
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return(-1);
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AssertFatal(1==0,"Illegal oversampling %d\n",osf);
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}
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switch (frame_parms->N_RB_DL) {
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case 100:
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if (osf>1) {
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printf("Illegal oversampling %d for N_RB_DL %d\n",osf,frame_parms->N_RB_DL);
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return(-1);
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}
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AssertFatal(osf==1,"Illegal oversampling %d for N_RB_DL %d\n",osf,frame_parms->N_RB_DL);
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if (frame_parms->threequarter_fs) {
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frame_parms->ofdm_symbol_size = 1536;
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@@ -109,11 +107,7 @@ int init_frame_parms(LTE_DL_FRAME_PARMS *frame_parms,uint8_t osf)
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break;
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case 75:
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if (osf>1) {
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printf("Illegal oversampling %d for N_RB_DL %d\n",osf,frame_parms->N_RB_DL);
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return(-1);
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}
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AssertFatal(osf==1,"Illegal oversampling %d for N_RB_DL %d\n",osf,frame_parms->N_RB_DL);
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frame_parms->ofdm_symbol_size = 1536;
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frame_parms->samples_per_tti = 23040;
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@@ -125,10 +119,7 @@ int init_frame_parms(LTE_DL_FRAME_PARMS *frame_parms,uint8_t osf)
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break;
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case 50:
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if (osf>1) {
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printf("Illegal oversampling %d for N_RB_DL %d\n",osf,frame_parms->N_RB_DL);
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return(-1);
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}
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AssertFatal(osf==1,"Illegal oversampling %d for N_RB_DL %d\n",osf,frame_parms->N_RB_DL);
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frame_parms->ofdm_symbol_size = 1024*osf;
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frame_parms->samples_per_tti = 15360*osf;
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@@ -140,10 +131,8 @@ int init_frame_parms(LTE_DL_FRAME_PARMS *frame_parms,uint8_t osf)
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break;
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case 25:
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if (osf>2) {
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printf("Illegal oversampling %d for N_RB_DL %d\n",osf,frame_parms->N_RB_DL);
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return(-1);
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}
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AssertFatal(osf<=2,"Illegal oversampling %d for N_RB_DL %d\n",osf,frame_parms->N_RB_DL);
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frame_parms->ofdm_symbol_size = 512*osf;
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@@ -179,12 +168,12 @@ int init_frame_parms(LTE_DL_FRAME_PARMS *frame_parms,uint8_t osf)
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break;
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default:
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printf("init_frame_parms: Error: Number of resource blocks (N_RB_DL %d) undefined, frame_parms = %p \n",frame_parms->N_RB_DL, frame_parms);
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return(-1);
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AssertFatal(1==0,"Number of resource blocks (N_RB_DL %d) undefined, frame_parms = %p \n",frame_parms->N_RB_DL, frame_parms);
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break;
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}
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printf("lte_parms.c: Setting N_RB_DL to %d, ofdm_symbol_size %d\n",frame_parms->N_RB_DL, frame_parms->ofdm_symbol_size);
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LOG_I(PHY,"lte_parms.c: Setting N_RB_DL to %d, ofdm_symbol_size %d\n",frame_parms->N_RB_DL, frame_parms->ofdm_symbol_size);
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if (frame_parms->frame_type == TDD) set_S_config(frame_parms);
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@@ -195,22 +184,22 @@ int init_frame_parms(LTE_DL_FRAME_PARMS *frame_parms,uint8_t osf)
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void dump_frame_parms(LTE_DL_FRAME_PARMS *frame_parms)
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{
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printf("frame_parms->N_RB_DL=%d\n",frame_parms->N_RB_DL);
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printf("frame_parms->N_RB_UL=%d\n",frame_parms->N_RB_UL);
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printf("frame_parms->Nid_cell=%d\n",frame_parms->Nid_cell);
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printf("frame_parms->Ncp=%d\n",frame_parms->Ncp);
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printf("frame_parms->Ncp_UL=%d\n",frame_parms->Ncp_UL);
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printf("frame_parms->nushift=%d\n",frame_parms->nushift);
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printf("frame_parms->frame_type=%d\n",frame_parms->frame_type);
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printf("frame_parms->tdd_config=%d\n",frame_parms->tdd_config);
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printf("frame_parms->tdd_config_S=%d\n",frame_parms->tdd_config_S);
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printf("frame_parms->nb_antenna_ports_eNB=%d\n",frame_parms->nb_antenna_ports_eNB);
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printf("frame_parms->nb_antennas_tx=%d\n",frame_parms->nb_antennas_tx);
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printf("frame_parms->nb_antennas_rx=%d\n",frame_parms->nb_antennas_rx);
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printf("frame_parms->ofdm_symbol_size=%d\n",frame_parms->ofdm_symbol_size);
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printf("frame_parms->nb_prefix_samples=%d\n",frame_parms->nb_prefix_samples);
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printf("frame_parms->nb_prefix_samples0=%d\n",frame_parms->nb_prefix_samples0);
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printf("frame_parms->first_carrier_offset=%d\n",frame_parms->first_carrier_offset);
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printf("frame_parms->samples_per_tti=%d\n",frame_parms->samples_per_tti);
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printf("frame_parms->symbols_per_tti=%d\n",frame_parms->symbols_per_tti);
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LOG_I(PHY,"frame_parms->N_RB_DL=%d\n",frame_parms->N_RB_DL);
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LOG_I(PHY,"frame_parms->N_RB_UL=%d\n",frame_parms->N_RB_UL);
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LOG_I(PHY,"frame_parms->Nid_cell=%d\n",frame_parms->Nid_cell);
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LOG_I(PHY,"frame_parms->Ncp=%d\n",frame_parms->Ncp);
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LOG_I(PHY,"frame_parms->Ncp_UL=%d\n",frame_parms->Ncp_UL);
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LOG_I(PHY,"frame_parms->nushift=%d\n",frame_parms->nushift);
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LOG_I(PHY,"frame_parms->frame_type=%d\n",frame_parms->frame_type);
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LOG_I(PHY,"frame_parms->tdd_config=%d\n",frame_parms->tdd_config);
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LOG_I(PHY,"frame_parms->tdd_config_S=%d\n",frame_parms->tdd_config_S);
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LOG_I(PHY,"frame_parms->nb_antenna_ports_eNB=%d\n",frame_parms->nb_antenna_ports_eNB);
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LOG_I(PHY,"frame_parms->nb_antennas_tx=%d\n",frame_parms->nb_antennas_tx);
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LOG_I(PHY,"frame_parms->nb_antennas_rx=%d\n",frame_parms->nb_antennas_rx);
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LOG_I(PHY,"frame_parms->ofdm_symbol_size=%d\n",frame_parms->ofdm_symbol_size);
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LOG_I(PHY,"frame_parms->nb_prefix_samples=%d\n",frame_parms->nb_prefix_samples);
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LOG_I(PHY,"frame_parms->nb_prefix_samples0=%d\n",frame_parms->nb_prefix_samples0);
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LOG_I(PHY,"frame_parms->first_carrier_offset=%d\n",frame_parms->first_carrier_offset);
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LOG_I(PHY,"frame_parms->samples_per_tti=%d\n",frame_parms->samples_per_tti);
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LOG_I(PHY,"frame_parms->symbols_per_tti=%d\n",frame_parms->symbols_per_tti);
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}
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@@ -378,18 +378,6 @@ int lte_sync_time(int **rxdata, ///rx data in time domain
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for (n=0; n<length; n+=4) {
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#ifdef RTAI_ENABLED
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// This is necessary since the sync takes a long time and it seems to block all other threads thus screwing up RTAI. If we pause it for a little while during its execution we give RTAI a chance to catch up with its other tasks.
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if ((n%frame_parms->samples_per_tti == 0) && (n>0) && (openair_daq_vars.sync_state==0)) {
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#ifdef DEBUG_PHY
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LOG_E(PHY,"[SYNC TIME] pausing for 1000ns, n=%d\n",n);
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#endif
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rt_sleep(nano2count(1000));
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}
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#endif
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sync_corr_ue0[n] = 0;
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sync_corr_ue0[n+length] = 0;
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sync_corr_ue1[n] = 0;
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@@ -1,24 +1,3 @@
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/*
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* Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
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* contributor license agreements. See the NOTICE file distributed with
|
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* this work for additional information regarding copyright ownership.
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* The OpenAirInterface Software Alliance licenses this file to You under
|
||||
* the OAI Public License, Version 1.0 (the "License"); you may not use this file
|
||||
* except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
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* http://www.openairinterface.org/?page_id=698
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*
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||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*-------------------------------------------------------------------------------
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* For more information about the OpenAirInterface (OAI) Software Alliance:
|
||||
* contact@openairinterface.org
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*/
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|
||||
short primary_synch0[144] = {0,0,0,0,0,0,0,0,0,0,32767,0,-26120,-19785,11971,-30502,-24020,-22288,32117,6492,31311,9658,-16384,-28378,25100,-21063,-7292,-31946,20429,25618,14948,29158,11971,-30502,31311,9658,25100,-21063,-16384,28377,-24020,22287,32117,6492,-7292,31945,20429,25618,-26120,-19785,-16384,-28378,-16384,28377,-26120,-19785,-32402,4883,31311,-9659,32117,6492,-7292,-31946,32767,-1,25100,-21063,-24020,22287,-32402,4883,-32402,4883,-24020,22287,25100,-21063,32767,-1,-7292,-31946,32117,6492,31311,-9659,-32402,4883,-26120,-19785,-16384,28377,-16384,-28378,-26120,-19785,20429,25618,-7292,31945,32117,6492,-24020,22287,-16384,28377,25100,-21063,31311,9658,11971,-30502,14948,29158,20429,25618,-7292,-31946,25100,-21063,-16384,-28378,31311,9658,32117,6492,-24020,-22288,11971,-30502,-26120,-19785,32767,0,0,0,0,0,0,0,0,0,0,0};
|
||||
short primary_synch1[144] = {0,0,0,0,0,0,0,0,0,0,32767,0,-31754,-8086,-24020,-22288,2448,32675,-26120,19784,27073,18458,-16384,28377,25100,21062,-29523,14217,-7292,31945,-13477,-29868,-24020,-22288,27073,18458,25100,21062,-16384,-28378,2448,-32676,-26120,19784,-29523,-14218,-7292,31945,-31754,-8086,-16384,28377,-16384,-28378,-31754,-8086,31311,-9659,27073,-18459,-26120,19784,-29523,14217,32767,-1,25100,21062,2448,-32676,31311,-9659,31311,-9659,2448,-32676,25100,21062,32767,0,-29523,14217,-26120,19784,27073,-18459,31311,-9659,-31754,-8086,-16384,-28378,-16384,28377,-31754,-8086,-7292,31945,-29523,-14218,-26120,19784,2448,-32676,-16384,-28378,25100,21062,27073,18458,-24020,-22288,-13477,-29868,-7292,31945,-29523,14217,25100,21062,-16384,28377,27073,18458,-26120,19784,2448,32675,-24020,-22288,-31754,-8086,32767,0,0,0,0,0,0,0,0,0,0,0};
|
||||
short primary_synch2[144] = {0,0,0,0,0,0,0,0,0,0,32767,0,-31754,8085,-24020,22287,2448,-32676,-26120,-19785,27073,-18459,-16384,-28378,25100,-21063,-29523,-14218,-7292,-31946,-13477,29867,-24020,22287,27073,-18459,25100,-21063,-16384,28377,2448,32675,-26120,-19785,-29523,14217,-7292,-31946,-31754,8085,-16384,-28378,-16384,28377,-31754,8085,31311,9658,27073,18458,-26120,-19785,-29523,-14218,32767,0,25100,-21063,2448,32675,31311,9658,31311,9658,2448,32675,25100,-21063,32767,0,-29523,-14218,-26120,-19785,27073,18458,31311,9658,-31754,8085,-16384,28377,-16384,-28378,-31754,8085,-7292,-31946,-29523,14217,-26120,-19785,2448,32675,-16384,28377,25100,-21063,27073,-18459,-24020,22287,-13477,29867,-7292,-31946,-29523,-14218,25100,-21063,-16384,-28378,27073,-18459,-26120,-19785,2448,-32676,-24020,22287,-31754,8085,32767,-1,0,0,0,0,0,0,0,0,0,0};
|
||||
|
||||
@@ -69,7 +69,7 @@ void send_IF4p5(RU_t *ru, int frame, int subframe, uint16_t packet_type, int k)
|
||||
|
||||
db_fulllength = 12*fp->N_RB_DL;
|
||||
db_halflength = (db_fulllength)>>1;
|
||||
slotoffsetF = 0;//(subframe)*(fp->ofdm_symbol_size)*((fp->Ncp==1) ? 12 : 14) + 1;
|
||||
slotoffsetF = 1;//(subframe)*(fp->ofdm_symbol_size)*((fp->Ncp==1) ? 12 : 14) + 1;
|
||||
blockoffsetF = slotoffsetF + fp->ofdm_symbol_size - db_halflength - 1;
|
||||
|
||||
|
||||
@@ -263,7 +263,7 @@ void recv_IF4p5(RU_t *ru, int *frame, int *subframe, uint16_t *packet_type, uint
|
||||
|
||||
LOG_D(PHY,"DL_IF4p5: RU %d frame %d, subframe %d, symbol %d\n",ru->idx,*frame,*subframe,*symbol_number);
|
||||
|
||||
slotoffsetF = (*symbol_number)*(fp->ofdm_symbol_size);// + (*subframe)*(fp->ofdm_symbol_size)*((fp->Ncp==1) ? 12 : 14) + 1;
|
||||
slotoffsetF = (*symbol_number)*(fp->ofdm_symbol_size)+1;// + (*subframe)*(fp->ofdm_symbol_size)*((fp->Ncp==1) ? 12 : 14) + 1;
|
||||
blockoffsetF = slotoffsetF + fp->ofdm_symbol_size - db_halflength - 1;
|
||||
|
||||
for (element_id=0; element_id<db_halflength; element_id++) {
|
||||
|
||||
@@ -41,7 +41,7 @@
|
||||
#include "common_lib.h"
|
||||
extern openair0_config_t openair0_cfg[];
|
||||
|
||||
//#define DEBUG_INITIAL_SYNCH
|
||||
#define DEBUG_INITIAL_SYNCH
|
||||
|
||||
int pbch_detection(PHY_VARS_UE *ue, runmode_t mode)
|
||||
{
|
||||
@@ -282,6 +282,8 @@ int initial_sync(PHY_VARS_UE *ue, runmode_t mode)
|
||||
// First try FDD normal prefix
|
||||
frame_parms->Ncp=NORMAL;
|
||||
frame_parms->frame_type=FDD;
|
||||
frame_parms->nb_antenna_ports_eNB = 2;
|
||||
|
||||
init_frame_parms(frame_parms,1);
|
||||
/*
|
||||
write_output("rxdata0.m","rxd0",ue->common_vars.rxdata[0],10*frame_parms->samples_per_tti,1,1);
|
||||
|
||||
@@ -793,7 +793,6 @@ void pbch_unscrambling(LTE_DL_FRAME_PARMS *frame_parms,
|
||||
|
||||
// take the quarter of the PBCH that corresponds to this frame
|
||||
if ((i>=(frame_mod4*(length>>2))) && (i<((1+frame_mod4)*(length>>2)))) {
|
||||
// if (((s>>(i%32))&1)==1)
|
||||
|
||||
if (((s>>(i%32))&1)==0)
|
||||
llr[i] = -llr[i];
|
||||
@@ -936,8 +935,6 @@ uint16_t rx_pbch(LTE_UE_COMMON *lte_ue_common_vars,
|
||||
|
||||
if (mimo_mode == ALAMOUTI) {
|
||||
pbch_alamouti(frame_parms,lte_ue_pbch_vars->rxdataF_comp,symbol);
|
||||
// LOG_D(PHY,"[PBCH][RX] Alamouti receiver not yet implemented!\n");
|
||||
// return(-1);
|
||||
} else if (mimo_mode != SISO) {
|
||||
LOG_D(PHY,"[PBCH][RX] Unsupported MIMO mode\n");
|
||||
return(-1);
|
||||
@@ -1008,12 +1005,12 @@ uint16_t rx_pbch(LTE_UE_COMMON *lte_ue_common_vars,
|
||||
#ifdef DEBUG_PBCH
|
||||
|
||||
for (i=0; i<(PBCH_A>>3); i++)
|
||||
LOG_D(PHY,"[PBCH] pbch_a[%d] = %x\n",i,decoded_output[i]);
|
||||
LOG_I(PHY,"[PBCH] pbch_a[%d] = %x\n",i,decoded_output[i]);
|
||||
|
||||
#endif //DEBUG_PBCH
|
||||
|
||||
#ifdef DEBUG_PBCH
|
||||
LOG_D(PHY,"PBCH CRC %x : %x\n",
|
||||
LOG_I(PHY,"PBCH CRC %x : %x\n",
|
||||
crc16(pbch_a,PBCH_A),
|
||||
((uint16_t)pbch_a[PBCH_A>>3]<<8)+pbch_a[(PBCH_A>>3)+1]);
|
||||
#endif
|
||||
|
||||
@@ -1256,6 +1256,79 @@ extern pthread_cond_t sync_cond;
|
||||
extern pthread_mutex_t sync_mutex;
|
||||
extern int sync_var;
|
||||
|
||||
#define MAX_RRU_CONFIG_SIZE 1024
|
||||
typedef enum {
|
||||
RAU_tick=0,
|
||||
RRU_capabilities=1,
|
||||
RRU_config=2,
|
||||
RRU_MSG_max_num=3
|
||||
} rru_config_msg_type_t;
|
||||
|
||||
typedef struct RRU_CONFIG_msg_s {
|
||||
rru_config_msg_type_t type;
|
||||
ssize_t len;
|
||||
uint8_t msg[MAX_RRU_CONFIG_SIZE];
|
||||
} RRU_CONFIG_msg_t;
|
||||
|
||||
typedef enum {
|
||||
OAI_IF5_only =0,
|
||||
OAI_IF4p5_only =1,
|
||||
OAI_IF5_and_IF4p5 =2,
|
||||
MBP_IF5 =3,
|
||||
MAX_FH_FMTs =4
|
||||
} FH_fmt_options_t;
|
||||
|
||||
#define MAX_BANDS_PER_RRU 4
|
||||
|
||||
typedef struct RRU_capabilities_s {
|
||||
/// Fronthaul format
|
||||
FH_fmt_options_t FH_fmt;
|
||||
/// number of EUTRA bands (<=4) supported by RRU
|
||||
uint8_t num_bands;
|
||||
/// EUTRA band list supported by RRU
|
||||
uint8_t band_list[MAX_BANDS_PER_RRU];
|
||||
/// Number of concurrent bands (component carriers)
|
||||
uint8_t num_concurrent_bands;
|
||||
/// Maximum TX EPRE of each band
|
||||
int8_t max_pdschReferenceSignalPower[MAX_BANDS_PER_RRU];
|
||||
/// Maximum RX gain of each band
|
||||
uint8_t max_rxgain[MAX_BANDS_PER_RRU];
|
||||
/// Number of RX ports of each band
|
||||
uint8_t nb_rx[MAX_BANDS_PER_RRU];
|
||||
/// Number of TX ports of each band
|
||||
uint8_t nb_tx[MAX_BANDS_PER_RRU];
|
||||
/// max DL bandwidth (1,6,15,25,50,75,100)
|
||||
uint8_t N_RB_DL[MAX_BANDS_PER_RRU];
|
||||
/// max UL bandwidth (1,6,15,25,50,75,100)
|
||||
uint8_t N_RB_UL[MAX_BANDS_PER_RRU];
|
||||
} RRU_capabilities_t;
|
||||
|
||||
typedef struct RRU_config_s {
|
||||
/// Fronthaul format
|
||||
RU_if_south_t FH_fmt;
|
||||
/// number of EUTRA bands (<=4) configured in RRU
|
||||
uint8_t num_bands;
|
||||
/// EUTRA band list configured in RRU
|
||||
uint8_t band_list[MAX_BANDS_PER_RRU];
|
||||
/// TX frequency
|
||||
uint32_t tx_freq[MAX_BANDS_PER_RRU];
|
||||
/// RX frequency
|
||||
uint32_t rx_freq[MAX_BANDS_PER_RRU];
|
||||
/// TX attenation w.r.t. max
|
||||
uint8_t att_tx[MAX_BANDS_PER_RRU];
|
||||
/// RX attenuation w.r.t. max
|
||||
uint8_t att_rx[MAX_BANDS_PER_RRU];
|
||||
/// DL bandwidth
|
||||
uint8_t N_RB_DL[MAX_BANDS_PER_RRU];
|
||||
/// UL bandwidth
|
||||
uint8_t N_RB_UL[MAX_BANDS_PER_RRU];
|
||||
/// 3/4 sampling rate
|
||||
uint8_t threequarter_fs[MAX_BANDS_PER_RRU];
|
||||
/// prach_FreqOffset for IF4p5
|
||||
int prach_FreqOffset[MAX_BANDS_PER_RRU];
|
||||
/// prach_ConfigIndex for IF4p5
|
||||
int prach_ConfigIndex[MAX_BANDS_PER_RRU];
|
||||
} RRU_config_t;
|
||||
|
||||
|
||||
static inline void wait_sync(char *thread_name) {
|
||||
|
||||
@@ -2602,47 +2602,7 @@ void init_te_thread(PHY_VARS_eNB *eNB,pthread_attr_t *attr_te) {
|
||||
|
||||
}
|
||||
|
||||
void do_prach(PHY_VARS_eNB *eNB,int frame,int subframe) {
|
||||
|
||||
eNB_proc_t *proc = &eNB->proc;
|
||||
LTE_DL_FRAME_PARMS *fp=&eNB->frame_parms;
|
||||
|
||||
// check if we have to detect PRACH first
|
||||
if (is_prach_subframe(fp,frame,subframe)>0) {
|
||||
/* accept some delay in processing - up to 5ms */
|
||||
int i;
|
||||
for (i = 0; i < 10 && proc->instance_cnt_prach == 0; i++) {
|
||||
LOG_W(PHY,"[eNB] Frame %d Subframe %d, eNB PRACH thread busy (IC %d)!!\n", frame,subframe,proc->instance_cnt_prach);
|
||||
usleep(500);
|
||||
}
|
||||
if (proc->instance_cnt_prach == 0) {
|
||||
exit_fun( "PRACH thread busy" );
|
||||
return;
|
||||
}
|
||||
|
||||
// wake up thread for PRACH RX
|
||||
if (pthread_mutex_lock(&proc->mutex_prach) != 0) {
|
||||
LOG_E( PHY, "[eNB] ERROR pthread_mutex_lock for eNB PRACH thread %d (IC %d)\n", proc->thread_index, proc->instance_cnt_prach);
|
||||
exit_fun( "error locking mutex_prach" );
|
||||
return;
|
||||
}
|
||||
|
||||
++proc->instance_cnt_prach;
|
||||
// set timing for prach thread
|
||||
proc->frame_prach = frame;
|
||||
proc->subframe_prach = subframe;
|
||||
|
||||
// the thread can now be woken up
|
||||
if (pthread_cond_signal(&proc->cond_prach) != 0) {
|
||||
LOG_E( PHY, "[eNB] ERROR pthread_cond_signal for eNB PRACH thread %d\n", proc->thread_index);
|
||||
exit_fun( "ERROR pthread_cond_signal" );
|
||||
return;
|
||||
}
|
||||
|
||||
pthread_mutex_unlock( &proc->mutex_prach );
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
/*
|
||||
void phy_procedures_eNB_common_RX(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc){
|
||||
|
||||
@@ -184,7 +184,7 @@ void feptx_ofdm(RU_t *ru) {
|
||||
ru->common.txdata[aa][tx_offset] = 0x00000000;
|
||||
}
|
||||
}
|
||||
LOG_I(PHY,"feptx_ofdm: frame %d, subframe %d: txp (time) %d dB, txp (freq) %d dB\n",
|
||||
LOG_D(PHY,"feptx_ofdm: frame %d, subframe %d: txp (time) %d dB, txp (freq) %d dB\n",
|
||||
ru->proc.frame_tx,subframe,dB_fixed(signal_energy(txdata,fp->samples_per_tti)),
|
||||
dB_fixed(signal_energy_nodc(ru->common.txdataF_BF[aa],2*slot_sizeF)));
|
||||
}
|
||||
@@ -200,25 +200,36 @@ void feptx_prec(RU_t *ru) {
|
||||
int32_t ***bw;
|
||||
int subframe = ru->proc.subframe_tx;
|
||||
|
||||
for (i=0;i<ru->num_eNB;i++) {
|
||||
eNB = eNB_list[i];
|
||||
if (ru->num_eNB == 1) {
|
||||
eNB = eNB_list[0];
|
||||
fp = &eNB->frame_parms;
|
||||
bw = ru->beam_weights[i];
|
||||
|
||||
for (l=0;l<fp->symbols_per_tti;l++) {
|
||||
for (aa=0;aa<ru->nb_tx;aa++) {
|
||||
beam_precoding(eNB->common_vars.txdataF,
|
||||
ru->common.txdataF_BF,
|
||||
fp,
|
||||
bw,
|
||||
subframe<<1,
|
||||
l,
|
||||
aa);
|
||||
|
||||
for (aa=0;aa<ru->nb_tx;aa++)
|
||||
memcpy((void*)ru->common.txdataF_BF[aa],
|
||||
(void*)&eNB->common_vars.txdataF[aa][subframe*fp->symbols_per_tti*fp->ofdm_symbol_size],
|
||||
fp->symbols_per_tti*fp->ofdm_symbol_size*sizeof(int32_t));
|
||||
}
|
||||
else {
|
||||
for (i=0;i<ru->num_eNB;i++) {
|
||||
eNB = eNB_list[i];
|
||||
fp = &eNB->frame_parms;
|
||||
bw = ru->beam_weights[i];
|
||||
|
||||
for (l=0;l<fp->symbols_per_tti;l++) {
|
||||
for (aa=0;aa<ru->nb_tx;aa++) {
|
||||
beam_precoding(eNB->common_vars.txdataF,
|
||||
ru->common.txdataF_BF,
|
||||
fp,
|
||||
bw,
|
||||
subframe<<1,
|
||||
l,
|
||||
aa);
|
||||
}
|
||||
}
|
||||
LOG_D(PHY,"feptx_prec: frame %d, subframe %d: txp (freq) %d dB\n",
|
||||
ru->proc.frame_tx,subframe,
|
||||
dB_fixed(signal_energy_nodc(ru->common.txdataF_BF[0],2*fp->symbols_per_tti*fp->ofdm_symbol_size)));
|
||||
}
|
||||
LOG_D(PHY,"feptx_prec: frame %d, subframe %d: txp (freq) %d dB\n",
|
||||
ru->proc.frame_tx,subframe,
|
||||
dB_fixed(signal_energy_nodc(ru->common.txdataF_BF[0],2*fp->symbols_per_tti*fp->ofdm_symbol_size)));
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
@@ -239,8 +239,10 @@
|
||||
#define CONFIG_STRING_RU_LOCAL_IF_NAME "local_if_name"
|
||||
#define CONFIG_STRING_RU_LOCAL_ADDRESS "local_address"
|
||||
#define CONFIG_STRING_RU_REMOTE_ADDRESS "remote_address"
|
||||
#define CONFIG_STRING_RU_LOCAL_PORT "local_port"
|
||||
#define CONFIG_STRING_RU_REMOTE_PORT "remote_port"
|
||||
#define CONFIG_STRING_RU_LOCAL_PORTC "local_portc"
|
||||
#define CONFIG_STRING_RU_REMOTE_PORTC "remote_portc"
|
||||
#define CONFIG_STRING_RU_LOCAL_PORTD "local_portd"
|
||||
#define CONFIG_STRING_RU_REMOTE_PORTD "remote_portd"
|
||||
#define CONFIG_STRING_RU_LOCAL_RF "local_rf"
|
||||
#define CONFIG_STRING_RU_TRANSPORT_PREFERENCE "tr_preference"
|
||||
#define CONFIG_STRING_RU_BAND_LIST "bands"
|
||||
@@ -397,8 +399,10 @@ void RCconfig_RU() {
|
||||
char *local_rf = NULL;
|
||||
|
||||
char* tr_preference = NULL;
|
||||
libconfig_int local_port = 0;
|
||||
libconfig_int remote_port = 0;
|
||||
libconfig_int local_portc = 0;
|
||||
libconfig_int remote_portc = 0;
|
||||
libconfig_int local_portd = 0;
|
||||
libconfig_int remote_portd = 0;
|
||||
|
||||
libconfig_int nb_tx = 0;
|
||||
libconfig_int nb_rx = 0;
|
||||
@@ -436,8 +440,10 @@ void RCconfig_RU() {
|
||||
config_setting_lookup_string(setting_ru, CONFIG_STRING_RU_LOCAL_IF_NAME, (const char **)&if_name)
|
||||
&& config_setting_lookup_string(setting_ru, CONFIG_STRING_RU_LOCAL_ADDRESS, (const char **)&ipv4)
|
||||
&& config_setting_lookup_string(setting_ru, CONFIG_STRING_RU_REMOTE_ADDRESS, (const char **)&ipv4_remote)
|
||||
&& config_setting_lookup_int (setting_ru, CONFIG_STRING_RU_LOCAL_PORT, &local_port)
|
||||
&& config_setting_lookup_int (setting_ru, CONFIG_STRING_RU_REMOTE_PORT, &remote_port)
|
||||
&& config_setting_lookup_int (setting_ru, CONFIG_STRING_RU_LOCAL_PORTC, &local_portc)
|
||||
&& config_setting_lookup_int (setting_ru, CONFIG_STRING_RU_REMOTE_PORTC, &remote_portc)
|
||||
&& config_setting_lookup_int (setting_ru, CONFIG_STRING_RU_LOCAL_PORTD, &local_portd)
|
||||
&& config_setting_lookup_int (setting_ru, CONFIG_STRING_RU_REMOTE_PORTD, &remote_portd)
|
||||
&& config_setting_lookup_string(setting_ru, CONFIG_STRING_RU_TRANSPORT_PREFERENCE, (const char **)&tr_preference)
|
||||
&& config_setting_lookup_string(setting_ru, CONFIG_STRING_RU_LOCAL_RF, (const char **)&local_rf)
|
||||
)
|
||||
@@ -508,8 +514,10 @@ void RCconfig_RU() {
|
||||
RC.ru[j]->eth_params.local_if_name = strdup(if_name);
|
||||
RC.ru[j]->eth_params.my_addr = strdup(ipv4);
|
||||
RC.ru[j]->eth_params.remote_addr = strdup(ipv4_remote);
|
||||
RC.ru[j]->eth_params.my_port = local_port;
|
||||
RC.ru[j]->eth_params.remote_port = remote_port;
|
||||
RC.ru[j]->eth_params.my_portc = local_portc;
|
||||
RC.ru[j]->eth_params.remote_portc = remote_portc;
|
||||
RC.ru[j]->eth_params.my_portd = local_portd;
|
||||
RC.ru[j]->eth_params.remote_portd = remote_portd;
|
||||
RC.ru[j]->if_timing = synch_to_ext_device;
|
||||
RC.ru[j]->num_eNB = num_eNB4RU;
|
||||
if (strcmp(local_rf, "yes") == 0) {
|
||||
|
||||
@@ -135,14 +135,7 @@ int rrc_mac_config_req_eNB(module_id_t Mod_idP,
|
||||
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_RRC_MAC_CONFIG, VCD_FUNCTION_IN);
|
||||
|
||||
if (mib!=NULL) {
|
||||
if (RC.mac == NULL)
|
||||
l2_init_eNB(
|
||||
#ifdef Rel10
|
||||
MBMS_Flag,
|
||||
#else
|
||||
0,
|
||||
#endif
|
||||
NULL,0,0);
|
||||
if (RC.mac == NULL) l2_init_eNB();
|
||||
|
||||
mac_top_init_eNB();
|
||||
|
||||
|
||||
@@ -88,21 +88,23 @@ void eNB_dlsch_ulsch_scheduler(module_id_t module_idP,uint8_t cooperation_flag,
|
||||
int size_bits=0,size_bytes=0;
|
||||
|
||||
LTE_eNB_UE_stats *eNB_UE_stats = NULL;
|
||||
COMMON_channels_t *cc = RC.mac[module_idP]->common_channels;
|
||||
|
||||
#if defined(FLEXRAN_AGENT_SB_IF)
|
||||
Protocol__FlexranMessage *msg;
|
||||
#endif
|
||||
|
||||
|
||||
LOG_D(MAC,"[eNB %d] Frame %d, Subframe %d, entering MAC scheduler (UE_list->head %d)\n",module_idP, frameP, subframeP,UE_list->head);
|
||||
|
||||
start_meas(&RC.mac[module_idP]->eNB_scheduler);
|
||||
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_ENB_DLSCH_ULSCH_SCHEDULER,VCD_FUNCTION_IN);
|
||||
|
||||
for (CC_id=0; CC_id<MAX_NUM_CCs; CC_id++) {
|
||||
DCI_pdu[CC_id] = &RC.mac[module_idP]->common_channels[CC_id].DCI_pdu;
|
||||
DCI_pdu[CC_id] = &cc[CC_id].DCI_pdu;
|
||||
mbsfn_status[CC_id]=0;
|
||||
// clear vrb_map
|
||||
memset(RC.mac[module_idP]->common_channels[CC_id].vrb_map,0,100);
|
||||
memset(cc[CC_id].vrb_map,0,100);
|
||||
}
|
||||
|
||||
// clear DCI and BCCH contents before scheduling
|
||||
@@ -110,7 +112,7 @@ void eNB_dlsch_ulsch_scheduler(module_id_t module_idP,uint8_t cooperation_flag,
|
||||
DCI_pdu[CC_id]->Num_common_dci = 0;
|
||||
DCI_pdu[CC_id]->Num_ue_spec_dci = 0;
|
||||
#ifdef Rel10
|
||||
RC.mac[module_idP]->common_channels[CC_id].mcch_active =0;
|
||||
cc[CC_id].mcch_active =0;
|
||||
#endif
|
||||
RC.mac[module_idP]->frame = frameP;
|
||||
RC.mac[module_idP]->subframe = subframeP;
|
||||
@@ -159,27 +161,40 @@ void eNB_dlsch_ulsch_scheduler(module_id_t module_idP,uint8_t cooperation_flag,
|
||||
LOG_D(MAC,"UE %d rnti %x: sending PDCCH order for RAPROC (failure timer %d) \n",i,rnti,UE_list->UE_sched_ctrl[i].ul_failure_timer);
|
||||
DLSCH_dci = (void *)UE_list->UE_template[CC_id][i].DLSCH_DCI[0];
|
||||
*(uint32_t*)DLSCH_dci = 0;
|
||||
if (RC.eNB[module_idP][CC_id]->frame_parms.frame_type == TDD) {
|
||||
switch (RC.eNB[module_idP][CC_id]->frame_parms.N_RB_DL) {
|
||||
case 6:
|
||||
int N_RB_DL = cc[CC_id].mib->message.dl_Bandwidth;
|
||||
if (cc[CC_id].tdd_Config != NULL) {
|
||||
switch (N_RB_DL) {
|
||||
case 0:
|
||||
((DCI1A_1_5MHz_TDD_1_6_t*)DLSCH_dci)->type = 1;
|
||||
((DCI1A_1_5MHz_TDD_1_6_t*)DLSCH_dci)->rballoc = 31;
|
||||
size_bytes = sizeof(DCI1A_1_5MHz_TDD_1_6_t);
|
||||
size_bits = sizeof_DCI1A_1_5MHz_TDD_1_6_t;
|
||||
break;
|
||||
case 25:
|
||||
case 1:
|
||||
/* ((DCI1A_2_5MHz_TDD_1_6_t*)DLSCH_dci)->type = 1;
|
||||
((DCI1A_2_5MHz_TDD_1_6_t*)DLSCH_dci)->rballoc = 31;
|
||||
size_bytes = sizeof(DCI1A_2_5MHz_TDD_1_6_t);
|
||||
size_bits = sizeof_DCI1A_2_5MHz_TDD_1_6_t;*/
|
||||
break;
|
||||
case 2:
|
||||
((DCI1A_5MHz_TDD_1_6_t*)DLSCH_dci)->type = 1;
|
||||
((DCI1A_5MHz_TDD_1_6_t*)DLSCH_dci)->rballoc = 511;
|
||||
size_bytes = sizeof(DCI1A_5MHz_TDD_1_6_t);
|
||||
size_bits = sizeof_DCI1A_5MHz_TDD_1_6_t;
|
||||
break;
|
||||
case 50:
|
||||
case 3:
|
||||
((DCI1A_10MHz_TDD_1_6_t*)DLSCH_dci)->type = 1;
|
||||
((DCI1A_10MHz_TDD_1_6_t*)DLSCH_dci)->rballoc = 2047;
|
||||
size_bytes = sizeof(DCI1A_10MHz_TDD_1_6_t);
|
||||
size_bits = sizeof_DCI1A_10MHz_TDD_1_6_t;
|
||||
break;
|
||||
case 100:
|
||||
case 4:/*
|
||||
((DCI1A_15MHz_TDD_1_6_t*)DLSCH_dci)->type = 1;
|
||||
((DCI1A_15MHz_TDD_1_6_t*)DLSCH_dci)->rballoc = 2047;
|
||||
size_bytes = sizeof(DCI1A_15MHz_TDD_1_6_t);
|
||||
size_bits = sizeof_DCI1A_15MHz_TDD_1_6_t;
|
||||
break;*/
|
||||
case 5:
|
||||
((DCI1A_20MHz_TDD_1_6_t*)DLSCH_dci)->type = 1;
|
||||
((DCI1A_20MHz_TDD_1_6_t*)DLSCH_dci)->rballoc = 8191;
|
||||
size_bytes = sizeof(DCI1A_20MHz_TDD_1_6_t);
|
||||
@@ -188,38 +203,38 @@ void eNB_dlsch_ulsch_scheduler(module_id_t module_idP,uint8_t cooperation_flag,
|
||||
}
|
||||
}
|
||||
else { // FDD
|
||||
switch (RC.eNB[module_idP][CC_id]->frame_parms.N_RB_DL) {
|
||||
case 6:
|
||||
switch (N_RB_DL) {
|
||||
case 0:
|
||||
((DCI1A_1_5MHz_FDD_t*)DLSCH_dci)->type = 1;
|
||||
((DCI1A_1_5MHz_FDD_t*)DLSCH_dci)->rballoc = 31;
|
||||
size_bytes = sizeof(DCI1A_1_5MHz_FDD_t);
|
||||
size_bits = sizeof_DCI1A_1_5MHz_FDD_t;
|
||||
break;
|
||||
case 15:/*
|
||||
case 1:/*
|
||||
((DCI1A_2_5MHz_FDD_t*)DLSCH_dci)->type = 1;
|
||||
((DCI1A_2_5MHz_FDD_t*)DLSCH_dci)->rballoc = 31;
|
||||
size_bytes = sizeof(DCI1A_1_5MHz_FDD_t);
|
||||
size_bits = sizeof_DCI1A_1_5MHz_FDD_t;*/
|
||||
break;
|
||||
case 25:
|
||||
case 2:
|
||||
((DCI1A_5MHz_FDD_t*)DLSCH_dci)->type = 1;
|
||||
((DCI1A_5MHz_FDD_t*)DLSCH_dci)->rballoc = 511;
|
||||
size_bytes = sizeof(DCI1A_5MHz_FDD_t);
|
||||
size_bits = sizeof_DCI1A_5MHz_FDD_t;
|
||||
break;
|
||||
case 50:
|
||||
case 3:
|
||||
((DCI1A_10MHz_FDD_t*)DLSCH_dci)->type = 1;
|
||||
((DCI1A_10MHz_FDD_t*)DLSCH_dci)->rballoc = 2047;
|
||||
size_bytes = sizeof(DCI1A_10MHz_FDD_t);
|
||||
size_bits = sizeof_DCI1A_10MHz_FDD_t;
|
||||
break;
|
||||
case 75:
|
||||
case 4:
|
||||
/* ((DCI1A_15MHz_FDD_t*)DLSCH_dci)->type = 1;
|
||||
((DCI1A_15MHz_FDD_t*)DLSCH_dci)->rballoc = 2047;
|
||||
size_bytes = sizeof(DCI1A_10MHz_FDD_t);
|
||||
size_bits = sizeof_DCI1A_10MHz_FDD_t;*/
|
||||
break;
|
||||
case 100:
|
||||
case 5:
|
||||
((DCI1A_20MHz_FDD_t*)DLSCH_dci)->type = 1;
|
||||
((DCI1A_20MHz_FDD_t*)DLSCH_dci)->rballoc = 8191;
|
||||
size_bytes = sizeof(DCI1A_20MHz_FDD_t);
|
||||
@@ -331,7 +346,7 @@ void eNB_dlsch_ulsch_scheduler(module_id_t module_idP,uint8_t cooperation_flag,
|
||||
#ifdef Rel10
|
||||
|
||||
for (CC_id=0; CC_id<MAX_NUM_CCs; CC_id++) {
|
||||
if (RC.mac[module_idP]->common_channels[CC_id].MBMS_flag >0) {
|
||||
if (cc[CC_id].MBMS_flag >0) {
|
||||
start_meas(&RC.mac[module_idP]->schedule_mch);
|
||||
mbsfn_status[CC_id] = schedule_MBMS(module_idP,CC_id,frameP,subframeP);
|
||||
stop_meas(&RC.mac[module_idP]->schedule_mch);
|
||||
@@ -339,18 +354,6 @@ void eNB_dlsch_ulsch_scheduler(module_id_t module_idP,uint8_t cooperation_flag,
|
||||
}
|
||||
|
||||
#endif
|
||||
// refresh UE list based on UEs dropped by PHY in previous subframe
|
||||
/*
|
||||
i=UE_list->head;
|
||||
while (i>=0) {
|
||||
next_i = UE_list->next[i];
|
||||
LOG_T(MAC,"UE %d : rnti %x, stats %p\n",i,UE_RNTI(module_idP,i),mac_xface->get_eNB_UE_stats(module_idP,0,UE_RNTI(module_idP,i)));
|
||||
if (mac_xface->get_eNB_UE_stats(module_idP,0,UE_RNTI(module_idP,i))==NULL) {
|
||||
mac_remove_ue(module_idP,i,frameP);
|
||||
}
|
||||
i=next_i;
|
||||
}
|
||||
*/
|
||||
|
||||
switch (subframeP) {
|
||||
case 0:
|
||||
@@ -362,12 +365,11 @@ void eNB_dlsch_ulsch_scheduler(module_id_t module_idP,uint8_t cooperation_flag,
|
||||
|
||||
schedule_RA(module_idP,frameP,subframeP,2);
|
||||
|
||||
|
||||
if (mac_xface->frame_parms->frame_type == FDD) { //FDD
|
||||
|
||||
if (cc[0].tdd_Config == NULL) { //FDD
|
||||
schedule_ulsch(module_idP,frameP,cooperation_flag,0,4);//,calibration_flag);
|
||||
} else if ((mac_xface->frame_parms->tdd_config == TDD) || //TDD
|
||||
(mac_xface->frame_parms->tdd_config == 3) ||
|
||||
(mac_xface->frame_parms->tdd_config == 6)) {
|
||||
} else if ((cc[0].tdd_Config->subframeAssignment == 3) ||
|
||||
(cc[0].tdd_Config->subframeAssignment == 6)) {
|
||||
//schedule_ulsch(module_idP,frameP,cooperation_flag,subframeP,4);//,calibration_flag);
|
||||
}
|
||||
#ifndef FLEXRAN_AGENT_SB_IF
|
||||
@@ -396,8 +398,8 @@ void eNB_dlsch_ulsch_scheduler(module_id_t module_idP,uint8_t cooperation_flag,
|
||||
|
||||
// TDD, schedule UL for subframeP 7 (TDD config 0,1) / subframeP 8 (TDD Config 6)
|
||||
// FDD, schedule normal UL/DLSCH
|
||||
if (mac_xface->frame_parms->frame_type == TDD) { // TDD
|
||||
switch (mac_xface->frame_parms->tdd_config) {
|
||||
if (cc[0].tdd_Config != NULL) { // TDD
|
||||
switch (cc[0].tdd_Config->subframeAssignment) {
|
||||
case 0:
|
||||
case 1:
|
||||
schedule_ulsch(module_idP,frameP,cooperation_flag,subframeP,7);
|
||||
@@ -446,7 +448,7 @@ void eNB_dlsch_ulsch_scheduler(module_id_t module_idP,uint8_t cooperation_flag,
|
||||
|
||||
// TDD, nothing
|
||||
// FDD, normal UL/DLSCH
|
||||
if (mac_xface->frame_parms->frame_type == FDD) { //FDD
|
||||
if (cc[0].tdd_Config == NULL) { //FDD
|
||||
schedule_ulsch(module_idP,frameP,cooperation_flag,2,6);
|
||||
#ifndef FLEXRAN_AGENT_SB_IF
|
||||
schedule_ue_spec(module_idP,frameP,subframeP,mbsfn_status);
|
||||
@@ -477,8 +479,8 @@ void eNB_dlsch_ulsch_scheduler(module_id_t module_idP,uint8_t cooperation_flag,
|
||||
// TDD Config 2, ULSCH for subframeP 7
|
||||
// TDD Config 2/5 normal DLSCH
|
||||
// FDD, normal UL/DLSCH
|
||||
if (mac_xface->frame_parms->frame_type == TDD) {
|
||||
switch (mac_xface->frame_parms->tdd_config) {
|
||||
if (cc[0].tdd_Config != NULL) {
|
||||
switch (cc[0].tdd_Config->subframeAssignment) {
|
||||
case 2:
|
||||
schedule_ulsch(module_idP,frameP,cooperation_flag,subframeP,7);
|
||||
|
||||
@@ -541,8 +543,8 @@ void eNB_dlsch_ulsch_scheduler(module_id_t module_idP,uint8_t cooperation_flag,
|
||||
// TDD Config 1, ULSCH for subframeP 8
|
||||
// TDD Config 1/2/4/5 DLSCH
|
||||
// FDD UL/DLSCH
|
||||
if (mac_xface->frame_parms->frame_type == 1) { // TDD
|
||||
switch (mac_xface->frame_parms->tdd_config) {
|
||||
if (cc[0].tdd_Config != NULL) { // TDD
|
||||
switch (cc[0].tdd_Config->subframeAssignment) {
|
||||
case 1:
|
||||
// schedule_RA(module_idP,frameP,subframeP);
|
||||
schedule_ulsch(module_idP,frameP,cooperation_flag,subframeP,8);
|
||||
@@ -581,7 +583,7 @@ void eNB_dlsch_ulsch_scheduler(module_id_t module_idP,uint8_t cooperation_flag,
|
||||
break;
|
||||
}
|
||||
} else {
|
||||
if (mac_xface->frame_parms->frame_type == FDD) { //FDD
|
||||
if (cc[0].tdd_Config == NULL) { //FDD
|
||||
|
||||
schedule_ulsch(module_idP, frameP, cooperation_flag, 4, 8);
|
||||
#ifndef FLEXRAN_AGENT_SB_IF
|
||||
@@ -617,7 +619,7 @@ void eNB_dlsch_ulsch_scheduler(module_id_t module_idP,uint8_t cooperation_flag,
|
||||
schedule_SI(module_idP,frameP,subframeP);
|
||||
|
||||
//schedule_RA(module_idP,frameP,subframeP,5);
|
||||
if (mac_xface->frame_parms->frame_type == FDD) {
|
||||
if (cc[0].tdd_Config == NULL) {
|
||||
schedule_RA(module_idP,frameP,subframeP,1);
|
||||
schedule_ulsch(module_idP,frameP,cooperation_flag,5,9);
|
||||
#ifndef FLEXRAN_AGENT_SB_IF
|
||||
@@ -640,8 +642,8 @@ void eNB_dlsch_ulsch_scheduler(module_id_t module_idP,uint8_t cooperation_flag,
|
||||
flexran_agent_mac_destroy_dl_config(msg);
|
||||
}
|
||||
#endif
|
||||
} else if ((mac_xface->frame_parms->tdd_config == 0) || // TDD Config 0
|
||||
(mac_xface->frame_parms->tdd_config == 6)) { // TDD Config 6
|
||||
} else if ((cc[0].tdd_Config->subframeAssignment == 0) || // TDD Config 0
|
||||
(cc[0].tdd_Config->subframeAssignment == 6)) { // TDD Config 6
|
||||
//schedule_ulsch(module_idP,cooperation_flag,subframeP);
|
||||
#ifndef FLEXRAN_AGENT_SB_IF
|
||||
fill_DLSCH_dci(module_idP,frameP,subframeP,mbsfn_status);
|
||||
@@ -676,8 +678,8 @@ void eNB_dlsch_ulsch_scheduler(module_id_t module_idP,uint8_t cooperation_flag,
|
||||
// TDD Config 0,1,6 ULSCH for subframes 2,3
|
||||
// TDD Config 3,4,5 Normal DLSCH
|
||||
// FDD normal ULSCH/DLSCH
|
||||
if (mac_xface->frame_parms->frame_type == TDD) { // TDD
|
||||
switch (mac_xface->frame_parms->tdd_config) {
|
||||
if (cc[0].tdd_Config != NULL) { // TDD
|
||||
switch (cc[0].tdd_Config->subframeAssignment) {
|
||||
case 0:
|
||||
break;
|
||||
|
||||
@@ -778,8 +780,8 @@ void eNB_dlsch_ulsch_scheduler(module_id_t module_idP,uint8_t cooperation_flag,
|
||||
|
||||
// TDD Config 3,4,5 Normal DLSCH
|
||||
// FDD Normal UL/DLSCH
|
||||
if (mac_xface->frame_parms->frame_type == TDD) { // TDD
|
||||
switch (mac_xface->frame_parms->tdd_config) {
|
||||
if (cc[0].tdd_Config != NULL) { // TDD
|
||||
switch (cc[0].tdd_Config->subframeAssignment) {
|
||||
case 3:
|
||||
case 4:
|
||||
schedule_RA(module_idP,frameP,subframeP,3); // 3 = Msg3 subframeP, not
|
||||
@@ -862,8 +864,8 @@ void eNB_dlsch_ulsch_scheduler(module_id_t module_idP,uint8_t cooperation_flag,
|
||||
// TDD Config 2,3,4,5 ULSCH for subframeP 2
|
||||
//
|
||||
// FDD Normal UL/DLSCH
|
||||
if (mac_xface->frame_parms->frame_type == TDD) { // TDD
|
||||
switch (mac_xface->frame_parms->tdd_config) {
|
||||
if (cc[0].tdd_Config != NULL) { // TDD
|
||||
switch (cc[0].tdd_Config->subframeAssignment) {
|
||||
case 2:
|
||||
case 3:
|
||||
case 4:
|
||||
@@ -925,8 +927,8 @@ void eNB_dlsch_ulsch_scheduler(module_id_t module_idP,uint8_t cooperation_flag,
|
||||
case 9:
|
||||
|
||||
// TDD Config 1,3,4,6 ULSCH for subframes 3,3,3,4
|
||||
if (mac_xface->frame_parms->frame_type == TDD) {
|
||||
switch (mac_xface->frame_parms->tdd_config) {
|
||||
if (cc[0].tdd_Config != NULL) {
|
||||
switch (cc[0].tdd_Config->subframeAssignment) {
|
||||
case 1:
|
||||
schedule_ulsch(module_idP,frameP,cooperation_flag,subframeP,3);
|
||||
schedule_RA(module_idP,frameP,subframeP,7); // 7 = Msg3 subframeP, not
|
||||
|
||||
@@ -65,33 +65,41 @@
|
||||
void schedule_RA(module_id_t module_idP,frame_t frameP, sub_frame_t subframeP,unsigned char Msg3_subframe)
|
||||
{
|
||||
|
||||
int CC_id;
|
||||
eNB_MAC_INST *eNB = RC.mac[module_idP];
|
||||
|
||||
|
||||
RA_TEMPLATE *RA_template;
|
||||
unsigned char i,harq_pid,round;
|
||||
int16_t rrc_sdu_length;
|
||||
unsigned char lcid,offset;
|
||||
int UE_id = -1;
|
||||
unsigned short TBsize = -1;
|
||||
unsigned short msg4_padding,msg4_post_padding,msg4_header;
|
||||
uint8_t *vrb_map;
|
||||
int first_rb;
|
||||
int rballoc[MAX_NUM_CCs];
|
||||
DCI_PDU *DCI_pdu;
|
||||
int CC_id;
|
||||
eNB_MAC_INST *eNB = RC.mac[module_idP];
|
||||
COMMON_channels_t *cc = eNB->common_channels;
|
||||
RA_TEMPLATE *RA_template;
|
||||
uint8_t i;
|
||||
uint8_t harq_pid;
|
||||
uint8_t round;
|
||||
int16_t rrc_sdu_length;
|
||||
uint8_t lcid;
|
||||
uint8_t offset;
|
||||
int UE_id = -1;
|
||||
int16_t TBsize = -1;
|
||||
uint16_t msg4_padding;
|
||||
uint16_t msg4_post_padding;
|
||||
uint16_t msg4_header;
|
||||
uint8_t *vrb_map;
|
||||
int first_rb;
|
||||
int rballoc[MAX_NUM_CCs];
|
||||
DCI_PDU *DCI_pdu;
|
||||
int N_RB_DL;
|
||||
int N_RB_UL;
|
||||
|
||||
start_meas(&eNB->schedule_ra);
|
||||
|
||||
for (CC_id=0; CC_id<MAX_NUM_CCs; CC_id++) {
|
||||
|
||||
|
||||
vrb_map = eNB->common_channels[CC_id].vrb_map;
|
||||
DCI_pdu = &eNB->common_channels[CC_id].DCI_pdu;
|
||||
vrb_map = cc[CC_id].vrb_map;
|
||||
DCI_pdu = &cc[CC_id].DCI_pdu;
|
||||
N_RB_DL = to_prb(cc[CC_id].mib->message.dl_Bandwidth);
|
||||
N_RB_UL = to_prb(cc[CC_id].ul_Bandwidth);
|
||||
|
||||
for (i=0; i<NB_RA_PROC_MAX; i++) {
|
||||
|
||||
RA_template = (RA_TEMPLATE *)&eNB->common_channels[CC_id].RA_template[i];
|
||||
RA_template = (RA_TEMPLATE *)&cc[CC_id].RA_template[i];
|
||||
|
||||
if (RA_template->RA_active == TRUE) {
|
||||
|
||||
@@ -112,8 +120,8 @@ void schedule_RA(module_id_t module_idP,frame_t frameP, sub_frame_t subframeP,un
|
||||
vrb_map[first_rb+2] = 1;
|
||||
vrb_map[first_rb+3] = 1;
|
||||
|
||||
if (RC.eNB[module_idP][CC_id]->frame_parms.frame_type == TDD) {
|
||||
switch(RC.eNB[module_idP][CC_id]->frame_parms.N_RB_DL) {
|
||||
if (cc[CC_id].tdd_Config!=NULL) { // TDD
|
||||
switch(N_RB_DL) {
|
||||
case 6:
|
||||
((DCI1A_1_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->type=1;
|
||||
((DCI1A_1_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->vrb_type=0;
|
||||
@@ -123,7 +131,7 @@ void schedule_RA(module_id_t module_idP,frame_t frameP, sub_frame_t subframeP,un
|
||||
((DCI1A_1_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->harq_pid=0;
|
||||
((DCI1A_1_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->TPC=1;
|
||||
((DCI1A_1_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->padding=0;
|
||||
((DCI1A_1_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->rballoc = mac_xface->computeRIV(RC.eNB[module_idP][CC_id]->frame_parms.N_RB_DL,first_rb,4);
|
||||
((DCI1A_1_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->rballoc = mac_xface->computeRIV(N_RB_DL,first_rb,4);
|
||||
rballoc[CC_id] |= mac_xface->get_rballoc(((DCI1A_1_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->vrb_type,
|
||||
((DCI1A_1_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->rballoc);
|
||||
break;
|
||||
@@ -137,7 +145,7 @@ void schedule_RA(module_id_t module_idP,frame_t frameP, sub_frame_t subframeP,un
|
||||
((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->harq_pid=0;
|
||||
((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->TPC=1;
|
||||
((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->padding=0;
|
||||
((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->rballoc = mac_xface->computeRIV(RC.eNB[module_idP][CC_id]->frame_parms.N_RB_DL,first_rb,4);
|
||||
((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->rballoc = mac_xface->computeRIV(N_RB_DL,first_rb,4);
|
||||
rballoc[CC_id] |= mac_xface->get_rballoc(((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->vrb_type,
|
||||
((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->rballoc);
|
||||
break;
|
||||
@@ -151,7 +159,7 @@ void schedule_RA(module_id_t module_idP,frame_t frameP, sub_frame_t subframeP,un
|
||||
((DCI1A_10MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->harq_pid=0;
|
||||
((DCI1A_10MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->TPC=1;
|
||||
((DCI1A_10MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->padding=0;
|
||||
((DCI1A_10MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->rballoc = mac_xface->computeRIV(RC.eNB[module_idP][CC_id]->frame_parms.N_RB_DL,first_rb,4);
|
||||
((DCI1A_10MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->rballoc = mac_xface->computeRIV(N_RB_DL,first_rb,4);
|
||||
rballoc[CC_id] |= mac_xface->get_rballoc(((DCI1A_10MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->vrb_type,
|
||||
((DCI1A_10MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->rballoc);
|
||||
break;
|
||||
@@ -165,7 +173,7 @@ void schedule_RA(module_id_t module_idP,frame_t frameP, sub_frame_t subframeP,un
|
||||
((DCI1A_20MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->harq_pid=0;
|
||||
((DCI1A_20MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->TPC=1;
|
||||
((DCI1A_20MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->padding=0;
|
||||
((DCI1A_20MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->rballoc = mac_xface->computeRIV(RC.eNB[module_idP][CC_id]->frame_parms.N_RB_DL,first_rb,4);
|
||||
((DCI1A_20MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->rballoc = mac_xface->computeRIV(N_RB_DL,first_rb,4);
|
||||
rballoc[CC_id] |= mac_xface->get_rballoc(((DCI1A_20MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->vrb_type,
|
||||
((DCI1A_20MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->rballoc);
|
||||
break;
|
||||
@@ -179,13 +187,13 @@ void schedule_RA(module_id_t module_idP,frame_t frameP, sub_frame_t subframeP,un
|
||||
((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->harq_pid=0;
|
||||
((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->TPC=1;
|
||||
((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->padding=0;
|
||||
((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->rballoc = mac_xface->computeRIV(RC.eNB[module_idP][CC_id]->frame_parms.N_RB_DL,first_rb,4);
|
||||
((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->rballoc = mac_xface->computeRIV(N_RB_DL,first_rb,4);
|
||||
rballoc[CC_id] |= mac_xface->get_rballoc(((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->vrb_type,
|
||||
((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu1[0])->rballoc);
|
||||
break;
|
||||
}
|
||||
} else {
|
||||
switch(RC.eNB[module_idP][CC_id]->frame_parms.N_RB_DL) {
|
||||
switch(N_RB_DL) {
|
||||
case 6:
|
||||
((DCI1A_1_5MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->type=1;
|
||||
((DCI1A_1_5MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->vrb_type=0;
|
||||
@@ -195,7 +203,7 @@ void schedule_RA(module_id_t module_idP,frame_t frameP, sub_frame_t subframeP,un
|
||||
((DCI1A_1_5MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->harq_pid=0;
|
||||
((DCI1A_1_5MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->TPC=1;
|
||||
((DCI1A_1_5MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->padding=0;
|
||||
((DCI1A_1_5MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->rballoc = mac_xface->computeRIV(RC.eNB[module_idP][CC_id]->frame_parms.N_RB_DL,first_rb,4);
|
||||
((DCI1A_1_5MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->rballoc = mac_xface->computeRIV(N_RB_DL,first_rb,4);
|
||||
rballoc[CC_id] |= mac_xface->get_rballoc(((DCI1A_1_5MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->vrb_type,
|
||||
((DCI1A_1_5MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->rballoc);
|
||||
break;
|
||||
@@ -209,7 +217,7 @@ void schedule_RA(module_id_t module_idP,frame_t frameP, sub_frame_t subframeP,un
|
||||
((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->harq_pid=0;
|
||||
((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->TPC=1;
|
||||
((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->padding=0;
|
||||
((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->rballoc = mac_xface->computeRIV(RC.eNB[module_idP][CC_id]->frame_parms.N_RB_UL,first_rb,4);
|
||||
((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->rballoc = mac_xface->computeRIV(N_RB_UL,first_rb,4);
|
||||
rballoc[CC_id] |= mac_xface->get_rballoc(((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->vrb_type,
|
||||
((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->rballoc);
|
||||
break;
|
||||
@@ -223,7 +231,7 @@ void schedule_RA(module_id_t module_idP,frame_t frameP, sub_frame_t subframeP,un
|
||||
((DCI1A_10MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->harq_pid=0;
|
||||
((DCI1A_10MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->TPC=1;
|
||||
((DCI1A_10MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->padding=0;
|
||||
((DCI1A_10MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->rballoc = mac_xface->computeRIV(RC.eNB[module_idP][CC_id]->frame_parms.N_RB_DL,first_rb,4);
|
||||
((DCI1A_10MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->rballoc = mac_xface->computeRIV(N_RB_DL,first_rb,4);
|
||||
rballoc[CC_id] |= mac_xface->get_rballoc(((DCI1A_10MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->vrb_type,
|
||||
((DCI1A_10MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->rballoc);
|
||||
break;
|
||||
@@ -237,7 +245,7 @@ void schedule_RA(module_id_t module_idP,frame_t frameP, sub_frame_t subframeP,un
|
||||
((DCI1A_20MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->harq_pid=0;
|
||||
((DCI1A_20MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->TPC=1;
|
||||
((DCI1A_20MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->padding=0;
|
||||
((DCI1A_20MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->rballoc = mac_xface->computeRIV(RC.eNB[module_idP][CC_id]->frame_parms.N_RB_DL,first_rb,4);
|
||||
((DCI1A_20MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->rballoc = mac_xface->computeRIV(N_RB_DL,first_rb,4);
|
||||
rballoc[CC_id] |= mac_xface->get_rballoc(((DCI1A_20MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->vrb_type,
|
||||
((DCI1A_20MHz_FDD_t*)&RA_template->RA_alloc_pdu1[0])->rballoc);
|
||||
break;
|
||||
@@ -276,7 +284,7 @@ void schedule_RA(module_id_t module_idP,frame_t frameP, sub_frame_t subframeP,un
|
||||
frameP,
|
||||
CCCH,
|
||||
1, // 1 transport block
|
||||
&eNB->common_channels[CC_id].CCCH_pdu.payload[0],
|
||||
&cc[CC_id].CCCH_pdu.payload[0],
|
||||
ENB_FLAG_YES,
|
||||
module_idP,
|
||||
0); // not used in this case
|
||||
@@ -307,9 +315,9 @@ void schedule_RA(module_id_t module_idP,frame_t frameP, sub_frame_t subframeP,un
|
||||
// Compute MCS for 3 PRB
|
||||
msg4_header = 1+6+1; // CR header, CR CE, SDU header
|
||||
|
||||
if (mac_xface->frame_parms->frame_type == TDD) {
|
||||
if (cc[CC_id].tdd_Config != NULL) { // TDD
|
||||
|
||||
switch (mac_xface->frame_parms->N_RB_DL) {
|
||||
switch (N_RB_DL) {
|
||||
case 6:
|
||||
((DCI1A_1_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->ndi=1;
|
||||
|
||||
@@ -338,7 +346,7 @@ void schedule_RA(module_id_t module_idP,frame_t frameP, sub_frame_t subframeP,un
|
||||
((DCI1A_1_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->harq_pid=0;
|
||||
((DCI1A_1_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->TPC=1;
|
||||
((DCI1A_1_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->padding=0;
|
||||
((DCI1A_1_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->rballoc= mac_xface->computeRIV(RC.eNB[module_idP][CC_id]->frame_parms.N_RB_DL,first_rb,4);
|
||||
((DCI1A_1_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->rballoc= mac_xface->computeRIV(N_RB_DL,first_rb,4);
|
||||
rballoc[CC_id] |= mac_xface->get_rballoc(((DCI1A_1_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->vrb_type,
|
||||
((DCI1A_1_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->rballoc);
|
||||
|
||||
@@ -374,7 +382,7 @@ void schedule_RA(module_id_t module_idP,frame_t frameP, sub_frame_t subframeP,un
|
||||
((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->harq_pid=0;
|
||||
((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->TPC=1;
|
||||
((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->padding=0;
|
||||
((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->rballoc= mac_xface->computeRIV(RC.eNB[module_idP][CC_id]->frame_parms.N_RB_DL,first_rb,4);
|
||||
((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->rballoc= mac_xface->computeRIV(N_RB_DL,first_rb,4);
|
||||
rballoc[CC_id] |= mac_xface->get_rballoc(((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->vrb_type,
|
||||
((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->rballoc);
|
||||
break;
|
||||
@@ -408,7 +416,7 @@ void schedule_RA(module_id_t module_idP,frame_t frameP, sub_frame_t subframeP,un
|
||||
((DCI1A_10MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->harq_pid=0;
|
||||
((DCI1A_10MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->TPC=1;
|
||||
((DCI1A_10MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->padding=0;
|
||||
((DCI1A_10MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->rballoc= mac_xface->computeRIV(RC.eNB[module_idP][CC_id]->frame_parms.N_RB_DL,first_rb,4);
|
||||
((DCI1A_10MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->rballoc= mac_xface->computeRIV(N_RB_DL,first_rb,4);
|
||||
rballoc[CC_id] |= mac_xface->get_rballoc(((DCI1A_10MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->vrb_type,
|
||||
((DCI1A_10MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->rballoc);
|
||||
|
||||
@@ -443,13 +451,13 @@ void schedule_RA(module_id_t module_idP,frame_t frameP, sub_frame_t subframeP,un
|
||||
((DCI1A_20MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->rv=0;
|
||||
((DCI1A_20MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->harq_pid=0;
|
||||
((DCI1A_20MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->TPC=1;
|
||||
((DCI1A_20MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->rballoc= mac_xface->computeRIV(RC.eNB[module_idP][CC_id]->frame_parms.N_RB_DL,first_rb,4);
|
||||
((DCI1A_20MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->rballoc= mac_xface->computeRIV(N_RB_DL,first_rb,4);
|
||||
rballoc[CC_id] |= mac_xface->get_rballoc(((DCI1A_20MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->vrb_type,
|
||||
((DCI1A_20MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->rballoc);
|
||||
break;
|
||||
}
|
||||
} else { // FDD DCI
|
||||
switch (mac_xface->frame_parms->N_RB_DL) {
|
||||
switch (N_RB_DL) {
|
||||
case 6:
|
||||
((DCI1A_1_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->ndi=1;
|
||||
|
||||
@@ -479,7 +487,7 @@ void schedule_RA(module_id_t module_idP,frame_t frameP, sub_frame_t subframeP,un
|
||||
((DCI1A_1_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->harq_pid=0;
|
||||
((DCI1A_1_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->TPC=1;
|
||||
((DCI1A_1_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->padding=0;
|
||||
((DCI1A_1_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->rballoc= mac_xface->computeRIV(RC.eNB[module_idP][CC_id]->frame_parms.N_RB_DL,first_rb,4);
|
||||
((DCI1A_1_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->rballoc= mac_xface->computeRIV(N_RB_DL,first_rb,4);
|
||||
rballoc[CC_id] |= mac_xface->get_rballoc(((DCI1A_1_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->vrb_type,
|
||||
((DCI1A_1_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->rballoc);
|
||||
break;
|
||||
@@ -513,7 +521,7 @@ void schedule_RA(module_id_t module_idP,frame_t frameP, sub_frame_t subframeP,un
|
||||
((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->harq_pid=0;
|
||||
((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->TPC=1;
|
||||
((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->padding=0;
|
||||
((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->rballoc= mac_xface->computeRIV(RC.eNB[module_idP][CC_id]->frame_parms.N_RB_DL,first_rb,4);
|
||||
((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->rballoc= mac_xface->computeRIV(N_RB_DL,first_rb,4);
|
||||
rballoc[CC_id] |= mac_xface->get_rballoc(((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->vrb_type,
|
||||
((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->rballoc);
|
||||
break;
|
||||
@@ -547,7 +555,7 @@ void schedule_RA(module_id_t module_idP,frame_t frameP, sub_frame_t subframeP,un
|
||||
((DCI1A_10MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->harq_pid=0;
|
||||
((DCI1A_10MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->TPC=1;
|
||||
((DCI1A_10MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->padding=0;
|
||||
((DCI1A_10MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->rballoc= mac_xface->computeRIV(RC.eNB[module_idP][CC_id]->frame_parms.N_RB_DL,first_rb,4);
|
||||
((DCI1A_10MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->rballoc= mac_xface->computeRIV(N_RB_DL,first_rb,4);
|
||||
rballoc[CC_id] |= mac_xface->get_rballoc(((DCI1A_10MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->vrb_type,
|
||||
((DCI1A_10MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->rballoc);
|
||||
break;
|
||||
@@ -580,7 +588,7 @@ void schedule_RA(module_id_t module_idP,frame_t frameP, sub_frame_t subframeP,un
|
||||
((DCI1A_20MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->harq_pid=0;
|
||||
((DCI1A_20MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->TPC=1;
|
||||
((DCI1A_20MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->padding=0;
|
||||
((DCI1A_20MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->rballoc= mac_xface->computeRIV(RC.eNB[module_idP][CC_id]->frame_parms.N_RB_DL,first_rb,4);
|
||||
((DCI1A_20MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->rballoc= mac_xface->computeRIV(N_RB_DL,first_rb,4);
|
||||
rballoc[CC_id] |= mac_xface->get_rballoc(((DCI1A_20MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->vrb_type,
|
||||
((DCI1A_20MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->rballoc);
|
||||
break;
|
||||
@@ -624,7 +632,7 @@ void schedule_RA(module_id_t module_idP,frame_t frameP, sub_frame_t subframeP,un
|
||||
msg4_post_padding);
|
||||
|
||||
memcpy((void*)&eNB->UE_list.DLSCH_pdu[CC_id][0][(unsigned char)UE_id].payload[0][(unsigned char)offset],
|
||||
&eNB->common_channels[CC_id].CCCH_pdu.payload[0],
|
||||
&cc[CC_id].CCCH_pdu.payload[0],
|
||||
rrc_sdu_length);
|
||||
|
||||
T(T_ENB_MAC_UE_DL_PDU_WITH_DATA, T_INT(module_idP), T_INT(CC_id), T_INT(RA_template->rnti), T_INT(frameP), T_INT(subframeP),
|
||||
@@ -654,7 +662,7 @@ void schedule_RA(module_id_t module_idP,frame_t frameP, sub_frame_t subframeP,un
|
||||
if (round>0) {
|
||||
//RA_template->wait_ack_Msg4++;
|
||||
// we have to schedule a retransmission
|
||||
if (RC.eNB[module_idP][CC_id]->frame_parms.frame_type == TDD) {
|
||||
if (cc[CC_id].tdd_Config!=NULL) { // TDD
|
||||
((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->ndi=1;
|
||||
} else {
|
||||
((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->ndi=1;
|
||||
@@ -663,7 +671,7 @@ void schedule_RA(module_id_t module_idP,frame_t frameP, sub_frame_t subframeP,un
|
||||
/*
|
||||
// randomize frequency allocation for RA
|
||||
while (1) {
|
||||
first_rb = (unsigned char)(taus()%(RC.eNB[module_idP][CC_id].frame_parms.N_RB_DL-4));
|
||||
first_rb = (unsigned char)(taus()%(N_RB_DL-4));
|
||||
|
||||
if ((vrb_map[first_rb] != 1) && (vrb_map[first_rb+3] != 1))
|
||||
break;
|
||||
@@ -675,12 +683,12 @@ void schedule_RA(module_id_t module_idP,frame_t frameP, sub_frame_t subframeP,un
|
||||
vrb_map[first_rb+2] = 1;
|
||||
vrb_map[first_rb+3] = 1;
|
||||
|
||||
if (RC.eNB[module_idP][CC_id]->frame_parms.frame_type == TDD) {
|
||||
((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->rballoc = mac_xface->computeRIV(RC.eNB[module_idP][CC_id]->frame_parms.N_RB_UL,first_rb,4);
|
||||
if (cc[CC_id].tdd_Config!=NULL) {
|
||||
((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->rballoc = mac_xface->computeRIV(N_RB_UL,first_rb,4);
|
||||
rballoc[CC_id] |= mac_xface->get_rballoc(((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->vrb_type,
|
||||
((DCI1A_5MHz_TDD_1_6_t*)&RA_template->RA_alloc_pdu2[0])->rballoc);
|
||||
} else {
|
||||
((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->rballoc = mac_xface->computeRIV(RC.eNB[module_idP][CC_id]->frame_parms.N_RB_UL,first_rb,4);
|
||||
((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->rballoc = mac_xface->computeRIV(N_RB_UL,first_rb,4);
|
||||
rballoc[CC_id] |= mac_xface->get_rballoc(((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->vrb_type,
|
||||
((DCI1A_5MHz_FDD_t*)&RA_template->RA_alloc_pdu2[0])->rballoc);
|
||||
}
|
||||
@@ -712,7 +720,7 @@ printf("MAC: msg4 acknowledged for rnti %x fsf %d/%d, let's configure it\n", RA_
|
||||
RA_template->RA_active=FALSE;
|
||||
UE_id = find_UE_id(module_idP,RA_template->rnti);
|
||||
DevAssert( UE_id != -1 );
|
||||
RC.mac[module_idP]->UE_list.UE_template[UE_PCCID(module_idP,UE_id)][UE_id].configured=TRUE;
|
||||
eNB->UE_list.UE_template[UE_PCCID(module_idP,UE_id)][UE_id].configured=TRUE;
|
||||
|
||||
}
|
||||
}
|
||||
|
||||
@@ -69,32 +69,34 @@ schedule_SI(
|
||||
//------------------------------------------------------------------------------
|
||||
{
|
||||
|
||||
|
||||
|
||||
int8_t bcch_sdu_length;
|
||||
int mcs = -1;
|
||||
void *BCCH_alloc_pdu;
|
||||
int CC_id;
|
||||
eNB_MAC_INST *eNB = RC.mac[module_idP];
|
||||
uint8_t *vrb_map;
|
||||
int first_rb = -1;
|
||||
int rballoc[MAX_NUM_CCs];
|
||||
int sizeof1A_bytes,sizeof1A_bits = -1;
|
||||
DCI_PDU *DCI_pdu;
|
||||
|
||||
int8_t bcch_sdu_length;
|
||||
int mcs = -1;
|
||||
void *BCCH_alloc_pdu;
|
||||
int CC_id;
|
||||
eNB_MAC_INST *eNB = RC.mac[module_idP];
|
||||
uint8_t *vrb_map;
|
||||
int first_rb = -1;
|
||||
int rballoc[MAX_NUM_CCs];
|
||||
int sizeof1A_bytes;
|
||||
int sizeof1A_bits = -1;
|
||||
DCI_PDU *DCI_pdu;
|
||||
COMMON_channels_t *cc;
|
||||
int N_RB_DL;
|
||||
start_meas(&eNB->schedule_si);
|
||||
|
||||
for (CC_id=0; CC_id<MAX_NUM_CCs; CC_id++) {
|
||||
|
||||
BCCH_alloc_pdu = (void*)&eNB->common_channels[CC_id].BCCH_alloc_pdu;
|
||||
DCI_pdu = (void*)&eNB->common_channels[CC_id].DCI_pdu;
|
||||
vrb_map = (void*)&eNB->common_channels[CC_id].vrb_map;
|
||||
|
||||
cc = &eNB->common_channels[CC_id];
|
||||
BCCH_alloc_pdu = (void*)&cc->BCCH_alloc_pdu;
|
||||
DCI_pdu = (void*)&cc->DCI_pdu;
|
||||
vrb_map = (void*)&cc->vrb_map;
|
||||
N_RB_DL = to_prb(cc->mib->message.dl_Bandwidth);
|
||||
|
||||
bcch_sdu_length = mac_rrc_data_req(module_idP,
|
||||
CC_id,
|
||||
frameP,
|
||||
BCCH,1,
|
||||
&eNB->common_channels[CC_id].BCCH_pdu.payload[0],
|
||||
&cc->BCCH_pdu.payload[0],
|
||||
1,
|
||||
module_idP,
|
||||
0); // not used in this case
|
||||
@@ -113,7 +115,7 @@ schedule_SI(
|
||||
break;
|
||||
}
|
||||
*/
|
||||
switch (RC.eNB[module_idP][CC_id]->frame_parms.N_RB_DL) {
|
||||
switch (N_RB_DL) {
|
||||
case 6:
|
||||
first_rb = 0;
|
||||
break;
|
||||
@@ -159,11 +161,11 @@ schedule_SI(
|
||||
|
||||
|
||||
|
||||
if (RC.eNB[module_idP][CC_id]->frame_parms.frame_type == TDD) {
|
||||
switch (RC.eNB[module_idP][CC_id]->frame_parms.N_RB_DL) {
|
||||
if (cc->tdd_Config!=NULL) { // TDD
|
||||
switch (N_RB_DL) {
|
||||
case 6:
|
||||
((DCI1A_1_5MHz_TDD_1_6_t*)BCCH_alloc_pdu)->mcs = mcs;
|
||||
((DCI1A_1_5MHz_TDD_1_6_t*)BCCH_alloc_pdu)->rballoc = mac_xface->computeRIV(RC.eNB[module_idP][CC_id]->frame_parms.N_RB_DL,first_rb,4);
|
||||
((DCI1A_1_5MHz_TDD_1_6_t*)BCCH_alloc_pdu)->rballoc = mac_xface->computeRIV(N_RB_DL,first_rb,4);
|
||||
((DCI1A_1_5MHz_TDD_1_6_t*)BCCH_alloc_pdu)->type = 1;
|
||||
((DCI1A_1_5MHz_TDD_1_6_t*)BCCH_alloc_pdu)->vrb_type = 0;
|
||||
((DCI1A_1_5MHz_TDD_1_6_t*)BCCH_alloc_pdu)->ndi = 1;
|
||||
@@ -178,7 +180,7 @@ schedule_SI(
|
||||
|
||||
case 25:
|
||||
((DCI1A_5MHz_TDD_1_6_t*)BCCH_alloc_pdu)->mcs = mcs;
|
||||
((DCI1A_5MHz_TDD_1_6_t*)BCCH_alloc_pdu)->rballoc = mac_xface->computeRIV(RC.eNB[module_idP][CC_id]->frame_parms.N_RB_DL,first_rb,4);
|
||||
((DCI1A_5MHz_TDD_1_6_t*)BCCH_alloc_pdu)->rballoc = mac_xface->computeRIV(N_RB_DL,first_rb,4);
|
||||
((DCI1A_5MHz_TDD_1_6_t*)BCCH_alloc_pdu)->type = 1;
|
||||
((DCI1A_5MHz_TDD_1_6_t*)BCCH_alloc_pdu)->vrb_type = 0;
|
||||
((DCI1A_5MHz_TDD_1_6_t*)BCCH_alloc_pdu)->ndi = 1;
|
||||
@@ -193,7 +195,7 @@ schedule_SI(
|
||||
|
||||
case 50:
|
||||
((DCI1A_10MHz_TDD_1_6_t*)BCCH_alloc_pdu)->mcs = mcs;
|
||||
((DCI1A_10MHz_TDD_1_6_t*)BCCH_alloc_pdu)->rballoc = mac_xface->computeRIV(RC.eNB[module_idP][CC_id]->frame_parms.N_RB_DL,first_rb,4);
|
||||
((DCI1A_10MHz_TDD_1_6_t*)BCCH_alloc_pdu)->rballoc = mac_xface->computeRIV(N_RB_DL,first_rb,4);
|
||||
((DCI1A_10MHz_TDD_1_6_t*)BCCH_alloc_pdu)->type = 1;
|
||||
((DCI1A_10MHz_TDD_1_6_t*)BCCH_alloc_pdu)->vrb_type = 0;
|
||||
((DCI1A_10MHz_TDD_1_6_t*)BCCH_alloc_pdu)->ndi = 1;
|
||||
@@ -208,7 +210,7 @@ schedule_SI(
|
||||
|
||||
case 100:
|
||||
((DCI1A_20MHz_TDD_1_6_t*)BCCH_alloc_pdu)->mcs = mcs;
|
||||
((DCI1A_20MHz_TDD_1_6_t*)BCCH_alloc_pdu)->rballoc = mac_xface->computeRIV(RC.eNB[module_idP][CC_id]->frame_parms.N_RB_DL,first_rb,4);
|
||||
((DCI1A_20MHz_TDD_1_6_t*)BCCH_alloc_pdu)->rballoc = mac_xface->computeRIV(N_RB_DL,first_rb,4);
|
||||
((DCI1A_20MHz_TDD_1_6_t*)BCCH_alloc_pdu)->type = 1;
|
||||
((DCI1A_20MHz_TDD_1_6_t*)BCCH_alloc_pdu)->vrb_type = 0;
|
||||
((DCI1A_20MHz_TDD_1_6_t*)BCCH_alloc_pdu)->ndi = 1;
|
||||
@@ -223,10 +225,10 @@ schedule_SI(
|
||||
}
|
||||
|
||||
} else {
|
||||
switch (RC.eNB[module_idP][CC_id]->frame_parms.N_RB_DL) {
|
||||
switch (N_RB_DL) {
|
||||
case 6:
|
||||
((DCI1A_1_5MHz_FDD_t*)BCCH_alloc_pdu)->mcs = mcs;
|
||||
((DCI1A_1_5MHz_FDD_t*)BCCH_alloc_pdu)->rballoc = mac_xface->computeRIV(RC.eNB[module_idP][CC_id]->frame_parms.N_RB_DL,first_rb,4);
|
||||
((DCI1A_1_5MHz_FDD_t*)BCCH_alloc_pdu)->rballoc = mac_xface->computeRIV(N_RB_DL,first_rb,4);
|
||||
((DCI1A_1_5MHz_FDD_t*)BCCH_alloc_pdu)->type = 1;
|
||||
((DCI1A_1_5MHz_FDD_t*)BCCH_alloc_pdu)->vrb_type = 0;
|
||||
((DCI1A_1_5MHz_FDD_t*)BCCH_alloc_pdu)->ndi = 1;
|
||||
@@ -242,7 +244,7 @@ schedule_SI(
|
||||
|
||||
case 25:
|
||||
((DCI1A_5MHz_FDD_t*)BCCH_alloc_pdu)->mcs = mcs;
|
||||
((DCI1A_5MHz_FDD_t*)BCCH_alloc_pdu)->rballoc = mac_xface->computeRIV(RC.eNB[module_idP][CC_id]->frame_parms.N_RB_DL,first_rb,4);
|
||||
((DCI1A_5MHz_FDD_t*)BCCH_alloc_pdu)->rballoc = mac_xface->computeRIV(N_RB_DL,first_rb,4);
|
||||
((DCI1A_5MHz_FDD_t*)BCCH_alloc_pdu)->type = 1;
|
||||
((DCI1A_5MHz_FDD_t*)BCCH_alloc_pdu)->vrb_type = 0;
|
||||
((DCI1A_5MHz_FDD_t*)BCCH_alloc_pdu)->ndi = 1;
|
||||
@@ -258,7 +260,7 @@ schedule_SI(
|
||||
|
||||
case 50:
|
||||
((DCI1A_10MHz_FDD_t*)BCCH_alloc_pdu)->mcs = mcs;
|
||||
((DCI1A_10MHz_FDD_t*)BCCH_alloc_pdu)->rballoc = mac_xface->computeRIV(RC.eNB[module_idP][CC_id]->frame_parms.N_RB_DL,first_rb,4);
|
||||
((DCI1A_10MHz_FDD_t*)BCCH_alloc_pdu)->rballoc = mac_xface->computeRIV(N_RB_DL,first_rb,4);
|
||||
((DCI1A_10MHz_FDD_t*)BCCH_alloc_pdu)->type = 1;
|
||||
((DCI1A_10MHz_FDD_t*)BCCH_alloc_pdu)->vrb_type = 0;
|
||||
((DCI1A_10MHz_FDD_t*)BCCH_alloc_pdu)->ndi = 1;
|
||||
@@ -274,7 +276,7 @@ schedule_SI(
|
||||
|
||||
case 100:
|
||||
((DCI1A_20MHz_FDD_t*)BCCH_alloc_pdu)->mcs = mcs;
|
||||
((DCI1A_20MHz_FDD_t*)BCCH_alloc_pdu)->rballoc = mac_xface->computeRIV(RC.eNB[module_idP][CC_id]->frame_parms.N_RB_DL,first_rb,4);
|
||||
((DCI1A_20MHz_FDD_t*)BCCH_alloc_pdu)->rballoc = mac_xface->computeRIV(N_RB_DL,first_rb,4);
|
||||
((DCI1A_20MHz_FDD_t*)BCCH_alloc_pdu)->type = 1;
|
||||
((DCI1A_20MHz_FDD_t*)BCCH_alloc_pdu)->vrb_type = 0;
|
||||
((DCI1A_20MHz_FDD_t*)BCCH_alloc_pdu)->ndi = 1;
|
||||
@@ -306,7 +308,7 @@ schedule_SI(
|
||||
|
||||
if (opt_enabled == 1) {
|
||||
trace_pdu(1,
|
||||
&eNB->common_channels[CC_id].BCCH_pdu.payload[0],
|
||||
&cc->BCCH_pdu.payload[0],
|
||||
bcch_sdu_length,
|
||||
0xffff,
|
||||
4,
|
||||
@@ -318,7 +320,7 @@ schedule_SI(
|
||||
LOG_D(OPT,"[eNB %d][BCH] Frame %d trace pdu for CC_id %d rnti %x with size %d\n",
|
||||
module_idP, frameP, CC_id, 0xffff, bcch_sdu_length);
|
||||
}
|
||||
if (RC.eNB[module_idP][CC_id]->frame_parms.frame_type == TDD) {
|
||||
if (cc->tdd_Config!=NULL) { //TDD
|
||||
LOG_D(MAC,"[eNB] Frame %d : Scheduling BCCH->DLSCH (TDD) for CC_id %d SI %d bytes (mcs %d, rb 3, TBS %d)\n",
|
||||
frameP,
|
||||
CC_id,
|
||||
|
||||
@@ -315,22 +315,21 @@ set_ul_DAI(
|
||||
int UE_idP,
|
||||
int CC_idP,
|
||||
int frameP,
|
||||
int subframeP,
|
||||
LTE_DL_FRAME_PARMS* frame_parms[MAX_NUM_CCs]
|
||||
)
|
||||
int subframeP
|
||||
)
|
||||
//------------------------------------------------------------------------------
|
||||
{
|
||||
|
||||
eNB_MAC_INST *eNB = RC.mac[module_idP];
|
||||
UE_list_t *UE_list = &eNB->UE_list;
|
||||
unsigned char DAI;
|
||||
|
||||
if (frame_parms[CC_idP]->frame_type == TDD) {
|
||||
COMMON_channels_t *cc = &eNB->common_channels[CC_idP];
|
||||
if (cc->tdd_Config != NULL) { //TDD
|
||||
DAI = (UE_list->UE_template[CC_idP][UE_idP].DAI-1)&3;
|
||||
LOG_D(MAC,"[eNB %d] CC_id %d Frame %d, subframe %d: DAI %d for UE %d\n",module_idP,CC_idP,frameP,subframeP,DAI,UE_idP);
|
||||
// Save DAI for Format 0 DCI
|
||||
|
||||
switch (frame_parms[CC_idP]->tdd_config) {
|
||||
switch (cc->tdd_Config->subframeAssignment) {
|
||||
case 0:
|
||||
// if ((subframeP==0)||(subframeP==1)||(subframeP==5)||(subframeP==6))
|
||||
break;
|
||||
@@ -423,35 +422,35 @@ schedule_ue_spec(
|
||||
|
||||
uint8_t CC_id;
|
||||
int UE_id;
|
||||
int N_RBG[MAX_NUM_CCs];
|
||||
unsigned char aggregation;
|
||||
mac_rlc_status_resp_t rlc_status;
|
||||
unsigned char header_len_dcch=0, header_len_dcch_tmp=0;
|
||||
unsigned char header_len_dtch=0, header_len_dtch_tmp=0, header_len_dtch_last=0;
|
||||
unsigned char ta_len=0;
|
||||
unsigned char sdu_lcids[NB_RB_MAX],lcid,offset,num_sdus=0;
|
||||
uint16_t nb_rb,nb_rb_temp,total_nb_available_rb[MAX_NUM_CCs],nb_available_rb;
|
||||
uint16_t nb_rb,nb_rb_temp,nb_available_rb;
|
||||
uint16_t TBS,j,sdu_lengths[NB_RB_MAX],rnti,padding=0,post_padding=0;
|
||||
unsigned char dlsch_buffer[MAX_DLSCH_PAYLOAD_BYTES];
|
||||
unsigned char round = 0;
|
||||
unsigned char harq_pid = 0;
|
||||
void *DLSCH_dci = NULL;
|
||||
LTE_eNB_UE_stats *eNB_UE_stats = NULL;
|
||||
unsigned char round = 0;
|
||||
unsigned char harq_pid = 0;
|
||||
void *DLSCH_dci = NULL;
|
||||
LTE_eNB_UE_stats *eNB_UE_stats = NULL;
|
||||
uint16_t sdu_length_total = 0;
|
||||
// uint8_t dl_pow_off[MAX_NUM_CCs][NUMBER_OF_UE_MAX];
|
||||
// unsigned char rballoc_sub_UE[MAX_NUM_CCs][NUMBER_OF_UE_MAX][N_RBG_MAX];
|
||||
// uint16_t pre_nb_available_rbs[MAX_NUM_CCs][NUMBER_OF_UE_MAX];
|
||||
int mcs;
|
||||
int min_rb_unit[MAX_NUM_CCs];
|
||||
eNB_MAC_INST *eNB = RC.mac[module_idP];
|
||||
UE_list_t *UE_list = &eNB->UE_list;
|
||||
LTE_DL_FRAME_PARMS *frame_parms[MAX_NUM_CCs];
|
||||
int mcs;
|
||||
|
||||
eNB_MAC_INST *eNB = RC.mac[module_idP];
|
||||
COMMON_channels_t *cc = eNB->common_channels;
|
||||
UE_list_t *UE_list = &eNB->UE_list;
|
||||
int continue_flag=0;
|
||||
int32_t normalized_rx_power, target_rx_power;
|
||||
int32_t tpc=1;
|
||||
static int32_t tpc_accumulated=0;
|
||||
UE_sched_ctrl *ue_sched_ctl;
|
||||
int i;
|
||||
int32_t normalized_rx_power, target_rx_power;
|
||||
int32_t tpc=1;
|
||||
static int32_t tpc_accumulated=0;
|
||||
UE_sched_ctrl *ue_sched_ctl;
|
||||
int i;
|
||||
int min_rb_unit[MAX_NUM_CCs];
|
||||
int N_RB_DL[MAX_NUM_CCs];
|
||||
int total_nb_available_rb[MAX_NUM_CCs];
|
||||
int N_RBG[MAX_NUM_CCs];
|
||||
|
||||
#if 0
|
||||
if (UE_list->head==-1) {
|
||||
@@ -464,24 +463,23 @@ schedule_ue_spec(
|
||||
|
||||
//weight = get_ue_weight(module_idP,UE_id);
|
||||
aggregation = 2;
|
||||
|
||||
for (CC_id=0; CC_id<MAX_NUM_CCs; CC_id++) {
|
||||
N_RB_DL[CC_id] = to_prb(cc[CC_id].mib->message.dl_Bandwidth);
|
||||
min_rb_unit[CC_id]=get_min_rb_unit(module_idP,CC_id);
|
||||
frame_parms[CC_id] = mac_xface->get_lte_frame_parms(module_idP,CC_id);
|
||||
// get number of PRBs less those used by common channels
|
||||
total_nb_available_rb[CC_id] = frame_parms[CC_id]->N_RB_DL;
|
||||
for (i=0;i<frame_parms[CC_id]->N_RB_DL;i++)
|
||||
if (eNB->common_channels[CC_id].vrb_map[i]!=0)
|
||||
total_nb_available_rb[CC_id] = N_RB_DL[CC_id];
|
||||
for (i=0;i<N_RB_DL[CC_id];i++)
|
||||
if (cc[CC_id].vrb_map[i]!=0)
|
||||
total_nb_available_rb[CC_id]--;
|
||||
|
||||
N_RBG[CC_id] = frame_parms[CC_id]->N_RBG;
|
||||
N_RBG[CC_id] = to_rbg(cc[CC_id].mib->message.dl_Bandwidth);
|
||||
|
||||
// store the global enb stats:
|
||||
eNB->eNB_stats[CC_id].num_dlactive_UEs = UE_list->num_UEs;
|
||||
eNB->eNB_stats[CC_id].available_prbs = total_nb_available_rb[CC_id];
|
||||
eNB->eNB_stats[CC_id].num_dlactive_UEs = UE_list->num_UEs;
|
||||
eNB->eNB_stats[CC_id].available_prbs = total_nb_available_rb[CC_id];
|
||||
eNB->eNB_stats[CC_id].total_available_prbs += total_nb_available_rb[CC_id];
|
||||
eNB->eNB_stats[CC_id].dlsch_bytes_tx=0;
|
||||
eNB->eNB_stats[CC_id].dlsch_pdus_tx=0;
|
||||
eNB->eNB_stats[CC_id].dlsch_bytes_tx = 0;
|
||||
eNB->eNB_stats[CC_id].dlsch_pdus_tx = 0;
|
||||
}
|
||||
|
||||
/// CALLING Pre_Processor for downlink scheduling (Returns estimation of RBs required by each UE and the allocation on sub-band)
|
||||
@@ -550,14 +548,14 @@ schedule_ue_spec(
|
||||
// break;
|
||||
}
|
||||
|
||||
if (frame_parms[CC_id]->frame_type == TDD) {
|
||||
if (cc[CC_id].tdd_Config != NULL) { //TDD
|
||||
set_ue_dai (subframeP,
|
||||
frame_parms[CC_id]->tdd_config,
|
||||
UE_id,
|
||||
CC_id,
|
||||
cc[CC_id].tdd_Config->subframeAssignment,
|
||||
UE_list);
|
||||
// update UL DAI after DLSCH scheduling
|
||||
set_ul_DAI(module_idP,UE_id,CC_id,frameP,subframeP,frame_parms);
|
||||
set_ul_DAI(module_idP,UE_id,CC_id,frameP,subframeP);
|
||||
}
|
||||
|
||||
if (continue_flag == 1 ) {
|
||||
@@ -592,7 +590,7 @@ schedule_ue_spec(
|
||||
UE_list->eNB_UE_stats[CC_id][UE_id].dl_cqi= eNB_UE_stats->DL_cqi[0];
|
||||
|
||||
// initializing the rb allocation indicator for each UE
|
||||
for(j=0; j<frame_parms[CC_id]->N_RBG; j++) {
|
||||
for(j=0; j<N_RBG[CC_id]; j++) {
|
||||
UE_list->UE_template[CC_id][UE_id].rballoc_subband[harq_pid][j] = 0;
|
||||
}
|
||||
|
||||
@@ -610,7 +608,7 @@ schedule_ue_spec(
|
||||
|
||||
if (round > 0) {
|
||||
|
||||
if (frame_parms[CC_id]->frame_type == TDD) {
|
||||
if (cc[CC_id].tdd_Config != NULL) { //TDD
|
||||
UE_list->UE_template[CC_id][UE_id].DAI++;
|
||||
update_ul_dci(module_idP,CC_id,rnti,UE_list->UE_template[CC_id][UE_id].DAI);
|
||||
LOG_D(MAC,"DAI update: CC_id %d subframeP %d: UE %d, DAI %d\n",
|
||||
@@ -623,20 +621,20 @@ schedule_ue_spec(
|
||||
if (nb_rb <= nb_available_rb) {
|
||||
|
||||
if(nb_rb == ue_sched_ctl->pre_nb_available_rbs[CC_id]) {
|
||||
for(j=0; j<frame_parms[CC_id]->N_RBG; j++) { // for indicating the rballoc for each sub-band
|
||||
for(j=0; j<N_RBG[CC_id]; j++) { // for indicating the rballoc for each sub-band
|
||||
UE_list->UE_template[CC_id][UE_id].rballoc_subband[harq_pid][j] = ue_sched_ctl->rballoc_sub_UE[CC_id][j];
|
||||
}
|
||||
} else {
|
||||
nb_rb_temp = nb_rb;
|
||||
j = 0;
|
||||
|
||||
while((nb_rb_temp > 0) && (j<frame_parms[CC_id]->N_RBG)) {
|
||||
while((nb_rb_temp > 0) && (j<N_RBG[CC_id])) {
|
||||
if(ue_sched_ctl->rballoc_sub_UE[CC_id][j] == 1) {
|
||||
UE_list->UE_template[CC_id][UE_id].rballoc_subband[harq_pid][j] = ue_sched_ctl->rballoc_sub_UE[CC_id][j];
|
||||
|
||||
if((j == frame_parms[CC_id]->N_RBG-1) &&
|
||||
((frame_parms[CC_id]->N_RB_DL == 25)||
|
||||
(frame_parms[CC_id]->N_RB_DL == 50))) {
|
||||
if((j == N_RBG[CC_id]-1) &&
|
||||
((N_RB_DL[CC_id] == 25)||
|
||||
(N_RB_DL[CC_id] == 50))) {
|
||||
nb_rb_temp = nb_rb_temp - min_rb_unit[CC_id]+1;
|
||||
} else {
|
||||
nb_rb_temp = nb_rb_temp - min_rb_unit[CC_id];
|
||||
@@ -648,21 +646,23 @@ schedule_ue_spec(
|
||||
}
|
||||
|
||||
nb_available_rb -= nb_rb;
|
||||
RC.eNB[module_idP][CC_id]->mu_mimo_mode[UE_id].pre_nb_available_rbs = nb_rb;
|
||||
RC.eNB[module_idP][CC_id]->mu_mimo_mode[UE_id].dl_pow_off = ue_sched_ctl->dl_pow_off[CC_id];
|
||||
/*
|
||||
eNB->mu_mimo_mode[UE_id].pre_nb_available_rbs = nb_rb;
|
||||
eNB->mu_mimo_mode[UE_id].dl_pow_off = ue_sched_ctl->dl_pow_off[CC_id];
|
||||
|
||||
for(j=0; j<frame_parms[CC_id]->N_RBG; j++) {
|
||||
RC.eNB[module_idP][CC_id]->mu_mimo_mode[UE_id].rballoc_sub[j] = UE_list->UE_template[CC_id][UE_id].rballoc_subband[harq_pid][j];
|
||||
for(j=0; j<N_RBG[CC_id]; j++) {
|
||||
eNB->mu_mimo_mode[UE_id].rballoc_sub[j] = UE_list->UE_template[CC_id][UE_id].rballoc_subband[harq_pid][j];
|
||||
}
|
||||
*/
|
||||
|
||||
switch (mac_xface->get_transmission_mode(module_idP,CC_id,rnti)) {
|
||||
case 1:
|
||||
case 2:
|
||||
case 7:
|
||||
default:
|
||||
switch (frame_parms[CC_id]->N_RB_DL) {
|
||||
switch (N_RB_DL[CC_id]) {
|
||||
case 6:
|
||||
if (frame_parms[CC_id]->frame_type == TDD) {
|
||||
if (cc[CC_id].tdd_Config != NULL) { //TDD
|
||||
// ((DCI1_1_5MHz_TDD_t*)DLSCH_dci)->ndi = 0;
|
||||
((DCI1_1_5MHz_TDD_t*)DLSCH_dci)->harq_pid = harq_pid;
|
||||
((DCI1_1_5MHz_TDD_t*)DLSCH_dci)->rv = round&3;
|
||||
@@ -682,7 +682,7 @@ schedule_ue_spec(
|
||||
break;
|
||||
|
||||
case 25:
|
||||
if (frame_parms[CC_id]->frame_type == TDD) {
|
||||
if (cc[CC_id].tdd_Config != NULL) { //TDD
|
||||
// ((DCI1_5MHz_TDD_t*)DLSCH_dci)->ndi = 0;
|
||||
((DCI1_5MHz_TDD_t*)DLSCH_dci)->harq_pid = harq_pid;
|
||||
((DCI1_5MHz_TDD_t*)DLSCH_dci)->rv = round&3;
|
||||
@@ -702,7 +702,7 @@ schedule_ue_spec(
|
||||
break;
|
||||
|
||||
case 50:
|
||||
if (frame_parms[CC_id]->frame_type == TDD) {
|
||||
if (cc[CC_id].tdd_Config != NULL) { //TDD
|
||||
// ((DCI1_10MHz_TDD_t*)DLSCH_dci)->ndi = 0;
|
||||
((DCI1_10MHz_TDD_t*)DLSCH_dci)->harq_pid = harq_pid;
|
||||
((DCI1_10MHz_TDD_t*)DLSCH_dci)->rv = round&3;
|
||||
@@ -722,7 +722,7 @@ schedule_ue_spec(
|
||||
break;
|
||||
|
||||
case 100:
|
||||
if (frame_parms[CC_id]->frame_type == TDD) {
|
||||
if (cc[CC_id].tdd_Config != NULL) { //TDD
|
||||
// ((DCI1_20MHz_TDD_t*)DLSCH_dci)->ndi = 0;
|
||||
((DCI1_20MHz_TDD_t*)DLSCH_dci)->harq_pid = harq_pid;
|
||||
((DCI1_20MHz_TDD_t*)DLSCH_dci)->rv = round&3;
|
||||
@@ -1015,20 +1015,20 @@ schedule_ue_spec(
|
||||
}
|
||||
|
||||
if(nb_rb == ue_sched_ctl->pre_nb_available_rbs[CC_id]) {
|
||||
for(j=0; j<frame_parms[CC_id]->N_RBG; j++) { // for indicating the rballoc for each sub-band
|
||||
for(j=0; j<N_RBG[CC_id]; j++) { // for indicating the rballoc for each sub-band
|
||||
UE_list->UE_template[CC_id][UE_id].rballoc_subband[harq_pid][j] = ue_sched_ctl->rballoc_sub_UE[CC_id][j];
|
||||
}
|
||||
} else {
|
||||
nb_rb_temp = nb_rb;
|
||||
j = 0;
|
||||
|
||||
while((nb_rb_temp > 0) && (j<frame_parms[CC_id]->N_RBG)) {
|
||||
while((nb_rb_temp > 0) && (j<N_RBG[CC_id])) {
|
||||
if(ue_sched_ctl->rballoc_sub_UE[CC_id][j] == 1) {
|
||||
UE_list->UE_template[CC_id][UE_id].rballoc_subband[harq_pid][j] = ue_sched_ctl->rballoc_sub_UE[CC_id][j];
|
||||
|
||||
if ((j == frame_parms[CC_id]->N_RBG-1) &&
|
||||
((frame_parms[CC_id]->N_RB_DL == 25)||
|
||||
(frame_parms[CC_id]->N_RB_DL == 50))) {
|
||||
if ((j == N_RBG[CC_id]-1) &&
|
||||
((N_RB_DL[CC_id] == 25)||
|
||||
(N_RB_DL[CC_id] == 50))) {
|
||||
nb_rb_temp = nb_rb_temp - min_rb_unit[CC_id]+1;
|
||||
} else {
|
||||
nb_rb_temp = nb_rb_temp - min_rb_unit[CC_id];
|
||||
@@ -1038,15 +1038,15 @@ schedule_ue_spec(
|
||||
j = j+1;
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
RC.eNB[module_idP][CC_id]->mu_mimo_mode[UE_id].pre_nb_available_rbs = nb_rb;
|
||||
RC.eNB[module_idP][CC_id]->mu_mimo_mode[UE_id].dl_pow_off = ue_sched_ctl->dl_pow_off[CC_id];
|
||||
|
||||
for(j=0; j<frame_parms[CC_id]->N_RBG; j++) {
|
||||
for(j=0; j<N_RBG[CC_id]; j++) {
|
||||
RC.eNB[module_idP][CC_id]->mu_mimo_mode[UE_id].rballoc_sub[j] = UE_list->UE_template[CC_id][UE_id].rballoc_subband[harq_pid][j];
|
||||
|
||||
}
|
||||
|
||||
*/
|
||||
// decrease mcs until TBS falls below required length
|
||||
while ((TBS > (sdu_length_total + header_len_dcch + header_len_dtch + ta_len)) && (mcs>0)) {
|
||||
mcs--;
|
||||
@@ -1156,10 +1156,8 @@ schedule_ue_spec(
|
||||
UE_list->eNB_UE_stats[CC_id][UE_id].total_pdu_bytes+= TBS;
|
||||
UE_list->eNB_UE_stats[CC_id][UE_id].total_num_pdus+=1;
|
||||
|
||||
if (frame_parms[CC_id]->frame_type == TDD) {
|
||||
if (cc[CC_id].tdd_Config != NULL) { // TDD
|
||||
UE_list->UE_template[CC_id][UE_id].DAI++;
|
||||
// printf("DAI update: subframeP %d: UE %d, DAI %d\n",subframeP,UE_id,UE_list->UE_template[CC_id][UE_id].DAI);
|
||||
//#warning only for 5MHz channel
|
||||
update_ul_dci(module_idP,CC_id,rnti,UE_list->UE_template[CC_id][UE_id].DAI);
|
||||
}
|
||||
|
||||
@@ -1206,8 +1204,8 @@ schedule_ue_spec(
|
||||
case 1:
|
||||
case 2:
|
||||
default:
|
||||
if (frame_parms[CC_id]->frame_type == TDD) {
|
||||
switch (frame_parms[CC_id]->N_RB_DL) {
|
||||
if (cc[CC_id].tdd_Config != NULL) {//TDD
|
||||
switch (N_RB_DL[CC_id]) {
|
||||
case 6:
|
||||
((DCI1_1_5MHz_TDD_t*)DLSCH_dci)->mcs = mcs;
|
||||
((DCI1_1_5MHz_TDD_t*)DLSCH_dci)->harq_pid = harq_pid;
|
||||
@@ -1255,7 +1253,7 @@ schedule_ue_spec(
|
||||
break;
|
||||
}
|
||||
} else {
|
||||
switch (frame_parms[CC_id]->N_RB_DL) {
|
||||
switch (N_RB_DL[CC_id]) {
|
||||
case 6:
|
||||
((DCI1_1_5MHz_FDD_t*)DLSCH_dci)->mcs = mcs;
|
||||
((DCI1_1_5MHz_FDD_t*)DLSCH_dci)->harq_pid = harq_pid;
|
||||
@@ -1301,8 +1299,8 @@ schedule_ue_spec(
|
||||
break;
|
||||
|
||||
case 3:
|
||||
if (frame_parms[CC_id]->frame_type == TDD) {
|
||||
switch (frame_parms[CC_id]->N_RB_DL) {
|
||||
if (cc[CC_id].tdd_Config!=NULL) {
|
||||
switch (N_RB_DL[CC_id]) {
|
||||
case 6:
|
||||
((DCI2A_1_5MHz_2A_TDD_t*)DLSCH_dci)->mcs1 = mcs;
|
||||
((DCI2A_1_5MHz_2A_TDD_t*)DLSCH_dci)->harq_pid = harq_pid;
|
||||
@@ -1372,7 +1370,7 @@ schedule_ue_spec(
|
||||
break;
|
||||
}
|
||||
} else {
|
||||
switch (frame_parms[CC_id]->N_RB_DL) {
|
||||
switch (N_RB_DL[CC_id]) {
|
||||
case 6:
|
||||
((DCI2A_1_5MHz_2A_FDD_t*)DLSCH_dci)->mcs1 = mcs;
|
||||
((DCI2A_1_5MHz_2A_FDD_t*)DLSCH_dci)->harq_pid = harq_pid;
|
||||
@@ -1489,8 +1487,8 @@ schedule_ue_spec(
|
||||
}
|
||||
}
|
||||
|
||||
if (frame_parms[CC_id]->frame_type == TDD) {
|
||||
set_ul_DAI(module_idP,UE_id,CC_id,frameP,subframeP,frame_parms);
|
||||
if (cc[CC_id].tdd_Config != NULL){ // TDD
|
||||
set_ul_DAI(module_idP,UE_id,CC_id,frameP,subframeP);
|
||||
}
|
||||
|
||||
} // UE_id loop
|
||||
@@ -1522,18 +1520,19 @@ fill_DLSCH_dci(
|
||||
//uint8_t number_of_subbands=13;
|
||||
|
||||
//unsigned char round;
|
||||
unsigned char harq_pid;
|
||||
void *DLSCH_dci=NULL;
|
||||
DCI_PDU *DCI_pdu;
|
||||
int i;
|
||||
//void *BCCH_alloc_pdu;
|
||||
int size_bits,size_bytes;
|
||||
int CC_id;
|
||||
eNB_MAC_INST *eNB =RC.mac[module_idP];
|
||||
UE_list_t *UE_list = &eNB->UE_list;
|
||||
//RA_TEMPLATE *RA_template;
|
||||
unsigned char harq_pid;
|
||||
void *DLSCH_dci=NULL;
|
||||
DCI_PDU *DCI_pdu;
|
||||
int i;
|
||||
int size_bits,size_bytes;
|
||||
int CC_id;
|
||||
eNB_MAC_INST *eNB =RC.mac[module_idP];
|
||||
UE_list_t *UE_list = &eNB->UE_list;
|
||||
LTE_eNB_UE_stats *eNB_UE_stats = NULL;
|
||||
|
||||
int N_RBG;
|
||||
int N_RB_DL;
|
||||
COMMON_channels_t *cc;
|
||||
|
||||
start_meas(&eNB->fill_DLSCH_dci);
|
||||
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_FILL_DLSCH_DCI,VCD_FUNCTION_IN);
|
||||
|
||||
@@ -1543,8 +1542,10 @@ fill_DLSCH_dci(
|
||||
if (mbsfn_flagP[CC_id]>0)
|
||||
continue;
|
||||
|
||||
DCI_pdu = &eNB->common_channels[CC_id].DCI_pdu;
|
||||
|
||||
cc = &eNB->common_channels[CC_id];
|
||||
DCI_pdu = &cc->DCI_pdu;
|
||||
N_RBG = to_rbg(cc->mib->message.dl_Bandwidth);
|
||||
N_RB_DL = to_prb(cc->mib->message.dl_Bandwidth);
|
||||
|
||||
// UE specific DCIs
|
||||
for (UE_id=UE_list->head; UE_id>=0; UE_id=UE_list->next[UE_id]) {
|
||||
@@ -1564,7 +1565,7 @@ fill_DLSCH_dci(
|
||||
|
||||
|
||||
/// Synchronizing rballoc with rballoc_sub
|
||||
for(i=0; i<RC.eNB[module_idP][CC_id]->frame_parms.N_RBG; i++) {
|
||||
for(i=0; i<N_RBG; i++) {
|
||||
rballoc_sub[i] = UE_list->UE_template[CC_id][UE_id].rballoc_subband[harq_pid][i];
|
||||
}
|
||||
|
||||
@@ -1578,38 +1579,38 @@ fill_DLSCH_dci(
|
||||
case 7:
|
||||
LOG_D(MAC,"[eNB %d] CC_id %d Adding UE %d spec DCI for %d PRBS \n",module_idP, CC_id, UE_id, nb_rb);
|
||||
|
||||
if (RC.eNB[module_idP][CC_id]->frame_parms.frame_type == TDD) {
|
||||
switch (RC.eNB[module_idP][CC_id]->frame_parms.N_RB_DL) {
|
||||
if (cc->tdd_Config != NULL) { //TDD
|
||||
switch (N_RB_DL) {
|
||||
case 6:
|
||||
((DCI1_1_5MHz_TDD_t*)DLSCH_dci)->rballoc = allocate_prbs_sub(nb_rb,rballoc_sub);
|
||||
((DCI1_1_5MHz_TDD_t*)DLSCH_dci)->rballoc = allocate_prbs_sub(nb_rb,N_RB_DL,N_RBG,rballoc_sub);
|
||||
((DCI1_1_5MHz_TDD_t*)DLSCH_dci)->rah = 0;
|
||||
size_bytes = sizeof(DCI1_1_5MHz_TDD_t);
|
||||
size_bits = sizeof_DCI1_1_5MHz_TDD_t;
|
||||
break;
|
||||
|
||||
case 25:
|
||||
((DCI1_5MHz_TDD_t*)DLSCH_dci)->rballoc = allocate_prbs_sub(nb_rb,rballoc_sub);
|
||||
((DCI1_5MHz_TDD_t*)DLSCH_dci)->rballoc = allocate_prbs_sub(nb_rb,N_RB_DL,N_RBG,rballoc_sub);
|
||||
((DCI1_5MHz_TDD_t*)DLSCH_dci)->rah = 0;
|
||||
size_bytes = sizeof(DCI1_5MHz_TDD_t);
|
||||
size_bits = sizeof_DCI1_5MHz_TDD_t;
|
||||
break;
|
||||
|
||||
case 50:
|
||||
((DCI1_10MHz_TDD_t*)DLSCH_dci)->rballoc = allocate_prbs_sub(nb_rb,rballoc_sub);
|
||||
((DCI1_10MHz_TDD_t*)DLSCH_dci)->rballoc = allocate_prbs_sub(nb_rb,N_RB_DL,N_RBG,rballoc_sub);
|
||||
((DCI1_10MHz_TDD_t*)DLSCH_dci)->rah = 0;
|
||||
size_bytes = sizeof(DCI1_10MHz_TDD_t);
|
||||
size_bits = sizeof_DCI1_10MHz_TDD_t;
|
||||
break;
|
||||
|
||||
case 100:
|
||||
((DCI1_20MHz_TDD_t*)DLSCH_dci)->rballoc = allocate_prbs_sub(nb_rb,rballoc_sub);
|
||||
((DCI1_20MHz_TDD_t*)DLSCH_dci)->rballoc = allocate_prbs_sub(nb_rb,N_RB_DL,N_RBG,rballoc_sub);
|
||||
((DCI1_20MHz_TDD_t*)DLSCH_dci)->rah = 0;
|
||||
size_bytes = sizeof(DCI1_20MHz_TDD_t);
|
||||
size_bits = sizeof_DCI1_20MHz_TDD_t;
|
||||
break;
|
||||
|
||||
default:
|
||||
((DCI1_5MHz_TDD_t*)DLSCH_dci)->rballoc = allocate_prbs_sub(nb_rb,rballoc_sub);
|
||||
((DCI1_5MHz_TDD_t*)DLSCH_dci)->rballoc = allocate_prbs_sub(nb_rb,N_RB_DL,N_RBG,rballoc_sub);
|
||||
((DCI1_5MHz_TDD_t*)DLSCH_dci)->rah = 0;
|
||||
size_bytes = sizeof(DCI1_5MHz_TDD_t);
|
||||
size_bits = sizeof_DCI1_5MHz_TDD_t;
|
||||
@@ -1618,37 +1619,37 @@ fill_DLSCH_dci(
|
||||
|
||||
|
||||
} else {
|
||||
switch(RC.eNB[module_idP][CC_id]->frame_parms.N_RB_DL) {
|
||||
switch (N_RB_DL) {
|
||||
case 6:
|
||||
((DCI1_1_5MHz_FDD_t*)DLSCH_dci)->rballoc = allocate_prbs_sub(nb_rb,rballoc_sub);
|
||||
((DCI1_1_5MHz_FDD_t*)DLSCH_dci)->rballoc = allocate_prbs_sub(nb_rb,N_RB_DL,N_RBG,rballoc_sub);
|
||||
((DCI1_1_5MHz_FDD_t*)DLSCH_dci)->rah = 0;
|
||||
size_bytes=sizeof(DCI1_1_5MHz_FDD_t);
|
||||
size_bits=sizeof_DCI1_1_5MHz_FDD_t;
|
||||
break;
|
||||
|
||||
case 25:
|
||||
((DCI1_5MHz_FDD_t*)DLSCH_dci)->rballoc = allocate_prbs_sub(nb_rb,rballoc_sub);
|
||||
((DCI1_5MHz_FDD_t*)DLSCH_dci)->rballoc = allocate_prbs_sub(nb_rb,N_RB_DL,N_RBG,rballoc_sub);
|
||||
((DCI1_5MHz_FDD_t*)DLSCH_dci)->rah = 0;
|
||||
size_bytes=sizeof(DCI1_5MHz_FDD_t);
|
||||
size_bits=sizeof_DCI1_5MHz_FDD_t;
|
||||
break;
|
||||
|
||||
case 50:
|
||||
((DCI1_10MHz_FDD_t*)DLSCH_dci)->rballoc = allocate_prbs_sub(nb_rb,rballoc_sub);
|
||||
((DCI1_10MHz_FDD_t*)DLSCH_dci)->rballoc = allocate_prbs_sub(nb_rb,N_RB_DL,N_RBG,rballoc_sub);
|
||||
((DCI1_10MHz_FDD_t*)DLSCH_dci)->rah = 0;
|
||||
size_bytes=sizeof(DCI1_10MHz_FDD_t);
|
||||
size_bits=sizeof_DCI1_10MHz_FDD_t;
|
||||
break;
|
||||
|
||||
case 100:
|
||||
((DCI1_20MHz_FDD_t*)DLSCH_dci)->rballoc = allocate_prbs_sub(nb_rb,rballoc_sub);
|
||||
((DCI1_20MHz_FDD_t*)DLSCH_dci)->rballoc = allocate_prbs_sub(nb_rb,N_RB_DL,N_RBG,rballoc_sub);
|
||||
((DCI1_20MHz_FDD_t*)DLSCH_dci)->rah = 0;
|
||||
size_bytes=sizeof(DCI1_20MHz_FDD_t);
|
||||
size_bits=sizeof_DCI1_20MHz_FDD_t;
|
||||
break;
|
||||
|
||||
default:
|
||||
((DCI1_5MHz_FDD_t*)DLSCH_dci)->rballoc = allocate_prbs_sub(nb_rb,rballoc_sub);
|
||||
((DCI1_5MHz_FDD_t*)DLSCH_dci)->rballoc = allocate_prbs_sub(nb_rb,N_RB_DL,N_RBG,rballoc_sub);
|
||||
((DCI1_5MHz_FDD_t*)DLSCH_dci)->rah = 0;
|
||||
size_bytes=sizeof(DCI1_5MHz_FDD_t);
|
||||
size_bits=sizeof_DCI1_5MHz_FDD_t;
|
||||
@@ -1674,38 +1675,38 @@ fill_DLSCH_dci(
|
||||
LOG_D(MAC,"[eNB %d] CC_id %d Adding Format 2A UE %d spec DCI for %d PRBS\n",
|
||||
module_idP, CC_id, UE_id, nb_rb);
|
||||
|
||||
if (RC.eNB[module_idP][CC_id]->frame_parms.frame_type == TDD) {
|
||||
switch (RC.eNB[module_idP][CC_id]->frame_parms.N_RB_DL) {
|
||||
if (cc[CC_id].tdd_Config != NULL) { //TDD
|
||||
switch (N_RB_DL) {
|
||||
case 6:
|
||||
((DCI2A_1_5MHz_2A_TDD_t*)DLSCH_dci)->rballoc = allocate_prbs_sub(nb_rb,rballoc_sub);
|
||||
((DCI2A_1_5MHz_2A_TDD_t*)DLSCH_dci)->rballoc = allocate_prbs_sub(nb_rb,N_RB_DL,N_RBG,rballoc_sub);
|
||||
((DCI2A_1_5MHz_2A_TDD_t*)DLSCH_dci)->rah = 0;
|
||||
size_bytes = sizeof(DCI2A_1_5MHz_2A_TDD_t);
|
||||
size_bits = sizeof_DCI2A_1_5MHz_2A_TDD_t;
|
||||
break;
|
||||
|
||||
case 25:
|
||||
((DCI2A_5MHz_2A_TDD_t*)DLSCH_dci)->rballoc = allocate_prbs_sub(nb_rb,rballoc_sub);
|
||||
((DCI2A_5MHz_2A_TDD_t*)DLSCH_dci)->rballoc = allocate_prbs_sub(nb_rb,N_RB_DL,N_RBG,rballoc_sub);
|
||||
((DCI2A_5MHz_2A_TDD_t*)DLSCH_dci)->rah = 0;
|
||||
size_bytes = sizeof(DCI2A_5MHz_2A_TDD_t);
|
||||
size_bits = sizeof_DCI2A_5MHz_2A_TDD_t;
|
||||
break;
|
||||
|
||||
case 50:
|
||||
((DCI2A_10MHz_2A_TDD_t*)DLSCH_dci)->rballoc = allocate_prbs_sub(nb_rb,rballoc_sub);
|
||||
((DCI2A_10MHz_2A_TDD_t*)DLSCH_dci)->rballoc = allocate_prbs_sub(nb_rb,N_RB_DL,N_RBG,rballoc_sub);
|
||||
((DCI2A_10MHz_2A_TDD_t*)DLSCH_dci)->rah = 0;
|
||||
size_bytes = sizeof(DCI2A_10MHz_2A_TDD_t);
|
||||
size_bits = sizeof_DCI2A_10MHz_2A_TDD_t;
|
||||
break;
|
||||
|
||||
case 100:
|
||||
((DCI2A_20MHz_2A_TDD_t*)DLSCH_dci)->rballoc = allocate_prbs_sub(nb_rb,rballoc_sub);
|
||||
((DCI2A_20MHz_2A_TDD_t*)DLSCH_dci)->rballoc = allocate_prbs_sub(nb_rb,N_RB_DL,N_RBG,rballoc_sub);
|
||||
((DCI2A_20MHz_2A_TDD_t*)DLSCH_dci)->rah = 0;
|
||||
size_bytes = sizeof(DCI2A_20MHz_2A_TDD_t);
|
||||
size_bits = sizeof_DCI2A_20MHz_2A_TDD_t;
|
||||
break;
|
||||
|
||||
default:
|
||||
((DCI2A_5MHz_2A_TDD_t*)DLSCH_dci)->rballoc = allocate_prbs_sub(nb_rb,rballoc_sub);
|
||||
((DCI2A_5MHz_2A_TDD_t*)DLSCH_dci)->rballoc = allocate_prbs_sub(nb_rb,N_RB_DL,N_RBG,rballoc_sub);
|
||||
((DCI2A_5MHz_2A_TDD_t*)DLSCH_dci)->rah = 0;
|
||||
size_bytes = sizeof(DCI2A_5MHz_2A_TDD_t);
|
||||
size_bits = sizeof_DCI2A_5MHz_2A_TDD_t;
|
||||
@@ -1714,37 +1715,38 @@ fill_DLSCH_dci(
|
||||
|
||||
|
||||
} else {
|
||||
switch(RC.eNB[module_idP][CC_id]->frame_parms.N_RB_DL) {
|
||||
|
||||
switch (N_RB_DL) {
|
||||
case 6:
|
||||
((DCI2A_1_5MHz_2A_FDD_t*)DLSCH_dci)->rballoc = allocate_prbs_sub(nb_rb,rballoc_sub);
|
||||
((DCI2A_1_5MHz_2A_FDD_t*)DLSCH_dci)->rballoc = allocate_prbs_sub(nb_rb,N_RB_DL,N_RBG,rballoc_sub);
|
||||
((DCI2A_1_5MHz_2A_FDD_t*)DLSCH_dci)->rah = 0;
|
||||
size_bytes=sizeof(DCI2A_1_5MHz_2A_FDD_t);
|
||||
size_bits=sizeof_DCI2A_1_5MHz_2A_FDD_t;
|
||||
break;
|
||||
|
||||
case 25:
|
||||
((DCI2A_5MHz_2A_FDD_t*)DLSCH_dci)->rballoc = allocate_prbs_sub(nb_rb,rballoc_sub);
|
||||
((DCI2A_5MHz_2A_FDD_t*)DLSCH_dci)->rballoc = allocate_prbs_sub(nb_rb,N_RB_DL,N_RBG,rballoc_sub);
|
||||
((DCI2A_5MHz_2A_FDD_t*)DLSCH_dci)->rah = 0;
|
||||
size_bytes=sizeof(DCI2A_5MHz_2A_FDD_t);
|
||||
size_bits=sizeof_DCI2A_5MHz_2A_FDD_t;
|
||||
break;
|
||||
|
||||
case 50:
|
||||
((DCI2A_10MHz_2A_FDD_t*)DLSCH_dci)->rballoc = allocate_prbs_sub(nb_rb,rballoc_sub);
|
||||
((DCI2A_10MHz_2A_FDD_t*)DLSCH_dci)->rballoc = allocate_prbs_sub(nb_rb,N_RB_DL,N_RBG,rballoc_sub);
|
||||
((DCI2A_10MHz_2A_FDD_t*)DLSCH_dci)->rah = 0;
|
||||
size_bytes=sizeof(DCI2A_10MHz_2A_FDD_t);
|
||||
size_bits=sizeof_DCI2A_10MHz_2A_FDD_t;
|
||||
break;
|
||||
|
||||
case 100:
|
||||
((DCI2A_20MHz_2A_FDD_t*)DLSCH_dci)->rballoc = allocate_prbs_sub(nb_rb,rballoc_sub);
|
||||
((DCI2A_20MHz_2A_FDD_t*)DLSCH_dci)->rballoc = allocate_prbs_sub(nb_rb,N_RB_DL,N_RBG,rballoc_sub);
|
||||
((DCI2A_20MHz_2A_FDD_t*)DLSCH_dci)->rah = 0;
|
||||
size_bytes=sizeof(DCI2A_20MHz_2A_FDD_t);
|
||||
size_bits=sizeof_DCI2A_20MHz_2A_FDD_t;
|
||||
break;
|
||||
|
||||
default:
|
||||
((DCI2A_5MHz_2A_FDD_t*)DLSCH_dci)->rballoc = allocate_prbs_sub(nb_rb,rballoc_sub);
|
||||
((DCI2A_5MHz_2A_FDD_t*)DLSCH_dci)->rballoc = allocate_prbs_sub(nb_rb,N_RB_DL,N_RBG,rballoc_sub);
|
||||
((DCI2A_5MHz_2A_FDD_t*)DLSCH_dci)->rah = 0;
|
||||
size_bytes=sizeof(DCI2A_5MHz_2A_FDD_t);
|
||||
size_bits=sizeof_DCI2A_5MHz_2A_FDD_t;
|
||||
@@ -1767,7 +1769,7 @@ fill_DLSCH_dci(
|
||||
case 4:
|
||||
|
||||
// DCI format 2_2A
|
||||
((DCI2_5MHz_2A_TDD_t*)DLSCH_dci)->rballoc = allocate_prbs_sub(nb_rb,rballoc_sub);
|
||||
((DCI2_5MHz_2A_TDD_t*)DLSCH_dci)->rballoc = allocate_prbs_sub(nb_rb,N_RB_DL,N_RBG,rballoc_sub);
|
||||
((DCI2_5MHz_2A_TDD_t*)DLSCH_dci)->rah = 0;
|
||||
add_ue_spec_dci(DCI_pdu,
|
||||
DLSCH_dci,
|
||||
@@ -1780,7 +1782,7 @@ fill_DLSCH_dci(
|
||||
break;
|
||||
|
||||
case 5:
|
||||
((DCI1E_5MHz_2A_M10PRB_TDD_t*)DLSCH_dci)->rballoc = allocate_prbs_sub(nb_rb,rballoc_sub);
|
||||
((DCI1E_5MHz_2A_M10PRB_TDD_t*)DLSCH_dci)->rballoc = allocate_prbs_sub(nb_rb,N_RB_DL,N_RBG,rballoc_sub);
|
||||
((DCI1E_5MHz_2A_M10PRB_TDD_t*)DLSCH_dci)->rah = 0;
|
||||
|
||||
add_ue_spec_dci(DCI_pdu,
|
||||
@@ -1794,7 +1796,7 @@ fill_DLSCH_dci(
|
||||
break;
|
||||
|
||||
case 6:
|
||||
((DCI1E_5MHz_2A_M10PRB_TDD_t*)DLSCH_dci)->rballoc = allocate_prbs_sub(nb_rb,rballoc_sub);
|
||||
((DCI1E_5MHz_2A_M10PRB_TDD_t*)DLSCH_dci)->rballoc = allocate_prbs_sub(nb_rb,N_RB_DL,N_RBG,rballoc_sub);
|
||||
((DCI1E_5MHz_2A_M10PRB_TDD_t*)DLSCH_dci)->rah = 0;
|
||||
|
||||
add_ue_spec_dci(DCI_pdu,
|
||||
@@ -1862,11 +1864,12 @@ update_ul_dci(
|
||||
//------------------------------------------------------------------------------
|
||||
{
|
||||
|
||||
DCI_PDU *DCI_pdu = &RC.mac[module_idP]->common_channels[CC_id].DCI_pdu;
|
||||
COMMON_channels_t *cc = &RC.mac[module_idP]->common_channels[CC_id];
|
||||
DCI_PDU *DCI_pdu = &cc->DCI_pdu;
|
||||
int i;
|
||||
DCI0_5MHz_TDD_1_6_t *ULSCH_dci = NULL;;
|
||||
|
||||
if (mac_xface->frame_parms->frame_type == TDD) {
|
||||
if (cc->tdd_Config != NULL) { // TDD
|
||||
for (i=0; i<DCI_pdu->Num_common_dci+DCI_pdu->Num_ue_spec_dci; i++) {
|
||||
ULSCH_dci = (DCI0_5MHz_TDD_1_6_t *)DCI_pdu->dci_alloc[i].dci_pdu;
|
||||
|
||||
@@ -1883,14 +1886,13 @@ update_ul_dci(
|
||||
//------------------------------------------------------------------------------
|
||||
void set_ue_dai(
|
||||
sub_frame_t subframeP,
|
||||
uint8_t tdd_config,
|
||||
int UE_id,
|
||||
uint8_t CC_id,
|
||||
UE_list_t* UE_list
|
||||
uint8_t tdd_config,
|
||||
UE_list_t* UE_list
|
||||
)
|
||||
//------------------------------------------------------------------------------
|
||||
{
|
||||
|
||||
switch (tdd_config) {
|
||||
case 0:
|
||||
if ((subframeP==0)||(subframeP==1)||(subframeP==3)||(subframeP==5)||(subframeP==6)||(subframeP==8)) {
|
||||
|
||||
@@ -96,26 +96,28 @@ int schedule_MBMS(module_id_t module_idP, uint8_t CC_id, frame_t frameP, sub_fra
|
||||
uint16_t sdu_lengths[11], sdu_length_total=0;
|
||||
unsigned char mch_buffer[MAX_DLSCH_PAYLOAD_BYTES]; // check the max value, this is for dlsch only
|
||||
|
||||
RC.mac[module_idP]->common_channels[CC_id].MCH_pdu.Pdu_size=0;
|
||||
COMMON_channels_t *cc = &RC.mac[module_idP]->common_channels[CC_id];
|
||||
|
||||
cc->MCH_pdu.Pdu_size=0;
|
||||
|
||||
for (i=0;
|
||||
i< RC.mac[module_idP]->common_channels[CC_id].num_active_mbsfn_area;
|
||||
i< cc->num_active_mbsfn_area;
|
||||
i++ ) {
|
||||
// assume, that there is always a mapping
|
||||
if ((j=get_mbsfn_sf_alloction(module_idP,CC_id,i)) == -1) {
|
||||
return 0;
|
||||
}
|
||||
|
||||
mbsfn_period = 1<<(RC.mac[module_idP]->common_channels[CC_id].mbsfn_SubframeConfig[j]->radioframeAllocationPeriod);
|
||||
mcch_period = 32<<(RC.mac[module_idP]->common_channels[CC_id].mbsfn_AreaInfo[i]->mcch_Config_r9.mcch_RepetitionPeriod_r9);
|
||||
mbsfn_period = 1<<(cc->mbsfn_SubframeConfig[j]->radioframeAllocationPeriod);
|
||||
mcch_period = 32<<(cc->mbsfn_AreaInfo[i]->mcch_Config_r9.mcch_RepetitionPeriod_r9);
|
||||
msi_pos=0;
|
||||
ii=0;
|
||||
LOG_D(MAC,"[eNB %d] CC_id %d Frame %d subframeP %d : Checking MBSFN Sync Area %d/%d with SF allocation %d/%d for MCCH and MTCH (mbsfn period %d, mcch period %d)\n",
|
||||
module_idP, CC_id, frameP, subframeP,i,RC.mac[module_idP]->common_channels[CC_id].num_active_mbsfn_area,
|
||||
j,RC.mac[module_idP]->common_channels[CC_id].num_sf_allocation_pattern,mbsfn_period,mcch_period);
|
||||
module_idP, CC_id, frameP, subframeP,i,cc->num_active_mbsfn_area,
|
||||
j,cc->num_sf_allocation_pattern,mbsfn_period,mcch_period);
|
||||
|
||||
|
||||
switch (RC.mac[module_idP]->common_channels[CC_id].mbsfn_AreaInfo[i]->mcch_Config_r9.signallingMCS_r9) {
|
||||
switch (cc->mbsfn_AreaInfo[i]->mcch_Config_r9.signallingMCS_r9) {
|
||||
case 0:
|
||||
mcch_mcs = 2;
|
||||
break;
|
||||
@@ -134,32 +136,32 @@ int schedule_MBMS(module_id_t module_idP, uint8_t CC_id, frame_t frameP, sub_fra
|
||||
}
|
||||
|
||||
// 1st: Check the MBSFN subframes from SIB2 info (SF allocation pattern i, max 8 non-overlapping patterns exist)
|
||||
if (frameP % mbsfn_period == RC.mac[module_idP]->common_channels[CC_id].mbsfn_SubframeConfig[j]->radioframeAllocationOffset) { // MBSFN frameP
|
||||
if (RC.mac[module_idP]->common_channels[CC_id].mbsfn_SubframeConfig[j]->subframeAllocation.present == MBSFN_SubframeConfig__subframeAllocation_PR_oneFrame) { // one-frameP format
|
||||
if (frameP % mbsfn_period == cc->mbsfn_SubframeConfig[j]->radioframeAllocationOffset) { // MBSFN frameP
|
||||
if (cc->mbsfn_SubframeConfig[j]->subframeAllocation.present == MBSFN_SubframeConfig__subframeAllocation_PR_oneFrame) { // one-frameP format
|
||||
|
||||
// Find the first subframeP in this MCH to transmit MSI
|
||||
if (frameP % mch_scheduling_period == RC.mac[module_idP]->common_channels[CC_id].mbsfn_SubframeConfig[j]->radioframeAllocationOffset ) {
|
||||
if (frameP % mch_scheduling_period == cc->mbsfn_SubframeConfig[j]->radioframeAllocationOffset ) {
|
||||
while (ii == 0) {
|
||||
ii = RC.mac[module_idP]->common_channels[CC_id].mbsfn_SubframeConfig[j]->subframeAllocation.choice.oneFrame.buf[0] & (0x80>>msi_pos);
|
||||
ii = cc->mbsfn_SubframeConfig[j]->subframeAllocation.choice.oneFrame.buf[0] & (0x80>>msi_pos);
|
||||
msi_pos++;
|
||||
}
|
||||
|
||||
LOG_D(MAC,"[eNB %d] CC_id %d Frame %d subframeP %d : sync area %d sf allocation pattern %d sf alloc %x msi pos is %d \n",
|
||||
module_idP, CC_id, frameP, subframeP,i,j,
|
||||
RC.mac[module_idP]->common_channels[CC_id].mbsfn_SubframeConfig[j]->subframeAllocation.choice.oneFrame.buf[0], msi_pos);
|
||||
cc->mbsfn_SubframeConfig[j]->subframeAllocation.choice.oneFrame.buf[0], msi_pos);
|
||||
}
|
||||
|
||||
// Check if the subframeP is for MSI, MCCH or MTCHs and Set the correspoding flag to 1
|
||||
switch (subframeP) {
|
||||
case 1:
|
||||
if (mac_xface->frame_parms->frame_type == FDD) {
|
||||
if ((RC.mac[module_idP]->common_channels[CC_id].mbsfn_SubframeConfig[j]->subframeAllocation.choice.oneFrame.buf[0] & MBSFN_FDD_SF1) == MBSFN_FDD_SF1) {
|
||||
if (cc->tdd_Config == NULL) {
|
||||
if ((cc->mbsfn_SubframeConfig[j]->subframeAllocation.choice.oneFrame.buf[0] & MBSFN_FDD_SF1) == MBSFN_FDD_SF1) {
|
||||
if (msi_pos == 1) {
|
||||
msi_flag = 1;
|
||||
}
|
||||
|
||||
if ( (frameP % mcch_period == RC.mac[module_idP]->common_channels[CC_id].mbsfn_AreaInfo[i]->mcch_Config_r9.mcch_Offset_r9) &&
|
||||
((RC.mac[module_idP]->common_channels[CC_id].mbsfn_AreaInfo[i]->mcch_Config_r9.sf_AllocInfo_r9.buf[0] & MBSFN_FDD_SF1) == MBSFN_FDD_SF1) ) {
|
||||
if ( (frameP % mcch_period == cc->mbsfn_AreaInfo[i]->mcch_Config_r9.mcch_Offset_r9) &&
|
||||
((cc->mbsfn_AreaInfo[i]->mcch_Config_r9.sf_AllocInfo_r9.buf[0] & MBSFN_FDD_SF1) == MBSFN_FDD_SF1) ) {
|
||||
mcch_flag = 1;
|
||||
}
|
||||
|
||||
@@ -170,14 +172,14 @@ int schedule_MBMS(module_id_t module_idP, uint8_t CC_id, frame_t frameP, sub_fra
|
||||
break;
|
||||
|
||||
case 2:
|
||||
if (mac_xface->frame_parms->frame_type == FDD) {
|
||||
if ((RC.mac[module_idP]->common_channels[CC_id].mbsfn_SubframeConfig[j]->subframeAllocation.choice.oneFrame.buf[0] & MBSFN_FDD_SF2) == MBSFN_FDD_SF2) {
|
||||
if (cc->tdd_Config == NULL) {
|
||||
if ((cc->mbsfn_SubframeConfig[j]->subframeAllocation.choice.oneFrame.buf[0] & MBSFN_FDD_SF2) == MBSFN_FDD_SF2) {
|
||||
if (msi_pos == 2) {
|
||||
msi_flag = 1;
|
||||
}
|
||||
|
||||
if ( (frameP % mcch_period == RC.mac[module_idP]->common_channels[CC_id].mbsfn_AreaInfo[i]->mcch_Config_r9.mcch_Offset_r9) &&
|
||||
((RC.mac[module_idP]->common_channels[CC_id].mbsfn_AreaInfo[i]->mcch_Config_r9.sf_AllocInfo_r9.buf[0] & MBSFN_FDD_SF2) == MBSFN_FDD_SF2) ) {
|
||||
if ( (frameP % mcch_period == cc->mbsfn_AreaInfo[i]->mcch_Config_r9.mcch_Offset_r9) &&
|
||||
((cc->mbsfn_AreaInfo[i]->mcch_Config_r9.sf_AllocInfo_r9.buf[0] & MBSFN_FDD_SF2) == MBSFN_FDD_SF2) ) {
|
||||
mcch_flag = 1;
|
||||
}
|
||||
|
||||
@@ -188,27 +190,27 @@ int schedule_MBMS(module_id_t module_idP, uint8_t CC_id, frame_t frameP, sub_fra
|
||||
break;
|
||||
|
||||
case 3:
|
||||
if (mac_xface->frame_parms->frame_type == TDD) { // TDD
|
||||
if ((RC.mac[module_idP]->common_channels[CC_id].mbsfn_SubframeConfig[j]->subframeAllocation.choice.oneFrame.buf[0] & MBSFN_TDD_SF3) == MBSFN_TDD_SF3) {
|
||||
if (cc->tdd_Config != NULL) { // TDD
|
||||
if ((cc->mbsfn_SubframeConfig[j]->subframeAllocation.choice.oneFrame.buf[0] & MBSFN_TDD_SF3) == MBSFN_TDD_SF3) {
|
||||
if (msi_pos == 1) {
|
||||
msi_flag = 1;
|
||||
}
|
||||
|
||||
if ( (frameP % mcch_period == RC.mac[module_idP]->common_channels[CC_id].mbsfn_AreaInfo[i]->mcch_Config_r9.mcch_Offset_r9) &&
|
||||
((RC.mac[module_idP]->common_channels[CC_id].mbsfn_AreaInfo[i]->mcch_Config_r9.sf_AllocInfo_r9.buf[0] & MBSFN_TDD_SF3) == MBSFN_TDD_SF3) ) {
|
||||
if ( (frameP % mcch_period == cc->mbsfn_AreaInfo[i]->mcch_Config_r9.mcch_Offset_r9) &&
|
||||
((cc->mbsfn_AreaInfo[i]->mcch_Config_r9.sf_AllocInfo_r9.buf[0] & MBSFN_TDD_SF3) == MBSFN_TDD_SF3) ) {
|
||||
mcch_flag = 1;
|
||||
}
|
||||
|
||||
mtch_flag = 1;
|
||||
}
|
||||
} else { // FDD
|
||||
if ((RC.mac[module_idP]->common_channels[CC_id].mbsfn_SubframeConfig[j]->subframeAllocation.choice.oneFrame.buf[0] & MBSFN_FDD_SF3) == MBSFN_FDD_SF3) {
|
||||
if ((cc->mbsfn_SubframeConfig[j]->subframeAllocation.choice.oneFrame.buf[0] & MBSFN_FDD_SF3) == MBSFN_FDD_SF3) {
|
||||
if (msi_pos == 3) {
|
||||
msi_flag = 1;
|
||||
}
|
||||
|
||||
if ( (frameP % mcch_period == RC.mac[module_idP]->common_channels[CC_id].mbsfn_AreaInfo[i]->mcch_Config_r9.mcch_Offset_r9) &&
|
||||
((RC.mac[module_idP]->common_channels[CC_id].mbsfn_AreaInfo[i]->mcch_Config_r9.sf_AllocInfo_r9.buf[0] & MBSFN_FDD_SF3) == MBSFN_FDD_SF3) ) {
|
||||
if ( (frameP % mcch_period == cc->mbsfn_AreaInfo[i]->mcch_Config_r9.mcch_Offset_r9) &&
|
||||
((cc->mbsfn_AreaInfo[i]->mcch_Config_r9.sf_AllocInfo_r9.buf[0] & MBSFN_FDD_SF3) == MBSFN_FDD_SF3) ) {
|
||||
mcch_flag = 1;
|
||||
}
|
||||
|
||||
@@ -219,14 +221,14 @@ int schedule_MBMS(module_id_t module_idP, uint8_t CC_id, frame_t frameP, sub_fra
|
||||
break;
|
||||
|
||||
case 4:
|
||||
if (mac_xface->frame_parms->frame_type == TDD) {
|
||||
if ((RC.mac[module_idP]->common_channels[CC_id].mbsfn_SubframeConfig[j]->subframeAllocation.choice.oneFrame.buf[0] & MBSFN_TDD_SF4) == MBSFN_TDD_SF4) {
|
||||
if (cc->tdd_Config != NULL) {
|
||||
if ((cc->mbsfn_SubframeConfig[j]->subframeAllocation.choice.oneFrame.buf[0] & MBSFN_TDD_SF4) == MBSFN_TDD_SF4) {
|
||||
if (msi_pos == 2) {
|
||||
msi_flag = 1;
|
||||
}
|
||||
|
||||
if ( (frameP % mcch_period == RC.mac[module_idP]->common_channels[CC_id].mbsfn_AreaInfo[i]->mcch_Config_r9.mcch_Offset_r9) &&
|
||||
((RC.mac[module_idP]->common_channels[CC_id].mbsfn_AreaInfo[i]->mcch_Config_r9.sf_AllocInfo_r9.buf[0] & MBSFN_TDD_SF4) == MBSFN_TDD_SF4) ) {
|
||||
if ( (frameP % mcch_period == cc->mbsfn_AreaInfo[i]->mcch_Config_r9.mcch_Offset_r9) &&
|
||||
((cc->mbsfn_AreaInfo[i]->mcch_Config_r9.sf_AllocInfo_r9.buf[0] & MBSFN_TDD_SF4) == MBSFN_TDD_SF4) ) {
|
||||
mcch_flag = 1;
|
||||
}
|
||||
|
||||
@@ -237,14 +239,14 @@ int schedule_MBMS(module_id_t module_idP, uint8_t CC_id, frame_t frameP, sub_fra
|
||||
break;
|
||||
|
||||
case 6:
|
||||
if (mac_xface->frame_parms->frame_type == FDD) {
|
||||
if ((RC.mac[module_idP]->common_channels[CC_id].mbsfn_SubframeConfig[j]->subframeAllocation.choice.oneFrame.buf[0] & MBSFN_FDD_SF6) == MBSFN_FDD_SF6) {
|
||||
if (cc->tdd_Config == NULL) {
|
||||
if ((cc->mbsfn_SubframeConfig[j]->subframeAllocation.choice.oneFrame.buf[0] & MBSFN_FDD_SF6) == MBSFN_FDD_SF6) {
|
||||
if (msi_pos == 4) {
|
||||
msi_flag = 1;
|
||||
}
|
||||
|
||||
if ( (frameP % mcch_period == RC.mac[module_idP]->common_channels[CC_id].mbsfn_AreaInfo[i]->mcch_Config_r9.mcch_Offset_r9) &&
|
||||
((RC.mac[module_idP]->common_channels[CC_id].mbsfn_AreaInfo[i]->mcch_Config_r9.sf_AllocInfo_r9.buf[0] & MBSFN_FDD_SF6) == MBSFN_FDD_SF6) ) {
|
||||
if ( (frameP % mcch_period == cc->mbsfn_AreaInfo[i]->mcch_Config_r9.mcch_Offset_r9) &&
|
||||
((cc->mbsfn_AreaInfo[i]->mcch_Config_r9.sf_AllocInfo_r9.buf[0] & MBSFN_FDD_SF6) == MBSFN_FDD_SF6) ) {
|
||||
mcch_flag = 1;
|
||||
}
|
||||
|
||||
@@ -255,27 +257,27 @@ int schedule_MBMS(module_id_t module_idP, uint8_t CC_id, frame_t frameP, sub_fra
|
||||
break;
|
||||
|
||||
case 7:
|
||||
if (mac_xface->frame_parms->frame_type == TDD) { // TDD
|
||||
if ((RC.mac[module_idP]->common_channels[CC_id].mbsfn_SubframeConfig[j]->subframeAllocation.choice.oneFrame.buf[0] & MBSFN_TDD_SF7) == MBSFN_TDD_SF7) {
|
||||
if (cc->tdd_Config != NULL) { // TDD
|
||||
if ((cc->mbsfn_SubframeConfig[j]->subframeAllocation.choice.oneFrame.buf[0] & MBSFN_TDD_SF7) == MBSFN_TDD_SF7) {
|
||||
if (msi_pos == 3) {
|
||||
msi_flag = 1;
|
||||
}
|
||||
|
||||
if ( (frameP % mcch_period == RC.mac[module_idP]->common_channels[CC_id].mbsfn_AreaInfo[i]->mcch_Config_r9.mcch_Offset_r9) &&
|
||||
((RC.mac[module_idP]->common_channels[CC_id].mbsfn_AreaInfo[i]->mcch_Config_r9.sf_AllocInfo_r9.buf[0] & MBSFN_TDD_SF7) == MBSFN_TDD_SF7) ) {
|
||||
if ( (frameP % mcch_period == cc->mbsfn_AreaInfo[i]->mcch_Config_r9.mcch_Offset_r9) &&
|
||||
((cc->mbsfn_AreaInfo[i]->mcch_Config_r9.sf_AllocInfo_r9.buf[0] & MBSFN_TDD_SF7) == MBSFN_TDD_SF7) ) {
|
||||
mcch_flag = 1;
|
||||
}
|
||||
|
||||
mtch_flag = 1;
|
||||
}
|
||||
} else { // FDD
|
||||
if ((RC.mac[module_idP]->common_channels[CC_id].mbsfn_SubframeConfig[j]->subframeAllocation.choice.oneFrame.buf[0] & MBSFN_FDD_SF7) == MBSFN_FDD_SF7) {
|
||||
if ((cc->mbsfn_SubframeConfig[j]->subframeAllocation.choice.oneFrame.buf[0] & MBSFN_FDD_SF7) == MBSFN_FDD_SF7) {
|
||||
if (msi_pos == 5) {
|
||||
msi_flag = 1;
|
||||
}
|
||||
|
||||
if ( (frameP % mcch_period == RC.mac[module_idP]->common_channels[CC_id].mbsfn_AreaInfo[i]->mcch_Config_r9.mcch_Offset_r9) &&
|
||||
((RC.mac[module_idP]->common_channels[CC_id].mbsfn_AreaInfo[i]->mcch_Config_r9.sf_AllocInfo_r9.buf[0] & MBSFN_FDD_SF7) == MBSFN_FDD_SF7) ) {
|
||||
if ( (frameP % mcch_period == cc->mbsfn_AreaInfo[i]->mcch_Config_r9.mcch_Offset_r9) &&
|
||||
((cc->mbsfn_AreaInfo[i]->mcch_Config_r9.sf_AllocInfo_r9.buf[0] & MBSFN_FDD_SF7) == MBSFN_FDD_SF7) ) {
|
||||
mcch_flag = 1;
|
||||
}
|
||||
|
||||
@@ -286,27 +288,27 @@ int schedule_MBMS(module_id_t module_idP, uint8_t CC_id, frame_t frameP, sub_fra
|
||||
break;
|
||||
|
||||
case 8:
|
||||
if (mac_xface->frame_parms->frame_type == TDD) { //TDD
|
||||
if ((RC.mac[module_idP]->common_channels[CC_id].mbsfn_SubframeConfig[j]->subframeAllocation.choice.oneFrame.buf[0] & MBSFN_TDD_SF8) == MBSFN_TDD_SF8) {
|
||||
if (cc->tdd_Config != NULL) { //TDD
|
||||
if ((cc->mbsfn_SubframeConfig[j]->subframeAllocation.choice.oneFrame.buf[0] & MBSFN_TDD_SF8) == MBSFN_TDD_SF8) {
|
||||
if (msi_pos == 4) {
|
||||
msi_flag = 1;
|
||||
}
|
||||
|
||||
if ( (frameP % mcch_period == RC.mac[module_idP]->common_channels[CC_id].mbsfn_AreaInfo[i]->mcch_Config_r9.mcch_Offset_r9) &&
|
||||
((RC.mac[module_idP]->common_channels[CC_id].mbsfn_AreaInfo[i]->mcch_Config_r9.sf_AllocInfo_r9.buf[0] & MBSFN_TDD_SF8) == MBSFN_TDD_SF8) ) {
|
||||
if ( (frameP % mcch_period == cc->mbsfn_AreaInfo[i]->mcch_Config_r9.mcch_Offset_r9) &&
|
||||
((cc->mbsfn_AreaInfo[i]->mcch_Config_r9.sf_AllocInfo_r9.buf[0] & MBSFN_TDD_SF8) == MBSFN_TDD_SF8) ) {
|
||||
mcch_flag = 1;
|
||||
}
|
||||
|
||||
mtch_flag = 1;
|
||||
}
|
||||
} else { // FDD
|
||||
if ((RC.mac[module_idP]->common_channels[CC_id].mbsfn_SubframeConfig[j]->subframeAllocation.choice.oneFrame.buf[0] & MBSFN_FDD_SF8) == MBSFN_FDD_SF8) {
|
||||
if ((cc->mbsfn_SubframeConfig[j]->subframeAllocation.choice.oneFrame.buf[0] & MBSFN_FDD_SF8) == MBSFN_FDD_SF8) {
|
||||
if (msi_pos == 6) {
|
||||
msi_flag = 1;
|
||||
}
|
||||
|
||||
if ( (frameP % mcch_period == RC.mac[module_idP]->common_channels[CC_id].mbsfn_AreaInfo[i]->mcch_Config_r9.mcch_Offset_r9) &&
|
||||
((RC.mac[module_idP]->common_channels[CC_id].mbsfn_AreaInfo[i]->mcch_Config_r9.sf_AllocInfo_r9.buf[0] & MBSFN_FDD_SF8) == MBSFN_FDD_SF8) ) {
|
||||
if ( (frameP % mcch_period == cc->mbsfn_AreaInfo[i]->mcch_Config_r9.mcch_Offset_r9) &&
|
||||
((cc->mbsfn_AreaInfo[i]->mcch_Config_r9.sf_AllocInfo_r9.buf[0] & MBSFN_FDD_SF8) == MBSFN_FDD_SF8) ) {
|
||||
mcch_flag = 1;
|
||||
}
|
||||
|
||||
@@ -317,14 +319,14 @@ int schedule_MBMS(module_id_t module_idP, uint8_t CC_id, frame_t frameP, sub_fra
|
||||
break;
|
||||
|
||||
case 9:
|
||||
if (mac_xface->frame_parms->frame_type == TDD) {
|
||||
if ((RC.mac[module_idP]->common_channels[CC_id].mbsfn_SubframeConfig[j]->subframeAllocation.choice.oneFrame.buf[0] & MBSFN_TDD_SF9) == MBSFN_TDD_SF9) {
|
||||
if (cc->tdd_Config != NULL) {
|
||||
if ((cc->mbsfn_SubframeConfig[j]->subframeAllocation.choice.oneFrame.buf[0] & MBSFN_TDD_SF9) == MBSFN_TDD_SF9) {
|
||||
if (msi_pos == 5) {
|
||||
msi_flag = 1;
|
||||
}
|
||||
|
||||
if ( (frameP % mcch_period == RC.mac[module_idP]->common_channels[CC_id].mbsfn_AreaInfo[i]->mcch_Config_r9.mcch_Offset_r9) &&
|
||||
((RC.mac[module_idP]->common_channels[CC_id].mbsfn_AreaInfo[i]->mcch_Config_r9.sf_AllocInfo_r9.buf[0] & MBSFN_TDD_SF9) == MBSFN_TDD_SF9) ) {
|
||||
if ( (frameP % mcch_period == cc->mbsfn_AreaInfo[i]->mcch_Config_r9.mcch_Offset_r9) &&
|
||||
((cc->mbsfn_AreaInfo[i]->mcch_Config_r9.sf_AllocInfo_r9.buf[0] & MBSFN_TDD_SF9) == MBSFN_TDD_SF9) ) {
|
||||
mcch_flag = 1;
|
||||
}
|
||||
|
||||
@@ -346,15 +348,15 @@ int schedule_MBMS(module_id_t module_idP, uint8_t CC_id, frame_t frameP, sub_fra
|
||||
}
|
||||
} // end of for loop
|
||||
|
||||
RC.mac[module_idP]->common_channels[CC_id].msi_active=0;
|
||||
RC.mac[module_idP]->common_channels[CC_id].mcch_active=0;
|
||||
RC.mac[module_idP]->common_channels[CC_id].mtch_active=0;
|
||||
cc->msi_active=0;
|
||||
cc->mcch_active=0;
|
||||
cc->mtch_active=0;
|
||||
|
||||
// Calculate the mcs
|
||||
if ((msi_flag==1) || (mcch_flag==1)) {
|
||||
RC.mac[module_idP]->common_channels[CC_id].MCH_pdu.mcs = mcch_mcs;
|
||||
cc->MCH_pdu.mcs = mcch_mcs;
|
||||
} else if (mtch_flag == 1) { // only MTCH in this subframeP
|
||||
RC.mac[module_idP]->common_channels[CC_id].MCH_pdu.mcs = RC.mac[module_idP]->common_channels[CC_id].pmch_Config[0]->dataMCS_r9;
|
||||
cc->MCH_pdu.mcs = cc->pmch_Config[0]->dataMCS_r9;
|
||||
}
|
||||
|
||||
|
||||
@@ -379,10 +381,10 @@ int schedule_MBMS(module_id_t module_idP, uint8_t CC_id, frame_t frameP, sub_fra
|
||||
msi_ptr+= sizeof(MSI_ELEMENT);
|
||||
|
||||
//Header for MTCHs
|
||||
num_mtch = RC.mac[module_idP]->common_channels[CC_id].mbms_SessionList[0]->list.count;
|
||||
num_mtch = cc->mbms_SessionList[0]->list.count;
|
||||
|
||||
for (k=0; k<num_mtch; k++) { // loop for all session in this MCH (MCH[0]) at this moment
|
||||
((MSI_ELEMENT *) msi_ptr)->lcid = RC.mac[module_idP]->common_channels[CC_id].mbms_SessionList[0]->list.array[k]->logicalChannelIdentity_r9;//mtch_lcid;
|
||||
((MSI_ELEMENT *) msi_ptr)->lcid = cc->mbms_SessionList[0]->list.array[k]->logicalChannelIdentity_r9;//mtch_lcid;
|
||||
((MSI_ELEMENT *) msi_ptr)->stop_sf_MSB = 0; // last subframeP of this mtch (only one mtch now)
|
||||
((MSI_ELEMENT *) msi_ptr)->stop_sf_LSB = 0xB;
|
||||
msi_ptr+=sizeof(MSI_ELEMENT);
|
||||
@@ -411,7 +413,7 @@ int schedule_MBMS(module_id_t module_idP, uint8_t CC_id, frame_t frameP, sub_fra
|
||||
sdu_length_total += sdu_lengths[num_sdus];
|
||||
LOG_I(MAC,"[eNB %d] CC_id %d Create %d bytes for MSI\n", module_idP, CC_id, sdu_lengths[num_sdus]);
|
||||
num_sdus++;
|
||||
RC.mac[module_idP]->common_channels[CC_id].msi_active=1;
|
||||
cc->msi_active=1;
|
||||
}
|
||||
|
||||
// there is MCCH
|
||||
@@ -423,7 +425,7 @@ int schedule_MBMS(module_id_t module_idP, uint8_t CC_id, frame_t frameP, sub_fra
|
||||
CC_id,
|
||||
frameP,
|
||||
MCCH,1,
|
||||
&RC.mac[module_idP]->common_channels[CC_id].MCCH_pdu.payload[0],
|
||||
&cc->MCCH_pdu.payload[0],
|
||||
1,// this is eNB
|
||||
module_idP, // index
|
||||
i); // this is the mbsfn sync area index
|
||||
@@ -434,7 +436,7 @@ int schedule_MBMS(module_id_t module_idP, uint8_t CC_id, frame_t frameP, sub_fra
|
||||
|
||||
header_len_mcch = 2;
|
||||
|
||||
if (mac_xface->frame_parms->frame_type == TDD) {
|
||||
if (cc->tdd_Config != NULL) {
|
||||
LOG_D(MAC,"[eNB %d] CC_id %d Frame %d subframeP %d: Scheduling MCCH->MCH (TDD) for MCCH message %d bytes (mcs %d )\n",
|
||||
module_idP, CC_id,
|
||||
frameP,subframeP,
|
||||
@@ -448,10 +450,10 @@ int schedule_MBMS(module_id_t module_idP, uint8_t CC_id, frame_t frameP, sub_fra
|
||||
mcch_mcs);
|
||||
}
|
||||
|
||||
RC.mac[module_idP]->common_channels[CC_id].mcch_active=1;
|
||||
cc->mcch_active=1;
|
||||
|
||||
memcpy((char *)&mch_buffer[sdu_length_total],
|
||||
&RC.mac[module_idP]->common_channels[CC_id].MCCH_pdu.payload[0],
|
||||
&cc->MCCH_pdu.payload[0],
|
||||
mcch_sdu_length);
|
||||
sdu_lcids[num_sdus] = MCCH_LCHANID;
|
||||
sdu_lengths[num_sdus] = mcch_sdu_length;
|
||||
@@ -466,7 +468,7 @@ int schedule_MBMS(module_id_t module_idP, uint8_t CC_id, frame_t frameP, sub_fra
|
||||
}
|
||||
}
|
||||
|
||||
TBS = mac_xface->get_TBS_DL(RC.mac[module_idP]->common_channels[CC_id].MCH_pdu.mcs, mac_xface->frame_parms->N_RB_DL);
|
||||
TBS = mac_xface->get_TBS_DL(cc->MCH_pdu.mcs, to_prb(cc->mib->message.dl_Bandwidth));
|
||||
#ifdef Rel10
|
||||
// do not let mcch and mtch multiplexing when relaying is active
|
||||
// for sync area 1, so not transmit data
|
||||
@@ -525,7 +527,7 @@ int schedule_MBMS(module_id_t module_idP, uint8_t CC_id, frame_t frameP, sub_fra
|
||||
(char*)&mch_buffer[sdu_length_total]);
|
||||
//sdu_lengths[num_sdus] = mac_rlc_data_req(module_idP,frameP, MBMS_FLAG_NO, MTCH+(MAX_NUM_RB*(NUMBER_OF_UE_MAX+1)), (char*)&mch_buffer[sdu_length_total]);
|
||||
LOG_I(MAC,"[eNB %d][MBMS USER-PLANE] CC_id %d Got %d bytes for MTCH %d\n",module_idP,CC_id,sdu_lengths[num_sdus],MTCH);
|
||||
RC.mac[module_idP]->common_channels[CC_id].mtch_active=1;
|
||||
cc->mtch_active=1;
|
||||
sdu_lcids[num_sdus] = MTCH;
|
||||
sdu_length_total += sdu_lengths[num_sdus];
|
||||
|
||||
@@ -589,7 +591,7 @@ int schedule_MBMS(module_id_t module_idP, uint8_t CC_id, frame_t frameP, sub_fra
|
||||
|
||||
// Generate the MAC Header for MCH
|
||||
// here we use the function for DLSCH because DLSCH & MCH have the same Header structure
|
||||
offset = generate_dlsch_header((unsigned char*)RC.mac[module_idP]->common_channels[CC_id].MCH_pdu.payload,
|
||||
offset = generate_dlsch_header((unsigned char*)cc->MCH_pdu.payload,
|
||||
num_sdus,
|
||||
sdu_lengths,
|
||||
sdu_lcids,
|
||||
@@ -599,28 +601,28 @@ int schedule_MBMS(module_id_t module_idP, uint8_t CC_id, frame_t frameP, sub_fra
|
||||
padding,
|
||||
post_padding);
|
||||
|
||||
RC.mac[module_idP]->common_channels[CC_id].MCH_pdu.Pdu_size=TBS;
|
||||
RC.mac[module_idP]->common_channels[CC_id].MCH_pdu.sync_area=i;
|
||||
RC.mac[module_idP]->common_channels[CC_id].MCH_pdu.msi_active= RC.mac[module_idP]->common_channels[CC_id].msi_active;
|
||||
RC.mac[module_idP]->common_channels[CC_id].MCH_pdu.mcch_active= RC.mac[module_idP]->common_channels[CC_id].mcch_active;
|
||||
RC.mac[module_idP]->common_channels[CC_id].MCH_pdu.mtch_active= RC.mac[module_idP]->common_channels[CC_id].mtch_active;
|
||||
LOG_D(MAC," MCS for this sf is %d (mcch active %d, mtch active %d)\n", RC.mac[module_idP]->common_channels[CC_id].MCH_pdu.mcs,
|
||||
RC.mac[module_idP]->common_channels[CC_id].MCH_pdu.mcch_active,RC.mac[module_idP]->common_channels[CC_id].MCH_pdu.mtch_active );
|
||||
cc->MCH_pdu.Pdu_size=TBS;
|
||||
cc->MCH_pdu.sync_area=i;
|
||||
cc->MCH_pdu.msi_active= cc->msi_active;
|
||||
cc->MCH_pdu.mcch_active= cc->mcch_active;
|
||||
cc->MCH_pdu.mtch_active= cc->mtch_active;
|
||||
LOG_D(MAC," MCS for this sf is %d (mcch active %d, mtch active %d)\n", cc->MCH_pdu.mcs,
|
||||
cc->MCH_pdu.mcch_active,cc->MCH_pdu.mtch_active );
|
||||
LOG_I(MAC,
|
||||
"[eNB %d][MBMS USER-PLANE ] CC_id %d Generate header : sdu_length_total %d, num_sdus %d, sdu_lengths[0] %d, sdu_lcids[0] %d => payload offset %d,padding %d,post_padding %d (mcs %d, TBS %d), header MTCH %d, header MCCH %d, header MSI %d\n",
|
||||
module_idP,CC_id,sdu_length_total,num_sdus,sdu_lengths[0],sdu_lcids[0],offset,padding,post_padding,RC.mac[module_idP]->common_channels[CC_id].MCH_pdu.mcs,TBS,
|
||||
module_idP,CC_id,sdu_length_total,num_sdus,sdu_lengths[0],sdu_lcids[0],offset,padding,post_padding,cc->MCH_pdu.mcs,TBS,
|
||||
header_len_mtch, header_len_mcch, header_len_msi);
|
||||
// copy SDU to mch_pdu after the MAC Header
|
||||
memcpy(&RC.mac[module_idP]->common_channels[CC_id].MCH_pdu.payload[offset],mch_buffer,sdu_length_total);
|
||||
memcpy(&cc->MCH_pdu.payload[offset],mch_buffer,sdu_length_total);
|
||||
|
||||
// filling remainder of MCH with random data if necessery
|
||||
for (j=0; j<(TBS-sdu_length_total-offset); j++) {
|
||||
RC.mac[module_idP]->common_channels[CC_id].MCH_pdu.payload[offset+sdu_length_total+j] = (char)(taus()&0xff);
|
||||
cc->MCH_pdu.payload[offset+sdu_length_total+j] = (char)(taus()&0xff);
|
||||
}
|
||||
|
||||
/* Tracing of PDU is done on UE side */
|
||||
if (opt_enabled ==1 ) {
|
||||
trace_pdu(1, (uint8_t *)RC.mac[module_idP]->common_channels[CC_id].MCH_pdu.payload,
|
||||
trace_pdu(1, (uint8_t *)cc->MCH_pdu.payload,
|
||||
TBS, module_idP, 6, 0xffff, // M_RNTI = 6 in wirehsark
|
||||
RC.mac[module_idP]->frame, RC.mac[module_idP]->subframe,0,0);
|
||||
LOG_D(OPT,"[eNB %d][MCH] CC_id %d Frame %d : MAC PDU with size %d\n",
|
||||
@@ -633,11 +635,11 @@ int schedule_MBMS(module_id_t module_idP, uint8_t CC_id, frame_t frameP, sub_fra
|
||||
printf(" \n");*/
|
||||
return 1;
|
||||
} else {
|
||||
RC.mac[module_idP]->common_channels[CC_id].MCH_pdu.Pdu_size=0;
|
||||
RC.mac[module_idP]->common_channels[CC_id].MCH_pdu.sync_area=0;
|
||||
RC.mac[module_idP]->common_channels[CC_id].MCH_pdu.msi_active=0;
|
||||
RC.mac[module_idP]->common_channels[CC_id].MCH_pdu.mcch_active=0;
|
||||
RC.mac[module_idP]->common_channels[CC_id].MCH_pdu.mtch_active=0;
|
||||
cc->MCH_pdu.Pdu_size=0;
|
||||
cc->MCH_pdu.sync_area=0;
|
||||
cc->MCH_pdu.msi_active=0;
|
||||
cc->MCH_pdu.mcch_active=0;
|
||||
cc->MCH_pdu.mtch_active=0;
|
||||
// for testing purpose, fill with random data
|
||||
//for (j=0;j<(TBS-sdu_length_total-offset);j++)
|
||||
// RC.mac[module_idP]->MCH_pdu.payload[offset+sdu_length_total+j] = (char)(taus()&0xff);
|
||||
|
||||
@@ -59,7 +59,19 @@
|
||||
#define ENABLE_MAC_PAYLOAD_DEBUG
|
||||
#define DEBUG_eNB_SCHEDULER 1
|
||||
|
||||
int to_prb(int dl_Bandwidth) {
|
||||
int prbmap[6] = {6,15,25,50,75,100};
|
||||
|
||||
AssertFatal(dl_Bandwidth < 6,"dl_Bandwidth is 0..5\n");
|
||||
return(prbmap[dl_Bandwidth]);
|
||||
}
|
||||
|
||||
int to_rbg(int dl_Bandwidth) {
|
||||
int rbgmap[6] = {6,8,13,17,19,25};
|
||||
|
||||
AssertFatal(dl_Bandwidth < 6,"dl_Bandwidth is 0..5\n");
|
||||
return(rbgmap[dl_Bandwidth]);
|
||||
}
|
||||
//------------------------------------------------------------------------------
|
||||
void init_ue_sched_info(void)
|
||||
//------------------------------------------------------------------------------
|
||||
@@ -715,14 +727,14 @@ uint8_t UE_is_to_be_scheduled(module_id_t module_idP,int CC_id,uint8_t UE_id)
|
||||
|
||||
|
||||
|
||||
uint32_t allocate_prbs(int UE_id,unsigned char nb_rb, uint32_t *rballoc)
|
||||
uint32_t allocate_prbs(int UE_id,unsigned char nb_rb, int N_RB_DL, uint32_t *rballoc)
|
||||
{
|
||||
|
||||
int i;
|
||||
uint32_t rballoc_dci=0;
|
||||
unsigned char nb_rb_alloc=0;
|
||||
|
||||
for (i=0; i<(mac_xface->frame_parms->N_RB_DL-2); i+=2) {
|
||||
for (i=0; i<(N_RB_DL-2); i+=2) {
|
||||
if (((*rballoc>>i)&3)==0) {
|
||||
*rballoc |= (3<<i);
|
||||
rballoc_dci |= (1<<((12-i)>>1));
|
||||
@@ -734,10 +746,10 @@ uint32_t allocate_prbs(int UE_id,unsigned char nb_rb, uint32_t *rballoc)
|
||||
}
|
||||
}
|
||||
|
||||
if ((mac_xface->frame_parms->N_RB_DL&1)==1) {
|
||||
if ((*rballoc>>(mac_xface->frame_parms->N_RB_DL-1)&1)==0) {
|
||||
*rballoc |= (1<<(mac_xface->frame_parms->N_RB_DL-1));
|
||||
rballoc_dci |= 1;//(1<<(mac_xface->frame_parms->N_RB_DL>>1));
|
||||
if ((N_RB_DL&1)==1) {
|
||||
if ((*rballoc>>(N_RB_DL-1)&1)==0) {
|
||||
*rballoc |= (1<<(N_RB_DL-1));
|
||||
rballoc_dci |= 1;
|
||||
}
|
||||
}
|
||||
|
||||
@@ -748,9 +760,10 @@ int get_bw_index(module_id_t module_id, uint8_t CC_id)
|
||||
{
|
||||
|
||||
int bw_index=0;
|
||||
LTE_DL_FRAME_PARMS* frame_parms = mac_xface->get_lte_frame_parms(module_id,CC_id);
|
||||
|
||||
int N_RB_DL = to_prb(RC.mac[module_id]->common_channels[CC_id].mib->message.dl_Bandwidth);
|
||||
|
||||
switch (frame_parms->N_RB_DL) {
|
||||
switch (N_RB_DL) {
|
||||
case 6: // 1.4 MHz
|
||||
bw_index=0;
|
||||
break;
|
||||
@@ -769,7 +782,7 @@ int get_bw_index(module_id_t module_id, uint8_t CC_id)
|
||||
|
||||
default:
|
||||
bw_index=1;
|
||||
LOG_W(MAC,"[eNB %d] N_DL_RB %d unknown for CC_id %d, setting bw_index to 1\n", module_id, CC_id);
|
||||
LOG_W(MAC,"[eNB %d] N_RB_DL %d unknown for CC_id %d, setting bw_index to 1\n", module_id, N_RB_DL,CC_id);
|
||||
break;
|
||||
}
|
||||
|
||||
@@ -780,9 +793,9 @@ int get_min_rb_unit(module_id_t module_id, uint8_t CC_id)
|
||||
{
|
||||
|
||||
int min_rb_unit=0;
|
||||
LTE_DL_FRAME_PARMS* frame_parms = mac_xface->get_lte_frame_parms(module_id,CC_id);
|
||||
int N_RB_DL = to_prb(RC.mac[module_id]->common_channels[CC_id].mib->message.dl_Bandwidth);
|
||||
|
||||
switch (frame_parms->N_RB_DL) {
|
||||
switch (N_RB_DL) {
|
||||
case 6: // 1.4 MHz
|
||||
min_rb_unit=1;
|
||||
break;
|
||||
@@ -802,14 +815,14 @@ int get_min_rb_unit(module_id_t module_id, uint8_t CC_id)
|
||||
default:
|
||||
min_rb_unit=2;
|
||||
LOG_W(MAC,"[eNB %d] N_DL_RB %d unknown for CC_id %d, setting min_rb_unit to 2\n",
|
||||
module_id, frame_parms->N_RB_DL, CC_id);
|
||||
module_id, N_RB_DL, CC_id);
|
||||
break;
|
||||
}
|
||||
|
||||
return min_rb_unit;
|
||||
}
|
||||
|
||||
uint32_t allocate_prbs_sub(int nb_rb, uint8_t *rballoc)
|
||||
uint32_t allocate_prbs_sub(int nb_rb, int N_RB_DL, int N_RBG, uint8_t *rballoc)
|
||||
{
|
||||
|
||||
int check=0;//check1=0,check2=0;
|
||||
@@ -817,20 +830,20 @@ uint32_t allocate_prbs_sub(int nb_rb, uint8_t *rballoc)
|
||||
//uint8_t number_of_subbands=13;
|
||||
|
||||
LOG_T(MAC,"*****Check1RBALLOC****: %d%d%d%d (nb_rb %d,N_RBG %d)\n",
|
||||
rballoc[3],rballoc[2],rballoc[1],rballoc[0],nb_rb,mac_xface->frame_parms->N_RBG);
|
||||
rballoc[3],rballoc[2],rballoc[1],rballoc[0],nb_rb,N_RBG);
|
||||
|
||||
while((nb_rb >0) && (check < mac_xface->frame_parms->N_RBG)) {
|
||||
while((nb_rb >0) && (check < N_RBG)) {
|
||||
//printf("rballoc[%d] %d\n",check,rballoc[check]);
|
||||
if(rballoc[check] == 1) {
|
||||
rballoc_dci |= (1<<((mac_xface->frame_parms->N_RBG-1)-check));
|
||||
rballoc_dci |= (1<<((N_RBG-1)-check));
|
||||
|
||||
switch (mac_xface->frame_parms->N_RB_DL) {
|
||||
switch (N_RB_DL) {
|
||||
case 6:
|
||||
nb_rb--;
|
||||
break;
|
||||
|
||||
case 25:
|
||||
if ((check == mac_xface->frame_parms->N_RBG-1)) {
|
||||
if ((check == N_RBG-1)) {
|
||||
nb_rb--;
|
||||
} else {
|
||||
nb_rb-=2;
|
||||
@@ -839,7 +852,7 @@ uint32_t allocate_prbs_sub(int nb_rb, uint8_t *rballoc)
|
||||
break;
|
||||
|
||||
case 50:
|
||||
if ((check == mac_xface->frame_parms->N_RBG-1)) {
|
||||
if ((check == N_RBG-1)) {
|
||||
nb_rb-=2;
|
||||
} else {
|
||||
nb_rb-=3;
|
||||
@@ -865,12 +878,12 @@ uint32_t allocate_prbs_sub(int nb_rb, uint8_t *rballoc)
|
||||
}
|
||||
|
||||
|
||||
int get_nb_subband(void)
|
||||
int get_nb_subband(int N_RB_DL)
|
||||
{
|
||||
|
||||
int nb_sb=0;
|
||||
|
||||
switch (mac_xface->frame_parms->N_RB_DL) {
|
||||
switch (N_RB_DL) {
|
||||
case 6:
|
||||
nb_sb=0;
|
||||
break;
|
||||
|
||||
@@ -698,40 +698,40 @@ void schedule_ulsch_rnti(module_id_t module_idP,
|
||||
uint16_t *first_rb)
|
||||
{
|
||||
|
||||
int UE_id;
|
||||
uint8_t aggregation = 2;
|
||||
rnti_t rnti = -1;
|
||||
uint8_t round = 0;
|
||||
uint8_t harq_pid = 0;
|
||||
int UE_id;
|
||||
uint8_t aggregation = 2;
|
||||
rnti_t rnti = -1;
|
||||
uint8_t round = 0;
|
||||
uint8_t harq_pid = 0;
|
||||
void *ULSCH_dci = NULL;
|
||||
LTE_eNB_UE_stats *eNB_UE_stats = NULL;
|
||||
DCI_PDU *DCI_pdu;
|
||||
uint8_t status = 0;
|
||||
uint8_t rb_table_index = -1;
|
||||
uint16_t TBS = 0;
|
||||
// int32_t buffer_occupancy=0;
|
||||
uint32_t cqi_req,cshift,ndi,mcs=0,rballoc,tpc;
|
||||
int32_t normalized_rx_power, target_rx_power=-90;
|
||||
static int32_t tpc_accumulated=0;
|
||||
|
||||
int n,CC_id = 0;
|
||||
eNB_MAC_INST *eNB=RC.mac[module_idP];
|
||||
uint8_t status = 0;
|
||||
uint8_t rb_table_index = -1;
|
||||
uint16_t TBS = 0;
|
||||
uint32_t cqi_req,cshift,ndi,mcs=0,rballoc,tpc;
|
||||
int32_t normalized_rx_power;
|
||||
int32_t target_rx_power=-90;
|
||||
static int32_t tpc_accumulated=0;
|
||||
int n;
|
||||
int CC_id = 0;
|
||||
int drop_ue=0;
|
||||
int N_RB_UL;
|
||||
eNB_MAC_INST *eNB = RC.mac[module_idP];
|
||||
COMMON_channels_t *cc = eNB->common_channels;
|
||||
UE_list_t *UE_list=&eNB->UE_list;
|
||||
UE_TEMPLATE *UE_template;
|
||||
UE_sched_ctrl *UE_sched_ctrl;
|
||||
|
||||
// int rvidx_tab[4] = {0,2,3,1};
|
||||
LTE_DL_FRAME_PARMS *frame_parms;
|
||||
int drop_ue=0;
|
||||
|
||||
// LOG_I(MAC,"entering ulsch preprocesor\n");
|
||||
LOG_D(MAC,"entering ulsch preprocesor\n");
|
||||
|
||||
ulsch_scheduler_pre_processor(module_idP,
|
||||
frameP,
|
||||
subframeP,
|
||||
first_rb);
|
||||
|
||||
// LOG_I(MAC,"exiting ulsch preprocesor\n");
|
||||
LOG_D(MAC,"exiting ulsch preprocesor\n");
|
||||
|
||||
// loop over all active UEs
|
||||
for (UE_id=UE_list->head_ul; UE_id>=0; UE_id=UE_list->next_ul[UE_id]) {
|
||||
@@ -786,8 +786,8 @@ abort();
|
||||
// loop over all active UL CC_ids for this UE
|
||||
for (n=0; n<UE_list->numactiveULCCs[UE_id]; n++) {
|
||||
// This is the actual CC_id in the list
|
||||
CC_id = UE_list->ordered_ULCCids[n][UE_id];
|
||||
frame_parms = mac_xface->get_lte_frame_parms(module_idP,CC_id);
|
||||
CC_id = UE_list->ordered_ULCCids[n][UE_id];
|
||||
N_RB_UL = to_prb(cc[CC_id].ul_Bandwidth);
|
||||
eNB_UE_stats = mac_xface->get_eNB_UE_stats(module_idP,CC_id,rnti);
|
||||
|
||||
aggregation=get_aggregation(get_bw_index(module_idP,CC_id),
|
||||
@@ -891,7 +891,7 @@ abort();
|
||||
UE_list->eNB_UE_stats[CC_id][UE_id].ulsch_mcs2=mcs;
|
||||
// buffer_occupancy = UE_template->ul_total_buffer;
|
||||
|
||||
while (((rb_table[rb_table_index]>(frame_parms->N_RB_UL-1-first_rb[CC_id])) ||
|
||||
while (((rb_table[rb_table_index]>(N_RB_UL-1-first_rb[CC_id])) ||
|
||||
(rb_table[rb_table_index]>45)) &&
|
||||
(rb_table_index>0)) {
|
||||
rb_table_index--;
|
||||
@@ -901,7 +901,7 @@ abort();
|
||||
UE_list->eNB_UE_stats[CC_id][UE_id].total_rbs_used_rx+=rb_table[rb_table_index];
|
||||
UE_list->eNB_UE_stats[CC_id][UE_id].ulsch_TBS=TBS;
|
||||
// buffer_occupancy -= TBS;
|
||||
rballoc = mac_xface->computeRIV(frame_parms->N_RB_UL,
|
||||
rballoc = mac_xface->computeRIV(N_RB_UL,
|
||||
first_rb[CC_id],
|
||||
rb_table[rb_table_index]);
|
||||
|
||||
@@ -934,8 +934,8 @@ abort();
|
||||
// Cyclic shift for DM RS
|
||||
cshift = 0;// values from 0 to 7 can be used for mapping the cyclic shift (36.211 , Table 5.5.2.1.1-1)
|
||||
|
||||
if (frame_parms->frame_type == TDD) {
|
||||
switch (frame_parms->N_RB_UL) {
|
||||
if (cc[CC_id].tdd_Config!= NULL) { // TDD
|
||||
switch (N_RB_UL) {
|
||||
case 6:
|
||||
ULSCH_dci = UE_template->ULSCH_DCI[harq_pid];
|
||||
|
||||
@@ -1035,7 +1035,7 @@ abort();
|
||||
}
|
||||
} // TDD
|
||||
else { //FDD
|
||||
switch (frame_parms->N_RB_UL) {
|
||||
switch (N_RB_UL) {
|
||||
case 25:
|
||||
default:
|
||||
|
||||
@@ -1141,9 +1141,6 @@ abort();
|
||||
S_UL_SCHEDULED);
|
||||
|
||||
LOG_D(MAC,"[eNB %d] CC_id %d Frame %d, subframeP %d: Generated ULSCH DCI for next UE_id %d, format 0\n", module_idP,CC_id,frameP,subframeP,UE_id);
|
||||
#ifdef DEBUG
|
||||
dump_dci(frame_parms, &DCI_pdu->dci_alloc[DCI_pdu->Num_common_dci+DCI_pdu->Num_ue_spec_dci-1]);
|
||||
#endif
|
||||
|
||||
}
|
||||
else {
|
||||
|
||||
@@ -103,7 +103,7 @@ int mac_top_init_ue(int eMBMS_active, char *uecap_xer, uint8_t cba_group_active,
|
||||
int CC_id;
|
||||
int list_el;
|
||||
UE_list_t *UE_list;
|
||||
|
||||
COMMON_channels_t *cc;
|
||||
LOG_I(MAC,"[MAIN] Init function start:Nb_UE_INST=%d\n",NB_UE_INST);
|
||||
|
||||
if (NB_UE_INST>0) {
|
||||
@@ -174,11 +174,13 @@ int mac_top_init_ue(int eMBMS_active, char *uecap_xer, uint8_t cba_group_active,
|
||||
LOG_D(MAC,"[MAIN][eNB %d] CC_id %d initializing RA_template\n",i, CC_id);
|
||||
LOG_D(MAC, "[MSC_NEW][FRAME 00000][MAC_eNB][MOD %02d][]\n", i);
|
||||
|
||||
RA_template = (RA_TEMPLATE *)&RC.mac[i]->common_channels[CC_id].RA_template[0];
|
||||
cc = &RC.mac[i]->common_channels[CC_id];
|
||||
RA_template = &cc->RA_template[0];
|
||||
|
||||
|
||||
for (j=0; j<NB_RA_PROC_MAX; j++) {
|
||||
if (mac_xface->frame_parms->frame_type == TDD) {
|
||||
switch (mac_xface->frame_parms->N_RB_DL) {
|
||||
if (cc->tdd_Config != NULL) { // TDD
|
||||
switch (to_prb(cc->mib->message.dl_Bandwidth)) {
|
||||
case 6:
|
||||
size_bytes1 = sizeof(DCI1A_1_5MHz_TDD_1_6_t);
|
||||
size_bytes2 = sizeof(DCI1A_1_5MHz_TDD_1_6_t);
|
||||
@@ -216,7 +218,7 @@ int mac_top_init_ue(int eMBMS_active, char *uecap_xer, uint8_t cba_group_active,
|
||||
}
|
||||
|
||||
} else {
|
||||
switch (mac_xface->frame_parms->N_RB_DL) {
|
||||
switch (to_prb(cc->mib->message.dl_Bandwidth)) {
|
||||
case 6:
|
||||
size_bytes1 = sizeof(DCI1A_1_5MHz_FDD_t);
|
||||
size_bytes2 = sizeof(DCI1A_1_5MHz_FDD_t);
|
||||
|
||||
@@ -166,10 +166,9 @@ void assign_rbs_required (module_id_t Mod_id,
|
||||
LTE_eNB_UE_stats *eNB_UE_stats[MAX_NUM_CCs];
|
||||
int UE_id,n,i,j,CC_id,pCCid,tmp;
|
||||
UE_list_t *UE_list = &RC.mac[Mod_id]->UE_list;
|
||||
// UE_TEMPLATE *UE_template;
|
||||
LTE_DL_FRAME_PARMS *frame_parms[MAX_NUM_CCs];
|
||||
int N_RB_DL;
|
||||
|
||||
// clear rb allocations across all CC_ids
|
||||
// clear rb allocations across all CC_id
|
||||
for (UE_id = 0; UE_id < NUMBER_OF_UE_MAX; UE_id++) {
|
||||
if (UE_list->active[UE_id] != TRUE) continue;
|
||||
|
||||
@@ -184,7 +183,6 @@ void assign_rbs_required (module_id_t Mod_id,
|
||||
for (n=0; n<UE_list->numactiveCCs[UE_id]; n++) {
|
||||
|
||||
CC_id = UE_list->ordered_CCids[n][UE_id];
|
||||
frame_parms[CC_id] = mac_xface->get_lte_frame_parms(Mod_id,CC_id);
|
||||
eNB_UE_stats[CC_id] = mac_xface->get_eNB_UE_stats(Mod_id,CC_id,rnti);
|
||||
/*
|
||||
DevCheck(((eNB_UE_stats[CC_id]->DL_cqi[0] < MIN_CQI_VALUE) || (eNB_UE_stats[CC_id]->DL_cqi[0] > MAX_CQI_VALUE)),
|
||||
@@ -210,22 +208,11 @@ void assign_rbs_required (module_id_t Mod_id,
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
if ((mac_get_rrc_status(Mod_id,1,UE_id) < RRC_RECONFIGURED)){ // If we still don't have a default radio bearer
|
||||
nb_rbs_required[pCCid][UE_id] = PHY_vars_eNB_g[Mod_id][pCCid]->frame_parms.N_RB_DL;
|
||||
continue;
|
||||
}
|
||||
*/
|
||||
/* NN --> RK
|
||||
* check the index of UE_template"
|
||||
*/
|
||||
// if (UE_list->UE_template[UE_id]->dl_buffer_total> 0) {
|
||||
if (UE_list->UE_template[pCCid][UE_id].dl_buffer_total> 0) {
|
||||
LOG_D(MAC,"[preprocessor] assign RB for UE %d\n",UE_id);
|
||||
|
||||
for (i=0; i<UE_list->numactiveCCs[UE_id]; i++) {
|
||||
CC_id = UE_list->ordered_CCids[i][UE_id];
|
||||
frame_parms[CC_id] = mac_xface->get_lte_frame_parms(Mod_id,CC_id);
|
||||
eNB_UE_stats[CC_id] = mac_xface->get_eNB_UE_stats(Mod_id,CC_id,rnti);
|
||||
|
||||
if (eNB_UE_stats[CC_id]->dlsch_mcs1==0) {
|
||||
@@ -240,13 +227,15 @@ void assign_rbs_required (module_id_t Mod_id,
|
||||
UE_id, CC_id, UE_list->UE_template[pCCid][UE_id].dl_buffer_total,
|
||||
nb_rbs_required[CC_id][UE_id],eNB_UE_stats[CC_id]->dlsch_mcs1,TBS);
|
||||
|
||||
N_RB_DL = to_prb(RC.mac[Mod_id]->common_channels[CC_id].mib->message.dl_Bandwidth);
|
||||
|
||||
/* calculating required number of RBs for each UE */
|
||||
while (TBS < UE_list->UE_template[pCCid][UE_id].dl_buffer_total) {
|
||||
nb_rbs_required[CC_id][UE_id] += min_rb_unit[CC_id];
|
||||
|
||||
if (nb_rbs_required[CC_id][UE_id] > frame_parms[CC_id]->N_RB_DL) {
|
||||
TBS = mac_xface->get_TBS_DL(eNB_UE_stats[CC_id]->dlsch_mcs1,frame_parms[CC_id]->N_RB_DL);
|
||||
nb_rbs_required[CC_id][UE_id] = frame_parms[CC_id]->N_RB_DL;
|
||||
if (nb_rbs_required[CC_id][UE_id] > N_RB_DL) {
|
||||
TBS = mac_xface->get_TBS_DL(eNB_UE_stats[CC_id]->dlsch_mcs1,N_RB_DL);
|
||||
nb_rbs_required[CC_id][UE_id] = N_RB_DL;
|
||||
break;
|
||||
}
|
||||
|
||||
@@ -518,8 +507,8 @@ void dlsch_scheduler_pre_processor (module_id_t Mod_id,
|
||||
uint16_t r1=0;
|
||||
uint8_t CC_id;
|
||||
UE_list_t *UE_list = &RC.mac[Mod_id]->UE_list;
|
||||
LTE_DL_FRAME_PARMS *frame_parms[MAX_NUM_CCs] = {0};
|
||||
|
||||
int N_RB_DL;
|
||||
int transmission_mode = 0;
|
||||
UE_sched_ctrl *ue_sched_ctl;
|
||||
// int rrc_status = RRC_IDLE;
|
||||
@@ -540,7 +529,6 @@ void dlsch_scheduler_pre_processor (module_id_t Mod_id,
|
||||
if (mbsfn_flag[CC_id]>0) // If this CC is allocated for MBSFN skip it here
|
||||
continue;
|
||||
|
||||
frame_parms[CC_id] = mac_xface->get_lte_frame_parms(Mod_id,CC_id);
|
||||
|
||||
|
||||
min_rb_unit[CC_id]=get_min_rb_unit(Mod_id,CC_id);
|
||||
@@ -609,9 +597,6 @@ void dlsch_scheduler_pre_processor (module_id_t Mod_id,
|
||||
|
||||
average_rbs_per_user[CC_id]=0;
|
||||
|
||||
frame_parms[CC_id] = mac_xface->get_lte_frame_parms(Mod_id,CC_id);
|
||||
|
||||
// mac_xface->get_ue_active_harq_pid(Mod_id,CC_id,rnti,frameP,subframeP,&harq_pid,&round,0);
|
||||
|
||||
if(round>0) {
|
||||
nb_rbs_required[CC_id][UE_id] = UE_list->UE_template[CC_id][UE_id].nb_rb[harq_pid];
|
||||
@@ -633,10 +618,12 @@ void dlsch_scheduler_pre_processor (module_id_t Mod_id,
|
||||
* per user by a coefficient which represents the degree of priority.
|
||||
*/
|
||||
|
||||
N_RB_DL = to_prb(RC.mac[Mod_id]->common_channels[CC_id].mib->message.dl_Bandwidth);
|
||||
|
||||
if (total_ue_count == 0) {
|
||||
average_rbs_per_user[CC_id] = 0;
|
||||
} else if( (min_rb_unit[CC_id] * total_ue_count) <= (frame_parms[CC_id]->N_RB_DL) ) {
|
||||
average_rbs_per_user[CC_id] = (uint16_t) floor(frame_parms[CC_id]->N_RB_DL/total_ue_count);
|
||||
} else if( (min_rb_unit[CC_id] * total_ue_count) <= (N_RB_DL) ) {
|
||||
average_rbs_per_user[CC_id] = (uint16_t) floor(N_RB_DL/total_ue_count);
|
||||
} else {
|
||||
average_rbs_per_user[CC_id] = min_rb_unit[CC_id]; // consider the total number of use that can be scheduled UE
|
||||
}
|
||||
@@ -731,7 +718,7 @@ void dlsch_scheduler_pre_processor (module_id_t Mod_id,
|
||||
N_RBG[CC_id],
|
||||
transmission_mode,
|
||||
min_rb_unit[CC_id],
|
||||
frame_parms[CC_id]->N_RB_DL,
|
||||
N_RB_DL,
|
||||
nb_rbs_required,
|
||||
nb_rbs_required_remaining,
|
||||
rballoc_sub,
|
||||
@@ -795,8 +782,8 @@ void dlsch_scheduler_pre_processor (module_id_t Mod_id,
|
||||
|
||||
|
||||
if ((j == N_RBG[CC_id]-1) &&
|
||||
((PHY_vars_eNB_g[Mod_id][CC_id]->frame_parms.N_RB_DL == 25) ||
|
||||
(PHY_vars_eNB_g[Mod_id][CC_id]->frame_parms.N_RB_DL == 50))) {
|
||||
((N_RB_DL == 25) ||
|
||||
(N_RB_DL == 50))) {
|
||||
|
||||
nb_rbs_required_remaining[CC_id][UE_id] = nb_rbs_required_remaining[CC_id][UE_id] - min_rb_unit[CC_id]+1;
|
||||
ue_sched_ctl->pre_nb_available_rbs[CC_id] = ue_sched_ctl->pre_nb_available_rbs[CC_id] + min_rb_unit[CC_id]-1;
|
||||
@@ -905,7 +892,8 @@ void dlsch_scheduler_pre_processor_reset (int module_idP,
|
||||
UE_sched_ctrl *ue_sched_ctl = &UE_list->UE_sched_ctrl[UE_id];
|
||||
rnti_t rnti = UE_RNTI(module_idP,UE_id);
|
||||
uint8_t *vrb_map = RC.mac[module_idP]->common_channels[CC_id].vrb_map;
|
||||
int RBGsize = RC.eNB[module_idP][CC_id]->frame_parms.N_RB_DL/N_RBG;
|
||||
int N_RB_DL = to_prb(RC.mac[module_idP]->common_channels[CC_id].mib->message.dl_Bandwidth);
|
||||
int RBGsize = N_RB_DL/N_RBG;
|
||||
#ifdef SF05_LIMIT
|
||||
//int subframe05_limit=0;
|
||||
int sf05_upper=-1,sf05_lower=-1;
|
||||
@@ -928,7 +916,7 @@ void dlsch_scheduler_pre_processor_reset (int module_idP,
|
||||
// WE SHOULD PROTECT the eNB_UE_stats with a mutex here ...
|
||||
|
||||
ue_sched_ctl->ta_timer = 20; // wait 20 subframes before taking TA measurement from PHY
|
||||
switch (RC.eNB[module_idP][CC_id]->frame_parms.N_RB_DL) {
|
||||
switch (N_RB_DL) {
|
||||
case 6:
|
||||
ue_sched_ctl->ta_update = eNB_UE_stats->timing_advance_update;
|
||||
break;
|
||||
@@ -950,10 +938,7 @@ void dlsch_scheduler_pre_processor_reset (int module_idP,
|
||||
break;
|
||||
|
||||
case 100:
|
||||
if (RC.eNB[module_idP][CC_id]->frame_parms.threequarter_fs == 0)
|
||||
ue_sched_ctl->ta_update = eNB_UE_stats->timing_advance_update/16;
|
||||
else
|
||||
ue_sched_ctl->ta_update = eNB_UE_stats->timing_advance_update/12;
|
||||
break;
|
||||
}
|
||||
// clear the update in case PHY does not have a new measurement after timer expiry
|
||||
@@ -1089,13 +1074,13 @@ void ulsch_scheduler_pre_processor(module_id_t module_idP,
|
||||
uint8_t CC_id, round, harq_pid;
|
||||
uint16_t nb_allocated_rbs[MAX_NUM_CCs][NUMBER_OF_UE_MAX],total_allocated_rbs[MAX_NUM_CCs],average_rbs_per_user[MAX_NUM_CCs];
|
||||
int16_t total_remaining_rbs[MAX_NUM_CCs];
|
||||
uint16_t max_num_ue_to_be_scheduled=0,total_ue_count=0;
|
||||
rnti_t rnti= -1;
|
||||
UE_list_t *UE_list = &RC.mac[module_idP]->UE_list;
|
||||
UE_TEMPLATE *UE_template = 0;
|
||||
LTE_DL_FRAME_PARMS *frame_parms = 0;
|
||||
|
||||
|
||||
uint16_t max_num_ue_to_be_scheduled = 0;
|
||||
uint16_t total_ue_count = 0;
|
||||
rnti_t rnti = -1;
|
||||
UE_list_t *UE_list = &RC.mac[module_idP]->UE_list;
|
||||
UE_TEMPLATE *UE_template = 0;
|
||||
int N_RB_DL = to_prb(RC.mac[module_idP]->common_channels[CC_id].mib->message.dl_Bandwidth);
|
||||
int N_RB_UL = to_prb(RC.mac[module_idP]->common_channels[CC_id].ul_Bandwidth);
|
||||
//LOG_I(MAC,"assign max mcs min rb\n");
|
||||
// maximize MCS and then allocate required RB according to the buffer occupancy with the limit of max available UL RB
|
||||
assign_max_mcs_min_rb(module_idP,frameP, subframeP, first_rb);
|
||||
@@ -1142,7 +1127,6 @@ void ulsch_scheduler_pre_processor(module_id_t module_idP,
|
||||
CC_id = UE_list->ordered_ULCCids[n][UE_id];
|
||||
UE_template = &UE_list->UE_template[CC_id][UE_id];
|
||||
average_rbs_per_user[CC_id]=0;
|
||||
frame_parms = mac_xface->get_lte_frame_parms(module_idP,CC_id);
|
||||
|
||||
if (UE_template->pre_allocated_nb_rb_ul > 0) {
|
||||
total_ue_count+=1;
|
||||
@@ -1158,12 +1142,12 @@ void ulsch_scheduler_pre_processor(module_id_t module_idP,
|
||||
if (total_ue_count == 0) {
|
||||
average_rbs_per_user[CC_id] = 0;
|
||||
} else if (total_ue_count == 1 ) { // increase the available RBs, special case,
|
||||
average_rbs_per_user[CC_id] = frame_parms->N_RB_UL-first_rb[CC_id]+1;
|
||||
} else if( (total_ue_count <= (frame_parms->N_RB_DL-first_rb[CC_id])) &&
|
||||
average_rbs_per_user[CC_id] = N_RB_UL-first_rb[CC_id]+1;
|
||||
} else if( (total_ue_count <= (N_RB_DL-first_rb[CC_id])) &&
|
||||
(total_ue_count <= max_num_ue_to_be_scheduled)) {
|
||||
average_rbs_per_user[CC_id] = (uint16_t) floor((frame_parms->N_RB_UL-first_rb[CC_id])/total_ue_count);
|
||||
average_rbs_per_user[CC_id] = (uint16_t) floor((N_RB_UL-first_rb[CC_id])/total_ue_count);
|
||||
} else if (max_num_ue_to_be_scheduled > 0 ) {
|
||||
average_rbs_per_user[CC_id] = (uint16_t) floor((frame_parms->N_RB_UL-first_rb[CC_id])/max_num_ue_to_be_scheduled);
|
||||
average_rbs_per_user[CC_id] = (uint16_t) floor((N_RB_UL-first_rb[CC_id])/max_num_ue_to_be_scheduled);
|
||||
} else {
|
||||
average_rbs_per_user[CC_id]=1;
|
||||
LOG_W(MAC,"[eNB %d] frame %d subframe %d: UE %d CC %d: can't get average rb per user (should not be here)\n",
|
||||
@@ -1226,8 +1210,7 @@ void ulsch_scheduler_pre_processor(module_id_t module_idP,
|
||||
// This is the actual CC_id in the list
|
||||
CC_id = UE_list->ordered_ULCCids[n][UE_id];
|
||||
UE_template = &UE_list->UE_template[CC_id][UE_id];
|
||||
frame_parms = mac_xface->get_lte_frame_parms(module_idP,CC_id);
|
||||
total_remaining_rbs[CC_id]=frame_parms->N_RB_UL - first_rb[CC_id] - total_allocated_rbs[CC_id];
|
||||
total_remaining_rbs[CC_id]=N_RB_UL - first_rb[CC_id] - total_allocated_rbs[CC_id];
|
||||
|
||||
if (total_ue_count == 1 ) {
|
||||
total_remaining_rbs[CC_id]+=1;
|
||||
@@ -1251,10 +1234,9 @@ void ulsch_scheduler_pre_processor(module_id_t module_idP,
|
||||
}
|
||||
|
||||
for (CC_id=0; CC_id<MAX_NUM_CCs; CC_id++) {
|
||||
frame_parms= mac_xface->get_lte_frame_parms(module_idP,CC_id);
|
||||
|
||||
if (total_allocated_rbs[CC_id]>0) {
|
||||
LOG_D(MAC,"[eNB %d] total RB allocated for all UEs = %d/%d\n", module_idP, total_allocated_rbs[CC_id], frame_parms->N_RB_UL - first_rb[CC_id]);
|
||||
LOG_D(MAC,"[eNB %d] total RB allocated for all UEs = %d/%d\n", module_idP, total_allocated_rbs[CC_id], N_RB_UL - first_rb[CC_id]);
|
||||
}
|
||||
}
|
||||
}
|
||||
@@ -1273,8 +1255,8 @@ void assign_max_mcs_min_rb(module_id_t module_idP,int frameP, sub_frame_t subfra
|
||||
UE_list_t *UE_list = &eNB->UE_list;
|
||||
|
||||
UE_TEMPLATE *UE_template;
|
||||
LTE_DL_FRAME_PARMS *frame_parms;
|
||||
|
||||
int Ncp;
|
||||
int N_RB_UL;
|
||||
|
||||
for (i = 0; i < NUMBER_OF_UE_MAX; i++) {
|
||||
if (UE_list->active[i] != TRUE) continue;
|
||||
@@ -1314,37 +1296,39 @@ void assign_max_mcs_min_rb(module_id_t module_idP,int frameP, sub_frame_t subfra
|
||||
n,
|
||||
UE_id,
|
||||
UE_list->numactiveULCCs[UE_id]);
|
||||
frame_parms=mac_xface->get_lte_frame_parms(module_idP,CC_id);
|
||||
|
||||
UE_template = &UE_list->UE_template[CC_id][UE_id];
|
||||
|
||||
Ncp = RC.mac[module_idP]->common_channels[CC_id].Ncp;
|
||||
N_RB_UL = to_prb(RC.mac[module_idP]->common_channels[CC_id].ul_Bandwidth);
|
||||
// if this UE has UL traffic
|
||||
if (UE_template->ul_total_buffer > 0 ) {
|
||||
|
||||
tbs = mac_xface->get_TBS_UL(mcs,3); // 1 or 2 PRB with cqi enabled does not work well!
|
||||
// fixme: set use_srs flag
|
||||
tx_power= mac_xface->estimate_ue_tx_power(tbs,rb_table[rb_table_index],0,frame_parms->Ncp,0);
|
||||
tx_power= mac_xface->estimate_ue_tx_power(tbs,rb_table[rb_table_index],0,Ncp,0);
|
||||
|
||||
while ((((UE_template->phr_info - tx_power) < 0 ) || (tbs > UE_template->ul_total_buffer))&&
|
||||
(mcs > 3)) {
|
||||
// LOG_I(MAC,"UE_template->phr_info %d tx_power %d mcs %d\n", UE_template->phr_info,tx_power, mcs);
|
||||
mcs--;
|
||||
tbs = mac_xface->get_TBS_UL(mcs,rb_table[rb_table_index]);
|
||||
tx_power = mac_xface->estimate_ue_tx_power(tbs,rb_table[rb_table_index],0,frame_parms->Ncp,0); // fixme: set use_srs
|
||||
tx_power = mac_xface->estimate_ue_tx_power(tbs,rb_table[rb_table_index],0,Ncp,0); // fixme: set use_srs
|
||||
}
|
||||
|
||||
while ((tbs < UE_template->ul_total_buffer) &&
|
||||
(rb_table[rb_table_index]<(frame_parms->N_RB_UL-first_rb[CC_id])) &&
|
||||
(rb_table[rb_table_index]<(N_RB_UL-first_rb[CC_id])) &&
|
||||
((UE_template->phr_info - tx_power) > 0) &&
|
||||
(rb_table_index < 32 )) {
|
||||
// LOG_I(MAC,"tbs %d ul buffer %d rb table %d max ul rb %d\n", tbs, UE_template->ul_total_buffer, rb_table[rb_table_index], frame_parms->N_RB_UL-first_rb[CC_id]);
|
||||
|
||||
rb_table_index++;
|
||||
tbs = mac_xface->get_TBS_UL(mcs,rb_table[rb_table_index]);
|
||||
tx_power = mac_xface->estimate_ue_tx_power(tbs,rb_table[rb_table_index],0,frame_parms->Ncp,0);
|
||||
tx_power = mac_xface->estimate_ue_tx_power(tbs,rb_table[rb_table_index],0,Ncp,0);
|
||||
}
|
||||
|
||||
UE_template->ue_tx_power = tx_power;
|
||||
|
||||
if (rb_table[rb_table_index]>(frame_parms->N_RB_UL-first_rb[CC_id]-1)) {
|
||||
if (rb_table[rb_table_index]>(N_RB_UL-first_rb[CC_id]-1)) {
|
||||
rb_table_index--;
|
||||
}
|
||||
|
||||
|
||||
@@ -346,9 +346,9 @@ boolean_t CCE_allocation_infeasible(int module_idP,
|
||||
int rnti);
|
||||
|
||||
void set_ue_dai(sub_frame_t subframeP,
|
||||
uint8_t tdd_config,
|
||||
int UE_id,
|
||||
uint8_t CC_id,
|
||||
uint8_t tdd_config,
|
||||
UE_list_t *UE_list);
|
||||
|
||||
uint8_t find_num_active_UEs_in_cbagroup(module_id_t module_idP, unsigned char group_id);
|
||||
@@ -370,10 +370,11 @@ int schedule_next_dlue(module_id_t module_idP, int CC_id, sub_frame_t subframe);
|
||||
/* \brief Allocates a set of PRBS for a particular UE. This is a simple function for the moment, later it should process frequency-domain CQI information and/or PMI information. Currently it just returns the first PRBS that are available in the subframe based on the number requested.
|
||||
@param UE_id Index of UE on which to act
|
||||
@param nb_rb Number of PRBs allocated to UE by scheduler
|
||||
@param N_RB_DL Number of PRBs on DL
|
||||
@param rballoc Pointer to bit-map of current PRB allocation given to previous users/control channels. This is updated for subsequent calls to the routine.
|
||||
@returns an rballoc bitmap for resource type 0 allocation (DCI).
|
||||
*/
|
||||
uint32_t allocate_prbs(int UE_id,uint8_t nb_rb, uint32_t *rballoc);
|
||||
uint32_t allocate_prbs(int UE_id,uint8_t nb_rb, int N_RB_DL, uint32_t *rballoc);
|
||||
|
||||
/* \fn uint32_t req_new_ulsch(module_id_t module_idP)
|
||||
\brief check for a new transmission in any drb
|
||||
@@ -515,7 +516,8 @@ uint8_t *parse_ulsch_header(uint8_t *mac_header,
|
||||
uint16_t *rx_lengths,
|
||||
uint16_t tx_lenght);
|
||||
|
||||
|
||||
int to_prb(int);
|
||||
int to_rbg(int);
|
||||
int l2_init(LTE_DL_FRAME_PARMS *frame_parms,int eMBMS_active, char *uecap_xer, uint8_t cba_group_active, uint8_t HO_active);
|
||||
int mac_init(void);
|
||||
int add_new_ue(module_id_t Mod_id, int CC_id, rnti_t rnti,int harq_pid);
|
||||
@@ -693,7 +695,7 @@ void add_common_dci(DCI_PDU *DCI_pdu,
|
||||
unsigned char dci_fmt,
|
||||
uint8_t ra_flag);
|
||||
|
||||
uint32_t allocate_prbs_sub(int nb_rb, uint8_t *rballoc);
|
||||
uint32_t allocate_prbs_sub(int nb_rb, int N_RB_DL, int N_RBG, uint8_t *rballoc);
|
||||
|
||||
void update_ul_dci(module_id_t module_idP,uint8_t CC_id,rnti_t rnti,uint8_t dai);
|
||||
|
||||
|
||||
@@ -1,317 +0,0 @@
|
||||
/*
|
||||
* Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
|
||||
* contributor license agreements. See the NOTICE file distributed with
|
||||
* this work for additional information regarding copyright ownership.
|
||||
* The OpenAirInterface Software Alliance licenses this file to You under
|
||||
* the OAI Public License, Version 1.0 (the "License"); you may not use this file
|
||||
* except in compliance with the License.
|
||||
* You may obtain a copy of the License at
|
||||
*
|
||||
* http://www.openairinterface.org/?page_id=698
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
* See the License for the specific language governing permissions and
|
||||
* limitations under the License.
|
||||
*-------------------------------------------------------------------------------
|
||||
* For more information about the OpenAirInterface (OAI) Software Alliance:
|
||||
* contact@openairinterface.org
|
||||
*/
|
||||
|
||||
/*! \file rrc_config.c
|
||||
* \brief rrc cinfiguration
|
||||
* \author Raymond Knopp and Navid Nikaein
|
||||
* \date 2011
|
||||
* \version 1.0
|
||||
* \company Eurecom
|
||||
* \email: raymond.knopp@eurecom.fr and navid.nikaein@eurecom.fr
|
||||
*/
|
||||
|
||||
|
||||
#include "defs.h"
|
||||
|
||||
#include "extern.h"
|
||||
|
||||
|
||||
#ifdef PHY_EMUL
|
||||
#include "SIMULATION/simulation_defs.h"
|
||||
extern EMULATION_VARS *Emul_vars;
|
||||
#endif
|
||||
extern CH_MAC_INST *CH_mac_inst;
|
||||
extern UE_MAC_INST *UE_mac_inst;
|
||||
#ifdef BIGPHYSAREA
|
||||
extern void *bigphys_malloc(int);
|
||||
#endif
|
||||
|
||||
void rrc_init_ch_req(unsigned char Mod_id, rrm_init_ch_req_t *smsg)
|
||||
{
|
||||
uint16_t Index;
|
||||
MAC_CONFIG_REQ Mac_config_req;
|
||||
// MAC_MEAS_REQ Mac_meas_req;
|
||||
|
||||
msg("-----------------------------------------------------------------------------------------------------------------\n");
|
||||
printk("[RRC_CONFIG]OPENAIR RRC INIT CH %d...\n",Mod_id);
|
||||
|
||||
Mac_config_req.Lchan_type = smsg->Lchan_desc_srb0.Lchan_t;
|
||||
memcpy(&Mac_config_req.Lchan_desc[0],(LCHAN_DESC*)&smsg->Lchan_desc_srb0,LCHAN_DESC_SIZE); //0 rx, 1 tx
|
||||
memcpy(&Mac_config_req.Lchan_desc[1],(LCHAN_DESC*)&smsg->Lchan_desc_srb0,LCHAN_DESC_SIZE); //0 rx, 1 tx
|
||||
Mac_config_req.UE_CH_index=0;
|
||||
Mac_config_req.Lchan_id.Index=(0 << RAB_SHIFT2) + BCCH;
|
||||
msg("Calling Lchan_config\n");
|
||||
Index=Mac_rlc_xface->mac_config_req(Mod_id,ADD_LC,&Mac_config_req);
|
||||
msg("[OPENAIR][RRC][RRC_ON] NODE %d, Config BCCH %d done\n",CH_rrc_inst[Mod_id].Node_id,Index);
|
||||
CH_rrc_inst[Mod_id].Srb0.Srb_id = Index;
|
||||
|
||||
memcpy(&CH_rrc_inst[Mod_id].Srb0.Lchan_desc[0],(LCHAN_DESC*)&smsg->Lchan_desc_srb0,LCHAN_DESC_SIZE); //0 rx, 1 tx
|
||||
memcpy(&CH_rrc_inst[Mod_id].Srb0.Lchan_desc[1],(LCHAN_DESC*)&smsg->Lchan_desc_srb0,LCHAN_DESC_SIZE); //0 rx, 1 tx
|
||||
|
||||
rrc_config_buffer(&CH_rrc_inst[Mod_id].Srb0,BCCH,0);
|
||||
((CH_BCCH_HEADER*)(&CH_rrc_inst[Mod_id].Srb0.Tx_buffer.Header[0]))->Rv_tb_idx=0;
|
||||
msg("[OPENAIR][RRC][RRC_ON] NODE %d, Config BCCH for TB_size %d\n",NODE_ID[Mod_id],
|
||||
CH_rrc_inst[Mod_id].Srb0.Lchan_desc[1].transport_block_size);
|
||||
CH_rrc_inst[Mod_id].Srb0.Tx_buffer.generate_fun=ch_rrc_generate_bcch;
|
||||
CH_rrc_inst[Mod_id].Srb0.Active=1;
|
||||
|
||||
Mac_config_req.Lchan_type = smsg->Lchan_desc_srb1.Lchan_t;
|
||||
memcpy(&Mac_config_req.Lchan_desc[0],(LCHAN_DESC*)&smsg->Lchan_desc_srb1,LCHAN_DESC_SIZE); //0 rx, 1 tx
|
||||
memcpy(&Mac_config_req.Lchan_desc[1],(LCHAN_DESC*)&smsg->Lchan_desc_srb1,LCHAN_DESC_SIZE); //0 rx, 1 tx
|
||||
Mac_config_req.UE_CH_index=0;
|
||||
Mac_config_req.Lchan_id.Index=(0 << RAB_SHIFT2) + CCCH;
|
||||
// printk("Calling Lchan_config\n");
|
||||
Index=Mac_rlc_xface->mac_config_req(Mod_id,ADD_LC,&Mac_config_req);
|
||||
msg("[OPENAIR][RRC][RRC_ON] NODE %d, Config BCCH %d done\n",CH_rrc_inst[Mod_id].Node_id,Index);
|
||||
CH_rrc_inst[Mod_id].Srb1.Srb_id = Index;
|
||||
|
||||
memcpy(&CH_rrc_inst[Mod_id].Srb1.Lchan_desc[0],(LCHAN_DESC*)&smsg->Lchan_desc_srb1,LCHAN_DESC_SIZE); //0 rx, 1 tx
|
||||
memcpy(&CH_rrc_inst[Mod_id].Srb1.Lchan_desc[1],(LCHAN_DESC*)&smsg->Lchan_desc_srb1,LCHAN_DESC_SIZE); //0 rx, 1 tx
|
||||
|
||||
|
||||
rrc_config_buffer(&CH_rrc_inst[Mod_id].Srb1,CCCH,1);
|
||||
((CH_CCCH_HEADER*)(&CH_rrc_inst[Mod_id].Srb1.Tx_buffer.Header[0]))->Rv_tb_idx=0;
|
||||
printk("[OPENAIR][RRC][RRC_ON] NODE %d, Config CCCH %d done, TB_size=%d,%d\n",NODE_ID[Mod_id],Index,
|
||||
CH_rrc_inst[Mod_id].Srb1.Tx_buffer.Tb_size,CH_rrc_inst[Mod_id].Srb1.Rx_buffer.Tb_size);
|
||||
CH_rrc_inst[Mod_id].Srb1.Tx_buffer.generate_fun=ch_rrc_generate_ccch;
|
||||
CH_rrc_inst[Mod_id].Srb1.Active=1;
|
||||
|
||||
//CH_rrc_inst[Mod_id].Info.UE_list[i].L2_id[0]=i;
|
||||
|
||||
// CH_rrc_inst[Mod_id].Info.UE_list[0]=0;
|
||||
|
||||
}
|
||||
|
||||
void rrc_init_mr_req(unsigned char Mod_id, rrci_init_mr_req_t *smsg)
|
||||
{
|
||||
uint16_t Index;
|
||||
MAC_CONFIG_REQ Mac_config_req;
|
||||
// MAC_MEAS_REQ Mac_meas_req;
|
||||
msg("-----------------------------------------------------------------------------------------------------------------\n");
|
||||
msg("[RRC_CONFIG]: Node %d: INIT MR REQUEST for CH %d\n",NODE_ID[Mod_id],smsg->CH_index);
|
||||
Mac_config_req.Lchan_type = smsg->Lchan_desc_srb0.Lchan_t;
|
||||
memcpy(&Mac_config_req.Lchan_desc[0],(LCHAN_DESC*)&smsg->Lchan_desc_srb0,LCHAN_DESC_SIZE); //0 rx, 1 tx
|
||||
memcpy(&Mac_config_req.Lchan_desc[1],(LCHAN_DESC*)&smsg->Lchan_desc_srb0,LCHAN_DESC_SIZE); //0 rx, 1 tx
|
||||
|
||||
Mac_config_req.UE_CH_index=smsg->CH_index;
|
||||
Mac_config_req.Lchan_id.Index=(smsg->CH_index << RAB_SHIFT2) + BCCH;
|
||||
Index=Mac_rlc_xface->mac_config_req(Mod_id,ADD_LC,&Mac_config_req);
|
||||
msg("[OPENAIR][RRC][RRC_CONFIG] NODE %d, Config BCCH %d done\n",UE_rrc_inst[Mod_id-NB_CH_INST].Node_id,Index);
|
||||
|
||||
UE_rrc_inst[Mod_id].Srb0[smsg->CH_index].Srb_id = Index;
|
||||
memcpy(& UE_rrc_inst[Mod_id-NB_CH_INST].Srb0[smsg->CH_index].Lchan_desc[0],(LCHAN_DESC*)&smsg->Lchan_desc_srb0,LCHAN_DESC_SIZE); //0 rx, 1 tx
|
||||
memcpy(& UE_rrc_inst[Mod_id-NB_CH_INST].Srb0[smsg->CH_index].Lchan_desc[1],(LCHAN_DESC*)&smsg->Lchan_desc_srb0,LCHAN_DESC_SIZE); //0 rx, 1 tx
|
||||
|
||||
rrc_config_buffer(&UE_rrc_inst[Mod_id-NB_CH_INST].Srb0[smsg->CH_index],BCCH,0);
|
||||
((CH_BCCH_HEADER*)(&UE_rrc_inst[Mod_id-NB_CH_INST].Srb0[smsg->CH_index].Rx_buffer.Header[0]))->Rv_tb_idx=0;
|
||||
UE_rrc_inst[Mod_id-NB_CH_INST].Srb0[smsg->CH_index].Active=1;
|
||||
/*
|
||||
Mac_meas_req.Lchan_id.Index = Index;
|
||||
Mac_meas_req.UE_CH_index = i;
|
||||
Mac_meas_req.Meas_trigger = BCCH_MEAS_TRIGGER;
|
||||
Mac_meas_req.Mac_avg = BCCH_MEAS_AVG;
|
||||
Mac_meas_req.Rep_amount = 0;
|
||||
Mac_meas_req.Rep_interval = 1000;
|
||||
UE_rrc_inst[Mod_id].Srb0[i].Meas_entry=Mac_rlc_xface->mac_meas_req(Mod_id+NB_CH_INST,&Mac_meas_req);
|
||||
UE_rrc_inst[Mod_id].Srb0[i].Meas_entry->Status=RADIO_CONFIG_OK;
|
||||
UE_rrc_inst[Mod_id].Srb0[i].Meas_entry->Last_report_frame=Rrc_xface->Frame_index;
|
||||
UE_rrc_inst[Mod_id].Srb0[i].Meas_entry->Next_check_frame=Rrc_xface->Frame_index+1000;
|
||||
*/
|
||||
|
||||
//printk("[OPENAIR][RRC][RRC_ON] NODE %d, Config CCCH %d done\n",NODE_ID[Mod_id],Index);
|
||||
// printk("check meas, LC_Index %d, Next %d, Last %d, Int %d \n",UE_rrc_inst[Mod_id].Srb0[i].Meas_entry->Mac_meas_req.Lchan_id.Index,UE_rrc_inst[Mod_id].Srb0[i].Meas_entry->Next_check_frame,UE_rrc_inst[Mod_id].Srb0[i].Meas_entry->Last_report_frame,UE_rrc_inst[Mod_id].Srb0[i].Meas_entry->Mac_meas_req.Rep_interval);
|
||||
|
||||
Mac_config_req.Lchan_type = smsg->Lchan_desc_srb1.Lchan_t;
|
||||
memcpy(&Mac_config_req.Lchan_desc[0],(LCHAN_DESC*)&smsg->Lchan_desc_srb1,LCHAN_DESC_SIZE); //0 rx, 1 tx
|
||||
memcpy(&Mac_config_req.Lchan_desc[1],(LCHAN_DESC*)&smsg->Lchan_desc_srb1,LCHAN_DESC_SIZE); //0 rx, 1 tx
|
||||
|
||||
Mac_config_req.UE_CH_index=smsg->CH_index;
|
||||
Mac_config_req.Lchan_id.Index=(smsg->CH_index << RAB_SHIFT2) + CCCH;
|
||||
Index=Mac_rlc_xface->mac_config_req(Mod_id,ADD_LC,&Mac_config_req);
|
||||
msg("[OPENAIR][RRC][RRC_CONFIG] NODE %d, Config CCCH %d done\n",NODE_ID[Mod_id],Index);
|
||||
UE_rrc_inst[Mod_id-NB_CH_INST].Srb1[smsg->CH_index].Srb_id = Index;
|
||||
memcpy(&UE_rrc_inst[Mod_id-NB_CH_INST].Srb1[smsg->CH_index].Lchan_desc[0],(LCHAN_DESC*)&smsg->Lchan_desc_srb1,LCHAN_DESC_SIZE); //0 rx, 1 tx
|
||||
memcpy(&UE_rrc_inst[Mod_id-NB_CH_INST].Srb1[smsg->CH_index].Lchan_desc[1],(LCHAN_DESC*)&smsg->Lchan_desc_srb1,LCHAN_DESC_SIZE); //0 rx, 1 tx
|
||||
rrc_config_buffer(&UE_rrc_inst[Mod_id-NB_CH_INST].Srb1[smsg->CH_index],CCCH,1);
|
||||
((CH_CCCH_HEADER*)(&UE_rrc_inst[Mod_id-NB_CH_INST].Srb1[smsg->CH_index].Rx_buffer.Header[0]))->Rv_tb_idx=0;
|
||||
UE_rrc_inst[Mod_id-NB_CH_INST].Srb1[smsg->CH_index].Active=1;
|
||||
/*
|
||||
|
||||
Mac_meas_req.Lchan_id.Index = Index;
|
||||
// Mac_meas_req.UE_CH_index = i;
|
||||
Mac_meas_req.Meas_trigger = CCCH_MEAS_TRIGGER;
|
||||
Mac_meas_req.Mac_avg = CCCH_MEAS_AVG;
|
||||
Mac_meas_req.Rep_amount = 0;
|
||||
Mac_meas_req.Rep_interval = 1000;
|
||||
UE_rrc_inst[Mod_id].Srb1[i].Meas_entry=Mac_rlc_xface->mac_meas_req(Mod_id+NB_CH_INST,&Mac_meas_req);
|
||||
UE_rrc_inst[Mod_id].Srb1[i].Meas_entry->Status=RADIO_CONFIG_OK;
|
||||
UE_rrc_inst[Mod_id].Srb1[i].Meas_entry->Last_report_frame=Rrc_xface->Frame_index;
|
||||
UE_rrc_inst[Mod_id].Srb1[i].Meas_entry->Next_check_frame=Rrc_xface->Frame_index+1000;
|
||||
//printk("[OPENAIR][RRC][RRC_ON] NODE %d, Config CCCH %d done\n",NODE_ID[Mod_id],Index);
|
||||
*/
|
||||
|
||||
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
void rrc_config_req(Instance_t Mod_id, void *smsg, unsigned char Action,Transaction_t Trans_id)
|
||||
{
|
||||
|
||||
MAC_CONFIG_REQ Mac_config_req;
|
||||
MAC_MEAS_REQ Mac_meas_req;
|
||||
unsigned short Idx,UE_index,In_idx;
|
||||
|
||||
|
||||
switch(Action) {
|
||||
|
||||
case RRM_RB_ESTABLISH_REQ: {
|
||||
rrm_rb_establish_req_t *p = (rrm_rb_establish_req_t *) smsg ;
|
||||
msg("[RRC]CH %d: config req for CH L2_id %d to MR L2_id %d\n",NODE_ID[Mod_id],p->L2_id[0].L2_id[0],p->L2_id[1].L2_id[0]);
|
||||
UE_index=rrc_find_ue_index(Mod_id, p->L2_id[1]);
|
||||
|
||||
if(UE_index > NB_CNX_CH) {
|
||||
msg("[FATAL ERROR] NO MORE UE_INDEX!!!!!\n");
|
||||
return;
|
||||
}
|
||||
|
||||
if(p->Lchan_desc.Lchan_t==DCCH) {
|
||||
Mac_config_req.Lchan_type = p->Lchan_desc.Lchan_t;
|
||||
Mac_config_req.UE_CH_index = UE_index;
|
||||
memcpy(&Mac_config_req.Lchan_desc[0],(LCHAN_DESC*)&p->Lchan_desc,LCHAN_DESC_SIZE); //0 rx, 1 tx
|
||||
memcpy(&Mac_config_req.Lchan_desc[1],(LCHAN_DESC*)&p->Lchan_desc,LCHAN_DESC_SIZE); //0 rx, 1 tx
|
||||
Mac_config_req.Lchan_id.Index=( UE_index << RAB_SHIFT2) + DCCH;
|
||||
Idx = Mac_rlc_xface->mac_config_req(Mod_id,ADD_LC,&Mac_config_req);
|
||||
CH_rrc_inst[Mod_id].Srb2[UE_index].Active = 1;
|
||||
CH_rrc_inst[Mod_id].Srb2[UE_index].Next_check_frame = Rrc_xface->Frame_index + 250;
|
||||
CH_rrc_inst[Mod_id].Srb2[UE_index].Status = NEED_RADIO_CONFIG;//RADIO CFG
|
||||
CH_rrc_inst[Mod_id].Srb2[UE_index].Srb_info.Srb_id = Idx;
|
||||
|
||||
|
||||
memcpy(&CH_rrc_inst[Mod_id].Srb2[UE_index].Srb_info.Lchan_desc[0],(LCHAN_DESC*)&p->Lchan_desc,LCHAN_DESC_SIZE); //0 rx, 1 tx
|
||||
memcpy(&CH_rrc_inst[Mod_id].Srb2[UE_index].Srb_info.Lchan_desc[1],(LCHAN_DESC*)&p->Lchan_desc,LCHAN_DESC_SIZE); //0 rx, 1 tx
|
||||
// CH_rrc_inst[Mod_id].Srb2[UE_index].Srb_info.Lchan_desc[0] = &DCCH_LCHAN_DESC;
|
||||
// CH_rrc_inst[Mod_id].Srb2[UE_index].Srb_info.Lchan_desc[1] = &DCCH_LCHAN_DESC;
|
||||
|
||||
//CH_rrc_inst[Mod_id].Rab[In_idx][UE_index].Rb_info.Lchan_desc[0] = &msg->Lchan_desc;
|
||||
// CH_rrc_inst[Mod_id].Rab[In_idx][UE_index].Rb_info.Lchan_desc[1] = &msg-;
|
||||
//Configure a correponding measurement process
|
||||
// msg("[RRC]Inst %d: Programing RADIO CONFIG of DCCH LCHAN %d\n",Mod_id,Idx);
|
||||
//CH_rrc_inst[Mod_id].Nb_rb[UE_index]++;
|
||||
//msg("[OPENAIR][RRC] CALLING RLC CONFIG RADIO BEARER %d\n",Idx);
|
||||
Mac_rlc_xface->rrc_rlc_config_req(Mod_id,CONFIG_ACTION_ADD,Idx,SIGNALLING_RADIO_BEARER,Rlc_info_um);
|
||||
/*
|
||||
CH_rrc_inst[Mod_id].Srb2[UE_index].Srb_info.CH_ip_addr_type=p->L3_info_t;
|
||||
if(p->L3_info_t == IPv4_ADDR){
|
||||
|
||||
memcpy(CH_rrc_inst[Mod_id].Srb2[UE_index].Srb_info.CH_ip_addr,p->L3_info,4);
|
||||
}
|
||||
else
|
||||
memcpy(UE_rrc_inst[Mod_id].Srb2[UE_index].Srb_info.CH_ip_addr,p->L3_info,16);
|
||||
*/
|
||||
|
||||
|
||||
|
||||
|
||||
// if(msg->Mac_rlc_meas_desc !=NULL){
|
||||
CH_rrc_inst[Mod_id].Def_meas[UE_index]= &CH_mac_inst[Mod_id].Def_meas[UE_index];
|
||||
CH_rrc_inst[Mod_id].Def_meas[UE_index]->Active = 1;
|
||||
CH_rrc_inst[Mod_id].Def_meas[UE_index]->Status = NEED_RADIO_CONFIG;
|
||||
CH_rrc_inst[Mod_id].Def_meas[UE_index]->Forg_fact=1;
|
||||
CH_rrc_inst[Mod_id].Def_meas[UE_index]->Rep_interval=50;
|
||||
CH_rrc_inst[Mod_id].Def_meas[UE_index]->Last_report_frame=Rrc_xface->Frame_index;
|
||||
CH_rrc_inst[Mod_id].Def_meas[UE_index]->Next_check_frame=Rrc_xface->Frame_index +200 ;
|
||||
// }
|
||||
} else {
|
||||
msg("RRC_config: Inst %d:, UE_index %d",Mod_id,UE_index);
|
||||
Mac_config_req.Lchan_type = p->Lchan_desc.Lchan_t;
|
||||
Mac_config_req.UE_CH_index = UE_index;
|
||||
memcpy(&Mac_config_req.Lchan_desc[0],&p->Lchan_desc,LCHAN_DESC_SIZE); //0 rx, 1 tx
|
||||
memcpy(&Mac_config_req.Lchan_desc[1],&p->Lchan_desc,LCHAN_DESC_SIZE); //0 rx, 1 tx
|
||||
In_idx=find_free_dtch_position(Mod_id,UE_index);
|
||||
Mac_config_req.Lchan_id.Index=(UE_index << RAB_SHIFT2) + DTCH + In_idx;
|
||||
Idx = Mac_rlc_xface->mac_config_req(Mod_id,ADD_LC,&Mac_config_req);
|
||||
CH_rrc_inst[Mod_id].Rab[In_idx][UE_index].Active = 1;
|
||||
CH_rrc_inst[Mod_id].Rab[In_idx][UE_index].Next_check_frame = Rrc_xface->Frame_index + 250;
|
||||
CH_rrc_inst[Mod_id].Rab[In_idx][UE_index].Status = NEED_RADIO_CONFIG;//RADIO CFG
|
||||
CH_rrc_inst[Mod_id].Rab[In_idx][UE_index].Rb_info.Rb_id = Idx;
|
||||
|
||||
memcpy(&CH_rrc_inst[Mod_id].Rab[In_idx][UE_index].Rb_info.Lchan_desc[0],&p->Lchan_desc,LCHAN_DESC_SIZE); //0 rx, 1 tx
|
||||
memcpy(&CH_rrc_inst[Mod_id].Rab[In_idx][UE_index].Rb_info.Lchan_desc[1],&p->Lchan_desc,LCHAN_DESC_SIZE); //0 rx, 1 tx
|
||||
|
||||
//Configure a correponding measurement process
|
||||
msg("[RRC]Inst %d: Programing RADIO CONFIG of DTCH LCHAN %d\n",Mod_id,Idx);
|
||||
//CH_rrc_inst[Mod_id].Nb_rb[UE_index]++;
|
||||
//msg("[OPENAIR][RRC] CALLING RLC CONFIG RADIO BEARER %d\n",Idx);
|
||||
|
||||
// if(p->Mac_rlc_meas_desc !=NULL){
|
||||
if(p->Lchan_desc.Lchan_t!=DTCH) {
|
||||
Mac_meas_req.Lchan_id.Index = Idx;
|
||||
Mac_meas_req.UE_CH_index = UE_index;
|
||||
Mac_meas_req.Meas_trigger = p->Mac_rlc_meas_desc.Meas_trigger;
|
||||
Mac_meas_req.Mac_avg = p->Mac_rlc_meas_desc.Mac_avg;
|
||||
Mac_meas_req.Rep_amount = p->Mac_rlc_meas_desc.Rep_amount;
|
||||
Mac_meas_req.Rep_interval = p->Mac_rlc_meas_desc.Rep_interval;
|
||||
CH_rrc_inst[Mod_id].Rab[In_idx][UE_index].Rb_info.Meas_entry=Mac_rlc_xface->mac_meas_req(Mod_id,&Mac_meas_req);
|
||||
CH_rrc_inst[Mod_id].Rab_meas[In_idx][UE_index].Status=NEED_RADIO_CONFIG;
|
||||
CH_rrc_inst[Mod_id].Rab_meas[In_idx][UE_index].Mac_meas_req.Lchan_id.Index=Idx;
|
||||
CH_rrc_inst[Mod_id].Rab_meas[In_idx][UE_index].Last_report_frame=Rrc_xface->Frame_index;
|
||||
CH_rrc_inst[Mod_id].Rab_meas[In_idx][UE_index].Next_check_frame=Rrc_xface->Frame_index+Mac_meas_req.Rep_interval;
|
||||
}
|
||||
|
||||
|
||||
if(p->Lchan_desc.Lchan_t==DTCH) {
|
||||
CH_rrc_inst[Mod_id].Rab[In_idx][UE_index].Status = RADIO_CONFIG_OK;//RADIO CFG
|
||||
Mac_rlc_xface->rrc_rlc_config_req(Mod_id,CONFIG_ACTION_ADD,Idx,RADIO_ACCESS_BEARER,Rlc_info_um);
|
||||
CH_rrc_inst[Mod_id].IP_addr_type = p->L3_info_t;
|
||||
|
||||
if(CH_rrc_inst[Mod_id].IP_addr_type == IPv4_ADDR) {
|
||||
memcpy(CH_rrc_inst[Mod_id].IP_addr,p->L3_info,4);
|
||||
} else {
|
||||
memcpy(CH_rrc_inst[Mod_id].IP_addr,p->L3_info,16);
|
||||
}
|
||||
} else {
|
||||
Mac_rlc_xface->rrc_rlc_config_req(Mod_id,CONFIG_ACTION_ADD,Idx,RADIO_ACCESS_BEARER,Rlc_info_am_config);
|
||||
}
|
||||
}
|
||||
|
||||
if(p->Lchan_desc.Lchan_t==DTCH) {
|
||||
send_msg(&S_rrc,msg_rrc_rb_establish_cfm(Mod_id,Idx,0,Trans_id));
|
||||
} else {
|
||||
send_msg(&S_rrc,msg_rrc_rb_establish_cfm(Mod_id,Idx,1,Trans_id));
|
||||
}
|
||||
}
|
||||
break;
|
||||
|
||||
|
||||
case RRM_RB_MODIFY_REQ: {
|
||||
//rrm_rb_modify_req_t *p = (rrm_rb_modify_req_t *) msg ;
|
||||
}
|
||||
|
||||
case RRM_RB_RELEASE_REQ: {
|
||||
//rrm_rb_release_req_t *p = (rrm_rb_release_req_t *) msg ;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
|
||||
}
|
||||
@@ -218,24 +218,20 @@ typedef struct {
|
||||
|
||||
typedef struct {
|
||||
char *remote_addr;
|
||||
//! remote port number for Ethernet interface
|
||||
uint16_t remote_port;
|
||||
//! remote port number for Ethernet interface (control)
|
||||
uint16_t remote_portc;
|
||||
//! remote port number for Ethernet interface (user)
|
||||
uint16_t remote_portd;
|
||||
//! local IP/MAC addr for Ethernet interface (eNB/RAU, UE)
|
||||
char *my_addr;
|
||||
//! local port number for Ethernet interface (eNB/RAU, UE)
|
||||
uint16_t my_port;
|
||||
//! local port number (control) for Ethernet interface (eNB/RAU, UE)
|
||||
uint16_t my_portc;
|
||||
//! local port number (user) for Ethernet interface (eNB/RAU, UE)
|
||||
uint16_t my_portd;
|
||||
//! local Ethernet interface (eNB/RAU, UE)
|
||||
char *local_if_name;
|
||||
//! tx_sample_advance for RF + ETH
|
||||
uint8_t tx_sample_advance;
|
||||
//! tx_scheduling_advance for RF + ETH
|
||||
uint8_t tx_scheduling_advance;
|
||||
//! iq_txshift for RF + ETH
|
||||
uint8_t iq_txshift;
|
||||
//! transport type preference (RAW/UDP)
|
||||
uint8_t transp_preference;
|
||||
//! radio front end preference (EXMIMO,USRP, BALDERF,LMSSDR)
|
||||
uint8_t rf_preference;
|
||||
} eth_params_t;
|
||||
|
||||
|
||||
@@ -282,19 +278,19 @@ struct openair0_device_t {
|
||||
*/
|
||||
int (*trx_start_func)(openair0_device *device);
|
||||
|
||||
/*! \brief Called to send a request message between RAU-RRU
|
||||
/*! \brief Called to send a request message between RAU-RRU on control port
|
||||
@param device pointer to the device structure specific to the RF hardware target
|
||||
@param msg pointer to the message structure passed between RAU-RRU
|
||||
@param msg_len length of the message
|
||||
*/
|
||||
int (*trx_request_func)(openair0_device *device, void *msg, ssize_t msg_len);
|
||||
int (*trx_ctlsend_func)(openair0_device *device, void *msg, ssize_t msg_len);
|
||||
|
||||
/*! \brief Called to send a reply message between RAU-RRU
|
||||
/*! \brief Called to receive a reply message between RAU-RRU on control port
|
||||
@param device pointer to the device structure specific to the RF hardware target
|
||||
@param msg pointer to the message structure passed between RAU-RRU
|
||||
@param msg_len length of the message
|
||||
*/
|
||||
int (*trx_reply_func)(openair0_device *device, void *msg, ssize_t msg_len);
|
||||
int (*trx_ctlrecv_func)(openair0_device *device, void *msg, ssize_t msg_len);
|
||||
|
||||
/*! \brief Called to send samples to the RF target
|
||||
@param device pointer to the device structure specific to the RF hardware target
|
||||
|
||||
@@ -64,11 +64,11 @@ int eth_socket_init_raw(openair0_device *device) {
|
||||
local_mac = device->eth_params->my_addr;
|
||||
remote_mac = malloc(ETH_ALEN);
|
||||
memset((void*)remote_mac,0,ETH_ALEN);
|
||||
printf("[%s] local MAC addr %s remote MAC addr %s\n","RRU", local_mac,remote_mac);
|
||||
printf("[%s] local MAC addr (user) %s remote MAC addr (user) %s\n","RRU", local_mac,remote_mac);
|
||||
} else {
|
||||
local_mac = device->eth_params->my_addr;
|
||||
remote_mac = device->eth_params->remote_addr;
|
||||
printf("[%s] local MAC addr %s remote MAC addr %s\n","RAU", local_mac,remote_mac);
|
||||
printf("[%s] local MAC addr (user) %s remote MAC addr (user) %s\n","RAU", local_mac,remote_mac);
|
||||
}
|
||||
|
||||
|
||||
@@ -76,46 +76,64 @@ int eth_socket_init_raw(openair0_device *device) {
|
||||
sock_dom=AF_PACKET;
|
||||
sock_type=SOCK_RAW;
|
||||
sock_proto=IPPROTO_RAW;
|
||||
if ((eth->sockfd = socket(sock_dom, sock_type, sock_proto)) == -1) {
|
||||
perror("ETHERNET: Error opening RAW socket");
|
||||
if ((eth->sockfdc = socket(sock_dom, sock_type, sock_proto)) == -1) {
|
||||
perror("ETHERNET: Error opening RAW socket (control)");
|
||||
exit(0);
|
||||
}
|
||||
if ((eth->sockfdd = socket(sock_dom, sock_type, sock_proto)) == -1) {
|
||||
perror("ETHERNET: Error opening RAW socket (user)");
|
||||
exit(0);
|
||||
}
|
||||
|
||||
/* initialize destination address */
|
||||
bzero((void *)&(eth->local_addr_ll), sizeof(struct sockaddr_ll));
|
||||
bzero((void *)&(eth->local_addrc_ll), sizeof(struct sockaddr_ll));
|
||||
bzero((void *)&(eth->local_addrd_ll), sizeof(struct sockaddr_ll));
|
||||
bzero((void *)&(eth->if_index), sizeof(struct ifreq));
|
||||
|
||||
/* Get the index of the interface to send on */
|
||||
strcpy(eth->if_index.ifr_name,eth->if_name);
|
||||
if (ioctl(eth->sockfd, SIOCGIFINDEX, &(eth->if_index)) < 0)
|
||||
if (ioctl(eth->sockfdc, SIOCGIFINDEX, &(eth->if_index)) < 0)
|
||||
perror("SIOCGIFINDEX");
|
||||
if (ioctl(eth->sockfdd, SIOCGIFINDEX, &(eth->if_index)) < 0)
|
||||
perror("SIOCGIFINDEX");
|
||||
|
||||
eth->local_addr_ll.sll_family = AF_PACKET;
|
||||
eth->local_addr_ll.sll_ifindex = eth->if_index.ifr_ifindex;
|
||||
eth->local_addrc_ll.sll_family = AF_PACKET;
|
||||
eth->local_addrc_ll.sll_ifindex = eth->if_index.ifr_ifindex;
|
||||
eth->local_addrd_ll.sll_family = AF_PACKET;
|
||||
eth->local_addrd_ll.sll_ifindex = eth->if_index.ifr_ifindex;
|
||||
/* hear traffic from specific protocol*/
|
||||
if (eth->flags == ETH_RAW_IF5_MOBIPASS) {
|
||||
eth->local_addr_ll.sll_protocol = htons(0xbffe);
|
||||
eth->local_addrd_ll.sll_protocol = htons(0xbffe);
|
||||
} else{
|
||||
eth->local_addr_ll.sll_protocol = htons((short)device->eth_params->my_port);
|
||||
eth->local_addrc_ll.sll_protocol = htons((short)device->eth_params->my_portc);
|
||||
eth->local_addrd_ll.sll_protocol = htons((short)device->eth_params->my_portd);
|
||||
}
|
||||
eth->local_addr_ll.sll_halen = ETH_ALEN;
|
||||
eth->local_addr_ll.sll_pkttype = PACKET_OTHERHOST;
|
||||
eth->local_addrc_ll.sll_halen = ETH_ALEN;
|
||||
eth->local_addrc_ll.sll_pkttype = PACKET_OTHERHOST;
|
||||
eth->local_addrd_ll.sll_halen = ETH_ALEN;
|
||||
eth->local_addrd_ll.sll_pkttype = PACKET_OTHERHOST;
|
||||
eth->addr_len = sizeof(struct sockaddr_ll);
|
||||
|
||||
if (bind(eth->sockfd,(struct sockaddr *)ð->local_addr_ll,eth->addr_len)<0) {
|
||||
perror("ETHERNET: Cannot bind to socket");
|
||||
exit(0);
|
||||
}
|
||||
if ((eth->flags != ETH_RAW_IF5_MOBIPASS ) &&
|
||||
(bind(eth->sockfdc,(struct sockaddr *)ð->local_addrc_ll,eth->addr_len)<0)) {
|
||||
perror("ETHERNET: Cannot bind to socket (control)");
|
||||
exit(0);
|
||||
}
|
||||
if (bind(eth->sockfdd,(struct sockaddr *)ð->local_addrd_ll,eth->addr_len)<0) {
|
||||
perror("ETHERNET: Cannot bind to socket (user)");
|
||||
exit(0);
|
||||
}
|
||||
|
||||
/* Construct the Ethernet header */
|
||||
ether_aton_r(local_mac, (struct ether_addr *)(&(eth->eh.ether_shost)));
|
||||
ether_aton_r(remote_mac, (struct ether_addr *)(&(eth->eh.ether_dhost)));
|
||||
ether_aton_r(local_mac, (struct ether_addr *)(&(eth->ehd.ether_shost)));
|
||||
ether_aton_r(remote_mac, (struct ether_addr *)(&(eth->ehd.ether_dhost)));
|
||||
if (eth->flags == ETH_RAW_IF5_MOBIPASS) {
|
||||
eth->eh.ether_type = htons(0xbffe);
|
||||
eth->ehd.ether_type = htons(0xbffe);
|
||||
} else {
|
||||
eth->eh.ether_type = htons((short)device->eth_params->my_port);
|
||||
eth->ehc.ether_type = htons((short)device->eth_params->my_portc);
|
||||
eth->ehd.ether_type = htons((short)device->eth_params->my_portd);
|
||||
}
|
||||
printf("[%s] binding to hardware address %x:%x:%x:%x:%x:%x\n",((device->host_type == RAU_HOST) ? "RAU": "RRU"),eth->eh.ether_shost[0],eth->eh.ether_shost[1],eth->eh.ether_shost[2],eth->eh.ether_shost[3],eth->eh.ether_shost[4],eth->eh.ether_shost[5]);
|
||||
printf("[%s] binding to hardware address %x:%x:%x:%x:%x:%x\n",((device->host_type == RAU_HOST) ? "RAU": "RRU"),eth->ehd.ether_shost[0],eth->ehd.ether_shost[1],eth->ehd.ether_shost[2],eth->ehd.ether_shost[3],eth->ehd.ether_shost[4],eth->ehd.ether_shost[5]);
|
||||
|
||||
return 0;
|
||||
}
|
||||
@@ -142,7 +160,7 @@ int trx_eth_write_raw(openair0_device *device, openair0_timestamp timestamp, voi
|
||||
openair0_timestamp temp1 = *(openair0_timestamp *)(buff2 + MAC_HEADER_SIZE_BYTES + sizeof(int32_t));
|
||||
|
||||
bytes_sent = 0;
|
||||
memcpy(buff2,(void*)ð->eh,MAC_HEADER_SIZE_BYTES);
|
||||
memcpy(buff2,(void*)ð->ehd,MAC_HEADER_SIZE_BYTES);
|
||||
*(int16_t *)(buff2 + MAC_HEADER_SIZE_BYTES + sizeof(int16_t))=1+(i<<1);
|
||||
*(openair0_timestamp *)(buff2 + MAC_HEADER_SIZE_BYTES + sizeof(int32_t)) = timestamp;
|
||||
|
||||
@@ -157,10 +175,10 @@ int trx_eth_write_raw(openair0_device *device, openair0_timestamp timestamp, voi
|
||||
bytes_sent);
|
||||
#endif
|
||||
/* Send packet */
|
||||
bytes_sent += send(eth->sockfd,
|
||||
buff2,
|
||||
RAW_PACKET_SIZE_BYTES(nsamps),
|
||||
sendto_flag);
|
||||
bytes_sent += send(eth->sockfdd,
|
||||
buff2,
|
||||
RAW_PACKET_SIZE_BYTES(nsamps),
|
||||
sendto_flag);
|
||||
if ( bytes_sent == -1) {
|
||||
eth->num_tx_errors++;
|
||||
perror("ETHERNET WRITE: ");
|
||||
@@ -212,10 +230,10 @@ int trx_eth_write_raw_IF4p5(openair0_device *device, openair0_timestamp timestam
|
||||
|
||||
eth->tx_nsamps = nblocks;
|
||||
|
||||
memcpy(buff[0], (void*)ð->eh, MAC_HEADER_SIZE_BYTES);
|
||||
memcpy(buff[0], (void*)ð->ehd, MAC_HEADER_SIZE_BYTES);
|
||||
|
||||
|
||||
bytes_sent = send(eth->sockfd,
|
||||
bytes_sent = send(eth->sockfdd,
|
||||
buff[0],
|
||||
packet_size,
|
||||
0);
|
||||
@@ -240,7 +258,8 @@ int trx_eth_read_raw(openair0_device *device, openair0_timestamp *timestamp, voi
|
||||
int i=0;
|
||||
eth_state_t *eth = (eth_state_t*)device->priv;
|
||||
int rcvfrom_flag =0;
|
||||
|
||||
int ret;
|
||||
|
||||
eth->rx_nsamps=nsamps;
|
||||
|
||||
for (i=0;i<cc;i++) {
|
||||
@@ -256,17 +275,17 @@ int trx_eth_read_raw(openair0_device *device, openair0_timestamp *timestamp, voi
|
||||
bytes_received=0;
|
||||
|
||||
while(bytes_received < RAW_PACKET_SIZE_BYTES(nsamps)) {
|
||||
bytes_received +=recv(eth->sockfd,
|
||||
buff2,
|
||||
RAW_PACKET_SIZE_BYTES(nsamps),
|
||||
rcvfrom_flag);
|
||||
ret = recv(eth->sockfdd,
|
||||
buff2,
|
||||
RAW_PACKET_SIZE_BYTES(nsamps),
|
||||
rcvfrom_flag);
|
||||
|
||||
if (bytes_received ==-1) {
|
||||
if (ret ==-1) {
|
||||
eth->num_rx_errors++;
|
||||
perror("ETHERNET IF5 READ: ");
|
||||
if (errno == EAGAIN) continue;
|
||||
exit(-1);
|
||||
return(-1);
|
||||
} else {
|
||||
bytes_received += ret;
|
||||
/* store the timestamp value from packet's header */
|
||||
*timestamp = *(openair0_timestamp *)(buff2 + MAC_HEADER_SIZE_BYTES + sizeof(int32_t));
|
||||
eth->rx_actual_nsamps=bytes_received>>2;
|
||||
@@ -303,26 +322,26 @@ int trx_eth_read_raw_IF4p5(openair0_device *device, openair0_timestamp *timestam
|
||||
|
||||
ssize_t packet_size = MAC_HEADER_SIZE_BYTES + sizeof_IF4p5_header_t;
|
||||
IF4p5_header_t *test_header = (IF4p5_header_t*)(buff[0] + MAC_HEADER_SIZE_BYTES);
|
||||
int ret;
|
||||
|
||||
#ifdef DEBUG
|
||||
printf("Reading from device %p, eth %p, sockfd %d\n",device,eth,eth->sockfd);
|
||||
#endif
|
||||
|
||||
bytes_received = recv(eth->sockfd,
|
||||
bytes_received = recv(eth->sockfdd,
|
||||
buff[0],
|
||||
packet_size,
|
||||
MSG_PEEK);
|
||||
if (bytes_received ==-1) {
|
||||
eth->num_rx_errors++;
|
||||
perror("ETHERNET IF4p5 READ (header): ");
|
||||
exit(-1);
|
||||
}
|
||||
if (bytes_received ==-1) {
|
||||
eth->num_rx_errors++;
|
||||
perror("ETHERNET IF4p5 READ (header): ");
|
||||
#ifdef DEBUG
|
||||
for (int i=0;i<packet_size;i++)
|
||||
printf("%2x.",((uint8_t*)buff[0])[i]);
|
||||
printf("\n");
|
||||
for (int i=0;i<packet_size;i++)
|
||||
printf("%2x.",((uint8_t*)buff[0])[i]);
|
||||
printf("\n");
|
||||
#endif
|
||||
|
||||
return(-1);
|
||||
}
|
||||
*timestamp = test_header->sub_type;
|
||||
|
||||
if (test_header->sub_type == IF4p5_PDLFFT) {
|
||||
@@ -335,15 +354,16 @@ int trx_eth_read_raw_IF4p5(openair0_device *device, openair0_timestamp *timestam
|
||||
|
||||
|
||||
while(bytes_received < packet_size) {
|
||||
bytes_received = recv(eth->sockfd,
|
||||
buff[0],
|
||||
packet_size,
|
||||
0);
|
||||
if (bytes_received ==-1) {
|
||||
ret = recv(eth->sockfdd,
|
||||
buff[0],
|
||||
packet_size,
|
||||
0);
|
||||
if (ret ==-1) {
|
||||
eth->num_rx_errors++;
|
||||
perror("ETHERNET IF4p5 READ (payload): ");
|
||||
exit(-1);
|
||||
return(-1);
|
||||
} else {
|
||||
bytes_received+=ret;
|
||||
eth->rx_actual_nsamps = bytes_received>>1;
|
||||
eth->rx_count++;
|
||||
}
|
||||
@@ -357,14 +377,14 @@ int trx_eth_read_raw_IF4p5(openair0_device *device, openair0_timestamp *timestam
|
||||
int trx_eth_read_raw_IF5_mobipass(openair0_device *device, openair0_timestamp *timestamp, void **buff, int nsamps, int cc) {
|
||||
// Read nblocks info from packet itself
|
||||
|
||||
int nblocks = nsamps;
|
||||
int bytes_received=0;
|
||||
eth_state_t *eth = (eth_state_t*)device->priv;
|
||||
int ret;
|
||||
|
||||
ssize_t packet_size = 28; //MAC_HEADER_SIZE_BYTES + sizeof_IF5_mobipass_header_t ;
|
||||
ssize_t packet_size = 28; //MAC_HEADER_SIZE_BYTES + sizeof_IF5_mobipass_header_t ;
|
||||
// ssize_t packet_size = MAC_HEADER_SIZE_BYTES + sizeof_IF5_mobipass_header_t + 640*sizeof(int16_t);
|
||||
|
||||
bytes_received = recv(eth->sockfd,
|
||||
bytes_received = recv(eth->sockfdd,
|
||||
buff[0],
|
||||
packet_size,
|
||||
MSG_PEEK);
|
||||
@@ -380,15 +400,16 @@ int trx_eth_read_raw_IF5_mobipass(openair0_device *device, openair0_timestamp *t
|
||||
packet_size = MAC_HEADER_SIZE_BYTES + sizeof_IF5_mobipass_header_t + 640*sizeof(int16_t);
|
||||
|
||||
while(bytes_received < packet_size) {
|
||||
bytes_received = recv(eth->sockfd,
|
||||
buff[0],
|
||||
packet_size,
|
||||
0);
|
||||
ret = recv(eth->sockfdd,
|
||||
buff[0],
|
||||
packet_size,
|
||||
0);
|
||||
if (bytes_received ==-1) {
|
||||
eth->num_rx_errors++;
|
||||
perror("[MOBIPASS] ETHERNET IF5 READ (payload): ");
|
||||
exit(-1);
|
||||
return(-1);
|
||||
} else {
|
||||
bytes_received+=ret;
|
||||
eth->rx_actual_nsamps = bytes_received>>1;
|
||||
eth->rx_count++;
|
||||
}
|
||||
@@ -398,35 +419,8 @@ int trx_eth_read_raw_IF5_mobipass(openair0_device *device, openair0_timestamp *t
|
||||
return(bytes_received);
|
||||
|
||||
|
||||
/*
|
||||
if (bytes_received > 0) {
|
||||
while(bytes_received < packet_size) {
|
||||
bytes_received = recv(eth->sockfd,
|
||||
buff[0],
|
||||
packet_size,
|
||||
0);
|
||||
if (bytes_received ==-1) {
|
||||
eth->num_rx_errors++;
|
||||
perror("ETHERNET IF5_MOBIPASS READ (payload): ");
|
||||
exit(-1);
|
||||
} else {
|
||||
eth->rx_actual_nsamps = bytes_received>>1;
|
||||
eth->rx_count++;
|
||||
}
|
||||
}
|
||||
if (bytes_received == packet_size){
|
||||
IF5_mobipass_header_t *test_header = (IF5_mobipass_header_t*)((uint8_t *)buff[0] + MAC_HEADER_SIZE_BYTES);
|
||||
*timestamp = test_header->time_stamp;
|
||||
}
|
||||
|
||||
eth->rx_nsamps = nsamps;
|
||||
}
|
||||
|
||||
return(bytes_received);
|
||||
*/
|
||||
}
|
||||
|
||||
|
||||
int eth_set_dev_conf_raw(openair0_device *device) {
|
||||
|
||||
eth_state_t *eth = (eth_state_t*)device->priv;
|
||||
@@ -441,13 +435,13 @@ int eth_set_dev_conf_raw(openair0_device *device) {
|
||||
msg_len = MAC_HEADER_SIZE_BYTES + sizeof(openair0_config_t);
|
||||
|
||||
|
||||
memcpy(msg,(void*)ð->eh,MAC_HEADER_SIZE_BYTES);
|
||||
memcpy(msg,(void*)ð->ehc,MAC_HEADER_SIZE_BYTES);
|
||||
memcpy((msg+MAC_HEADER_SIZE_BYTES),(void*)device->openair0_cfg,sizeof(openair0_config_t));
|
||||
|
||||
if (send(eth->sockfd,
|
||||
msg,
|
||||
msg_len,
|
||||
0)==-1) {
|
||||
if (send(eth->sockfdc,
|
||||
msg,
|
||||
msg_len,
|
||||
0)==-1) {
|
||||
perror("ETHERNET: ");
|
||||
exit(0);
|
||||
}
|
||||
@@ -472,13 +466,13 @@ int eth_set_dev_conf_raw_IF4p5(openair0_device *device) {
|
||||
msg_len = MAC_HEADER_SIZE_BYTES + sizeof(openair0_config_t);
|
||||
|
||||
|
||||
memcpy(msg,(void*)ð->eh,MAC_HEADER_SIZE_BYTES);
|
||||
memcpy(msg,(void*)ð->ehc,MAC_HEADER_SIZE_BYTES);
|
||||
memcpy((msg+MAC_HEADER_SIZE_BYTES),(void*)device->openair0_cfg,sizeof(openair0_config_t));
|
||||
|
||||
if (send(eth->sockfd,
|
||||
msg,
|
||||
msg_len,
|
||||
0)==-1) {
|
||||
if (send(eth->sockfdc,
|
||||
msg,
|
||||
msg_len,
|
||||
0)==-1) {
|
||||
perror("ETHERNET: ");
|
||||
exit(0);
|
||||
}
|
||||
@@ -497,7 +491,7 @@ int eth_get_dev_conf_raw(openair0_device *device) {
|
||||
msg_len = MAC_HEADER_SIZE_BYTES + sizeof(openair0_config_t);
|
||||
|
||||
/* RRU receives from RAU openair0_config_t */
|
||||
if (recv(eth->sockfd,
|
||||
if (recv(eth->sockfdc,
|
||||
msg,
|
||||
msg_len,
|
||||
0)==-1) {
|
||||
@@ -506,10 +500,10 @@ int eth_get_dev_conf_raw(openair0_device *device) {
|
||||
}
|
||||
|
||||
/* RRU stores the remote MAC address */
|
||||
memcpy(eth->eh.ether_dhost,(msg+ETH_ALEN),ETH_ALEN);
|
||||
memcpy(eth->ehd.ether_dhost,(msg+ETH_ALEN),ETH_ALEN);
|
||||
//memcpy((void*)&device->openair0_cfg,(msg + MAC_HEADER_SIZE_BYTES), sizeof(openair0_config_t));
|
||||
device->openair0_cfg=(openair0_config_t *)(msg + MAC_HEADER_SIZE_BYTES);
|
||||
printf("[%s] binding mod to hardware address %x:%x:%x:%x:%x:%x hardware address %x:%x:%x:%x:%x:%x\n",((device->host_type == RAU_HOST) ? "RAU": "RRU"),eth->eh.ether_shost[0],eth->eh.ether_shost[1],eth->eh.ether_shost[2],eth->eh.ether_shost[3],eth->eh.ether_shost[4],eth->eh.ether_shost[5],eth->eh.ether_dhost[0],eth->eh.ether_dhost[1],eth->eh.ether_dhost[2],eth->eh.ether_dhost[3],eth->eh.ether_dhost[4],eth->eh.ether_dhost[5]);
|
||||
printf("[%s] binding mod to hardware address %x:%x:%x:%x:%x:%x hardware address %x:%x:%x:%x:%x:%x\n",((device->host_type == RAU_HOST) ? "RAU": "RRU"),eth->ehd.ether_shost[0],eth->ehd.ether_shost[1],eth->ehd.ether_shost[2],eth->ehd.ether_shost[3],eth->ehd.ether_shost[4],eth->ehd.ether_shost[5],eth->ehd.ether_dhost[0],eth->ehd.ether_dhost[1],eth->ehd.ether_dhost[2],eth->ehd.ether_dhost[3],eth->ehd.ether_dhost[4],eth->ehd.ether_dhost[5]);
|
||||
|
||||
return 0;
|
||||
}
|
||||
@@ -526,7 +520,7 @@ int eth_get_dev_conf_raw_IF4p5(openair0_device *device) {
|
||||
msg_len = MAC_HEADER_SIZE_BYTES + sizeof(openair0_config_t);
|
||||
|
||||
/* RRU receives from RAU openair0_config_t */
|
||||
if (recv(eth->sockfd,
|
||||
if (recv(eth->sockfdc,
|
||||
msg,
|
||||
msg_len,
|
||||
0)==-1) {
|
||||
@@ -535,10 +529,10 @@ int eth_get_dev_conf_raw_IF4p5(openair0_device *device) {
|
||||
}
|
||||
|
||||
/* RRU stores the remote MAC address */
|
||||
memcpy(eth->eh.ether_dhost,(msg+ETH_ALEN),ETH_ALEN);
|
||||
memcpy(eth->ehd.ether_dhost,(msg+ETH_ALEN),ETH_ALEN);
|
||||
//memcpy((void*)&device->openair0_cfg,(msg + MAC_HEADER_SIZE_BYTES), sizeof(openair0_config_t));
|
||||
//device->openair0_cfg=(openair0_config_t *)(msg + MAC_HEADER_SIZE_BYTES);
|
||||
printf("[%s] binding mod to hardware address %x:%x:%x:%x:%x:%x hardware address %x:%x:%x:%x:%x:%x\n",((device->host_type == RAU_HOST) ? "RAU": "RRU"),eth->eh.ether_shost[0],eth->eh.ether_shost[1],eth->eh.ether_shost[2],eth->eh.ether_shost[3],eth->eh.ether_shost[4],eth->eh.ether_shost[5],eth->eh.ether_dhost[0],eth->eh.ether_dhost[1],eth->eh.ether_dhost[2],eth->eh.ether_dhost[3],eth->eh.ether_dhost[4],eth->eh.ether_dhost[5]);
|
||||
printf("[%s] binding mod to hardware address %x:%x:%x:%x:%x:%x hardware address %x:%x:%x:%x:%x:%x\n",((device->host_type == RAU_HOST) ? "RAU": "RRU"),eth->ehd.ether_shost[0],eth->ehd.ether_shost[1],eth->ehd.ether_shost[2],eth->ehd.ether_shost[3],eth->ehd.ether_shost[4],eth->ehd.ether_shost[5],eth->ehd.ether_dhost[0],eth->ehd.ether_dhost[1],eth->ehd.ether_dhost[2],eth->ehd.ether_dhost[3],eth->ehd.ether_dhost[4],eth->ehd.ether_dhost[5]);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
@@ -48,11 +48,8 @@
|
||||
#include "common/ran_context.h"
|
||||
|
||||
#define DEBUG 0
|
||||
//struct sockaddr_in dest_addr[MAX_INST];
|
||||
//struct sockaddr_in local_addr[MAX_INST];
|
||||
//int addr_len[MAX_INST];
|
||||
|
||||
|
||||
// These are for IF5 and must be put into the device structure if multiple RUs in the same RAU !!!!!!!!!!!!!!!!!
|
||||
uint16_t pck_seq_num = 1;
|
||||
uint16_t pck_seq_num_cur=0;
|
||||
uint16_t pck_seq_num_prev=0;
|
||||
@@ -64,25 +61,35 @@ int eth_socket_init_udp(openair0_device *device) {
|
||||
|
||||
char str_local[INET_ADDRSTRLEN];
|
||||
char str_remote[INET_ADDRSTRLEN];
|
||||
const char *local_ip, *remote_ip;
|
||||
int local_port=0, remote_port=0;
|
||||
|
||||
const char *local_ip, *remote_ipc,*remote_ipd;
|
||||
int local_portc=0,local_portd=0, remote_portc=0,remote_portd=0;
|
||||
int sock_dom=0;
|
||||
int sock_type=0;
|
||||
int sock_proto=0;
|
||||
int enable=1;
|
||||
const char str[2][4] = {"RRU\0","RAU\0"};
|
||||
int hostind = 0;
|
||||
|
||||
local_ip = eth_params->my_addr;
|
||||
local_portc = eth_params->my_portc;
|
||||
local_portd = eth_params->my_portd;
|
||||
|
||||
|
||||
if (device->host_type == RRU_HOST ) {
|
||||
local_ip = eth_params->my_addr;
|
||||
local_port = eth_params->my_port;
|
||||
remote_ip = "0.0.0.0";
|
||||
remote_port = 0;
|
||||
printf("[%s] local ip addr %s port %d\n", "RRU", local_ip, local_port);
|
||||
} else {
|
||||
local_ip = eth_params->my_addr;
|
||||
local_port = eth_params->my_port;
|
||||
remote_ip = eth_params->remote_addr;
|
||||
remote_port = eth_params->remote_port;
|
||||
printf("[%s] local ip addr %s port %d\n","RAU", local_ip, local_port);
|
||||
|
||||
remote_ipc = "0.0.0.0";
|
||||
remote_ipd = eth_params->remote_addr;
|
||||
remote_portc = 0;
|
||||
remote_portd = eth_params->remote_portd;;
|
||||
printf("[%s] local ip addr %s portc %d portd %d\n", "RRU", local_ip, local_portc, local_portd);
|
||||
} else {
|
||||
remote_ipc = eth_params->remote_addr;
|
||||
remote_ipd = "0.0.0.0";
|
||||
remote_portc = eth_params->remote_portc;
|
||||
remote_portd = 0;
|
||||
hostind = 1;
|
||||
printf("[%s] local ip addr %s portc %d portd %d\n","RAU", local_ip, local_portc, local_portd);
|
||||
}
|
||||
|
||||
/* Open socket to send on */
|
||||
@@ -90,43 +97,69 @@ int eth_socket_init_udp(openair0_device *device) {
|
||||
sock_type=SOCK_DGRAM;
|
||||
sock_proto=IPPROTO_UDP;
|
||||
|
||||
if ((eth->sockfd = socket(sock_dom, sock_type, sock_proto)) == -1) {
|
||||
perror("ETHERNET: Error opening socket");
|
||||
if ((eth->sockfdc = socket(sock_dom, sock_type, sock_proto)) == -1) {
|
||||
perror("ETHERNET: Error opening socket (control)");
|
||||
exit(0);
|
||||
}
|
||||
|
||||
if ((eth->sockfdd = socket(sock_dom, sock_type, sock_proto)) == -1) {
|
||||
perror("ETHERNET: Error opening socket (user)");
|
||||
exit(0);
|
||||
}
|
||||
|
||||
/* initialize addresses */
|
||||
bzero((void *)&(eth->dest_addr), sizeof(eth->dest_addr));
|
||||
bzero((void *)&(eth->local_addr), sizeof(eth->local_addr));
|
||||
bzero((void *)&(eth->dest_addrc), sizeof(eth->dest_addrc));
|
||||
bzero((void *)&(eth->local_addrc), sizeof(eth->local_addrc));
|
||||
bzero((void *)&(eth->dest_addrd), sizeof(eth->dest_addrd));
|
||||
bzero((void *)&(eth->local_addrd), sizeof(eth->local_addrd));
|
||||
|
||||
|
||||
eth->addr_len = sizeof(struct sockaddr_in);
|
||||
|
||||
eth->dest_addr.sin_family = AF_INET;
|
||||
inet_pton(AF_INET,remote_ip,&(eth->dest_addr.sin_addr.s_addr));
|
||||
eth->dest_addr.sin_port=htons(remote_port);
|
||||
inet_ntop(AF_INET, &(eth->dest_addr.sin_addr), str_remote, INET_ADDRSTRLEN);
|
||||
eth->dest_addrc.sin_family = AF_INET;
|
||||
inet_pton(AF_INET,remote_ipc,&(eth->dest_addrc.sin_addr.s_addr));
|
||||
eth->dest_addrc.sin_port=htons(remote_portc);
|
||||
inet_ntop(AF_INET, &(eth->dest_addrc.sin_addr), str_remote, INET_ADDRSTRLEN);
|
||||
|
||||
eth->dest_addrd.sin_family = AF_INET;
|
||||
inet_pton(AF_INET,remote_ipd,&(eth->dest_addrd.sin_addr.s_addr));
|
||||
eth->dest_addrd.sin_port=htons(remote_portd);
|
||||
|
||||
eth->local_addrc.sin_family = AF_INET;
|
||||
inet_pton(AF_INET,local_ip,&(eth->local_addrc.sin_addr.s_addr));
|
||||
eth->local_addrc.sin_port=htons(local_portc);
|
||||
inet_ntop(AF_INET, &(eth->local_addrc.sin_addr), str_local, INET_ADDRSTRLEN);
|
||||
|
||||
eth->local_addrd.sin_family = AF_INET;
|
||||
inet_pton(AF_INET,local_ip,&(eth->local_addrd.sin_addr.s_addr));
|
||||
eth->local_addrd.sin_port=htons(local_portd);
|
||||
|
||||
|
||||
eth->local_addr.sin_family = AF_INET;
|
||||
inet_pton(AF_INET,local_ip,&(eth->local_addr.sin_addr.s_addr));
|
||||
eth->local_addr.sin_port=htons(local_port);
|
||||
inet_ntop(AF_INET, &(eth->local_addr.sin_addr), str_local, INET_ADDRSTRLEN);
|
||||
|
||||
|
||||
/* set reuse address flag */
|
||||
if (setsockopt(eth->sockfd, SOL_SOCKET, SO_REUSEADDR, &enable, sizeof(int))) {
|
||||
perror("ETHERNET: Cannot set SO_REUSEADDR option on socket");
|
||||
if (setsockopt(eth->sockfdc, SOL_SOCKET, SO_REUSEADDR, &enable, sizeof(int))) {
|
||||
perror("ETHERNET: Cannot set SO_REUSEADDR option on socket (control)");
|
||||
exit(0);
|
||||
}
|
||||
if (setsockopt(eth->sockfdd, SOL_SOCKET, SO_REUSEADDR, &enable, sizeof(int))) {
|
||||
perror("ETHERNET: Cannot set SO_REUSEADDR option on socket (user)");
|
||||
exit(0);
|
||||
}
|
||||
|
||||
/* want to receive -> so bind */
|
||||
if (bind(eth->sockfd,(struct sockaddr *)ð->local_addr,eth->addr_len)<0) {
|
||||
perror("ETHERNET: Cannot bind to socket");
|
||||
exit(0);
|
||||
} else {
|
||||
printf("[%s] binding to %s:%d\n","RAU",str_local,ntohs(eth->local_addr.sin_port));
|
||||
}
|
||||
if (bind(eth->sockfdc,(struct sockaddr *)ð->local_addrc,eth->addr_len)<0) {
|
||||
perror("ETHERNET: Cannot bind to socket (control)");
|
||||
exit(0);
|
||||
} else {
|
||||
printf("[%s] binding to %s:%d (control)\n",str[hostind],str_local,ntohs(eth->local_addrc.sin_port));
|
||||
}
|
||||
if (bind(eth->sockfdd,(struct sockaddr *)ð->local_addrd,eth->addr_len)<0) {
|
||||
perror("ETHERNET: Cannot bind to socket (user)");
|
||||
exit(0);
|
||||
} else {
|
||||
printf("[%s] binding to %s:%d (user)\n",str[hostind],str_local,ntohs(eth->local_addrd.sin_port));
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
@@ -142,39 +175,26 @@ int trx_eth_read_udp_IF4p5(openair0_device *device, openair0_timestamp *timestam
|
||||
IF4p5_header_t *test_header = (IF4p5_header_t*)(buff[0]);
|
||||
|
||||
int block_cnt=0;
|
||||
int again_cnt=0;
|
||||
|
||||
packet_size = max(UDP_IF4p5_PRACH_SIZE_BYTES, max(UDP_IF4p5_PULFFT_SIZE_BYTES(nblocks), UDP_IF4p5_PDLFFT_SIZE_BYTES(nblocks)));
|
||||
|
||||
while(bytes_received == -1) {
|
||||
again:
|
||||
bytes_received = recvfrom(eth->sockfd,
|
||||
bytes_received = recvfrom(eth->sockfdd,
|
||||
buff[0],
|
||||
packet_size,
|
||||
0,
|
||||
(struct sockaddr *)ð->dest_addr,
|
||||
(struct sockaddr *)ð->dest_addrd,
|
||||
(socklen_t *)ð->addr_len);
|
||||
if (bytes_received ==-1) {
|
||||
eth->num_rx_errors++;
|
||||
if (errno == EAGAIN) {
|
||||
/*
|
||||
again_cnt++;
|
||||
usleep(10);
|
||||
if (again_cnt == 1000) {
|
||||
perror("ETHERNET IF4p5 READ (EAGAIN): ");
|
||||
exit(-1);
|
||||
} else {
|
||||
printf("AGAIN AGAIN AGAIN AGAIN AGAIN AGAIN AGAIN AGAIN AGAIN AGAIN AGAIN AGAIN \n");
|
||||
goto again;
|
||||
}
|
||||
*/
|
||||
printf("Lost IF4p5 connection with %s\n", inet_ntoa(eth->dest_addr.sin_addr));
|
||||
exit(-1);
|
||||
printf("Lost IF4p5 connection with %s\n", inet_ntoa(eth->dest_addrd.sin_addr));
|
||||
} else if (errno == EWOULDBLOCK) {
|
||||
block_cnt++;
|
||||
usleep(10);
|
||||
if (block_cnt == 1000) {
|
||||
perror("ETHERNET IF4p5 READ (EWOULDBLOCK): ");
|
||||
exit(-1);
|
||||
} else {
|
||||
printf("BLOCK BLOCK BLOCK BLOCK BLOCK BLOCK BLOCK BLOCK BLOCK BLOCK BLOCK BLOCK \n");
|
||||
goto again;
|
||||
@@ -182,7 +202,6 @@ int trx_eth_read_udp_IF4p5(openair0_device *device, openair0_timestamp *timestam
|
||||
} else {
|
||||
perror("ETHERNET IF4p5 READ");
|
||||
printf("(%s):\n", strerror(errno));
|
||||
exit(-1);
|
||||
}
|
||||
} else {
|
||||
*timestamp = test_header->sub_type;
|
||||
@@ -208,7 +227,7 @@ int trx_eth_write_udp_IF4p5(openair0_device *device, openair0_timestamp timestam
|
||||
|
||||
char str[INET_ADDRSTRLEN];
|
||||
|
||||
inet_ntop(AF_INET, &(eth->dest_addr.sin_addr), str, INET_ADDRSTRLEN);
|
||||
inet_ntop(AF_INET, &(eth->dest_addrd.sin_addr), str, INET_ADDRSTRLEN);
|
||||
|
||||
if (flags == IF4p5_PDLFFT) {
|
||||
packet_size = UDP_IF4p5_PDLFFT_SIZE_BYTES(nblocks);
|
||||
@@ -224,18 +243,18 @@ int trx_eth_write_udp_IF4p5(openair0_device *device, openair0_timestamp timestam
|
||||
}
|
||||
|
||||
eth->tx_nsamps = nblocks;
|
||||
//printf("Sending %d bytes to %s\n",packet_size,str);
|
||||
// printf("Sending %d bytes to %s:%d\n",packet_size,str,ntohs(eth->local_addrd.sin_port));
|
||||
|
||||
bytes_sent = sendto(eth->sockfd,
|
||||
bytes_sent = sendto(eth->sockfdd,
|
||||
buff[0],
|
||||
packet_size,
|
||||
0,
|
||||
(struct sockaddr*)ð->dest_addr,
|
||||
(struct sockaddr*)ð->dest_addrd,
|
||||
eth->addr_len);
|
||||
|
||||
if (bytes_sent == -1) {
|
||||
eth->num_tx_errors++;
|
||||
perror("ETHERNET WRITE: ");
|
||||
perror("error writing to remote unit (user) : ");
|
||||
exit(-1);
|
||||
} else {
|
||||
eth->tx_actual_nsamps = bytes_sent>>1;
|
||||
@@ -284,11 +303,11 @@ int trx_eth_write_udp(openair0_device *device, openair0_timestamp timestamp, voi
|
||||
bytes_sent);
|
||||
#endif
|
||||
/* Send packet */
|
||||
bytes_sent += sendto(eth->sockfd,
|
||||
bytes_sent += sendto(eth->sockfdd,
|
||||
buff2,
|
||||
UDP_PACKET_SIZE_BYTES(nsamps),
|
||||
sendto_flag,
|
||||
(struct sockaddr*)ð->dest_addr,
|
||||
(struct sockaddr*)ð->dest_addrd,
|
||||
eth->addr_len);
|
||||
|
||||
if ( bytes_sent == -1) {
|
||||
@@ -353,11 +372,11 @@ int trx_eth_read_udp(openair0_device *device, openair0_timestamp *timestamp, voi
|
||||
UDP_PACKET_SIZE_BYTES(nsamps) - bytes_received,
|
||||
bytes_received);
|
||||
#endif
|
||||
bytes_received +=recvfrom(eth->sockfd,
|
||||
bytes_received +=recvfrom(eth->sockfdd,
|
||||
buff2,
|
||||
UDP_PACKET_SIZE_BYTES(nsamps),
|
||||
rcvfrom_flag,
|
||||
(struct sockaddr *)ð->dest_addr,
|
||||
(struct sockaddr *)ð->dest_addrd,
|
||||
(socklen_t *)ð->addr_len);
|
||||
|
||||
if (bytes_received ==-1) {
|
||||
@@ -421,205 +440,25 @@ int trx_eth_read_udp(openair0_device *device, openair0_timestamp *timestamp, voi
|
||||
}
|
||||
return (bytes_received-APP_HEADER_SIZE_BYTES)>>2;
|
||||
}
|
||||
|
||||
|
||||
|
||||
int trx_eth_ctlsend_udp(openair0_device *device, void *msg, ssize_t msg_len) {
|
||||
|
||||
int eth_set_dev_conf_udp(openair0_device *device) {
|
||||
|
||||
eth_state_t *eth = (eth_state_t*)device->priv;
|
||||
ssize_t msg_len,len;
|
||||
RRU_CONFIG_msg_t rru_config_msg;
|
||||
int received_capabilities=0;
|
||||
char str[INET_ADDRSTRLEN];
|
||||
|
||||
inet_ntop(AF_INET, &(eth->dest_addr.sin_addr), str, INET_ADDRSTRLEN);
|
||||
|
||||
// Wait for capabilities
|
||||
while (received_capabilities==0) {
|
||||
|
||||
rru_config_msg.type = RAU_tick;
|
||||
rru_config_msg.len = sizeof(RRU_CONFIG_msg_t)-MAX_RRU_CONFIG_SIZE;
|
||||
printf("Sending RAU tick to RRU on %s\n",str);
|
||||
if (sendto(eth->sockfd,&rru_config_msg,rru_config_msg.len,0,(struct sockaddr *)ð->dest_addr,eth->addr_len)==-1) {
|
||||
perror("ETHERNET: sendto conf_udp");
|
||||
printf("addr_len : %d, msg_len %d\n",eth->addr_len,msg_len);
|
||||
exit(0);
|
||||
}
|
||||
|
||||
msg_len = sizeof(RRU_CONFIG_msg_t)-MAX_RRU_CONFIG_SIZE+sizeof(RRU_capabilities_t);
|
||||
|
||||
// wait for answer with timeout
|
||||
if (len = recvfrom(eth->sockfd,
|
||||
&rru_config_msg,
|
||||
msg_len,
|
||||
0,
|
||||
(struct sockaddr *)ð->dest_addr,
|
||||
(socklen_t *)ð->addr_len)<0) {
|
||||
printf("Waiting for RRU on %s\n",str);
|
||||
}
|
||||
else if (rru_config_msg.type == RRU_capabilities) {
|
||||
AssertFatal(rru_config_msg.len==msg_len,"Received capabilities with incorrect length (%d!=%d)\n",rru_config_msg.len,msg_len);
|
||||
printf("Received capabilities from RRU on %s (len %d/%d, num_bands %d,max_pdschReferenceSignalPower %d, max_rxgain %d, nb_tx %d, nb_rx %d)\n",str,
|
||||
rru_config_msg.len,msg_len,
|
||||
((RRU_capabilities_t*)&rru_config_msg.msg[0])->num_bands,
|
||||
((RRU_capabilities_t*)&rru_config_msg.msg[0])->max_pdschReferenceSignalPower[0],
|
||||
((RRU_capabilities_t*)&rru_config_msg.msg[0])->max_rxgain[0],
|
||||
((RRU_capabilities_t*)&rru_config_msg.msg[0])->nb_tx[0],
|
||||
((RRU_capabilities_t*)&rru_config_msg.msg[0])->nb_rx[0]);
|
||||
received_capabilities=1;
|
||||
}
|
||||
else {
|
||||
printf("Received incorrect message %d from RRU on %s\n",rru_config_msg.type,str);
|
||||
}
|
||||
}
|
||||
AssertFatal(device->configure_rru!=NULL,"device->configure_rru is null for RRU %d, shouldn't be ...\n",device->Mod_id);
|
||||
device->configure_rru(device->Mod_id,
|
||||
(RRU_capabilities_t *)&rru_config_msg.msg[0]);
|
||||
|
||||
rru_config_msg.type = RRU_config;
|
||||
rru_config_msg.len = sizeof(RRU_CONFIG_msg_t)-MAX_RRU_CONFIG_SIZE+sizeof(RRU_config_t);
|
||||
printf("Sending Configuration to RRU on %s (num_bands %d,band0 %d,txfreq %u,rxfreq %u,att_tx %d,att_rx %d,N_RB_DL %d,N_RB_UL %d,3/4FS %d, prach_FO %d, prach_CI %d)\n",str,
|
||||
((RRU_config_t *)&rru_config_msg.msg[0])->num_bands,
|
||||
((RRU_config_t *)&rru_config_msg.msg[0])->band_list[0],
|
||||
((RRU_config_t *)&rru_config_msg.msg[0])->tx_freq[0],
|
||||
((RRU_config_t *)&rru_config_msg.msg[0])->rx_freq[0],
|
||||
((RRU_config_t *)&rru_config_msg.msg[0])->att_tx[0],
|
||||
((RRU_config_t *)&rru_config_msg.msg[0])->att_rx[0],
|
||||
((RRU_config_t *)&rru_config_msg.msg[0])->N_RB_DL[0],
|
||||
((RRU_config_t *)&rru_config_msg.msg[0])->N_RB_UL[0],
|
||||
((RRU_config_t *)&rru_config_msg.msg[0])->threequarter_fs[0],
|
||||
((RRU_config_t *)&rru_config_msg.msg[0])->prach_FreqOffset[0],
|
||||
((RRU_config_t *)&rru_config_msg.msg[0])->prach_ConfigIndex[0]);
|
||||
if (sendto(eth->sockfd,&rru_config_msg,rru_config_msg.len,0,(struct sockaddr *)ð->dest_addr,eth->addr_len)==-1) {
|
||||
perror("ETHERNET: sendto conf_udp");
|
||||
printf("addr_len : %d, msg_len %d\n",eth->addr_len,msg_len);
|
||||
exit(0);
|
||||
}
|
||||
|
||||
return 0;
|
||||
return(sendto(((eth_state_t*)device->priv)->sockfdc,
|
||||
msg,
|
||||
msg_len,
|
||||
0,
|
||||
(struct sockaddr *)&((eth_state_t*)device->priv)->dest_addrc,
|
||||
((eth_state_t*)device->priv)->addr_len));
|
||||
}
|
||||
|
||||
extern RAN_CONTEXT_t RC;
|
||||
|
||||
int eth_get_dev_conf_udp(openair0_device *device) {
|
||||
|
||||
eth_state_t *eth = (eth_state_t*)device->priv;
|
||||
char str1[INET_ADDRSTRLEN],str[INET_ADDRSTRLEN];
|
||||
void *msg;
|
||||
RRU_CONFIG_msg_t rru_config_msg;
|
||||
ssize_t msg_len;
|
||||
int tick_received = 0;
|
||||
int configuration_received = 0;
|
||||
RRU_capabilities_t *cap;
|
||||
RU_t *ru = RC.ru[0];
|
||||
int i;
|
||||
|
||||
inet_ntop(AF_INET, &(eth->local_addr.sin_addr), str, INET_ADDRSTRLEN);
|
||||
inet_ntop(AF_INET, &(eth->dest_addr.sin_addr), str1, INET_ADDRSTRLEN);
|
||||
int trx_eth_ctlrecv_udp(openair0_device *device, void *msg, ssize_t msg_len) {
|
||||
|
||||
|
||||
// wait for RAU_tick
|
||||
while (tick_received == 0) {
|
||||
|
||||
msg_len = sizeof(RRU_CONFIG_msg_t)-MAX_RRU_CONFIG_SIZE;
|
||||
|
||||
if (recvfrom(eth->sockfd,
|
||||
&rru_config_msg,
|
||||
msg_len,
|
||||
0,
|
||||
(struct sockaddr *)ð->dest_addr,
|
||||
(socklen_t *)ð->addr_len)<0) {
|
||||
printf("RRU on %s Waiting for RAU on %s\n",str,str1);
|
||||
|
||||
}
|
||||
else {
|
||||
if (rru_config_msg.type == RAU_tick) {
|
||||
printf("Tick received from RAU on %s\n",str1);
|
||||
tick_received = 1;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
// send capabilities
|
||||
|
||||
rru_config_msg.type = RRU_capabilities;
|
||||
rru_config_msg.len = sizeof(RRU_CONFIG_msg_t)-MAX_RRU_CONFIG_SIZE+sizeof(RRU_capabilities_t);
|
||||
cap = (RRU_capabilities_t*)&rru_config_msg.msg[0];
|
||||
printf("Sending Capabilities (len %d, num_bands %d,max_pdschReferenceSignalPower %d, max_rxgain %d, nb_tx %d, nb_rx %d)\n",
|
||||
rru_config_msg.len,ru->num_bands,ru->max_pdschReferenceSignalPower,ru->max_rxgain,ru->nb_tx,ru->nb_rx);
|
||||
switch (ru->function) {
|
||||
case NGFI_RRU_IF4p5:
|
||||
cap->FH_fmt = OAI_IF4p5_only;
|
||||
break;
|
||||
case NGFI_RRU_IF5:
|
||||
cap->FH_fmt = OAI_IF5_only;
|
||||
break;
|
||||
case MBP_RRU_IF5:
|
||||
cap->FH_fmt = MBP_IF5;
|
||||
break;
|
||||
default:
|
||||
AssertFatal(1==0,"RU_function is unknown %d\n",RC.ru[0]->function);
|
||||
break;
|
||||
}
|
||||
cap->num_bands = ru->num_bands;
|
||||
for (i=0;i<ru->num_bands;i++) {
|
||||
cap->band_list[i] = ru->band[i];
|
||||
cap->nb_rx[i] = ru->nb_rx;
|
||||
cap->nb_tx[i] = ru->nb_tx;
|
||||
cap->max_pdschReferenceSignalPower[i] = ru->max_pdschReferenceSignalPower;
|
||||
cap->max_rxgain[i] = ru->max_rxgain;
|
||||
}
|
||||
if (sendto(eth->sockfd,&rru_config_msg,rru_config_msg.len,0,(struct sockaddr *)ð->dest_addr,eth->addr_len)==-1) {
|
||||
perror("ETHERNET: sendto conf_udp");
|
||||
printf("addr_len : %d, msg_len %d\n",eth->addr_len,msg_len);
|
||||
exit(0);
|
||||
}
|
||||
|
||||
// wait for configuration
|
||||
rru_config_msg.len = sizeof(RRU_CONFIG_msg_t)-MAX_RRU_CONFIG_SIZE+sizeof(RRU_config_t);
|
||||
while (configuration_received == 0) {
|
||||
|
||||
if (recvfrom(eth->sockfd,
|
||||
&rru_config_msg,
|
||||
rru_config_msg.len,
|
||||
0,
|
||||
(struct sockaddr *)ð->dest_addr,
|
||||
(socklen_t *)ð->addr_len)==-1) {
|
||||
printf("Waiting for configuration from RAU on %s\n",str1);
|
||||
}
|
||||
else {
|
||||
printf("Configuration received from RAU on %s (num_bands %d,band0 %d,txfreq %u,rxfreq %u,att_tx %d,att_rx %d,N_RB_DL %d,N_RB_UL %d,3/4FS %d, prach_FO %d, prach_CI %d)\n",str,
|
||||
((RRU_config_t *)&rru_config_msg.msg[0])->num_bands,
|
||||
((RRU_config_t *)&rru_config_msg.msg[0])->band_list[0],
|
||||
((RRU_config_t *)&rru_config_msg.msg[0])->tx_freq[0],
|
||||
((RRU_config_t *)&rru_config_msg.msg[0])->rx_freq[0],
|
||||
((RRU_config_t *)&rru_config_msg.msg[0])->att_tx[0],
|
||||
((RRU_config_t *)&rru_config_msg.msg[0])->att_rx[0],
|
||||
((RRU_config_t *)&rru_config_msg.msg[0])->N_RB_DL[0],
|
||||
((RRU_config_t *)&rru_config_msg.msg[0])->N_RB_UL[0],
|
||||
((RRU_config_t *)&rru_config_msg.msg[0])->threequarter_fs[0],
|
||||
((RRU_config_t *)&rru_config_msg.msg[0])->prach_FreqOffset[0],
|
||||
((RRU_config_t *)&rru_config_msg.msg[0])->prach_ConfigIndex[0]);
|
||||
|
||||
AssertFatal(device->configure_rru!=NULL,"device->configure_rru is null for RRU %d\n",device->Mod_id);
|
||||
device->configure_rru(device->Mod_id,
|
||||
(void*)&rru_config_msg.msg[0]);
|
||||
configuration_received = 1;
|
||||
}
|
||||
}
|
||||
// device->openair0_cfg=(openair0_config_t *)msg;
|
||||
|
||||
/* get remote ip address and port */
|
||||
/* inet_ntop(AF_INET, &(eth->dest_addr.sin_addr), str1, INET_ADDRSTRLEN); */
|
||||
/* device->openair0_cfg->remote_port =ntohs(eth->dest_addr.sin_port); */
|
||||
/* device->openair0_cfg->remote_addr =str1; */
|
||||
|
||||
/* /\* restore local ip address and port *\/ */
|
||||
/* inet_ntop(AF_INET, &(eth->local_addr.sin_addr), str, INET_ADDRSTRLEN); */
|
||||
/* device->openair0_cfg->my_port =ntohs(eth->local_addr.sin_port); */
|
||||
/* device->openair0_cfg->my_addr =str; */
|
||||
|
||||
/* printf("[RRU] mod_%d socket %d connected to BBU %s:%d %s:%d\n", Mod_id, eth->sockfd,str1, device->openair0_cfg->remote_port, str, device->openair0_cfg->my_port); */
|
||||
return 0;
|
||||
return (recvfrom(((eth_state_t*)device->priv)->sockfdc,
|
||||
msg,
|
||||
msg_len,
|
||||
0,
|
||||
(struct sockaddr *)&((eth_state_t*)device->priv)->dest_addrc,
|
||||
(socklen_t *)&((eth_state_t*)device->priv)->addr_len));
|
||||
}
|
||||
|
||||
@@ -58,11 +58,13 @@ int trx_eth_start(openair0_device *device) {
|
||||
printf("Setting Timenout to 999999 usecs\n");
|
||||
if(ethernet_tune (device,RCV_TIMEOUT,999999)!=0) return -1;
|
||||
|
||||
/*
|
||||
if (device->host_type == RAU_HOST) {
|
||||
if(eth_set_dev_conf_raw(device)!=0) return -1;
|
||||
} else {
|
||||
if(eth_get_dev_conf_raw(device)!=0) return -1;
|
||||
}
|
||||
}*/
|
||||
|
||||
/* adjust MTU wrt number of samples per packet */
|
||||
if(ethernet_tune (device,MTU_SIZE,RAW_PACKET_SIZE_BYTES(device->openair0_cfg->samples_per_packet))!=0) return -1;
|
||||
if(ethernet_tune (device,RCV_TIMEOUT,999999)!=0) return -1;
|
||||
@@ -74,12 +76,14 @@ int trx_eth_start(openair0_device *device) {
|
||||
printf("Setting Timenout to 999999 usecs\n");
|
||||
if(ethernet_tune (device,RCV_TIMEOUT,999999)!=0) return -1;
|
||||
|
||||
/* RRU gets openair0 device configuration - RAU sets openair0 device configuration*/
|
||||
/*
|
||||
if (device->host_type == RAU_HOST) {
|
||||
if(eth_set_dev_conf_raw_IF4p5(device)!=0) return -1;
|
||||
} else {
|
||||
if(eth_get_dev_conf_raw_IF4p5(device)!=0) return -1;
|
||||
}
|
||||
*/
|
||||
|
||||
/* adjust MTU wrt number of samples per packet */
|
||||
if(ethernet_tune (device,MTU_SIZE,RAW_IF4p5_PRACH_SIZE_BYTES)!=0) return -1;
|
||||
if(ethernet_tune (device,RCV_TIMEOUT,999999)!=0) return -1;
|
||||
@@ -87,15 +91,16 @@ int trx_eth_start(openair0_device *device) {
|
||||
printf("Setting ETHERNET to UDP_IF4p5_MODE\n");
|
||||
if (eth_socket_init_udp(device)!=0) return -1;
|
||||
|
||||
// printf("Setting Timeout to 999999 usecs\n");
|
||||
// if(ethernet_tune (device,RCV_TIMEOUT,999999)!=0) return -1;
|
||||
|
||||
printf("Setting Timeout to 999999 usecs\n");
|
||||
if(ethernet_tune (device,RCV_TIMEOUT,999999)!=0) return -1;
|
||||
|
||||
/*
|
||||
if (device->host_type == RAU_HOST) {
|
||||
if(eth_set_dev_conf_udp(device)!=0) return -1;
|
||||
} else {
|
||||
if(eth_get_dev_conf_udp(device)!=0) return -1;
|
||||
}
|
||||
*/
|
||||
|
||||
/* adjust MTU wrt number of samples per packet */
|
||||
/*if(ethernet_tune (device,MTU_SIZE,UDP_IF4p5_PRACH_SIZE_BYTES)!=0) return -1;
|
||||
@@ -111,12 +116,13 @@ int trx_eth_start(openair0_device *device) {
|
||||
} else {
|
||||
printf("Setting ETHERNET to UDP_IF5_MODE\n");
|
||||
if (eth_socket_init_udp(device)!=0) return -1;
|
||||
/* RRU gets openair0 device configuration - RAU sets openair0 device configuration*/
|
||||
|
||||
/*
|
||||
if (device->host_type == RAU_HOST) {
|
||||
if(eth_set_dev_conf_udp(device)!=0) return -1;
|
||||
} else {
|
||||
if(eth_get_dev_conf_udp(device)!=0) return -1;
|
||||
}
|
||||
}*/
|
||||
|
||||
/* adjust MTU wrt number of samples per packet */
|
||||
if(ethernet_tune (device,MTU_SIZE,UDP_IF4p5_PRACH_SIZE_BYTES)!=0) return -1;
|
||||
@@ -135,7 +141,7 @@ void trx_eth_end(openair0_device *device) {
|
||||
|
||||
eth_state_t *eth = (eth_state_t*)device->priv;
|
||||
/* destroys socket only for the processes that call the eth_end fuction-- shutdown() for beaking the pipe */
|
||||
if ( close(eth->sockfd) <0 ) {
|
||||
if ( close(eth->sockfdd) <0 ) {
|
||||
perror("ETHERNET: Failed to close socket");
|
||||
exit(0);
|
||||
} else {
|
||||
@@ -144,43 +150,6 @@ void trx_eth_end(openair0_device *device) {
|
||||
}
|
||||
|
||||
|
||||
int trx_eth_request(openair0_device *device, void *msg, ssize_t msg_len) {
|
||||
|
||||
eth_state_t *eth = (eth_state_t*)device->priv;
|
||||
|
||||
/* RAU sends a message to RRU */
|
||||
|
||||
if (sendto(eth->sockfd,msg,msg_len,0,(struct sockaddr *)ð->dest_addr,eth->addr_len)==-1) {
|
||||
perror("ETHERNET: ");
|
||||
exit(0);
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
int trx_eth_reply(openair0_device *device, void *msg, ssize_t msg_len) {
|
||||
|
||||
eth_state_t *eth = (eth_state_t*)device->priv;
|
||||
|
||||
/* RRU receives from RAU a message */
|
||||
|
||||
if (recvfrom(eth->sockfd,
|
||||
msg,
|
||||
msg_len,
|
||||
0,
|
||||
(struct sockaddr *)ð->dest_addr,
|
||||
(socklen_t *)ð->addr_len)==-1) {
|
||||
perror("ETHERNET: recv_from in trx_eth_reply ");
|
||||
exit(0);
|
||||
}
|
||||
|
||||
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
|
||||
int trx_eth_stop(openair0_device *device) {
|
||||
return(0);
|
||||
}
|
||||
@@ -217,7 +186,7 @@ int ethernet_tune(openair0_device *device, unsigned int option, int value) {
|
||||
/****************** socket level options ************************/
|
||||
switch(option) {
|
||||
case SND_BUF_SIZE: /* transmit socket buffer size */
|
||||
if (setsockopt(eth->sockfd,
|
||||
if (setsockopt(eth->sockfdd,
|
||||
SOL_SOCKET,
|
||||
SO_SNDBUF,
|
||||
&value,sizeof(value))) {
|
||||
@@ -228,7 +197,7 @@ int ethernet_tune(openair0_device *device, unsigned int option, int value) {
|
||||
break;
|
||||
|
||||
case RCV_BUF_SIZE: /* receive socket buffer size */
|
||||
if (setsockopt(eth->sockfd,
|
||||
if (setsockopt(eth->sockfdd,
|
||||
SOL_SOCKET,
|
||||
SO_RCVBUF,
|
||||
&value,sizeof(value))) {
|
||||
@@ -241,7 +210,15 @@ int ethernet_tune(openair0_device *device, unsigned int option, int value) {
|
||||
case RCV_TIMEOUT:
|
||||
timeout.tv_sec = value/1000000;
|
||||
timeout.tv_usec = value%1000000;//less than rt_period?
|
||||
if (setsockopt(eth->sockfd,
|
||||
if (setsockopt(eth->sockfdc,
|
||||
SOL_SOCKET,
|
||||
SO_RCVTIMEO,
|
||||
(char *)&timeout,sizeof(timeout))) {
|
||||
perror("[ETHERNET] setsockopt()");
|
||||
} else {
|
||||
printf( "receive timeout= %u usec\n",(unsigned int)timeout.tv_usec);
|
||||
}
|
||||
if (setsockopt(eth->sockfdd,
|
||||
SOL_SOCKET,
|
||||
SO_RCVTIMEO,
|
||||
(char *)&timeout,sizeof(timeout))) {
|
||||
@@ -254,7 +231,15 @@ int ethernet_tune(openair0_device *device, unsigned int option, int value) {
|
||||
case SND_TIMEOUT:
|
||||
timeout.tv_sec = value/1000000000;
|
||||
timeout.tv_usec = value%1000000000;//less than rt_period?
|
||||
if (setsockopt(eth->sockfd,
|
||||
if (setsockopt(eth->sockfdc,
|
||||
SOL_SOCKET,
|
||||
SO_SNDTIMEO,
|
||||
(char *)&timeout,sizeof(timeout))) {
|
||||
perror("[ETHERNET] setsockopt()");
|
||||
} else {
|
||||
printf( "send timeout= %d,%d sec\n",(int)timeout.tv_sec,(int)timeout.tv_usec);
|
||||
}
|
||||
if (setsockopt(eth->sockfdd,
|
||||
SOL_SOCKET,
|
||||
SO_SNDTIMEO,
|
||||
(char *)&timeout,sizeof(timeout))) {
|
||||
@@ -270,7 +255,7 @@ int ethernet_tune(openair0_device *device, unsigned int option, int value) {
|
||||
ifr.ifr_addr.sa_family = AF_INET;
|
||||
strncpy(ifr.ifr_name,eth->if_name, sizeof(ifr.ifr_name));
|
||||
ifr.ifr_mtu =value;
|
||||
if (ioctl(eth->sockfd,SIOCSIFMTU,(caddr_t)&ifr) < 0 )
|
||||
if (ioctl(eth->sockfdd,SIOCSIFMTU,(caddr_t)&ifr) < 0 )
|
||||
perror ("[ETHERNET] Can't set the MTU");
|
||||
else
|
||||
printf("[ETHERNET] %s MTU size has changed to %d\n",eth->if_name,ifr.ifr_mtu);
|
||||
@@ -280,7 +265,7 @@ int ethernet_tune(openair0_device *device, unsigned int option, int value) {
|
||||
ifr.ifr_addr.sa_family = AF_INET;
|
||||
strncpy(ifr.ifr_name,eth->if_name, sizeof(ifr.ifr_name));
|
||||
ifr.ifr_qlen =value;
|
||||
if (ioctl(eth->sockfd,SIOCSIFTXQLEN,(caddr_t)&ifr) < 0 )
|
||||
if (ioctl(eth->sockfdd,SIOCSIFTXQLEN,(caddr_t)&ifr) < 0 )
|
||||
perror ("[ETHERNET] Can't set the txqueuelen");
|
||||
else
|
||||
printf("[ETHERNET] %s txqueuelen size has changed to %d\n",eth->if_name,ifr.ifr_qlen);
|
||||
@@ -366,8 +351,6 @@ int transport_init(openair0_device *device, openair0_config_t *openair0_cfg, eth
|
||||
device->Mod_id = 0;//num_devices_eth++;
|
||||
device->transp_type = ETHERNET_TP;
|
||||
device->trx_start_func = trx_eth_start;
|
||||
device->trx_request_func = trx_eth_request;
|
||||
device->trx_reply_func = trx_eth_reply;
|
||||
device->trx_get_stats_func = trx_eth_get_stats;
|
||||
device->trx_reset_stats_func = trx_eth_reset_stats;
|
||||
device->trx_end_func = trx_eth_end;
|
||||
@@ -380,13 +363,17 @@ int transport_init(openair0_device *device, openair0_config_t *openair0_cfg, eth
|
||||
device->trx_read_func = trx_eth_read_raw;
|
||||
} else if (eth->flags == ETH_UDP_MODE) {
|
||||
device->trx_write_func = trx_eth_write_udp;
|
||||
device->trx_read_func = trx_eth_read_udp;
|
||||
device->trx_read_func = trx_eth_read_udp;
|
||||
device->trx_ctlsend_func = trx_eth_ctlsend_udp;
|
||||
device->trx_ctlrecv_func = trx_eth_ctlrecv_udp;
|
||||
} else if (eth->flags == ETH_RAW_IF4p5_MODE) {
|
||||
device->trx_write_func = trx_eth_write_raw_IF4p5;
|
||||
device->trx_read_func = trx_eth_read_raw_IF4p5;
|
||||
} else if (eth->flags == ETH_UDP_IF4p5_MODE) {
|
||||
device->trx_write_func = trx_eth_write_udp_IF4p5;
|
||||
device->trx_read_func = trx_eth_read_udp_IF4p5;
|
||||
device->trx_read_func = trx_eth_read_udp_IF4p5;
|
||||
device->trx_ctlsend_func = trx_eth_ctlsend_udp;
|
||||
device->trx_ctlrecv_func = trx_eth_ctlrecv_udp;
|
||||
} else if (eth->flags == ETH_RAW_IF5_MOBIPASS) {
|
||||
device->trx_write_func = trx_eth_write_raw_IF4p5;
|
||||
device->trx_read_func = trx_eth_read_raw_IF5_mobipass;
|
||||
@@ -399,9 +386,9 @@ int transport_init(openair0_device *device, openair0_config_t *openair0_cfg, eth
|
||||
device->priv = eth;
|
||||
|
||||
/* device specific */
|
||||
openair0_cfg[0].iq_rxrescale = 15;//rescale iqs
|
||||
openair0_cfg[0].iq_txshift = eth_params->iq_txshift;// shift
|
||||
openair0_cfg[0].tx_sample_advance = eth_params->tx_sample_advance;
|
||||
// openair0_cfg[0].iq_rxrescale = 15;//rescale iqs
|
||||
// openair0_cfg[0].iq_txshift = eth_params->iq_txshift;// shift
|
||||
// openair0_cfg[0].tx_sample_advance = eth_params->tx_sample_advance;
|
||||
|
||||
/* RRU does not have any information to make this configuration atm */
|
||||
/*
|
||||
|
||||
@@ -54,22 +54,32 @@
|
||||
/*!\brief opaque ethernet data structure */
|
||||
typedef struct {
|
||||
|
||||
/*!\brief socket file desc */
|
||||
int sockfd;
|
||||
/*!\brief socket file desc (control)*/
|
||||
int sockfdc;
|
||||
/*!\brief socket file desc (user)*/
|
||||
int sockfdd;
|
||||
/*!\brief interface name */
|
||||
char *if_name;
|
||||
/*!\brief buffer size */
|
||||
unsigned int buffer_size;
|
||||
/*!\brief destination address for UDP socket*/
|
||||
struct sockaddr_in dest_addr;
|
||||
/*!\brief local address for UDP socket*/
|
||||
struct sockaddr_in local_addr;
|
||||
/*!\brief destination address (control) for UDP socket*/
|
||||
struct sockaddr_in dest_addrc;
|
||||
/*!\brief local address (control) for UDP socket*/
|
||||
struct sockaddr_in local_addrc;
|
||||
/*!\brief destination address (user) for UDP socket*/
|
||||
struct sockaddr_in dest_addrd;
|
||||
/*!\brief local address (user) for UDP socket*/
|
||||
struct sockaddr_in local_addrd;
|
||||
/*!\brief address length for both UDP and RAW socket*/
|
||||
int addr_len;
|
||||
/*!\brief destination address for RAW socket*/
|
||||
struct sockaddr_ll dest_addr_ll;
|
||||
/*!\brief local address for RAW socket*/
|
||||
struct sockaddr_ll local_addr_ll;
|
||||
/*!\brief destination address (control) for RAW socket*/
|
||||
struct sockaddr_ll dest_addrc_ll;
|
||||
/*!\brief local address (control) for RAW socket*/
|
||||
struct sockaddr_ll local_addrc_ll;
|
||||
/*!\brief destination address (user) for RAW socket*/
|
||||
struct sockaddr_ll dest_addrd_ll;
|
||||
/*!\brief local address (user) for RAW socket*/
|
||||
struct sockaddr_ll local_addrd_ll;
|
||||
/*!\brief inteface index for RAW socket*/
|
||||
struct ifreq if_index;
|
||||
/*!\brief timeout ms */
|
||||
@@ -117,9 +127,10 @@ typedef struct {
|
||||
uint64_t tx_count;
|
||||
/*!\brief number of packets received */
|
||||
uint64_t rx_count;
|
||||
|
||||
struct ether_header eh;
|
||||
|
||||
/*!\brief precomputed ethernet header (control) */
|
||||
struct ether_header ehc;
|
||||
/*!\brief precomputed ethernet header (data) */
|
||||
struct ether_header ehd;
|
||||
} eth_state_t;
|
||||
|
||||
|
||||
@@ -158,79 +169,6 @@ typedef enum {
|
||||
MAX_OPT
|
||||
} eth_opt_t;
|
||||
|
||||
#define MAX_RRU_CONFIG_SIZE 1024
|
||||
typedef enum {
|
||||
RAU_tick=0,
|
||||
RRU_capabilities=1,
|
||||
RRU_config=2,
|
||||
RRU_MSG_max_num=3
|
||||
} rru_config_msg_type_t;
|
||||
|
||||
typedef struct RRU_CONFIG_msg_s {
|
||||
rru_config_msg_type_t type;
|
||||
ssize_t len;
|
||||
uint8_t msg[MAX_RRU_CONFIG_SIZE];
|
||||
} RRU_CONFIG_msg_t;
|
||||
|
||||
typedef enum {
|
||||
OAI_IF5_only =0,
|
||||
OAI_IF4p5_only =1,
|
||||
OAI_IF5_and_IF4p5 =2,
|
||||
MBP_IF5 =3,
|
||||
MAX_FH_FMTs =4
|
||||
} FH_fmt_options_t;
|
||||
|
||||
#define MAX_BANDS_PER_RRU 4
|
||||
|
||||
typedef struct RRU_capabilities_s {
|
||||
/// Fronthaul format
|
||||
FH_fmt_options_t FH_fmt;
|
||||
/// number of EUTRA bands (<=4) supported by RRU
|
||||
uint8_t num_bands;
|
||||
/// EUTRA band list supported by RRU
|
||||
uint8_t band_list[MAX_BANDS_PER_RRU];
|
||||
/// Number of concurrent bands (component carriers)
|
||||
uint8_t num_concurrent_bands;
|
||||
/// Maximum TX EPRE of each band
|
||||
int8_t max_pdschReferenceSignalPower[MAX_BANDS_PER_RRU];
|
||||
/// Maximum RX gain of each band
|
||||
uint8_t max_rxgain[MAX_BANDS_PER_RRU];
|
||||
/// Number of RX ports of each band
|
||||
uint8_t nb_rx[MAX_BANDS_PER_RRU];
|
||||
/// Number of TX ports of each band
|
||||
uint8_t nb_tx[MAX_BANDS_PER_RRU];
|
||||
/// max DL bandwidth (1,6,15,25,50,75,100)
|
||||
uint8_t N_RB_DL[MAX_BANDS_PER_RRU];
|
||||
/// max UL bandwidth (1,6,15,25,50,75,100)
|
||||
uint8_t N_RB_UL[MAX_BANDS_PER_RRU];
|
||||
} RRU_capabilities_t;
|
||||
|
||||
typedef struct RRU_config_s {
|
||||
/// Fronthaul format
|
||||
RU_if_south_t FH_fmt;
|
||||
/// number of EUTRA bands (<=4) configured in RRU
|
||||
uint8_t num_bands;
|
||||
/// EUTRA band list configured in RRU
|
||||
uint8_t band_list[MAX_BANDS_PER_RRU];
|
||||
/// TX frequency
|
||||
uint32_t tx_freq[MAX_BANDS_PER_RRU];
|
||||
/// RX frequency
|
||||
uint32_t rx_freq[MAX_BANDS_PER_RRU];
|
||||
/// TX attenation w.r.t. max
|
||||
uint8_t att_tx[MAX_BANDS_PER_RRU];
|
||||
/// RX attenuation w.r.t. max
|
||||
uint8_t att_rx[MAX_BANDS_PER_RRU];
|
||||
/// DL bandwidth
|
||||
uint8_t N_RB_DL[MAX_BANDS_PER_RRU];
|
||||
/// UL bandwidth
|
||||
uint8_t N_RB_UL[MAX_BANDS_PER_RRU];
|
||||
/// 3/4 sampling rate
|
||||
uint8_t threequarter_fs[MAX_BANDS_PER_RRU];
|
||||
/// prach_FreqOffset for IF4p5
|
||||
int prach_FreqOffset[MAX_BANDS_PER_RRU];
|
||||
/// prach_ConfigIndex for IF4p5
|
||||
int prach_ConfigIndex[MAX_BANDS_PER_RRU];
|
||||
} RRU_config_t;
|
||||
|
||||
/*
|
||||
#define SND_BUF_SIZE 1
|
||||
@@ -286,19 +224,8 @@ int ethernet_tune(openair0_device *device, unsigned int option, int value);
|
||||
int eth_socket_init_udp(openair0_device *device);
|
||||
int trx_eth_write_udp(openair0_device *device, openair0_timestamp timestamp, void **buff, int nsamps,int cc, int flags);
|
||||
int trx_eth_read_udp(openair0_device *device, openair0_timestamp *timestamp, void **buff, int nsamps, int cc);
|
||||
//int trx_eth_write_udp_IF4(openair0_device *device, openair0_timestamp timestamp, void **buff, int nsamps,int cc, int flags);
|
||||
//int trx_eth_read_udp_IF4(openair0_device *device, openair0_timestamp *timestamp, void **buff, int nsamps, int cc);
|
||||
int eth_get_dev_conf_udp(openair0_device *device);
|
||||
|
||||
/*! \fn static int eth_set_dev_conf_udp(openair0_device *device)
|
||||
* \brief
|
||||
* \param[in] *device openair device
|
||||
* \param[out]
|
||||
* \return 0 on success, otherwise -1
|
||||
* \note
|
||||
* @ingroup _oai
|
||||
*/
|
||||
int eth_set_dev_conf_udp(openair0_device *device);
|
||||
|
||||
int eth_socket_init_raw(openair0_device *device);
|
||||
int trx_eth_write_raw(openair0_device *device, openair0_timestamp timestamp, void **buff, int nsamps,int cc, int flags);
|
||||
int trx_eth_read_raw(openair0_device *device, openair0_timestamp *timestamp, void **buff, int nsamps, int cc);
|
||||
@@ -307,6 +234,9 @@ int trx_eth_read_raw_IF4p5(openair0_device *device, openair0_timestamp *timestam
|
||||
int trx_eth_read_raw_IF5_mobipass(openair0_device *device, openair0_timestamp *timestamp, void **buff, int nsamps, int cc);
|
||||
int trx_eth_write_udp_IF4p5(openair0_device *device, openair0_timestamp timestamp, void **buff, int nsamps,int cc, int flags);
|
||||
int trx_eth_read_udp_IF4p5(openair0_device *device, openair0_timestamp *timestamp, void **buff, int nsamps, int cc);
|
||||
int trx_eth_ctlsend_udp(openair0_device *device, void *msg, ssize_t msg_len);
|
||||
int trx_eth_ctlrecv_udp(openair0_device *device, void *msg, ssize_t msg_len);
|
||||
|
||||
int eth_get_dev_conf_raw(openair0_device *device);
|
||||
int eth_set_dev_conf_raw(openair0_device *device);
|
||||
int eth_get_dev_conf_raw_IF4p5(openair0_device *device);
|
||||
|
||||
@@ -181,8 +181,10 @@ RUs = (
|
||||
local_if_name = "lo";
|
||||
remote_address = "127.0.0.1";
|
||||
local_address = "127.0.0.2";
|
||||
local_port = 50000; #for raw option local port must be the same to remote
|
||||
remote_port = 50001;
|
||||
local_portc = 50000;
|
||||
remote_portc = 50000;
|
||||
local_portd = 50001;
|
||||
remote_portd = 50001;
|
||||
local_rf = "no"
|
||||
tr_preference = "udp_if4p5"
|
||||
nb_tx = 1
|
||||
|
||||
@@ -3,8 +3,10 @@ RUs = (
|
||||
local_if_name = "lo";
|
||||
remote_address = "127.0.0.2";
|
||||
local_address = "127.0.0.1";
|
||||
local_port = 50001;
|
||||
remote_port = 50000;
|
||||
local_portc = 50000;
|
||||
remote_portc = 50000;
|
||||
local_portd = 50001;
|
||||
remote_portd = 50001;
|
||||
local_rf = "yes"
|
||||
tr_preference = "udp_if4p5";
|
||||
nb_tx = 1;
|
||||
|
||||
+59
-24
@@ -104,7 +104,8 @@ struct timing_info_t {
|
||||
// Fix per CC openair rf/if device update
|
||||
// extern openair0_device openair0;
|
||||
|
||||
extern void do_prach(PHY_VARS_eNB *eNB,RU_t *ru,int frame,int subframe);
|
||||
void do_prach(PHY_VARS_eNB *eNB,int frame,int subframe);
|
||||
|
||||
#if defined(ENABLE_ITTI)
|
||||
extern volatile int start_eNB;
|
||||
extern volatile int start_UE;
|
||||
@@ -123,12 +124,6 @@ time_stats_t softmodem_stats_mt; // main thread
|
||||
time_stats_t softmodem_stats_hw; // hw acquisition
|
||||
time_stats_t softmodem_stats_rxtx_sf; // total tx time
|
||||
time_stats_t softmodem_stats_rx_sf; // total rx time
|
||||
//int32_t **rxdata;
|
||||
//int32_t **txdata;
|
||||
|
||||
uint8_t seqno; //sequence number
|
||||
|
||||
static int time_offset[4] = {0,0,0,0};
|
||||
|
||||
/* mutex, cond and variable to serialize phy proc TX calls
|
||||
* (this mechanism may be relaxed in the future for better
|
||||
@@ -155,10 +150,9 @@ static inline int rxtx(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc, char *thread_nam
|
||||
// ****************************************
|
||||
// Common RX procedures subframe n
|
||||
|
||||
|
||||
do_prach(eNB,NULL,proc->frame_rx,proc->subframe_rx);
|
||||
do_prach(eNB,proc->frame_rx,proc->subframe_rx);
|
||||
// phy_procedures_eNB_common_RX(eNB,proc);
|
||||
|
||||
|
||||
// UE-specific RX processing for subframe n
|
||||
phy_procedures_eNB_uespec_RX(eNB, proc, no_relay );
|
||||
|
||||
@@ -263,10 +257,8 @@ void eNB_top(PHY_VARS_eNB *eNB, int frame_rx, int subframe_rx, char *string) {
|
||||
|
||||
if (!oai_exit) {
|
||||
|
||||
|
||||
if (eNB->CC_id==1)
|
||||
LOG_D(PHY,"eNB thread single %p (proc %p, CC_id %d), frame %d, subframe %d\n",
|
||||
pthread_self(), proc, eNB->CC_id, proc->frame_rx,proc->subframe_rx);
|
||||
LOG_D(PHY,"eNB_top in %p (proc %p, CC_id %d), frame %d, subframe %d, instance_cnt_prach %d\n",
|
||||
pthread_self(), proc, eNB->CC_id, proc->frame_rx,proc->subframe_rx,proc->instance_cnt_prach);
|
||||
|
||||
|
||||
T(T_ENB_MASTER_TICK, T_INT(0), T_INT(proc->frame_rx), T_INT(proc->subframe_rx));
|
||||
@@ -279,6 +271,8 @@ void eNB_top(PHY_VARS_eNB *eNB, int frame_rx, int subframe_rx, char *string) {
|
||||
proc_rxtx->timestamp_tx = proc->timestamp_tx;
|
||||
|
||||
if (rxtx(eNB,proc_rxtx,string) < 0) LOG_E(PHY,"eNB %d CC_id %d failed during execution\n",eNB->Mod_id,eNB->CC_id);
|
||||
LOG_D(PHY,"eNB_top out %p (proc %p, CC_id %d), frame %d, subframe %d, instance_cnt_prach %d\n",
|
||||
pthread_self(), proc, eNB->CC_id, proc->frame_rx,proc->subframe_rx,proc->instance_cnt_prach);
|
||||
}
|
||||
|
||||
}
|
||||
@@ -336,6 +330,45 @@ int wakeup_rxtx(eNB_proc_t *proc,eNB_rxtx_proc_t *proc_rxtx,LTE_DL_FRAME_PARMS *
|
||||
return(0);
|
||||
}
|
||||
|
||||
void do_prach(PHY_VARS_eNB *eNB,int frame,int subframe) {
|
||||
|
||||
eNB_proc_t *proc = &eNB->proc;
|
||||
LTE_DL_FRAME_PARMS *fp=&eNB->frame_parms;
|
||||
|
||||
|
||||
|
||||
// check if we have to detect PRACH first
|
||||
if (is_prach_subframe(fp,frame,subframe)>0) {
|
||||
LOG_D(PHY,"Triggering prach processing, frame %d, subframe %d\n",frame,subframe);
|
||||
if (proc->instance_cnt_prach == 0) {
|
||||
LOG_W(PHY,"[eNB] Frame %d Subframe %d, dropping PRACH\n", frame,subframe);
|
||||
return;
|
||||
}
|
||||
|
||||
// wake up thread for PRACH RX
|
||||
if (pthread_mutex_lock(&proc->mutex_prach) != 0) {
|
||||
LOG_E( PHY, "[eNB] ERROR pthread_mutex_lock for eNB PRACH thread %d (IC %d)\n", proc->thread_index, proc->instance_cnt_prach);
|
||||
exit_fun( "error locking mutex_prach" );
|
||||
return;
|
||||
}
|
||||
|
||||
++proc->instance_cnt_prach;
|
||||
// set timing for prach thread
|
||||
proc->frame_prach = frame;
|
||||
proc->subframe_prach = subframe;
|
||||
|
||||
// the thread can now be woken up
|
||||
if (pthread_cond_signal(&proc->cond_prach) != 0) {
|
||||
LOG_E( PHY, "[eNB] ERROR pthread_cond_signal for eNB PRACH thread %d\n", proc->thread_index);
|
||||
exit_fun( "ERROR pthread_cond_signal" );
|
||||
return;
|
||||
}
|
||||
|
||||
pthread_mutex_unlock( &proc->mutex_prach );
|
||||
}
|
||||
|
||||
}
|
||||
|
||||
/*!
|
||||
* \brief The prach receive thread of eNB.
|
||||
* \param param is a \ref eNB_proc_t structure which contains the info what to process.
|
||||
@@ -356,15 +389,17 @@ static void* eNB_thread_prach( void* param ) {
|
||||
while (!oai_exit) {
|
||||
|
||||
if (oai_exit) break;
|
||||
|
||||
|
||||
if (wait_on_condition(&proc->mutex_prach,&proc->cond_prach,&proc->instance_cnt_prach,"eNB_prach_thread") < 0) break;
|
||||
|
||||
|
||||
LOG_D(PHY,"Running eNB prach procedures\n");
|
||||
prach_procedures(eNB);
|
||||
|
||||
if (release_thread(&proc->mutex_prach,&proc->instance_cnt_prach,"eNB_prach_thread") < 0) break;
|
||||
}
|
||||
|
||||
printf( "Exiting eNB thread PRACH\n");
|
||||
LOG_I(PHY, "Exiting eNB thread PRACH\n");
|
||||
|
||||
eNB_thread_prach_status = 0;
|
||||
return &eNB_thread_prach_status;
|
||||
@@ -384,7 +419,7 @@ void init_eNB_proc(int inst) {
|
||||
eNB_rxtx_proc_t *proc_rxtx;
|
||||
pthread_attr_t *attr0=NULL,*attr1=NULL,*attr_FH=NULL,*attr_prach=NULL,*attr_asynch=NULL,*attr_single=NULL,*attr_fep=NULL,*attr_td=NULL,*attr_te=NULL,*attr_synch=NULL;
|
||||
|
||||
for (CC_id=0; CC_id<MAX_NUM_CCs; CC_id++) {
|
||||
for (CC_id=0; CC_id<RC.nb_CC[inst]; CC_id++) {
|
||||
eNB = RC.eNB[inst][CC_id];
|
||||
#ifndef OCP_FRAMEWORK
|
||||
LOG_I(PHY,"Initializing eNB processes %d CC_id %d \n",inst,CC_id);
|
||||
@@ -440,6 +475,9 @@ void init_eNB_proc(int inst) {
|
||||
pthread_setname_np( proc_rxtx[1].pthread_rxtx, name );
|
||||
// snprintf( name, sizeof(name), "FH %d", i );
|
||||
// pthread_setname_np( proc->pthread_FH, name );
|
||||
|
||||
AssertFatal(proc->instance_cnt_prach == -1,"instance_cnt_prach = %d\n",proc->instance_cnt_prach);
|
||||
|
||||
|
||||
}
|
||||
|
||||
@@ -483,9 +521,8 @@ void kill_eNB_proc(int inst) {
|
||||
proc = &eNB->proc;
|
||||
proc_rxtx = &proc->proc_rxtx[0];
|
||||
|
||||
#ifdef DEBUG_THREADS
|
||||
printf( "Killing TX CC_id %d thread %d\n", CC_id, i );
|
||||
#endif
|
||||
|
||||
LOG_I(PHY, "Killing TX CC_id %d inst %d\n", CC_id, inst );
|
||||
|
||||
proc_rxtx[0].instance_cnt_rxtx = 0; // FIXME data race!
|
||||
proc_rxtx[1].instance_cnt_rxtx = 0; // FIXME data race!
|
||||
@@ -607,7 +644,6 @@ void init_eNB_afterRU() {
|
||||
for (CC_id=0;CC_id<RC.nb_CC[inst];CC_id++) {
|
||||
eNB = RC.eNB[inst][CC_id];
|
||||
phy_init_lte_eNB(eNB,0,0);
|
||||
|
||||
// map antennas and PRACH signals to eNB RX
|
||||
AssertFatal(eNB->num_RU>0,"Number of RU attached to eNB %d is zero\n",eNB->Mod_id);
|
||||
LOG_I(PHY,"Mapping RX ports from %d RUs to eNB %d\n",eNB->num_RU,eNB->Mod_id);
|
||||
@@ -645,11 +681,10 @@ void init_eNB(int single_thread_flag,int wait_for_sync) {
|
||||
int CC_id;
|
||||
int inst;
|
||||
PHY_VARS_eNB *eNB;
|
||||
int ret;
|
||||
|
||||
if (RC.eNB == NULL) RC.eNB = (PHY_VARS_eNB***) malloc(RC.nb_inst*sizeof(PHY_VARS_eNB **));
|
||||
for (inst=0;inst<RC.nb_inst;inst++) {
|
||||
if (RC.eNB[inst] == NULL) RC.eNB[inst] = (PHY_VARS_eNB*) malloc(RC.nb_CC[inst]*sizeof(PHY_VARS_eNB *));
|
||||
if (RC.eNB[inst] == NULL) RC.eNB[inst] = (PHY_VARS_eNB**) malloc(RC.nb_CC[inst]*sizeof(PHY_VARS_eNB *));
|
||||
for (CC_id=0;CC_id<RC.nb_CC[inst];CC_id++) {
|
||||
if (RC.eNB[inst][CC_id] == NULL) RC.eNB[inst][CC_id] = (PHY_VARS_eNB*) malloc(sizeof(PHY_VARS_eNB));
|
||||
eNB = RC.eNB[inst][CC_id];
|
||||
@@ -679,7 +714,7 @@ void init_eNB(int single_thread_flag,int wait_for_sync) {
|
||||
void stop_eNB(int nb_inst) {
|
||||
|
||||
for (int inst=0;inst<nb_inst;inst++) {
|
||||
printf("Killing eNB %d processing threads\n",inst);
|
||||
LOG_I(PHY,"Killing eNB %d processing threads\n",inst);
|
||||
kill_eNB_proc(inst);
|
||||
}
|
||||
}
|
||||
|
||||
+188
-26
@@ -1,7 +1,7 @@
|
||||
/*******************************************************************************
|
||||
OpenAirInterface
|
||||
Copyright(c) 1999 - 2014 Eurecom
|
||||
|
||||
|
||||
OpenAirInterface is free software: you can redistribute it and/or modify
|
||||
it under the terms of the GNU General Public License as published by
|
||||
the Free Software Foundation, either version 3 of the License, or
|
||||
@@ -113,12 +113,178 @@ unsigned short config_frames[4] = {2,9,11,13};
|
||||
extern volatile int oai_exit;
|
||||
|
||||
|
||||
extern void phy_init_RU(RU_t*);
|
||||
|
||||
void init_RU(const char*);
|
||||
void stop_RU(RU_t *ru);
|
||||
void do_ru_sync(RU_t *ru);
|
||||
|
||||
void configure_ru(int idx,
|
||||
void *arg);
|
||||
|
||||
void configure_rru(int idx,
|
||||
void *arg);
|
||||
|
||||
int attach_rru(RU_t *ru);
|
||||
|
||||
int connect_rau(RU_t *ru);
|
||||
|
||||
/*************************************************************/
|
||||
/* Functions to attach and configure RRU */
|
||||
|
||||
int attach_rru(RU_t *ru) {
|
||||
|
||||
ssize_t msg_len,len;
|
||||
RRU_CONFIG_msg_t rru_config_msg;
|
||||
int received_capabilities=0;
|
||||
|
||||
// Wait for capabilities
|
||||
while (received_capabilities==0) {
|
||||
|
||||
rru_config_msg.type = RAU_tick;
|
||||
rru_config_msg.len = sizeof(RRU_CONFIG_msg_t)-MAX_RRU_CONFIG_SIZE;
|
||||
LOG_I(PHY,"Sending RAU tick to RRU %d\n",ru->idx);
|
||||
AssertFatal((ru->ifdevice.trx_ctlsend_func(&ru->ifdevice,&rru_config_msg,rru_config_msg.len)!=-1),
|
||||
"RU %d cannot access remote radio\n",ru->idx);
|
||||
|
||||
msg_len = sizeof(RRU_CONFIG_msg_t)-MAX_RRU_CONFIG_SIZE+sizeof(RRU_capabilities_t);
|
||||
|
||||
// wait for answer with timeout
|
||||
if ((len = ru->ifdevice.trx_ctlrecv_func(&ru->ifdevice,
|
||||
&rru_config_msg,
|
||||
msg_len))<0) {
|
||||
LOG_I(PHY,"Waiting for RRU %d\n",ru->idx);
|
||||
}
|
||||
else if (rru_config_msg.type == RRU_capabilities) {
|
||||
AssertFatal(rru_config_msg.len==msg_len,"Received capabilities with incorrect length (%d!=%d)\n",(int)rru_config_msg.len,(int)msg_len);
|
||||
LOG_I(PHY,"Received capabilities from RRU %d (len %d/%d, num_bands %d,max_pdschReferenceSignalPower %d, max_rxgain %d, nb_tx %d, nb_rx %d)\n",ru->idx,
|
||||
(int)rru_config_msg.len,(int)msg_len,
|
||||
((RRU_capabilities_t*)&rru_config_msg.msg[0])->num_bands,
|
||||
((RRU_capabilities_t*)&rru_config_msg.msg[0])->max_pdschReferenceSignalPower[0],
|
||||
((RRU_capabilities_t*)&rru_config_msg.msg[0])->max_rxgain[0],
|
||||
((RRU_capabilities_t*)&rru_config_msg.msg[0])->nb_tx[0],
|
||||
((RRU_capabilities_t*)&rru_config_msg.msg[0])->nb_rx[0]);
|
||||
received_capabilities=1;
|
||||
}
|
||||
else {
|
||||
LOG_E(PHY,"Received incorrect message %d from RRU %d\n",rru_config_msg.type,ru->idx);
|
||||
}
|
||||
}
|
||||
configure_ru(ru->idx,
|
||||
(RRU_capabilities_t *)&rru_config_msg.msg[0]);
|
||||
|
||||
rru_config_msg.type = RRU_config;
|
||||
rru_config_msg.len = sizeof(RRU_CONFIG_msg_t)-MAX_RRU_CONFIG_SIZE+sizeof(RRU_config_t);
|
||||
LOG_I(PHY,"Sending Configuration to RRU %d (num_bands %d,band0 %d,txfreq %u,rxfreq %u,att_tx %d,att_rx %d,N_RB_DL %d,N_RB_UL %d,3/4FS %d, prach_FO %d, prach_CI %d)\n",ru->idx,
|
||||
((RRU_config_t *)&rru_config_msg.msg[0])->num_bands,
|
||||
((RRU_config_t *)&rru_config_msg.msg[0])->band_list[0],
|
||||
((RRU_config_t *)&rru_config_msg.msg[0])->tx_freq[0],
|
||||
((RRU_config_t *)&rru_config_msg.msg[0])->rx_freq[0],
|
||||
((RRU_config_t *)&rru_config_msg.msg[0])->att_tx[0],
|
||||
((RRU_config_t *)&rru_config_msg.msg[0])->att_rx[0],
|
||||
((RRU_config_t *)&rru_config_msg.msg[0])->N_RB_DL[0],
|
||||
((RRU_config_t *)&rru_config_msg.msg[0])->N_RB_UL[0],
|
||||
((RRU_config_t *)&rru_config_msg.msg[0])->threequarter_fs[0],
|
||||
((RRU_config_t *)&rru_config_msg.msg[0])->prach_FreqOffset[0],
|
||||
((RRU_config_t *)&rru_config_msg.msg[0])->prach_ConfigIndex[0]);
|
||||
|
||||
AssertFatal((ru->ifdevice.trx_ctlsend_func(&ru->ifdevice,&rru_config_msg,rru_config_msg.len)!=-1),
|
||||
"RU %d failed send configuration to remote radio\n",ru->idx);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
int connect_rau(RU_t *ru) {
|
||||
|
||||
RRU_CONFIG_msg_t rru_config_msg;
|
||||
ssize_t msg_len;
|
||||
int tick_received = 0;
|
||||
int configuration_received = 0;
|
||||
RRU_capabilities_t *cap;
|
||||
int i;
|
||||
int len;
|
||||
|
||||
// wait for RAU_tick
|
||||
while (tick_received == 0) {
|
||||
|
||||
msg_len = sizeof(RRU_CONFIG_msg_t)-MAX_RRU_CONFIG_SIZE;
|
||||
|
||||
if ((len = ru->ifdevice.trx_ctlrecv_func(&ru->ifdevice,
|
||||
&rru_config_msg,
|
||||
msg_len))<0) {
|
||||
LOG_I(PHY,"Waiting for RAU\n");
|
||||
}
|
||||
else {
|
||||
if (rru_config_msg.type == RAU_tick) {
|
||||
LOG_I(PHY,"Tick received from RAU\n");
|
||||
tick_received = 1;
|
||||
}
|
||||
else LOG_E(PHY,"Received erroneous message (%d)from RAU, expected RAU_tick\n",rru_config_msg.type);
|
||||
}
|
||||
}
|
||||
|
||||
// send capabilities
|
||||
|
||||
rru_config_msg.type = RRU_capabilities;
|
||||
rru_config_msg.len = sizeof(RRU_CONFIG_msg_t)-MAX_RRU_CONFIG_SIZE+sizeof(RRU_capabilities_t);
|
||||
cap = (RRU_capabilities_t*)&rru_config_msg.msg[0];
|
||||
LOG_I(PHY,"Sending Capabilities (len %d, num_bands %d,max_pdschReferenceSignalPower %d, max_rxgain %d, nb_tx %d, nb_rx %d)\n",
|
||||
(int)rru_config_msg.len,ru->num_bands,ru->max_pdschReferenceSignalPower,ru->max_rxgain,ru->nb_tx,ru->nb_rx);
|
||||
switch (ru->function) {
|
||||
case NGFI_RRU_IF4p5:
|
||||
cap->FH_fmt = OAI_IF4p5_only;
|
||||
break;
|
||||
case NGFI_RRU_IF5:
|
||||
cap->FH_fmt = OAI_IF5_only;
|
||||
break;
|
||||
case MBP_RRU_IF5:
|
||||
cap->FH_fmt = MBP_IF5;
|
||||
break;
|
||||
default:
|
||||
AssertFatal(1==0,"RU_function is unknown %d\n",RC.ru[0]->function);
|
||||
break;
|
||||
}
|
||||
cap->num_bands = ru->num_bands;
|
||||
for (i=0;i<ru->num_bands;i++) {
|
||||
cap->band_list[i] = ru->band[i];
|
||||
cap->nb_rx[i] = ru->nb_rx;
|
||||
cap->nb_tx[i] = ru->nb_tx;
|
||||
cap->max_pdschReferenceSignalPower[i] = ru->max_pdschReferenceSignalPower;
|
||||
cap->max_rxgain[i] = ru->max_rxgain;
|
||||
}
|
||||
AssertFatal((ru->ifdevice.trx_ctlsend_func(&ru->ifdevice,&rru_config_msg,rru_config_msg.len)!=-1),
|
||||
"RU %d failed send capabilities to RAU\n",ru->idx);
|
||||
|
||||
// wait for configuration
|
||||
rru_config_msg.len = sizeof(RRU_CONFIG_msg_t)-MAX_RRU_CONFIG_SIZE+sizeof(RRU_config_t);
|
||||
while (configuration_received == 0) {
|
||||
|
||||
if ((len = ru->ifdevice.trx_ctlrecv_func(&ru->ifdevice,
|
||||
&rru_config_msg,
|
||||
rru_config_msg.len))<0) {
|
||||
LOG_I(PHY,"Waiting for configuration from RAU\n");
|
||||
}
|
||||
else {
|
||||
LOG_I(PHY,"Configuration received from RAU (num_bands %d,band0 %d,txfreq %u,rxfreq %u,att_tx %d,att_rx %d,N_RB_DL %d,N_RB_UL %d,3/4FS %d, prach_FO %d, prach_CI %d)\n",
|
||||
((RRU_config_t *)&rru_config_msg.msg[0])->num_bands,
|
||||
((RRU_config_t *)&rru_config_msg.msg[0])->band_list[0],
|
||||
((RRU_config_t *)&rru_config_msg.msg[0])->tx_freq[0],
|
||||
((RRU_config_t *)&rru_config_msg.msg[0])->rx_freq[0],
|
||||
((RRU_config_t *)&rru_config_msg.msg[0])->att_tx[0],
|
||||
((RRU_config_t *)&rru_config_msg.msg[0])->att_rx[0],
|
||||
((RRU_config_t *)&rru_config_msg.msg[0])->N_RB_DL[0],
|
||||
((RRU_config_t *)&rru_config_msg.msg[0])->N_RB_UL[0],
|
||||
((RRU_config_t *)&rru_config_msg.msg[0])->threequarter_fs[0],
|
||||
((RRU_config_t *)&rru_config_msg.msg[0])->prach_FreqOffset[0],
|
||||
((RRU_config_t *)&rru_config_msg.msg[0])->prach_ConfigIndex[0]);
|
||||
|
||||
configure_rru(ru->idx,
|
||||
(void*)&rru_config_msg.msg[0]);
|
||||
configuration_received = 1;
|
||||
}
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
/*************************************************************/
|
||||
/* Southbound Fronthaul functions, RCC/RAU */
|
||||
|
||||
@@ -186,7 +352,6 @@ void fh_if4p5_south_in(RU_t *ru,int *frame,int *subframe) {
|
||||
uint16_t packet_type;
|
||||
uint32_t symbol_number=0;
|
||||
uint32_t symbol_mask_full;
|
||||
int prach_received=0;
|
||||
|
||||
if ((fp->frame_type == TDD) && (subframe_select(fp,*subframe)==SF_S))
|
||||
symbol_mask_full = (1<<fp->ul_symbols_in_S_subframe)-1;
|
||||
@@ -457,7 +622,7 @@ void fh_if4p5_north_asynch_in(RU_t *ru,int *frame,int *subframe) {
|
||||
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_FRAME_NUMBER_TX0_RU, frame_tx );
|
||||
VCD_SIGNAL_DUMPER_DUMP_VARIABLE_BY_NAME( VCD_SIGNAL_DUMPER_VARIABLES_SUBFRAME_NUMBER_TX0_RU, subframe_tx );
|
||||
}
|
||||
|
||||
|
||||
if (ru->feptx_ofdm) ru->feptx_ofdm(ru);
|
||||
if (ru->fh_south_out) ru->fh_south_out(ru);
|
||||
}
|
||||
@@ -884,11 +1049,13 @@ static void* ru_thread( void* param ) {
|
||||
|
||||
static int ru_thread_status;
|
||||
|
||||
RU_t *ru = (RU_t*)param;
|
||||
RU_proc_t *proc = &ru->proc;
|
||||
LTE_DL_FRAME_PARMS *fp = &ru->frame_parms;
|
||||
RU_t *ru = (RU_t*)param;
|
||||
RU_proc_t *proc = &ru->proc;
|
||||
LTE_DL_FRAME_PARMS *fp = &ru->frame_parms;
|
||||
int ret;
|
||||
int subframe =0;
|
||||
int frame =0;
|
||||
|
||||
int subframe=0, frame=0;
|
||||
// set default return value
|
||||
ru_thread_status = 0;
|
||||
|
||||
@@ -902,18 +1069,18 @@ static void* ru_thread( void* param ) {
|
||||
// Start IF device if any
|
||||
if (ru->start_if) {
|
||||
LOG_I(PHY,"Starting IF interface for RU %d\n",ru->idx);
|
||||
if (ru->start_if(ru,NULL) != 0) {
|
||||
LOG_E(PHY,"Could not start the IF device\n");
|
||||
}
|
||||
else { // wakeup the top thread to configure RU parameters
|
||||
LOG_I(PHY, "Signaling main thread that RU %d is ready\n",ru->idx);
|
||||
pthread_mutex_lock(&RC.ru_mutex);
|
||||
RC.ru_mask &= ~(1<<ru->idx);
|
||||
pthread_cond_signal(&RC.ru_cond);
|
||||
pthread_mutex_unlock(&RC.ru_mutex);
|
||||
}
|
||||
AssertFatal(ru->start_if(ru,NULL) == 0, "Could not start the IF device\n");
|
||||
if (ru->if_south == LOCAL_RF) ret = connect_rau(ru);
|
||||
else ret = attach_rru(ru);
|
||||
AssertFatal(ret==0,"Cannot connect to radio\n");
|
||||
LOG_I(PHY, "Signaling main thread that RU %d is ready\n",ru->idx);
|
||||
pthread_mutex_lock(&RC.ru_mutex);
|
||||
RC.ru_mask &= ~(1<<ru->idx);
|
||||
pthread_cond_signal(&RC.ru_cond);
|
||||
pthread_mutex_unlock(&RC.ru_mutex);
|
||||
}
|
||||
|
||||
|
||||
wait_sync("ru_thread");
|
||||
|
||||
|
||||
@@ -963,7 +1130,7 @@ static void* ru_thread( void* param ) {
|
||||
else AssertFatal(1==0, "No fronthaul interface at south port");
|
||||
|
||||
|
||||
LOG_D(PHY,"RU thread (do_prach %d, is_prach_subframe %d), received frame %d, subframe %d \n",
|
||||
LOG_D(PHY,"RU thread (do_prach %d, is_prach_subframe %d), received frame %d, subframe %d\n",
|
||||
ru->do_prach,
|
||||
is_prach_subframe(fp, proc->frame_rx, proc->subframe_rx),
|
||||
proc->frame_rx,proc->subframe_rx);
|
||||
@@ -990,7 +1157,6 @@ static void* ru_thread( void* param ) {
|
||||
// wakeup all eNB processes waiting for this RU
|
||||
if (ru->num_eNB>0) wakeup_eNBs(ru);
|
||||
|
||||
|
||||
// wait until eNBs are finished subframe RX n and TX n+4
|
||||
wait_on_condition(&proc->mutex_eNBs,&proc->cond_eNBs,&proc->instance_cnt_eNBs,"ru_thread");
|
||||
|
||||
@@ -1003,8 +1169,6 @@ static void* ru_thread( void* param ) {
|
||||
// do outgoing fronthaul (south) if needed
|
||||
if ((ru->fh_north_asynch_in == NULL) && (ru->fh_south_out)) ru->fh_south_out(ru);
|
||||
|
||||
|
||||
|
||||
if (ru->fh_north_out) ru->fh_north_out(ru);
|
||||
}
|
||||
|
||||
@@ -1258,6 +1422,7 @@ int setup_RU_buffers(RU_t *ru) {
|
||||
return(0);
|
||||
}
|
||||
|
||||
|
||||
// this is for RU with local RF unit
|
||||
void fill_rf_config(RU_t *ru,const char *rf_config_file) {
|
||||
|
||||
@@ -1408,12 +1573,10 @@ void configure_ru(int idx,
|
||||
|
||||
init_frame_parms(&ru->frame_parms,1);
|
||||
phy_init_RU(ru);
|
||||
|
||||
return(0);
|
||||
}
|
||||
|
||||
int configure_rru(int idx,
|
||||
void *arg) {
|
||||
void configure_rru(int idx,
|
||||
void *arg) {
|
||||
|
||||
RRU_config_t *config = (RRU_config_t *)arg;
|
||||
RU_t *ru = RC.ru[idx];
|
||||
@@ -1437,7 +1600,6 @@ int configure_rru(int idx,
|
||||
|
||||
phy_init_RU(ru);
|
||||
|
||||
return(0);
|
||||
}
|
||||
|
||||
void init_precoding_weights(PHY_VARS_eNB *eNB) {
|
||||
|
||||
@@ -1444,10 +1444,6 @@ int main( int argc, char **argv )
|
||||
frame_parms[CC_id]->nb_antenna_ports_eNB = 1; //initial value overwritten by initial sync later
|
||||
|
||||
|
||||
init_ul_hopping(frame_parms[CC_id]);
|
||||
init_frame_parms(frame_parms[CC_id],1);
|
||||
// phy_init_top(frame_parms[CC_id]);
|
||||
phy_init_lte_top(frame_parms[CC_id]);
|
||||
}
|
||||
}
|
||||
|
||||
@@ -1468,7 +1464,7 @@ int main( int argc, char **argv )
|
||||
|
||||
for (CC_id=0; CC_id<MAX_NUM_CCs; CC_id++) {
|
||||
|
||||
PHY_vars_UE_g[0][CC_id] = init_lte_UE(frame_parms[CC_id], 0,abstraction_flag);
|
||||
PHY_vars_UE_g[0][CC_id] = init_ue_vars(frame_parms[CC_id], 0,abstraction_flag);
|
||||
UE[CC_id] = PHY_vars_UE_g[0][CC_id];
|
||||
printf("PHY_vars_UE_g[0][%d] = %p\n",CC_id,UE[CC_id]);
|
||||
|
||||
@@ -1761,12 +1757,9 @@ int main( int argc, char **argv )
|
||||
|
||||
|
||||
|
||||
sleep(3);
|
||||
|
||||
|
||||
|
||||
printf("Sending sync to all threads\n");
|
||||
|
||||
|
||||
|
||||
pthread_mutex_lock(&sync_mutex);
|
||||
sync_var=0;
|
||||
pthread_cond_broadcast(&sync_cond);
|
||||
|
||||
+22
-39
@@ -171,53 +171,34 @@ pthread_t main_ue_thread;
|
||||
pthread_attr_t attr_UE_thread;
|
||||
struct sched_param sched_param_UE_thread;
|
||||
|
||||
void phy_init_lte_ue_transport(PHY_VARS_UE *ue,int absraction_flag);
|
||||
|
||||
PHY_VARS_UE* init_lte_UE(LTE_DL_FRAME_PARMS *frame_parms,
|
||||
uint8_t UE_id,
|
||||
uint8_t abstraction_flag)
|
||||
PHY_VARS_UE* init_ue_vars(LTE_DL_FRAME_PARMS *frame_parms,
|
||||
uint8_t UE_id,
|
||||
uint8_t abstraction_flag)
|
||||
|
||||
{
|
||||
|
||||
int i,j;
|
||||
PHY_VARS_UE* PHY_vars_UE = malloc(sizeof(PHY_VARS_UE));
|
||||
memset(PHY_vars_UE,0,sizeof(PHY_VARS_UE));
|
||||
PHY_vars_UE->Mod_id=UE_id;
|
||||
memcpy(&(PHY_vars_UE->frame_parms), frame_parms, sizeof(LTE_DL_FRAME_PARMS));
|
||||
phy_init_lte_ue(PHY_vars_UE,1,abstraction_flag);
|
||||
PHY_VARS_UE* ue;
|
||||
|
||||
for (i=0; i<NUMBER_OF_CONNECTED_eNB_MAX; i++) {
|
||||
for (j=0; j<2; j++) {
|
||||
PHY_vars_UE->dlsch[i][j] = new_ue_dlsch(1,NUMBER_OF_HARQ_PID_MAX,NSOFT,MAX_TURBO_ITERATIONS,frame_parms->N_RB_DL, abstraction_flag);
|
||||
if (frame_parms!=(PHY_VARS_UE *)NULL) { // if we want to give initial frame parms, allocate the PHY_VARS_UE structure and put them in
|
||||
ue = (PHY_VARS_UE *)malloc(sizeof(PHY_VARS_UE));
|
||||
memset(ue,0,sizeof(PHY_VARS_UE));
|
||||
memcpy(&(ue->frame_parms), frame_parms, sizeof(LTE_DL_FRAME_PARMS));
|
||||
}
|
||||
else ue = PHY_vars_UE_g[UE_id][0];
|
||||
|
||||
if (!PHY_vars_UE->dlsch[i][j]) {
|
||||
LOG_E(PHY,"Can't get ue dlsch structures\n");
|
||||
exit(-1);
|
||||
} else
|
||||
LOG_D(PHY,"dlsch[%d][%d] => %p\n",UE_id,i,PHY_vars_UE->dlsch[i][j]);
|
||||
}
|
||||
ue->Mod_id=UE_id;
|
||||
// initialize all signal buffers
|
||||
init_lte_ue_signal(ue,1,abstraction_flag);
|
||||
// intialize transport
|
||||
init_lte_ue_transport(ue,abstraction_flag);
|
||||
|
||||
|
||||
|
||||
PHY_vars_UE->ulsch[i] = new_ue_ulsch(frame_parms->N_RB_UL, abstraction_flag);
|
||||
|
||||
if (!PHY_vars_UE->ulsch[i]) {
|
||||
LOG_E(PHY,"Can't get ue ulsch structures\n");
|
||||
exit(-1);
|
||||
}
|
||||
|
||||
PHY_vars_UE->dlsch_SI[i] = new_ue_dlsch(1,1,NSOFT,MAX_TURBO_ITERATIONS,frame_parms->N_RB_DL, abstraction_flag);
|
||||
PHY_vars_UE->dlsch_ra[i] = new_ue_dlsch(1,1,NSOFT,MAX_TURBO_ITERATIONS,frame_parms->N_RB_DL, abstraction_flag);
|
||||
|
||||
PHY_vars_UE->transmission_mode[i] = frame_parms->nb_antenna_ports_eNB==1 ? 1 : 2;
|
||||
}
|
||||
|
||||
PHY_vars_UE->frame_parms.pucch_config_common.deltaPUCCH_Shift = 1;
|
||||
|
||||
PHY_vars_UE->dlsch_MCH[0] = new_ue_dlsch(1,NUMBER_OF_HARQ_PID_MAX,NSOFT,MAX_TURBO_ITERATIONS_MBSFN,frame_parms->N_RB_DL,0);
|
||||
|
||||
return (PHY_vars_UE);
|
||||
return(ue);
|
||||
}
|
||||
|
||||
|
||||
char uecap_xer[1024];
|
||||
|
||||
void init_UE(int nb_inst,int eMBMS_active, int uecap_xer_in) {
|
||||
@@ -237,9 +218,11 @@ void init_UE(int nb_inst,int eMBMS_active, int uecap_xer_in) {
|
||||
|
||||
for (inst=0;inst<nb_inst;inst++) {
|
||||
|
||||
printf("Intializing UE Threads for instance %d ...\n",inst);
|
||||
LOG_I(PHY,"Initializing memory for UE instance %d\n",inst);
|
||||
PHY_vars_UE_g[inst][0] = init_ue_vars(NULL,inst,0);
|
||||
|
||||
LOG_I(PHY,"Intializing UE Threads for instance %d ...\n",inst);
|
||||
init_UE_threads(inst);
|
||||
sleep(1);
|
||||
UE = PHY_vars_UE_g[inst][0];
|
||||
|
||||
if (oaisim_flag == 0) {
|
||||
|
||||
@@ -60,7 +60,7 @@
|
||||
#include "oaisim.h"
|
||||
|
||||
#define RF
|
||||
#define DEBUG_SIM
|
||||
//#define DEBUG_SIM
|
||||
|
||||
int number_rb_ul;
|
||||
int first_rbUL ;
|
||||
@@ -251,10 +251,10 @@ void do_DL_sig(channel_desc_t *RU2UE[NUMBER_OF_RU_MAX][NUMBER_OF_UE_MAX][MAX_NUM
|
||||
frame_parms->N_RB_DL*12);
|
||||
|
||||
#ifdef DEBUG_SIM
|
||||
LOG_I(PHY,"[SIM][DL] subframe %d: txp (time) %d dB\n",
|
||||
LOG_D(PHY,"[SIM][DL] subframe %d: txp (time) %d dB\n",
|
||||
subframe,dB_fixed(signal_energy(&txdata[0][sf_offset],frame_parms->samples_per_tti)));
|
||||
|
||||
LOG_I(OCM,"[SIM][DL] RU %d (CCid %d): tx_pwr %.1f dBm/RE (target %d dBm/RE), for subframe %d\n",
|
||||
LOG_D(OCM,"[SIM][DL] RU %d (CCid %d): tx_pwr %.1f dBm/RE (target %d dBm/RE), for subframe %d\n",
|
||||
ru_id,CC_id,
|
||||
10*log10(tx_pwr),
|
||||
frame_parms->pdsch_config_common.referenceSignalPower,
|
||||
@@ -333,7 +333,7 @@ void do_DL_sig(channel_desc_t *RU2UE[NUMBER_OF_RU_MAX][NUMBER_OF_UE_MAX][MAX_NUM
|
||||
}
|
||||
}
|
||||
RU_output_mask[UE_id] |= (1<<ru_id);
|
||||
if (RU_output_mask[UE_id] == (1<<NB_eNB_INST)-1) {
|
||||
if (RU_output_mask[UE_id] == (1<<RC.nb_RU)-1) {
|
||||
RU_output_mask[UE_id]=0;
|
||||
|
||||
|
||||
|
||||
@@ -1216,18 +1216,26 @@ void wait_RUs() {
|
||||
PHY_vars_UE_g[i][0]->frame_parms.N_RB_DL = RC.ru[0]->frame_parms.N_RB_DL;
|
||||
PHY_vars_UE_g[i][0]->frame_parms.nb_antennas_tx = 1;
|
||||
PHY_vars_UE_g[i][0]->frame_parms.nb_antennas_rx = 1;
|
||||
PHY_vars_UE_g[i][0]->frame_parms.nb_antenna_ports_eNB = RC.ru[0]->frame_parms.nb_antenna_ports_eNB;
|
||||
// set initially to 2, it will be revised after initial synchronization
|
||||
PHY_vars_UE_g[i][0]->frame_parms.nb_antenna_ports_eNB = 2;
|
||||
PHY_vars_UE_g[i][0]->frame_parms.dl_CarrierFreq = RC.ru[0]->frame_parms.dl_CarrierFreq;
|
||||
PHY_vars_UE_g[i][0]->frame_parms.ul_CarrierFreq = RC.ru[0]->frame_parms.ul_CarrierFreq;
|
||||
PHY_vars_UE_g[i][0]->frame_parms.eutra_band = RC.ru[0]->frame_parms.eutra_band;
|
||||
init_ul_hopping(&PHY_vars_UE_g[i][0]->frame_parms);
|
||||
init_frame_parms(&PHY_vars_UE_g[i][0]->frame_parms,1);
|
||||
phy_init_lte_top(&PHY_vars_UE_g[i][0]->frame_parms);
|
||||
phy_init_lte_ue(PHY_vars_UE_g[i][0],1,0);
|
||||
current_UE_rx_timestamp[i][0] = PHY_vars_UE_g[i][0]->frame_parms.samples_per_tti;
|
||||
LOG_I(PHY,"Initializing UE %d frame parameters from RU information: N_RB_DL %d, p %d, dl_Carrierfreq %u, ul_CarrierFreq %u, eutra_band %d\n",
|
||||
i,
|
||||
PHY_vars_UE_g[i][0]->frame_parms.N_RB_DL,
|
||||
PHY_vars_UE_g[i][0]->frame_parms.nb_antenna_ports_eNB,
|
||||
PHY_vars_UE_g[i][0]->frame_parms.dl_CarrierFreq,
|
||||
PHY_vars_UE_g[i][0]->frame_parms.ul_CarrierFreq,
|
||||
PHY_vars_UE_g[i][0]->frame_parms.eutra_band);
|
||||
|
||||
current_UE_rx_timestamp[i][0] = RC.ru[0]->frame_parms.samples_per_tti;
|
||||
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
for (ru_id=0;ru_id<RC.nb_RU;ru_id++) current_ru_rx_timestamp[ru_id][0] = RC.ru[ru_id]->frame_parms.samples_per_tti;
|
||||
|
||||
printf("RUs are ready, let's go\n");
|
||||
@@ -1236,6 +1244,7 @@ void wait_RUs() {
|
||||
void init_UE(int,int,int);
|
||||
void init_RU(const char*);
|
||||
|
||||
|
||||
/*------------------------------------------------------------------------------*/
|
||||
int
|
||||
main (int argc, char **argv)
|
||||
@@ -1252,6 +1261,7 @@ main (int argc, char **argv)
|
||||
int node_id;
|
||||
int port,Process_Flag=0,wgt,Channel_Flag=0,temp;
|
||||
#endif
|
||||
int i;
|
||||
|
||||
//default parameters
|
||||
oai_emulation.info.n_frames = MAX_FRAME_NUMBER; //1024; //10;
|
||||
@@ -1327,7 +1337,7 @@ main (int argc, char **argv)
|
||||
|
||||
init_devices ();
|
||||
init_RU(NULL);
|
||||
init_UE(NB_UE_INST,0,0);
|
||||
|
||||
|
||||
// init_openair2 ();
|
||||
|
||||
@@ -1342,6 +1352,9 @@ main (int argc, char **argv)
|
||||
|
||||
printf("Waiting for RUs to get set up\n");
|
||||
wait_RUs();
|
||||
|
||||
init_UE(NB_UE_INST,0,0);
|
||||
|
||||
init_ocm ();
|
||||
printf("Sending sync to all threads\n");
|
||||
|
||||
|
||||
@@ -1060,7 +1060,7 @@ int ru_trx_read(openair0_device *device, openair0_timestamp *ptimestamp, void **
|
||||
while (sample_count<nsamps) {
|
||||
while (current_ru_rx_timestamp[ru_id][CC_id]<
|
||||
(nsamps+last_ru_rx_timestamp[ru_id][CC_id])) {
|
||||
LOG_D(EMU,"eNB: current TS %llu, last TS %llu, sleeping\n",current_ru_rx_timestamp[ru_id][CC_id],last_ru_rx_timestamp[ru_id][CC_id]);
|
||||
LOG_D(EMU,"RU: current TS %llu, last TS %llu, sleeping\n",current_ru_rx_timestamp[ru_id][CC_id],last_ru_rx_timestamp[ru_id][CC_id]);
|
||||
usleep(500);
|
||||
}
|
||||
|
||||
@@ -1116,7 +1116,7 @@ int UE_trx_read(openair0_device *device, openair0_timestamp *ptimestamp, void **
|
||||
while (sample_count<nsamps) {
|
||||
while (current_UE_rx_timestamp[UE_id][CC_id] <
|
||||
(last_UE_rx_timestamp[UE_id][CC_id]+read_size)) {
|
||||
//LOG_D(EMU,"UE_trx_read : current TS %d, last TS %d, sleeping\n",current_UE_rx_timestamp[UE_id][CC_id],last_UE_rx_timestamp[UE_id][CC_id]);
|
||||
LOG_D(EMU,"UE_trx_read : current TS %d, last TS %d, sleeping\n",current_UE_rx_timestamp[UE_id][CC_id],last_UE_rx_timestamp[UE_id][CC_id]);
|
||||
|
||||
usleep(500);
|
||||
}
|
||||
|
||||
Reference in New Issue
Block a user