Additions for TM3 in eNB and partially in UE - RK

git-svn-id: http://svn.eurecom.fr/openair4G/trunk@6182 818b1a75-f10b-46b9-bf7c-635c3b92a50f
This commit is contained in:
Raymond Knopp
2014-12-08 07:40:35 +00:00
parent c753e7bc32
commit 669c8eb903
28 changed files with 4951 additions and 1851 deletions
+2 -1
View File
@@ -661,7 +661,8 @@ int lte_rate_matching_turbo_rx(uint32_t RTC,
int nulled=0;
#endif
if (Kmimo==0 || Mdlharq==0 || C==0 || Qm==0 || Nl==0) {
msg("lte_rate_matching.c: invalid paramters\n");
msg("lte_rate_matching.c: invalid parameters (Kmimo %d, Mdlharq %d, C %d, Qm %d, Nl %d\n",
Kmimo,Mdlharq,C,Qm,Nl);
return(-1);
}
+46 -33
View File
@@ -1098,10 +1098,13 @@ int phy_init_lte_ue(PHY_VARS_UE *phy_vars_ue,
for (j=0; j<4; j++) //frame_parms->nb_antennas_tx; j++)
ue_pdsch_vars[eNB_id]->rxdataF_ext[(j<<1)+i] = (int *)malloc16(sizeof(int)*(frame_parms->N_RB_DL*12*14));
ue_pdsch_vars[eNB_id]->rxdataF_comp = (int **)malloc16(8*sizeof(int*));
ue_pdsch_vars[eNB_id]->rxdataF_comp0 = (int **)malloc16(8*sizeof(int*));
ue_pdsch_vars[eNB_id]->rxdataF_comp1 = (int **)malloc16(8*sizeof(int*));
for (i=0; i<frame_parms->nb_antennas_rx; i++)
for (j=0; j<4;j++)//frame_parms->nb_antennas_tx; j++)
ue_pdsch_vars[eNB_id]->rxdataF_comp[(j<<1)+i] = (int *)malloc16(sizeof(int)*(frame_parms->N_RB_DL*12*14));
for (j=0; j<4;j++){
ue_pdsch_vars[eNB_id]->rxdataF_comp0[(j<<1)+i] = (int *)malloc16(sizeof(int)*(frame_parms->N_RB_DL*12*14));
ue_pdsch_vars[eNB_id]->rxdataF_comp1[(j<<1)+i] = (int *)malloc16(sizeof(int)*(frame_parms->N_RB_DL*12*14));
}
// printf("rxdataF_comp[0] %p\n",ue_pdsch_vars[eNB_id]->rxdataF_comp[0]);
ue_pdcch_vars[eNB_id]->rxdataF_comp = (int **)malloc16(8*sizeof(int*));
@@ -1130,15 +1133,21 @@ int phy_init_lte_ue(PHY_VARS_UE *phy_vars_ue,
ue_pdsch_vars[eNB_id]->pmi_ext = (unsigned char *)malloc16(frame_parms->N_RB_DL);
ue_pdsch_vars[eNB_id]->dl_ch_mag = (int **)malloc16(8*sizeof(short*));
ue_pdsch_vars[eNB_id]->dl_ch_mag0 = (int **)malloc16(8*sizeof(short*));
ue_pdsch_vars[eNB_id]->dl_ch_mag1 = (int **)malloc16(8*sizeof(short*));
for (i=0; i<frame_parms->nb_antennas_rx; i++)
for (j=0; j<4;j++)//frame_parms->nb_antennas_tx; j++)
ue_pdsch_vars[eNB_id]->dl_ch_mag[(j<<1)+i] = (int *)malloc16(7*2*sizeof(int)*(frame_parms->N_RB_DL*12));
for (j=0; j<4;j++) {
ue_pdsch_vars[eNB_id]->dl_ch_mag0[(j<<1)+i] = (int *)malloc16(7*2*sizeof(int)*(frame_parms->N_RB_DL*12));
ue_pdsch_vars[eNB_id]->dl_ch_mag1[(j<<1)+i] = (int *)malloc16(7*2*sizeof(int)*(frame_parms->N_RB_DL*12));
}
ue_pdsch_vars[eNB_id]->dl_ch_magb = (int **)malloc16(8*sizeof(short*));
ue_pdsch_vars[eNB_id]->dl_ch_magb0 = (int **)malloc16(8*sizeof(short*));
ue_pdsch_vars[eNB_id]->dl_ch_magb1 = (int **)malloc16(8*sizeof(short*));
for (i=0; i<frame_parms->nb_antennas_rx; i++)
for (j=0; j<4;j++)//frame_parms->nb_antennas_tx; j++)
ue_pdsch_vars[eNB_id]->dl_ch_magb[(j<<1)+i] = (int *)malloc16(7*2*sizeof(int)*(frame_parms->N_RB_DL*12));
for (j=0; j<4;j++) {
ue_pdsch_vars[eNB_id]->dl_ch_magb0[(j<<1)+i] = (int *)malloc16(7*2*sizeof(int)*(frame_parms->N_RB_DL*12));
ue_pdsch_vars[eNB_id]->dl_ch_magb1[(j<<1)+i] = (int *)malloc16(7*2*sizeof(int)*(frame_parms->N_RB_DL*12));
}
ue_pdsch_vars[eNB_id]->rho = (int **)malloc16(frame_parms->nb_antennas_rx*sizeof(int*));
for (i=0;i<frame_parms->nb_antennas_rx;i++)
@@ -1206,13 +1215,13 @@ int phy_init_lte_ue(PHY_VARS_UE *phy_vars_ue,
for (j=0; j<4; j++) //frame_parms->nb_antennas_tx; j++)
ue_pdsch_vars_SI[eNB_id]->rxdataF_ext[(j<<1)+i] = (int *)malloc16(sizeof(int)*(frame_parms->N_RB_DL*12*14));
ue_pdsch_vars_SI[eNB_id]->rxdataF_comp = (int **)malloc16(8*sizeof(int*));
ue_pdsch_vars_SI[eNB_id]->rxdataF_comp0 = (int **)malloc16(8*sizeof(int*));
ue_pdsch_vars_SI[eNB_id]->pmi_ext = (unsigned char *)malloc16(frame_parms->N_RB_DL);
for (i=0; i<frame_parms->nb_antennas_rx; i++)
for (j=0; j<4;j++)//frame_parms->nb_antennas_tx; j++)
ue_pdsch_vars_SI[eNB_id]->rxdataF_comp[(j<<1)+i] = (int *)malloc16(sizeof(int)*(frame_parms->N_RB_DL*12*14));
ue_pdsch_vars_SI[eNB_id]->rxdataF_comp0[(j<<1)+i] = (int *)malloc16(sizeof(int)*(frame_parms->N_RB_DL*12*14));
ue_pdsch_vars_SI[eNB_id]->rho = (int **)malloc16(frame_parms->nb_antennas_rx*sizeof(int*));
for (i=0;i<frame_parms->nb_antennas_rx;i++)
@@ -1228,10 +1237,10 @@ int phy_init_lte_ue(PHY_VARS_UE *phy_vars_ue,
for (j=0; j<4;j++)//frame_parms->nb_antennas_tx; j++)
ue_pdsch_vars_ra[eNB_id]->rxdataF_ext[(j<<1)+i] = (int *)malloc16(sizeof(int)*(frame_parms->N_RB_DL*12*14));
ue_pdsch_vars_ra[eNB_id]->rxdataF_comp = (int **)malloc16(8*sizeof(int*));
ue_pdsch_vars_ra[eNB_id]->rxdataF_comp0 = (int **)malloc16(8*sizeof(int*));
for (i=0; i<frame_parms->nb_antennas_rx; i++)
for (j=0; j<4;j++)//frame_parms->nb_antennas_tx; j++)
ue_pdsch_vars_ra[eNB_id]->rxdataF_comp[(j<<1)+i] = (int *)malloc16(sizeof(int)*(frame_parms->N_RB_DL*12*14));
ue_pdsch_vars_ra[eNB_id]->rxdataF_comp0[(j<<1)+i] = (int *)malloc16(sizeof(int)*(frame_parms->N_RB_DL*12*14));
ue_pdsch_vars_ra[eNB_id]->rho = (int **)malloc16(frame_parms->nb_antennas_rx*sizeof(int*));
@@ -1250,10 +1259,10 @@ int phy_init_lte_ue(PHY_VARS_UE *phy_vars_ue,
for (j=0; j<4;j++)//frame_parms->nb_antennas_tx; j++)
ue_pdsch_vars_mch[eNB_id]->rxdataF_ext[(j<<1)+i] = (int *)malloc16(sizeof(int)*(frame_parms->N_RB_DL*12*14));
ue_pdsch_vars_mch[eNB_id]->rxdataF_comp = (int **)malloc16(8*sizeof(int*));
ue_pdsch_vars_mch[eNB_id]->rxdataF_comp0 = (int **)malloc16(8*sizeof(int*));
for (i=0; i<frame_parms->nb_antennas_rx; i++)
for (j=0; j<4;j++)//frame_parms->nb_antennas_tx; j++)
ue_pdsch_vars_mch[eNB_id]->rxdataF_comp[(j<<1)+i] = (int *)malloc16(sizeof(int)*(2+frame_parms->N_RB_DL*12*14));
ue_pdsch_vars_mch[eNB_id]->rxdataF_comp0[(j<<1)+i] = (int *)malloc16(sizeof(int)*(2+frame_parms->N_RB_DL*12*14));
ue_pdsch_vars_mch[eNB_id]->rho = (int **)malloc16(frame_parms->nb_antennas_rx*sizeof(int*));
@@ -1282,15 +1291,15 @@ int phy_init_lte_ue(PHY_VARS_UE *phy_vars_ue,
for (j=0; j<4;j++)//frame_parms->nb_antennas_tx; j++)
ue_pdsch_vars_SI[eNB_id]->dl_ch_rho_ext[(j<<1)+i] = (int *)malloc16(7*2*sizeof(int)*(frame_parms->N_RB_DL*12));
ue_pdsch_vars_SI[eNB_id]->dl_ch_mag = (int **)malloc16(8*sizeof(short*));
ue_pdsch_vars_SI[eNB_id]->dl_ch_mag0 = (int **)malloc16(8*sizeof(short*));
for (i=0; i<frame_parms->nb_antennas_rx; i++)
for (j=0; j<4;j++)//frame_parms->nb_antennas_tx; j++)
ue_pdsch_vars_SI[eNB_id]->dl_ch_mag[(j<<1)+i] = (int *)malloc16(7*2*sizeof(int)*(frame_parms->N_RB_DL*12));
ue_pdsch_vars_SI[eNB_id]->dl_ch_mag0[(j<<1)+i] = (int *)malloc16(7*2*sizeof(int)*(frame_parms->N_RB_DL*12));
ue_pdsch_vars_SI[eNB_id]->dl_ch_magb = (int **)malloc16(8*sizeof(short*));
ue_pdsch_vars_SI[eNB_id]->dl_ch_magb0 = (int **)malloc16(8*sizeof(short*));
for (i=0; i<frame_parms->nb_antennas_rx; i++)
for (j=0; j<4;j++)//frame_parms->nb_antennas_tx; j++)
ue_pdsch_vars_SI[eNB_id]->dl_ch_magb[(j<<1)+i] = (int *)malloc16(7*2*sizeof(int)*(frame_parms->N_RB_DL*12));
ue_pdsch_vars_SI[eNB_id]->dl_ch_magb0[(j<<1)+i] = (int *)malloc16(7*2*sizeof(int)*(frame_parms->N_RB_DL*12));
ue_pdsch_vars_SI[eNB_id]->llr[0] = (short *)malloc16((8*((3*8*6144)+12))*sizeof(short));
/***/
@@ -1307,15 +1316,15 @@ int phy_init_lte_ue(PHY_VARS_UE *phy_vars_ue,
for (j=0; j<4;j++)//frame_parms->nb_antennas_tx; j++)
ue_pdsch_vars_ra[eNB_id]->dl_ch_rho_ext[(j<<1)+i] = (int *)malloc16(7*2*sizeof(int)*(frame_parms->N_RB_DL*12));
ue_pdsch_vars_ra[eNB_id]->dl_ch_mag = (int **)malloc16(8*sizeof(short*));
ue_pdsch_vars_ra[eNB_id]->dl_ch_mag0 = (int **)malloc16(8*sizeof(short*));
for (i=0; i<frame_parms->nb_antennas_rx; i++)
for (j=0; j<4;j++)//frame_parms->nb_antennas_tx; j++)
ue_pdsch_vars_ra[eNB_id]->dl_ch_mag[(j<<1)+i] = (int *)malloc16(7*2*sizeof(int)*(frame_parms->N_RB_DL*12));
ue_pdsch_vars_ra[eNB_id]->dl_ch_mag0[(j<<1)+i] = (int *)malloc16(7*2*sizeof(int)*(frame_parms->N_RB_DL*12));
ue_pdsch_vars_ra[eNB_id]->dl_ch_magb = (int **)malloc16(8*sizeof(short*));
ue_pdsch_vars_ra[eNB_id]->dl_ch_magb0 = (int **)malloc16(8*sizeof(short*));
for (i=0; i<frame_parms->nb_antennas_rx; i++)
for (j=0; j<4;j++)//frame_parms->nb_antennas_tx; j++)
ue_pdsch_vars_ra[eNB_id]->dl_ch_magb[(j<<1)+i] = (int *)malloc16(7*2*sizeof(int)*(frame_parms->N_RB_DL*12));
ue_pdsch_vars_ra[eNB_id]->dl_ch_magb0[(j<<1)+i] = (int *)malloc16(7*2*sizeof(int)*(frame_parms->N_RB_DL*12));
// ue_pdsch_vars_ra[eNB_id]->llr[0] = (short *)malloc16((8*((3*8*6144)+12))*sizeof(short));
ue_pdsch_vars_ra[eNB_id]->llr128 = (short **)malloc16(sizeof(short **));
@@ -1332,15 +1341,15 @@ int phy_init_lte_ue(PHY_VARS_UE *phy_vars_ue,
for (j=0; j<4;j++)//frame_parms->nb_antennas_tx; j++)
ue_pdsch_vars_mch[eNB_id]->dl_ch_rho_ext[(j<<1)+i] = (int *)malloc16(7*2*sizeof(int)*(frame_parms->N_RB_DL*12));
ue_pdsch_vars_mch[eNB_id]->dl_ch_mag = (int **)malloc16(8*sizeof(short*));
ue_pdsch_vars_mch[eNB_id]->dl_ch_mag0 = (int **)malloc16(8*sizeof(short*));
for (i=0; i<frame_parms->nb_antennas_rx; i++)
for (j=0; j<4;j++)//frame_parms->nb_antennas_tx; j++)
ue_pdsch_vars_mch[eNB_id]->dl_ch_mag[(j<<1)+i] = (int *)malloc16(7*2*sizeof(int)*(frame_parms->N_RB_DL*12));
ue_pdsch_vars_mch[eNB_id]->dl_ch_mag0[(j<<1)+i] = (int *)malloc16(7*2*sizeof(int)*(frame_parms->N_RB_DL*12));
ue_pdsch_vars_mch[eNB_id]->dl_ch_magb = (int **)malloc16(8*sizeof(short*));
ue_pdsch_vars_mch[eNB_id]->dl_ch_magb0 = (int **)malloc16(8*sizeof(short*));
for (i=0; i<frame_parms->nb_antennas_rx; i++)
for (j=0; j<4;j++)//frame_parms->nb_antennas_tx; j++)
ue_pdsch_vars_mch[eNB_id]->dl_ch_magb[(j<<1)+i] = (int *)malloc16(7*2*sizeof(int)*(frame_parms->N_RB_DL*12));
ue_pdsch_vars_mch[eNB_id]->dl_ch_magb0[(j<<1)+i] = (int *)malloc16(7*2*sizeof(int)*(frame_parms->N_RB_DL*12));
// ue_pdsch_vars_mch[eNB_id]->llr[0] = (short *)malloc16((8*((3*8*6144)+12))*sizeof(short));
ue_pdsch_vars_mch[eNB_id]->llr128 = (short **)malloc16(sizeof(short **));
@@ -1419,13 +1428,13 @@ int phy_init_lte_ue(PHY_VARS_UE *phy_vars_ue,
}
}
ue_pdsch_vars[eNB_id]->rxdataF_comp = (int **)malloc16(8*sizeof(int*));
ue_pdsch_vars[eNB_id]->rxdataF_comp0 = (int **)malloc16(8*sizeof(int*));
ue_pdsch_vars_flp[eNB_id]->rxdataF_comp = (double **)malloc16(8*sizeof(int*));
for (i=0; i<frame_parms->nb_antennas_rx; i++)
{
for (j=0; j<4;j++)//frame_parms->nb_antennas_tx; j++)
{
ue_pdsch_vars[eNB_id]->rxdataF_comp[(j<<1)+i] = (int *)malloc16(sizeof(int)*(frame_parms->N_RB_DL*12*14));
ue_pdsch_vars[eNB_id]->rxdataF_comp0[(j<<1)+i] = (int *)malloc16(sizeof(int)*(frame_parms->N_RB_DL*12*14));
ue_pdsch_vars_flp[eNB_id]->rxdataF_comp[(j<<1)+i] = (double *)malloc16(sizeof(int)*(frame_parms->N_RB_DL*12*14));
}
}
@@ -1456,23 +1465,23 @@ int phy_init_lte_ue(PHY_VARS_UE *phy_vars_ue,
ue_pdsch_vars[eNB_id]->pmi_ext = (unsigned char *)malloc16(frame_parms->N_RB_DL);
ue_pdsch_vars_flp[eNB_id]->pmi_ext = (unsigned char *)malloc16(frame_parms->N_RB_DL);
ue_pdsch_vars[eNB_id]->dl_ch_mag = (int **)malloc16(8*sizeof(short*));
ue_pdsch_vars[eNB_id]->dl_ch_mag0 = (int **)malloc16(8*sizeof(short*));
ue_pdsch_vars_flp[eNB_id]->dl_ch_mag = (double **)malloc16(8*sizeof(double*));
for (i=0; i<frame_parms->nb_antennas_rx; i++)
{
for (j=0; j<4;j++)//frame_parms->nb_antennas_tx; j++)
{
ue_pdsch_vars[eNB_id]->dl_ch_mag[(j<<1)+i] = (int *)malloc16(7*2*sizeof(int)*(frame_parms->N_RB_DL*12));
ue_pdsch_vars[eNB_id]->dl_ch_mag0[(j<<1)+i] = (int *)malloc16(7*2*sizeof(int)*(frame_parms->N_RB_DL*12));
ue_pdsch_vars_flp[eNB_id]->dl_ch_mag[(j<<1)+i] = (double *)malloc16(7*2*sizeof(double)*(frame_parms->N_RB_DL*12));
}
}
ue_pdsch_vars[eNB_id]->dl_ch_magb = (int **)malloc16(8*sizeof(short*));
ue_pdsch_vars[eNB_id]->dl_ch_magb0 = (int **)malloc16(8*sizeof(short*));
ue_pdsch_vars_flp[eNB_id]->dl_ch_magb = (double **)malloc16(8*sizeof(double*));
for (i=0; i<frame_parms->nb_antennas_rx; i++)
{
for (j=0; j<4;j++)//frame_parms->nb_antennas_tx; j++)
{
ue_pdsch_vars[eNB_id]->dl_ch_magb[(j<<1)+i] = (int *)malloc16(7*2*sizeof(int)*(frame_parms->N_RB_DL*12));
ue_pdsch_vars[eNB_id]->dl_ch_magb0[(j<<1)+i] = (int *)malloc16(7*2*sizeof(int)*(frame_parms->N_RB_DL*12));
ue_pdsch_vars_flp[eNB_id]->dl_ch_magb[(j<<1)+i] = (double *)malloc16(7*2*sizeof(double)*(frame_parms->N_RB_DL*12));
}
}
@@ -1504,6 +1513,10 @@ int phy_init_lte_ue(PHY_VARS_UE *phy_vars_ue,
phy_vars_ue->pdsch_config_dedicated->p_a = PDSCH_ConfigDedicated__p_a_dB0; //defaul value until overwritten by RRCConnectionReconfiguration
// set channel estimation to do linear interpolation in time
phy_vars_ue->high_speed_flag = 1;
phy_vars_ue->ch_est_alpha = 24576;
init_prach_tables(839);
return(0);
@@ -45,7 +45,7 @@ int lte_dl_channel_estimation(PHY_VARS_UE *phy_vars_ue,
int pilot[2][200] __attribute__((aligned(16)));
unsigned char nu,aarx,aa;
unsigned char nu,aarx;
unsigned short k;
unsigned int rb,pilot_cnt;
short ch[2],*pil,*rxF,*dl_ch,*dl_ch_prev,*f,*f2,*fl,*f2l2,*fr,*f2r2,*f2_dc,*f_dc;
@@ -88,7 +88,10 @@ int lte_dl_channel_estimation(PHY_VARS_UE *phy_vars_ue,
//ch_offset = (l*(phy_vars_ue->lte_frame_parms.ofdm_symbol_size));
ch_offset = phy_vars_ue->lte_frame_parms.ofdm_symbol_size*symbol;
if (phy_vars_ue->high_speed_flag == 0) // use second channel estimate position for temporary storage
ch_offset = phy_vars_ue->lte_frame_parms.ofdm_symbol_size ;
else
ch_offset = phy_vars_ue->lte_frame_parms.ofdm_symbol_size*symbol;
symbol_offset = phy_vars_ue->lte_frame_parms.ofdm_symbol_size*symbol;
k = (nu + nushift)%6;
@@ -185,9 +188,15 @@ int lte_dl_channel_estimation(PHY_VARS_UE *phy_vars_ue,
rxF = (short *)&rxdataF[aarx][((symbol_offset+k+phy_vars_ue->lte_frame_parms.first_carrier_offset))];
dl_ch = (short *)&dl_ch_estimates[(p<<1)+aarx][ch_offset];
// if (eNb_id==0)
memset(dl_ch,0,4*(phy_vars_ue->lte_frame_parms.ofdm_symbol_size));
if (phy_vars_ue->high_speed_flag==0) // multiply previous channel estimate by ch_est_alpha
multadd_complex_vector_real_scalar(dl_ch-(phy_vars_ue->lte_frame_parms.ofdm_symbol_size<<1),
phy_vars_ue->ch_est_alpha,dl_ch-(phy_vars_ue->lte_frame_parms.ofdm_symbol_size<<1),
1,phy_vars_ue->lte_frame_parms.ofdm_symbol_size);
if ((phy_vars_ue->lte_frame_parms.N_RB_DL==6) ||
(phy_vars_ue->lte_frame_parms.N_RB_DL==50) ||
(phy_vars_ue->lte_frame_parms.N_RB_DL==100)) {
@@ -610,75 +619,83 @@ int lte_dl_channel_estimation(PHY_VARS_UE *phy_vars_ue,
#ifndef PERFECT_CE
// Temporal Interpolation
// printf("ch_offset %d\n",ch_offset);
dl_ch = (short *)&dl_ch_estimates[(p<<1)+aarx][ch_offset];
if (symbol == 0) {
// printf("Interpolating %d->0\n",4-phy_vars_ue->lte_frame_parms.Ncp);
// dl_ch_prev = (short *)&dl_ch_estimates[(p<<1)+aarx][(4-phy_vars_ue->lte_frame_parms.Ncp)*(phy_vars_ue->lte_frame_parms.ofdm_symbol_size)];
dl_ch_prev = (short *)&dl_ch_estimates[(p<<1)+aarx][pilot3*(phy_vars_ue->lte_frame_parms.ofdm_symbol_size)];
multadd_complex_vector_real_scalar(dl_ch_prev,21845,dl_ch_prev+(2*(phy_vars_ue->lte_frame_parms.ofdm_symbol_size)),1,phy_vars_ue->lte_frame_parms.ofdm_symbol_size);
multadd_complex_vector_real_scalar(dl_ch,10923,dl_ch_prev+(2*(phy_vars_ue->lte_frame_parms.ofdm_symbol_size)),0,phy_vars_ue->lte_frame_parms.ofdm_symbol_size);
multadd_complex_vector_real_scalar(dl_ch_prev,10923,dl_ch_prev+(2*((phy_vars_ue->lte_frame_parms.ofdm_symbol_size)<<1)),1,phy_vars_ue->lte_frame_parms.ofdm_symbol_size);
multadd_complex_vector_real_scalar(dl_ch,21845,dl_ch_prev+(2*((phy_vars_ue->lte_frame_parms.ofdm_symbol_size)<<1)),0,phy_vars_ue->lte_frame_parms.ofdm_symbol_size);
} // this is 1/3,2/3 combination for pilots spaced by 3 symbols
else if (symbol == pilot1) {
dl_ch_prev = (short *)&dl_ch_estimates[(p<<1)+aarx][0];
if (phy_vars_ue->lte_frame_parms.Ncp==0) {// pilot spacing 4 symbols (1/4,1/2,3/4 combination)
multadd_complex_vector_real_scalar(dl_ch_prev,24576,dl_ch_prev+(2*(phy_vars_ue->lte_frame_parms.ofdm_symbol_size)),1,phy_vars_ue->lte_frame_parms.ofdm_symbol_size);
multadd_complex_vector_real_scalar(dl_ch,8192,dl_ch_prev+(2*(phy_vars_ue->lte_frame_parms.ofdm_symbol_size)),0,phy_vars_ue->lte_frame_parms.ofdm_symbol_size);
multadd_complex_vector_real_scalar(dl_ch_prev,16384,dl_ch_prev+(2*((phy_vars_ue->lte_frame_parms.ofdm_symbol_size)<<1)),1,phy_vars_ue->lte_frame_parms.ofdm_symbol_size);
multadd_complex_vector_real_scalar(dl_ch,16384,dl_ch_prev+(2*((phy_vars_ue->lte_frame_parms.ofdm_symbol_size)<<1)),0,phy_vars_ue->lte_frame_parms.ofdm_symbol_size);
multadd_complex_vector_real_scalar(dl_ch_prev,8192,dl_ch_prev+(3*2*(phy_vars_ue->lte_frame_parms.ofdm_symbol_size)),1,phy_vars_ue->lte_frame_parms.ofdm_symbol_size);
multadd_complex_vector_real_scalar(dl_ch,24576,dl_ch_prev+(3*2*(phy_vars_ue->lte_frame_parms.ofdm_symbol_size)),0,phy_vars_ue->lte_frame_parms.ofdm_symbol_size);
}
else {
multadd_complex_vector_real_scalar(dl_ch_prev,10923,dl_ch_prev+(2*(phy_vars_ue->lte_frame_parms.ofdm_symbol_size)),1,phy_vars_ue->lte_frame_parms.ofdm_symbol_size);
multadd_complex_vector_real_scalar(dl_ch,21845,dl_ch_prev+(2*(phy_vars_ue->lte_frame_parms.ofdm_symbol_size)),0,phy_vars_ue->lte_frame_parms.ofdm_symbol_size);
multadd_complex_vector_real_scalar(dl_ch_prev,21845,dl_ch_prev+(2*(phy_vars_ue->lte_frame_parms.ofdm_symbol_size)<<1),1,phy_vars_ue->lte_frame_parms.ofdm_symbol_size);
multadd_complex_vector_real_scalar(dl_ch,10923,dl_ch_prev+(2*((phy_vars_ue->lte_frame_parms.ofdm_symbol_size)<<1)),0,phy_vars_ue->lte_frame_parms.ofdm_symbol_size);
} // pilot spacing 3 symbols (1/3,2/3 combination)
if (phy_vars_ue->high_speed_flag == 0) {
multadd_complex_vector_real_scalar(dl_ch,
32767-phy_vars_ue->ch_est_alpha,
dl_ch-(phy_vars_ue->lte_frame_parms.ofdm_symbol_size<<1),0,phy_vars_ue->lte_frame_parms.ofdm_symbol_size);
}
else if (symbol == pilot2) {
dl_ch_prev = (short *)&dl_ch_estimates[(p<<1)+aarx][pilot1*(phy_vars_ue->lte_frame_parms.ofdm_symbol_size)];
multadd_complex_vector_real_scalar(dl_ch_prev,21845,dl_ch_prev+(2*(phy_vars_ue->lte_frame_parms.ofdm_symbol_size)),1,phy_vars_ue->lte_frame_parms.ofdm_symbol_size);
multadd_complex_vector_real_scalar(dl_ch,10923,dl_ch_prev+(2*(phy_vars_ue->lte_frame_parms.ofdm_symbol_size)),0,phy_vars_ue->lte_frame_parms.ofdm_symbol_size);
multadd_complex_vector_real_scalar(dl_ch_prev,10923,dl_ch_prev+(2*((phy_vars_ue->lte_frame_parms.ofdm_symbol_size)<<1)),1,phy_vars_ue->lte_frame_parms.ofdm_symbol_size);
multadd_complex_vector_real_scalar(dl_ch,21845,dl_ch_prev+(2*((phy_vars_ue->lte_frame_parms.ofdm_symbol_size)<<1)),0,phy_vars_ue->lte_frame_parms.ofdm_symbol_size);
}
else { // symbol == pilot3
// printf("Interpolating 0->%d\n",4-phy_vars_ue->lte_frame_parms.Ncp);
dl_ch_prev = (short *)&dl_ch_estimates[(p<<1)+aarx][pilot2*(phy_vars_ue->lte_frame_parms.ofdm_symbol_size)];
if (phy_vars_ue->lte_frame_parms.Ncp==0) {// pilot spacing 4 symbols (1/4,1/2,3/4 combination)
multadd_complex_vector_real_scalar(dl_ch_prev,24576,dl_ch_prev+(2*(phy_vars_ue->lte_frame_parms.ofdm_symbol_size)),1,phy_vars_ue->lte_frame_parms.ofdm_symbol_size);
multadd_complex_vector_real_scalar(dl_ch,8192,dl_ch_prev+(2*(phy_vars_ue->lte_frame_parms.ofdm_symbol_size)),0,phy_vars_ue->lte_frame_parms.ofdm_symbol_size);
else { // high_speed_flag == 1
if (symbol == 0) {
// printf("Interpolating %d->0\n",4-phy_vars_ue->lte_frame_parms.Ncp);
// dl_ch_prev = (short *)&dl_ch_estimates[(p<<1)+aarx][(4-phy_vars_ue->lte_frame_parms.Ncp)*(phy_vars_ue->lte_frame_parms.ofdm_symbol_size)];
dl_ch_prev = (short *)&dl_ch_estimates[(p<<1)+aarx][pilot3*(phy_vars_ue->lte_frame_parms.ofdm_symbol_size)];
multadd_complex_vector_real_scalar(dl_ch_prev,16384,dl_ch_prev+(2*((phy_vars_ue->lte_frame_parms.ofdm_symbol_size)<<1)),1,phy_vars_ue->lte_frame_parms.ofdm_symbol_size);
multadd_complex_vector_real_scalar(dl_ch,16384,dl_ch_prev+(2*((phy_vars_ue->lte_frame_parms.ofdm_symbol_size)<<1)),0,phy_vars_ue->lte_frame_parms.ofdm_symbol_size);
multadd_complex_vector_real_scalar(dl_ch_prev,8192,dl_ch_prev+(3*2*(phy_vars_ue->lte_frame_parms.ofdm_symbol_size)),1,phy_vars_ue->lte_frame_parms.ofdm_symbol_size);
multadd_complex_vector_real_scalar(dl_ch,24576,dl_ch_prev+(3*2*(phy_vars_ue->lte_frame_parms.ofdm_symbol_size)),0,phy_vars_ue->lte_frame_parms.ofdm_symbol_size);
multadd_complex_vector_real_scalar(dl_ch_prev,21845,dl_ch_prev+(2*(phy_vars_ue->lte_frame_parms.ofdm_symbol_size)),1,phy_vars_ue->lte_frame_parms.ofdm_symbol_size);
multadd_complex_vector_real_scalar(dl_ch,10923,dl_ch_prev+(2*(phy_vars_ue->lte_frame_parms.ofdm_symbol_size)),0,phy_vars_ue->lte_frame_parms.ofdm_symbol_size);
multadd_complex_vector_real_scalar(dl_ch_prev,10923,dl_ch_prev+(2*((phy_vars_ue->lte_frame_parms.ofdm_symbol_size)<<1)),1,phy_vars_ue->lte_frame_parms.ofdm_symbol_size);
multadd_complex_vector_real_scalar(dl_ch,21845,dl_ch_prev+(2*((phy_vars_ue->lte_frame_parms.ofdm_symbol_size)<<1)),0,phy_vars_ue->lte_frame_parms.ofdm_symbol_size);
} // this is 1/3,2/3 combination for pilots spaced by 3 symbols
else if (symbol == pilot1) {
dl_ch_prev = (short *)&dl_ch_estimates[(p<<1)+aarx][0];
if (phy_vars_ue->lte_frame_parms.Ncp==0) {// pilot spacing 4 symbols (1/4,1/2,3/4 combination)
multadd_complex_vector_real_scalar(dl_ch_prev,24576,dl_ch_prev+(2*(phy_vars_ue->lte_frame_parms.ofdm_symbol_size)),1,phy_vars_ue->lte_frame_parms.ofdm_symbol_size);
multadd_complex_vector_real_scalar(dl_ch,8192,dl_ch_prev+(2*(phy_vars_ue->lte_frame_parms.ofdm_symbol_size)),0,phy_vars_ue->lte_frame_parms.ofdm_symbol_size);
multadd_complex_vector_real_scalar(dl_ch_prev,16384,dl_ch_prev+(2*((phy_vars_ue->lte_frame_parms.ofdm_symbol_size)<<1)),1,phy_vars_ue->lte_frame_parms.ofdm_symbol_size);
multadd_complex_vector_real_scalar(dl_ch,16384,dl_ch_prev+(2*((phy_vars_ue->lte_frame_parms.ofdm_symbol_size)<<1)),0,phy_vars_ue->lte_frame_parms.ofdm_symbol_size);
multadd_complex_vector_real_scalar(dl_ch_prev,8192,dl_ch_prev+(3*2*(phy_vars_ue->lte_frame_parms.ofdm_symbol_size)),1,phy_vars_ue->lte_frame_parms.ofdm_symbol_size);
multadd_complex_vector_real_scalar(dl_ch,24576,dl_ch_prev+(3*2*(phy_vars_ue->lte_frame_parms.ofdm_symbol_size)),0,phy_vars_ue->lte_frame_parms.ofdm_symbol_size);
}
else {
multadd_complex_vector_real_scalar(dl_ch_prev,10923,dl_ch_prev+(2*(phy_vars_ue->lte_frame_parms.ofdm_symbol_size)),1,phy_vars_ue->lte_frame_parms.ofdm_symbol_size);
multadd_complex_vector_real_scalar(dl_ch,21845,dl_ch_prev+(2*(phy_vars_ue->lte_frame_parms.ofdm_symbol_size)),0,phy_vars_ue->lte_frame_parms.ofdm_symbol_size);
multadd_complex_vector_real_scalar(dl_ch_prev,21845,dl_ch_prev+(2*(phy_vars_ue->lte_frame_parms.ofdm_symbol_size)<<1),1,phy_vars_ue->lte_frame_parms.ofdm_symbol_size);
multadd_complex_vector_real_scalar(dl_ch,10923,dl_ch_prev+(2*((phy_vars_ue->lte_frame_parms.ofdm_symbol_size)<<1)),0,phy_vars_ue->lte_frame_parms.ofdm_symbol_size);
} // pilot spacing 3 symbols (1/3,2/3 combination)
}
else {
multadd_complex_vector_real_scalar(dl_ch_prev,10923,dl_ch_prev+(2*(phy_vars_ue->lte_frame_parms.ofdm_symbol_size)),1,phy_vars_ue->lte_frame_parms.ofdm_symbol_size);
multadd_complex_vector_real_scalar(dl_ch,21845,dl_ch_prev+(2*(phy_vars_ue->lte_frame_parms.ofdm_symbol_size)),0,phy_vars_ue->lte_frame_parms.ofdm_symbol_size);
else if (symbol == pilot2) {
dl_ch_prev = (short *)&dl_ch_estimates[(p<<1)+aarx][pilot1*(phy_vars_ue->lte_frame_parms.ofdm_symbol_size)];
multadd_complex_vector_real_scalar(dl_ch_prev,21845,dl_ch_prev+(2*(phy_vars_ue->lte_frame_parms.ofdm_symbol_size)),1,phy_vars_ue->lte_frame_parms.ofdm_symbol_size);
multadd_complex_vector_real_scalar(dl_ch,10923,dl_ch_prev+(2*(phy_vars_ue->lte_frame_parms.ofdm_symbol_size)),0,phy_vars_ue->lte_frame_parms.ofdm_symbol_size);
multadd_complex_vector_real_scalar(dl_ch_prev,21845,dl_ch_prev+(2*(phy_vars_ue->lte_frame_parms.ofdm_symbol_size)<<1),1,phy_vars_ue->lte_frame_parms.ofdm_symbol_size);
multadd_complex_vector_real_scalar(dl_ch,10923,dl_ch_prev+(2*((phy_vars_ue->lte_frame_parms.ofdm_symbol_size)<<1)),0,phy_vars_ue->lte_frame_parms.ofdm_symbol_size);
} // pilot spacing 3 symbols (1/3,2/3 combination)
multadd_complex_vector_real_scalar(dl_ch_prev,10923,dl_ch_prev+(2*((phy_vars_ue->lte_frame_parms.ofdm_symbol_size)<<1)),1,phy_vars_ue->lte_frame_parms.ofdm_symbol_size);
multadd_complex_vector_real_scalar(dl_ch,21845,dl_ch_prev+(2*((phy_vars_ue->lte_frame_parms.ofdm_symbol_size)<<1)),0,phy_vars_ue->lte_frame_parms.ofdm_symbol_size);
}
else { // symbol == pilot3
// printf("Interpolating 0->%d\n",4-phy_vars_ue->lte_frame_parms.Ncp);
dl_ch_prev = (short *)&dl_ch_estimates[(p<<1)+aarx][pilot2*(phy_vars_ue->lte_frame_parms.ofdm_symbol_size)];
if (phy_vars_ue->lte_frame_parms.Ncp==0) {// pilot spacing 4 symbols (1/4,1/2,3/4 combination)
multadd_complex_vector_real_scalar(dl_ch_prev,24576,dl_ch_prev+(2*(phy_vars_ue->lte_frame_parms.ofdm_symbol_size)),1,phy_vars_ue->lte_frame_parms.ofdm_symbol_size);
multadd_complex_vector_real_scalar(dl_ch,8192,dl_ch_prev+(2*(phy_vars_ue->lte_frame_parms.ofdm_symbol_size)),0,phy_vars_ue->lte_frame_parms.ofdm_symbol_size);
multadd_complex_vector_real_scalar(dl_ch_prev,16384,dl_ch_prev+(2*((phy_vars_ue->lte_frame_parms.ofdm_symbol_size)<<1)),1,phy_vars_ue->lte_frame_parms.ofdm_symbol_size);
multadd_complex_vector_real_scalar(dl_ch,16384,dl_ch_prev+(2*((phy_vars_ue->lte_frame_parms.ofdm_symbol_size)<<1)),0,phy_vars_ue->lte_frame_parms.ofdm_symbol_size);
multadd_complex_vector_real_scalar(dl_ch_prev,8192,dl_ch_prev+(3*2*(phy_vars_ue->lte_frame_parms.ofdm_symbol_size)),1,phy_vars_ue->lte_frame_parms.ofdm_symbol_size);
multadd_complex_vector_real_scalar(dl_ch,24576,dl_ch_prev+(3*2*(phy_vars_ue->lte_frame_parms.ofdm_symbol_size)),0,phy_vars_ue->lte_frame_parms.ofdm_symbol_size);
}
else {
multadd_complex_vector_real_scalar(dl_ch_prev,10923,dl_ch_prev+(2*(phy_vars_ue->lte_frame_parms.ofdm_symbol_size)),1,phy_vars_ue->lte_frame_parms.ofdm_symbol_size);
multadd_complex_vector_real_scalar(dl_ch,21845,dl_ch_prev+(2*(phy_vars_ue->lte_frame_parms.ofdm_symbol_size)),0,phy_vars_ue->lte_frame_parms.ofdm_symbol_size);
multadd_complex_vector_real_scalar(dl_ch_prev,21845,dl_ch_prev+(2*(phy_vars_ue->lte_frame_parms.ofdm_symbol_size)<<1),1,phy_vars_ue->lte_frame_parms.ofdm_symbol_size);
multadd_complex_vector_real_scalar(dl_ch,10923,dl_ch_prev+(2*((phy_vars_ue->lte_frame_parms.ofdm_symbol_size)<<1)),0,phy_vars_ue->lte_frame_parms.ofdm_symbol_size);
} // pilot spacing 3 symbols (1/3,2/3 combination)
}
}
#endif
}
void (*idft)(int16_t *,int16_t *, int);
switch (phy_vars_ue->lte_frame_parms.log2_symbol_size) {
case 7:
idft = idft128;
@@ -705,7 +722,7 @@ int lte_dl_channel_estimation(PHY_VARS_UE *phy_vars_ue,
if (phy_vars_ue->lte_ue_common_vars.dl_ch_estimates[eNB_offset][(p<<1)+aarx])
idft((int16_t*) &phy_vars_ue->lte_ue_common_vars.dl_ch_estimates[eNB_offset][(p<<1)+aarx][8],
(int16_t*) phy_vars_ue->lte_ue_common_vars.dl_ch_estimates_time[eNB_offset][(p<<1)+aarx],1);
}
}
return(0);
}
+198 -31
View File
@@ -254,6 +254,11 @@ uint8_t *generate_dci0(uint8_t *dci,
dci_flip[5] = dci[2];
dci_flip[6] = dci[1];
dci_flip[7] = dci[0];
#ifdef DEBUG_DCI_ENCODING
msg("DCI => %x,%x,%x,%x,%x,%x,%x,%x\n",
dci_flip[0],dci_flip[1],dci_flip[2],dci_flip[3],
dci_flip[4],dci_flip[5],dci_flip[6],dci_flip[7]);
#endif
}
dci_encoding(dci_flip,DCI_LENGTH,coded_bits,e,rnti);
@@ -812,6 +817,7 @@ void pdcch_extract_rbs_single(int32_t **rxdataF,
int32_t **rxdataF_ext,
int32_t **dl_ch_estimates_ext,
uint8_t symbol,
uint32_t high_speed_flag,
LTE_DL_FRAME_PARMS *frame_parms) {
@@ -828,8 +834,11 @@ void pdcch_extract_rbs_single(int32_t **rxdataF,
msg("[PHY] extract_rbs_single: symbol_mod %d\n",symbol_mod);
#endif
for (aarx=0;aarx<frame_parms->nb_antennas_rx;aarx++) {
dl_ch0 = &dl_ch_estimates[aarx][5+(symbol*(frame_parms->ofdm_symbol_size))];
if (high_speed_flag == 1)
dl_ch0 = &dl_ch_estimates[aarx][5+(symbol*(frame_parms->ofdm_symbol_size))];
else
dl_ch0 = &dl_ch_estimates[aarx][5];
dl_ch0_ext = &dl_ch_estimates_ext[aarx][symbol*(frame_parms->N_RB_DL*12)];
rxF_ext = &rxdataF_ext[aarx][symbol*(frame_parms->N_RB_DL*12)];
@@ -1013,6 +1022,7 @@ void pdcch_extract_rbs_dual(int32_t **rxdataF,
int32_t **rxdataF_ext,
int32_t **dl_ch_estimates_ext,
uint8_t symbol,
uint32_t high_speed_flag,
LTE_DL_FRAME_PARMS *frame_parms) {
@@ -1025,10 +1035,16 @@ void pdcch_extract_rbs_dual(int32_t **rxdataF,
symbol_mod = (symbol>=(7-frame_parms->Ncp)) ? symbol-(7-frame_parms->Ncp) : symbol;
for (aarx=0;aarx<frame_parms->nb_antennas_rx;aarx++) {
dl_ch0 = &dl_ch_estimates[aarx][5+(symbol*(frame_parms->ofdm_symbol_size))];
if (high_speed_flag==1) {
dl_ch0 = &dl_ch_estimates[aarx][5+(symbol*(frame_parms->ofdm_symbol_size))];
dl_ch1 = &dl_ch_estimates[2+aarx][5+(symbol*(frame_parms->ofdm_symbol_size))];
}
else {
dl_ch0 = &dl_ch_estimates[aarx][5];
dl_ch1 = &dl_ch_estimates[2+aarx][5];
}
dl_ch0_ext = &dl_ch_estimates_ext[aarx][symbol*(frame_parms->N_RB_DL*12)];
dl_ch1 = &dl_ch_estimates[2+aarx][5+(symbol*(frame_parms->ofdm_symbol_size))];
dl_ch1_ext = &dl_ch_estimates_ext[2+aarx][symbol*(frame_parms->N_RB_DL*12)];
// msg("pdcch extract_rbs: rxF_ext pos %d\n",symbol*(frame_parms->N_RB_DL*12));
@@ -1524,6 +1540,7 @@ int32_t rx_pdcch(LTE_UE_COMMON *lte_ue_common_vars,
uint8_t subframe,
uint8_t eNB_id,
MIMO_mode_t mimo_mode,
uint32_t high_speed_flag,
uint8_t is_secondary_ue) {
uint8_t log2_maxh,aatx,aarx;
@@ -1543,6 +1560,7 @@ int32_t rx_pdcch(LTE_UE_COMMON *lte_ue_common_vars,
lte_ue_pdcch_vars[eNB_id]->rxdataF_ext,
lte_ue_pdcch_vars[eNB_id]->dl_ch_estimates_ext,
s,
high_speed_flag,
frame_parms);
#ifdef MU_RECEIVER
pdcch_extract_rbs_single(lte_ue_common_vars->rxdataF,
@@ -1550,6 +1568,7 @@ int32_t rx_pdcch(LTE_UE_COMMON *lte_ue_common_vars,
lte_ue_pdcch_vars[eNB_id_i]->rxdataF_ext,//shift by two to simulate transmission from a second antenna
lte_ue_pdcch_vars[eNB_id_i]->dl_ch_estimates_ext,//shift by two to simulate transmission from a second antenna
s,
high_speed_flag,
frame_parms);
#endif //MU_RECEIVER
} else if (frame_parms->nb_antennas_tx_eNB>1) {
@@ -1558,6 +1577,7 @@ int32_t rx_pdcch(LTE_UE_COMMON *lte_ue_common_vars,
lte_ue_pdcch_vars[eNB_id]->rxdataF_ext,
lte_ue_pdcch_vars[eNB_id]->dl_ch_estimates_ext,
s,
high_speed_flag,
frame_parms);
} else {
pdcch_extract_rbs_single(lte_ue_common_vars->rxdataF,
@@ -1565,6 +1585,7 @@ int32_t rx_pdcch(LTE_UE_COMMON *lte_ue_common_vars,
lte_ue_pdcch_vars[eNB_id]->rxdataF_ext,
lte_ue_pdcch_vars[eNB_id]->dl_ch_estimates_ext,
s,
high_speed_flag,
frame_parms);
}
}
@@ -1832,13 +1853,13 @@ uint8_t get_num_pdcch_symbols(uint8_t num_dci,
}
uint8_t generate_dci_top(uint8_t num_ue_spec_dci,
uint8_t num_common_dci,
DCI_ALLOC_t *dci_alloc,
uint32_t n_rnti,
int16_t amp,
LTE_DL_FRAME_PARMS *frame_parms,
mod_sym_t **txdataF,
uint32_t subframe) {
uint8_t num_common_dci,
DCI_ALLOC_t *dci_alloc,
uint32_t n_rnti,
int16_t amp,
LTE_DL_FRAME_PARMS *frame_parms,
mod_sym_t **txdataF,
uint32_t subframe) {
uint8_t *e_ptr,num_pdcch_symbols;
int8_t L;
@@ -2451,6 +2472,11 @@ void dci_decoding_procedure0(LTE_UE_PDCCH **lte_ue_pdcch_vars,int do_common,uint
dci_alloc[*dci_cnt].dci_pdu[2] = dci_decoded_output[5];
dci_alloc[*dci_cnt].dci_pdu[1] = dci_decoded_output[6];
dci_alloc[*dci_cnt].dci_pdu[0] = dci_decoded_output[7];
#ifdef DEBUG_DCI_DECODING
msg("DCI => %x,%x,%x,%x,%x,%x,%x,%x\n",
dci_decoded_output[0],dci_decoded_output[1],dci_decoded_output[2],dci_decoded_output[3],
dci_decoded_output[4],dci_decoded_output[5],dci_decoded_output[6],dci_decoded_output[7]);
#endif
}
if (crc==si_rnti) {
@@ -2540,6 +2566,7 @@ uint16_t dci_decoding_procedure(PHY_VARS_UE *phy_vars_ue,
uint8_t format0_size_bits,format0_size_bytes;
uint8_t format1_size_bits,format1_size_bytes;
uint8_t format2_size_bits,format2_size_bytes;
uint8_t format2A_size_bits,format2A_size_bytes;
switch (frame_parms->N_RB_DL) {
case 6:
@@ -2550,13 +2577,17 @@ uint16_t dci_decoding_procedure(PHY_VARS_UE *phy_vars_ue,
format0_size_bytes = sizeof(DCI0_1_5MHz_TDD_1_6_t);
format1_size_bits = sizeof_DCI1_1_5MHz_TDD_t;
format1_size_bytes = sizeof(DCI1_1_5MHz_TDD_t);
if (frame_parms->nb_antennas_tx == 2) {
if (frame_parms->nb_antennas_tx_eNB == 2) {
format2_size_bits = sizeof_DCI2_1_5MHz_2A_TDD_t;
format2_size_bytes = sizeof(DCI2_1_5MHz_2A_TDD_t);
format2A_size_bits = sizeof_DCI2A_1_5MHz_2A_TDD_t;
format2A_size_bytes = sizeof(DCI2A_1_5MHz_2A_TDD_t);
}
else if (frame_parms->nb_antennas_tx == 4) {
else if (frame_parms->nb_antennas_tx_eNB == 4) {
format2_size_bits = sizeof_DCI2_1_5MHz_4A_TDD_t;
format2_size_bytes = sizeof(DCI2_1_5MHz_4A_TDD_t);
format2A_size_bits = sizeof_DCI2A_1_5MHz_4A_TDD_t;
format2A_size_bytes = sizeof(DCI2A_1_5MHz_4A_TDD_t);
}
}
else {
@@ -2566,13 +2597,17 @@ uint16_t dci_decoding_procedure(PHY_VARS_UE *phy_vars_ue,
format0_size_bytes = sizeof(DCI0_1_5MHz_FDD_t);
format1_size_bits = sizeof_DCI1_1_5MHz_FDD_t;
format1_size_bytes = sizeof(DCI1_1_5MHz_FDD_t);
if (frame_parms->nb_antennas_tx == 2) {
if (frame_parms->nb_antennas_tx_eNB == 2) {
format2_size_bits = sizeof_DCI2_1_5MHz_2A_FDD_t;
format2_size_bytes = sizeof(DCI2_1_5MHz_2A_FDD_t);
format2A_size_bits = sizeof_DCI2A_1_5MHz_2A_FDD_t;
format2A_size_bytes = sizeof(DCI2A_1_5MHz_2A_FDD_t);
}
else if (frame_parms->nb_antennas_tx == 4) {
else if (frame_parms->nb_antennas_tx_eNB == 4) {
format2_size_bits = sizeof_DCI2_1_5MHz_4A_FDD_t;
format2_size_bytes = sizeof(DCI2_1_5MHz_4A_FDD_t);
format2A_size_bits = sizeof_DCI2A_1_5MHz_4A_FDD_t;
format2A_size_bytes = sizeof(DCI2A_1_5MHz_4A_FDD_t);
}
}
break;
@@ -2585,13 +2620,17 @@ uint16_t dci_decoding_procedure(PHY_VARS_UE *phy_vars_ue,
format0_size_bytes = sizeof(DCI0_5MHz_TDD_1_6_t);
format1_size_bits = sizeof_DCI1_5MHz_TDD_t;
format1_size_bytes = sizeof(DCI1_5MHz_TDD_t);
if (frame_parms->nb_antennas_tx == 2) {
if (frame_parms->nb_antennas_tx_eNB == 2) {
format2_size_bits = sizeof_DCI2_5MHz_2A_TDD_t;
format2_size_bytes = sizeof(DCI2_5MHz_2A_TDD_t);
format2A_size_bits = sizeof_DCI2A_5MHz_2A_TDD_t;
format2A_size_bytes = sizeof(DCI2A_5MHz_2A_TDD_t);
}
else if (frame_parms->nb_antennas_tx == 4) {
else if (frame_parms->nb_antennas_tx_eNB == 4) {
format2_size_bits = sizeof_DCI2_5MHz_4A_TDD_t;
format2_size_bytes = sizeof(DCI2_5MHz_4A_TDD_t);
format2A_size_bits = sizeof_DCI2A_5MHz_4A_TDD_t;
format2A_size_bytes = sizeof(DCI2A_5MHz_4A_TDD_t);
}
}
else {
@@ -2601,13 +2640,17 @@ uint16_t dci_decoding_procedure(PHY_VARS_UE *phy_vars_ue,
format0_size_bytes = sizeof(DCI0_5MHz_FDD_t);
format1_size_bits = sizeof_DCI1_5MHz_FDD_t;
format1_size_bytes = sizeof(DCI1_5MHz_FDD_t);
if (frame_parms->nb_antennas_tx == 2) {
if (frame_parms->nb_antennas_tx_eNB == 2) {
format2_size_bits = sizeof_DCI2_5MHz_2A_FDD_t;
format2_size_bytes = sizeof(DCI2_5MHz_2A_FDD_t);
format2A_size_bits = sizeof_DCI2A_5MHz_2A_FDD_t;
format2A_size_bytes = sizeof(DCI2A_5MHz_2A_FDD_t);
}
else if (frame_parms->nb_antennas_tx == 4) {
else if (frame_parms->nb_antennas_tx_eNB == 4) {
format2_size_bits = sizeof_DCI2_5MHz_4A_FDD_t;
format2_size_bytes = sizeof(DCI2_5MHz_4A_FDD_t);
format2A_size_bits = sizeof_DCI2A_5MHz_4A_FDD_t;
format2A_size_bytes = sizeof(DCI2A_5MHz_4A_FDD_t);
}
}
break;
@@ -2619,13 +2662,17 @@ uint16_t dci_decoding_procedure(PHY_VARS_UE *phy_vars_ue,
format0_size_bytes = sizeof(DCI0_10MHz_TDD_1_6_t);
format1_size_bits = sizeof_DCI1_10MHz_TDD_t;
format1_size_bytes = sizeof(DCI1_10MHz_TDD_t);
if (frame_parms->nb_antennas_tx == 2) {
if (frame_parms->nb_antennas_tx_eNB == 2) {
format2_size_bits = sizeof_DCI2_10MHz_2A_TDD_t;
format2_size_bytes = sizeof(DCI2_10MHz_2A_TDD_t);
format2A_size_bits = sizeof_DCI2A_10MHz_2A_TDD_t;
format2A_size_bytes = sizeof(DCI2A_10MHz_2A_TDD_t);
}
else if (frame_parms->nb_antennas_tx == 4) {
else if (frame_parms->nb_antennas_tx_eNB == 4) {
format2_size_bits = sizeof_DCI2_10MHz_4A_TDD_t;
format2_size_bytes = sizeof(DCI2_10MHz_4A_TDD_t);
format2A_size_bits = sizeof_DCI2A_10MHz_4A_TDD_t;
format2A_size_bytes = sizeof(DCI2A_10MHz_4A_TDD_t);
}
}
else {
@@ -2635,13 +2682,17 @@ uint16_t dci_decoding_procedure(PHY_VARS_UE *phy_vars_ue,
format0_size_bytes = sizeof(DCI0_10MHz_FDD_t);
format1_size_bits = sizeof_DCI1_10MHz_FDD_t;
format1_size_bytes = sizeof(DCI1_10MHz_FDD_t);
if (frame_parms->nb_antennas_tx == 2) {
if (frame_parms->nb_antennas_tx_eNB == 2) {
format2_size_bits = sizeof_DCI2_10MHz_2A_FDD_t;
format2_size_bytes = sizeof(DCI2_10MHz_2A_FDD_t);
format2A_size_bits = sizeof_DCI2A_10MHz_2A_FDD_t;
format2A_size_bytes = sizeof(DCI2A_10MHz_2A_FDD_t);
}
else if (frame_parms->nb_antennas_tx == 4) {
else if (frame_parms->nb_antennas_tx_eNB == 4) {
format2_size_bits = sizeof_DCI2_10MHz_4A_FDD_t;
format2_size_bytes = sizeof(DCI2_10MHz_4A_FDD_t);
format2A_size_bits = sizeof_DCI2A_10MHz_4A_FDD_t;
format2A_size_bytes = sizeof(DCI2A_10MHz_4A_FDD_t);
}
}
break;
@@ -2654,13 +2705,17 @@ uint16_t dci_decoding_procedure(PHY_VARS_UE *phy_vars_ue,
format0_size_bytes = sizeof(DCI0_20MHz_TDD_1_6_t);
format1_size_bits = sizeof_DCI1_20MHz_TDD_t;
format1_size_bytes = sizeof(DCI1_20MHz_TDD_t);
if (frame_parms->nb_antennas_tx == 2) {
if (frame_parms->nb_antennas_tx_eNB == 2) {
format2_size_bits = sizeof_DCI2_20MHz_2A_TDD_t;
format2_size_bytes = sizeof(DCI2_20MHz_2A_TDD_t);
format2A_size_bits = sizeof_DCI2A_20MHz_2A_TDD_t;
format2A_size_bytes = sizeof(DCI2A_20MHz_2A_TDD_t);
}
else if (frame_parms->nb_antennas_tx == 4) {
else if (frame_parms->nb_antennas_tx_eNB == 4) {
format2_size_bits = sizeof_DCI2_20MHz_4A_TDD_t;
format2_size_bytes = sizeof(DCI2_20MHz_4A_TDD_t);
format2A_size_bits = sizeof_DCI2A_20MHz_4A_TDD_t;
format2A_size_bytes = sizeof(DCI2A_20MHz_4A_TDD_t);
}
}
else {
@@ -2670,13 +2725,17 @@ uint16_t dci_decoding_procedure(PHY_VARS_UE *phy_vars_ue,
format0_size_bytes = sizeof(DCI0_20MHz_FDD_t);
format1_size_bits = sizeof_DCI1_20MHz_FDD_t;
format1_size_bytes = sizeof(DCI1_20MHz_FDD_t);
if (frame_parms->nb_antennas_tx == 2) {
if (frame_parms->nb_antennas_tx_eNB == 2) {
format2_size_bits = sizeof_DCI2_20MHz_2A_FDD_t;
format2_size_bytes = sizeof(DCI2_20MHz_2A_FDD_t);
format2A_size_bits = sizeof_DCI2A_20MHz_2A_FDD_t;
format2A_size_bytes = sizeof(DCI2A_20MHz_2A_FDD_t);
}
else if (frame_parms->nb_antennas_tx == 4) {
else if (frame_parms->nb_antennas_tx_eNB == 4) {
format2_size_bits = sizeof_DCI2_20MHz_4A_FDD_t;
format2_size_bytes = sizeof(DCI2_20MHz_4A_FDD_t);
format2A_size_bits = sizeof_DCI2A_20MHz_4A_FDD_t;
format2A_size_bytes = sizeof(DCI2A_20MHz_4A_FDD_t);
}
}
break;
@@ -2981,9 +3040,117 @@ uint16_t dci_decoding_procedure(PHY_VARS_UE *phy_vars_ue,
//#endif //ALL_AGGREGATION
}
else if (tmode == 3) {
// Now check UE_SPEC format 2A_2A search spaces at aggregation 1
dci_decoding_procedure0(lte_ue_pdcch_vars,0,
subframe,
dci_alloc,
eNB_id,
frame_parms,
mi,
SI_RNTI,
ra_rnti,
0,
format1A,
format1A,
format2A,
format2A_size_bits,
format2A_size_bytes,
&dci_cnt,
&format0_found,
&format_c_found,
&CCEmap0,
&CCEmap1,
&CCEmap2);
if ((CCEmap0==0xffff)||
((format0_found==1)&&(format_c_found==1)))
return(dci_cnt);
if (dci_cnt>old_dci_cnt)
return(dci_cnt);
// Now check UE_SPEC format 2 search spaces at aggregation 2
dci_decoding_procedure0(lte_ue_pdcch_vars,0,
subframe,
dci_alloc,
eNB_id,
frame_parms,
mi,
SI_RNTI,
ra_rnti,
1,
format1A,
format1A,
format2A,
format2A_size_bits,
format2A_size_bytes,
&dci_cnt,
&format0_found,
&format_c_found,
&CCEmap0,
&CCEmap1,
&CCEmap2);
if ((CCEmap0==0xffff)||
((format0_found==1)&&(format_c_found==1)))
return(dci_cnt);
if (dci_cnt>old_dci_cnt)
return(dci_cnt);
// Now check UE_SPEC format 2_2A search spaces at aggregation 4
dci_decoding_procedure0(lte_ue_pdcch_vars,0,
subframe,
dci_alloc,
eNB_id,
frame_parms,
mi,
SI_RNTI,
ra_rnti,
2,
format1A,
format1A,
format2A,
format2A_size_bits,
format2A_size_bytes,
&dci_cnt,
&format0_found,
&format_c_found,
&CCEmap0,
&CCEmap1,
&CCEmap2);
if ((CCEmap0==0xffff)||
((format0_found==1)&&(format_c_found==1)))
return(dci_cnt);
if (dci_cnt>old_dci_cnt)
return(dci_cnt);
//#ifdef ALL_AGGREGATION
// Now check UE_SPEC format 2_2A search spaces at aggregation 8
dci_decoding_procedure0(lte_ue_pdcch_vars,0,
subframe,
dci_alloc,
eNB_id,
frame_parms,
mi,
SI_RNTI,
ra_rnti,
3,
format1A,
format1A,
format2A,
format2A_size_bits,
format2A_size_bytes,
&dci_cnt,
&format0_found,
&format_c_found,
&CCEmap0,
&CCEmap1,
&CCEmap2);
//#endif
}
else if (tmode == 4) {
// Now check UE_SPEC format 2_2A_M10PRB search spaces at aggregation 1
// Now check UE_SPEC format 2_2A search spaces at aggregation 1
dci_decoding_procedure0(lte_ue_pdcch_vars,0,
subframe,
dci_alloc,
@@ -3037,7 +3204,7 @@ uint16_t dci_decoding_procedure(PHY_VARS_UE *phy_vars_ue,
if (dci_cnt>old_dci_cnt)
return(dci_cnt);
// Now check UE_SPEC format 2_2A_M10PRB search spaces at aggregation 4
// Now check UE_SPEC format 2_2A search spaces at aggregation 4
dci_decoding_procedure0(lte_ue_pdcch_vars,0,
subframe,
dci_alloc,
@@ -3065,7 +3232,7 @@ uint16_t dci_decoding_procedure(PHY_VARS_UE *phy_vars_ue,
return(dci_cnt);
//#ifdef ALL_AGGREGATION
// Now check UE_SPEC format 2_2A_M10PRB search spaces at aggregation 8
// Now check UE_SPEC format 2_2A search spaces at aggregation 8
dci_decoding_procedure0(lte_ue_pdcch_vars,0,
subframe,
dci_alloc,
+479 -100
View File
@@ -1532,122 +1532,501 @@ typedef struct DCI2_20MHz_4A_FDD DCI2_20MHz_4A_FDD_t;
// ********************FORMAT 2A DCIs*********************************
// *******************************************************************
/// DCI Format Type 2A (5 MHz, TDD, 2 Antenna Ports, 39 bits)
struct __attribute__ ((__packed__)){
/// Resource Allocation Header
uint32_t rah:1;
/// RB Assignment (ceil(log2(N_RB_DL/P)) bits)
uint32_t rballoc:13;
/// Power Control
uint32_t TPC:2;
/// Downlink Assignment Index
uint32_t dai:2;
/// HARQ Process
uint32_t harq_pid:4;
/// TB swap
uint32_t tb_swap:1;
/// Modulation and Coding Scheme and Redundancy Version 1
uint32_t mcs1:5;
/// New Data Indicator 1
uint32_t ndi1:1;
/// Redundancy version 1
uint32_t rv1:2;
/// Modulation and Coding Scheme and Redundancy Version 2
uint32_t mcs2:5;
/// New Data Indicator 2
uint32_t ndi2:1;
/// DCI Format Type 2A (1.5 MHz, TDD, 2 Antenna Ports, 32 bits)
struct DCI2A_1_5MHz_2A_TDD {
/// Redundancy version 2
uint32_t rv2:2;
} DCI2A_5MHz_2A_TDD;
#define sizeof_DCI2A_5MHz_2A_TDD_t 39
/// New Data Indicator 2
uint32_t ndi2:1;
/// Modulation and Coding Scheme and Redundancy Version 2
uint32_t mcs2:5;
/// Redundancy version 1
uint32_t rv1:2;
/// New Data Indicator 1
uint32_t ndi1:1;
/// Modulation and Coding Scheme and Redundancy Version 1
uint32_t mcs1:5;
/// TB swap
uint32_t tb_swap:1;
/// HARQ Process
uint32_t harq_pid:4;
/// Downlink Assignment Index
uint32_t dai:2;
/// Power Control
uint32_t TPC:2;
/// RB Assignment (ceil(log2(N_RB_DL/P)) bits)
uint32_t rballoc:6;
/// Resource Allocation Header
uint32_t rah:1;
} __attribute__ ((__packed__));
/// DCI Format Type 2A (5 MHz, TDD, 4 Antenna Ports, 45 bits)
typedef struct __attribute__ ((__packed__)){
/// Resource Allocation Header
uint32_t rah:1;
/// RB Assignment (ceil(log2(N_RB_DL/P)) bits)
uint32_t rballoc:13;
/// Power Control
uint32_t TPC:2;
/// Downlink Assignment Index
uint32_t dai:2;
/// HARQ Process
uint32_t harq_pid:4;
/// TB swap
uint32_t tb_swap:1;
/// Modulation and Coding Scheme and Redundancy Version 1
uint32_t mcs1:5;
/// New Data Indicator 1
uint32_t ndi1:1;
/// Redundancy version 1
uint32_t rv1:2;
/// Modulation and Coding Scheme and Redundancy Version 2
uint32_t mcs2:5;
#define sizeof_DCI2A_1_5MHz_2A_TDD_t 32
typedef struct DCI2A_1_5MHz_2A_TDD DCI2A_1_5MHz_2A_TDD_t;
/// DCI Format Type 2A (1.5 MHz, TDD, 4 Antenna Ports, 34 bits)
struct DCI2A_1_5MHz_4A_TDD {
uint64_t padding:30;
/// TPMI information for precoding
uint64_t tpmi:2;
/// Redundancy version 2
uint64_t rv2:2;
/// New Data Indicator 2
uint32_t ndi2:1;
uint64_t ndi2:1;
/// Modulation and Coding Scheme and Redundancy Version 2
uint64_t mcs2:5;
/// Redundancy version 1
uint64_t rv1:2;
/// New Data Indicator 1
uint64_t ndi1:1;
/// Modulation and Coding Scheme and Redundancy Version 1
uint64_t mcs1:5;
/// TB swap
uint64_t tb_swap:1;
/// HARQ Process
uint64_t harq_pid:4;
/// Downlink Assignment Index
uint64_t dai:2;
/// Power Control
uint64_t TPC:2;
/// RB Assignment (ceil(log2(N_RB_DL/P)) bits)
uint64_t rballoc:6;
/// Resource Allocation Header
uint64_t rah:1;
} __attribute__ ((__packed__));
#define sizeof_DCI2A_1_5MHz_4A_TDD_t 34
typedef struct DCI2A_1_5MHz_4A_TDD DCI2A_1_5MHz_4A_TDD_t;
/// DCI Format Type 2A (1.5 MHz, FDD, 2 Antenna Ports, 29 bits)
struct DCI2A_1_5MHz_2A_FDD {
uint32_t padding:18;
/// Redundancy version 2
uint32_t rv2:2;
/// New Data Indicator 2
uint32_t ndi2:1;
/// Modulation and Coding Scheme and Redundancy Version 2
uint32_t mcs2:5;
/// Redundancy version 1
uint32_t rv1:2;
/// New Data Indicator 1
uint32_t ndi1:1;
/// Modulation and Coding Scheme and Redundancy Version 1
uint32_t mcs1:5;
/// TB swap
uint32_t tb_swap:1;
/// HARQ Process
uint32_t harq_pid:3;
/// Power Control
uint32_t TPC:2;
/// RB Assignment (ceil(log2(N_RB_DL/P)) bits)
uint32_t rballoc:6;
/// Resource Allocation Header
uint32_t rah:1;
} __attribute__ ((__packed__));
#define sizeof_DCI2A_1_5MHz_2A_FDD_t 29
typedef struct DCI2A_1_5MHz_2A_FDD DCI2A_1_5MHz_2A_FDD_t;
/// DCI Format Type 2A (1.5 MHz, FDD, 4 Antenna Ports, 31 bits)
struct DCI2A_1_5MHz_4A_FDD{
uint32_t padding:1;
/// TPMI information for precoding
uint32_t tpmi:2;
} DCI2A_5MHz_4A_TDD_t;
#define sizeof_DCI2A_5MHz_4A_TDD_t 45
/// Redundancy version 2
uint32_t rv2:2;
/// New Data Indicator 2
uint32_t ndi2:1;
/// Modulation and Coding Scheme and Redundancy Version 2
uint32_t mcs2:5;
/// Redundancy version 1
uint32_t rv1:2;
/// New Data Indicator 1
uint32_t ndi1:1;
/// Modulation and Coding Scheme and Redundancy Version 1
uint32_t mcs1:5;
/// TB swap
uint32_t tb_swap:1;
/// HARQ Process
uint32_t harq_pid:3;
/// Power Control
uint32_t TPC:2;
/// RB Assignment (ceil(log2(N_RB_DL/P)) bits)
uint32_t rballoc:6;
/// Resource Allocation Header
uint32_t rah:1;
} __attribute__ ((__packed__));
#define sizeof_DCI2A_1_5MHz_4A_FDD_t 38
typedef struct DCI2A_1_5MHz_4A_FDD DCI2A_1_5MHz_4A_FDD_t;
/// DCI Format Type 2A (5 MHz, TDD, 2 Antenna Ports, 39 bits)
struct DCI2A_5MHz_2A_TDD {
uint64_t padding:25;
/// Redundancy version 2
uint64_t rv2:2;
/// New Data Indicator 2
uint64_t ndi2:1;
/// Modulation and Coding Scheme and Redundancy Version 2
uint64_t mcs2:5;
/// Redundancy version 1
uint64_t rv1:2;
/// New Data Indicator 1
uint64_t ndi1:1;
/// Modulation and Coding Scheme and Redundancy Version 1
uint64_t mcs1:5;
/// TB swap
uint64_t tb_swap:1;
/// HARQ Process
uint64_t harq_pid:4;
/// Downlink Assignment Index
uint64_t dai:2;
/// Power Control
uint64_t TPC:2;
/// RB Assignment (ceil(log2(N_RB_DL/P)) bits)
uint64_t rballoc:13;
/// Resource Allocation Header
uint64_t rah:1;
} __attribute__ ((__packed__));
#define sizeof_DCI2A_5MHz_2A_TDD_t 39
typedef struct DCI2A_5MHz_2A_TDD DCI2A_5MHz_2A_TDD_t;
/// DCI Format Type 2A (5 MHz, TDD, 4 Antenna Ports, 41 bits)
struct DCI2A_5MHz_4A_TDD {
uint64_t padding:23;
/// TPMI information for precoding
uint64_t tpmi:2;
/// Redundancy version 2
uint64_t rv2:2;
/// New Data Indicator 2
uint64_t ndi2:1;
/// Modulation and Coding Scheme and Redundancy Version 2
uint64_t mcs2:5;
/// Redundancy version 1
uint64_t rv1:2;
/// New Data Indicator 1
uint64_t ndi1:1;
/// Modulation and Coding Scheme and Redundancy Version 1
uint64_t mcs1:5;
/// TB swap
uint64_t tb_swap:1;
/// HARQ Process
uint64_t harq_pid:4;
/// Downlink Assignment Index
uint64_t dai:2;
/// Power Control
uint64_t TPC:2;
/// RB Assignment (ceil(log2(N_RB_DL/P)) bits)
uint64_t rballoc:13;
/// Resource Allocation Header
uint64_t rah:1;
} __attribute__ ((__packed__));
#define sizeof_DCI2A_5MHz_4A_TDD_t 41
typedef struct DCI2A_5MHz_4A_TDD DCI2A_5MHz_4A_TDD_t;
/// DCI Format Type 2A (5 MHz, FDD, 2 Antenna Ports, 36 bits)
struct __attribute__ ((__packed__)){
/// Resource Allocation Header
uint32_t rah:1;
/// RB Assignment (ceil(log2(N_RB_DL/P)) bits)
uint32_t rballoc:13;
/// Power Control
uint32_t TPC:2;
/// HARQ Process
uint32_t harq_pid:3;
/// TB swap
uint32_t tb_swap:1;
/// Modulation and Coding Scheme and Redundancy Version 1
uint32_t mcs1:5;
/// New Data Indicator 1
uint32_t ndi1:1;
/// Redundancy version 1
uint32_t rv1:2;
/// Modulation and Coding Scheme and Redundancy Version 2
uint32_t mcs2:5;
/// New Data Indicator 2
uint32_t ndi2:1;
struct DCI2A_5MHz_2A_FDD {
uint64_t padding:28;
/// Redundancy version 2
uint32_t rv2:2;
} DCI2A_5MHz_2A_M10PRB_FDD;
uint64_t rv2:2;
/// New Data Indicator 2
uint64_t ndi2:1;
/// Modulation and Coding Scheme and Redundancy Version 2
uint64_t mcs2:5;
/// Redundancy version 1
uint64_t rv1:2;
/// New Data Indicator 1
uint64_t ndi1:1;
/// Modulation and Coding Scheme and Redundancy Version 1
uint64_t mcs1:5;
/// TB swap
uint64_t tb_swap:1;
/// HARQ Process
uint64_t harq_pid:3;
/// Power Control
uint64_t TPC:2;
/// RB Assignment (ceil(log2(N_RB_DL/P)) bits)
uint64_t rballoc:13;
/// Resource Allocation Header
uint64_t rah:1;
} __attribute__ ((__packed__));
#define sizeof_DCI2A_5MHz_2A_FDD_t 36
typedef struct DCI2A_5MHz_2A_FDD DCI2A_5MHz_2A_FDD_t;
/// DCI Format Type 2A (5 MHz, TDD, 4 Antenna Ports, 38 bits)
struct __attribute__ ((__packed__)){
/// Resource Allocation Header
uint32_t rah:1;
/// RB Assignment (ceil(log2(N_RB_DL/P)) bits)
uint32_t rballoc:13;
/// Power Control
uint32_t TPC:2;
/// HARQ Process
uint32_t harq_pid:3;
/// TB swap
uint32_t tb_swap:1;
/// Modulation and Coding Scheme and Redundancy Version 1
uint32_t mcs1:5;
/// New Data Indicator 1
uint32_t ndi1:1;
/// Redundancy version 1
uint32_t rv1:2;
/// Modulation and Coding Scheme and Redundancy Version 2
uint32_t mcs2:5;
/// New Data Indicator 2
uint32_t ndi2:1;
/// Redundancy version 2
uint32_t rv2:2;
/// DCI Format Type 2A (5 MHz, FDD, 4 Antenna Ports, 38 bits)
struct DCI2A_5MHz_4A_FDD {
uint64_t padding:26;
/// TPMI information for precoding
uint32_t tpmi:2;
} DCI2A_5MHz_4A_FDD;
uint64_t tpmi:2;
/// Redundancy version 2
uint64_t rv2:2;
/// New Data Indicator 2
uint64_t ndi2:1;
/// Modulation and Coding Scheme and Redundancy Version 2
uint64_t mcs2:5;
/// Redundancy version 1
uint64_t rv1:2;
/// New Data Indicator 1
uint64_t ndi1:1;
/// Modulation and Coding Scheme and Redundancy Version 1
uint64_t mcs1:5;
/// TB swap
uint64_t tb_swap:1;
/// HARQ Process
uint64_t harq_pid:3;
/// Power Control
uint64_t TPC:2;
/// RB Assignment (ceil(log2(N_RB_DL/P)) bits)
uint64_t rballoc:13;
/// Resource Allocation Header
uint64_t rah:1;
} __attribute__ ((__packed__));
#define sizeof_DCI2A_5MHz_4A_FDD_t 38
typedef struct DCI2A_5MHz_4A_FDD DCI2A_5MHz_4A_FDD_t;
/// DCI Format Type 2A (10 MHz, TDD, 2 Antenna Ports, 39 bits)
struct DCI2A_10MHz_2A_TDD {
uint64_t padding:25;
/// Redundancy version 2
uint64_t rv2:2;
/// New Data Indicator 2
uint64_t ndi2:1;
/// Modulation and Coding Scheme and Redundancy Version 2
uint64_t mcs2:5;
/// Redundancy version 1
uint64_t rv1:2;
/// New Data Indicator 1
uint64_t ndi1:1;
/// Modulation and Coding Scheme and Redundancy Version 1
uint64_t mcs1:5;
/// TB swap
uint64_t tb_swap:1;
/// HARQ Process
uint64_t harq_pid:4;
/// Downlink Assignment Index
uint64_t dai:2;
/// Power Control
uint64_t TPC:2;
/// RB Assignment (ceil(log2(N_RB_DL/P)) bits)
uint64_t rballoc:17;
/// Resource Allocation Header
uint64_t rah:1;
} __attribute__ ((__packed__));
#define sizeof_DCI2A_10MHz_2A_TDD_t 39
typedef struct DCI2A_10MHz_2A_TDD DCI2A_10MHz_2A_TDD_t;
/// DCI Format Type 2A (10 MHz, TDD, 4 Antenna Ports, 41 bits)
struct DCI2A_10MHz_4A_TDD{
uint64_t padding:23;
/// TPMI information for precoding
uint64_t tpmi:2;
/// Redundancy version 2
uint64_t rv2:2;
/// New Data Indicator 2
uint64_t ndi2:1;
/// Modulation and Coding Scheme and Redundancy Version 2
uint64_t mcs2:5;
/// Redundancy version 1
uint64_t rv1:2;
/// New Data Indicator 1
uint64_t ndi1:1;
/// Modulation and Coding Scheme and Redundancy Version 1
uint64_t mcs1:5;
/// TB swap
uint64_t tb_swap:1;
/// HARQ Process
uint64_t harq_pid:4;
/// Downlink Assignment Index
uint64_t dai:2;
/// Power Control
uint64_t TPC:2;
/// RB Assignment (ceil(log2(N_RB_DL/P)) bits)
uint64_t rballoc:17;
/// Resource Allocation Header
uint64_t rah:1;
} __attribute__ ((__packed__));
#define sizeof_DCI2A_10MHz_4A_TDD_t 41
typedef struct DCI2A_10MHz_4A_TDD DCI2A_10MHz_4A_TDD_t;
/// DCI Format Type 2A (10 MHz, FDD, 2 Antenna Ports, 36 bits)
struct DCI2A_10MHz_2A_FDD {
uint64_t padding:28;
/// Redundancy version 2
uint64_t rv2:2;
/// New Data Indicator 2
uint64_t ndi2:1;
/// Modulation and Coding Scheme and Redundancy Version 2
uint64_t mcs2:5;
/// Redundancy version 1
uint64_t rv1:2;
/// New Data Indicator 1
uint64_t ndi1:1;
/// Modulation and Coding Scheme and Redundancy Version 1
uint64_t mcs1:5;
/// TB swap
uint64_t tb_swap:1;
/// HARQ Process
uint64_t harq_pid:3;
/// Power Control
uint64_t TPC:2;
/// RB Assignment (ceil(log2(N_RB_DL/P)) bits)
uint64_t rballoc:17;
/// Resource Allocation Header
uint64_t rah:1;
} __attribute__ ((__packed__));
#define sizeof_DCI2A_10MHz_2A_FDD_t 36
typedef struct DCI2A_10MHz_2A_FDD DCI2A_10MHz_2A_FDD_t;
/// DCI Format Type 2A (10 MHz, FDD, 4 Antenna Ports, 38 bits)
struct DCI2A_10MHz_4A_FDD{
uint64_t padding:26;
/// TPMI information for precoding
uint64_t tpmi:2;
/// Redundancy version 2
uint64_t rv2:2;
/// New Data Indicator 2
uint64_t ndi2:1;
/// Modulation and Coding Scheme and Redundancy Version 2
uint64_t mcs2:5;
/// Redundancy version 1
uint64_t rv1:2;
/// New Data Indicator 1
uint64_t ndi1:1;
/// Modulation and Coding Scheme and Redundancy Version 1
uint64_t mcs1:5;
/// TB swap
uint64_t tb_swap:1;
/// HARQ Process
uint64_t harq_pid:3;
/// Power Control
uint64_t TPC:2;
/// RB Assignment (ceil(log2(N_RB_DL/P)) bits)
uint64_t rballoc:17;
/// Resource Allocation Header
uint64_t rah:1;
} __attribute__ ((__packed__));
#define sizeof_DCI2A_10MHz_4A_FDD_t 38
typedef struct DCI2A_10MHz_4A_FDD DCI2A_10MHz_4A_FDD_t;
/// DCI Format Type 2A (20 MHz, TDD, 2 Antenna Ports, 51 bits)
struct DCI2A_20MHz_2A_TDD{
uint64_t padding:13;
/// Redundancy version 2
uint64_t rv2:2;
/// New Data Indicator 2
uint64_t ndi2:1;
/// Modulation and Coding Scheme and Redundancy Version 2
uint64_t mcs2:5;
/// Redundancy version 1
uint64_t rv1:2;
/// New Data Indicator 1
uint64_t ndi1:1;
/// Modulation and Coding Scheme and Redundancy Version 1
uint64_t mcs1:5;
/// TB swap
uint64_t tb_swap:1;
/// HARQ Process
uint64_t harq_pid:4;
/// Downlink Assignment Index
uint64_t dai:2;
/// Power Control
uint64_t TPC:2;
/// RB Assignment (ceil(log2(N_RB_DL/P)) bits)
uint64_t rballoc:25;
/// Resource Allocation Header
uint64_t rah:1;
} __attribute__ ((__packed__));
#define sizeof_DCI2A_20MHz_2A_TDD_t 51
typedef struct DCI2A_20MHz_2A_TDD DCI2A_20MHz_2A_TDD_t;
/// DCI Format Type 2A (20 MHz, TDD, 4 Antenna Ports, 53 bits)
struct DCI2A_20MHz_4A_TDD{
uint64_t padding:11;
/// TPMI information for precoding
uint64_t tpmi:2;
/// Redundancy version 2
uint64_t rv2:2;
/// New Data Indicator 2
uint64_t ndi2:1;
/// Modulation and Coding Scheme and Redundancy Version 2
uint64_t mcs2:5;
/// Redundancy version 1
uint64_t rv1:2;
/// New Data Indicator 1
uint64_t ndi1:1;
/// Modulation and Coding Scheme and Redundancy Version 1
uint64_t mcs1:5;
/// TB swap
uint64_t tb_swap:1;
/// HARQ Process
uint64_t harq_pid:4;
/// Downlink Assignment Index
uint64_t dai:2;
/// Power Control
uint64_t TPC:2;
/// RB Assignment (ceil(log2(N_RB_DL/P)) bits)
uint64_t rballoc:25;
/// Resource Allocation Header
uint64_t rah:1;
} __attribute__ ((__packed__));
#define sizeof_DCI2A_20MHz_4A_TDD_t 53
typedef struct DCI2A_20MHz_4A_TDD DCI2A_20MHz_4A_TDD_t;
/// DCI Format Type 2A (20 MHz, FDD, 2 Antenna Ports, 48 bits)
struct DCI2A_20MHz_2A_FDD {
uint64_t padding:16;
/// Redundancy version 2
uint64_t rv2:2;
/// New Data Indicator 2
uint64_t ndi2:1;
/// Modulation and Coding Scheme and Redundancy Version 2
uint64_t mcs2:5;
/// Redundancy version 1
uint64_t rv1:2;
/// New Data Indicator 1
uint64_t ndi1:1;
/// Modulation and Coding Scheme and Redundancy Version 1
uint64_t mcs1:5;
/// TB swap
uint64_t tb_swap:1;
/// HARQ Process
uint64_t harq_pid:3;
/// Power Control
uint64_t TPC:2;
/// RB Assignment (ceil(log2(N_RB_DL/P)) bits)
uint64_t rballoc:25;
/// Resource Allocation Header
uint64_t rah:1;
} __attribute__ ((__packed__));
#define sizeof_DCI2A_20MHz_2A_FDD_t 48
typedef struct DCI2A_20MHz_2A_FDD DCI2A_20MHz_2A_FDD_t;
/// DCI Format Type 2A (20 MHz, FDD, 4 Antenna Ports, 50 bits)
struct DCI2A_20MHz_4A_FDD {
uint64_t padding:14;
/// TPMI information for precoding
uint64_t tpmi:2;
/// Redundancy version 2
uint64_t rv2:2;
/// New Data Indicator 2
uint64_t ndi2:1;
/// Modulation and Coding Scheme and Redundancy Version 2
uint64_t mcs2:5;
/// Redundancy version 1
uint64_t rv1:2;
/// New Data Indicator 1
uint64_t ndi1:1;
/// Modulation and Coding Scheme and Redundancy Version 1
uint64_t mcs1:5;
/// TB swap
uint64_t tb_swap:1;
/// HARQ Process
uint64_t harq_pid:3;
/// Power Control
uint64_t TPC:2;
/// RB Assignment (ceil(log2(N_RB_DL/P)) bits)
uint64_t rballoc:25;
/// Resource Allocation Header
uint64_t rah:1;
} __attribute__ ((__packed__));
#define sizeof_DCI2A_20MHz_4A_FDD_t 50
typedef struct DCI2A_20MHz_4A_FDD DCI2A_20MHz_4A_FDD_t;
// *******************************************************************
// ********************FORMAT 2B DCIs*********************************
File diff suppressed because it is too large Load Diff
+21 -26
View File
@@ -109,10 +109,22 @@ typedef struct {
uint8_t rvidx;
/// MIMO mode for this DLSCH
MIMO_mode_t mimo_mode;
/// Number of layers for this PDSCH transmission
uint8_t Nlayers;
/// First layer for this PSCH transmission
uint8_t first_layer;
/// Current RB allocation
uint32_t rb_alloc[4];
/// Current subband PMI allocation
uint16_t pmi_alloc;
/// Current subband RI allocation
uint32_t ri_alloc;
/// Current subband CQI1 allocation
uint32_t cqi_alloc1;
/// Current subband CQI2 allocation
uint32_t cqi_alloc2;
/// Current Number of RBs
uint16_t nb_rb;
/// downlink power offset field
uint8_t dl_power_off;
/// Concatenated "e"-sequences (for definition see 36-212 V8.6 2009-03, p.17-18)
uint8_t e[MAX_NUM_CHANNEL_BITS];
/// Turbo-code outputs (36-212 V8.6 2009-03, p.12
uint8_t d[MAX_NUM_DLSCH_SEGMENTS][(96+3+(3*6144))];
/// Sub-block interleaver outputs (36-212 V8.6 2009-03, p.16-17)
@@ -129,8 +141,12 @@ typedef struct {
uint32_t Kplus;
/// Number of "Filler" bits (for definition see 36-212 V8.6 2009-03, p.10)
uint32_t F;
/// Number of MIMO layers (streams) (for definition see 36-212 V8.6 2009-03, p.17)
/// Number of MIMO layers (streams) (for definition see 36-212 V8.6 2009-03, p.17, TM3-4)
uint8_t Nl;
/// Number of layers for this PDSCH transmission (TM8-10)
uint8_t Nlayers;
/// First layer for this PSCH transmission
uint8_t first_layer;
} LTE_DL_eNB_HARQ_t;
typedef struct {
@@ -221,34 +237,16 @@ typedef struct {
uint8_t ra_window_size;
/// First-round error threshold for fine-grain rate adaptation
uint8_t error_threshold;
/// Current RB allocation
uint32_t rb_alloc[4];
/// Current subband PMI allocation
uint16_t pmi_alloc;
/// Current subband RI allocation
uint32_t ri_alloc;
/// Current subband CQI1 allocation
uint32_t cqi_alloc1;
/// Current subband CQI2 allocation
uint32_t cqi_alloc2;
/// Current Number of RBs
uint16_t nb_rb;
/// Pointers to 8 HARQ processes for the DLSCH
LTE_DL_eNB_HARQ_t *harq_processes[8];
/// Number of soft channel bits
uint32_t G;
/// Layer index for this dlsch (0,1)
uint8_t layer_index;
/// Codebook index for this dlsch (0,1,2,3)
uint8_t codebook_index;
/// Concatenated "e"-sequences (for definition see 36-212 V8.6 2009-03, p.17-18)
uint8_t e[MAX_NUM_CHANNEL_BITS];
/// Maximum number of HARQ rounds (for definition see 36-212 V8.6 2009-03, p.17)
uint8_t Mdlharq;
/// MIMO transmission mode indicator for this sub-frame (for definition see 36-212 V8.6 2009-03, p.17)
uint8_t Kmimo;
/// downlink power offset field
uint8_t dl_power_off;
/// amplitude of PDSCH (compared to RS) in symbols without pilots
int16_t sqrt_rho_a;
/// amplitude of PDSCH (compared to RS) in symbols containing pilots
@@ -637,8 +635,6 @@ typedef struct {
harq_status_t harq_ack[10];
/// Pointers to up to 8 HARQ processes
LTE_DL_UE_HARQ_t *harq_processes[8];
/// Layer index for this DLSCH
uint8_t layer_index;
/// Maximum number of HARQ rounds (for definition see 36-212 V8.6 2009-03, p.17
uint8_t Mdlharq;
/// MIMO transmission mode indicator for this sub-frame (for definition see 36-212 V8.6 2009-03, p.17)
@@ -650,7 +646,6 @@ typedef struct {
typedef enum {format0,
format1,
format1A,
format1A_RA,
format1B,
format1C,
format1D,
+5 -4
View File
@@ -230,8 +230,9 @@ int dlsch_encoding(unsigned char *a,
unsigned int G;
unsigned int crc=1;
unsigned short iind;
unsigned short nb_rb = dlsch->nb_rb;
unsigned char harq_pid = dlsch->current_harq_pid;
unsigned short nb_rb = dlsch->harq_processes[harq_pid]->nb_rb;
unsigned int A;
unsigned char mod_order;
unsigned int Kr=0,Kr_bytes,r,r_offset=0;
@@ -243,7 +244,7 @@ int dlsch_encoding(unsigned char *a,
// printf("Encoder: A: %d\n",A);
mod_order = get_Qm(dlsch->harq_processes[harq_pid]->mcs);
G = get_G(frame_parms,nb_rb,dlsch->rb_alloc,mod_order,dlsch->harq_processes[harq_pid]->Nl,num_pdcch_symbols,frame,subframe);
G = get_G(frame_parms,nb_rb,dlsch->harq_processes[harq_pid]->rb_alloc,mod_order,dlsch->harq_processes[harq_pid]->Nl,num_pdcch_symbols,frame,subframe);
// if (dlsch->harq_processes[harq_pid]->Ndi == 1) { // this is a new packet
@@ -353,7 +354,7 @@ int dlsch_encoding(unsigned char *a,
r_offset += lte_rate_matching_turbo(dlsch->harq_processes[harq_pid]->RTC[r],
G, //G
dlsch->harq_processes[harq_pid]->w[r],
dlsch->e+r_offset,
dlsch->harq_processes[harq_pid]->e+r_offset,
dlsch->harq_processes[harq_pid]->C, // C
NSOFT, // Nsoft,
dlsch->Mdlharq,
@@ -367,7 +368,7 @@ int dlsch_encoding(unsigned char *a,
stop_meas(rm_stats);
#ifdef DEBUG_DLSCH_CODING
if (r==dlsch->harq_processes[harq_pid]->C-1)
write_output("enc_output.m","enc",dlsch->e,r_offset,1,4);
write_output("enc_output.m","enc",dlsch->harq_processes[harq_pid]->e,r_offset,1,4);
#endif
}
vcd_signal_dumper_dump_function_by_name(VCD_SIGNAL_DUMPER_FUNCTIONS_ENB_DLSCH_ENCODING, VCD_FUNCTION_OUT);
+7 -6
View File
@@ -291,12 +291,13 @@ uint32_t dlsch_decoding(PHY_VARS_UE *phy_vars_ue,
(r==0) ? harq_process->F : 0);
#ifdef DEBUG_DLSCH_DECODING
msg("HARQ_PID %d Rate Matching Segment %d (coded bits %d,unpunctured/repeated bits %d, mod_order %d, nb_rb %d, Nl %d)...\n",
msg("HARQ_PID %d Rate Matching Segment %d (coded bits %d,unpunctured/repeated bits %d, TBS %d, mod_order %d, nb_rb %d, Nl %d)...\n",
harq_pid,r, G,
Kr*3,
get_Qm(harq_process->mcs),
harq_process->nb_rb,
harq_process->Nl);
Kr*3,
harq_process->TBS,
get_Qm(harq_process->mcs),
harq_process->nb_rb,
harq_process->Nl);
#endif
@@ -675,7 +676,7 @@ uint32_t dlsch_decoding_emul(PHY_VARS_UE *phy_vars_ue,
if (dlsch_abstraction_MIESM(phy_vars_ue->sinr_dB,
phy_vars_ue->transmission_mode[eNB_id],
dlsch_eNB->rb_alloc,
dlsch_eNB->harq_processes[harq_pid]->rb_alloc,
dlsch_eNB->harq_processes[harq_pid]->mcs,
PHY_vars_eNB_g[eNB_id][CC_id]->mu_mimo_mode[ue_id].dl_pow_off) == 1) {
// reset HARQ
File diff suppressed because it is too large Load Diff
@@ -1063,7 +1063,7 @@ length = number of resource elements
xmm0 = _mm_xor_si128(xmm0,xmm0); // ZERO
// 1 term for nominator of LLR
// 1 term for numerator of LLR
xmm3 = _mm_subs_epi16(y1r_over2,rho_rpi);
A = _mm_abs_epi16(xmm3); // A = |y1r/2 - rho/sqrt(8)|
xmm2 = _mm_adds_epi16(A,y0i_over2); // = |y1r/2 - rho/sqrt(8)| + y0i/2
@@ -1071,7 +1071,7 @@ length = number of resource elements
B = _mm_abs_epi16(xmm3); // B = |y1i/2 - rho*/sqrt(8)|
logmax_num_re0 = _mm_adds_epi16(B,xmm2); // = |y1r/2 - rho/sqrt(8)|+|y1i/2 - rho*/sqrt(8)| + y0i/2
// 2 term for nominator of LLR
// 2 term for numerator of LLR
xmm3 = _mm_subs_epi16(y1r_over2,rho_rmi);
C = _mm_abs_epi16(xmm3); // C = |y1r/2 - rho*/4|
xmm2 = _mm_subs_epi16(C,y0i_over2); // = |y1r/2 - rho*/4| - y0i/2
File diff suppressed because it is too large Load Diff
@@ -58,7 +58,7 @@ void dlsch_scrambling(LTE_DL_FRAME_PARMS *frame_parms,
int i,j,k=0;
// uint8_t reset;
uint32_t x1, x2, s=0;
uint8_t *e=dlsch->e;
uint8_t *e=dlsch->harq_processes[dlsch->current_harq_pid]->e;
vcd_signal_dumper_dump_function_by_name(VCD_SIGNAL_DUMPER_FUNCTIONS_ENB_DLSCH_SCRAMBLING, VCD_FUNCTION_IN);
+3 -1
View File
@@ -48,7 +48,7 @@
#include "gain_control.h"
#endif
//#define DEBUG_INITIAL_SYNCH
#define DEBUG_INITIAL_SYNCH
int pbch_detection(PHY_VARS_UE *phy_vars_ue, runmode_t mode) {
@@ -111,6 +111,7 @@ int pbch_detection(PHY_VARS_UE *phy_vars_ue, runmode_t mode) {
frame_parms,
0,
SISO,
phy_vars_ue->high_speed_flag,
frame_mod4);
if ((pbch_tx_ant>0) && (pbch_tx_ant<=2)) {
pbch_decoded = 1;
@@ -122,6 +123,7 @@ int pbch_detection(PHY_VARS_UE *phy_vars_ue, runmode_t mode) {
frame_parms,
0,
ALAMOUTI,
phy_vars_ue->high_speed_flag,
frame_mod4);
if ((pbch_tx_ant>0) && (pbch_tx_ant<=2)) {
pbch_decoded = 1;
+135 -71
View File
@@ -70,6 +70,98 @@ extern __m128i zero;
#define PBCH_A 24
int allocate_pbch_REs_in_RB(LTE_DL_FRAME_PARMS *frame_parms,
mod_sym_t **txdataF,
uint32_t *jj,
uint16_t re_offset,
uint32_t symbol_offset,
uint8_t *x0,
uint8_t pilots,
int16_t amp,
uint32_t *re_allocated) {
MIMO_mode_t mimo_mode = (frame_parms->mode1_flag==1)?SISO:ALAMOUTI;
uint32_t tti_offset,aa;
uint8_t re;
int16_t gain_lin_QPSK;
int16_t re_off=re_offset;
uint8_t first_re,last_re;
int32_t tmp_sample1,tmp_sample2;
gain_lin_QPSK = (int16_t)((amp*ONE_OVER_SQRT2_Q15)>>15);
first_re=0;
last_re=12;
for (re=first_re;re<last_re;re++) {
tti_offset = symbol_offset + re_off + re;
// check that RE is not from Cell-specific RS
if (is_not_pilot(pilots,re,frame_parms->nushift,0)==1) {
// printf("re %d (jj %d)\n",re,*jj);
if (mimo_mode == SISO) { //SISO mapping
*re_allocated = *re_allocated + 1;
// printf("%d(%d) : %d,%d => ",tti_offset,*jj,((int16_t*)&txdataF[0][tti_offset])[0],((int16_t*)&txdataF[0][tti_offset])[1]);
for (aa=0; aa<frame_parms->nb_antennas_tx; aa++) {
((int16_t*)&txdataF[aa][tti_offset])[0] += (x0[*jj]==1) ? (-gain_lin_QPSK) : gain_lin_QPSK; //I //b_i
}
*jj = *jj + 1;
for (aa=0; aa<frame_parms->nb_antennas_tx; aa++) {
((int16_t*)&txdataF[aa][tti_offset])[1] += (x0[*jj]==1) ? (-gain_lin_QPSK) : gain_lin_QPSK; //Q //b_{i+1}
}
*jj = *jj + 1;
}
else if (mimo_mode == ALAMOUTI){
*re_allocated = *re_allocated + 1;
((int16_t*)&tmp_sample1)[0] = (x0[*jj]==1) ? (-gain_lin_QPSK) : gain_lin_QPSK;
*jj=*jj+1;
((int16_t*)&tmp_sample1)[1] = (x0[*jj]==1) ? (-gain_lin_QPSK) : gain_lin_QPSK;
*jj=*jj+1;
// second antenna position n -> -x1*
((int16_t*)&tmp_sample2)[0] = (x0[*jj]==1) ? (gain_lin_QPSK) : -gain_lin_QPSK;
*jj=*jj+1;
((int16_t*)&tmp_sample2)[1] = (x0[*jj]==1) ? (-gain_lin_QPSK) : gain_lin_QPSK;
*jj=*jj+1;
// normalization for 2 tx antennas
((int16_t*)&txdataF[0][tti_offset])[0] += (int16_t)((((int16_t*)&tmp_sample1)[0]*ONE_OVER_SQRT2_Q15)>>15);
((int16_t*)&txdataF[0][tti_offset])[1] += (int16_t)((((int16_t*)&tmp_sample1)[1]*ONE_OVER_SQRT2_Q15)>>15);
((int16_t*)&txdataF[1][tti_offset])[0] += (int16_t)((((int16_t*)&tmp_sample2)[0]*ONE_OVER_SQRT2_Q15)>>15);
((int16_t*)&txdataF[1][tti_offset])[1] += (int16_t)((((int16_t*)&tmp_sample2)[1]*ONE_OVER_SQRT2_Q15)>>15);
// fill in the rest of the ALAMOUTI precoding
if (is_not_pilot(pilots,re + 1,frame_parms->nushift,0)==1) {
((int16_t *)&txdataF[0][tti_offset+1])[0] += -((int16_t *)&txdataF[1][tti_offset])[0]; //x1
((int16_t *)&txdataF[0][tti_offset+1])[1] += ((int16_t *)&txdataF[1][tti_offset])[1];
((int16_t *)&txdataF[1][tti_offset+1])[0] += ((int16_t *)&txdataF[0][tti_offset])[0]; //x0*
((int16_t *)&txdataF[1][tti_offset+1])[1] += -((int16_t *)&txdataF[0][tti_offset])[1];
}
else {
((int16_t *)&txdataF[0][tti_offset+2])[0] += -((int16_t *)&txdataF[1][tti_offset])[0]; //x1
((int16_t *)&txdataF[0][tti_offset+2])[1] += ((int16_t *)&txdataF[1][tti_offset])[1];
((int16_t *)&txdataF[1][tti_offset+2])[0] += ((int16_t *)&txdataF[0][tti_offset])[0]; //x0*
((int16_t *)&txdataF[1][tti_offset+2])[1] += -((int16_t *)&txdataF[0][tti_offset])[1];
}
re++; // adjacent carriers are taken care of by precoding
*re_allocated = *re_allocated + 1;
if (is_not_pilot(pilots,re,frame_parms->nushift,0)==0) { // skip pilots
re++;
*re_allocated = *re_allocated + 1;
}
}
}
}
return(0);
}
//uint8_t pbch_d[96+(3*(16+PBCH_A))], pbch_w[3*3*(16+PBCH_A)],pbch_e[1920]; //one bit per byte
int generate_pbch(LTE_eNB_PBCH *eNB_pbch,
mod_sym_t **txdataF,
@@ -260,62 +352,51 @@ int generate_pbch(LTE_eNB_PBCH *eNB_pbch,
#endif
#ifdef IFFT_FPGA
re_offset = frame_parms->N_RB_DL*12-3*12;
symbol_offset = frame_parms->N_RB_DL*12*l;
#else
re_offset = frame_parms->ofdm_symbol_size-3*12;
symbol_offset = frame_parms->ofdm_symbol_size*l;
#endif
for (rb=0;rb<6;rb++) {
#ifdef DEBUG_PBCH
msg("RB %d, jj %d, re_offset %d, symbol_offset %d, pilots %d, nushift %d\n",rb,jj,re_offset, symbol_offset, pilots,frame_parms->nushift);
#endif
allocate_REs_in_RB(txdataF,
&jj,
re_offset,
symbol_offset,
&eNB_pbch->pbch_e[frame_mod4*(pbch_E>>2)],
(frame_parms->mode1_flag == 1) ? SISO : ALAMOUTI,
0,
pilots,
2,
0,
allocate_pbch_REs_in_RB(frame_parms,
txdataF,
&jj,
re_offset,
symbol_offset,
&eNB_pbch->pbch_e[frame_mod4*(pbch_E>>2)],
pilots,
#ifdef INTERFERENCE_MITIGATION
(pilots_2==1)?(amp/3):amp,
(pilots_2==1)?(amp/3):amp,
#else
amp,
amp,
#endif
NULL,
&re_allocated,
0,
0,
0,
1,
0,
frame_parms);
&re_allocated);
re_offset+=12; // go to next RB
// check if we crossed the symbol boundary and skip DC
#ifdef IFFT_FPGA
if (re_offset >= frame_parms->N_RB_DL*12)
re_offset = 0;
#else
if (re_offset >= frame_parms->ofdm_symbol_size)
re_offset=1;
#endif
}
// }
}
#ifdef DEBUG_PBCH
msg("[PBCH] txdataF=\n");
for (i=0;i<frame_parms->ofdm_symbol_size;i++)
msg("%d=>(%d,%d)\n",i,((short*)&txdataF[0][frame_parms->ofdm_symbol_size*(nsymb>>1)+i])[0],
((short*)&txdataF[0][frame_parms->ofdm_symbol_size*(nsymb>>1)+i])[1]);
printf("[PBCH] txdataF=\n");
for (i=0;i<frame_parms->ofdm_symbol_size;i++) {
printf("%d=>(%d,%d)",i,((short*)&txdataF[0][frame_parms->ofdm_symbol_size*(nsymb>>1)+i])[0],
((short*)&txdataF[0][frame_parms->ofdm_symbol_size*(nsymb>>1)+i])[1]);
if (frame_parms->mode1_flag==0) {
printf("(%d,%d)\n",((short*)&txdataF[1][frame_parms->ofdm_symbol_size*(nsymb>>1)+i])[0],
((short*)&txdataF[1][frame_parms->ofdm_symbol_size*(nsymb>>1)+i])[1]);
}
else {
printf("\n");
}
}
#endif
@@ -332,11 +413,12 @@ int32_t generate_pbch_emul(PHY_VARS_eNB *phy_vars_eNB,uint8_t *pbch_pdu) {
}
uint16_t pbch_extract(int **rxdataF,
int **dl_ch_estimates,
int **rxdataF_ext,
int **dl_ch_estimates_ext,
uint32_t symbol,
LTE_DL_FRAME_PARMS *frame_parms) {
int **dl_ch_estimates,
int **rxdataF_ext,
int **dl_ch_estimates_ext,
uint32_t symbol,
uint32_t high_speed_flag,
LTE_DL_FRAME_PARMS *frame_parms) {
uint16_t rb,nb_rb=6;
@@ -356,21 +438,14 @@ uint16_t pbch_extract(int **rxdataF,
(rx_offset + (symbol*(frame_parms->ofdm_symbol_size)))*2,
LTE_CE_OFFSET+ch_offset+(symbol_mod*(frame_parms->ofdm_symbol_size)));
*/
#ifndef NEW_FFT
rxF = &rxdataF[aarx][(rx_offset + (symbol*(frame_parms->ofdm_symbol_size)))*2];
#else
rxF = &rxdataF[aarx][(rx_offset + (symbol*(frame_parms->ofdm_symbol_size)))];
#endif
rxF_ext = &rxdataF_ext[aarx][symbol_mod*(6*12)];
for (rb=0; rb<nb_rb; rb++) {
// skip DC carrier
if (rb==3) {
#ifndef NEW_FFT
rxF = &rxdataF[aarx][(1 + (symbol*(frame_parms->ofdm_symbol_size)))*2];
#else
rxF = &rxdataF[aarx][(1 + (symbol*(frame_parms->ofdm_symbol_size)))];
#endif
}
if ((symbol_mod==0) || (symbol_mod==1)) {
j=0;
@@ -379,39 +454,26 @@ uint16_t pbch_extract(int **rxdataF,
(i!=(nushiftmod3+3)) &&
(i!=(nushiftmod3+6)) &&
(i!=(nushiftmod3+9))) {
#ifndef NEW_FFT
rxF_ext[j++]=rxF[i<<1];
#else
rxF_ext[j++]=rxF[i];
#endif
}
}
#ifndef NEW_FFT
rxF+=24;
#else
rxF+=12;
#endif
rxF_ext+=8;
}
else {
for (i=0;i<12;i++) {
#ifndef NEW_FFT
rxF_ext[i]=rxF[i<<1];
#else
rxF_ext[i]=rxF[i];
#endif
}
#ifndef NEW_FFT
rxF+=24;
#else
rxF+=12;
#endif
rxF_ext+=12;
}
}
for (aatx=0;aatx<4;aatx++) {//frame_parms->nb_antennas_tx_eNB;aatx++) {
dl_ch0 = &dl_ch_estimates[(aatx<<1)+aarx][LTE_CE_OFFSET+ch_offset+(symbol*(frame_parms->ofdm_symbol_size))];
if (high_speed_flag == 1)
dl_ch0 = &dl_ch_estimates[(aatx<<1)+aarx][LTE_CE_OFFSET+ch_offset+(symbol*(frame_parms->ofdm_symbol_size))];
else
dl_ch0 = &dl_ch_estimates[(aatx<<1)+aarx][LTE_CE_OFFSET+ch_offset];
dl_ch0_ext = &dl_ch_estimates_ext[(aatx<<1)+aarx][symbol_mod*(6*12)];
for (rb=0; rb<nb_rb; rb++) {
@@ -737,11 +799,12 @@ static int8_t pbch_w_rx[3*3*(16+PBCH_A)],pbch_d_rx[96+(3*(16+PBCH_A))];
uint16_t rx_pbch(LTE_UE_COMMON *lte_ue_common_vars,
LTE_UE_PBCH *lte_ue_pbch_vars,
LTE_DL_FRAME_PARMS *frame_parms,
uint8_t eNB_id,
MIMO_mode_t mimo_mode,
uint8_t frame_mod4) {
LTE_UE_PBCH *lte_ue_pbch_vars,
LTE_DL_FRAME_PARMS *frame_parms,
uint8_t eNB_id,
MIMO_mode_t mimo_mode,
uint32_t high_speed_flag,
uint8_t frame_mod4) {
uint8_t log2_maxh;//,aatx,aarx;
int max_h=0;
@@ -778,6 +841,7 @@ uint16_t rx_pbch(LTE_UE_COMMON *lte_ue_common_vars,
lte_ue_pbch_vars->rxdataF_ext,
lte_ue_pbch_vars->dl_ch_estimates_ext,
symbol,
high_speed_flag,
frame_parms);
#ifdef DEBUG_PBCH
msg("[PHY] PBCH Symbol %d\n",symbol);
@@ -811,7 +875,7 @@ uint16_t rx_pbch(LTE_UE_COMMON *lte_ue_common_vars,
// msg("[PBCH][RX] Alamouti receiver not yet implemented!\n");
// return(-1);
}
else if ((mimo_mode != ANTCYCLING) && (mimo_mode != SISO)) {
else if (mimo_mode != SISO) {
msg("[PBCH][RX] Unsupported MIMO mode\n");
return(-1);
}
@@ -911,7 +975,7 @@ uint16_t rx_pbch_emul(PHY_VARS_UE *phy_vars_ue,
uint8_t eNB_id,
uint8_t pbch_phase) {
double bler=0.0, x=0.0;
double bler=0.0;//, x=0.0;
double sinr=0.0;
uint16_t nb_rb = phy_vars_ue->lte_frame_parms.N_RB_DL;
int16_t f;
+25 -25
View File
@@ -75,16 +75,16 @@ void dump_mch(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint16_t coded_bits_per_co
*/
sprintf(fname,"mch_rxF_comp0.m");
sprintf(vname,"pmch_rxF_comp0");
write_output(fname,vname,phy_vars_ue->lte_ue_pdsch_vars_MCH[eNB_id]->rxdataF_comp[0],12*N_RB_DL*nsymb_pmch,1,1);
write_output(fname,vname,phy_vars_ue->lte_ue_pdsch_vars_MCH[eNB_id]->rxdataF_comp0[0],12*N_RB_DL*nsymb_pmch,1,1);
sprintf(fname,"mch_rxF_llr.m");
sprintf(vname,"pmch_llr");
write_output(fname,vname, phy_vars_ue->lte_ue_pdsch_vars_MCH[eNB_id]->llr[0],coded_bits_per_codeword,1,0);
sprintf(fname,"mch_mag1.m");
sprintf(vname,"pmch_mag1");
write_output(fname,vname,phy_vars_ue->lte_ue_pdsch_vars_MCH[eNB_id]->dl_ch_mag[0],12*N_RB_DL*nsymb_pmch,1,1);
write_output(fname,vname,phy_vars_ue->lte_ue_pdsch_vars_MCH[eNB_id]->dl_ch_mag0[0],12*N_RB_DL*nsymb_pmch,1,1);
sprintf(fname,"mch_mag2.m");
sprintf(vname,"pmch_mag2");
write_output(fname,vname,phy_vars_ue->lte_ue_pdsch_vars_MCH[eNB_id]->dl_ch_magb[0],12*N_RB_DL*nsymb_pmch,1,1);
write_output(fname,vname,phy_vars_ue->lte_ue_pdsch_vars_MCH[eNB_id]->dl_ch_magb0[0],12*N_RB_DL*nsymb_pmch,1,1);
write_output("mch00_ch0.m","pmch00_ch0",
&(phy_vars_ue->lte_ue_common_vars.dl_ch_estimates[eNB_id][0][0]),
@@ -186,24 +186,24 @@ void fill_eNB_dlsch_MCH(PHY_VARS_eNB *phy_vars_eNB,int mcs,int ndi,int rvidx, in
dlsch->harq_processes[0]->Nl = 1;
dlsch->harq_processes[0]->TBS = TBStable[get_I_TBS(dlsch->harq_processes[0]->mcs)][frame_parms->N_RB_DL-1];
dlsch->current_harq_pid = 0;
dlsch->nb_rb = frame_parms->N_RB_DL;
dlsch->harq_processes[0]->nb_rb = frame_parms->N_RB_DL;
switch(frame_parms->N_RB_DL) {
case 6:
dlsch->rb_alloc[0] = 0x3f;
dlsch->harq_processes[0]->rb_alloc[0] = 0x3f;
break;
case 25:
dlsch->rb_alloc[0] = 0x1ffffff;
dlsch->harq_processes[0]->rb_alloc[0] = 0x1ffffff;
break;
case 50:
dlsch->rb_alloc[0] = 0xffffffff;
dlsch->rb_alloc[1] = 0x3ffff;
dlsch->harq_processes[0]->rb_alloc[0] = 0xffffffff;
dlsch->harq_processes[0]->rb_alloc[1] = 0x3ffff;
break;
case 100:
dlsch->rb_alloc[0] = 0xffffffff;
dlsch->rb_alloc[1] = 0xffffffff;
dlsch->rb_alloc[2] = 0xffffffff;
dlsch->rb_alloc[3] = 0xf;
dlsch->harq_processes[0]->rb_alloc[0] = 0xffffffff;
dlsch->harq_processes[0]->rb_alloc[1] = 0xffffffff;
dlsch->harq_processes[0]->rb_alloc[2] = 0xffffffff;
dlsch->harq_processes[0]->rb_alloc[3] = 0xf;
break;
}
@@ -277,7 +277,7 @@ void fill_UE_dlsch_MCH(PHY_VARS_UE *phy_vars_ue,int mcs,int ndi,int rvidx,int eN
}else {
G = get_G(&phy_vars_eNB->lte_frame_parms,
phy_vars_eNB->lte_frame_parms.N_RB_DL,
phy_vars_eNB->dlsch_eNB_MCH->rb_alloc,
phy_vars_eNB->dlsch_eNB_MCH->harq_processes[0]->rb_alloc,
get_Qm(phy_vars_eNB->dlsch_eNB_MCH->harq_processes[0]->mcs),1,
2,phy_vars_eNB->proc[sched_subframe].frame_tx,subframe);
@@ -820,9 +820,9 @@ int rx_pmch(PHY_VARS_UE *phy_vars_ue,
mch_channel_compensation(lte_ue_pdsch_vars[eNB_id]->rxdataF_ext,
lte_ue_pdsch_vars[eNB_id]->dl_ch_estimates_ext,
lte_ue_pdsch_vars[eNB_id]->dl_ch_mag,
lte_ue_pdsch_vars[eNB_id]->dl_ch_magb,
lte_ue_pdsch_vars[eNB_id]->rxdataF_comp,
lte_ue_pdsch_vars[eNB_id]->dl_ch_mag0,
lte_ue_pdsch_vars[eNB_id]->dl_ch_magb0,
lte_ue_pdsch_vars[eNB_id]->rxdataF_comp0,
frame_parms,
symbol,
get_Qm(dlsch_ue[0]->harq_processes[0]->mcs),
@@ -831,33 +831,33 @@ int rx_pmch(PHY_VARS_UE *phy_vars_ue,
if (frame_parms->nb_antennas_rx > 1)
mch_detection_mrc(frame_parms,
lte_ue_pdsch_vars[eNB_id]->rxdataF_comp,
lte_ue_pdsch_vars[eNB_id]->dl_ch_mag,
lte_ue_pdsch_vars[eNB_id]->dl_ch_magb,
lte_ue_pdsch_vars[eNB_id]->rxdataF_comp0,
lte_ue_pdsch_vars[eNB_id]->dl_ch_mag0,
lte_ue_pdsch_vars[eNB_id]->dl_ch_magb0,
symbol);
switch (get_Qm(dlsch_ue[0]->harq_processes[0]->mcs)) {
case 2 :
mch_qpsk_llr(frame_parms,
lte_ue_pdsch_vars[eNB_id]->rxdataF_comp,
lte_ue_pdsch_vars[eNB_id]->rxdataF_comp0,
lte_ue_pdsch_vars[eNB_id]->llr[0],
symbol,
lte_ue_pdsch_vars[eNB_id]->llr128);
break;
case 4:
mch_16qam_llr(frame_parms,
lte_ue_pdsch_vars[eNB_id]->rxdataF_comp,
lte_ue_pdsch_vars[eNB_id]->rxdataF_comp0,
lte_ue_pdsch_vars[eNB_id]->llr[0],
lte_ue_pdsch_vars[eNB_id]->dl_ch_mag,
lte_ue_pdsch_vars[eNB_id]->dl_ch_mag0,
symbol,
lte_ue_pdsch_vars[eNB_id]->llr128);
break;
case 6:
mch_64qam_llr(frame_parms,
lte_ue_pdsch_vars[eNB_id]->rxdataF_comp,
lte_ue_pdsch_vars[eNB_id]->rxdataF_comp0,
lte_ue_pdsch_vars[eNB_id]->llr[0],
lte_ue_pdsch_vars[eNB_id]->dl_ch_mag,
lte_ue_pdsch_vars[eNB_id]->dl_ch_magb,
lte_ue_pdsch_vars[eNB_id]->dl_ch_mag0,
lte_ue_pdsch_vars[eNB_id]->dl_ch_magb0,
symbol,
lte_ue_pdsch_vars[eNB_id]->llr128);
break;
+5 -4
View File
@@ -46,13 +46,13 @@ double get_pa_dB(PDSCH_CONFIG_DEDICATED *pdsch_config_dedicated) {
}
double computeRhoA_eNB(PDSCH_CONFIG_DEDICATED *pdsch_config_dedicated,
LTE_eNB_DLSCH_t *dlsch_eNB ){
LTE_eNB_DLSCH_t *dlsch_eNB,int dl_power_off){
double rho_a_dB;
double sqrt_rho_a_lin;
rho_a_dB = pa_values[ pdsch_config_dedicated->p_a];
if(!dlsch_eNB->dl_power_off)
if(!dl_power_off)
rho_a_dB-=10*log10(2);
sqrt_rho_a_lin= pow(10,(0.05*rho_a_dB));
@@ -69,12 +69,13 @@ double computeRhoA_eNB(PDSCH_CONFIG_DEDICATED *pdsch_config_dedicated,
double computeRhoB_eNB(PDSCH_CONFIG_DEDICATED *pdsch_config_dedicated,
PDSCH_CONFIG_COMMON *pdsch_config_common,
uint8_t n_antenna_port,
LTE_eNB_DLSCH_t *dlsch_eNB){
LTE_eNB_DLSCH_t *dlsch_eNB,
int dl_power_off){
double rho_a_dB, rho_b_dB;
double sqrt_rho_b_lin;
rho_a_dB= computeRhoA_eNB(pdsch_config_dedicated,dlsch_eNB);
rho_a_dB= computeRhoA_eNB(pdsch_config_dedicated,dlsch_eNB,dl_power_off);
if(n_antenna_port>1)
rho_b_dB= ratioPB[1][pdsch_config_common->p_b] + rho_a_dB;
+68 -54
View File
@@ -128,65 +128,56 @@ void dlsch_encoding_emul(PHY_VARS_eNB *phy_vars_eNB,
/** \fn allocate_REs_in_RB(mod_sym_t **txdataF,
uint32_t *jj,
uint32_t *jj2,
uint16_t re_offset,
uint32_t symbol_offset,
uint8_t *output,
MIMO_mode_t mimo_mode,
uint8_t nu,
LTE_DL_eNB_HARQ_t *dlsch0_harq,
LTE_DL_eNB_HARQ_t *dlsch1_harq,
uint8_t pilots,
uint8_t mod_order,
uint8_t precoder_index,
int16_t amp,
int16_t *qam_table_s,
uint32_t *re_allocated,
uint8_t skip_dc,
uint8_t skip_half,
uint8_t use2ndpilots,
uint8_t Nlayers,
uint8_t firstlayer,
LTE_DL_FRAME_PARMS *frame_parms);
\brief Fills RB with data
\param txdataF pointer to output data (frequency domain signal)
\param jj index to output
\param jj index to output (from CW 1)
\param jj index to output (from CW 2)
\param re_offset index of the first RE of the RB
\param symbol_offset index to the OFDM symbol
\param output output of the channel coder, one bit per byte
\param mimo_mode MIMO mode
\param nu Layer index
\param dlsch0_harq Pointer to Transport block 0 HARQ structure
\param dlsch0_harq Pointer to Transport block 1 HARQ structure
\param pilots =1 if symbol_offset is an OFDM symbol that contains pilots, 0 otherwise
\param mod_order 2=QPSK, 4=16QAM, 6=64QAM
\param precoder_index 36-211 W precoder column (1 layer) or matrix (2 layer) selection index
\param amp Amplitude for symbols
\param qam_table_s pointer to scaled QAM table (by rho_a or rho_b)
\param qam_table_s0 pointer to scaled QAM table for Transport Block 0 (by rho_a or rho_b)
\param qam_table_s1 pointer to scaled QAM table for Transport Block 1 (by rho_a or rho_b)
\param re_allocated pointer to allocation counter
\param skip_dc offset for positive RBs
\param skip_half indicate that first or second half of RB must be skipped for PBCH/PSS/SSS
\param use2ndpilots Set to use the pilots from antenna port 1 for PDSCH
\param Nlayers Number of layers for this codeword
\param firstlayer Index of first layer (minus 7, i.e. 0..7 <-> p=7,...,14
\param frame_parms Frame parameter descriptor
*/
int32_t allocate_REs_in_RB(mod_sym_t **txdataF,
int32_t allocate_REs_in_RB(LTE_DL_FRAME_PARMS *frame_parms,
mod_sym_t **txdataF,
uint32_t *jj,
uint32_t *jj2,
uint16_t re_offset,
uint32_t symbol_offset,
uint8_t *output,
MIMO_mode_t mimo_mode,
uint8_t nu,
LTE_DL_eNB_HARQ_t *dlsch0_harq,
LTE_DL_eNB_HARQ_t *dlsch1_harq,
uint8_t pilots,
uint8_t mod_order,
uint8_t precoder_index,
int16_t amp,
int16_t *qam_table_s,
uint8_t precoder_index,
int16_t *qam_table_s0,
int16_t *qam_table_s1,
uint32_t *re_allocated,
uint8_t skip_dc,
uint8_t skip_half,
uint8_t use2ndpilots,
uint8_t Nlayers,
uint8_t firstlayer,
LTE_DL_FRAME_PARMS *frame_parms);
uint8_t skip_half);
/** \fn int32_t dlsch_modulation(mod_sym_t **txdataF,
int16_t amp,
@@ -201,15 +192,17 @@ int32_t allocate_REs_in_RB(mod_sym_t **txdataF,
@param sub_frame_offset Offset of this subframe in units of subframes (usually 0)
@param frame_parms Pointer to frame descriptor
@param num_pdcch_symbols Number of PDCCH symbols in this subframe
@param dlsch Pointer to DLSCH descriptor for this allocation
@param dlsch0 Pointer to Transport Block 0 DLSCH descriptor for this allocation
@param dlsch1 Pointer to Transport Block 0 DLSCH descriptor for this allocation
*/
int32_t dlsch_modulation(mod_sym_t **txdataF,
int16_t amp,
uint32_t sub_frame_offset,
LTE_DL_FRAME_PARMS *frame_parms,
uint8_t num_pdcch_symbols,
LTE_eNB_DLSCH_t *dlsch);
int16_t amp,
uint32_t sub_frame_offset,
LTE_DL_FRAME_PARMS *frame_parms,
uint8_t num_pdcch_symbols,
LTE_eNB_DLSCH_t *dlsch0,
LTE_eNB_DLSCH_t *dlsch1);
/*
\brief This function is the top-level routine for generation of the sub-frame signal (frequency-domain) for MCH.
@param txdataF Table of pointers for frequency-domain TX signals
@@ -861,6 +854,7 @@ void dlsch_detection_mrc(LTE_DL_FRAME_PARMS *frame_parms,
@param rb_alloc RB allocation vector
@param symbol Symbol to extract
@param subframe Subframe number
@param high_speed_flag
@param frame_parms Pointer to frame descriptor
*/
uint16_t dlsch_extract_rbs_single(int32_t **rxdataF,
@@ -872,6 +866,7 @@ uint16_t dlsch_extract_rbs_single(int32_t **rxdataF,
uint32_t *rb_alloc,
uint8_t symbol,
uint8_t subframe,
uint32_t high_speed_flag,
LTE_DL_FRAME_PARMS *frame_parms);
/** \fn dlsch_extract_rbs_dual(int32_t **rxdataF,
@@ -894,6 +889,7 @@ uint16_t dlsch_extract_rbs_single(int32_t **rxdataF,
@param rb_alloc RB allocation vector
@param symbol Symbol to extract
@param subframe Subframe index
@param high_speed_flag
@param frame_parms Pointer to frame descriptor
*/
uint16_t dlsch_extract_rbs_dual(int32_t **rxdataF,
@@ -905,6 +901,7 @@ uint16_t dlsch_extract_rbs_dual(int32_t **rxdataF,
uint32_t *rb_alloc,
uint8_t symbol,
uint8_t subframe,
uint32_t high_speed_flag,
LTE_DL_FRAME_PARMS *frame_parms);
/** \brief This function performs channel compensation (matched filtering) on the received RBs for this allocation. In addition, it computes the squared-magnitude of the channel with weightings for 16QAM/64QAM detection as well as dual-stream detection (cross-correlation)
@@ -944,7 +941,7 @@ void dlsch_dual_stream_correlation(LTE_DL_FRAME_PARMS *frame_parms,
int **dl_ch_rho_ext,
unsigned char output_shift);
void dlsch_channel_compensation_prec(int **rxdataF_ext,
void dlsch_channel_compensation_TM56(int **rxdataF_ext,
int **dl_ch_estimates_ext,
int **dl_ch_mag,
int **dl_ch_magb,
@@ -959,6 +956,17 @@ void dlsch_channel_compensation_prec(int **rxdataF_ext,
unsigned char output_shift,
unsigned char dl_power_off);
void dlsch_channel_compensation_TM3(LTE_DL_FRAME_PARMS *frame_parms,
LTE_UE_PDSCH *lte_ue_pdsch_vars,
PHY_MEASUREMENTS *phy_measurements,
int eNB_id,
unsigned char symbol,
unsigned char mod_order0,
unsigned char mod_order1,
unsigned short nb_rb,
unsigned char output_shift);
/** \brief This function computes the average channel level over all allocated RBs and antennas (TX/RX) in order to compute output shift for compensated signal
@param dl_ch_estimates_ext Channel estimates in allocated RBs
@param frame_parms Pointer to frame descriptor
@@ -972,7 +980,13 @@ void dlsch_channel_level(int32_t **dl_ch_estimates_ext,
uint8_t pilots_flag,
uint16_t nb_rb);
void dlsch_channel_level_prec(int32_t **dl_ch_estimates_ext,
void dlsch_channel_level_TM3(int **dl_ch_estimates_ext,
LTE_DL_FRAME_PARMS *frame_parms,
int *avg,
uint8_t symbol,
unsigned short nb_rb);
void dlsch_channel_level_TM56(int32_t **dl_ch_estimates_ext,
LTE_DL_FRAME_PARMS *frame_parms,
unsigned char *pmi_ext,
int32_t *avg,
@@ -1045,12 +1059,13 @@ int32_t rx_pdsch(PHY_VARS_UE *phy_vars_ue,
uint8_t harq_pid);
int32_t rx_pdcch(LTE_UE_COMMON *lte_ue_common_vars,
LTE_UE_PDCCH **lte_ue_pdcch_vars,
LTE_DL_FRAME_PARMS *frame_parms,
uint8_t subframe,
uint8_t eNB_id,
MIMO_mode_t mimo_mode,
uint8_t is_secondary_ue);
LTE_UE_PDCCH **lte_ue_pdcch_vars,
LTE_DL_FRAME_PARMS *frame_parms,
uint8_t subframe,
uint8_t eNB_id,
MIMO_mode_t mimo_mode,
uint32_t high_speed_flag,
uint8_t is_secondary_ue);
/*! \brief Performs detection of SSS to find cell ID and other framing parameters (FDD/TDD, normal/extended prefix)
@param phy_vars_ue Pointer to UE variables
@param tot_metric Pointer to variable containing maximum metric under framing hypothesis (to be compared to other hypotheses
@@ -1069,6 +1084,7 @@ uint16_t rx_pbch(LTE_UE_COMMON *lte_ue_common_vars,
LTE_DL_FRAME_PARMS *frame_parms,
uint8_t eNB_id,
MIMO_mode_t mimo_mode,
uint32_t high_speed_flag,
uint8_t frame_mod4);
uint16_t rx_pbch_emul(PHY_VARS_UE *phy_vars_ue,
@@ -1144,12 +1160,12 @@ uint16_t extract_crc(uint8_t *dci,uint8_t DCI_LENGTH);
\param stream0_out pointer to output stream
\param rho01 pointer to correlation matrix
\param length*/
void qpsk_qpsk_prec(short *stream0_in,
short *stream1_in,
short *stream0_out,
short *rho01,
int length
);
void qpsk_qpsk_TM3456(short *stream0_in,
short *stream1_in,
short *stream0_out,
short *rho01,
int length
);
/** \brief Attempt decoding of a particular DCI with given length and format.
@param DCI_LENGTH length of DCI in bits
@@ -1710,10 +1726,7 @@ void init_prach_tables(int N_ZC);
*/
int is_pmch_subframe(frame_t frame, int subframe, LTE_DL_FRAME_PARMS *frame_parms);
//ICIC algos
uint8_t Get_SB_size(uint8_t n_rb_dl);
//end ALU's algo
uint8_t is_not_pilot(uint8_t pilots, uint8_t re, uint8_t nushift, uint8_t use2ndpilots);
uint32_t dlsch_decoding_abstraction(double *dlsch_MIPB,
LTE_DL_FRAME_PARMS *lte_frame_parms,
@@ -1725,12 +1738,13 @@ uint32_t dlsch_decoding_abstraction(double *dlsch_MIPB,
double get_pa_dB(PDSCH_CONFIG_DEDICATED *pdsch_config_dedicated);
double computeRhoA_eNB(PDSCH_CONFIG_DEDICATED *pdsch_config_dedicated,
LTE_eNB_DLSCH_t *dlsch_eNB );
LTE_eNB_DLSCH_t *dlsch_eNB,
int dl_power_off);
double computeRhoB_eNB(PDSCH_CONFIG_DEDICATED *pdsch_config_dedicated,
PDSCH_CONFIG_COMMON *pdsch_config_common,
uint8_t n_antenna_port,
LTE_eNB_DLSCH_t *dlsch_eNB);
LTE_eNB_DLSCH_t *dlsch_eNB,int dl_power_off);
double computeRhoA_UE(PDSCH_CONFIG_DEDICATED *pdsch_config_dedicated,
LTE_UE_DLSCH_t *dlsch_ue,
+1 -1
View File
@@ -44,7 +44,7 @@
#ifdef DEBUG_UCI_TOOLS
#include "PHY/vars.h"
#endif
//#define DEBUG_UCI
#define DEBUG_UCI
uint64_t pmi2hex_2Ar1(uint32_t pmi) {
+2 -3
View File
@@ -76,9 +76,8 @@ unsigned char cs_ack_extended[4] = {1,2,6,7};
//unsigned short scfdma_amps[25] = {0,5120,3620,2956,2560,2290,2090,1935,1810,1706,1619,1544,1478,1420,1368,1322,1280,1242,1207,1175,1145,1117,1092,1068,1045,1024};
char dci_format_strings[15][13] = {"0","1","1A","1B","1C","1D",
"2_2A_L10PRB","2_2A_M10PRB","2_4A_L10PRB","2_4A_M10PRB",
"2A_2A_L10PRB","2A_2A_M10PRB","2A_4A_L10PRB","2A_4A_M10PRB",
char dci_format_strings[15][13] = {"0","1","1A","1B","1C","1D","1E_2A_M10PRB",
"2","2A","2B","2C","2D",
"3"};
uint8_t wACK[5][4] = {{1,1,1,1},{1,0,1,0},{1,1,0,0},{1,0,0,1},{0,0,0,0}};
+8 -8
View File
@@ -498,7 +498,7 @@ void phy_scope_UE(FD_lte_phy_scope_ue *form,
pdcch_comp = (int16_t*) phy_vars_ue->lte_ue_pdcch_vars[eNB_id]->rxdataF_comp[0];
pdsch_llr = (int16_t*) phy_vars_ue->lte_ue_pdsch_vars[eNB_id]->llr[0]; // stream 0
// pdsch_llr = (int16_t*) phy_vars_ue->lte_ue_pdsch_vars_SI[eNB_id]->llr[0]; // stream 0
pdsch_comp = (int16_t*) phy_vars_ue->lte_ue_pdsch_vars[eNB_id]->rxdataF_comp[0];
pdsch_comp = (int16_t*) phy_vars_ue->lte_ue_pdsch_vars[eNB_id]->rxdataF_comp0[0];
// Received signal in time domain of receive antenna 0
if (rxsig_t != NULL) {
@@ -633,22 +633,22 @@ void phy_scope_UE(FD_lte_phy_scope_ue *form,
// PDSCH LLRs
if (pdsch_llr != NULL) {
for (i=0; i<coded_bits_per_codeword; i++) {
llr[i] = (float) pdsch_llr[i];
for (i=0; i<coded_bits_per_codeword/4; i++) {
llr[i] = (float) pdsch_llr[4*i];
bit[i] = (float) i;
}
fl_set_xyplot_xbounds(form->pdsch_llr,0,coded_bits_per_codeword);
fl_set_xyplot_data(form->pdsch_llr,bit,llr,coded_bits_per_codeword,"","","");
fl_set_xyplot_xbounds(form->pdsch_llr,0,coded_bits_per_codeword/4);
fl_set_xyplot_data(form->pdsch_llr,bit,llr,coded_bits_per_codeword/4,"","","");
}
// PDSCH I/Q of MF Output
if (pdsch_comp!=NULL) {
ind=0;
for (k=0; k<frame_parms->symbols_per_tti; k++) {
for (i=0; i<12*frame_parms->N_RB_DL; i++) {
I[ind] = pdsch_comp[(2*frame_parms->N_RB_DL*12*k)+2*i];
Q[ind] = pdsch_comp[(2*frame_parms->N_RB_DL*12*k)+2*i+1];
for (i=0; i<12*frame_parms->N_RB_DL/2; i++) {
I[ind] = pdsch_comp[(2*frame_parms->N_RB_DL*12*k)+4*i];
Q[ind] = pdsch_comp[(2*frame_parms->N_RB_DL*12*k)+4*i+1];
ind++;
}
}
+3
View File
@@ -425,6 +425,9 @@ typedef struct
uint32_t X_u[64][839];
uint32_t high_speed_flag;
int16_t ch_est_alpha;
char ulsch_no_allocation_counter[NUMBER_OF_CONNECTED_eNB_MAX];
unsigned char ulsch_ue_Msg3_active[NUMBER_OF_CONNECTED_eNB_MAX];
+12 -6
View File
@@ -527,7 +527,7 @@ typedef struct {
typedef enum {
SISO=0,
ALAMOUTI=1,
ANTCYCLING=2,
LARGE_CDD=2,
UNIFORM_PRECODING11=3,
UNIFORM_PRECODING1m1=4,
UNIFORM_PRECODING1j=5,
@@ -630,17 +630,23 @@ typedef struct {
/// Received frequency-domain signal after extraction
int32_t **rxdataF_ext;
/// Received frequency-domain signal after extraction and channel compensation
int32_t **rxdataF_comp;
int32_t **rxdataF_comp0;
/// Received frequency-domain signal after extraction and channel compensation
int32_t **rxdataF_comp1;
/// Downlink channel estimates extracted in PRBS
int32_t **dl_ch_estimates_ext;
/// Downlink cross-correlation of MIMO channel estimates (unquantized PMI) extracted in PRBS
int32_t **dl_ch_rho_ext;
/// Downlink PMIs extracted in PRBS and grouped in subbands
uint8_t *pmi_ext;
/// Magnitude of Downlink Channel (16QAM level/First 64QAM level)
int32_t **dl_ch_mag;
/// Magnitude of Downlink Channel (2nd 64QAM level)
int32_t **dl_ch_magb;
/// Magnitude of Downlink Channel first layer (16QAM level/First 64QAM level)
int32_t **dl_ch_mag0;
/// Magnitude of Downlink Channel second layer (16QAM level/First 64QAM level)
int32_t **dl_ch_mag1;
/// Magnitude of Downlink Channel, first layer (2nd 64QAM level)
int32_t **dl_ch_magb0;
/// Magnitude of Downlink Channel second layer (2nd 64QAM level)
int32_t **dl_ch_magb1;
/// Cross-correlation of two eNB signals
int32_t **rho;
/// never used... always send dl_ch_rho_ext instead...
+1 -1
View File
@@ -406,7 +406,7 @@ typedef struct
//! estimated correlation (wideband dB) between spatial channels (computed in dlsch_demodulation)
int rx_correlation_dB[NUMBER_OF_CONNECTED_eNB_MAX][2];
/// Wideband CQI (sum of all RX antennas, in dB, for precoded transmission modes (4,5,6), up to 4 spatial streams)
/// Wideband CQI (sum of all RX antennas, in dB, for precoded transmission modes (3,4,5,6), up to 4 spatial streams)
int precoded_cqi_dB[NUMBER_OF_CONNECTED_eNB_MAX+1][4];
/// Subband CQI per RX antenna (= SINR)
int subband_cqi[NUMBER_OF_CONNECTED_eNB_MAX][NB_ANTENNAS_RX][NUMBER_OF_SUBBANDS_MAX];
+16 -13
View File
@@ -1789,8 +1789,8 @@ void phy_procedures_eNB_TX(unsigned char sched_subframe,PHY_VARS_eNB *phy_vars_e
0,
phy_vars_eNB->dlsch_eNB_SI,
get_G(&phy_vars_eNB->lte_frame_parms,
phy_vars_eNB->dlsch_eNB_SI->nb_rb,
phy_vars_eNB->dlsch_eNB_SI->rb_alloc,
phy_vars_eNB->dlsch_eNB_SI->harq_processes[0]->nb_rb,
phy_vars_eNB->dlsch_eNB_SI->harq_processes[0]->rb_alloc,
get_Qm(phy_vars_eNB->dlsch_eNB_SI->harq_processes[0]->mcs),
1,
num_pdcch_symbols,phy_vars_eNB->proc[sched_subframe].frame_tx,subframe),
@@ -1805,7 +1805,8 @@ void phy_procedures_eNB_TX(unsigned char sched_subframe,PHY_VARS_eNB *phy_vars_e
subframe,
&phy_vars_eNB->lte_frame_parms,
num_pdcch_symbols,
phy_vars_eNB->dlsch_eNB_SI);
phy_vars_eNB->dlsch_eNB_SI,
(LTE_eNB_DLSCH_t *)NULL);
stop_meas(&phy_vars_eNB->dlsch_modulation_stats);
}
#ifdef PHY_ABSTRACTION
@@ -1917,8 +1918,8 @@ void phy_procedures_eNB_TX(unsigned char sched_subframe,PHY_VARS_eNB *phy_vars_e
0,
phy_vars_eNB->dlsch_eNB_ra,
get_G(&phy_vars_eNB->lte_frame_parms,
phy_vars_eNB->dlsch_eNB_ra->nb_rb,
phy_vars_eNB->dlsch_eNB_ra->rb_alloc,
phy_vars_eNB->dlsch_eNB_ra->harq_processes[0]->nb_rb,
phy_vars_eNB->dlsch_eNB_ra->harq_processes[0]->rb_alloc,
get_Qm(phy_vars_eNB->dlsch_eNB_ra->harq_processes[0]->mcs),
1,
num_pdcch_symbols,phy_vars_eNB->proc[sched_subframe].frame_tx,subframe),
@@ -1930,7 +1931,8 @@ void phy_procedures_eNB_TX(unsigned char sched_subframe,PHY_VARS_eNB *phy_vars_e
subframe,
&phy_vars_eNB->lte_frame_parms,
num_pdcch_symbols,
phy_vars_eNB->dlsch_eNB_ra);
phy_vars_eNB->dlsch_eNB_ra,
(LTE_eNB_DLSCH_t *)NULL);
}
#ifdef PHY_ABSTRACTION
else {
@@ -1967,14 +1969,14 @@ void phy_procedures_eNB_TX(unsigned char sched_subframe,PHY_VARS_eNB *phy_vars_e
phy_vars_eNB->Mod_id, phy_vars_eNB->dlsch_eNB[(uint8_t)UE_id][0]->rnti,harq_pid,
phy_vars_eNB->proc[sched_subframe].frame_tx, subframe, input_buffer_length,
get_G(&phy_vars_eNB->lte_frame_parms,
phy_vars_eNB->dlsch_eNB[(uint8_t)UE_id][0]->nb_rb,
phy_vars_eNB->dlsch_eNB[(uint8_t)UE_id][0]->rb_alloc,
phy_vars_eNB->dlsch_eNB[(uint8_t)UE_id][0]->harq_processes[harq_pid]->nb_rb,
phy_vars_eNB->dlsch_eNB[(uint8_t)UE_id][0]->harq_processes[harq_pid]->rb_alloc,
get_Qm(phy_vars_eNB->dlsch_eNB[(uint8_t)UE_id][0]->harq_processes[harq_pid]->mcs),
phy_vars_eNB->dlsch_eNB[(uint8_t)UE_id][0]->harq_processes[harq_pid]->Nl,
num_pdcch_symbols,phy_vars_eNB->proc[sched_subframe].frame_tx,subframe),
phy_vars_eNB->dlsch_eNB[(uint8_t)UE_id][0]->nb_rb,
phy_vars_eNB->dlsch_eNB[(uint8_t)UE_id][0]->harq_processes[harq_pid]->nb_rb,
phy_vars_eNB->dlsch_eNB[(uint8_t)UE_id][0]->harq_processes[harq_pid]->mcs,
pmi2hex_2Ar1(phy_vars_eNB->dlsch_eNB[(uint8_t)UE_id][0]->pmi_alloc),
pmi2hex_2Ar1(phy_vars_eNB->dlsch_eNB[(uint8_t)UE_id][0]->harq_processes[harq_pid]->pmi_alloc),
phy_vars_eNB->dlsch_eNB[(uint8_t)UE_id][0]->harq_processes[harq_pid]->rvidx,
phy_vars_eNB->dlsch_eNB[(uint8_t)UE_id][0]->harq_processes[harq_pid]->round);
#endif
@@ -2042,8 +2044,8 @@ void phy_procedures_eNB_TX(unsigned char sched_subframe,PHY_VARS_eNB *phy_vars_e
0,
phy_vars_eNB->dlsch_eNB[(uint8_t)UE_id][0],
get_G(&phy_vars_eNB->lte_frame_parms,
phy_vars_eNB->dlsch_eNB[(uint8_t)UE_id][0]->nb_rb,
phy_vars_eNB->dlsch_eNB[(uint8_t)UE_id][0]->rb_alloc,
phy_vars_eNB->dlsch_eNB[(uint8_t)UE_id][0]->harq_processes[harq_pid]->nb_rb,
phy_vars_eNB->dlsch_eNB[(uint8_t)UE_id][0]->harq_processes[harq_pid]->rb_alloc,
get_Qm(phy_vars_eNB->dlsch_eNB[(uint8_t)UE_id][0]->harq_processes[harq_pid]->mcs),
phy_vars_eNB->dlsch_eNB[(uint8_t)UE_id][0]->harq_processes[harq_pid]->Nl,
num_pdcch_symbols,phy_vars_eNB->proc[sched_subframe].frame_tx,subframe),
@@ -2066,7 +2068,8 @@ void phy_procedures_eNB_TX(unsigned char sched_subframe,PHY_VARS_eNB *phy_vars_e
subframe,
&phy_vars_eNB->lte_frame_parms,
num_pdcch_symbols,
phy_vars_eNB->dlsch_eNB[(uint8_t)UE_id][0]);
phy_vars_eNB->dlsch_eNB[(uint8_t)UE_id][0],
phy_vars_eNB->dlsch_eNB[(uint8_t)UE_id][1]);
stop_meas(&phy_vars_eNB->dlsch_modulation_stats);
}
+16 -13
View File
@@ -163,11 +163,11 @@ void dump_dlsch(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t subframe,uint8_t
write_output("dlsch11_ch0_ext.m","dl11_ch0_ext",lte_ue_pdsch_vars[0]->dl_ch_estimates_ext[3],300*12,1,1);
write_output("dlsch_rho.m","dl_rho",lte_ue_pdsch_vars[0]->rho[0],300*12,1,1);
*/
write_output("dlsch_rxF_comp0.m","dlsch0_rxF_comp0", phy_vars_ue->lte_ue_pdsch_vars[0]->rxdataF_comp[0],300*12,1,1);
write_output("dlsch_rxF_comp0.m","dlsch0_rxF_comp0", phy_vars_ue->lte_ue_pdsch_vars[0]->rxdataF_comp0[0],300*12,1,1);
write_output("dlsch_rxF_llr.m","dlsch_llr", phy_vars_ue->lte_ue_pdsch_vars[0]->llr[0],coded_bits_per_codeword,1,0);
write_output("dlsch_mag1.m","dlschmag1",phy_vars_ue->lte_ue_pdsch_vars[0]->dl_ch_mag,300*12,1,1);
write_output("dlsch_mag2.m","dlschmag2",phy_vars_ue->lte_ue_pdsch_vars[0]->dl_ch_magb,300*12,1,1);
write_output("dlsch_mag1.m","dlschmag1",phy_vars_ue->lte_ue_pdsch_vars[0]->dl_ch_mag0,300*12,1,1);
write_output("dlsch_mag2.m","dlschmag2",phy_vars_ue->lte_ue_pdsch_vars[0]->dl_ch_magb0,300*12,1,1);
}
void dump_dlsch_SI(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t subframe) {
@@ -198,11 +198,11 @@ void dump_dlsch_SI(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t subframe) {
write_output("dlsch11_ch0_ext.m","dl11_ch0_ext",lte_ue_pdsch_vars[0]->dl_ch_estimates_ext[3],300*12,1,1);
write_output("dlsch_rho.m","dl_rho",lte_ue_pdsch_vars[0]->rho[0],300*12,1,1);
*/
write_output("dlsch_rxF_comp0.m","dlsch0_rxF_comp0", phy_vars_ue->lte_ue_pdsch_vars_SI[0]->rxdataF_comp[0],300*nsymb,1,1);
write_output("dlsch_rxF_comp0.m","dlsch0_rxF_comp0", phy_vars_ue->lte_ue_pdsch_vars_SI[0]->rxdataF_comp0[0],300*nsymb,1,1);
write_output("dlsch_rxF_llr.m","dlsch_llr", phy_vars_ue->lte_ue_pdsch_vars_SI[0]->llr[0],coded_bits_per_codeword,1,0);
write_output("dlsch_mag1.m","dlschmag1",phy_vars_ue->lte_ue_pdsch_vars_SI[0]->dl_ch_mag,300*nsymb,1,1);
write_output("dlsch_mag2.m","dlschmag2",phy_vars_ue->lte_ue_pdsch_vars_SI[0]->dl_ch_magb,300*nsymb,1,1);
write_output("dlsch_mag1.m","dlschmag1",phy_vars_ue->lte_ue_pdsch_vars_SI[0]->dl_ch_mag0,300*nsymb,1,1);
write_output("dlsch_mag2.m","dlschmag2",phy_vars_ue->lte_ue_pdsch_vars_SI[0]->dl_ch_magb0,300*nsymb,1,1);
exit(-1);
}
@@ -251,11 +251,11 @@ void dump_dlsch_ra(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t subframe) {
write_output("dlsch11_ch0_ext.m","dl11_ch0_ext",lte_ue_pdsch_vars[0]->dl_ch_estimates_ext[3],300*12,1,1);
write_output("dlsch_rho.m","dl_rho",lte_ue_pdsch_vars[0]->rho[0],300*12,1,1);
*/
write_output("dlsch_rxF_comp0.m","dlsch0_rxF_comp0", phy_vars_ue->lte_ue_pdsch_vars_ra[0]->rxdataF_comp[0],300*nsymb,1,1);
write_output("dlsch_rxF_comp0.m","dlsch0_rxF_comp0", phy_vars_ue->lte_ue_pdsch_vars_ra[0]->rxdataF_comp0[0],300*nsymb,1,1);
write_output("dlsch_rxF_llr.m","dlsch_llr", phy_vars_ue->lte_ue_pdsch_vars_ra[0]->llr[0],coded_bits_per_codeword,1,0);
write_output("dlsch_mag1.m","dlschmag1",phy_vars_ue->lte_ue_pdsch_vars_ra[0]->dl_ch_mag,300*nsymb,1,1);
write_output("dlsch_mag2.m","dlschmag2",phy_vars_ue->lte_ue_pdsch_vars_ra[0]->dl_ch_magb,300*nsymb,1,1);
write_output("dlsch_mag1.m","dlschmag1",phy_vars_ue->lte_ue_pdsch_vars_ra[0]->dl_ch_mag0,300*nsymb,1,1);
write_output("dlsch_mag2.m","dlschmag2",phy_vars_ue->lte_ue_pdsch_vars_ra[0]->dl_ch_magb0,300*nsymb,1,1);
}
#endif
@@ -1187,7 +1187,7 @@ void phy_procedures_UE_TX(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t abstra
#endif //else EXMIMO
start_meas(&phy_vars_ue->ofdm_mod_stats);
for (aa=0; aa<1/*frame_parms->nb_antennas_tx*/; aa++) {
for (aa=0; aa<frame_parms->nb_antennas_tx; aa++) {
if (frame_parms->Ncp == 1)
PHY_ofdm_mod(&phy_vars_ue->lte_ue_common_vars.txdataF[aa][subframe_tx*nsymb*frame_parms->ofdm_symbol_size],
#ifdef EXMIMO
@@ -1711,6 +1711,7 @@ void lte_ue_pbch_procedures(uint8_t eNB_id,PHY_VARS_UE *phy_vars_ue,uint8_t abst
&phy_vars_ue->lte_frame_parms,
eNB_id,
phy_vars_ue->lte_frame_parms.mode1_flag==1?SISO:ALAMOUTI,
phy_vars_ue->high_speed_flag,
pbch_phase);
@@ -1893,6 +1894,7 @@ int lte_ue_pdcch_procedures(uint8_t eNB_id,PHY_VARS_UE *phy_vars_ue,uint8_t abst
subframe_rx,
eNB_id,
(phy_vars_ue->lte_frame_parms.mode1_flag == 1) ? SISO : ALAMOUTI,
phy_vars_ue->high_speed_flag,
phy_vars_ue->is_secondary_ue);
vcd_signal_dumper_dump_function_by_name(VCD_SIGNAL_DUMPER_FUNCTIONS_RX_PDCCH, VCD_FUNCTION_OUT);
vcd_signal_dumper_dump_function_by_name(VCD_SIGNAL_DUMPER_FUNCTIONS_DCI_DECODING, VCD_FUNCTION_IN);
@@ -2056,8 +2058,8 @@ int lte_ue_pdcch_procedures(uint8_t eNB_id,PHY_VARS_UE *phy_vars_ue,uint8_t abst
return(-1);
}
#endif
// dump_dci(&phy_vars_ue->lte_frame_parms, &dci_alloc_rx[i]);
if (generate_ue_dlsch_params_from_dci(subframe_rx,
(void *)&dci_alloc_rx[i].dci_pdu,
phy_vars_ue->lte_ue_pdcch_vars[eNB_id]->crnti,
@@ -2558,7 +2560,8 @@ int lte_ue_pdcch_procedures(uint8_t eNB_id,PHY_VARS_UE *phy_vars_ue,uint8_t abst
phy_vars_ue->dlsch_ue[eNB_id][0]->harq_processes[harq_pid]->mcs);
// if (abstraction_flag ==0 )
// dump_dlsch(phy_vars_ue,eNB_id,subframe_prev,harq_pid);
//dump_dlsch(phy_vars_ue,eNB_id,subframe_prev,harq_pid);
//mac_xface->macphy_exit("");
#endif
}
else {
File diff suppressed because it is too large Load Diff
+2
View File
@@ -991,6 +991,7 @@ int main(int argc, char **argv) {
&PHY_vars_UE->lte_frame_parms,
0,
SISO,
PHY_vars_UE->high_speed_flag,
frame_mod4);
if ((pbch_tx_ant>0) && (pbch_tx_ant<4)) {
PHY_vars_UE->lte_frame_parms.mode1_flag = 1;
@@ -1004,6 +1005,7 @@ int main(int argc, char **argv) {
&PHY_vars_eNb->lte_frame_parms,
0,
ALAMOUTI,
PHY_vars_UE->high_speed_flag,
frame_mod4);
if ((pbch_tx_ant>0) && (pbch_tx_ant<4)) {
PHY_vars_UE->lte_frame_parms.mode1_flag = 0;