Merge remote-tracking branch 'origin/nr-dmrs-fixes' into integration_2021_wk19

This commit is contained in:
hardy
2021-05-10 21:41:44 +02:00
23 changed files with 572 additions and 412 deletions
+18 -14
View File
@@ -1099,8 +1099,9 @@
(Test14: 3 PTRS, 8 Interpolated Symbols),
(Test15: 6 PTRS, 5 Interpolated Symbols),
(Test16: 11 PTRS, 0 Interpolated Symbols),
(Test17: 2 DMRS Symbols),
(Test18: 3 DMRS Symbols)</desc>
(Test17: Mapping type A, 2 DMRS Symbols),
(Test18: Mapping type A, 3 DMRS Symbols),
(Test19: Mapping type B, 4 DMRS Symbols)</desc>
<pre_compile_prog></pre_compile_prog>
<compile_prog>$OPENAIR_DIR/cmake_targets/build_oai</compile_prog>
<compile_prog_args> --phy_simulators -c </compile_prog_args>
@@ -1124,8 +1125,9 @@
-n100 -s5 -T 2 1 2
-n100 -s5 -T 2 0 4
-n100 -s2 -U 2 0 1
-n100 -s2 -U 2 0 2</main_exec_args>
<tags>nr_dlsim.test1 nr_dlsim.test2 nr_dlsim.test3 nr_dlsim.test4 nr_dlsim.test5 nr_dlsim.test6 nr_dlsim.test7 nr_dlsim.test8 nr_dlsim.test9 nr_dlsim.test10 nr_dlsim.test11 nr_dlsim.test12 nr_dlsim.test13 nr_dlsim.test14 nr_dlsim.test15 nr_dlsim.test16 nr_dlsim.test17 nr_dlsim.test18</tags>
-n100 -s2 -U 2 0 2
-n100 -s2 -U 2 1 3</main_exec_args>
<tags>nr_dlsim.test1 nr_dlsim.test2 nr_dlsim.test3 nr_dlsim.test4 nr_dlsim.test5 nr_dlsim.test6 nr_dlsim.test7 nr_dlsim.test8 nr_dlsim.test9 nr_dlsim.test10 nr_dlsim.test11 nr_dlsim.test12 nr_dlsim.test13 nr_dlsim.test14 nr_dlsim.test15 nr_dlsim.test16 nr_dlsim.test17 nr_dlsim.test18 nr_dlsim.test19</tags>
<search_expr_true>PDSCH test OK</search_expr_true>
<search_expr_false>segmentation fault|assertion|exiting|fatal</search_expr_false>
<nruns>3</nruns>
@@ -1287,15 +1289,16 @@
(Test3: MCS 28 50 PRBs),
(Test4: MCS 9 217 PRBs),
(Test5: MCS 9 273 PRBs),
(Test6: DMRS Type A, 3 DMRS, 4 PTRS, 5 Interpolated Symbols),
(Test7: DMRS Type B, 3 DMRS, 2 PTRS, 7 Interpolated Symbols),
(Test8: DMRS Type B, 3 DMRS, 2 PTRS, 3 Interpolated Symbols),
(Test9: SC-FDMA, 50 PRBs),
(Test10: SC-FDMA, 75 PRBs),
(Test11: SC-FDMA, 216 PRBs),
(Test12: SC-FDMA, 273 PRBs),
(Test13: SC-FDMA, 3 DMRS),
(Test14: MCS 16 50 PRBs 2 RX_Antenna)</desc>
(Test6: DMRS Type A, 2 DMRS Symbols),
(Test7: DMRS Type A, 3 DMRS, 4 PTRS, 5 Interpolated Symbols),
(Test8: DMRS Type B, 3 DMRS, 2 PTRS, 7 Interpolated Symbols),
(Test9: DMRS Type B, 3 DMRS, 2 PTRS, 3 Interpolated Symbols),
(Test10: SC-FDMA, 50 PRBs),
(Test11: SC-FDMA, 75 PRBs),
(Test12: SC-FDMA, 216 PRBs),
(Test13: SC-FDMA, 273 PRBs),
(Test14: SC-FDMA, 3 DMRS),
(Test15: MCS 16 50 PRBs 2 RX_Antenna)</desc>
<pre_compile_prog></pre_compile_prog>
<compile_prog>$OPENAIR_DIR/cmake_targets/build_oai</compile_prog>
<compile_prog_args> --phy_simulators -c </compile_prog_args>
@@ -1307,6 +1310,7 @@
-n100 -m28 -s20
-n100 -m9 -R217 -r217 -s5
-n100 -m9 -R273 -r273 -s5
-n100 -s5 -U 2 0 1
-n100 -s5 -T 2 1 2 -U 2 0 2
-n100 -s5 -T 2 2 2 -U 2 1 2
-n100 -s5 -a4 -b8 -T 2 1 2 -U 2 1 3
@@ -1317,7 +1321,7 @@
-n100 -s2 -Z -U 2 0 2
-n100 -m16 -s10 -z2</main_exec_args>
<tags>nr_ulsim.test1 nr_ulsim.test2 nr_ulsim.test3 nr_ulsim.test4 nr_ulsim.test5 nr_ulsim.test6 nr_ulsim.test7 nr_ulsim.test8 nr_ulsim.test9 nr_ulsim.test10 nr_ulsim.test11 nr_ulsim.test12 nr_ulsim.test13 nr_ulsim.test14</tags>
<tags>nr_ulsim.test1 nr_ulsim.test2 nr_ulsim.test3 nr_ulsim.test4 nr_ulsim.test5 nr_ulsim.test6 nr_ulsim.test7 nr_ulsim.test8 nr_ulsim.test9 nr_ulsim.test10 nr_ulsim.test11 nr_ulsim.test12 nr_ulsim.test13 nr_ulsim.test14 nr_ulsim.test15</tags>
<search_expr_true>PUSCH test OK</search_expr_true>
<search_expr_false>segmentation fault|assertion|exiting|fatal</search_expr_false>
<nruns>3</nruns>
@@ -40,9 +40,9 @@
#include "assertions.h"
int8_t polar_decoder(double *input,
uint32_t *out,
t_nrPolar_params *polarParams,
uint8_t listSize)
uint32_t *out,
const t_nrPolar_params *polarParams,
uint8_t listSize)
{
//Assumes no a priori knowledge.
uint8_t ***bit = nr_alloc_uint8_3D_array(polarParams->N, (polarParams->n+1), 2*listSize);
@@ -299,7 +299,7 @@ int8_t polar_decoder(double *input,
int8_t polar_decoder_dci(double *input,
uint32_t *out,
t_nrPolar_params *polarParams,
const t_nrPolar_params *polarParams,
uint8_t listSize,
uint16_t n_RNTI) {
uint8_t ***bit = nr_alloc_uint8_3D_array(polarParams->N, (polarParams->n+1), 2*listSize);
@@ -138,22 +138,22 @@ typedef struct nrPolar_params t_nrPolar_params;
void polar_encoder(uint32_t *input,
uint32_t *output,
t_nrPolar_params *polarParams);
const t_nrPolar_params *polarParams);
void polar_encoder_dci(uint32_t *in,
uint32_t *out,
t_nrPolar_params *polarParams,
const t_nrPolar_params *polarParams,
uint16_t n_RNTI);
void polar_encoder_fast(uint64_t *A,
void *out,
int32_t crcmask,
uint8_t ones_flag,
t_nrPolar_params *polarParams);
const t_nrPolar_params *polarParams);
int8_t polar_decoder(double *input,
uint32_t *output,
t_nrPolar_params *polarParams,
uint32_t *output,
const t_nrPolar_params *polarParams,
uint8_t listSize);
uint32_t polar_decoder_int16(int16_t *input,
@@ -163,21 +163,21 @@ uint32_t polar_decoder_int16(int16_t *input,
int8_t polar_decoder_dci(double *input,
uint32_t *out,
t_nrPolar_params *polarParams,
const t_nrPolar_params *polarParams,
uint8_t listSize,
uint16_t n_RNTI);
void generic_polar_decoder(const t_nrPolar_params *pp,
decoder_node_t *node);
decoder_node_t *node);
void applyFtoleft(const t_nrPolar_params *pp,
decoder_node_t *node);
decoder_node_t *node);
void applyGtoright(const t_nrPolar_params *pp,
decoder_node_t *node);
decoder_node_t *node);
void computeBeta(const t_nrPolar_params *pp,
decoder_node_t *node);
decoder_node_t *node);
void build_decoder_tree(t_nrPolar_params *pp);
void build_polar_tables(t_nrPolar_params *polarParams);
@@ -43,7 +43,7 @@
void polar_encoder(uint32_t *in,
uint32_t *out,
t_nrPolar_params *polarParams) {
const t_nrPolar_params *polarParams) {
if (1) {//polarParams->idx == 0 || polarParams->idx == 1) { //PBCH or PDCCH
/*
uint64_t B = (((uint64_t)*in)&((((uint64_t)1)<<32)-1)) | (((uint64_t)crc24c((uint8_t*)in,polarParams->payloadBits)>>8)<<polarParams->payloadBits);
@@ -154,7 +154,7 @@ void polar_encoder(uint32_t *in,
void polar_encoder_dci(uint32_t *in,
uint32_t *out,
t_nrPolar_params *polarParams,
const t_nrPolar_params *polarParams,
uint16_t n_RNTI) {
#ifdef DEBUG_POLAR_ENCODER_DCI
printf("[polar_encoder_dci] in: [0]->0x%08x \t [1]->0x%08x \t [2]->0x%08x \t [3]->0x%08x\n", in[0], in[1], in[2], in[3]);
@@ -251,9 +251,9 @@ void polar_encoder_dci(uint32_t *in,
#endif
}
static inline void polar_rate_matching(t_nrPolar_params *polarParams,void *in,void *out) __attribute__((always_inline));
static inline void polar_rate_matching(const t_nrPolar_params *polarParams,void *in,void *out) __attribute__((always_inline));
static inline void polar_rate_matching(t_nrPolar_params *polarParams,void *in,void *out) {
static inline void polar_rate_matching(const t_nrPolar_params *polarParams,void *in,void *out) {
// handle rate matching with a single 128 bit word using bit shuffling
// can be done with SIMD intrisics if needed
@@ -411,7 +411,7 @@ void polar_encoder_fast(uint64_t *A,
void *out,
int32_t crcmask,
uint8_t ones_flag,
t_nrPolar_params *polarParams) {
const t_nrPolar_params *polarParams) {
// AssertFatal(polarParams->K > 32, "K = %d < 33, is not supported yet\n",polarParams->K);
AssertFatal(polarParams->K < 129, "K = %d > 128, is not supported yet\n",polarParams->K);
AssertFatal(polarParams->payloadBits < 65, "payload bits = %d > 64, is not supported yet\n",polarParams->payloadBits);
+18 -21
View File
@@ -159,7 +159,7 @@ uint8_t nr_generate_pdsch(PHY_VARS_gNB *gNB,
uint16_t nb_re = ((12*rel15->NrOfSymbols)-nb_re_dmrs*dmrs_len-xOverhead)*rel15->rbSize*rel15->nrOfLayers;
uint8_t Qm = rel15->qamModOrder[0];
uint32_t encoded_length = nb_re*Qm;
int16_t mod_dmrs[14][n_dmrs<<1] __attribute__ ((aligned(16)));
int16_t mod_dmrs[n_dmrs<<1] __attribute__ ((aligned(16)));
/* PTRS */
uint16_t beta_ptrs = 1;
@@ -264,24 +264,6 @@ uint8_t nr_generate_pdsch(PHY_VARS_gNB *gNB,
printf("\n");
}
#endif
/// DMRS QPSK modulation
// TODO: performance improvement, we can skip the modulation of DMRS symbols outside the bandwidth part
for (int l=rel15->StartSymbolIndex; l<rel15->StartSymbolIndex+rel15->NrOfSymbols; l++) {
if (rel15->dlDmrsSymbPos & (1 << l)) {
nr_modulation(pdsch_dmrs[l][0], n_dmrs*2, DMRS_MOD_ORDER, mod_dmrs[l]); // currently only codeword 0 is modulated. Qm = 2 as DMRS is QPSK modulated
#ifdef DEBUG_DLSCH
printf("DMRS modulation (symbol %d, %d symbols, type %d):\n", l, n_dmrs, dmrs_Type);
for (int i=0; i<n_dmrs>>4; i++) {
for (int j=0; j<8; j++) {
printf("%d %d\t", mod_dmrs[l][((i<<3)+j)<<1], mod_dmrs[l][(((i<<3)+j)<<1)+1]);
}
printf("\n");
}
#endif
}
}
/// Resource mapping
@@ -349,6 +331,21 @@ uint8_t nr_generate_pdsch(PHY_VARS_gNB *gNB,
}
}
/// DMRS QPSK modulation
if (rel15->dlDmrsSymbPos & (1 << l)) {
nr_modulation(pdsch_dmrs[l][0], n_dmrs*2, DMRS_MOD_ORDER, mod_dmrs); // currently only codeword 0 is modulated. Qm = 2 as DMRS is QPSK modulated
#ifdef DEBUG_DLSCH
printf("DMRS modulation (symbol %d, %d symbols, type %d):\n", l, n_dmrs, dmrs_Type);
for (int i=0; i<n_dmrs>>4; i++) {
for (int j=0; j<8; j++) {
printf("%d %d\t", mod_dmrs[((i<<3)+j)<<1], mod_dmrs[(((i<<3)+j)<<1)+1]);
}
printf("\n");
}
#endif
}
/* calculate if current symbol is PTRS symbols */
ptrs_idx = 0;
@@ -379,8 +376,8 @@ uint8_t nr_generate_pdsch(PHY_VARS_gNB *gNB,
/* Map DMRS Symbol */
if ( ( dmrs_symbol_map & (1 << l) ) && (k == ((start_sc+get_dmrs_freq_idx(n, k_prime, delta, dmrs_Type))%(frame_parms->ofdm_symbol_size)))) {
txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + k)<<1) + (2*txdataF_offset)] = (Wt[l_prime]*Wf[k_prime]*amp*mod_dmrs[l][dmrs_idx<<1]) >> 15;
txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + k)<<1) + 1 + (2*txdataF_offset)] = (Wt[l_prime]*Wf[k_prime]*amp*mod_dmrs[l][(dmrs_idx<<1) + 1]) >> 15;
txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + k)<<1) + (2*txdataF_offset)] = (Wt[l_prime]*Wf[k_prime]*amp*mod_dmrs[dmrs_idx<<1]) >> 15;
txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + k)<<1) + 1 + (2*txdataF_offset)] = (Wt[l_prime]*Wf[k_prime]*amp*mod_dmrs[(dmrs_idx<<1) + 1]) >> 15;
#ifdef DEBUG_DLSCH_MAPPING
printf("dmrs_idx %d\t l %d \t k %d \t k_prime %d \t n %d \t txdataF: %d %d\n",
dmrs_idx, l, k, k_prime, n, txdataF_precoding[ap][((l*frame_parms->ofdm_symbol_size + k)<<1) + (2*txdataF_offset)],
@@ -133,15 +133,13 @@ NR_gNB_DLSCH_t *new_gNB_dlsch(NR_DL_FRAME_PARMS *frame_parms,
@param ue Pointer to PHY variables
@param UE_id id of current UE
@param frame Frame number
@param nr_tti_rx TTI number
@param symbol Symbol on which to act (within-in nr_TTI_rx)
@param slot Slot number
@param harq_pid HARQ process ID
*/
int nr_rx_pusch(PHY_VARS_gNB *gNB,
uint8_t UE_id,
uint32_t frame,
uint8_t nr_tti_rx,
unsigned char symbol,
uint8_t slot,
unsigned char harq_pid);
/** \brief This function performs RB extraction (signal and channel estimates) (currently signal only until channel estimation and compensation are implemented)
+158 -167
View File
@@ -12,6 +12,8 @@
//#define DEBUG_RB_EXT
//#define DEBUG_CH_MAG
#define INVALID_VALUE 255
void nr_idft(int32_t *z, uint32_t Msc_PUSCH)
{
@@ -1157,12 +1159,11 @@ void nr_ulsch_detection_mrc(NR_DL_FRAME_PARMS *frame_parms,
int nr_rx_pusch(PHY_VARS_gNB *gNB,
uint8_t ulsch_id,
uint32_t frame,
uint8_t nr_tti_rx,
unsigned char symbol,
uint8_t slot,
unsigned char harq_pid)
{
uint8_t aarx, aatx, dmrs_symbol_flag; // dmrs_symbol_flag, a flag to indicate DMRS REs in current symbol
uint8_t aarx, aatx;
uint32_t nb_re_pusch, bwp_start_subcarrier;
int avgs;
int avg[4];
@@ -1170,204 +1171,194 @@ int nr_rx_pusch(PHY_VARS_gNB *gNB,
NR_DL_FRAME_PARMS *frame_parms = &gNB->frame_parms;
nfapi_nr_pusch_pdu_t *rel15_ul = &gNB->ulsch[ulsch_id][0]->harq_processes[harq_pid]->ulsch_pdu;
dmrs_symbol_flag = 0;
if(symbol == rel15_ul->start_symbol_index){
gNB->pusch_vars[ulsch_id]->dmrs_symbol = 0;
gNB->pusch_vars[ulsch_id]->cl_done = 0;
}
gNB->pusch_vars[ulsch_id]->dmrs_symbol = INVALID_VALUE;
gNB->pusch_vars[ulsch_id]->cl_done = 0;
bwp_start_subcarrier = ((rel15_ul->rb_start + rel15_ul->bwp_start)*NR_NB_SC_PER_RB + frame_parms->first_carrier_offset) % frame_parms->ofdm_symbol_size;
dmrs_symbol_flag = ((rel15_ul->ul_dmrs_symb_pos)>>symbol)&0x01;
LOG_D(PHY,"symbol %d bwp_start_subcarrier %d, rb_start %d, first_carrier_offset %d\n",symbol,bwp_start_subcarrier,rel15_ul->rb_start,frame_parms->first_carrier_offset);
LOG_D(PHY,"bwp_start_subcarrier %d, rb_start %d, first_carrier_offset %d\n", bwp_start_subcarrier, rel15_ul->rb_start, frame_parms->first_carrier_offset);
LOG_D(PHY,"ul_dmrs_symb_pos %x\n",rel15_ul->ul_dmrs_symb_pos);
if (dmrs_symbol_flag == 1){
if (((rel15_ul->ul_dmrs_symb_pos)>>((symbol+1)%frame_parms->symbols_per_slot))&0x01)
AssertFatal(1==0,"Double DMRS configuration is not yet supported\n");
if (rel15_ul->dmrs_config_type == 0) {
// if no data in dmrs cdm group is 1 only even REs have no data
// if no data in dmrs cdm group is 2 both odd and even REs have no data
nb_re_pusch = rel15_ul->rb_size *(12 - (rel15_ul->num_dmrs_cdm_grps_no_data*6));
}
else {
nb_re_pusch = rel15_ul->rb_size *(12 - (rel15_ul->num_dmrs_cdm_grps_no_data*4));
}
LOG_D(PHY,"dmrs_symbol: nb_re_pusch %d\n",nb_re_pusch);
gNB->pusch_vars[ulsch_id]->dmrs_symbol = symbol;
} else {
nb_re_pusch = rel15_ul->rb_size * NR_NB_SC_PER_RB;
}
//----------------------------------------------------------
//--------------------- Channel estimation ---------------------
//----------------------------------------------------------
start_meas(&gNB->ulsch_channel_estimation_stats);
if (dmrs_symbol_flag == 1) {
nr_pusch_channel_estimation(gNB,
nr_tti_rx,
0, // p
symbol,
ulsch_id,
bwp_start_subcarrier,
rel15_ul);
for(uint8_t symbol = rel15_ul->start_symbol_index; symbol < (rel15_ul->start_symbol_index + rel15_ul->nr_of_symbols); symbol++) {
uint8_t dmrs_symbol_flag = (rel15_ul->ul_dmrs_symb_pos >> symbol) & 0x01;
LOG_D(PHY,"symbol %d, dmrs_symbol_flag :%d\n", symbol, dmrs_symbol_flag);
if (dmrs_symbol_flag == 1) {
if (gNB->pusch_vars[ulsch_id]->dmrs_symbol == INVALID_VALUE)
gNB->pusch_vars[ulsch_id]->dmrs_symbol = symbol;
nr_gnb_measurements(gNB, ulsch_id, harq_pid, symbol);
nr_pusch_channel_estimation(gNB,
slot,
0, // p
symbol,
ulsch_id,
bwp_start_subcarrier,
rel15_ul);
for (aarx = 0; aarx < frame_parms->nb_antennas_rx; aarx++) {
gNB->pusch_vars[ulsch_id]->ulsch_power[aarx] = signal_energy_nodc(&gNB->pusch_vars[ulsch_id]->ul_ch_estimates[aarx][symbol*frame_parms->ofdm_symbol_size],
rel15_ul->rb_size*12);
if (gNB->pusch_vars[ulsch_id]->ulsch_power[aarx]==1) return (1);
nr_gnb_measurements(gNB, ulsch_id, harq_pid, symbol);
for (aarx = 0; aarx < frame_parms->nb_antennas_rx; aarx++) {
gNB->pusch_vars[ulsch_id]->ulsch_power[aarx] = signal_energy_nodc(&gNB->pusch_vars[ulsch_id]->ul_ch_estimates[aarx][symbol*frame_parms->ofdm_symbol_size],
rel15_ul->rb_size*12);
if (gNB->pusch_vars[ulsch_id]->ulsch_power[aarx] == 1)
return 1;
}
}
}
stop_meas(&gNB->ulsch_channel_estimation_stats);
//----------------------------------------------------------
//--------------------- RBs extraction ---------------------
//----------------------------------------------------------
gNB->pusch_vars[ulsch_id]->ul_valid_re_per_slot[symbol] = nb_re_pusch;
#ifdef __AVX2__
int off = ((rel15_ul->rb_size&1) == 1)? 4:0;
#else
int off = 0;
#endif
uint32_t rxdataF_ext_offset = 0;
if (nb_re_pusch > 0) {
for(uint8_t symbol = rel15_ul->start_symbol_index; symbol < (rel15_ul->start_symbol_index + rel15_ul->nr_of_symbols); symbol++) {
uint8_t dmrs_symbol_flag = (rel15_ul->ul_dmrs_symb_pos >> symbol) & 0x01;
if (dmrs_symbol_flag == 1) {
if ((rel15_ul->ul_dmrs_symb_pos >> ((symbol + 1) % frame_parms->symbols_per_slot)) & 0x01)
AssertFatal(1==0,"Double DMRS configuration is not yet supported\n");
start_meas(&gNB->ulsch_rbs_extraction_stats);
nr_ulsch_extract_rbs_single(gNB->common_vars.rxdataF,
gNB->pusch_vars[ulsch_id],
symbol,
dmrs_symbol_flag,
rel15_ul,
frame_parms);
stop_meas(&gNB->ulsch_rbs_extraction_stats);
gNB->pusch_vars[ulsch_id]->dmrs_symbol = symbol;
//----------------------------------------------------------
//--------------------- Channel Scaling --------------------
//----------------------------------------------------------
nr_ulsch_scale_channel(gNB->pusch_vars[ulsch_id]->ul_ch_estimates_ext,
frame_parms,
gNB->ulsch[ulsch_id],
symbol,
dmrs_symbol_flag,
rel15_ul->rb_size,
rel15_ul->dmrs_config_type);
if (gNB->pusch_vars[ulsch_id]->cl_done==0) {
nr_ulsch_channel_level(gNB->pusch_vars[ulsch_id]->ul_ch_estimates_ext,
frame_parms,
avg,
symbol,
nb_re_pusch,
rel15_ul->rb_size);
avgs = 0;
for (aatx=0;aatx<nb_antennas_ue_tx;aatx++)
for (aarx=0;aarx<frame_parms->nb_antennas_rx;aarx++)
avgs = cmax(avgs,avg[(aatx<<1)+aarx]);
gNB->pusch_vars[ulsch_id]->log2_maxh = (log2_approx(avgs)/2)+3;
gNB->pusch_vars[ulsch_id]->cl_done = 1;
if (rel15_ul->dmrs_config_type == 0) {
// if no data in dmrs cdm group is 1 only even REs have no data
// if no data in dmrs cdm group is 2 both odd and even REs have no data
nb_re_pusch = rel15_ul->rb_size *(12 - (rel15_ul->num_dmrs_cdm_grps_no_data*6));
}
else {
nb_re_pusch = rel15_ul->rb_size *(12 - (rel15_ul->num_dmrs_cdm_grps_no_data*4));
}
} else {
nb_re_pusch = rel15_ul->rb_size * NR_NB_SC_PER_RB;
}
//----------------------------------------------------------
//--------------------- Channel Compensation ---------------
//----------------------------------------------------------
gNB->pusch_vars[ulsch_id]->ul_valid_re_per_slot[symbol] = nb_re_pusch;
LOG_D(PHY,"symbol %d: nb_re_pusch %d, DMRS symbl used for Chest :%d \n", symbol, nb_re_pusch, gNB->pusch_vars[ulsch_id]->dmrs_symbol);
start_meas(&gNB->ulsch_channel_compensation_stats);
nr_ulsch_channel_compensation(gNB->pusch_vars[ulsch_id]->rxdataF_ext,
gNB->pusch_vars[ulsch_id]->ul_ch_estimates_ext,
gNB->pusch_vars[ulsch_id]->ul_ch_mag0,
gNB->pusch_vars[ulsch_id]->ul_ch_magb0,
gNB->pusch_vars[ulsch_id]->rxdataF_comp,
(nb_antennas_ue_tx>1) ? gNB->pusch_vars[ulsch_id]->rho : NULL,
frame_parms,
//----------------------------------------------------------
//--------------------- RBs extraction ---------------------
//----------------------------------------------------------
if (nb_re_pusch > 0) {
start_meas(&gNB->ulsch_rbs_extraction_stats);
nr_ulsch_extract_rbs_single(gNB->common_vars.rxdataF,
gNB->pusch_vars[ulsch_id],
symbol,
dmrs_symbol_flag,
rel15_ul->qam_mod_order,
rel15_ul->rb_size,
gNB->pusch_vars[ulsch_id]->log2_maxh);
stop_meas(&gNB->ulsch_channel_compensation_stats);
rel15_ul,
frame_parms);
stop_meas(&gNB->ulsch_rbs_extraction_stats);
start_meas(&gNB->ulsch_mrc_stats);
nr_ulsch_detection_mrc(frame_parms,
gNB->pusch_vars[ulsch_id]->rxdataF_comp,
gNB->pusch_vars[ulsch_id]->ul_ch_mag,
gNB->pusch_vars[ulsch_id]->ul_ch_magb,
symbol,
rel15_ul->rb_size);
stop_meas(&gNB->ulsch_mrc_stats);
//----------------------------------------------------------
//--------------------- Channel Scaling --------------------
//----------------------------------------------------------
nr_ulsch_scale_channel(gNB->pusch_vars[ulsch_id]->ul_ch_estimates_ext,
frame_parms,
gNB->ulsch[ulsch_id],
symbol,
dmrs_symbol_flag,
rel15_ul->rb_size,
rel15_ul->dmrs_config_type);
if (gNB->pusch_vars[ulsch_id]->cl_done==0) {
nr_ulsch_channel_level(gNB->pusch_vars[ulsch_id]->ul_ch_estimates_ext,
frame_parms,
avg,
symbol,
nb_re_pusch,
rel15_ul->rb_size);
avgs = 0;
for (aatx=0;aatx<nb_antennas_ue_tx;aatx++)
for (aarx=0;aarx<frame_parms->nb_antennas_rx;aarx++)
avgs = cmax(avgs,avg[(aatx<<1)+aarx]);
gNB->pusch_vars[ulsch_id]->log2_maxh = (log2_approx(avgs)/2)+3;
gNB->pusch_vars[ulsch_id]->cl_done = 1;
}
//----------------------------------------------------------
//--------------------- Channel Compensation ---------------
//----------------------------------------------------------
start_meas(&gNB->ulsch_channel_compensation_stats);
nr_ulsch_channel_compensation(gNB->pusch_vars[ulsch_id]->rxdataF_ext,
gNB->pusch_vars[ulsch_id]->ul_ch_estimates_ext,
gNB->pusch_vars[ulsch_id]->ul_ch_mag0,
gNB->pusch_vars[ulsch_id]->ul_ch_magb0,
gNB->pusch_vars[ulsch_id]->rxdataF_comp,
(nb_antennas_ue_tx>1) ? gNB->pusch_vars[ulsch_id]->rho : NULL,
frame_parms,
symbol,
dmrs_symbol_flag,
rel15_ul->qam_mod_order,
rel15_ul->rb_size,
gNB->pusch_vars[ulsch_id]->log2_maxh);
stop_meas(&gNB->ulsch_channel_compensation_stats);
start_meas(&gNB->ulsch_mrc_stats);
nr_ulsch_detection_mrc(frame_parms,
gNB->pusch_vars[ulsch_id]->rxdataF_comp,
gNB->pusch_vars[ulsch_id]->ul_ch_mag,
gNB->pusch_vars[ulsch_id]->ul_ch_magb,
symbol,
rel15_ul->rb_size);
stop_meas(&gNB->ulsch_mrc_stats);
if (rel15_ul->transform_precoding == transform_precoder_enabled) {
if (rel15_ul->transform_precoding == transform_precoder_enabled) {
#ifdef __AVX2__
// For odd number of resource blocks need byte alignment to multiple of 8
int nb_re_pusch2 = nb_re_pusch + (nb_re_pusch&7);
#else
int nb_re_pusch2 = nb_re_pusch;
#endif
// perform IDFT operation on the compensated rxdata if transform precoding is enabled
nr_idft(&gNB->pusch_vars[ulsch_id]->rxdataF_comp[0][symbol * nb_re_pusch2], nb_re_pusch);
LOG_D(PHY,"Transform precoding being done on data- symbol: %d, nb_re_pusch: %d\n", symbol, nb_re_pusch);
}
#endif
// perform IDFT operation on the compensated rxdata if transform precoding is enabled
nr_idft(&gNB->pusch_vars[ulsch_id]->rxdataF_comp[0][symbol * nb_re_pusch2], nb_re_pusch);
LOG_D(PHY,"Transform precoding being done on data- symbol: %d, nb_re_pusch: %d\n", symbol, nb_re_pusch);
}
//----------------------------------------------------------
//--------------------- PTRS Processing --------------------
//----------------------------------------------------------
//----------------------------------------------------------
//--------------------- PTRS Processing --------------------
//----------------------------------------------------------
/* In case PTRS is enabled then LLR will be calculated after PTRS symbols are processed *
* otherwise LLR are calculated for each symbol based upon DMRS channel estimates only. */
if (rel15_ul->pdu_bit_map & PUSCH_PDU_BITMAP_PUSCH_PTRS) {
start_meas(&gNB->ulsch_ptrs_processing_stats);
nr_pusch_ptrs_processing(gNB,
frame_parms,
rel15_ul,
ulsch_id,
slot,
symbol,
nb_re_pusch);
stop_meas(&gNB->ulsch_ptrs_processing_stats);
/* In case PTRS is enabled then LLR will be calculated after PTRS symbols are processed *
* otherwise LLR are calculated for each symbol based upon DMRS channel estimates only. */
if (rel15_ul->pdu_bit_map & PUSCH_PDU_BITMAP_PUSCH_PTRS)
{
start_meas(&gNB->ulsch_ptrs_processing_stats);
nr_pusch_ptrs_processing(gNB,
frame_parms,
rel15_ul,
ulsch_id,
nr_tti_rx,
symbol,
nb_re_pusch);
stop_meas(&gNB->ulsch_ptrs_processing_stats);
/* Subtract total PTRS RE's in the symbol from PUSCH RE's */
gNB->pusch_vars[ulsch_id]->ul_valid_re_per_slot[symbol] -= gNB->pusch_vars[ulsch_id]->ptrs_re_per_slot;
}
/* Subtract total PTRS RE's in the symbol from PUSCH RE's */
gNB->pusch_vars[ulsch_id]->ul_valid_re_per_slot[symbol] -= gNB->pusch_vars[ulsch_id]->ptrs_re_per_slot;
}
}
/*---------------------------------------------------------------------------------------------------- */
/*-------------------- LLRs computation -------------------------------------------------------------*/
/*-----------------------------------------------------------------------------------------------------*/
if(symbol == (rel15_ul->start_symbol_index + rel15_ul->nr_of_symbols -1)) {
#ifdef __AVX2__
int off = ((rel15_ul->rb_size&1) == 1)? 4:0;
#else
int off = 0;
#endif
uint32_t rxdataF_ext_offset = 0;
for(uint8_t i =rel15_ul->start_symbol_index; i< (rel15_ul->start_symbol_index + rel15_ul->nr_of_symbols);i++) {
/*---------------------------------------------------------------------------------------------------- */
/*-------------------- LLRs computation -------------------------------------------------------------*/
/*-----------------------------------------------------------------------------------------------------*/
start_meas(&gNB->ulsch_llr_stats);
nr_ulsch_compute_llr(&gNB->pusch_vars[ulsch_id]->rxdataF_comp[0][i * (off + rel15_ul->rb_size * NR_NB_SC_PER_RB)],
gNB->pusch_vars[ulsch_id]->ul_ch_mag0,
gNB->pusch_vars[ulsch_id]->ul_ch_magb0,
&gNB->pusch_vars[ulsch_id]->llr[rxdataF_ext_offset * rel15_ul->qam_mod_order],
rel15_ul->rb_size,
gNB->pusch_vars[ulsch_id]->ul_valid_re_per_slot[i],
i,
rel15_ul->qam_mod_order);
nr_ulsch_compute_llr(&gNB->pusch_vars[ulsch_id]->rxdataF_comp[0][symbol * (off + rel15_ul->rb_size * NR_NB_SC_PER_RB)],
gNB->pusch_vars[ulsch_id]->ul_ch_mag0,
gNB->pusch_vars[ulsch_id]->ul_ch_magb0,
&gNB->pusch_vars[ulsch_id]->llr[rxdataF_ext_offset * rel15_ul->qam_mod_order],
rel15_ul->rb_size,
gNB->pusch_vars[ulsch_id]->ul_valid_re_per_slot[symbol],
symbol,
rel15_ul->qam_mod_order);
stop_meas(&gNB->ulsch_llr_stats);
rxdataF_ext_offset += gNB->pusch_vars[ulsch_id]->ul_valid_re_per_slot[i];
}// symbol loop
}// last symbol check
return (0);
rxdataF_ext_offset += gNB->pusch_vars[ulsch_id]->ul_valid_re_per_slot[symbol];
}
} // symbol loop
return 0;
}
+8 -12
View File
@@ -646,19 +646,15 @@ void phy_procedures_gNB_uespec_RX(PHY_VARS_gNB *gNB, int frame_rx, int slot_rx)
pusch_decode_done = 1;
uint8_t symbol_start = ulsch_harq->ulsch_pdu.start_symbol_index;
uint8_t symbol_end = symbol_start + ulsch_harq->ulsch_pdu.nr_of_symbols;
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_NR_RX_PUSCH,1);
start_meas(&gNB->rx_pusch_stats);
for(uint8_t symbol = symbol_start; symbol < symbol_end; symbol++) {
no_sig = nr_rx_pusch(gNB, ULSCH_id, frame_rx, slot_rx, symbol, harq_pid);
if (no_sig && (get_softmodem_params()->phy_test == 0)) {
LOG_I(PHY, "PUSCH not detected in symbol %d\n",symbol);
nr_fill_indication(gNB,frame_rx, slot_rx, ULSCH_id, harq_pid, 1);
return;
}
}
stop_meas(&gNB->rx_pusch_stats);
start_meas(&gNB->rx_pusch_stats);
no_sig = nr_rx_pusch(gNB, ULSCH_id, frame_rx, slot_rx, harq_pid);
if (no_sig && (get_softmodem_params()->phy_test == 0)) {
LOG_I(PHY, "PUSCH not detected in frame %d, slot %d\n", frame_rx, slot_rx);
nr_fill_indication(gNB, frame_rx, slot_rx, ULSCH_id, harq_pid, 1);
return;
}
stop_meas(&gNB->rx_pusch_stats);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_NR_RX_PUSCH,0);
//LOG_M("rxdataF_comp.m","rxF_comp",gNB->pusch_vars[0]->rxdataF_comp[0],6900,1,1);
//LOG_M("rxdataF_ext.m","rxF_ext",gNB->pusch_vars[0]->rxdataF_ext[0],6900,1,1);
+50 -3
View File
@@ -1404,15 +1404,62 @@ void update_dmrs_config(NR_CellGroupConfig_t *scg,PHY_VARS_NR_UE *ue, int8_t* dm
}
else if (dmrs_arg[0] == 1) {
mapping_type = typeB;
} else {
AssertFatal(1==0,"Incorrect Mappingtype, valid options 0-typeA, 1-typeB\n");
}
/* Additional DMRS positions 0 ,1 and 2 */
if(dmrs_arg[1] >= 0 && dmrs_arg[1] <3 ) {
/* Additional DMRS positions 0 ,1 ,2 and 3 */
if(dmrs_arg[1] >= 0 && dmrs_arg[1] <4 ) {
add_pos = dmrs_arg[1];
} else {
AssertFatal(1==0,"Incorrect Additional Position, valid options 0-pos1, 1-pos1, 2-pos2, 3-pos3\n");
}
if(scg != NULL) {
NR_BWP_Downlink_t *bwp = scg->spCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList->list.array[0];
*bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->dmrs_AdditionalPosition = add_pos;
AssertFatal((bwp->bwp_Dedicated->pdsch_Config != NULL && bwp->bwp_Dedicated->pdsch_Config->choice.setup != NULL), "Base RRC reconfig structures are not allocated.\n");
if (bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA == NULL) {
bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA = calloc(1,sizeof(*bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA));
bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->present= NR_SetupRelease_DMRS_DownlinkConfig_PR_setup;
bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup = calloc(1,sizeof(*bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup));
bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->dmrs_Type=NULL;//calloc(1,sizeof(*bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->dmrs_Type));
bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->maxLength=NULL;
bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->scramblingID0=NULL;
bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->scramblingID1=NULL;
bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->phaseTrackingRS=NULL;
bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->dmrs_AdditionalPosition = NULL;
printf("DLSIM: Allocated Mapping TypeA in RRC reconfig message\n");
} else if (bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeB == NULL) {
bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeB = calloc(1,sizeof(*bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeB));
bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeB->present= NR_SetupRelease_DMRS_DownlinkConfig_PR_setup;
bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeB->choice.setup = calloc(1,sizeof(*bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeB->choice.setup));
bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeB->choice.setup->dmrs_Type=NULL;//calloc(1,sizeof(*bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->dmrs_Type));
bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeB->choice.setup->maxLength=NULL;
bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeB->choice.setup->scramblingID0=NULL;
bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeB->choice.setup->scramblingID1=NULL;
bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeB->choice.setup->phaseTrackingRS=NULL;
bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeB->choice.setup->dmrs_AdditionalPosition = NULL;
printf("DLSIM: Allocated Mapping TypeB in RRC reconfig message\n");
}
struct NR_SetupRelease_DMRS_DownlinkConfig *dmrs_MappingtypeA = bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA;
struct NR_SetupRelease_DMRS_DownlinkConfig *dmrs_MappingtypeB = bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeB;
NR_DMRS_DownlinkConfig_t *dmrs_config = (mapping_type == typeA) ? dmrs_MappingtypeA->choice.setup : dmrs_MappingtypeB->choice.setup;
if (add_pos != 2) { // pos0,pos1,pos3
if (dmrs_config->dmrs_AdditionalPosition == NULL) {
dmrs_config->dmrs_AdditionalPosition = calloc(1,sizeof(*dmrs_MappingtypeA->choice.setup->dmrs_AdditionalPosition));
}
*dmrs_config->dmrs_AdditionalPosition = add_pos;
} else { // if NULL, Value pos2
free(dmrs_config->dmrs_AdditionalPosition);
dmrs_config->dmrs_AdditionalPosition = NULL;
}
for (int i=0;i<bwp->bwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.count;i++) {
bwp->bwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[i]->mappingType = mapping_type;
}
+3 -3
View File
@@ -816,7 +816,7 @@ int main(int argc, char **argv)
}
uint8_t length_dmrs = pusch_len1;
uint16_t l_prime_mask = get_l_prime(nb_symb_sch, mapping_type, add_pos, length_dmrs);
uint16_t l_prime_mask = get_l_prime(nb_symb_sch, mapping_type, add_pos, length_dmrs, start_symbol, NR_MIB__dmrs_TypeA_Position_pos2);
uint16_t number_dmrs_symbols = get_dmrs_symbols_in_slot(l_prime_mask, nb_symb_sch);
uint8_t nb_re_dmrs = (dmrs_config_type == pusch_dmrs_type1) ? 6 : 4;
@@ -1002,7 +1002,7 @@ int main(int argc, char **argv)
pusch_pdu->transform_precoding = transform_precoding;
pusch_pdu->data_scrambling_id = *scc->physCellId;
pusch_pdu->nrOfLayers = 1;
pusch_pdu->ul_dmrs_symb_pos = l_prime_mask << start_symbol;
pusch_pdu->ul_dmrs_symb_pos = l_prime_mask;
pusch_pdu->dmrs_config_type = dmrs_config_type;
pusch_pdu->ul_dmrs_scrambling_id = *scc->physCellId;
pusch_pdu->scid = 0;
@@ -1065,7 +1065,7 @@ int main(int argc, char **argv)
ul_config.ul_config_list[0].pusch_config_pdu.rb_start = start_rb;
ul_config.ul_config_list[0].pusch_config_pdu.nr_of_symbols = nb_symb_sch;
ul_config.ul_config_list[0].pusch_config_pdu.start_symbol_index = start_symbol;
ul_config.ul_config_list[0].pusch_config_pdu.ul_dmrs_symb_pos = l_prime_mask << start_symbol;
ul_config.ul_config_list[0].pusch_config_pdu.ul_dmrs_symb_pos = l_prime_mask;
ul_config.ul_config_list[0].pusch_config_pdu.dmrs_config_type = dmrs_config_type;
ul_config.ul_config_list[0].pusch_config_pdu.mcs_index = Imcs;
ul_config.ul_config_list[0].pusch_config_pdu.mcs_table = mcs_table;
+165 -109
View File
@@ -1729,6 +1729,47 @@ uint8_t compute_nr_root_seq(NR_RACH_ConfigCommon_t *rach_config,
}
}
// TS 38.211 Table 7.4.1.1.2-3: PDSCH DMRS positions l' within a slot for single-symbol DMRS and intra-slot frequency hopping disabled.
// The first 4 colomns are PDSCH mapping type A and the last 4 colomns are PDSCH mapping type B.
// When l' = l0, it is represented by 1
// E.g. when symbol duration is 12 in colomn 7, value 1057 ('10000100001') which means l' = l0, 5, 10.
int32_t table_7_4_1_1_2_3_pdsch_dmrs_positions_l [13][8] = { // Duration in symbols
{-1, -1, -1, -1, 1, 1, 1, 1}, //2 // (DMRS l' position)
{0, 0, 0, 0, 1, 1, 1, 1}, //3 // (DMRS l' position)
{0, 0, 0, 0, 1, 1, 1, 1}, //4 // (DMRS l' position)
{0, 0, 0, 0, 1, 17, 17, 17}, //5 // (DMRS l' position)
{0, 0, 0, 0, 1, 17, 17, 17}, //6 // (DMRS l' position)
{0, 0, 0, 0, 1, 17, 17, 17}, //7 // (DMRS l' position)
{0, 128, 128, 128, 1, 65, 73, 73}, //8 // (DMRS l' position)
{0, 128, 128, 128, 1, 129, 145, 145}, //9 // (DMRS l' position)
{0, 512, 576, 576, 1, 129, 145, 145}, //10 // (DMRS l' position)
{0, 512, 576, 576, 1, 257, 273, 585}, //11 // (DMRS l' position)
{0, 512, 576, 2336, 1, 513, 545, 585}, //12 // (DMRS l' position)
{0, 2048, 2176, 2336, 1, 513, 545, 585}, //13 // (DMRS l' position)
{0, 2048, 2176, 2336, -1, -1, -1, -1}, //14 // (DMRS l' position)
};
// TS 38.211 Table 7.4.1.1.2-4: PDSCH DMRS positions l' within a slot for double-symbol DMRS and intra-slot frequency hopping disabled.
// The first 4 colomns are PDSCH mapping type A and the last 4 colomns are PDSCH mapping type B.
// When l' = l0, it is represented by 1
int32_t table_7_4_1_1_2_4_pdsch_dmrs_positions_l [12][8] = { // Duration in symbols
{-1, -1, -1, -1, -1, -1, -1, -1}, //<4 // (DMRS l' position)
{0, 0, -1, -1, -1, -1, -1, -1}, //4 // (DMRS l' position)
{0, 0, -1, -1, 3, 3, -1, -1}, //5 // (DMRS l' position)
{0, 0, -1, -1, 3, 3, -1, -1}, //6 // (DMRS l' position)
{0, 0, -1, -1, 3, 3, -1, -1}, //7 // (DMRS l' position)
{0, 0, -1, -1, 3, 99, -1, -1}, //8 // (DMRS l' position)
{0, 0, -1, -1, 3, 99, -1, -1}, //9 // (DMRS l' position)
{0, 768, -1, -1, 3, 387, -1, -1}, //10 // (DMRS l' position)
{0, 768, -1, -1, 3, 387, -1, -1}, //11 // (DMRS l' position)
{0, 768, -1, -1, 3, 771, -1, -1}, //12 // (DMRS l' position)
{0, 3072, -1, -1, 3, 771, -1, -1}, //13 // (DMRS l' position)
{0, 3072, -1, -1, -1, -1, -1, -1}, //14 // (DMRS l' position)
};
// TS 38.211 Table 6.4.1.1.3-3: PUSCH DMRS positions l' within a slot for single-symbol DMRS and intra-slot frequency hopping disabled.
// The first 4 colomns are PUSCH mapping type A and the last 4 colomns are PUSCH mapping type B.
// When l' = l0, it is represented by 1
@@ -1736,17 +1777,17 @@ uint8_t compute_nr_root_seq(NR_RACH_ConfigCommon_t *rach_config,
int32_t table_6_4_1_1_3_3_pusch_dmrs_positions_l [12][8] = { // Duration in symbols
{-1, -1, -1, -1, 1, 1, 1, 1}, //<4 // (DMRS l' position)
{1, 1, 1, 1, 1, 1, 1, 1}, //4 // (DMRS l' position)
{1, 1, 1, 1, 1, 5, 5, 5}, //5 // (DMRS l' position)
{1, 1, 1, 1, 1, 5, 5, 5}, //6 // (DMRS l' position)
{1, 1, 1, 1, 1, 5, 5, 5}, //7 // (DMRS l' position)
{1, 129, 129, 129, 1, 65, 73, 73}, //8 // (DMRS l' position)
{1, 129, 129, 129, 1, 65, 73, 73}, //9 // (DMRS l' position)
{1, 513, 577, 577, 1, 257, 273, 585}, //10 // (DMRS l' position)
{1, 513, 577, 577, 1, 257, 273, 585}, //11 // (DMRS l' position)
{1, 513, 577, 2337, 1, 1025, 1057, 585}, //12 // (DMRS l' position)
{1, 2049, 2177, 2337, 1, 1025, 1057, 585}, //13 // (DMRS l' position)
{1, 2049, 2177, 2337, 1, 1025, 1057, 585}, //14 // (DMRS l' position)
{0, 0, 0, 0, 1, 1, 1, 1}, //4 // (DMRS l' position)
{0, 0, 0, 0, 1, 17, 17, 17}, //5 // (DMRS l' position)
{0, 0, 0, 0, 1, 17, 17, 17}, //6 // (DMRS l' position)
{0, 0, 0, 0, 1, 17, 17, 17}, //7 // (DMRS l' position)
{0, 128, 128, 128, 1, 65, 73, 73}, //8 // (DMRS l' position)
{0, 128, 128, 128, 1, 65, 73, 73}, //9 // (DMRS l' position)
{0, 512, 576, 576, 1, 257, 273, 585}, //10 // (DMRS l' position)
{0, 512, 576, 576, 1, 257, 273, 585}, //11 // (DMRS l' position)
{0, 512, 576, 2336, 1, 1025, 1057, 585}, //12 // (DMRS l' position)
{0, 2048, 2176, 2336, 1, 1025, 1057, 585}, //13 // (DMRS l' position)
{0, 2048, 2176, 2336, 1, 1025, 1057, 585}, //14 // (DMRS l' position)
};
@@ -1756,17 +1797,17 @@ int32_t table_6_4_1_1_3_3_pusch_dmrs_positions_l [12][8] = {
int32_t table_6_4_1_1_3_4_pusch_dmrs_positions_l [12][8] = { // Duration in symbols
{-1, -1, -1, -1, -1, -1, -1, -1}, //<4 // (DMRS l' position)
{1, 1, -1, -1, -1, -1, -1, -1}, //4 // (DMRS l' position)
{1, 1, -1, -1, 1, 1, -1, -1}, //5 // (DMRS l' position)
{1, 1, -1, -1, 1, 1, -1, -1}, //6 // (DMRS l' position)
{1, 1, -1, -1, 1, 1, -1, -1}, //7 // (DMRS l' position)
{1, 1, -1, -1, 1, 33, -1, -1}, //8 // (DMRS l' position)
{1, 1, -1, -1, 1, 33, -1, -1}, //9 // (DMRS l' position)
{1, 257, -1, -1, 1, 129, -1, -1}, //10 // (DMRS l' position)
{1, 257, -1, -1, 1, 129, -1, -1}, //11 // (DMRS l' position)
{1, 257, -1, -1, 1, 513, -1, -1}, //12 // (DMRS l' position)
{1, 1025, -1, -1, 1, 513, -1, -1}, //13 // (DMRS l' position)
{1, 1025, -1, -1, 1, 513, -1, -1}, //14 // (DMRS l' position)
{0, 0, -1, -1, -1, -1, -1, -1}, //4 // (DMRS l' position)
{0, 0, -1, -1, 3, 3, -1, -1}, //5 // (DMRS l' position)
{0, 0, -1, -1, 3, 3, -1, -1}, //6 // (DMRS l' position)
{0, 0, -1, -1, 3, 3, -1, -1}, //7 // (DMRS l' position)
{0, 0, -1, -1, 3, 99, -1, -1}, //8 // (DMRS l' position)
{0, 0, -1, -1, 3, 99, -1, -1}, //9 // (DMRS l' position)
{0, 768, -1, -1, 3, 387, -1, -1}, //10 // (DMRS l' position)
{0, 768, -1, -1, 3, 387, -1, -1}, //11 // (DMRS l' position)
{0, 768, -1, -1, 3, 1539, -1, -1}, //12 // (DMRS l' position)
{0, 3072, -1, -1, 3, 1539, -1, -1}, //13 // (DMRS l' position)
{0, 3072, -1, -1, 3, 1539, -1, -1}, //14 // (DMRS l' position)
};
// Returns the corresponding row index of the NR table
@@ -2312,8 +2353,8 @@ int get_num_dmrs(uint16_t dmrs_mask ) {
return(num_dmrs);
}
/* returns the total DMRS symbols in a slot*/
uint8_t get_num_dmrs_symbols(NR_PDSCH_Config_t *pdsch_Config,int dmrs_TypeA_Position,int NrOfSymbols,int startSymbol){
return get_num_dmrs(fill_dmrs_mask(pdsch_Config,dmrs_TypeA_Position,NrOfSymbols,startSymbol));
uint8_t get_num_dmrs_symbols(NR_PDSCH_Config_t *pdsch_Config,int dmrs_TypeA_Position,int NrOfSymbols, int startSymbol, int mappingtype){
return get_num_dmrs(fill_dmrs_mask(pdsch_Config,dmrs_TypeA_Position,NrOfSymbols, startSymbol, mappingtype));
}
// Table 5.1.2.2.1-1 38.214
@@ -2377,29 +2418,46 @@ uint8_t get_l0_ul(uint8_t mapping_type, uint8_t dmrs_typeA_position) {
}
int32_t get_l_prime(uint8_t duration_in_symbols, uint8_t mapping_type, pusch_dmrs_AdditionalPosition_t additional_pos, pusch_maxLength_t pusch_maxLength) {
int32_t get_l_prime(uint8_t duration_in_symbols, uint8_t mapping_type, pusch_dmrs_AdditionalPosition_t additional_pos, pusch_maxLength_t pusch_maxLength, uint8_t start_symbol, uint8_t dmrs_typeA_position) {
uint8_t row, colomn;
int32_t l_prime;
LOG_D(MAC, "PUSCH: NrofSymbols:%d, startSymbol:%d, mappingtype:%d, dmrs_TypeA_Position:%d\n", duration_in_symbols, start_symbol, mapping_type, dmrs_typeA_position);
// Section 6.4.1.1.3 in Spec 38.211
// For PDSCH Mapping TypeA, ld is duration between first OFDM of the slot and last OFDM symbol of the scheduled PUSCH resources
// For TypeB, ld is the duration of the scheduled PUSCH resources
uint8_t ld = (mapping_type == typeA) ? (duration_in_symbols + start_symbol) : duration_in_symbols;
uint8_t l0 = (dmrs_typeA_position == NR_MIB__dmrs_TypeA_Position_pos2) ? 2 : 3 ;
colomn = additional_pos;
if (mapping_type == typeB)
colomn += 4;
if (duration_in_symbols < 4)
if (ld < 4)
row = 0;
else
row = duration_in_symbols - 3;
row = ld - 3;
if (pusch_maxLength == pusch_len1)
if (pusch_maxLength == pusch_len1) {
l_prime = table_6_4_1_1_3_3_pusch_dmrs_positions_l[row][colomn];
else
l0 = 1 << l0;
}
else {
l_prime = table_6_4_1_1_3_4_pusch_dmrs_positions_l[row][colomn];
l0 = 1<<l0 | 1<<(l0+1);
}
AssertFatal(l_prime>0,"invalid l_prime < 0\n");
LOG_D(MAC, "PUSCH - l0:%d, ld:%d,row:%d, column:%d, addpos:%d, maxlen:%d\n", l0, ld, row, colomn, additional_pos, pusch_maxLength);
AssertFatal(l_prime>=0,"invalid l_prime < 0\n");
l_prime = (mapping_type == typeA) ? (l_prime | l0) : (l_prime << start_symbol);
LOG_D(MAC, " PUSCH DMRS MASK in HEX:%x\n", l_prime);
return l_prime;
}
/*******************************************************************
@@ -2952,92 +3010,90 @@ int is_nr_UL_slot(NR_ServingCellConfigCommon_t *scc, slot_t slot, lte_frame_type
else return(slot_in_period >= slots1+scc->tdd_UL_DL_ConfigurationCommon->pattern2->nrofDownlinkSlots ? 1 : 0);
}
int16_t fill_dmrs_mask(NR_PDSCH_Config_t *pdsch_Config,int dmrs_TypeA_Position,int NrOfSymbols,int startSymbol) {
int16_t fill_dmrs_mask(NR_PDSCH_Config_t *pdsch_Config,int dmrs_TypeA_Position,int NrOfSymbols, int startSymbol, int mappingtype_fromDCI) {
int l0;int dmrs_AdditionalPosition = 0;int maxLength = 0;
NR_DMRS_DownlinkConfig_t *dmrs_config = NULL;
LOG_D(MAC, "NrofSymbols:%d, startSymbol:%d, mappingtype:%d, dmrs_TypeA_Position:%d\n", NrOfSymbols, startSymbol, mappingtype_fromDCI, dmrs_TypeA_Position);
int l0;
int ld = NrOfSymbols+startSymbol;
if (dmrs_TypeA_Position == NR_ServingCellConfigCommon__dmrs_TypeA_Position_pos2) l0=2;
else if (dmrs_TypeA_Position == NR_ServingCellConfigCommon__dmrs_TypeA_Position_pos3) l0=3;
else AssertFatal(1==0,"Illegal dmrs_TypeA_Position %d\n",(int)dmrs_TypeA_Position);
if (pdsch_Config == NULL) { // Initial BWP
if (ld <= 7) return(1<<l0);
else if (ld <= 9) return(1<<l0 | 1<<7);
else if (ld <= 12) return(1<<l0 | 1<<6 | 1<<9);
else if (ld <= 14) return(1<<l0 | 1<<7 | 1<<11);
// in case of DCI FORMAT 1_0 or dedicated pdsch config not received additionposition = pos2, len1 should be used
// referred to section 5.1.6.2 in 38.214
dmrs_AdditionalPosition = 2;
maxLength = 1;
if (pdsch_Config != NULL) {
if (mappingtype_fromDCI == typeA) { // Type A
if (pdsch_Config->dmrs_DownlinkForPDSCH_MappingTypeA && pdsch_Config->dmrs_DownlinkForPDSCH_MappingTypeA->present == NR_SetupRelease_DMRS_DownlinkConfig_PR_setup)
dmrs_config = (NR_DMRS_DownlinkConfig_t *)pdsch_Config->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup;
} else if (mappingtype_fromDCI == typeB) {
if (pdsch_Config->dmrs_DownlinkForPDSCH_MappingTypeB && pdsch_Config->dmrs_DownlinkForPDSCH_MappingTypeB->present == NR_SetupRelease_DMRS_DownlinkConfig_PR_setup)
dmrs_config = (NR_DMRS_DownlinkConfig_t *)pdsch_Config->dmrs_DownlinkForPDSCH_MappingTypeB->choice.setup;
} else {
AssertFatal(1==0,"Incorrect Mappingtype\n");
}
AssertFatal(dmrs_config != NULL," DMRS configs not present in PDSCH DMRS Downlink config\n");
// default values of maxlength = len2, additionalposition is pos2
if (dmrs_config->maxLength != NULL) maxLength = 2;
if (dmrs_config->dmrs_AdditionalPosition != NULL) dmrs_AdditionalPosition = *dmrs_config->dmrs_AdditionalPosition;
}
uint8_t ld, row, column;
int32_t l_prime = -1;
// columns 0-3 for TypeA, 4-7 for TypeB
column = (mappingtype_fromDCI == typeA) ? dmrs_AdditionalPosition : (dmrs_AdditionalPosition + 4);
// Section 7.4.1.1.2 in Spec 38.211
// For PDSCH Mapping TypeA, ld is duration between first OFDM of the slot and last OFDM symbol of the scheduled PDSCH resources
// For TypeB, ld is the duration of the scheduled PDSCH resources
ld = (mappingtype_fromDCI == typeA) ? (NrOfSymbols + startSymbol) : NrOfSymbols;
// Section 7.4.1.1.2 in Spec 38.211
//For PDSCH Mapping typeB, if PDSCH duration ld <=4, only single symbol DMRS is supported
if (mappingtype_fromDCI == typeB && ld <= 4)
maxLength = 1;
AssertFatal(ld > 2 && ld < 15,"Illegal NrOfSymbols according to Table 5.1.2.1-1 Spec 38.214 %d\n",ld);
AssertFatal((NrOfSymbols + startSymbol) < 15,"Illegal S+L according to Table 5.1.2.1-1 Spec 38.214 S:%d L:%d\n",startSymbol, NrOfSymbols);
if (mappingtype_fromDCI == typeA) {
// Section 7.4.1.1.2 in Spec 38.211
AssertFatal((l0 == 2) || (l0 == 3 && dmrs_AdditionalPosition != 3),"Wrong config, If dmrs_TypeA_Position POS3, ADD POS cannot be POS3 \n");
// Table 5.1.2.1-1 in Spec 38.214
AssertFatal(startSymbol <= l0, "Wrong config, Start symbol %d cannot be later than dmrs_TypeA_Position %d \n", startSymbol, l0);
// Section 7.4.1.1.2 in Spec 38.211
AssertFatal(l0 == 2 || (l0 == 3 && (ld != 3 || ld != 4)), "ld 3 or 4 symbols only possible with dmrs_TypeA_Position POS2 \n");
}
if (maxLength == 1) {
row = ld - 2;
l_prime = table_7_4_1_1_2_3_pdsch_dmrs_positions_l[row][column];
l0 = 1 << l0;
}
else {
if (pdsch_Config->dmrs_DownlinkForPDSCH_MappingTypeA &&
pdsch_Config->dmrs_DownlinkForPDSCH_MappingTypeA->present == NR_SetupRelease_DMRS_DownlinkConfig_PR_setup) {
// Relative to start of slot
NR_DMRS_DownlinkConfig_t *dmrs_config = (NR_DMRS_DownlinkConfig_t *)pdsch_Config->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup;
AssertFatal(ld>1 && ld < 15,"Illegal l_d %d\n",ld);
int pos2=0;
if (dmrs_config->maxLength == NULL) {
// this is Table 7.4.1.1.2-3: PDSCH DM-RS positions l for single-symbol DM-RS
if (dmrs_config->dmrs_AdditionalPosition == NULL) pos2=1;
else if (dmrs_config->dmrs_AdditionalPosition && *dmrs_config->dmrs_AdditionalPosition == NR_DMRS_DownlinkConfig__dmrs_AdditionalPosition_pos0 )
return(1<<l0);
switch (ld) {
case 2 :
case 3 :
case 4 :
case 5 :
case 6 :
case 7 :
return(1<<l0);
break;
case 8 :
case 9:
return(1<<l0 | 1<<7);
break;
case 10:
case 11:
if (dmrs_config->dmrs_AdditionalPosition && *dmrs_config->dmrs_AdditionalPosition==NR_DMRS_DownlinkConfig__dmrs_AdditionalPosition_pos1)
return(1<<l0 | 1<<9);
else
return(1<<l0 | 1<<6 | 1<<9);
break;
case 12:
if (dmrs_config->dmrs_AdditionalPosition && *dmrs_config->dmrs_AdditionalPosition==NR_DMRS_DownlinkConfig__dmrs_AdditionalPosition_pos1)
return(1<<l0 | 1<<9);
else if (pos2==1)
return(1<<l0 | 1<<6 | 1<<9);
else if (dmrs_config->dmrs_AdditionalPosition && *dmrs_config->dmrs_AdditionalPosition==NR_DMRS_DownlinkConfig__dmrs_AdditionalPosition_pos3)
return(1<<l0 | 1<<5 | 1<<8 | 1<<11);
break;
case 13:
case 14:
if (dmrs_config->dmrs_AdditionalPosition && *dmrs_config->dmrs_AdditionalPosition==NR_DMRS_DownlinkConfig__dmrs_AdditionalPosition_pos1)
return(1<<l0 | 1<<11);
else if (pos2==1)
return(1<<l0 | 1<<7 | 1<<11);
else if (dmrs_config->dmrs_AdditionalPosition && *dmrs_config->dmrs_AdditionalPosition==NR_DMRS_DownlinkConfig__dmrs_AdditionalPosition_pos3)
return(1<<l0 | 1<<5 | 1<<8 | 1<<11);
break;
}
}
else {
// Table 7.4.1.1.2-4: PDSCH DM-RS positions l for double-symbol DM-RS.
AssertFatal(ld>3,"Illegal l_d %d for len2 DMRS\n",ld);
if (ld < 10) return(1<<l0);
if (ld < 13 && *dmrs_config->dmrs_AdditionalPosition==NR_DMRS_DownlinkConfig__dmrs_AdditionalPosition_pos0) return(1<<l0);
if (ld < 13 && *dmrs_config->dmrs_AdditionalPosition!=NR_DMRS_DownlinkConfig__dmrs_AdditionalPosition_pos0) return(1<<l0 | 1<<8);
if (*dmrs_config->dmrs_AdditionalPosition!=NR_DMRS_DownlinkConfig__dmrs_AdditionalPosition_pos0) return(1<<l0);
if (*dmrs_config->dmrs_AdditionalPosition!=NR_DMRS_DownlinkConfig__dmrs_AdditionalPosition_pos1) return(1<<l0 | 1<<10);
if (*dmrs_config->dmrs_AdditionalPosition==NR_DMRS_DownlinkConfig__dmrs_AdditionalPosition_pos0) return(1<<l0);
if (*dmrs_config->dmrs_AdditionalPosition==NR_DMRS_DownlinkConfig__dmrs_AdditionalPosition_pos1) return(1<<l0 | 1<<10);
}
}
else if (pdsch_Config->dmrs_DownlinkForPDSCH_MappingTypeB &&
pdsch_Config->dmrs_DownlinkForPDSCH_MappingTypeA->present == NR_SetupRelease_DMRS_DownlinkConfig_PR_setup) {
// Relative to start of PDSCH resource
AssertFatal(1==0,"TypeB DMRS not supported yet\n");
}
row = (ld < 4) ? 0 : (ld - 3);
l_prime = table_7_4_1_1_2_4_pdsch_dmrs_positions_l[row][column];
l0 = 1<<l0 | 1<<(l0+1);
}
AssertFatal(1==0,"Shouldn't get here\n");
return(-1);
LOG_D(MAC, "l0:%d, ld:%d,row:%d, column:%d, addpos:%d, maxlen:%d\n", l0, ld, row, column, dmrs_AdditionalPosition, maxLength);
AssertFatal(l_prime>=0,"ERROR in configuration.Check Time Domain allocation of this Grant. l_prime < 1. row:%d, column:%d\n", row, column);
l_prime = (mappingtype_fromDCI == typeA) ? (l_prime | l0) : (l_prime << startSymbol);
LOG_D(MAC, " PDSCH DMRS MASK in HEX:%x\n", l_prime);
return l_prime;
}
uint8_t get_pusch_mcs_table(long *mcs_Table,
@@ -47,7 +47,7 @@ uint64_t from_nrarfcn(int nr_bandP, uint8_t scs_index, uint32_t dl_nrarfcn);
uint32_t to_nrarfcn(int nr_bandP, uint64_t dl_CarrierFreq, uint8_t scs_index, uint32_t bw);
int16_t fill_dmrs_mask(NR_PDSCH_Config_t *pdsch_Config,int dmrs_TypeA_Position,int NrOfSymbols,int startSymbol);
int16_t fill_dmrs_mask(NR_PDSCH_Config_t *pdsch_Config,int dmrs_TypeA_Position,int NrOfSymbols,int startSymbol,int mappingtype_fromDCI);
int is_nr_DL_slot(NR_ServingCellConfigCommon_t *scc,slot_t slotP);
@@ -121,7 +121,7 @@ uint16_t get_NCS(uint8_t index, uint16_t format, uint8_t restricted_set_config);
int get_num_dmrs(uint16_t dmrs_mask );
uint8_t get_l0_ul(uint8_t mapping_type, uint8_t dmrs_typeA_position);
int32_t get_l_prime(uint8_t duration_in_symbols, uint8_t mapping_type, pusch_dmrs_AdditionalPosition_t additional_pos, pusch_maxLength_t pusch_maxLength);
int32_t get_l_prime(uint8_t duration_in_symbols, uint8_t mapping_type, pusch_dmrs_AdditionalPosition_t additional_pos, pusch_maxLength_t pusch_maxLength, uint8_t start_symbolt, uint8_t dmrs_typeA_position);
uint8_t get_L_ptrs(uint8_t mcs1, uint8_t mcs2, uint8_t mcs3, uint8_t I_mcs, uint8_t mcs_table);
uint8_t get_K_ptrs(uint16_t nrb0, uint16_t nrb1, uint16_t N_RB);
@@ -153,7 +153,7 @@ bool set_ul_ptrs_values(NR_PTRS_UplinkConfig_t *ul_ptrs_config,
uint8_t *reOffset, uint8_t *maxNumPorts, uint8_t *ulPower,
uint8_t NrOfSymbols);
uint8_t get_num_dmrs_symbols(NR_PDSCH_Config_t *pdsch_Config,int dmrs_TypeA_Position,int NrOfSymbols,int startSymbol);
uint8_t get_num_dmrs_symbols(NR_PDSCH_Config_t *pdsch_Config,int dmrs_TypeA_Position,int NrOfSymbols,int startSymbol,int mappingtype);
/* \brief Set the transform precoding according to 6.1.3 of 3GPP TS 38.214 version 16.3.0 Release 16
@param *pusch_config, pointer to pusch config
+28 -8
View File
@@ -640,12 +640,26 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
LOG_W(MAC, "[%d.%d] Invalid time_domain_assignment. Possibly due to false DCI. Ignoring DCI!\n", frame, slot);
return -1;
}
NR_PDSCH_TimeDomainResourceAllocationList_t *pdsch_TimeDomainAllocationList = NULL;
if (mac->DLbwp[0]->bwp_Dedicated->pdsch_Config->choice.setup->pdsch_TimeDomainAllocationList)
pdsch_TimeDomainAllocationList = mac->DLbwp[0]->bwp_Dedicated->pdsch_Config->choice.setup->pdsch_TimeDomainAllocationList->choice.setup;
else if (mac->DLbwp[0]->bwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList)
pdsch_TimeDomainAllocationList = mac->DLbwp[0]->bwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList;
int mappingtype = pdsch_TimeDomainAllocationList->list.array[dci->time_domain_assignment.val]->mappingType;
/* dmrs symbol positions*/
dlsch_config_pdu_1_0->dlDmrsSymbPos = fill_dmrs_mask(pdsch_config,
dlsch_config_pdu_1_0->dlDmrsSymbPos = fill_dmrs_mask(NULL,
mac->scc->dmrs_TypeA_Position,
dlsch_config_pdu_1_0->number_symbols,
dlsch_config_pdu_1_0->start_symbol);
dlsch_config_pdu_1_0->dmrsConfigType = (pdsch_config) ? (mac->DLbwp[0]->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->dmrs_Type == NULL ? 0 : 1) : 0;
dlsch_config_pdu_1_0->start_symbol,
mappingtype);
// For DCI 1_0, dmrs type is type1. referred to section 5.1.6.2 of 3GPP TS 38.214
dlsch_config_pdu_1_0->dmrsConfigType = 0;
LOG_D(MAC, "DCI 1_0 start_sym:%d NR Symb:%d, DMRS_symb_pos:%x\n", dlsch_config_pdu_1_0->start_symbol, dlsch_config_pdu_1_0->number_symbols, dlsch_config_pdu_1_0->dlDmrsSymbPos);
/* number of DM-RS CDM groups without data according to subclause 5.1.6.2 of 3GPP TS 38.214 version 15.9.0 Release 15 */
if (dlsch_config_pdu_1_0->number_symbols == 2)
dlsch_config_pdu_1_0->n_dmrs_cdm_groups = 1;
@@ -783,10 +797,6 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
dl_config->dl_config_list[dl_config->number_pdus].pdu_type = FAPI_NR_DL_CONFIG_TYPE_DLSCH;
dl_config->dl_config_list[dl_config->number_pdus].dlsch_config_pdu.rnti = rnti;
// FIXME: fix number of additional dmrs
if(pdsch_config->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->dmrs_AdditionalPosition == NULL)
pdsch_config->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->dmrs_AdditionalPosition=calloc(1,sizeof(*pdsch_config->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->dmrs_AdditionalPosition));
fapi_nr_dl_config_dlsch_pdu_rel15_t *dlsch_config_pdu_1_1 = &dl_config->dl_config_list[dl_config->number_pdus].dlsch_config_pdu.dlsch_config_rel15;
dlsch_config_pdu_1_1->BWPSize = NRRIV2BW(mac->DLbwp[0]->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
@@ -807,11 +817,21 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
LOG_W(MAC, "[%d.%d] Invalid time_domain_assignment. Possibly due to false DCI. Ignoring DCI!\n", frame, slot);
return -1;
}
NR_PDSCH_TimeDomainResourceAllocationList_t *pdsch_TimeDomainAllocationList = NULL;
if (mac->DLbwp[0]->bwp_Dedicated->pdsch_Config->choice.setup->pdsch_TimeDomainAllocationList)
pdsch_TimeDomainAllocationList = mac->DLbwp[0]->bwp_Dedicated->pdsch_Config->choice.setup->pdsch_TimeDomainAllocationList->choice.setup;
else if (mac->DLbwp[0]->bwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList)
pdsch_TimeDomainAllocationList = mac->DLbwp[0]->bwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList;
int mappingtype = pdsch_TimeDomainAllocationList->list.array[dci->time_domain_assignment.val]->mappingType;
/* dmrs symbol positions*/
dlsch_config_pdu_1_1->dlDmrsSymbPos = fill_dmrs_mask(pdsch_config,
mac->scc->dmrs_TypeA_Position,
dlsch_config_pdu_1_1->number_symbols,
dlsch_config_pdu_1_1->start_symbol);
dlsch_config_pdu_1_1->start_symbol,
mappingtype);
dlsch_config_pdu_1_1->dmrsConfigType = mac->DLbwp[dl_bwp_id-1]->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->dmrs_Type == NULL ? 0 : 1;
/* TODO: fix number of DM-RS CDM groups without data according to subclause 5.1.6.2 of 3GPP TS 38.214,
using tables 7.3.1.2.2-1, 7.3.1.2.2-2, 7.3.1.2.2-3, 7.3.1.2.2-4 of 3GPP TS 38.212 */
+30 -9
View File
@@ -492,7 +492,7 @@ int nr_config_pusch_pdu(NR_UE_MAC_INST_t *mac,
int NrOfSymbols;
uint8_t nb_dmrs_re_per_rb;
uint16_t l_prime_mask = 1;
uint16_t l_prime_mask = 0;
uint16_t number_dmrs_symbols = 0;
int N_PRB_oh = 0;
@@ -505,6 +505,9 @@ int nr_config_pusch_pdu(NR_UE_MAC_INST_t *mac,
pusch_config_pdu->nrOfLayers = 1;
pusch_config_pdu->rnti = rnti;
pusch_dmrs_AdditionalPosition_t add_pos = pusch_dmrs_pos2;
pusch_maxLength_t dmrslength = pusch_len1;
if (rar_grant) {
// Note: for Msg3 or MsgA PUSCH transmission the N_PRB_oh is always set to 0
@@ -513,6 +516,8 @@ int nr_config_pusch_pdu(NR_UE_MAC_INST_t *mac,
NR_BWP_UplinkDedicated_t *ibwp = mac->scg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP;
NR_PUSCH_Config_t *pusch_Config = ibwp->pusch_Config->choice.setup;
int startSymbolAndLength = ubwp->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[rar_grant->Msg3_t_alloc]->startSymbolAndLength;
int mappingtype = ubwp->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[rar_grant->Msg3_t_alloc]->mappingType;
// active BWP start
int abwp_start = NRRIV2PRBOFFSET(ubwp->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
@@ -550,6 +555,9 @@ int nr_config_pusch_pdu(NR_UE_MAC_INST_t *mac,
pusch_config_pdu->start_symbol_index = StartSymbolIndex;
pusch_config_pdu->nr_of_symbols = NrOfSymbols;
l_prime_mask = get_l_prime(NrOfSymbols, mappingtype, add_pos, dmrslength, StartSymbolIndex, scc->dmrs_TypeA_Position);
LOG_D(MAC, "MSG3 start_sym:%d NR Symb:%d mappingtype:%d , DMRS_MASK:%x\n", pusch_config_pdu->start_symbol_index, pusch_config_pdu->nr_of_symbols, mappingtype, l_prime_mask);
#ifdef DEBUG_MSG3
LOG_D(MAC, "In %s BWP assignment (BWP (start %d, size %d) \n", __FUNCTION__, pusch_config_pdu->bwp_start, pusch_config_pdu->bwp_size);
#endif
@@ -629,18 +637,26 @@ int nr_config_pusch_pdu(NR_UE_MAC_INST_t *mac,
}
NR_PUSCH_TimeDomainResourceAllocationList_t *pusch_TimeDomainAllocationList = NULL;
if (pusch_Config->pusch_TimeDomainAllocationList) {
pusch_TimeDomainAllocationList = pusch_Config->pusch_TimeDomainAllocationList->choice.setup;
}
else if (mac->ULbwp[0]->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList) {
pusch_TimeDomainAllocationList = mac->ULbwp[0]->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList;
}
int mappingtype = pusch_TimeDomainAllocationList->list.array[dci->time_domain_assignment.val]->mappingType;
NR_DMRS_UplinkConfig_t *NR_DMRS_ulconfig = NULL;
NR_DMRS_ulconfig = (mappingtype == NR_PUSCH_TimeDomainResourceAllocation__mappingType_typeA)
? pusch_Config->dmrs_UplinkForPUSCH_MappingTypeA->choice.setup : pusch_Config->dmrs_UplinkForPUSCH_MappingTypeB->choice.setup;
/* TRANSFORM PRECODING ------------------------------------------------------------------------------------------*/
if (pusch_config_pdu->transform_precoding == transform_precoder_enabled) {
pusch_config_pdu->num_dmrs_cdm_grps_no_data = 2;
NR_DMRS_UplinkConfig_t *NR_DMRS_ulconfig = NULL;
if(pusch_Config->dmrs_UplinkForPUSCH_MappingTypeA != NULL)
NR_DMRS_ulconfig = pusch_Config->dmrs_UplinkForPUSCH_MappingTypeA->choice.setup;
else
NR_DMRS_ulconfig = pusch_Config->dmrs_UplinkForPUSCH_MappingTypeB->choice.setup;
uint32_t n_RS_Id = 0;
if (NR_DMRS_ulconfig->transformPrecodingEnabled->nPUSCH_Identity != NULL)
n_RS_Id = *NR_DMRS_ulconfig->transformPrecodingEnabled->nPUSCH_Identity;
@@ -709,8 +725,13 @@ int nr_config_pusch_pdu(NR_UE_MAC_INST_t *mac,
pusch_config_pdu->absolute_delta_PUSCH = 4;
}
if (NR_DMRS_ulconfig != NULL) {
add_pos = (NR_DMRS_ulconfig->dmrs_AdditionalPosition == NULL) ? 2 : *NR_DMRS_ulconfig->dmrs_AdditionalPosition;
dmrslength = NR_DMRS_ulconfig->maxLength == NULL ? pusch_len1 : pusch_len2;
}
/* DMRS */
l_prime_mask = get_l_prime(pusch_config_pdu->nr_of_symbols, typeB, pusch_dmrs_pos0, pusch_len1);
l_prime_mask = get_l_prime(pusch_config_pdu->nr_of_symbols, mappingtype, add_pos, dmrslength, pusch_config_pdu->start_symbol_index, scc->dmrs_TypeA_Position);
if (pusch_config_pdu->transform_precoding == transform_precoder_disabled)
pusch_config_pdu->num_dmrs_cdm_grps_no_data = 1;
@@ -748,7 +769,7 @@ int nr_config_pusch_pdu(NR_UE_MAC_INST_t *mac,
pusch_config_pdu->nr_of_symbols,
rnti_types[rnti_type]);
pusch_config_pdu->ul_dmrs_symb_pos = l_prime_mask << pusch_config_pdu->start_symbol_index;;
pusch_config_pdu->ul_dmrs_symb_pos = l_prime_mask;
pusch_config_pdu->target_code_rate = nr_get_code_rate_ul(pusch_config_pdu->mcs_index, pusch_config_pdu->mcs_table);
pusch_config_pdu->qam_mod_order = nr_get_Qm_ul(pusch_config_pdu->mcs_index, pusch_config_pdu->mcs_table);
+17 -3
View File
@@ -806,6 +806,7 @@ void nr_add_msg3(module_id_t module_idP, int CC_id, frame_t frameP, sub_frame_t
int startSymbolAndLength = ubwp->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[ra->Msg3_tda_id]->startSymbolAndLength;
int start_symbol_index,nr_of_symbols;
SLIV2SL(startSymbolAndLength, &start_symbol_index, &nr_of_symbols);
int mappingtype = ubwp->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[ra->Msg3_tda_id]->mappingType;
pusch_pdu->pdu_bit_map = PUSCH_PDU_BITMAP_PUSCH_DATA;
pusch_pdu->rnti = ra->rnti;
@@ -831,7 +832,10 @@ void nr_add_msg3(module_id_t module_idP, int CC_id, frame_t frameP, sub_frame_t
pusch_pdu->transform_precoding = 0;
pusch_pdu->data_scrambling_id = *scc->physCellId;
pusch_pdu->nrOfLayers = 1;
pusch_pdu->ul_dmrs_symb_pos = 1<<start_symbol_index; // ok for now but use fill dmrs mask later
pusch_pdu->ul_dmrs_symb_pos = get_l_prime(nr_of_symbols,mappingtype,pusch_dmrs_pos2,pusch_len1,start_symbol_index, scc->dmrs_TypeA_Position);
LOG_D(MAC, "MSG3 start_sym:%d NR Symb:%d mappingtype:%d , ul_dmrs_symb_pos:%x\n", start_symbol_index, nr_of_symbols, mappingtype, pusch_pdu->ul_dmrs_symb_pos);
pusch_pdu->dmrs_config_type = 0;
pusch_pdu->ul_dmrs_scrambling_id = *scc->physCellId; //If provided and the PUSCH is not a msg3 PUSCH, otherwise, L2 should set this to physical cell id.
pusch_pdu->scid = 0; //DMRS sequence initialization [TS38.211, sec 6.4.1.1.1]. Should match what is sent in DCI 0_1, otherwise set to 0.
@@ -946,6 +950,10 @@ void nr_generate_Msg2(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra
SLIV2SL(startSymbolAndLength, &startSymbolIndex, &nrOfSymbols);
AssertFatal(startSymbolIndex >= 0, "StartSymbolIndex is negative\n");
int mappingtype = ra->secondaryCellGroup->spCellConfig->spCellConfigDedicated->
downlinkBWP_ToAddModList->list.array[ra->bwp_id-1]->bwp_Common->pdsch_ConfigCommon->choice.setup->
pdsch_TimeDomainAllocationList->list.array[time_domain_assignment]->mappingType;
uint8_t numDmrsCdmGrpsNoData = 2;
if (nrOfSymbols == 2) {
numDmrsCdmGrpsNoData = 1;
@@ -1031,7 +1039,8 @@ void nr_generate_Msg2(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra
pdsch_pdu_rel15->dlDmrsSymbPos = fill_dmrs_mask(NULL,
nr_mac->common_channels->ServingCellConfigCommon->dmrs_TypeA_Position,
nrOfSymbols,
startSymbolIndex);
startSymbolIndex,
mappingtype);
int x_Overhead = 0;
uint8_t tb_scaling = 0;
@@ -1188,10 +1197,15 @@ void nr_generate_Msg4(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra
SLIV2SL(startSymbolAndLength, &startSymbolIndex, &nrOfSymbols);
AssertFatal(startSymbolIndex >= 0, "StartSymbolIndex is negative\n");
int mappingtype = ra->secondaryCellGroup->spCellConfig->spCellConfigDedicated->
downlinkBWP_ToAddModList->list.array[ra->bwp_id-1]->bwp_Common->pdsch_ConfigCommon->choice.setup->
pdsch_TimeDomainAllocationList->list.array[time_domain_assignment]->mappingType;
uint16_t dlDmrsSymbPos = fill_dmrs_mask(NULL,
nr_mac->common_channels->ServingCellConfigCommon->dmrs_TypeA_Position,
nrOfSymbols,
startSymbolIndex);
startSymbolIndex,
mappingtype);
uint16_t N_DMRS_SLOT = get_num_dmrs(dlDmrsSymbPos);
+14 -7
View File
@@ -357,6 +357,7 @@ void schedule_control_sib1(module_id_t module_id,
int startSymbolIndex = 0;
int nrOfSymbols = 0;
if(gNB_mac->common_channels->ServingCellConfigCommon->dmrs_TypeA_Position == 0) {
startSymbolIndex = table_5_1_2_1_1_2_time_dom_res_alloc_A_dmrs_typeA_pos2[gNB_mac->sched_ctrlCommon->pdsch_semi_static.time_domain_allocation][1];
nrOfSymbols = table_5_1_2_1_1_2_time_dom_res_alloc_A_dmrs_typeA_pos2[gNB_mac->sched_ctrlCommon->pdsch_semi_static.time_domain_allocation][2];
@@ -365,6 +366,9 @@ void schedule_control_sib1(module_id_t module_id,
nrOfSymbols = table_5_1_2_1_1_2_time_dom_res_alloc_A_dmrs_typeA_pos3[gNB_mac->sched_ctrlCommon->pdsch_semi_static.time_domain_allocation][2];
}
// TODO: There are exceptions to this in table 5.1.2.1.1-4,5 (Default time domain allocation tables B, C)
int mappingtype = (startSymbolIndex <= 3)? typeA: typeB;
if (nrOfSymbols == 2) {
gNB_mac->sched_ctrlCommon->pdsch_semi_static.numDmrsCdmGrpsNoData = 1;
} else {
@@ -373,7 +377,7 @@ void schedule_control_sib1(module_id_t module_id,
// Calculate number of PRB_DMRS
uint8_t N_PRB_DMRS = gNB_mac->sched_ctrlCommon->pdsch_semi_static.numDmrsCdmGrpsNoData * 6;
uint16_t dlDmrsSymbPos = fill_dmrs_mask(NULL, gNB_mac->common_channels->ServingCellConfigCommon->dmrs_TypeA_Position, nrOfSymbols, startSymbolIndex);
uint16_t dlDmrsSymbPos = fill_dmrs_mask(NULL, gNB_mac->common_channels->ServingCellConfigCommon->dmrs_TypeA_Position, nrOfSymbols, startSymbolIndex, mappingtype);
uint16_t dmrs_length = get_num_dmrs(dlDmrsSymbPos);
int rbSize = 0;
@@ -394,6 +398,7 @@ void schedule_control_sib1(module_id_t module_id,
LOG_D(MAC,"nrOfSymbols = %i\n", nrOfSymbols);
LOG_D(MAC, "rbSize = %i\n", gNB_mac->sched_ctrlCommon->sched_pdsch.rbSize);
LOG_D(MAC,"TBS = %i\n", TBS);
LOG_D(MAC,"mappingtype = %d\n", mappingtype);
// Mark the corresponding RBs as used
for (int rb = 0; rb < gNB_mac->sched_ctrlCommon->sched_pdsch.rbSize; rb++) {
@@ -406,7 +411,8 @@ void nr_fill_nfapi_dl_sib1_pdu(int Mod_idP,
NR_Type0_PDCCH_CSS_config_t *type0_PDCCH_CSS_config,
uint32_t TBS,
int StartSymbolIndex,
int NrOfSymbols) {
int NrOfSymbols,
uint16_t dlDmrsSymbPos) {
gNB_MAC_INST *gNB_mac = RC.nrmac[Mod_idP];
NR_COMMON_channels_t *cc = gNB_mac->common_channels;
@@ -478,9 +484,7 @@ void nr_fill_nfapi_dl_sib1_pdu(int Mod_idP,
pdsch_pdu_rel15->mcsTable[0] = gNB_mac->sched_ctrlCommon->pdsch_semi_static.mcsTableIdx;
pdsch_pdu_rel15->StartSymbolIndex = StartSymbolIndex;
pdsch_pdu_rel15->NrOfSymbols = NrOfSymbols;
pdsch_pdu_rel15->dlDmrsSymbPos = fill_dmrs_mask(NULL, scc->dmrs_TypeA_Position, pdsch_pdu_rel15->NrOfSymbols, pdsch_pdu_rel15->StartSymbolIndex);
pdsch_pdu_rel15->dlDmrsSymbPos = dlDmrsSymbPos;
LOG_D(MAC,"dlDmrsSymbPos = 0x%x\n", pdsch_pdu_rel15->dlDmrsSymbPos);
/* Fill PDCCH DL DCI PDU */
@@ -605,9 +609,12 @@ void schedule_nr_sib1(module_id_t module_idP, frame_t frameP, sub_frame_t slotP)
nrOfSymbols = table_5_1_2_1_1_2_time_dom_res_alloc_A_dmrs_typeA_pos3[gNB_mac->sched_ctrlCommon->pdsch_semi_static.time_domain_allocation][2];
}
// TODO: There are exceptions to this in table 5.1.2.1.1-4,5 (Default time domain allocation tables B, C)
int mappingtype = (startSymbolIndex <= 3) ? typeA : typeB;
// Calculate number of PRB_DMRS
uint8_t N_PRB_DMRS = gNB_mac->sched_ctrlCommon->pdsch_semi_static.numDmrsCdmGrpsNoData * 6;
uint16_t dlDmrsSymbPos = fill_dmrs_mask(NULL, gNB_mac->common_channels->ServingCellConfigCommon->dmrs_TypeA_Position, nrOfSymbols, startSymbolIndex);
uint16_t dlDmrsSymbPos = fill_dmrs_mask(NULL, gNB_mac->common_channels->ServingCellConfigCommon->dmrs_TypeA_Position, nrOfSymbols, startSymbolIndex, mappingtype);
uint16_t dmrs_length = get_num_dmrs(dlDmrsSymbPos);
const uint32_t TBS = nr_compute_tbs(nr_get_Qm_dl(gNB_mac->sched_ctrlCommon->sched_pdsch.mcs, gNB_mac->sched_ctrlCommon->pdsch_semi_static.mcsTableIdx),
@@ -615,7 +622,7 @@ void schedule_nr_sib1(module_id_t module_idP, frame_t frameP, sub_frame_t slotP)
gNB_mac->sched_ctrlCommon->sched_pdsch.rbSize, nrOfSymbols, N_PRB_DMRS * dmrs_length,0 ,0 ,1 ) >> 3;
nfapi_nr_dl_tti_request_body_t *dl_req = &gNB_mac->DL_req[CC_id].dl_tti_request_body;
nr_fill_nfapi_dl_sib1_pdu(module_idP, dl_req, type0_PDCCH_CSS_config, TBS, startSymbolIndex, nrOfSymbols);
nr_fill_nfapi_dl_sib1_pdu(module_idP, dl_req, type0_PDCCH_CSS_config, TBS, startSymbolIndex, nrOfSymbols, dlDmrsSymbPos);
const int ntx_req = gNB_mac->TX_req[CC_id].Number_of_PDUs;
nfapi_nr_pdu_t *tx_req = &gNB_mac->TX_req[CC_id].pdu_list[ntx_req];
@@ -146,15 +146,18 @@ void nr_schedule_css_dlsch_phytest(module_id_t module_idP,
int startSymbolAndLength=0;
int StartSymbolIndex=-1,NrOfSymbols=14;
int StartSymbolIndex_tmp,NrOfSymbols_tmp;
int mappingtype_tmp, mappingtype;
for (int i=0;
i<scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.count;
i++) {
startSymbolAndLength = scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[i]->startSymbolAndLength;
SLIV2SL(startSymbolAndLength,&StartSymbolIndex_tmp,&NrOfSymbols_tmp);
mappingtype_tmp = scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[i]->mappingType;
if (NrOfSymbols_tmp < NrOfSymbols) {
NrOfSymbols = NrOfSymbols_tmp;
StartSymbolIndex = StartSymbolIndex_tmp;
mappingtype = mappingtype_tmp;
// k0 = *scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list.array[i]->k0;
// time_domain_assignment = i;
}
@@ -165,7 +168,8 @@ void nr_schedule_css_dlsch_phytest(module_id_t module_idP,
pdsch_pdu_rel15->dlDmrsSymbPos = fill_dmrs_mask(NULL,
scc->dmrs_TypeA_Position,
NrOfSymbols,
StartSymbolIndex);
StartSymbolIndex,
mappingtype);
/*
AssertFatal(k0==0,"k0 is not zero for Initial DL BWP TimeDomain Alloc\n");
@@ -268,6 +268,7 @@ void nr_set_pdsch_semi_static(const NR_ServingCellConfigCommon_t *scc,
const struct NR_PDSCH_TimeDomainResourceAllocationList *tdaList =
bwp->bwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList;
AssertFatal(tda < tdaList->list.count, "time_domain_allocation %d>=%d\n", tda, tdaList->list.count);
const int mapping_type = tdaList->list.array[tda]->mappingType;
const int startSymbolAndLength = tdaList->list.array[tda]->startSymbolAndLength;
SLIV2SL(startSymbolAndLength, &ps->startSymbolIndex, &ps->nrOfSymbols);
@@ -291,9 +292,9 @@ void nr_set_pdsch_semi_static(const NR_ServingCellConfigCommon_t *scc,
// if no data in dmrs cdm group is 2 both odd and even REs have no data
ps->N_PRB_DMRS = num_dmrs_cdm_grps_no_data * (ps->dmrsConfigType == NFAPI_NR_DMRS_TYPE1 ? 6 : 4);
ps->N_DMRS_SLOT =
get_num_dmrs_symbols(bwp->bwp_Dedicated->pdsch_Config->choice.setup, scc->dmrs_TypeA_Position, ps->nrOfSymbols, ps->startSymbolIndex);
get_num_dmrs_symbols(bwp->bwp_Dedicated->pdsch_Config->choice.setup, scc->dmrs_TypeA_Position, ps->nrOfSymbols, ps->startSymbolIndex, mapping_type);
ps->dl_dmrs_symb_pos =
fill_dmrs_mask(bwp->bwp_Dedicated->pdsch_Config->choice.setup, scc->dmrs_TypeA_Position, ps->nrOfSymbols, ps->startSymbolIndex);
fill_dmrs_mask(bwp->bwp_Dedicated->pdsch_Config->choice.setup, scc->dmrs_TypeA_Position, ps->nrOfSymbols, ps->startSymbolIndex, mapping_type);
}
void nr_set_pusch_semi_static(const NR_ServingCellConfigCommon_t *scc,
@@ -354,11 +355,12 @@ void nr_set_pusch_semi_static(const NR_ServingCellConfigCommon_t *scc,
: *ps->NR_DMRS_UplinkConfig->dmrs_AdditionalPosition);
const pusch_maxLength_t pusch_maxLength =
ps->NR_DMRS_UplinkConfig->maxLength == NULL ? 1 : 2;
const uint16_t l_prime_mask = get_l_prime(ps->nrOfSymbols,
ps->ul_dmrs_symb_pos = get_l_prime(ps->nrOfSymbols,
ps->mapping_type,
additional_pos,
pusch_maxLength);
ps->ul_dmrs_symb_pos = l_prime_mask << ps->startSymbolIndex;
pusch_maxLength,
ps->startSymbolIndex,
scc->dmrs_TypeA_Position);
uint8_t num_dmrs_symb = 0;
for(int i = ps->startSymbolIndex; i < ps->startSymbolIndex + ps->nrOfSymbols; i++)
num_dmrs_symb += (ps->ul_dmrs_symb_pos >> i) & 1;
@@ -33,7 +33,7 @@ gNBs =
# downlinkConfigCommon
#frequencyInfoDL
# this is 3600 MHz + 43 PRBs@30kHz SCS (same as initial BWP)
# this is 3600 MHz + 43 PRBs@30kHz SCS (same as initial BWP), points to Subcarrier 0 of RB#10 of SSB block
absoluteFrequencySSB = 641032;
dl_frequencyBand = 78;
# this is 3600 MHz
@@ -46,13 +46,13 @@ gNBs =
dl_carrierBandwidth = 106;
#initialDownlinkBWP
#genericParameters
# this is RBstart=41,L=24 (275*(L-1))+RBstart
initialDLBWPlocationAndBandwidth = 6368;
# this is RBstart=33 (Start RB of SSB block),L=24 (275*(L-1))+RBstart
initialDLBWPlocationAndBandwidth = 6358; #6368;
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
initialDLBWPsubcarrierSpacing = 1;
#pdcch-ConfigCommon
initialDLBWPcontrolResourceSetZero = 12;
initialDLBWPcontrolResourceSetZero = 0; #12;
initialDLBWPsearchSpaceZero = 0;
#pdsch-ConfigCommon
#pdschTimeDomainAllocationList (up to 16 entries)
@@ -76,7 +76,7 @@ gNBs =
pMax = 20;
#initialUplinkBWP
#genericParameters
initialULBWPlocationAndBandwidth = 6368;
initialULBWPlocationAndBandwidth = 6358;#6368;
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
initialULBWPsubcarrierSpacing = 1;
@@ -33,7 +33,7 @@ gNBs =
# downlinkConfigCommon
#frequencyInfoDL
# this is 3600 MHz + 43 PRBs@30kHz SCS (same as initial BWP)
# this is 3600 MHz + 43 PRBs@30kHz SCS (same as initial BWP). points to Subcarrier 0 of RB#10 of SSB block
absoluteFrequencySSB = 641032;
dl_frequencyBand = 78;
# this is 3600 MHz
@@ -46,13 +46,13 @@ gNBs =
dl_carrierBandwidth = 106;
#initialDownlinkBWP
#genericParameters
# this is RBstart=0,L=50 (275*(L-1))+RBstart
initialDLBWPlocationAndBandwidth = 6368;
# this is RBstart=33 (Start RB of SSB block),L=24 (275*(L-1))+RBstart
initialDLBWPlocationAndBandwidth = 6358; #6368;
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
initialDLBWPsubcarrierSpacing = 1;
#pdcch-ConfigCommon
initialDLBWPcontrolResourceSetZero = 12;
initialDLBWPcontrolResourceSetZero = 0;
initialDLBWPsearchSpaceZero = 0;
#pdsch-ConfigCommon
#pdschTimeDomainAllocationList (up to 16 entries)
@@ -77,7 +77,7 @@ gNBs =
pMax = 20;
#initialUplinkBWP
#genericParameters
initialULBWPlocationAndBandwidth = 6368;
initialULBWPlocationAndBandwidth = 6358; #6368;
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
initialULBWPsubcarrierSpacing = 1;
@@ -33,7 +33,7 @@ gNBs =
# downlinkConfigCommon
#frequencyInfoDL
# this is 3600 MHz + 84 PRBs@30kHz SCS (same as initial BWP)
# this is 3600 MHz + 84 PRBs@30kHz SCS (same as initial BWP). Points to Subcarrier 0 of RB#10 of SSB block
absoluteFrequencySSB = 642016;#642364;
dl_frequencyBand = 78;
# this is 3600 MHz
@@ -46,13 +46,13 @@ gNBs =
dl_carrierBandwidth = 217;
#initialDownlinkBWP
#genericParameters
# this is RBstart=84,L=50 (275*(L-1))+RBstart
initialDLBWPlocationAndBandwidth = 13559;
# this is RBstart=74 (Start RB of SSB block),L=50 (275*(L-1))+RBstart
initialDLBWPlocationAndBandwidth = 13549;
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
initialDLBWPsubcarrierSpacing = 1;
#pdcch-ConfigCommon
initialDLBWPcontrolResourceSetZero = 12;
initialDLBWPcontrolResourceSetZero = 0;
initialDLBWPsearchSpaceZero = 0;
#pdsch-ConfigCommon
#pdschTimeDomainAllocationList (up to 16 entries)
@@ -76,7 +76,7 @@ gNBs =
pMax = 20;
#initialUplinkBWP
#genericParameters
initialULBWPlocationAndBandwidth = 13559;
initialULBWPlocationAndBandwidth = 13549;
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
initialULBWPsubcarrierSpacing = 1;
@@ -233,6 +233,7 @@ L1s = (
{
num_cc = 1;
tr_n_preference = "local_mac";
pusch_proc_threads = 8;
}
);
@@ -275,7 +276,7 @@ log_config :
global_log_verbosity ="medium";
hw_log_level ="info";
hw_log_verbosity ="medium";
phy_log_level ="debug";
phy_log_level ="info";
phy_log_verbosity ="medium";
mac_log_level ="info";
mac_log_verbosity ="high";
@@ -46,13 +46,13 @@ gNBs =
dl_carrierBandwidth = 217;
#initialDownlinkBWP
#genericParameters
# this is RBstart=84,L=50 (275*(L-1))+RBstart
initialDLBWPlocationAndBandwidth = 13559;
# this is RBstart=74,L=50 (275*(L-1))+RBstart
initialDLBWPlocationAndBandwidth = 13549;
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
initialDLBWPsubcarrierSpacing = 1;
#pdcch-ConfigCommon
initialDLBWPcontrolResourceSetZero = 12;
initialDLBWPcontrolResourceSetZero = 0;
initialDLBWPsearchSpaceZero = 0;
#pdsch-ConfigCommon
#pdschTimeDomainAllocationList (up to 16 entries)
@@ -76,7 +76,7 @@ gNBs =
pMax = 20;
#initialUplinkBWP
#genericParameters
initialULBWPlocationAndBandwidth = 13559;
initialULBWPlocationAndBandwidth = 13549;
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
initialULBWPsubcarrierSpacing = 1;
@@ -217,6 +217,7 @@ L1s = (
{
num_cc = 1;
tr_n_preference = "local_mac";
pusch_proc_threads = 8;
}
);
@@ -46,13 +46,13 @@ gNBs =
dl_carrierBandwidth = 273;
#initialDownlinkBWP
#genericParameters
# this is RBstart=84,L=50 (275*(L-1))+RBstart
initialDLBWPlocationAndBandwidth = 13559;
# this is RBstart=74,L=50 (275*(L-1))+RBstart
initialDLBWPlocationAndBandwidth = 13549;
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
initialDLBWPsubcarrierSpacing = 1;
#pdcch-ConfigCommon
initialDLBWPcontrolResourceSetZero = 12;
initialDLBWPcontrolResourceSetZero = 0;
initialDLBWPsearchSpaceZero = 0;
#pdsch-ConfigCommon
#pdschTimeDomainAllocationList (up to 16 entries)
@@ -76,7 +76,7 @@ gNBs =
pMax = 20;
#initialUplinkBWP
#genericParameters
initialULBWPlocationAndBandwidth = 13559;
initialULBWPlocationAndBandwidth = 13549;
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
initialULBWPsubcarrierSpacing = 1;
@@ -217,6 +217,7 @@ L1s = (
{
num_cc = 1;
tr_n_preference = "local_mac";
pusch_proc_threads = 8;
}
);