Fix ulsim and PUSCH in rf-simulator
- initialize PUSCH parameters properly
This commit is contained in:
committed by
Thomas Schlichter
parent
34899cd404
commit
69abec3df1
+36
-2
@@ -355,6 +355,9 @@ void processSlotRX( PHY_VARS_NR_UE *UE, UE_nr_rxtx_proc_t *proc) {
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nr_dcireq_t dcireq;
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nr_scheduled_response_t scheduled_response;
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uint32_t nb_rb, start_rb;
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uint8_t nb_symb_sch, start_symbol, mcs, precod_nbr_layers, harq_pid, rvidx;
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uint16_t n_rnti;
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// Process Rx data for one sub-frame
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if (slot_select_nr(&UE->frame_parms, proc->frame_tx, proc->nr_tti_tx) & NR_DOWNLINK_SLOT) {
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@@ -367,12 +370,38 @@ void processSlotRX( PHY_VARS_NR_UE *UE, UE_nr_rxtx_proc_t *proc) {
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nr_ue_dcireq(&dcireq); //to be replaced with function pointer later
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scheduled_response.dl_config = &dcireq.dl_config_req;
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scheduled_response.ul_config = NULL;
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scheduled_response.ul_config = &dcireq.ul_config_req;
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scheduled_response.tx_request = NULL;
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scheduled_response.module_id = UE->Mod_id;
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scheduled_response.CC_id = 0;
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scheduled_response.frame = proc->frame_rx;
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scheduled_response.slot = proc->nr_tti_rx;
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//--------------------------Temporary configuration-----------------------------//
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n_rnti = 0x1234;
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nb_rb = 50;
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start_rb = 30;
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nb_symb_sch = 12;
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start_symbol = 2;
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precod_nbr_layers = 1;
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mcs = 9;
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harq_pid = 0;
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rvidx = 0;
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//------------------------------------------------------------------------------//
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scheduled_response.ul_config->sfn_slot = NR_UPLINK_SLOT;
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scheduled_response.ul_config->number_pdus = 1;
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scheduled_response.ul_config->ul_config_list[0].pdu_type = FAPI_NR_UL_CONFIG_TYPE_PUSCH;
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scheduled_response.ul_config->ul_config_list[0].ulsch_config_pdu.rnti = n_rnti;
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scheduled_response.ul_config->ul_config_list[0].ulsch_config_pdu.ulsch_pdu_rel15.number_rbs = nb_rb;
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scheduled_response.ul_config->ul_config_list[0].ulsch_config_pdu.ulsch_pdu_rel15.start_rb = start_rb;
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scheduled_response.ul_config->ul_config_list[0].ulsch_config_pdu.ulsch_pdu_rel15.number_symbols = nb_symb_sch;
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scheduled_response.ul_config->ul_config_list[0].ulsch_config_pdu.ulsch_pdu_rel15.start_symbol = start_symbol;
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scheduled_response.ul_config->ul_config_list[0].ulsch_config_pdu.ulsch_pdu_rel15.mcs = mcs;
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scheduled_response.ul_config->ul_config_list[0].ulsch_config_pdu.ulsch_pdu_rel15.ndi = 0;
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scheduled_response.ul_config->ul_config_list[0].ulsch_config_pdu.ulsch_pdu_rel15.rv = rvidx;
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scheduled_response.ul_config->ul_config_list[0].ulsch_config_pdu.ulsch_pdu_rel15.n_layers = precod_nbr_layers;
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scheduled_response.ul_config->ul_config_list[0].ulsch_config_pdu.ulsch_pdu_rel15.harq_process_nbr = harq_pid;
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nr_ue_scheduled_response(&scheduled_response);
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#ifdef UE_SLOT_PARALLELISATION
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@@ -417,6 +446,7 @@ typedef struct processingData_s {
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} processingData_t;
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void UE_processing(void *arg) {
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uint8_t thread_id;
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processingData_t *rxtxD=(processingData_t *) arg;
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UE_nr_rxtx_proc_t *proc = &rxtxD->proc;
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PHY_VARS_NR_UE *UE = rxtxD->UE;
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@@ -433,10 +463,14 @@ void UE_processing(void *arg) {
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#endif
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*/
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if (proc->nr_tti_tx == NR_UPLINK_SLOT || UE->frame_parms.frame_type == FDD){
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thread_id = PHY_vars_UE_g[UE->Mod_id][0]->current_thread_id[proc->nr_tti_tx];
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if (UE->mode != loop_through_memory)
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phy_procedures_nrUE_TX(UE,proc,0,0);
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phy_procedures_nrUE_TX(UE,proc,0,thread_id);
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}
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@@ -167,10 +167,12 @@ uint8_t nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
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uint16_t start_sc, start_rb;
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int8_t Wf[2], Wt[2], l0, l_prime[2], delta;
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uint16_t n_dmrs;
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uint8_t dmrs_type;
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uint8_t dmrs_type, length_dmrs;
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uint8_t mapping_type;
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int ap, start_symbol, i;
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int sample_offsetF;
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int ap, start_symbol, Nid_cell, i;
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int sample_offsetF, N_RE_prime, N_PRB_oh;
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uint16_t n_rnti;
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uint32_t TBS;
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NR_UE_ULSCH_t *ulsch_ue;
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NR_UL_UE_HARQ_t *harq_process_ul_ue;
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@@ -178,12 +180,34 @@ uint8_t nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
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NR_UE_PUSCH *pusch_ue = UE->pusch_vars[thread_id][eNB_id];
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num_of_codewords = 1; // tmp assumption
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length_dmrs = 1;
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n_rnti = 0x1234;
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Nid_cell = 0;
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N_PRB_oh = 0; // higher layer (RRC) parameter xOverhead in PUSCH-ServingCellConfig
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for (cwd_index = 0;cwd_index < num_of_codewords; cwd_index++) {
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ulsch_ue = UE->ulsch[thread_id][eNB_id][cwd_index];
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harq_process_ul_ue = ulsch_ue->harq_processes[harq_pid];
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ulsch_ue->length_dmrs = length_dmrs;
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ulsch_ue->rnti = n_rnti;
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ulsch_ue->Nid_cell = Nid_cell;
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ulsch_ue->Nsc_pusch = harq_process_ul_ue->nb_rb*NR_NB_SC_PER_RB;
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ulsch_ue->Nsymb_pusch = harq_process_ul_ue->number_of_symbols;
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ulsch_ue->nb_re_dmrs = UE->dmrs_UplinkConfig.pusch_maxLength*(UE->dmrs_UplinkConfig.pusch_dmrs_type == pusch_dmrs_type1)?6:4;
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N_RE_prime = NR_NB_SC_PER_RB*harq_process_ul_ue->number_of_symbols - ulsch_ue->nb_re_dmrs - N_PRB_oh;
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harq_process_ul_ue->num_of_mod_symbols = N_RE_prime*harq_process_ul_ue->nb_rb*num_of_codewords;
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TBS = nr_compute_tbs( harq_process_ul_ue->mcs, harq_process_ul_ue->nb_rb, ulsch_ue->Nsymb_pusch, ulsch_ue->nb_re_dmrs, ulsch_ue->length_dmrs, harq_process_ul_ue->Nl);
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harq_process_ul_ue->TBS = TBS;
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/////////////////////////ULSCH coding/////////////////////////
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///////////
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@@ -52,6 +52,7 @@ typedef struct {
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int slot;
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fapi_nr_dl_config_request_t dl_config_req;
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fapi_nr_ul_config_request_t ul_config_req;
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} nr_dcireq_t;
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typedef struct {
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