fixed MPDDCH resource element mappings and DMRS scrambling initialization
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@@ -2218,8 +2218,8 @@ fill_mdci_and_dlsch (PHY_VARS_eNB * eNB, eNB_rxtx_proc_t * proc, mDCI_ALLOC_t *
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((DCI6_1A_10MHz_t *) dci_pdu)->harq_ack_off = rel13->harq_resource_offset;
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((DCI6_1A_10MHz_t *) dci_pdu)->dci_rep = rel13->dci_subframe_repetition_number;
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LOG_I(PHY,"Frame %d, Subframe %d : Programming Format 6-1A DCI, mcs %d, rballoc %x, dci_rep r%d, L %d, narrowband %d, start_symbol %d\n",
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frame,subframe,rel13->mcs,rel13->resource_block_coding,1+rel13->dci_subframe_repetition_number,rel13->aggregation_level,rel13->mpdcch_narrow_band,dci_alloc->start_symbol);
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LOG_I(PHY,"Frame %d, Subframe %d : Programming Format 6-1A DCI, mcs %d, rballoc %x, dci_rep r%d, L %d, narrowband %d, start_symbol %d, TPC %d, ra_flag %d, dci_type %d\n",
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frame,subframe,rel13->mcs,rel13->resource_block_coding,1+rel13->dci_subframe_repetition_number,rel13->aggregation_level,rel13->mpdcch_narrow_band,dci_alloc->start_symbol,rel13->tpc,dci_alloc->ra_flag,rel13->rnti_type);
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break;
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case 100:
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dci_alloc->dci_length = sizeof_DCI6_1A_20MHz_t;
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@@ -2333,7 +2333,7 @@ fill_mdci_and_dlsch (PHY_VARS_eNB * eNB, eNB_rxtx_proc_t * proc, mDCI_ALLOC_t *
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// printf("DCI: Setting subframe_tx for subframe %d\n",subframe);
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dlsch0->subframe_tx[(subframe + 2) % 10] = 1;
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LOG_I(PHY,"PDSCH : resource_block_coding %x",rel13->resource_block_coding);
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LOG_I(PHY,"PDSCH : resource_block_coding %x\n",rel13->resource_block_coding);
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conv_eMTC_rballoc (rel13->resource_block_coding, fp->N_RB_DL, dlsch0_harq->rb_alloc);
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@@ -2360,7 +2360,7 @@ fill_mdci_and_dlsch (PHY_VARS_eNB * eNB, eNB_rxtx_proc_t * proc, mDCI_ALLOC_t *
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dlsch0->harq_mask =0;
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}
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if ((dlsch0->harq_mask & (1 << rel13->harq_process)) > 0) {
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if (rel13->new_data_indicator != dlsch0_harq->ndi)
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if ((rel13->new_data_indicator != dlsch0_harq->ndi)||(dci_alloc->ra_flag==1))
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dlsch0_harq->round = 0;
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} else { // process is inactive, so activate and set round to 0
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dlsch0_harq->round = 0;
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@@ -2369,10 +2369,15 @@ fill_mdci_and_dlsch (PHY_VARS_eNB * eNB, eNB_rxtx_proc_t * proc, mDCI_ALLOC_t *
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if (dlsch0_harq->round == 0) {
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dlsch0_harq->status = ACTIVE;
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// MCS and TBS don't change across HARQ rounds
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dlsch0_harq->TBS = TBStable[get_I_TBS (dlsch0_harq->mcs)][dlsch0_harq->nb_rb - 1];
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dlsch0_harq->mcs = rel13->mcs;
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if (dci_alloc->ra_flag == 0) // get TBS from table using mcs and nb_rb
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dlsch0_harq->TBS = TBStable[get_I_TBS(dlsch0_harq->mcs)][dlsch0_harq->nb_rb-1];
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else if (rel13->tpc == 0) //N1A_PRB=2, get TBS from table using mcs and nb_rb=2
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dlsch0_harq->TBS = TBStable[get_I_TBS(dlsch0_harq->mcs)][1];
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else if (rel13->tpc == 1) //N1A_PRB=3, get TBS from table using mcs and nb_rb=3
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dlsch0_harq->TBS = TBStable[get_I_TBS(dlsch0_harq->mcs)][2];
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LOG_I(PHY,"TBS = %d(%d)\n",dlsch0_harq->TBS,dlsch0_harq->mcs);
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}
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dlsch0->active = 1;
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dlsch0->harq_mask |= (1 << rel13->harq_process);
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@@ -2384,7 +2389,7 @@ fill_mdci_and_dlsch (PHY_VARS_eNB * eNB, eNB_rxtx_proc_t * proc, mDCI_ALLOC_t *
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dlsch0->harq_ids[dlsch0_harq->subframe] = rel13->harq_process;
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dlsch0_harq->pdsch_start = rel13->start_symbol;
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LOG_I(PHY,"Setting DLSCH harq %d to active for %d.%d\n",rel13->harq_process,dlsch0_harq->frame,dlsch0_harq->subframe);
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LOG_I(PHY,"Setting DLSCH harq %d round %d to active for %d.%d\n",rel13->harq_process,dlsch0_harq->round,dlsch0_harq->frame,dlsch0_harq->subframe);
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dlsch0->rnti = rel13->rnti;
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@@ -84,7 +84,8 @@ void mpdcch_scrambling(LTE_DL_FRAME_PARMS * frame_parms, mDCI_ALLOC_t * mdci, ui
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// rule for BL/CE UEs from Section 6.8.B2 in 36.211
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x2 = ((((j0 + j) * Nacc) % 10) << 9) + mdci->dmrs_scrambling_init;
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LOG_I(PHY,"MPDCCH cinit = %x (mdci->dmrs_scrambling_init = %d)\n",
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x2,mdci->dmrs_scrambling_init);
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for (n = 0; n < length; n++) {
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if ((i & 0x1f) == 0) {
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s = lte_gold_generic(&x1, &x2, reset);
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@@ -139,26 +140,33 @@ static uint16_t mpdcch5ss2p109110tab[792];
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void init_mpdcch5ss2tab_normal_regular_subframe_evenNRBDL(PHY_VARS_eNB * eNB)
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{
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int l, k, kmod, re107108 = 0, re109110 = 0;
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int nushift = eNB->frame_parms.Nid_cell % 6;
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int nushiftp3 = (eNB->frame_parms.Nid_cell+3) % 6;
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// NOTE : THIS IS FOR TM1 ONLY FOR NOW!!!!!!!
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LOG_I(PHY, "Inititalizing mpdcch5ss2tab for normal prefix, normal prefix, no PSS/SSS/PBCH, even N_RB_DL\n");
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for (l = 2; l < 14; l++) {
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for (k = 0; k < 72; k++) {
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kmod = k % 12;
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if (((l != 5) && (l != 6) && (l != 12) && (l != 13)) || (kmod == 2) || (kmod == 3) || (kmod == 4) || (kmod == 7) || (kmod == 8) || (kmod == 9)) {
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if ((((l == 4)||(l==11)) && (kmod != nushiftp3) && (kmod != (nushiftp3+6))) ||
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((l == 7) && (kmod != nushift) &&(kmod != (nushift+6)))) { // CS RS
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mpdcch5ss2p109110tab[re109110] = (l * eNB->frame_parms.ofdm_symbol_size) + k;
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mpdcch5ss2p107108tab[re107108] = mpdcch5ss2p109110tab[re109110];
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re107108++;
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re109110++;
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printf("CSRS: l %d, k %d (kmod %d) => re %d\n", l, k, kmod, re107108);
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}
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if (((l!=4)&&(l!=7)&&(l!=11)) &&
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(((l != 5) && (l != 6) && (l != 12) && (l != 13)) || (kmod == 2) || (kmod == 3) || (kmod == 4) || (kmod == 7) || (kmod == 8) || (kmod == 9))) {
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mpdcch5ss2p109110tab[re109110] = (l * eNB->frame_parms.ofdm_symbol_size) + k;
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mpdcch5ss2p107108tab[re107108] = mpdcch5ss2p109110tab[re109110];
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re107108++;
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re109110++;
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printf("l %d, k %d (kmod %d) => re %d\n", l, k, kmod, re107108);
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} else if ((kmod == 0) || (kmod == 5) || (kmod == 10)) {
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mpdcch5ss2p109110tab[re109110++] = (l * eNB->frame_parms.ofdm_symbol_size) + k;
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} else if ((kmod == 1) || (kmod == 6) || (kmod == 11)) {
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mpdcch5ss2p107108tab[re107108++] = (l * eNB->frame_parms.ofdm_symbol_size) + k;
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printf("l %d, k %d (kmod %d) => re %d\n", l, k, kmod, re107108);
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}
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}
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}
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AssertFatal(re107108 == 792, "RE count not equal to 792\n");
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AssertFatal(re107108 == 684, "RE count not equal to 684\n");
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}
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// this table is the allocation of modulated MPDCCH format 5 symbols to REs, antenna ports 107,108
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@@ -295,6 +303,10 @@ void generate_mdci_top(PHY_VARS_eNB * eNB, int frame, int subframe, int16_t amp,
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// Assumption: only handle a single MPDCCH per narrowband
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int nsymb = (fp->Ncp==0) ? 14:12;
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int symbol_offset = (uint32_t)fp->ofdm_symbol_size*(subframe*nsymb);
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LOG_I(PHY, "generate_mdci_top: num_dci %d\n", mpdcch->num_dci);
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for (i = 0; i < mpdcch->num_dci; i++) {
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@@ -310,11 +322,10 @@ void generate_mdci_top(PHY_VARS_eNB * eNB, int frame, int subframe, int16_t amp,
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// These are to avoid unimplemented things
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AssertFatal(mdci->ce_mode == 1, "CE mode (%d) B not activated yet\n", mdci->ce_mode);
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AssertFatal(mdci->L == 24, "Only 2+4 and aggregation 24 for now\n");
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LOG_I(PHY, "mdci %d: rnti %x, L %d, prb_pairs %d, ce_mode %d, i0 %d, ss %d \n", i, mdci->rnti, mdci->L, mdci->number_of_prb_pairs, mdci->ce_mode, mdci->i0, mdci->start_symbol);
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int a_index = mdci->rnti & 3;
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LOG_I(PHY, "mdci %d, length %d: rnti %x, L %d, prb_pairs %d, ce_mode %d, i0 %d, ss %d Ant %d\n", i, mdci->dci_length,mdci->rnti, mdci->L, mdci->number_of_prb_pairs, mdci->ce_mode, mdci->i0, mdci->start_symbol,(a_index<2)?107:109);
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i0 = mdci->i0;
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// antenna index
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int a_index = mdci->rnti & 3;
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if ((mdci->start_symbol == 1) && (a_index < 2)) {
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mpdcchtab = mpdcch5ss1p107108tab;
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@@ -390,7 +401,7 @@ void generate_mdci_top(PHY_VARS_eNB * eNB, int frame, int subframe, int16_t amp,
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int re_offset = fp->first_carrier_offset + (12 * nb_i0) + mdci->narrowband * 12 * 6;
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if (re_offset > fp->ofdm_symbol_size)
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re_offset -= (fp->ofdm_symbol_size - 1);
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int32_t *txF = &txdataF[0][re_offset];
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int32_t *txF = &txdataF[0][symbol_offset+re_offset];
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int32_t yIQ;
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for (i = 0; i < (coded_bits >> 1); i++) {
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@@ -426,17 +437,19 @@ void generate_mdci_top(PHY_VARS_eNB * eNB, int frame, int subframe, int16_t amp,
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idelta = Nacc - 2;
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j0 = (i0 + idelta) / Nacc;
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j = (i - i0) / Nacc;
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j = (absSF - i0) / Nacc;
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uint32_t a = ((((j0 + j) * Nacc) % 10) + 1);
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uint32_t b = ((mdci->dmrs_scrambling_init << 1) + 1) << 16;
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x2 = a * b;
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LOG_I(PHY, "mpdcch_dmrs cinit %d\n", x2);
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x2 = x2 + 2;
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LOG_I(PHY, "mpdcch_dmrs cinit %x (a=%d,b=%d,i0=%d,j0=%d)\n", x2,a,b,i0,j0);
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// add MPDCCH pilots
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int reset = 1;
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//gain_lin_QPSK*=2;
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for (i = 0; i < (24 * 6); i += 2) {
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if ((i & 0x1f) == 0) {
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s = lte_gold_generic(&x1, &x2, reset);
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@@ -444,7 +457,9 @@ void generate_mdci_top(PHY_VARS_eNB * eNB, int frame, int subframe, int16_t amp,
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}
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((int16_t *) & yIQ)[0] = (((s >> (i & 0x1f)) & 1) == 1) ? -gain_lin_QPSK : gain_lin_QPSK;
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((int16_t *) & yIQ)[1] = (((s >> ((i + 1) & 0x1f)) & 1) == 1) ? -gain_lin_QPSK : gain_lin_QPSK;
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txF[off + mpdcch_dmrs_tab[(i >> 1)]] = yIQ;
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txF[mpdcch_dmrs_tab[(i >> 1)]] = yIQ;
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txF[mpdcch_dmrs_tab[1+(i >> 1)]] = yIQ;
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LOG_D(PHY, "mpdcch_dmrs pos %d: %d => (%d,%d)\n", i, off + mpdcch_dmrs_tab[(i >> 1)], ((int16_t *) & yIQ)[0], ((int16_t *) & yIQ)[1]);
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}
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}
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@@ -535,7 +535,7 @@ prach_procedures (PHY_VARS_eNB * eNB,
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eNB->preamble_list_br[ind].preamble_rel8.timing_advance = max_preamble_delay[ind]; //
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eNB->preamble_list_br[ind].preamble_rel8.preamble = max_preamble[ind];
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// note: fid is implicitly 0 here, this is the rule for eMTC RA-RNTI from 36.321, Section 5.1.4
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eNB->preamble_list_br[ind].preamble_rel8.rnti = 1 + subframe + (eNB->prach_vars_br.first_frame[ce_level] % 40);
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eNB->preamble_list_br[ind].preamble_rel8.rnti = 1 + subframe + (60*(eNB->prach_vars_br.first_frame[ce_level] % 40));
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eNB->preamble_list_br[ind].instance_length = 0; //don't know exactly what this is
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eNB->preamble_list_br[ind].preamble_rel13.rach_resource_type = 1 + ce_level; // CE Level
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LOG_D (PHY, "Filling NFAPI indication for RACH %d CELevel %d (mask %x) : TA %d, Preamble %d, rnti %x, rach_resource_type %d\n",
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@@ -275,7 +275,7 @@ generate_Msg2 (module_id_t module_idP, int CC_idP, frame_t frameP, sub_frame_t s
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dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.initial_transmission_sf_io = (frameP * 10) + subframeP;
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dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.transmission_power = 6000; // 0dB
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dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.resource_block_coding = getRIV (6, 0, 6) | (RA_template->msg2_narrowband<<5);
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dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.mcs = 4; // adjust according to size of RAR, 208 bits with N1A_PRB=3
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dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.mcs = 1; // adjust according to size of RAR, 208 bits with N1A_PRB=3
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dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.pdsch_reptition_levels = 4; // fix to 4 for now
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dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.redundancy_version = 0;
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dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.new_data_indicator = 0;
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@@ -286,7 +286,7 @@ generate_Msg2 (module_id_t module_idP, int CC_idP, frame_t frameP, sub_frame_t s
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dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.pmi = 0;
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dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.harq_resource_offset = 0;
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dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.dci_subframe_repetition_number = rep;
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dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.tpc = 1; // N1A_PRB=3 (36.212); => 208 bits for mcs=4, choose mcs according t message size TBD
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dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.tpc = 0; // N1A_PRB=2 (36.212);
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dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.downlink_assignment_index_length = 0;
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dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.downlink_assignment_index = 0;
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dl_config_pdu->mpdcch_pdu.mpdcch_pdu_rel13.allocate_prach_flag = 0;
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