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merge develop-nr

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WEI-TAI CHEN
2018-08-29 04:38:46 -07:00
parent c9eb16cc60 4f37933034
commit 7462e43c02
64 changed files with 2830 additions and 1658 deletions
Download Patch File Download Diff File Expand all files Collapse all files
cmake_targets/CMakeLists.txt
+19 -3
View File
@@ -1122,7 +1122,7 @@ set(PHY_POLARSRC
${OPENAIR1_DIR}/PHY/CODING/nrPolar_tools/nr_crc_byte.c
${OPENAIR1_DIR}/PHY/CODING/nrPolar_tools/nr_polar_bit_insertion.c
${OPENAIR1_DIR}/PHY/CODING/nrPolar_tools/nr_polar_channel_interleaver_pattern.c
${OPENAIR1_DIR}/PHY/CODING/nrPolar_tools/nr_polar_crc.c
# ${OPENAIR1_DIR}/PHY/CODING/nrPolar_tools/nr_polar_crc.c
${OPENAIR1_DIR}/PHY/CODING/nrPolar_tools/nr_polar_decoding_tools.c
${OPENAIR1_DIR}/PHY/CODING/nrPolar_tools/nr_polar_info_bit_pattern.c
${OPENAIR1_DIR}/PHY/CODING/nrPolar_tools/nr_polar_interleaving_pattern.c
@@ -1137,7 +1137,13 @@ set(PHY_POLARSRC
)
set(PHY_TURBOIF
${OPENAIR1_DIR}/PHY/CODING/coding_load.c
)
)
set(PHY_LDPCSRC
${OPENAIR1_DIR}/PHY/CODING/nrLDPC_decoder/nrLDPC_decoder.c
${OPENAIR1_DIR}/PHY/CODING/nrLDPC_encoder/ldpc_encoder.c
${OPENAIR1_DIR}/PHY/CODING/nrLDPC_encoder/ldpc_encoder2.c
${OPENAIR1_DIR}/PHY/CODING/nrLDPC_encoder/ldpc_generate_coefficient.c
)
add_library(coding MODULE ${PHY_TURBOSRC} )
@@ -1299,6 +1305,7 @@ set(PHY_SRC_UE
${OPENAIR1_DIR}/PHY/TOOLS/time_meas.c
${OPENAIR1_DIR}/PHY/TOOLS/lut.c
${PHY_POLARSRC}
${PHY_LDPCSRC}
)
set(PHY_NR_UE_SRC
@@ -1336,6 +1343,7 @@ set(PHY_SRC_UE
${OPENAIR1_DIR}/PHY/TOOLS/lut.c
${OPENAIR1_DIR}/PHY/INIT/nr_init_ue.c
${PHY_POLARSRC}
${PHY_LDPCSRC}
)
@@ -1348,6 +1356,10 @@ if (${COMPILATION_AVX2} STREQUAL "True")
set(PHY_SRC_UE ${PHY_SRC_UE} ${OPENAIR1_DIR}/PHY/LTE_UE_TRANSPORT/dlsch_llr_computation_avx2.c)
endif ()
if (${COMPILATION_AVX2} STREQUAL "True")
set(PHY_NR_UE_SRC ${PHY_NR_UE_SRC} ${OPENAIR1_DIR}/PHY/LTE_UE_TRANSPORT/dlsch_llr_computation_avx2.c)
endif ()
add_library(PHY_COMMON ${PHY_SRC_COMMON})
add_library(PHY ${PHY_SRC})
add_library(PHY_UE ${PHY_SRC_UE})
@@ -1597,6 +1609,7 @@ set ( NR_LTE_UE_REUSE_SRC
${OPENAIR1_DIR}/PHY/LTE_ESTIMATION/lte_dl_channel_estimation.c
${OPENAIR1_DIR}/PHY/LTE_ESTIMATION/lte_ue_measurements.c
${OPENAIR1_DIR}/PHY/LTE_UE_TRANSPORT/dlsch_demodulation.c
#${OPENAIR1_DIR}/PHY/LTE_UE_TRANSPORT/dlsch_llr_computation_avx2.c
)
add_library( NR_LTE_UE_REUSE_LIB
@@ -2485,7 +2498,10 @@ target_link_libraries (dlsim_tm4
)
add_executable(polartest ${OPENAIR1_DIR}/PHY/CODING/TESTBENCH/polartest.c)
target_link_libraries(polartest m SIMU PHY PHY_NR -lm ${ATLAS_LIBRARIES})
target_link_libraries(polartest m SIMU PHY PHY_NR PHY_COMMON -lm ${ATLAS_LIBRARIES})
add_executable(ldpctest ${OPENAIR1_DIR}/PHY/CODING/TESTBENCH/ldpctest.c)
target_link_libraries(ldpctest m SIMU PHY PHY_NR ${ATLAS_LIBRARIES})
foreach(myExe dlsim dlsim_tm7 ulsim pbchsim scansim mbmssim pdcchsim pucchsim prachsim syncsim)
cmake_targets/build_oai
+1 -1
View File
@@ -682,7 +682,7 @@ function main() {
echo_info "Compiling unitary tests simulators"
# TODO: fix: dlsim_tm4 pucchsim prachsim pdcchsim pbchsim mbmssim
#simlist="dlsim_tm4 dlsim ulsim pucchsim prachsim pdcchsim pbchsim mbmssim"
simlist="dlsim ulsim"
simlist="dlsim ulsim polartest ldpctest"
for f in $simlist ; do
compilations \
lte-simulators $f \
nfapi/open-nFAPI/nfapi/public_inc/fapi_nr_ue_constants.h
+34 -1
View File
@@ -10,10 +10,35 @@
#define FAPI_NR_MAX_RA_OCCASION_PER_CSIRS 64
/// RX_IND
#define FAPI_NR_RX_PDU_TYPE_MIB 0x01
#define FAPI_NR_RX_PDU_TYPE_SIB 0x02
#define FAPI_NR_RX_PDU_TYPE_DLSCH 0x03
#define FAPI_NR_DCI_IND 0x04
#define FAPI_NR_SIBS_MASK_SIB1 0x1
/// DCI_IND
#define FAPI_NR_DCI_TYPE_0_0 0x01
#define FAPI_NR_DCI_TYPE_0_1 0x02
#define FAPI_NR_DCI_TYPE_1_0 0x03
#define FAPI_NR_DCI_TYPE_1_1 0x04
#define FAPI_NR_DCI_TYPE_2_0 0x05
#define FAPI_NR_DCI_TYPE_2_1 0x06
#define FAPI_NR_DCI_TYPE_2_2 0x07
#define FAPI_NR_DCI_TYPE_2_3 0x08
/// TX_REQ
/// DL_CONFIG_REQ
#define FAPI_NR_DL_CONFIG_LIST_NUM 10
#define FAPI_NR_DL_CONFIG_TYPE_DCI 0x01
#define FAPI_NR_DL_CONFIG_TYPE_DLSCH 0x02
#define CCE_REG_MAPPING_TYPE_INTERLEAVED 0x01
#define CCE_REG_MAPPING_TYPE_NON_INTERLEAVED 0x02
@@ -21,5 +46,13 @@
#define PRECODER_GRANULARITY_SAME_AS_REG_BUNDLE 0x01
#define PRECODER_GRANULARITY_ALL_CONTIGUOUS_RBS 0x02
/// UL_CONFIG_REQ
#define FAPI_NR_UL_CONFIG_LIST_NUM 10
#define FAPI_NR_UL_CONFIG_TYPE_PRACH 0x01
#define FAPI_NR_UL_CONFIG_TYPE_PUCCH 0x02
#define FAPI_NR_UL_CONFIG_TYPE_PUSCH 0x03
#define FAPI_NR_UL_CONFIG_TYPE_SRS 0x04
#endif
nfapi/open-nFAPI/nfapi/public_inc/fapi_nr_ue_interface.h
+158 -104
View File
@@ -19,79 +19,92 @@
#define _FAPI_NR_UE_INTERFACE_H_
#include "stddef.h"
#include "platform_types.h"
#include "fapi_nr_ue_constants.h"
typedef unsigned int uint32_t;
typedef unsigned short uint16_t;
typedef unsigned char uint8_t;
typedef signed int int32_t;
typedef signed short int16_t;
typedef signed char int8_t;
/*
typedef unsigned int uint32_t;
typedef unsigned short uint16_t;
typedef unsigned char uint8_t;
typedef signed int int32_t;
typedef signed short int16_t;
typedef signed char int8_t;
*/
typedef struct {
// dci pdu
uint8_t dci_format;
uint8_t frequency_domain_resouce_assignment; // 38.214 chapter 5.1.2.2
uint8_t time_domain_resource_assignment; // 38.214 chapter 5.1.2.1
uint8_t frequency_hopping_enabled_flag;
uint8_t frequency_hopping_bits;
uint8_t mcs;
uint8_t new_data_indication;
uint8_t redundancy_version;
uint8_t harq_process;
uint8_t tpc_command;
uint8_t padding_bits;
uint8_t ul_sul_ind;
uint8_t ul_sch_indicator;
uint8_t random_access_preamble_index;
uint8_t ss_pbch_index;
uint8_t prach_mask_index;
uint8_t carrier_indicator;
uint8_t bwp_indndicator;
uint8_t vrb_to_prb_mapping;
uint8_t downlink_assignment_index1;
uint8_t downlink_assignment_index2;
uint8_t srs_resource_indicator;
uint8_t precoding_information;
uint8_t antenna_ports;
uint8_t srs_request;
uint8_t cqi_csi_request;
uint8_t cbg_transmission_information;
uint8_t ptrs_dmrs_association;
uint8_t downlink_assignment_index;
uint8_t pucch_resource_indicator;
uint8_t pdsch_to_harq_feedback_timing_indicator;
uint8_t short_messages_indicator;
uint8_t short_messages;
uint8_t tb_scaling;
uint8_t prb_bundling_size_indicator; // 38.214 chapter 5.1.2.3
uint8_t rate_matching_indicator;
uint8_t zp_csi_rs_trigger;
uint8_t transmission_configuration_indication;
uint8_t cbg_flushing_out_information;
uint8_t slot_format_count;
uint8_t *slot_format_indicators; // 38.213 chapter 11.1.1
uint8_t preemption_indication_count;
uint8_t *preemption_indications; // 38.213 chapter 11.2
uint8_t block_number_count; // for F22 and F23
uint8_t *block_numbers; // for F22 and F23
uint8_t closed_loop_indicator;
uint8_t tpc_command_count;
uint8_t *tpc_command_numbers;
uint8_t dci2_3_srs_request; // 38.212 table 7.3.1.1.2-5
uint8_t dci2_3_tpc_command;
uint8_t identifier_dci_formats ; // 0 IDENTIFIER_DCI_FORMATS:
uint8_t carrier_ind ; // 1 CARRIER_IND: 0 or 3 bits, as defined in Subclause x.x of [5, TS38.213]
uint8_t sul_ind_0_1 ; // 2 SUL_IND_0_1:
uint8_t slot_format_ind ; // 3 SLOT_FORMAT_IND: size of DCI format 2_0 is configurable by higher layers up to 128 bits, according to Subclause 11.1.1 of [5, TS 38.213]
uint8_t pre_emption_ind ; // 4 PRE_EMPTION_IND: size of DCI format 2_1 is configurable by higher layers up to 126 bits, according to Subclause 11.2 of [5, TS 38.213]. Each pre-emption indication is 14 bits
uint8_t tpc_cmd_number ; // 5 TPC_CMD_NUMBER: The parameter xxx provided by higher layers determines the index to the TPC command number for an UL of a cell. Each TPC command number is 2 bits
uint8_t block_number ; // 6 BLOCK_NUMBER: starting position of a block is determined by the parameter startingBitOfFormat2_3
uint8_t bandwidth_part_ind ; // 7 BANDWIDTH_PART_IND:
uint8_t short_message_ind ; // 8 SHORT_MESSAGE_IND:
uint8_t short_messages ; // 9 SHORT_MESSAGES:
uint16_t freq_dom_resource_assignment_UL; // 10 FREQ_DOM_RESOURCE_ASSIGNMENT_UL: PUSCH hopping with resource allocation type 1 not considered
// (NOTE 1) If DCI format 0_0 is monitored in common search space
// and if the number of information bits in the DCI format 0_0 prior to padding
// is larger than the payload size of the DCI format 1_0 monitored in common search space
// the bitwidth of the frequency domain resource allocation field in the DCI format 0_0
// is reduced such that the size of DCI format 0_0 equals to the size of the DCI format 1_0
uint16_t freq_dom_resource_assignment_DL; // 11 FREQ_DOM_RESOURCE_ASSIGNMENT_DL:
uint8_t time_dom_resource_assignment ; // 12 TIME_DOM_RESOURCE_ASSIGNMENT: 0, 1, 2, 3, or 4 bits as defined in Subclause 6.1.2.1 of [6, TS 38.214]. The bitwidth for this field is determined as log2(I) bits,
// where I the number of entries in the higher layer parameter pusch-AllocationList
uint8_t vrb_to_prb_mapping ; // 13 VRB_TO_PRB_MAPPING: 0 bit if only resource allocation type 0
uint8_t prb_bundling_size_ind ; // 14 PRB_BUNDLING_SIZE_IND:0 bit if the higher layer parameter PRB_bundling is not configured or is set to 'static', or 1 bit if the higher layer parameter PRB_bundling is set to 'dynamic' according to Subclause 5.1.2.3 of [6, TS 38.214]
uint8_t rate_matching_ind ; // 15 RATE_MATCHING_IND: 0, 1, or 2 bits according to higher layer parameter rate-match-PDSCH-resource-set
uint8_t zp_csi_rs_trigger ; // 16 ZP_CSI_RS_TRIGGER:
uint8_t freq_hopping_flag ; // 17 FREQ_HOPPING_FLAG: 0 bit if only resource allocation type 0
uint8_t tb1_mcs ; // 18 TB1_MCS:
uint8_t tb1_ndi ; // 19 TB1_NDI:
uint8_t tb1_rv ; // 20 TB1_RV:
uint8_t tb2_mcs ; // 21 TB2_MCS:
uint8_t tb2_ndi ; // 22 TB2_NDI:
uint8_t tb2_rv ; // 23 TB2_RV:
uint8_t mcs ; // 24 MCS:
uint8_t ndi ; // 25 NDI:
uint8_t rv ; // 26 RV:
uint8_t harq_process_number ; // 27 HARQ_PROCESS_NUMBER:
uint8_t dai ; // 28 DAI: For format1_1: 4 if more than one serving cell are configured in the DL and the higher layer parameter HARQ-ACK-codebook=dynamic, where the 2 MSB bits are the counter DAI and the 2 LSB bits are the total DAI
// 2 if one serving cell is configured in the DL and the higher layer parameter HARQ-ACK-codebook=dynamic, where the 2 bits are the counter DAI
// 0 otherwise
uint8_t first_dai ; // 29 FIRST_DAI: (1 or 2 bits) 1 bit for semi-static HARQ-ACK
uint8_t second_dai ; // 30 SECOND_DAI: (0 or 2 bits) 2 bits for dynamic HARQ-ACK codebook with two HARQ-ACK sub-codebooks
uint8_t tb_scaling ; // 31 TB_SCALING:
uint8_t tpc_pusch ; // 32 TPC_PUSCH:
uint8_t tpc_pucch ; // 33 TPC_PUCCH:
uint8_t pucch_resource_ind ; // 34 PUCCH_RESOURCE_IND:
uint8_t pdsch_to_harq_feedback_time_ind ; // 35 PDSCH_TO_HARQ_FEEDBACK_TIME_IND:
uint8_t srs_resource_ind ; // 36 SRS_RESOURCE_IND:
uint8_t precod_nbr_layers ; // 37 PRECOD_NBR_LAYERS:
uint8_t antenna_ports ; // 38 ANTENNA_PORTS:
uint8_t tci ; // 39 TCI: 0 bit if higher layer parameter tci-PresentInDCI is not enabled; otherwise 3 bits
uint8_t srs_request ; // 40 SRS_REQUEST:
uint8_t tpc_cmd_number_format2_3 ; // 41 TPC_CMD_NUMBER_FORMAT2_3:
uint8_t csi_request ; // 42 CSI_REQUEST:
uint8_t cbgti ; // 43 CBGTI: 0, 2, 4, 6, or 8 bits determined by higher layer parameter maxCodeBlockGroupsPerTransportBlock for the PDSCH
uint8_t cbgfi ; // 44 CBGFI: 0 or 1 bit determined by higher layer parameter codeBlockGroupFlushIndicator
uint8_t ptrs_dmrs ; // 45 PTRS_DMRS:
uint8_t beta_offset_ind ; // 46 BETA_OFFSET_IND:
uint8_t dmrs_seq_ini ; // 47 DMRS_SEQ_INI: 1 bit if the cell has two ULs and the number of bits for DCI format 1_0 before padding
// is larger than the number of bits for DCI format 0_0 before padding; 0 bit otherwise
uint8_t ul_sch_ind ; // 48 UL_SCH_IND: value of "1" indicates UL-SCH shall be transmitted on the PUSCH and a value of "0" indicates UL-SCH shall not be transmitted on the PUSCH
uint16_t padding_nr_dci ; // 49 PADDING_NR_DCI: (Note 2) If DCI format 0_0 is monitored in common search space
// and if the number of information bits in the DCI format 0_0 prior to padding
// is less than the payload size of the DCI format 1_0 monitored in common search space
// zeros shall be appended to the DCI format 0_0
// until the payload size equals that of the DCI format 1_0
uint8_t sul_ind_0_0 ; // 50 SUL_IND_0_0:
uint8_t ra_preamble_index ; // 51 RA_PREAMBLE_INDEX:
uint8_t sul_ind_1_0 ; // 52 SUL_IND_1_0:
uint8_t ss_pbch_index ; // 53 SS_PBCH_INDEX
uint8_t prach_mask_index ; // 54 PRACH_MASK_INDEX
uint8_t reserved_nr_dci ; // 55 RESERVED_NR_DCI
} fapi_nr_dci_pdu_rel15_t;
typedef struct {
uint8_t uci_format;
uint8_t uci_channel;
@@ -107,8 +120,10 @@ typedef struct {
typedef struct {
/// frequency_domain_resource;
uint32_t rb_start;
uint32_t rb_end;
//uint32_t rb_start;
//uint32_t rb_end;
uint64_t frequency_domain_resource;
uint16_t rb_offset;
uint8_t duration;
uint8_t cce_reg_mapping_type; // interleaved or noninterleaved
@@ -116,10 +131,10 @@ typedef struct {
uint8_t cce_reg_interleaved_interleaver_size; // valid if CCE to REG mapping type is interleaved type
uint8_t cce_reg_interleaved_shift_index; // valid if CCE to REG mapping type is interleaved type
uint8_t precoder_granularity;
uint8_t tci_state_pdcch;
uint8_t tci_present_in_dci;
uint16_t pdcch_dmrs_scrambling_id;
uint8_t tci_state_pdcch;
uint8_t tci_present_in_dci;
} fapi_nr_coreset_t;
//
@@ -134,20 +149,16 @@ typedef struct {
typedef struct {
uint16_t rnti;
uint8_t dci_type;
uint8_t dci_size;
uint8_t dci_format;
fapi_nr_dci_pdu_rel15_t dci;
} fapi_nr_dci_indication_pdu_t;
typedef struct {
uint16_t number_of_dcis;
fapi_nr_dci_indication_pdu_t* dci_list;
} fapi_nr_dci_indication_body_t;
///
typedef struct {
uint32_t sfn_slot;
fapi_nr_dci_indication_body_t dci_indication_body;
uint16_t number_of_dcis;
fapi_nr_dci_indication_pdu_t dci_list[10];
} fapi_nr_dci_indication_t;
@@ -160,12 +171,15 @@ typedef struct {
uint8_t* pdu; // 3bytes
uint8_t additional_bits;
uint8_t ssb_index;
uint8_t l_ssb;
uint8_t ssb_length;
uint16_t cell_id;
} fapi_nr_mib_pdu_t;
typedef struct {
uint32_t pdu_length;
uint8_t* pdu;
uint32_t sibs_mask;
} fapi_nr_sib_pdu_t;
typedef struct {
@@ -175,13 +189,13 @@ typedef struct {
fapi_nr_mib_pdu_t mib_pdu;
fapi_nr_sib_pdu_t sib_pdu;
};
} fapi_nr_rx_request_body_t;
} fapi_nr_rx_indication_body_t;
///
typedef struct {
uint32_t sfn_slot;
uint16_t number_pdus;
fapi_nr_rx_request_body_t *rx_request_body;
fapi_nr_rx_indication_body_t *rx_indication_body;
} fapi_nr_rx_indication_t;
typedef struct {
@@ -192,38 +206,71 @@ typedef struct {
typedef struct {
uint16_t pdu_length;
uint16_t pdu_index;
uint16_t pdu_index;
uint8_t* pdu;
} fapi_nr_tx_request_pdu_t;
typedef struct {
fapi_nr_tx_config_t tx_config;
uint16_t number_of_pdus;
fapi_nr_tx_request_pdu_t* tx_pdu_list;
} fapi_nr_tx_request_body_t;
///
typedef struct {
uint32_t sfn_slot;
fapi_nr_tx_request_body_t tx_request_body;
fapi_nr_tx_config_t tx_config;
uint16_t number_of_pdus;
fapi_nr_tx_request_body_t *tx_request_body;
} fapi_nr_tx_request_t;
typedef struct {
uint8_t preamble_index;
uint8_t prach_configuration_index;
uint16_t preamble_length;
uint8_t power_ramping_step;
uint16_t preamble_received_target_power;
uint8_t msg1_fdm;
uint8_t msg1_frequency_start;
uint8_t zero_correlation_zone_config;
uint8_t subcarrier_spacing;
uint8_t restrictedset_config;
uint16_t root_sequence_index;
uint16_t rsrp_threshold_ssb;
uint16_t rsrp_threshold_sul;
} fapi_nr_ul_config_prach_pdu;
typedef struct {
} fapi_nr_ul_config_pucch_pdu;
typedef struct {
uint16_t number_rbs;
uint16_t start_rb;
uint16_t number_symbols;
uint16_t start_symbol;
uint8_t mcs;
uint8_t tpc_command;
uint8_t rv;
} fapi_nr_ul_config_pusch_pdu_rel15_t;
typedef struct {
uint16_t rnti;
fapi_nr_ul_config_pusch_pdu_rel15_t ulsch_pdu_rel15;
} fapi_nr_ul_config_pusch_pdu;
typedef struct {
} fapi_nr_ul_config_srs_pdu;
typedef struct {
uint8_t pdu_type;
uint8_t pdu_size;
union {
fapi_nr_ul_config_prach_pdu prach_config_pdu;
fapi_nr_ul_config_pucch_pdu pucch_config_pdu;
fapi_nr_ul_config_pusch_pdu ulsch_config_pdu;
fapi_nr_ul_config_srs_pdu srs_config_pdu;
};
} fapi_nr_ul_config_request_pdu_t;
typedef struct {
fapi_nr_ul_config_request_pdu_t ul_config_pdu_list;
} fapi_nr_ul_config_request_body_t;
///
typedef struct {
uint32_t sfn_slot;
fapi_nr_ul_config_request_body_t ul_config_request_body;
uint8_t number_pdus;
fapi_nr_ul_config_request_pdu_t ul_config_list[FAPI_NR_UL_CONFIG_LIST_NUM];
} fapi_nr_ul_config_request_t;
@@ -245,27 +292,34 @@ typedef struct {
} fapi_nr_dl_config_dci_pdu;
typedef struct {
uint16_t rnti;
fapi_nr_dci_pdu_rel15_t dci_config;
uint16_t number_rbs;
uint16_t start_rb;
uint16_t number_symbols;
uint16_t start_symbol;
uint8_t mcs;
uint8_t rv;
uint8_t harq_pid;
uint8_t ndi;
// TODO: check the fields needed to L1 with NR_DL_UE_HARQ_t and NR_UE_DLSCH_t
} fapi_nr_dl_config_dlsch_pdu_rel15_t;
typedef struct {
uint16_t rnti;
fapi_nr_dl_config_dlsch_pdu_rel15_t dlsch_config_rel15;
} fapi_nr_dl_config_dlsch_pdu;
typedef struct {
uint8_t pdu_type;
uint8_t pdu_size;
union {
fapi_nr_dl_config_dci_pdu dci_pdu;
fapi_nr_dl_config_dlsch_pdu dlsch_pdu;
fapi_nr_dl_config_dci_pdu dci_config_pdu;
fapi_nr_dl_config_dlsch_pdu dlsch_config_pdu;
};
} fapi_nr_dl_config_request_pdu_t;
typedef struct {
uint32_t sfn_slot;
uint8_t number_pdus;
fapi_nr_dl_config_request_pdu_t dl_config_request_body[10]; // TODO MARCO
fapi_nr_dl_config_request_pdu_t dl_config_list[FAPI_NR_DL_CONFIG_LIST_NUM];
} fapi_nr_dl_config_request_t;
@@ -727,4 +781,4 @@ typedef struct {
} fapi_nr_config_request_t;
#endif /* _FAPI_INTERFACE_H_ */
#endif
openair1/PHY/CODING/TESTBENCH/ldpctest.c
+76 -63
View File
@@ -25,8 +25,18 @@
#include <string.h>
#include "SIMULATION/TOOLS/sim.h"
#include "PHY/CODING/nrLDPC_encoder/defs.h"
#include "PHY/CODING/nrLDPC_decoder/nrLDPC_decoder.h"
#define MAX_NUM_DLSCH_SEGMENTS 16
#ifndef malloc16
# ifdef __AVX2__
# define malloc16(x) memalign(32,x)
# else
# define malloc16(x) memalign(16,x)
# endif
#endif
// 4-bit quantizer
char quantize4bit(double D,double x)
@@ -62,11 +72,11 @@ char quantize(double D,double x,unsigned char B)
#define MAX_BLOCK_LENGTH 8448
int test_ldpc(short No_iteration,
int nom_rate,
int denom_rate,
//int nom_rate,
//int denom_rate,
double SNR,
unsigned char qbits,
short block_length,
unsigned short block_length,
unsigned int ntrials,
unsigned int *errors,
unsigned int *crc_misses)
@@ -85,12 +95,14 @@ int test_ldpc(short No_iteration,
double *modulated_input;
char *channel_output_fixed;
unsigned int i,j,trial=0;
short BG,Zc,Kb,nrows,ncols;
int no_punctured_columns,removed_bit;
short BG,Zc,Kb;
//short nrows,ncols;
//int no_punctured_columns,removed_bit;
int i1;
//Table of possible lifting sizes
short lift_size[51]= {2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,18,20,22,24,26,28,30,32,36,40,44,48,52,56,60,64,72,80,88,96,104,112,120,128,144,160,176,192,208,224,240,256,288,320,352,384};
int n_segments=8;
int N; //length encoded block
t_nrLDPC_dec_params decParams;
int n_iter;
@@ -107,7 +119,9 @@ int test_ldpc(short No_iteration,
modulated_input = (double *)malloc(sizeof(double) * 68*384);
channel_output = (double *)malloc(sizeof(double) * 68*384);
channel_output_fixed = (char *)malloc16(sizeof(char) * 68*384);
estimated_output = (unsigned char*) malloc16(sizeof(unsigned char) * block_length/8);
estimated_output = (unsigned char*) malloc16(sizeof(unsigned char) * block_length);
memset(channel_output_fixed,0,sizeof(char) * 68*384);
reset_meas(&time);
reset_meas(&time_optim);
@@ -124,18 +138,18 @@ int test_ldpc(short No_iteration,
}
//determine number of bits in codeword
//if (block_length>3840)
if ((block_length>3840) && (block_length <= MAX_BLOCK_LENGTH))
{
BG=1;
Kb = 22;
nrows=46; //parity check bits
ncols=22; //info bits
//nrows=46; //parity check bits
//ncols=22; //info bits
}
/*else if (block_length<=3840)
else if (block_length<=3840)
{
BG=2;
nrows=42; //parity check bits
ncols=10; // info bits
//nrows=42; //parity check bits
//ncols=10; // info bits
if (block_length>640)
Kb = 10;
@@ -145,11 +159,14 @@ int test_ldpc(short No_iteration,
Kb = 8;
else
Kb = 6;
}*/
}
else {
printf("block_length %d not supported\n",block_length);
exit(-1);
}
//find minimum value in all sets of lifting size
Zc=0;
for (i1=0; i1 < 51; i1++)
{
if (lift_size[i1] >= (double) block_length/Kb)
@@ -160,12 +177,17 @@ int test_ldpc(short No_iteration,
}
}
printf("ldpc_test: block_length %d, BG %d, Zc %d, Kb %d\n",block_length,BG, Zc, Kb);
no_punctured_columns=(int)((nrows-2)*Zc+block_length-block_length*(1/((float)nom_rate/(float)denom_rate)))/Zc;
if (BG==1)
N=66*Zc;
else if (BG==2)
N=50*Zc;
printf("ldpc_test: block_length %d, BG %d, Zc %d, Kb %d, N %d\n",block_length,BG, Zc, Kb, N);
//no_punctured_columns=(int)((nrows-2)*Zc+block_length-block_length*(1/((float)nom_rate/(float)denom_rate)))/Zc;
// printf("puncture:%d\n",no_punctured_columns);
removed_bit=(nrows-no_punctured_columns-2) * Zc+block_length-(int)(block_length/((float)nom_rate/(float)denom_rate));
//removed_bit=(nrows-no_punctured_columns-2) * Zc+block_length-(int)(block_length/((float)nom_rate/(float)denom_rate));
if (ntrials==0)
ldpc_encoder_orig(test_input[0],channel_input[0], block_length, nom_rate, denom_rate, 1);
ldpc_encoder_orig(test_input[0],channel_input[0], block_length, BG, 1);
for (trial=0; trial < ntrials; trial++)
{
@@ -173,20 +195,20 @@ int test_ldpc(short No_iteration,
//// encoder
start_meas(&time);
for(j=0;j<n_segments;j++) {
ldpc_encoder_orig(test_input[j], channel_input[j],block_length,nom_rate,denom_rate,0);
ldpc_encoder_orig(test_input[j], channel_input[j],block_length,BG,0);
}
stop_meas(&time);
start_meas(&time_optim);
ldpc_encoder_optim_8seg(test_input,channel_input_optim,block_length,nom_rate,denom_rate,n_segments,&tinput,&tprep,&tparity,&toutput);
ldpc_encoder_optim_8seg(test_input,channel_input_optim,block_length,BG,n_segments,&tinput,&tprep,&tparity,&toutput);
/*for(j=0;j<n_segments;j++) {
ldpc_encoder_optim(test_input[j],channel_input_optim[j],block_length,nom_rate,denom_rate,&tinput,&tprep,&tparity,&toutput);
ldpc_encoder_optim(test_input[j],channel_input_optim[j],block_length,BG,&tinput,&tprep,&tparity,&toutput);
}*/
stop_meas(&time_optim);
if (ntrials==1)
for (j=0;j<n_segments;j++)
for (i = 0; i < block_length+(nrows-no_punctured_columns) * Zc - removed_bit; i++)
for (i = 0; i < 3*block_length; i++)
if (channel_input[j][i]!=channel_input_optim[j][i]) {
printf("differ in seg %d pos %d (%d,%d)\n",j,i,channel_input[j][i],channel_input_optim[j][i]);
return (-1);
@@ -198,10 +220,7 @@ int test_ldpc(short No_iteration,
//printf("channel_input[%d]=%d\n",i,channel_input[i]);
//printf("%d ",channel_input[i]);
//if ((BG==2) && (Zc==128||Zc==256))
if (0)
{
for (i = 2*Zc; i < (Kb+nrows-no_punctured_columns) * Zc-removed_bit; i++)
for (i = 2*Zc; i < 3*block_length; i++)
{
#ifdef DEBUG_CODER
if ((i&0xf)==0)
@@ -209,25 +228,26 @@ int test_ldpc(short No_iteration,
#endif
if (channel_input[0][i-2*Zc]==0)
modulated_input[i]=1/sqrt(2); //QPSK
modulated_input[i]=1/sqrt(2); //BPSK
else
modulated_input[i]=-1/sqrt(2);
channel_output[i] = modulated_input[i] + gaussdouble(0.0,1.0) * 1/sqrt(2*SNR);
channel_output_fixed[i] = (char) ((channel_output[i]*128)<0?(channel_output[i]*128-0.5):(channel_output[i]*128+0.5)); //fixed point 9-7
//printf("llr[%d]=%d\n",i,channel_output_fixed[i]);
if (channel_output[i]>1.0)
channel_output_fixed[i]=127;
else if (channel_output[i]<-1.0)
channel_output_fixed[i]=-128;
else
channel_output_fixed[i] = (char) ((channel_output[i]*128)<0?(channel_output[i]*128-0.5):(channel_output[i]*128+0.5)); //fixed point 9-7
//printf("llr[%d]=%d (%f)\n",i,channel_output_fixed[i],channel_output[i]);
}
//for (i=(Kb+nrows) * Zc-5;i<(Kb+nrows) * Zc;i++)
//{
// printf("channel_input[%d]=%d\n",i,channel_input[i]);
//printf("%lf %d\n",channel_output[i], channel_output_fixed[i]);
//printf("v[%d]=%lf\n",i,modulated_input[i]);}
#ifdef DEBUG_CODER
printf("\n");
exit(-1);
#endif
/*
the LDPC decoder supports several rates and the input has to be adapted accordingly (by padding with zeros to the next lower supported rate). Moreover, the first 2*Z LLRs are zero (since they are punctured and not transmitted) then you have the LLRs corresponding to the systematic bits. After that come the filler bits, the encoder uses 0 for the filler bits hence for the decoder you need to put 127 (max LLR for bit 0) at their place. Then come the LLRs corresponding to the punctured bits followed by zeros to pad for the supported decoder rate.
*/
for (i=0;i<2*Zc;i++)
channel_output_fixed[i] = 0;
decParams.BG=BG;
decParams.Z=Zc;
decParams.R=13;
@@ -236,9 +256,9 @@ int test_ldpc(short No_iteration,
// decode the sequence
// decoder supports BG2, Z=128 & 256
//esimated_output=ldpc_decoder(channel_output_fixed, block_length, No_iteration, (double)((float)nom_rate/(float)denom_rate));
//estimated_output=ldpc_decoder(channel_output_fixed, block_length, No_iteration, (double)((float)nom_rate/(float)denom_rate));
nrLDPC_decoder(&decParams, channel_output_fixed, estimated_output, NULL);
n_iter = nrLDPC_decoder(&decParams, (int8_t*) channel_output_fixed, (int8_t*) estimated_output, NULL);
//for (i=(Kb+nrows) * Zc-5;i<(Kb+nrows) * Zc;i++)
// printf("esimated_output[%d]=%d\n",i,esimated_output[i]);
@@ -248,15 +268,12 @@ int test_ldpc(short No_iteration,
{
if (estimated_output[i] != test_input[0][i])
{
//printf("error pos %d (%d, %d)\n",i,estimated_output[i],test_input[i]);
printf("error pos %d (%d, %d)\n",i,estimated_output[i],test_input[0][i]);
*errors = (*errors) + 1;
break;
}
}
}
/*else if (trial==0)
printf("decoder is not supported\n");*/
}
for(j=0;j<MAX_NUM_DLSCH_SEGMENTS;j++) {
@@ -284,8 +301,8 @@ int main(int argc, char *argv[])
short block_length=576; // decoder supports length: 1201 -> 1280, 2401 -> 2560
short No_iteration=25;
//double rate=0.333;
int nom_rate=1;
int denom_rate=3;
//int nom_rate=1;
//int denom_rate=3;
double SNR0=-2.0,SNR,SNR_lin;
unsigned char qbits=4;
unsigned int decoded_errors[100]; // initiate the size of matrix equivalent to size of SNR
@@ -295,21 +312,13 @@ int main(int argc, char *argv[])
randominit(0);
while ((c = getopt (argc, argv, "q:r:s:l:n:d:")) != -1)
while ((c = getopt (argc, argv, "q:s:l:n:h")) != -1)
switch (c)
{
case 'q':
qbits = atoi(optarg);
break;
case 'r':
nom_rate = atoi(optarg);
break;
case 'd':
denom_rate = atoi(optarg);
break;
case 'l':
block_length = atoi(optarg);
break;
@@ -323,21 +332,25 @@ int main(int argc, char *argv[])
break;
default:
abort ();
case 'h':
printf("usage ldpctest -h -l blocklength -n n_trials -s SNR\n");
exit(0);
}
printf("the decoder supports BG2, Kb=10, Z=128 & 256\n");
printf(" range of blocklength: 1201 -> 1280, 2401 -> 2560\n");
//printf("the decoder supports BG2, Kb=10, Z=128 & 256\n");
//printf(" range of blocklength: 1201 -> 1280, 2401 -> 2560\n");
//printf("rate: %d/%d\n",nom_rate,denom_rate);
printf("block length %d: \n", block_length);
printf("rate: %d/%d\n",nom_rate,denom_rate);
printf("n_trials %d: \n", n_trials);
printf("SNR0 %f: \n", SNR0);
//for (block_length=8;block_length<=MAX_BLOCK_LENGTH;block_length+=8)
for (SNR=SNR0;SNR<SNR0+1.0;SNR+=1.0)
{
SNR_lin = pow(10,SNR/10);
decoded_errors[i]=test_ldpc(No_iteration,
nom_rate,
denom_rate,
//nom_rate,
//denom_rate,
SNR_lin, // noise standard deviation
qbits,
block_length, // block length bytes
openair1/PHY/CODING/TESTBENCH/polartest.c
+29 -15
View File
@@ -8,6 +8,7 @@
#include "PHY/CODING/nrPolar_tools/nr_polar_defs.h"
#include "PHY/CODING/nrPolar_tools/nr_polar_pbch_defs.h"
#include "PHY/CODING/nrPolar_tools/nr_polar_uci_defs.h"
#include "SIMULATION/TOOLS/sim.h"
int main(int argc, char *argv[]) {
@@ -32,7 +33,7 @@ int main(int argc, char *argv[]) {
uint8_t decoderListSize = 8, pathMetricAppr = 0; //0 --> eq. (8a) and (11b), 1 --> eq. (9) and (12)
while ((arguments = getopt (argc, argv, "s:d:f:m:i:l:a:")) != -1)
while ((arguments = getopt (argc, argv, "s:d:f:m:i:l:a:h")) != -1)
switch (arguments)
{
case 's':
@@ -64,21 +65,33 @@ int main(int argc, char *argv[]) {
pathMetricAppr = (uint8_t) atoi(optarg);
break;
case 'h':
printf("./polartest -s SNRstart -d SNRinc -f SNRstop -m [0=DCI|1=PBCH|2=UCI] -i iterations -l decoderListSize -a pathMetricAppr\n");
exit(-1);
default:
perror("[polartest.c] Problem at argument parsing with getopt");
abort ();
exit(-1);
}
if (polarMessageType == 0) { //DCI
//testLength = ;
//coderLength = ;
//testLength = ;
//coderLength = ;
printf("polartest for DCI not supported yet\n");
exit(-1);
} else if (polarMessageType == 1) { //PBCH
testLength = NR_POLAR_PBCH_PAYLOAD_BITS;
coderLength = NR_POLAR_PBCH_E;
testLength = NR_POLAR_PBCH_PAYLOAD_BITS;
coderLength = NR_POLAR_PBCH_E;
printf("running polartest for PBCH\n");
} else if (polarMessageType == 2) { //UCI
//testLength = ;
//coderLength = ;
testLength = NR_POLAR_PUCCH_PAYLOAD_BITS;
coderLength = NR_POLAR_PUCCH_E;
printf("running polartest for UCI");
} else {
printf("unsupported polarMessageType %d (0=DCI, 1=PBCH, 2=UCI)\n",polarMessageType);
exit(-1);
}
//Logging
time_t currentTime;
@@ -96,12 +109,12 @@ int main(int argc, char *argv[]) {
if (stat(folderName, &folder) == -1) mkdir(folderName, S_IRWXU | S_IRWXG | S_IRWXO);
FILE* logFile;
logFile = fopen(fileName, "w");
if (logFile==NULL) {
fprintf(stderr,"[polartest.c] Problem creating file %s with fopen\n",fileName);
exit(-1);
}
fprintf(logFile,",SNR,nBitError,blockErrorState,t_encoder[us],t_decoder[us]\n");
logFile = fopen(fileName, "w");
if (logFile==NULL) {
fprintf(stderr,"[polartest.c] Problem creating file %s with fopen\n",fileName);
exit(-1);
}
fprintf(logFile,",SNR,nBitError,blockErrorState,t_encoder[us],t_decoder[us]\n");
uint8_t *testInput = malloc(sizeof(uint8_t) * testLength); //generate randomly
uint8_t *encoderOutput = malloc(sizeof(uint8_t) * coderLength);
@@ -121,7 +134,8 @@ int main(int argc, char *argv[]) {
SNR_lin = pow(10, SNR/10);
for (itr = 1; itr <= iterations; itr++) {
for(int i=0; i<testLength; i++) testInput[i]=(uint8_t) (rand() % 2);
for(int i=0; i<testLength; i++)
testInput[i]=(uint8_t) (rand() % 2);
start_meas(&timeEncoder);
polar_encoder(testInput, encoderOutput, &nrPolar_params);
openair1/PHY/CODING/crc_byte.c
+204 -136
View File
@@ -30,196 +30,264 @@
Modified in June, 2001, to include the length non multiple of 8
*/
#include "PHY/types.h"
// For initialization && verification purposes, bit by bit implementation with any polynomial
// The first bit is in the MSB of each byte
#include "coding_defs.h"
// Reference 38.212 V15.1.1 Section 5.1 (36-212 v8.6.0 , pp 8-9)
// The highest degree is set by default
/** 1000 0110 0100 1100 1111 1011 D^24 + D^23 + D^18 + D^17 + D^14 + D^11 + D^10 + D^7 + D^6 + D^5 + D^4 + D^3 + D + 1 */
static const uint32_t poly24a = 0x864cfb00;
/** 1000 0000 0000 0000 0110 0011 D^24 + D^23 + D^6 + D^5 + D + 1 */
static const uint32_t poly24b = 0x80006300;
/** 0001 0000 0010 0001 D^16 + D^12 + D^5 + 1 */
static const uint32_t poly16 = 0x10210000;
/** 1000 0000 1111 D^12 + D^11 + D^3 + D^2 + D + 1 */
static const uint32_t poly12 = 0x80F00000;
/** 1001 1011 D^8 + D^7 + D^4 + D^3 + D + 1 */
static const uint32_t poly8 = 0x9B000000;
/*ref 36-212 v8.6.0 , pp 8-9 */
/* the highest degree is set by default */
unsigned int poly24a = 0x864cfb00; //1000 0110 0100 1100 1111 1011 D^24 + D^23 + D^18 + D^17 + D^14 + D^11 + D^10 + D^7 + D^6 + D^5 + D^4 + D^3 + D + 1
unsigned int poly24b = 0x80006300; // 1000 0000 0000 0000 0110 0011 D^24 + D^23 + D^6 + D^5 + D + 1
uint32_t poly24c = 0xB2B11700; //101100101011000100010111
unsigned int poly16 = 0x10210000; // 0001 0000 0010 0001 D^16 + D^12 + D^5 + 1
unsigned int poly12 = 0x80F00000; // 1000 0000 1111 D^12 + D^11 + D^3 + D^2 + D + 1
unsigned int poly8 = 0x9B000000; // 1001 1011 D^8 + D^7 + D^4 + D^3 + D + 1
uint32_t poly6 = 0x84000000; // 10000100000... -> D^6+D^5+1
uint32_t poly11 = 0xc4200000; //11000100001000... -> D^11+D^10+D^9+D^5+1
// The following arrays are generated with the function 'crcTableInit'
/** Encoding table for CRC 24A */
static const uint32_t crc24aTable[256] = {0x0, 0x864cfb00, 0x8ad50d00, 0xc99f600, 0x93e6e100, 0x15aa1a00, 0x1933ec00, 0x9f7f1700, 0xa1813900, 0x27cdc200, 0x2b543400, 0xad18cf00, 0x3267d800, 0xb42b2300, 0xb8b2d500, 0x3efe2e00, 0xc54e8900, 0x43027200, 0x4f9b8400, 0xc9d77f00, 0x56a86800, 0xd0e49300, 0xdc7d6500, 0x5a319e00, 0x64cfb000, 0xe2834b00, 0xee1abd00, 0x68564600, 0xf7295100, 0x7165aa00, 0x7dfc5c00, 0xfbb0a700, 0xcd1e900, 0x8a9d1200, 0x8604e400, 0x481f00, 0x9f370800, 0x197bf300, 0x15e20500, 0x93aefe00, 0xad50d000, 0x2b1c2b00, 0x2785dd00, 0xa1c92600, 0x3eb63100, 0xb8faca00, 0xb4633c00, 0x322fc700, 0xc99f6000, 0x4fd39b00, 0x434a6d00, 0xc5069600, 0x5a798100, 0xdc357a00, 0xd0ac8c00, 0x56e07700, 0x681e5900, 0xee52a200, 0xe2cb5400, 0x6487af00, 0xfbf8b800, 0x7db44300, 0x712db500, 0xf7614e00, 0x19a3d200, 0x9fef2900, 0x9376df00, 0x153a2400, 0x8a453300, 0xc09c800, 0x903e00, 0x86dcc500, 0xb822eb00, 0x3e6e1000, 0x32f7e600, 0xb4bb1d00, 0x2bc40a00, 0xad88f100, 0xa1110700, 0x275dfc00, 0xdced5b00, 0x5aa1a000, 0x56385600, 0xd074ad00, 0x4f0bba00, 0xc9474100, 0xc5deb700, 0x43924c00, 0x7d6c6200, 0xfb209900, 0xf7b96f00, 0x71f59400, 0xee8a8300, 0x68c67800, 0x645f8e00, 0xe2137500, 0x15723b00, 0x933ec000, 0x9fa73600, 0x19ebcd00, 0x8694da00, 0xd82100, 0xc41d700, 0x8a0d2c00, 0xb4f30200, 0x32bff900, 0x3e260f00, 0xb86af400, 0x2715e300, 0xa1591800, 0xadc0ee00, 0x2b8c1500, 0xd03cb200, 0x56704900, 0x5ae9bf00, 0xdca54400, 0x43da5300, 0xc596a800, 0xc90f5e00, 0x4f43a500, 0x71bd8b00, 0xf7f17000, 0xfb688600, 0x7d247d00, 0xe25b6a00, 0x64179100, 0x688e6700, 0xeec29c00, 0x3347a400, 0xb50b5f00, 0xb992a900, 0x3fde5200, 0xa0a14500, 0x26edbe00, 0x2a744800, 0xac38b300, 0x92c69d00, 0x148a6600, 0x18139000, 0x9e5f6b00, 0x1207c00, 0x876c8700, 0x8bf57100, 0xdb98a00, 0xf6092d00, 0x7045d600, 0x7cdc2000, 0xfa90db00, 0x65efcc00, 0xe3a33700, 0xef3ac100, 0x69763a00, 0x57881400, 0xd1c4ef00, 0xdd5d1900, 0x5b11e200, 0xc46ef500, 0x42220e00, 0x4ebbf800, 0xc8f70300, 0x3f964d00, 0xb9dab600, 0xb5434000, 0x330fbb00, 0xac70ac00, 0x2a3c5700, 0x26a5a100, 0xa0e95a00, 0x9e177400, 0x185b8f00, 0x14c27900, 0x928e8200, 0xdf19500, 0x8bbd6e00, 0x87249800, 0x1686300, 0xfad8c400, 0x7c943f00, 0x700dc900, 0xf6413200, 0x693e2500, 0xef72de00, 0xe3eb2800, 0x65a7d300, 0x5b59fd00, 0xdd150600, 0xd18cf000, 0x57c00b00, 0xc8bf1c00, 0x4ef3e700, 0x426a1100, 0xc426ea00, 0x2ae47600, 0xaca88d00, 0xa0317b00, 0x267d8000, 0xb9029700, 0x3f4e6c00, 0x33d79a00, 0xb59b6100, 0x8b654f00, 0xd29b400, 0x1b04200, 0x87fcb900, 0x1883ae00, 0x9ecf5500, 0x9256a300, 0x141a5800, 0xefaaff00, 0x69e60400, 0x657ff200, 0xe3330900, 0x7c4c1e00, 0xfa00e500, 0xf6991300, 0x70d5e800, 0x4e2bc600, 0xc8673d00, 0xc4fecb00, 0x42b23000, 0xddcd2700, 0x5b81dc00, 0x57182a00, 0xd154d100, 0x26359f00, 0xa0796400, 0xace09200, 0x2aac6900, 0xb5d37e00, 0x339f8500, 0x3f067300, 0xb94a8800, 0x87b4a600, 0x1f85d00, 0xd61ab00, 0x8b2d5000, 0x14524700, 0x921ebc00, 0x9e874a00, 0x18cbb100, 0xe37b1600, 0x6537ed00, 0x69ae1b00, 0xefe2e000, 0x709df700, 0xf6d10c00, 0xfa48fa00, 0x7c040100, 0x42fa2f00, 0xc4b6d400, 0xc82f2200, 0x4e63d900, 0xd11cce00, 0x57503500, 0x5bc9c300, 0xdd853800};
/*********************************************************
/** Encoding table for CRC 24B */
static const uint32_t crc24bTable[256] = {0x0, 0x80006300, 0x8000a500, 0xc600, 0x80012900, 0x14a00, 0x18c00, 0x8001ef00, 0x80023100, 0x25200, 0x29400, 0x8002f700, 0x31800, 0x80037b00, 0x8003bd00, 0x3de00, 0x80040100, 0x46200, 0x4a400, 0x8004c700, 0x52800, 0x80054b00, 0x80058d00, 0x5ee00, 0x63000, 0x80065300, 0x80069500, 0x6f600, 0x80071900, 0x77a00, 0x7bc00, 0x8007df00, 0x80086100, 0x80200, 0x8c400, 0x8008a700, 0x94800, 0x80092b00, 0x8009ed00, 0x98e00, 0xa5000, 0x800a3300, 0x800af500, 0xa9600, 0x800b7900, 0xb1a00, 0xbdc00, 0x800bbf00, 0xc6000, 0x800c0300, 0x800cc500, 0xca600, 0x800d4900, 0xd2a00, 0xdec00, 0x800d8f00, 0x800e5100, 0xe3200, 0xef400, 0x800e9700, 0xf7800, 0x800f1b00, 0x800fdd00, 0xfbe00, 0x8010a100, 0x10c200, 0x100400, 0x80106700, 0x118800, 0x8011eb00, 0x80112d00, 0x114e00, 0x129000, 0x8012f300, 0x80123500, 0x125600, 0x8013b900, 0x13da00, 0x131c00, 0x80137f00, 0x14a000, 0x8014c300, 0x80140500, 0x146600, 0x80158900, 0x15ea00, 0x152c00, 0x80154f00, 0x80169100, 0x16f200, 0x163400, 0x80165700, 0x17b800, 0x8017db00, 0x80171d00, 0x177e00, 0x18c000, 0x8018a300, 0x80186500, 0x180600, 0x8019e900, 0x198a00, 0x194c00, 0x80192f00, 0x801af100, 0x1a9200, 0x1a5400, 0x801a3700, 0x1bd800, 0x801bbb00, 0x801b7d00, 0x1b1e00, 0x801cc100, 0x1ca200, 0x1c6400, 0x801c0700, 0x1de800, 0x801d8b00, 0x801d4d00, 0x1d2e00, 0x1ef000, 0x801e9300, 0x801e5500, 0x1e3600, 0x801fd900, 0x1fba00, 0x1f7c00, 0x801f1f00, 0x80212100, 0x214200, 0x218400, 0x8021e700, 0x200800, 0x80206b00, 0x8020ad00, 0x20ce00, 0x231000, 0x80237300, 0x8023b500, 0x23d600, 0x80223900, 0x225a00, 0x229c00, 0x8022ff00, 0x252000, 0x80254300, 0x80258500, 0x25e600, 0x80240900, 0x246a00, 0x24ac00, 0x8024cf00, 0x80271100, 0x277200, 0x27b400, 0x8027d700, 0x263800, 0x80265b00, 0x80269d00, 0x26fe00, 0x294000, 0x80292300, 0x8029e500, 0x298600, 0x80286900, 0x280a00, 0x28cc00, 0x8028af00, 0x802b7100, 0x2b1200, 0x2bd400, 0x802bb700, 0x2a5800, 0x802a3b00, 0x802afd00, 0x2a9e00, 0x802d4100, 0x2d2200, 0x2de400, 0x802d8700, 0x2c6800, 0x802c0b00, 0x802ccd00, 0x2cae00, 0x2f7000, 0x802f1300, 0x802fd500, 0x2fb600, 0x802e5900, 0x2e3a00, 0x2efc00, 0x802e9f00, 0x318000, 0x8031e300, 0x80312500, 0x314600, 0x8030a900, 0x30ca00, 0x300c00, 0x80306f00, 0x8033b100, 0x33d200, 0x331400, 0x80337700, 0x329800, 0x8032fb00, 0x80323d00, 0x325e00, 0x80358100, 0x35e200, 0x352400, 0x80354700, 0x34a800, 0x8034cb00, 0x80340d00, 0x346e00, 0x37b000, 0x8037d300, 0x80371500, 0x377600, 0x80369900, 0x36fa00, 0x363c00, 0x80365f00, 0x8039e100, 0x398200, 0x394400, 0x80392700, 0x38c800, 0x8038ab00, 0x80386d00, 0x380e00, 0x3bd000, 0x803bb300, 0x803b7500, 0x3b1600, 0x803af900, 0x3a9a00, 0x3a5c00, 0x803a3f00, 0x3de000, 0x803d8300, 0x803d4500, 0x3d2600, 0x803cc900, 0x3caa00, 0x3c6c00, 0x803c0f00, 0x803fd100, 0x3fb200, 0x3f7400, 0x803f1700, 0x3ef800, 0x803e9b00, 0x803e5d00, 0x3e3e00};
For initialization && verification purposes,
bit by bit implementation with any polynomial
/** Encoding table for CRC 16 */
static const uint16_t crc16Table[256] = {0x0, 0x1021, 0x2042, 0x3063, 0x4084, 0x50a5, 0x60c6, 0x70e7, 0x8108, 0x9129, 0xa14a, 0xb16b, 0xc18c, 0xd1ad, 0xe1ce, 0xf1ef, 0x1231, 0x210, 0x3273, 0x2252, 0x52b5, 0x4294, 0x72f7, 0x62d6, 0x9339, 0x8318, 0xb37b, 0xa35a, 0xd3bd, 0xc39c, 0xf3ff, 0xe3de, 0x2462, 0x3443, 0x420, 0x1401, 0x64e6, 0x74c7, 0x44a4, 0x5485, 0xa56a, 0xb54b, 0x8528, 0x9509, 0xe5ee, 0xf5cf, 0xc5ac, 0xd58d, 0x3653, 0x2672, 0x1611, 0x630, 0x76d7, 0x66f6, 0x5695, 0x46b4, 0xb75b, 0xa77a, 0x9719, 0x8738, 0xf7df, 0xe7fe, 0xd79d, 0xc7bc, 0x48c4, 0x58e5, 0x6886, 0x78a7, 0x840, 0x1861, 0x2802, 0x3823, 0xc9cc, 0xd9ed, 0xe98e, 0xf9af, 0x8948, 0x9969, 0xa90a, 0xb92b, 0x5af5, 0x4ad4, 0x7ab7, 0x6a96, 0x1a71, 0xa50, 0x3a33, 0x2a12, 0xdbfd, 0xcbdc, 0xfbbf, 0xeb9e, 0x9b79, 0x8b58, 0xbb3b, 0xab1a, 0x6ca6, 0x7c87, 0x4ce4, 0x5cc5, 0x2c22, 0x3c03, 0xc60, 0x1c41, 0xedae, 0xfd8f, 0xcdec, 0xddcd, 0xad2a, 0xbd0b, 0x8d68, 0x9d49, 0x7e97, 0x6eb6, 0x5ed5, 0x4ef4, 0x3e13, 0x2e32, 0x1e51, 0xe70, 0xff9f, 0xefbe, 0xdfdd, 0xcffc, 0xbf1b, 0xaf3a, 0x9f59, 0x8f78, 0x9188, 0x81a9, 0xb1ca, 0xa1eb, 0xd10c, 0xc12d, 0xf14e, 0xe16f, 0x1080, 0xa1, 0x30c2, 0x20e3, 0x5004, 0x4025, 0x7046, 0x6067, 0x83b9, 0x9398, 0xa3fb, 0xb3da, 0xc33d, 0xd31c, 0xe37f, 0xf35e, 0x2b1, 0x1290, 0x22f3, 0x32d2, 0x4235, 0x5214, 0x6277, 0x7256, 0xb5ea, 0xa5cb, 0x95a8, 0x8589, 0xf56e, 0xe54f, 0xd52c, 0xc50d, 0x34e2, 0x24c3, 0x14a0, 0x481, 0x7466, 0x6447, 0x5424, 0x4405, 0xa7db, 0xb7fa, 0x8799, 0x97b8, 0xe75f, 0xf77e, 0xc71d, 0xd73c, 0x26d3, 0x36f2, 0x691, 0x16b0, 0x6657, 0x7676, 0x4615, 0x5634, 0xd94c, 0xc96d, 0xf90e, 0xe92f, 0x99c8, 0x89e9, 0xb98a, 0xa9ab, 0x5844, 0x4865, 0x7806, 0x6827, 0x18c0, 0x8e1, 0x3882, 0x28a3, 0xcb7d, 0xdb5c, 0xeb3f, 0xfb1e, 0x8bf9, 0x9bd8, 0xabbb, 0xbb9a, 0x4a75, 0x5a54, 0x6a37, 0x7a16, 0xaf1, 0x1ad0, 0x2ab3, 0x3a92, 0xfd2e, 0xed0f, 0xdd6c, 0xcd4d, 0xbdaa, 0xad8b, 0x9de8, 0x8dc9, 0x7c26, 0x6c07, 0x5c64, 0x4c45, 0x3ca2, 0x2c83, 0x1ce0, 0xcc1, 0xef1f, 0xff3e, 0xcf5d, 0xdf7c, 0xaf9b, 0xbfba, 0x8fd9, 0x9ff8, 0x6e17, 0x7e36, 0x4e55, 0x5e74, 0x2e93, 0x3eb2, 0xed1, 0x1ef0};
The first bit is in the MSB of each byte
/** Encoding table for CRC 12 */
static const uint16_t crc12Table[256] = {0x0, 0x80f0, 0x8110, 0x1e0, 0x82d0, 0x220, 0x3c0, 0x8330, 0x8550, 0x5a0, 0x440, 0x84b0, 0x780, 0x8770, 0x8690, 0x660, 0x8a50, 0xaa0, 0xb40, 0x8bb0, 0x880, 0x8870, 0x8990, 0x960, 0xf00, 0x8ff0, 0x8e10, 0xee0, 0x8dd0, 0xd20, 0xcc0, 0x8c30, 0x9450, 0x14a0, 0x1540, 0x95b0, 0x1680, 0x9670, 0x9790, 0x1760, 0x1100, 0x91f0, 0x9010, 0x10e0, 0x93d0, 0x1320, 0x12c0, 0x9230, 0x1e00, 0x9ef0, 0x9f10, 0x1fe0, 0x9cd0, 0x1c20, 0x1dc0, 0x9d30, 0x9b50, 0x1ba0, 0x1a40, 0x9ab0, 0x1980, 0x9970, 0x9890, 0x1860, 0xa850, 0x28a0, 0x2940, 0xa9b0, 0x2a80, 0xaa70, 0xab90, 0x2b60, 0x2d00, 0xadf0, 0xac10, 0x2ce0, 0xafd0, 0x2f20, 0x2ec0, 0xae30, 0x2200, 0xa2f0, 0xa310, 0x23e0, 0xa0d0, 0x2020, 0x21c0, 0xa130, 0xa750, 0x27a0, 0x2640, 0xa6b0, 0x2580, 0xa570, 0xa490, 0x2460, 0x3c00, 0xbcf0, 0xbd10, 0x3de0, 0xbed0, 0x3e20, 0x3fc0, 0xbf30, 0xb950, 0x39a0, 0x3840, 0xb8b0, 0x3b80, 0xbb70, 0xba90, 0x3a60, 0xb650, 0x36a0, 0x3740, 0xb7b0, 0x3480, 0xb470, 0xb590, 0x3560, 0x3300, 0xb3f0, 0xb210, 0x32e0, 0xb1d0, 0x3120, 0x30c0, 0xb030, 0xd050, 0x50a0, 0x5140, 0xd1b0, 0x5280, 0xd270, 0xd390, 0x5360, 0x5500, 0xd5f0, 0xd410, 0x54e0, 0xd7d0, 0x5720, 0x56c0, 0xd630, 0x5a00, 0xdaf0, 0xdb10, 0x5be0, 0xd8d0, 0x5820, 0x59c0, 0xd930, 0xdf50, 0x5fa0, 0x5e40, 0xdeb0, 0x5d80, 0xdd70, 0xdc90, 0x5c60, 0x4400, 0xc4f0, 0xc510, 0x45e0, 0xc6d0, 0x4620, 0x47c0, 0xc730, 0xc150, 0x41a0, 0x4040, 0xc0b0, 0x4380, 0xc370, 0xc290, 0x4260, 0xce50, 0x4ea0, 0x4f40, 0xcfb0, 0x4c80, 0xcc70, 0xcd90, 0x4d60, 0x4b00, 0xcbf0, 0xca10, 0x4ae0, 0xc9d0, 0x4920, 0x48c0, 0xc830, 0x7800, 0xf8f0, 0xf910, 0x79e0, 0xfad0, 0x7a20, 0x7bc0, 0xfb30, 0xfd50, 0x7da0, 0x7c40, 0xfcb0, 0x7f80, 0xff70, 0xfe90, 0x7e60, 0xf250, 0x72a0, 0x7340, 0xf3b0, 0x7080, 0xf070, 0xf190, 0x7160, 0x7700, 0xf7f0, 0xf610, 0x76e0, 0xf5d0, 0x7520, 0x74c0, 0xf430, 0xec50, 0x6ca0, 0x6d40, 0xedb0, 0x6e80, 0xee70, 0xef90, 0x6f60, 0x6900, 0xe9f0, 0xe810, 0x68e0, 0xebd0, 0x6b20, 0x6ac0, 0xea30, 0x6600, 0xe6f0, 0xe710, 0x67e0, 0xe4d0, 0x6420, 0x65c0, 0xe530, 0xe350, 0x63a0, 0x6240, 0xe2b0, 0x6180, 0xe170, 0xe090, 0x6060};
/** Encoding table for CRC 8 */
static const uint8_t crc8Table[256] = {0x0, 0x9b, 0xad, 0x36, 0xc1, 0x5a, 0x6c, 0xf7, 0x19, 0x82, 0xb4, 0x2f, 0xd8, 0x43, 0x75, 0xee, 0x32, 0xa9, 0x9f, 0x4, 0xf3, 0x68, 0x5e, 0xc5, 0x2b, 0xb0, 0x86, 0x1d, 0xea, 0x71, 0x47, 0xdc, 0x64, 0xff, 0xc9, 0x52, 0xa5, 0x3e, 0x8, 0x93, 0x7d, 0xe6, 0xd0, 0x4b, 0xbc, 0x27, 0x11, 0x8a, 0x56, 0xcd, 0xfb, 0x60, 0x97, 0xc, 0x3a, 0xa1, 0x4f, 0xd4, 0xe2, 0x79, 0x8e, 0x15, 0x23, 0xb8, 0xc8, 0x53, 0x65, 0xfe, 0x9, 0x92, 0xa4, 0x3f, 0xd1, 0x4a, 0x7c, 0xe7, 0x10, 0x8b, 0xbd, 0x26, 0xfa, 0x61, 0x57, 0xcc, 0x3b, 0xa0, 0x96, 0xd, 0xe3, 0x78, 0x4e, 0xd5, 0x22, 0xb9, 0x8f, 0x14, 0xac, 0x37, 0x1, 0x9a, 0x6d, 0xf6, 0xc0, 0x5b, 0xb5, 0x2e, 0x18, 0x83, 0x74, 0xef, 0xd9, 0x42, 0x9e, 0x5, 0x33, 0xa8, 0x5f, 0xc4, 0xf2, 0x69, 0x87, 0x1c, 0x2a, 0xb1, 0x46, 0xdd, 0xeb, 0x70, 0xb, 0x90, 0xa6, 0x3d, 0xca, 0x51, 0x67, 0xfc, 0x12, 0x89, 0xbf, 0x24, 0xd3, 0x48, 0x7e, 0xe5, 0x39, 0xa2, 0x94, 0xf, 0xf8, 0x63, 0x55, 0xce, 0x20, 0xbb, 0x8d, 0x16, 0xe1, 0x7a, 0x4c, 0xd7, 0x6f, 0xf4, 0xc2, 0x59, 0xae, 0x35, 0x3, 0x98, 0x76, 0xed, 0xdb, 0x40, 0xb7, 0x2c, 0x1a, 0x81, 0x5d, 0xc6, 0xf0, 0x6b, 0x9c, 0x7, 0x31, 0xaa, 0x44, 0xdf, 0xe9, 0x72, 0x85, 0x1e, 0x28, 0xb3, 0xc3, 0x58, 0x6e, 0xf5, 0x2, 0x99, 0xaf, 0x34, 0xda, 0x41, 0x77, 0xec, 0x1b, 0x80, 0xb6, 0x2d, 0xf1, 0x6a, 0x5c, 0xc7, 0x30, 0xab, 0x9d, 0x6, 0xe8, 0x73, 0x45, 0xde, 0x29, 0xb2, 0x84, 0x1f, 0xa7, 0x3c, 0xa, 0x91, 0x66, 0xfd, 0xcb, 0x50, 0xbe, 0x25, 0x13, 0x88, 0x7f, 0xe4, 0xd2, 0x49, 0x95, 0xe, 0x38, 0xa3, 0x54, 0xcf, 0xf9, 0x62, 0x8c, 0x17, 0x21, 0xba, 0x4d, 0xd6, 0xe0, 0x7b};
uint32_t crcbit (uint8_t * inputptr, int32_t octetlen, uint32_t poly)
*********************************************************/
unsigned int
crcbit (unsigned char * inputptr, int octetlen, unsigned int poly)
{
uint32_t i;
uint32_t crc = 0;
uint32_t c;
unsigned int i, crc = 0, c;
while (octetlen-- > 0)
{
c = (*inputptr++) << 24;
while (octetlen-- > 0) {
c = (*inputptr++) << 24;
for (i = 8; i != 0; i--)
{
if ( (1 << 31) & (c ^ crc) )
{
crc = (crc << 1) ^ poly;
}
else
{
crc <<= 1;
}
for (i = 8; i != 0; i--) {
if ((1 << 31) & (c ^ crc))
crc = (crc << 1) ^ poly;
else
crc <<= 1;
c <<= 1;
}
c <<= 1;
}
}
return crc;
return crc;
}
// CRC table initialization
/*********************************************************
crc table initialization
*********************************************************/
static unsigned int crc24aTable[256];
static unsigned int crc24bTable[256];
static unsigned short crc16Table[256];
static unsigned short crc12Table[256];
static unsigned char crc8Table[256];
/*
void crcTableInit (void)
{
uint8_t c = 0;
unsigned char c = 0;
do
{
crc24aTable[c] = crcbit (&c, 1, poly24a);
crc24bTable[c] = crcbit (&c, 1, poly24b);
crc16Table [c] = (uint16_t) (crcbit (&c, 1, poly16) >> 16);
crc12Table [c] = (uint16_t) (crcbit (&c, 1, poly12) >> 16);
crc8Table [c] = (uint8_t) (crcbit (&c, 1, poly8 ) >> 24);
}
while (++c);
do {
crc24aTable[c] = crcbit (&c, 1, poly24a);
crc24bTable[c] = crcbit (&c, 1, poly24b);
crc16Table[c] = (unsigned short) (crcbit (&c, 1, poly16) >> 16);
crc12Table[c] = (unsigned short) (crcbit (&c, 1, poly12) >> 16);
crc8Table[c] = (unsigned char) (crcbit (&c, 1, poly8) >> 24);
} while (++c);
}
*/
// Byte by byte implementations, assuming initial byte is 0 padded (in MSB) if necessary
uint32_t crc24a (uint8_t * inptr, uint32_t bitlen)
//Generic version
void crcTable256Init (uint32_t poly, uint32_t* crc256Table)
{
int32_t octetlen = bitlen / 8;
int32_t resbit = (bitlen % 8);
uint32_t crc = 0;
unsigned char c = 0;
while (octetlen-- > 0)
{
crc = (crc << 8) ^ crc24aTable[(*inptr++) ^ (crc >> 24)];
}
do {
crc256Table[c] = crcbit(&c, 1, poly);
} while (++c);
if (resbit > 0)
{
crc = (crc << resbit) ^ crc24aTable[((*inptr) >> (8 - resbit)) ^ (crc >> (32 - resbit))];
}
return crc;
}
uint32_t crc24b (uint8_t * inptr, uint32_t bitlen)
/*********************************************************
Byte by byte implementations,
assuming initial byte is 0 padded (in MSB) if necessary
*********************************************************/
unsigned int
crc24a (unsigned char * inptr, int bitlen)
{
int32_t octetlen = bitlen / 8;
int32_t resbit = (bitlen % 8);
uint32_t crc = 0;
while (octetlen-- > 0)
{
crc = (crc << 8) ^ crc24bTable[(*inptr++) ^ (crc >> 24)];
}
int octetlen, resbit;
unsigned int crc = 0;
octetlen = bitlen / 8; /* Change in octets */
resbit = (bitlen % 8);
if (resbit > 0)
{
crc = (crc << resbit) ^ crc24bTable[((*inptr) >> (8 - resbit)) ^ (crc >> (32 - resbit))];
}
while (octetlen-- > 0) {
// printf("crc24a: in %x => crc %x\n",crc,*inptr);
crc = (crc << 8) ^ crc24aTable[(*inptr++) ^ (crc >> 24)];
}
return crc;
if (resbit > 0)
crc = (crc << resbit) ^ crc24aTable[((*inptr) >> (8 - resbit)) ^ (crc >> (32 - resbit))];
return crc;
}
uint32_t crc16 (uint8_t * inptr, uint32_t bitlen)
unsigned int crc24b (unsigned char * inptr, int bitlen)
{
int32_t octetlen = bitlen / 8;
int32_t resbit = (bitlen % 8);
uint32_t crc = 0;
while (octetlen-- > 0)
{
crc = (crc << 8) ^ (crc16Table[(*inptr++) ^ (crc >> 24)] << 16);
}
int octetlen, resbit;
unsigned int crc = 0;
octetlen = bitlen / 8; /* Change in octets */
resbit = (bitlen % 8);
if (resbit > 0)
{
crc = (crc << resbit) ^ (crc16Table[((*inptr) >> (8 - resbit)) ^ (crc >> (32 - resbit))] << 16);
}
while (octetlen-- > 0) {
// printf("crc24b: in %x => crc %x (%x)\n",crc,*inptr,crc24bTable[(*inptr) ^ (crc >> 24)]);
crc = (crc << 8) ^ crc24bTable[(*inptr++) ^ (crc >> 24)];
}
return crc;
if (resbit > 0)
crc = (crc << resbit) ^ crc24bTable[((*inptr) >> (8 - resbit)) ^ (crc >> (32 - resbit))];
return crc;
}
uint32_t crc12 (uint8_t * inptr, uint32_t bitlen)
unsigned int
crc16 (unsigned char * inptr, int bitlen)
{
int32_t octetlen = bitlen / 8;
int32_t resbit = (bitlen % 8);
uint32_t crc = 0;
int octetlen, resbit;
unsigned int crc = 0;
octetlen = bitlen / 8; /* Change in octets */
resbit = (bitlen % 8);
while (octetlen-- > 0)
{
crc = (crc << 8) ^ (crc12Table[(*inptr++) ^ (crc >> 24)] << 16);
}
while (octetlen-- > 0) {
if (resbit > 0)
{
crc = (crc << resbit) ^ (crc12Table[((*inptr) >> (8 - resbit)) ^ (crc >> (32 - resbit))] << 16);
}
crc = (crc << 8) ^ (crc16Table[(*inptr++) ^ (crc >> 24)] << 16);
}
return crc;
if (resbit > 0)
crc = (crc << resbit) ^ (crc16Table[((*inptr) >> (8 - resbit)) ^ (crc >> (32 - resbit))] << 16);
return crc;
}
uint32_t crc8 (uint8_t * inptr, uint32_t bitlen)
unsigned int
crc12 (unsigned char * inptr, int bitlen)
{
int32_t octetlen = bitlen / 8;
int32_t resbit = (bitlen % 8);
uint32_t crc = 0;
int octetlen, resbit;
unsigned int crc = 0;
octetlen = bitlen / 8; /* Change in octets */
resbit = (bitlen % 8);
while (octetlen-- > 0)
{
crc = crc8Table[(*inptr++) ^ (crc >> 24)] << 24;
}
while (octetlen-- > 0) {
crc = (crc << 8) ^ (crc12Table[(*inptr++) ^ (crc >> 24)] << 16);
}
if (resbit > 0)
{
crc = (crc << resbit) ^ (crc8Table[((*inptr) >> (8 - resbit)) ^ (crc >> (32 - resbit))] << 24);
}
if (resbit > 0)
crc = (crc << resbit) ^ (crc12Table[((*inptr) >> (8 - resbit)) ^ (crc >> (32 - resbit))] << 16);
return crc;
return crc;
}
unsigned int
crc8 (unsigned char * inptr, int bitlen)
{
int octetlen, resbit;
unsigned int crc = 0;
octetlen = bitlen / 8; /* Change in octets */
resbit = (bitlen % 8);
while (octetlen-- > 0) {
crc = crc8Table[(*inptr++) ^ (crc >> 24)] << 24;
}
if (resbit > 0)
crc = (crc << resbit) ^ (crc8Table[((*inptr) >> (8 - resbit)) ^ (crc >> (32 - resbit))] << 24);
return crc;
}
//Generic version
unsigned int crcPayload(unsigned char * inptr, int bitlen, uint32_t* crc256Table)
{
int octetlen, resbit;
unsigned int crc = 0;
octetlen = bitlen/8; // Change in bytes
resbit = (bitlen % 8);
while (octetlen-- > 0)
{
crc = (crc << 8) ^ crc256Table[(*inptr++) ^ (crc >> 24)];
}
if (resbit > 0)
{
crc = (crc << resbit) ^ crc256Table[((*inptr) >> (8 - resbit)) ^ (crc >> (32 - resbit))];
}
return crc;
}
void nr_crc_computation(uint8_t* input, uint8_t* output, uint16_t payloadBits, uint16_t crcParityBits, uint32_t* crc256Table)
{
//Create payload in bit
uint8_t* input2 = (uint8_t*)malloc(payloadBits); //divided by 8 (in bits)
uint8_t mask = 128; // 10000000
for(uint8_t ind=0; ind<(payloadBits/8); ind++)
{
input2[ind]=0;
for(uint8_t ind2=0; ind2<8; ind2++)
{
if(input[8*ind+ind2])
{
input2[ind] = input2[ind] | mask;
}
mask= mask >> 1;
}
mask=128;
}
//crcTable256Init(poly);
unsigned int crcBits;
crcBits = crcPayload(input2, payloadBits, crc256Table);
//create crc in byte
unsigned int mask2=0x80000000; //100...
for(uint8_t ind=0; ind<crcParityBits; ind++)
{
if(crcBits & mask2)
output[ind]=1;
else
output[ind]=0;
mask2 = mask2 >> 1;
}
}
#ifdef DEBUG_CRC
// Test code
/*******************************************************************/
/**
Test code
********************************************************************/
#include <stdio.h>
main()
{
unsigned char test[] = "Thebigredfox";
crcTableInit();
printf("%x\n", crcbit(test, sizeof(test) - 1, poly24));
printf("%x\n", crc24 (test, (sizeof(test) - 1)*8));
printf("%x\n", crcbit(test, sizeof(test) - 1, poly8));
printf("%x\n", crc8 (test, (sizeof(test) - 1)*8));
unsigned char test[] = "Thebigredfox";
crcTableInit();
printf("%x\n", crcbit(test, sizeof(test) - 1, poly24));
printf("%x\n", crc24(test, (sizeof(test) - 1)*8));
printf("%x\n", crcbit(test, sizeof(test) - 1, poly8));
printf("%x\n", crc8(test, (sizeof(test) - 1)*8));
}
#endif
openair1/PHY/CODING/nrLDPC_encoder/defs.h
+13 -1
View File
@@ -31,6 +31,18 @@
#include "PHY/TOOLS/time_meas.h"
/*ldpc_encoder.c*/
int encode_parity_check_part_orig(unsigned char *c,unsigned char *d, short BG,short Zc,short Kb,short block_length);
/*ldpc_encoder2.c*/
void encode_parity_check_part_optim(uint8_t *c,uint8_t *d, short BG,short Zc,short Kb);
int ldpc_encoder_optim(unsigned char *test_input,unsigned char *channel_input,short block_length,short BG,time_stats_t *tinput,time_stats_t *tprep,time_stats_t *tparity,time_stats_t *toutput);
int ldpc_encoder_optim_8seg(unsigned char **test_input,unsigned char **channel_input,short block_length,short BG,int n_segments,time_stats_t *tinput,time_stats_t *tprep,time_stats_t *tparity,time_stats_t *toutput);
/*ldpc_generate_coefficient.c*/
int ldpc_encoder_orig(unsigned char *test_input,unsigned char *channel_input,short block_length,short BG,unsigned char gen_code);
/*
int encode_parity_check_part(unsigned char *c,unsigned char *d, short BG,short Zc,short Kb);
int encode_parity_check_part_orig(unsigned char *c,unsigned char *d, short BG,short Zc,short Kb,short block_length);
int ldpc_encoder(unsigned char *test_input,unsigned char *channel_input,short block_length, double rate);
@@ -38,4 +50,4 @@ int ldpc_encoder_orig(unsigned char *test_input,unsigned char *channel_input,sho
int ldpc_encoder_multi_segment(unsigned char **test_input,unsigned char **channel_input,short block_length,double rate,uint8_t n_segments);
int ldpc_encoder_optim(unsigned char *test_input,unsigned char *channel_input,short block_length,int nom_rate,int denom_rate,time_stats_t *tinput,time_stats_t *tprep,time_stats_t *tparity,time_stats_t *toutput);
int ldpc_encoder_optim_8seg(unsigned char **test_input,unsigned char **channel_input,short block_length,int nom_rate,int denom_rate,int n_segments,time_stats_t *tinput,time_stats_t *tprep,time_stats_t *tparity,time_stats_t *toutput);
*/
openair1/PHY/CODING/nrLDPC_encoder/ldpc_encoder.c
+3 -3
View File
@@ -50,14 +50,14 @@ int encode_parity_check_part_orig(unsigned char *c,unsigned char *d, short BG,sh
int i1,i2,i3,i4,i5,temp_prime;
unsigned char channel_temp,temp;
//if (BG==1)
if (BG==1)
{
no_shift_values=(short *) no_shift_values_BG1;
pointer_shift_values=(short *) pointer_shift_values_BG1;
nrows=46; //parity check bits
ncols=22; //info bits
}
/*else if (BG==2)
else if (BG==2)
{
no_shift_values=(short *) no_shift_values_BG2;
pointer_shift_values=(short *) pointer_shift_values_BG2;
@@ -68,7 +68,7 @@ int encode_parity_check_part_orig(unsigned char *c,unsigned char *d, short BG,sh
printf("problem with BG\n");
return(-1);
}
*/
no_punctured_columns=(int)((nrows-2)*Zc+block_length-block_length*3)/Zc;
openair1/PHY/CODING/nrLDPC_encoder/ldpc_encoder2.c
+10 -14
View File
@@ -198,10 +198,10 @@ void encode_parity_check_part_optim(uint8_t *c,uint8_t *d, short BG,short Zc,sho
}
int ldpc_encoder_optim(unsigned char *test_input,unsigned char *channel_input,short block_length,int nom_rate,int denom_rate,time_stats_t *tinput,time_stats_t *tprep,time_stats_t *tparity,time_stats_t *toutput)
int ldpc_encoder_optim(unsigned char *test_input,unsigned char *channel_input,short block_length,short BG,time_stats_t *tinput,time_stats_t *tprep,time_stats_t *tparity,time_stats_t *toutput)
{
short BG,Zc,Kb,nrows,ncols;
short Kb,Zc,nrows,ncols;
int i,i1;
int no_punctured_columns,removed_bit;
@@ -211,16 +211,14 @@ int ldpc_encoder_optim(unsigned char *test_input,unsigned char *channel_input,sh
int simd_size;
//determine number of bits in codeword
//if (block_length>3840)
if (BG==1)
{
BG=1;
Kb = 22;
nrows=46; //parity check bits
ncols=22; //info bits
}
/*else if (block_length<=3840)
else if (BG==2)
{
BG=2;
nrows=42; //parity check bits
ncols=10; // info bits
@@ -232,7 +230,7 @@ int ldpc_encoder_optim(unsigned char *test_input,unsigned char *channel_input,sh
Kb = 8;
else
Kb = 6;
}*/
}
//find minimum value in all sets of lifting size
Zc=0;
@@ -315,10 +313,10 @@ int ldpc_encoder_optim(unsigned char *test_input,unsigned char *channel_input,sh
return 0;
}
int ldpc_encoder_optim_8seg(unsigned char **test_input,unsigned char **channel_input,short block_length,int nom_rate,int denom_rate,int n_segments,time_stats_t *tinput,time_stats_t *tprep,time_stats_t *tparity,time_stats_t *toutput)
int ldpc_encoder_optim_8seg(unsigned char **test_input,unsigned char **channel_input,short block_length,short BG,int n_segments,time_stats_t *tinput,time_stats_t *tprep,time_stats_t *tparity,time_stats_t *toutput)
{
short BG,Zc,Kb,nrows,ncols;
short Kb,Zc,nrows,ncols;
int i,i1,j;
int no_punctured_columns,removed_bit;
//Table of possible lifting sizes
@@ -345,16 +343,14 @@ int ldpc_encoder_optim_8seg(unsigned char **test_input,unsigned char **channel_i
AssertFatal(n_segments>0&&n_segments<=8,"0 < n_segments %d <= 8\n",n_segments);
//determine number of bits in codeword
//if (block_length>3840)
if (BG==1)
{
BG=1;
Kb = 22;
nrows=46; //parity check bits
ncols=22; //info bits
}
/*else if (block_length<=3840)
else if (BG==2)
{
BG=2;
nrows=42; //parity check bits
ncols=10; // info bits
@@ -366,7 +362,7 @@ int ldpc_encoder_optim_8seg(unsigned char **test_input,unsigned char **channel_i
Kb = 8;
else
Kb = 6;
}*/
}
//find minimum value in all sets of lifting size
Zc=0;
openair1/PHY/CODING/nrLDPC_encoder/ldpc_generate_coefficient.c
+15 -9
View File
@@ -361,13 +361,13 @@ short *choose_generator_matrix(short BG,short Zc)
return Gen_shift_values;
}
int ldpc_encoder_orig(unsigned char *test_input,unsigned char *channel_input,short block_length,int nom_rate,int denom_rate,unsigned char gen_code)
int ldpc_encoder_orig(unsigned char *test_input,unsigned char *channel_input,short block_length,short BG,unsigned char gen_code)
{
unsigned char c[22*384]; //padded input, unpacked, max size
unsigned char d[68*384]; //coded output, unpacked, max size
unsigned char channel_temp,temp;
short *Gen_shift_values, *no_shift_values, *pointer_shift_values;
short BG,Zc,Kb,nrows,ncols;
short Zc,Kb,nrows,ncols;
int i,i1,i2,i3,i4,i5,temp_prime,var;
int no_punctured_columns,removed_bit;
//Table of possible lifting sizes
@@ -378,16 +378,14 @@ int ldpc_encoder_orig(unsigned char *test_input,unsigned char *channel_input,sho
int indlist2[1000];
//determine number of bits in codeword
//if (block_length>3840)
if (BG==1)
{
BG=1;
Kb = 22;
nrows=46; //parity check bits
ncols=22; //info bits
}
/*else if (block_length<=3840)
else if (BG==2)
{
BG=2;
nrows=42; //parity check bits
ncols=10; // info bits
@@ -399,7 +397,7 @@ int ldpc_encoder_orig(unsigned char *test_input,unsigned char *channel_input,sho
Kb = 8;
else
Kb = 6;
}*/
}
//find minimum value in all sets of lifting size
Zc=0;
@@ -417,6 +415,8 @@ int ldpc_encoder_orig(unsigned char *test_input,unsigned char *channel_input,sho
return(-1);
}
int K = ncols*Zc;
Gen_shift_values=choose_generator_matrix(BG,Zc);
if (Gen_shift_values==NULL) {
printf("ldpc_encoder_orig: could not find generator matrix\n");
@@ -438,9 +438,15 @@ int ldpc_encoder_orig(unsigned char *test_input,unsigned char *channel_input,sho
}
no_punctured_columns=(int)((nrows-2)*Zc+block_length-block_length*3)/Zc;
//nrows - no_punctured_columns = 2 +2*block_length/Zc
removed_bit=(nrows-no_punctured_columns-2) * Zc+block_length-(block_length*3);
// ((nrows-no_punctured_columns) * Zc-removed_bit) =
// 2Zc + 2*block_length
//printf("%d\n",no_punctured_columns);
//printf("%d\n",removed_bit);
//printf("%d\n",nrows-no_punctured_columns);
//printf("%d\n",((nrows-no_punctured_columns) * Zc-removed_bit));
// unpack input
memset(c,0,sizeof(unsigned char) * ncols * Zc);
memset(d,0,sizeof(unsigned char) * nrows * Zc);
@@ -608,8 +614,8 @@ int ldpc_encoder_orig(unsigned char *test_input,unsigned char *channel_input,sho
}
// information part and puncture columns
memcpy(&channel_input[0], &c[2*Zc], (block_length-2*Zc)*sizeof(unsigned char));
memcpy(&channel_input[block_length-2*Zc], &d[0], ((nrows-no_punctured_columns) * Zc-removed_bit)*sizeof(unsigned char));
memcpy(&channel_input[0], &c[2*Zc], (block_length-2*Zc)*sizeof(unsigned char)); //systematic bits
memcpy(&channel_input[block_length-2*Zc], &d[0], ((nrows-no_punctured_columns) * Zc-removed_bit)*sizeof(unsigned char)); //systematic bits 2Zc + 2*block_length
//memcpy(channel_input,c,Kb*Zc*sizeof(unsigned char));
return 0;
}
openair1/PHY/CODING/nrPolar_init.c
+80 -1
View File
@@ -21,9 +21,17 @@
#include "nrPolar_tools/nr_polar_defs.h"
#include "nrPolar_tools/nr_polar_pbch_defs.h"
#include "nrPolar_tools/nr_polar_uci_defs.h"
void nr_polar_init(t_nrPolar_params* polarParams, int messageType) {
uint32_t poly6 = 0x84000000; // 1000100000... -> D^6+D^5+1
uint32_t poly11 = 0x63200000; //11000100001000... -> D^11+D^10+D^9+D^5+1
uint32_t poly16 = 0x81080000; //100000010000100... - > D^16+D^12+D^5+1
uint32_t poly24a = 0x864cfb00; //100001100100110011111011 -> D^24+D^23+D^18+D^17+D^14+D^11+D^10+D^7+D^6+D^5+D^4+D^3+D+1
uint32_t poly24b = 0x80006300; //100000000000000001100011 -> D^24+D^23+D^6+D^5+D+1
uint32_t poly24c = 0xB2B11700; //101100101011000100010111 -> D^24...
if (messageType == 0) { //DCI
} else if (messageType == 1) { //PBCH
@@ -36,13 +44,13 @@ void nr_polar_init(t_nrPolar_params* polarParams, int messageType) {
polarParams->payloadBits = NR_POLAR_PBCH_PAYLOAD_BITS;
polarParams->encoderLength = NR_POLAR_PBCH_E;
polarParams->crcParityBits = NR_POLAR_PBCH_CRC_PARITY_BITS;
polarParams->crcCorrectionBits = NR_POLAR_PBCH_CRC_ERROR_CORRECTION_BITS;
polarParams->K = polarParams->payloadBits + polarParams->crcParityBits; // Number of bits to encode.
polarParams->N = nr_polar_output_length(polarParams->K, polarParams->encoderLength, polarParams->n_max);
polarParams->n = log2(polarParams->N);
polarParams->crc_generator_matrix=crc24c_generator_matrix(polarParams->payloadBits);
polarParams->crc_polynomial = poly24c;
polarParams->G_N = nr_polar_kronecker_power_matrices(polarParams->n);
//polar_encoder vectors:
@@ -55,9 +63,80 @@ void nr_polar_init(t_nrPolar_params* polarParams, int messageType) {
polarParams->nr_polar_cPrime = malloc(sizeof(uint8_t) * polarParams->K); //Decoder: nr_polar_cHat
polarParams->nr_polar_b = malloc(sizeof(uint8_t) * polarParams->K); //Decoder: nr_polar_bHat
} else if (messageType == 2) { //UCI
polarParams->payloadBits = NR_POLAR_PUCCH_PAYLOAD_BITS; //A depends on what they carry...
polarParams->encoderLength = NR_POLAR_PUCCH_E ; //E depends on other standards 6.3.1.4
if (polarParams->payloadBits <= 11) //Ref. 38-212, Section 6.3.1.2.2
polarParams->crcParityBits = 0; //K=A
else //Ref. 38-212, Section 6.3.1.2.1
{
if (polarParams->payloadBits < 20)
polarParams->crcParityBits = NR_POLAR_PUCCH_CRC_PARITY_BITS_SHORT;
else
polarParams->crcParityBits = NR_POLAR_PUCCH_CRC_PARITY_BITS_LONG;
if (polarParams->payloadBits >= 360 && polarParams->encoderLength >= 1088)
polarParams->i_seg = NR_POLAR_PUCCH_I_SEG_LONG; // -> C=2
else
polarParams->i_seg = NR_POLAR_PUCCH_I_SEG_SHORT; // -> C=1
}
polarParams->K = polarParams->payloadBits + polarParams->crcParityBits; // Number of bits to encode.
//K_r = K/C ; C = I_seg+1
if((polarParams->K)/(polarParams->i_seg+1)>=18 && (polarParams->K)/(polarParams->i_seg+1)<=25) //Ref. 38-212, Section 6.3.1.3.1
{
polarParams->n_max = NR_POLAR_PUCCH_N_MAX;
polarParams->i_il =NR_POLAR_PUCCH_I_IL;
polarParams->n_pc = NR_POLAR_PUCCH_N_PC_SHORT;
if( (polarParams->encoderLength - polarParams->K)/(polarParams->i_seg + 1) + 3 > 192 )
polarParams->n_pc_wm = NR_POLAR_PUCCH_N_PC_WM_LONG;
else
polarParams->n_pc_wm = NR_POLAR_PUCCH_N_PC_WM_SHORT;
}
if( (polarParams->K)/(polarParams->i_seg + 1) > 30 ) //Ref. 38-212, Section 6.3.1.3.1
{
polarParams->n_max = NR_POLAR_PUCCH_N_MAX;
polarParams->i_il =NR_POLAR_PUCCH_I_IL;
polarParams->n_pc = NR_POLAR_PUCCH_N_PC_LONG;
polarParams->n_pc_wm = NR_POLAR_PUCCH_N_PC_WM_LONG;
}
polarParams->i_bil = NR_POLAR_PUCCH_I_BIL; //Ref. 38-212, Section 6.3.1.4.1
polarParams->N = nr_polar_output_length(polarParams->K, polarParams->encoderLength, polarParams->n_max);
polarParams->n = log2(polarParams->N);
if((polarParams->payloadBits) <= 19)
{
polarParams->crc_generator_matrix=crc6_generator_matrix(polarParams->payloadBits);
polarParams->crc_polynomial = poly6;
}
else
{
polarParams->crc_generator_matrix=crc11_generator_matrix(polarParams->payloadBits);
polarParams->crc_polynomial = poly11;
}
polarParams->G_N = nr_polar_kronecker_power_matrices(polarParams->n);
//polar_encoder vectors:
polarParams->nr_polar_crc = malloc(sizeof(uint8_t) * polarParams->crcParityBits);
polarParams->nr_polar_cPrime = malloc(sizeof(uint8_t) * polarParams->K);
polarParams->nr_polar_d = malloc(sizeof(uint8_t) * polarParams->N);
//Polar Coding vectors
polarParams->nr_polar_u = malloc(sizeof(uint8_t) * polarParams->N); //Decoder: nr_polar_uHat
polarParams->nr_polar_cPrime = malloc(sizeof(uint8_t) * polarParams->K); //Decoder: nr_polar_cHat
polarParams->nr_polar_b = malloc(sizeof(uint8_t) * polarParams->K); //Decoder: nr_polar_bHat
}
polarParams->crcCorrectionBits = NR_POLAR_CRC_ERROR_CORRECTION_BITS;
polarParams->crc256Table = malloc(sizeof(uint32_t)*256);
crcTable256Init(polarParams->crc_polynomial, polarParams->crc256Table);
polarParams->Q_0_Nminus1 = nr_polar_sequence_pattern(polarParams->n);
polarParams->interleaving_pattern = malloc(sizeof(uint16_t) * polarParams->K);
openair1/PHY/CODING/nrPolar_tools/nr_crc_byte.c
+127
View File
@@ -21,6 +21,133 @@
#include "PHY/CODING/nrPolar_tools/nr_polar_defs.h"
/*
// ----- New implementation ----
uint32_t poly6 = 0x84000000; // 10000100000... -> D^6+D^5+1
uint32_t poly11 = 0xc4200000; //11000100001000... -> D^11+D^10+D^9+D^5+1
uint32_t poly16 = 0x10210000; //00100000010000100... - > D^16+D^12+D^5+1
uint32_t poly24a = 0x864cfb00; //100001100100110011111011 -> D^24+D^23+D^18+D^17+D^14+D^11+D^10+D^7+D^6+D^5+D^4+D^3+D+1
uint32_t poly24b = 0x80006300; //100000000000000001100011 -> D^24+D^23+D^6+D^5+D+1
uint32_t poly24c = 0xB2B11700; //101100101011000100010111 -> D^24...
//static unsigned int crc256Table[256];
void nr_crc_computation(uint8_t* input, uint8_t* output, uint16_t payloadBits, uint16_t crcParityBits, uint32_t* crc256Table)
{
//Create payload in bit
uint8_t* input2 = (uint8_t*)malloc(payloadBits); //divided by 8 (in bits)
uint8_t mask = 128; // 10000000
for(uint8_t ind=0; ind<(payloadBits/8); ind++)
{
input2[ind]=0;
for(uint8_t ind2=0; ind2<8; ind2++)
{
if(input[8*ind+ind2])
{
input2[ind] = input2[ind] | mask;
}
mask= mask >> 1;
}
mask=128;
}
//crcTable256Init(poly);
unsigned int crcBits;
crcBits = crcPayload(input2, payloadBits, crc256Table);
//create crc in byte
unsigned int mask2=0x80000000; //100...
output = (uint8_t*)malloc(sizeof(uint8_t)*crcParityBits);
for(uint8_t ind=0; ind<crcParityBits; ind++)
{
if(crcBits & mask2)
output[ind]=1;
else
output[ind]=0;
mask2 = mask2 >> 1;
}
}
unsigned int crcbit (unsigned char* inputptr, int octetlen, unsigned int poly)
{
unsigned int i, crc = 0, c;
while (octetlen-- > 0) {
c = (*inputptr++) << 24;
for (i = 8; i != 0; i--) {
if ((1 << 31) & (c ^ crc))
crc = (crc << 1) ^ poly;
else
crc <<= 1;
c <<= 1;
}
}
return crc;
}
void crcTableInit (void)
{
unsigned char c = 0;
do {
crc6Table[c] = crcbit(&c, 1, poly6);
crc11Table[c]= crcbit(&c, 1, poly11);
crc16Table[c] =crcbit(&c, 1, poly16);
crc24aTable[c]=crcbit(&c, 1, poly24a);
crc24bTable[c]=crcbit(&c, 1, poly24b);
crc24cTable[c]=crcbit(&c, 1, poly24c);
} while (++c);
}
void crcTable256Init (uint32_t poly, uint32_t* crc256Table)
{
unsigned char c = 0;
// crc256Table = malloc(sizeof(uint32_t)*256);
do {
crc256Table[c] = crcbit(&c, 1, poly);
// crc6Table[c] = crcbit(&c, 1, poly6);
// crc11Table[c]= crcbit(&c, 1, poly11);
// crc16Table[c] =crcbit(&c, 1, poly16);
// crc24aTable[c]=crcbit(&c, 1, poly24a);
// crc24bTable[c]=crcbit(&c, 1, poly24b);
// crc24cTable[c]=crcbit(&c, 1, poly24c);
} while (++c);
//return crc256Table;
}
unsigned int crcPayload(unsigned char * inptr, int bitlen, uint32_t* crc256Table)
{
int octetlen, resbit;
unsigned int crc = 0;
octetlen = bitlen/8; // Change in bytes
resbit = (bitlen % 8);
while (octetlen-- > 0)
{
crc = (crc << 8) ^ crc256Table[(*inptr++) ^ (crc >> 24)];
}
if (resbit > 0)
{
crc = (crc << resbit) ^ crc256Table[((*inptr) >> (8 - resbit)) ^ (crc >> (32 - resbit))];
}
return crc;
}
*/
// ----- Old implementation ----
uint8_t **crc24c_generator_matrix(uint16_t payloadSizeBits){
uint8_t crcPolynomialPattern[25] = {1,1,0,1,1,0,0,1,0,1,0,1,1,0,0,0,1,0,0,0,1,0,1,1,1};
openair1/PHY/CODING/nrPolar_tools/nr_polar_defs.h
+11
View File
@@ -19,6 +19,8 @@
* contact@openairinterface.org
*/
#define NR_POLAR_CRC_ERROR_CORRECTION_BITS 3
#ifndef __NR_POLAR_DEFS__H__
#define __NR_POLAR_DEFS__H__
@@ -53,9 +55,11 @@ struct nrPolar_params {
int16_t *Q_PC_N;
uint8_t *information_bit_pattern;
uint16_t *channel_interleaver_pattern;
uint32_t crc_polynomial;
uint8_t **crc_generator_matrix; //G_P
uint8_t **G_N;
uint32_t* crc256Table;
//polar_encoder vectors:
uint8_t *nr_polar_crc;
@@ -68,6 +72,8 @@ typedef struct nrPolar_params t_nrPolar_params;
void polar_encoder(uint8_t *input, uint8_t *output, t_nrPolar_params* polarParams);
void nr_polar_kernal_operation(uint8_t *u, uint8_t *d, uint16_t N);
int8_t polar_decoder(double *input, uint8_t *output, t_nrPolar_params *polarParams,
uint8_t listSize, double *aPrioriPayload, uint8_t pathMetricAppr);
@@ -135,6 +141,11 @@ uint8_t **crc24c_generator_matrix(uint16_t payloadSizeBits);
uint8_t **crc11_generator_matrix(uint16_t payloadSizeBits);
uint8_t **crc6_generator_matrix(uint16_t payloadSizeBits);
void crcTable256Init (uint32_t poly, uint32_t* crc256Table);
void nr_crc_computation(uint8_t* input, uint8_t* output, uint16_t payloadBits, uint16_t crcParityBits, uint32_t* crc256Table);
unsigned int crcbit (unsigned char* inputptr, int octetlen, uint32_t poly);
unsigned int crcPayload(unsigned char * inptr, int bitlen, uint32_t* crc256Table);
static inline void nr_polar_rate_matcher(uint8_t *input, unsigned char *output, uint16_t *pattern, uint16_t size) {
for (int i=0; i<size; i++) output[i]=input[pattern[i]];
}
openair1/PHY/CODING/nrPolar_tools/nr_polar_encoder.c
+21 -5
View File
@@ -33,9 +33,14 @@ void polar_encoder(
*/
//Calculate CRC.
nr_matrix_multiplication_uint8_t_1D_uint8_t_2D(input, polarParams->crc_generator_matrix,
polarParams->nr_polar_crc, polarParams->payloadBits, polarParams->crcParityBits);
for (uint8_t i = 0; i < polarParams->crcParityBits; i++) polarParams->nr_polar_crc[i] = (polarParams->nr_polar_crc[i] % 2);
// --- OLD ---
//nr_matrix_multiplication_uint8_t_1D_uint8_t_2D(input, polarParams->crc_generator_matrix,
// polarParams->nr_polar_crc, polarParams->payloadBits, polarParams->crcParityBits);
//for (uint8_t i = 0; i < polarParams->crcParityBits; i++) polarParams->nr_polar_crc[i] = (polarParams->nr_polar_crc[i] % 2);
// --- NEW ---
nr_crc_computation(input, polarParams->nr_polar_crc, polarParams->payloadBits, polarParams->crcParityBits, polarParams->crc256Table);
//Attach CRC to the Transport Block. (a to b)
for (uint16_t i = 0; i < polarParams->payloadBits; i++) polarParams->nr_polar_b[i] = input[i];
@@ -50,8 +55,19 @@ void polar_encoder(
polarParams->Q_I_N, polarParams->Q_PC_N, polarParams->n_pc);
//Encoding (u to d)
nr_matrix_multiplication_uint8_t_1D_uint8_t_2D(polarParams->nr_polar_u, polarParams->G_N, polarParams->nr_polar_d, polarParams->N, polarParams->N);
for (uint16_t i = 0; i < polarParams->N; i++) polarParams->nr_polar_d[i] = (polarParams->nr_polar_d[i] % 2);
// --- OLD ---
//nr_matrix_multiplication_uint8_t_1D_uint8_t_2D(polarParams->nr_polar_u, polarParams->G_N, polarParams->nr_polar_d, polarParams->N, polarParams->N);
//for (uint16_t i = 0; i < polarParams->N; i++) polarParams->nr_polar_d[i] = (polarParams->nr_polar_d[i] % 2);
//printf("\nd old: ");
//for (uint16_t i = 0; i < polarParams->N; i++)
//printf("%i ", polarParams->nr_polar_d[i]);
// --- NEW ---
nr_polar_kernal_operation(polarParams->nr_polar_u, polarParams->nr_polar_d, polarParams->N);
//printf("\nd new: ");
//for (uint16_t i = 0; i < polarParams->N; i++)
// printf("%i ", polarParams->nr_polar_d[i]);
//for (uint16_t i = 0; i < polarParams->N; i++) polarParams->nr_polar_d[i] = (polarParams->nr_polar_d[i] % 2);
//Rate matching
//Sub-block interleaving (d to y) and Bit selection (y to e)
openair1/PHY/CODING/nrPolar_tools/nr_polar_kernal_operation.c
+64 -12
View File
@@ -3,21 +3,73 @@
#include <math.h>
#include <stdint.h>
void nr_polar_kernel_operation(uint8_t *u, uint8_t *d, uint16_t N)
#include <immintrin.h>
void nr_polar_kernal_operation(uint8_t *u, uint8_t *d, uint16_t N)
{
// Martino's algorithm to avoid multiplication for the generating matrix
// Martino's algorithm to avoid multiplication for the generating matrix of polar codes
uint32_t i,j;
int i,j;
printf("\nd = ");
for(i=0; i<N; i++)
{
d[i]=0;
for(j=0; j<N; j++)
#ifdef __AVX2__
__m256i A,B,C,D,E,U,zerosOnly, OUT;
__m256i inc;
uint32_t dTest[8];
uint32_t uArray[8];
uint32_t k;
uint32_t incArray[8];
//initialisation
for(k=0; k<8; k++)
incArray[k]=k;
inc=_mm256_loadu_si256((__m256i const*)incArray); // 0, 1, ..., 7 to increase
zerosOnly=_mm256_setzero_si256(); // for comparison
for(i=0; i<N; i+=8)
{
d[i]=d[i]+(( (j-i)& i )==0)*u[j];
B=_mm256_set1_epi32((int)i); // i, ..., i
B=_mm256_add_epi32(B, inc); // i, i+1, ..., i+7
OUT=_mm256_setzero_si256(); // it will contain the result of all the XORs for the d(i)s
for(j=0; j<N; j++)
{
A=_mm256_set1_epi32((int)(j)); //j, j, ..., j
A=_mm256_sub_epi32(A, B); //(j-i), (j-(i+1)), ... (j-(i+7))
U=_mm256_set1_epi32((int)u[j]);
_mm256_storeu_si256((__m256i*)uArray, U); //u(j) ... u(j) for the maskload
C=_mm256_and_si256(A, B); //(j-i)&i -> If zero, then XOR with the u(j)
D=_mm256_cmpeq_epi32(C, zerosOnly); // compare with zero and use the result as mask
E=_mm256_maskload_epi32((int const*)uArray, D); // load only some u(j)s for the XOR
OUT=_mm256_xor_si256(OUT, E); //32 bit x 8
}
_mm256_storeu_si256((__m256i*)dTest, OUT);
for(k=0; k<8; k++) // Conversion from 32 bits to 8 bits
{
d[i+k]=(uint8_t)dTest[k]; // With AVX512 there is an intrinsic to do it
}
}
#else
for(i=0; i<N; i++) // Create the elements of d=u*G_N ...
{
d[i]=0;
for(j=0; j<N; j++) // ... looking at all the elements of u
{
d[i]=d[i] ^ (!( (j-i)& i ))*u[j];
// it's like ((j-i)&i)==0
}
}
d[i]=d[i]%2;
#endif
printf("%i", d[i]);
}
}
openair1/PHY/CODING/nrPolar_tools/nr_polar_uci_defs.h
+23
View File
@@ -33,4 +33,27 @@
#ifndef __NR_POLAR_UCI_DEFS__H__
#define __NR_POLAR_UCI_DEFS__H__
#define NR_POLAR_PUCCH_PAYLOAD_BITS 32
#define NR_POLAR_PUCCH_E 32
//Ref. 38-212, Section 6.3.1.2.1
#define NR_POLAR_PUCCH_CRC_PARITY_BITS_SHORT 6
#define NR_POLAR_PUCCH_CRC_PARITY_BITS_LONG 11
#define NR_POLAR_PUCCH_I_SEG_LONG 1
#define NR_POLAR_PUCCH_I_SEG_SHORT 0
//Ref. 38-212, Section 6.3.1.3.1
#define NR_POLAR_PUCCH_N_MAX 10
#define NR_POLAR_PUCCH_I_IL 0
#define NR_POLAR_PUCCH_N_PC_SHORT 3
#define NR_POLAR_PUCCH_N_PC_LONG 0
#define NR_POLAR_PUCCH_N_PC_WM_LONG 0
#define NR_POLAR_PUCCH_N_PC_WM_SHORT 1
//Ref. 38-212, Section 6.3.1.4.1
#define NR_POLAR_PUCCH_I_BIL 1
#endif
openair1/PHY/INIT/nr_init_ue.c
+3
View File
@@ -657,6 +657,9 @@ int init_nr_ue_signal(PHY_VARS_NR_UE *ue,
printf("Initializing UE vars (abstraction %"PRIu8") for eNB TXant %"PRIu8", UE RXant %"PRIu8"\n",abstraction_flag,fp->nb_antennas_tx,fp->nb_antennas_rx);
//LOG_D(PHY,"[MSC_NEW][FRAME 00000][PHY_UE][MOD %02u][]\n", ue->Mod_id+NB_eNB_INST);
//phy_init_nr_top(&ue->frame_parms);
//nr_init_frame_parms_ue(&ue->frame_parms);
// many memory allocation sizes are hard coded
AssertFatal( fp->nb_antennas_rx <= 2, "hard coded allocation for ue_common_vars->dl_ch_estimates[eNB_id]" );
openair1/PHY/INIT/nr_parms.c
+2 -3
View File
@@ -151,8 +151,7 @@ int nr_init_frame_parms(nfapi_nr_config_request_t* config,
return 0;
}
int nr_init_frame_parms_ue(nfapi_nr_config_request_t* config,
NR_DL_FRAME_PARMS *frame_parms)
int nr_init_frame_parms_ue(NR_DL_FRAME_PARMS *frame_parms)
{
int N_RB = 106;
@@ -275,7 +274,7 @@ int nr_init_frame_parms_ue(nfapi_nr_config_request_t* config,
frame_parms->ofdm_symbol_size = 2048;
frame_parms->samples_per_tti = 30720;
frame_parms->samples_per_subframe = 30720 * frame_parms->ttis_per_subframe;
frame_parms->first_carrier_offset = 2048-600;
//frame_parms->first_carrier_offset = 2048-600;
frame_parms->symbols_per_slot = ((Ncp == NORMAL)? 14 : 12); // to redefine for different slot formats
frame_parms->samples_per_subframe_wCP = frame_parms->ofdm_symbol_size * frame_parms->symbols_per_slot * frame_parms->slots_per_subframe;
openair1/PHY/INIT/phy_init.h
+2 -1
View File
@@ -375,7 +375,8 @@ void phy_config_request(PHY_Config_t *phy_config);
int init_frame_parms(LTE_DL_FRAME_PARMS *frame_parms,uint8_t osf);
void dump_frame_parms(LTE_DL_FRAME_PARMS *frame_parms);
int nr_init_frame_parms(nfapi_nr_config_request_t* config, NR_DL_FRAME_PARMS *frame_parms);
int nr_init_frame_parms_ue(nfapi_nr_config_request_t* config, NR_DL_FRAME_PARMS *frame_parms);
int nr_init_frame_parms_ue(NR_DL_FRAME_PARMS *frame_parms);
int init_nr_ue_signal(PHY_VARS_NR_UE *ue,int nb_connected_eNB,uint8_t abstraction_flag);
void nr_dump_frame_parms(NR_DL_FRAME_PARMS *frame_parms);
int phy_init_nr_gNB(PHY_VARS_gNB *gNB, unsigned char is_secondary_gNB, unsigned char abstraction_flag);
void nr_phy_config_request(NR_PHY_Config_t *gNB);
openair1/PHY/MODULATION/slot_fep.c
+2 -2
View File
@@ -50,7 +50,7 @@ int nr_slot_fep(PHY_VARS_NR_UE *ue,
unsigned int frame_length_samples = frame_parms->samples_per_subframe * 10;
unsigned int rx_offset;
//NR_UE_PDCCH *pdcch_vars = ue->pdcch_vars[ue->current_thread_id[Ns>>1]][0];
uint16_t coreset_start_subcarrier = frame_parms->first_carrier_offset;
uint16_t coreset_start_subcarrier = frame_parms->first_carrier_offset+516;
uint16_t nb_rb_coreset = 24;
uint16_t bwp_start_subcarrier = frame_parms->first_carrier_offset;
uint16_t nb_rb_pdsch = 100;
@@ -239,7 +239,7 @@ int nr_slot_fep(PHY_VARS_NR_UE *ue,
for (aa=0; aa<frame_parms->nb_antenna_ports_eNB; aa++) {
#ifdef DEBUG_FEP
printf("Channel estimation eNB %d, aatx %d, slot %d, symbol %d\n",eNB_id,aa,Ns,l);
printf("PDCCH Channel estimation eNB %d, aatx %d, slot %d, symbol %d start_sc %d\n",eNB_id,aa,Ns,l,coreset_start_subcarrier);
#endif
#if UE_TIMING_TRACE
start_meas(&ue->dlsch_channel_estimation_stats);
openair1/PHY/NR_REFSIG/nr_dmrs_rx.c
+31 -5
View File
@@ -53,7 +53,7 @@ int wt2[12][2] = {{1,1},{1,1},{1,1},{1,1},{1,1},{1,1},{1,-1},{1,-1},{1,-1},{1,-1
short nr_rx_mod_table[NR_MOD_TABLE_SIZE_SHORT] = {0,0,23170,-23170,-23170,23170,23170,-23170,23170,23170,-23170,-23170,-23170,23170};
int nr_pdcch_dmrs_rx(PHY_VARS_NR_UE *ue,
/*int nr_pdcch_dmrs_rx(PHY_VARS_NR_UE *ue,
uint8_t eNB_offset,
unsigned int Ns,
unsigned int nr_gold_pdcch[7][20][3][10],
@@ -65,8 +65,6 @@ int nr_pdcch_dmrs_rx(PHY_VARS_NR_UE *ue,
int32_t qpsk[4],n;
int w,ind,l,ind_dword,ind_qpsk_symb,kp,k;
short pamp;
// Compute the correct pilot amplitude, sqrt_rho_b = Q3.13
pamp = ONE_OVER_SQRT2_Q15;
// This includes complex conjugate for channel estimation
@@ -80,7 +78,6 @@ int nr_pdcch_dmrs_rx(PHY_VARS_NR_UE *ue,
((short *)&qpsk[3])[1] = pamp;
if (p==2000) {
// r_n from 38.211 7.4.1.3
for (n=0; n<nb_rb_coreset*3; n++) {
for (l =0; l<length_dmrs; l++){
for (kp=0; kp<3; kp++){
@@ -106,7 +103,7 @@ int nr_pdcch_dmrs_rx(PHY_VARS_NR_UE *ue,
}
return(0);
}
}*/
int nr_pdsch_dmrs_rx(PHY_VARS_NR_UE *ue,
uint8_t eNB_offset,
@@ -189,6 +186,35 @@ int nr_pdsch_dmrs_rx(PHY_VARS_NR_UE *ue,
return(0);
}
int nr_pdcch_dmrs_rx(PHY_VARS_NR_UE *ue,
uint8_t eNB_offset,
unsigned int Ns,
unsigned int *nr_gold_pdcch,
int32_t *output,
unsigned short p,
unsigned short nb_rb_coreset)
{
uint8_t idx=0;
uint8_t pdcch_rb_offset =0;
//nr_gold_pdcch += ((int)floor(ue->frame_parms.ssb_start_subcarrier/12)+pdcch_rb_offset)*3/32;
if (p==2000) {
for (int i=0; i<((nb_rb_coreset*6)>>1); i++) {
idx = ((((nr_gold_pdcch[(i<<1)>>5])>>((i<<1)&0x1f))&1)<<1) ^ (((nr_gold_pdcch[((i<<1)+1)>>5])>>(((i<<1)+1)&0x1f))&1);
((int16_t*)output)[i<<1] = nr_rx_mod_table[(NR_MOD_TABLE_QPSK_OFFSET + idx)<<1];
((int16_t*)output)[(i<<1)+1] = nr_rx_mod_table[((NR_MOD_TABLE_QPSK_OFFSET + idx)<<1) + 1];
#ifdef DEBUG_PDCCH
if (i<8)
printf("i %d idx %d pdcch gold %u b0-b1 %d-%d mod_dmrs %d %d\n", i, idx, nr_gold_pdcch[(i<<1)>>5], (((nr_gold_pdcch[(i<<1)>>5])>>((i<<1)&0x1f))&1),
(((nr_gold_pdcch[((i<<1)+1)>>5])>>(((i<<1)+1)&0x1f))&1), ((int16_t*)output)[i<<1], ((int16_t*)output)[(i<<1)+1],&output[0]);
#endif
}
}
return(0);
}
int nr_pbch_dmrs_rx(unsigned int *nr_gold_pbch,
int32_t *output )
{
openair1/PHY/NR_REFSIG/nr_gold_ue.c
+5 -5
View File
@@ -64,7 +64,7 @@ void nr_gold_pbch(PHY_VARS_NR_UE* ue)
}
void nr_gold_pdcch(PHY_VARS_NR_UE* ue,unsigned int Nid_cell, unsigned short n_idDMRS, unsigned short length_dmrs)
void nr_gold_pdcch(PHY_VARS_NR_UE* ue,unsigned short n_idDMRS, unsigned short length_dmrs)
{
unsigned char ns,l;
@@ -74,7 +74,7 @@ void nr_gold_pdcch(PHY_VARS_NR_UE* ue,unsigned int Nid_cell, unsigned short n_id
if (n_idDMRS)
nid = n_idDMRS;
else
nid = Nid_cell;
nid = ue->frame_parms.Nid_cell;
for (ns=0; ns<20; ns++) {
@@ -95,7 +95,7 @@ void nr_gold_pdcch(PHY_VARS_NR_UE* ue,unsigned int Nid_cell, unsigned short n_id
//printf("x1 : %x, x2 : %x\n",x1,x2);
}
for (n=0; n<10; n++) {
for (n=0; n<52; n++) {
x1 = (x1>>1) ^ (x1>>4);
x1 = x1 ^ (x1<<31) ^ (x1<<28);
x2 = (x2>>1) ^ (x2>>2) ^ (x2>>3) ^ (x2>>4);
@@ -107,7 +107,7 @@ void nr_gold_pdcch(PHY_VARS_NR_UE* ue,unsigned int Nid_cell, unsigned short n_id
}
}
void nr_gold_pdsch(PHY_VARS_NR_UE* ue,unsigned short lbar,unsigned int Nid_cell, unsigned short *n_idDMRS, unsigned short length_dmrs)
void nr_gold_pdsch(PHY_VARS_NR_UE* ue,unsigned short lbar,unsigned short *n_idDMRS, unsigned short length_dmrs)
{
unsigned char ns,l;
@@ -122,7 +122,7 @@ void nr_gold_pdsch(PHY_VARS_NR_UE* ue,unsigned short lbar,unsigned int Nid_cell,
if (n_idDMRS)
nid = n_idDMRS[nscid];
else
nid = Nid_cell;
nid = ue->frame_parms.Nid_cell;
for (ns=0; ns<20; ns++) {
openair1/PHY/NR_REFSIG/refsig_defs_ue.h
+1 -4
View File
@@ -37,10 +37,9 @@ int nr_pbch_dmrs_rx(unsigned int *nr_gold_pbch, int32_t *output );
int nr_pdcch_dmrs_rx(PHY_VARS_NR_UE *ue,
uint8_t eNB_offset,
unsigned int Ns,
unsigned int nr_gold_pdcch[7][20][3][10],
unsigned int *nr_gold_pdcch,
int32_t *output,
unsigned short p,
int length_dmrs,
unsigned short nb_rb_corset);
int nr_pdsch_dmrs_rx(PHY_VARS_NR_UE *ue,
@@ -55,13 +54,11 @@ int nr_pdsch_dmrs_rx(PHY_VARS_NR_UE *ue,
void nr_gold_pbch(PHY_VARS_NR_UE* ue);
void nr_gold_pdcch(PHY_VARS_NR_UE* ue,
unsigned int Nid_cell,
unsigned short n_idDMRS,
unsigned short length_dmrs);
void nr_gold_pdsch(PHY_VARS_NR_UE* ue,
unsigned short lbar,
unsigned int Nid_cell,
unsigned short *n_idDMRS,
unsigned short length_dmrs);
openair1/PHY/NR_REFSIG/ss_pbch_nr.h
+10 -4
View File
@@ -51,10 +51,16 @@
#define PSS_SC_START_NR (52) /* see from TS 38.211 table 7.4.3.1-1: Resources within an SS/PBCH block for PSS... */
/* define ofdm symbol offset in the SS/PBCH block of NR synchronisation */
#define PSS_SYMBOL_NB (4) /* symbol numbers for each element */
#define PBCH_SYMBOL_NB (5)
#define SSS_SYMBOL_NB (6)
#define PBCH_LAST_SYMBOL_NB (7)
#ifdef NR_UNIT_TEST
#define OFFSET_SS_PBCH (0)
#else
#define OFFSET_SS_PBCH (4)
#endif
#define PSS_SYMBOL_NB ((0) + OFFSET_SS_PBCH) /* symbol numbers for each element */
#define PBCH_SYMBOL_NB ((1) + OFFSET_SS_PBCH)
#define SSS_SYMBOL_NB ((2) + OFFSET_SS_PBCH)
#define PBCH_LAST_SYMBOL_NB ((3) + OFFSET_SS_PBCH)
/* SS/PBCH parameters */
#define N_RB_SS_PBCH_BLOCK (20)
openair1/PHY/NR_TRANSPORT/nr_pbch.c
+5
View File
@@ -219,6 +219,7 @@ int nr_generate_pbch(NR_gNB_PBCH *pbch,
uint8_t nushift;
uint8_t *xbyte = pbch->pbch_a;
memset((void*) xbyte, 0, 1);
uint8_t pbch_a_b[32];
LOG_I(PHY, "PBCH generation started\n");
@@ -281,6 +282,10 @@ int nr_generate_pbch(NR_gNB_PBCH *pbch,
printf("pbch_a_prime[%d]: 0x%02x\n", i, pbch->pbch_a_prime[i]);
#endif
for (int m=0;m<32;m++){
pbch_a_b[m] = ((pbch->pbch_a_prime[m/8]>>(m&7))&01);
//printf("pbch_a_b[%d] %d\n", m, pbch_a_b[m] );
}
/// CRC, coding and rate matching
polar_encoder (pbch->pbch_a_prime, pbch->pbch_e, &frame_parms->pbch_polar_params);
openair1/PHY/NR_UE_ESTIMATION/nr_dl_channel_estimation.c
+8 -8
View File
@@ -113,12 +113,12 @@ int nr_pbch_channel_estimation(PHY_VARS_NR_UE *ue,
ue->ch_est_alpha,dl_ch-(ue->frame_parms.ofdm_symbol_size<<1),
1,ue->frame_parms.ofdm_symbol_size);
#ifdef DEBUG_CH
printf("ch est pilot addr %p RB_DL %d\n",&pilot[p][0], ue->frame_parms.N_RB_DL);
printf("pbch ch est pilot addr %p RB_DL %d\n",&pilot[p][0], ue->frame_parms.N_RB_DL);
printf("k %d, first_carrier %d\n",k,ue->frame_parms.first_carrier_offset);
printf("rxF addr %p\n", rxF);
printf("dl_ch addr %p\n",dl_ch);
#endif
if ((ue->frame_parms.N_RB_DL&1)==0) {
//if ((ue->frame_parms.N_RB_DL&1)==0) {
// Treat first 2 pilots specially (left edge)
ch[0] = (int16_t)(((int32_t)pil[0]*rxF[0] - (int32_t)pil[1]*rxF[1])>>15);
@@ -214,7 +214,7 @@ int nr_pbch_channel_estimation(PHY_VARS_NR_UE *ue,
}
}
//}
}
@@ -257,7 +257,7 @@ int nr_pdcch_channel_estimation(PHY_VARS_NR_UE *ue,
k = coreset_start_subcarrier;
#ifdef DEBUG_CH
printf("PBCH Channel Estimation : ThreadId %d, eNB_offset %d cell_id %d ch_offset %d, OFDM size %d, Ncp=%d, l=%d, Ns=%d, k=%d symbol %d\n",ue->current_thread_id[Ns>>1], eNB_offset,Nid_cell,ch_offset,ue->frame_parms.ofdm_symbol_size,
printf("PDCCH Channel Estimation : ThreadId %d, eNB_offset %d ch_offset %d, OFDM size %d, Ncp=%d, l=%d, Ns=%d, k=%d symbol %d\n",ue->current_thread_id[Ns>>1], eNB_offset,ch_offset,ue->frame_parms.ofdm_symbol_size,
ue->frame_parms.Ncp,l,Ns,k, symbol);
#endif
@@ -266,7 +266,7 @@ int nr_pdcch_channel_estimation(PHY_VARS_NR_UE *ue,
fr = filt16a_r1;
// generate pilot
nr_pdcch_dmrs_rx(ue,eNB_offset,Ns,ue->nr_gold_pdcch[eNB_offset][Ns][symbol], &pilot[p][0],2000,symbol, nb_rb_coreset);
nr_pdcch_dmrs_rx(ue,eNB_offset,Ns,ue->nr_gold_pdcch[eNB_offset][Ns][symbol], &pilot[p][0],2000,nb_rb_coreset);
for (aarx=0; aarx<ue->frame_parms.nb_antennas_rx; aarx++) {
@@ -279,12 +279,12 @@ int nr_pdcch_channel_estimation(PHY_VARS_NR_UE *ue,
multadd_complex_vector_real_scalar(dl_ch-(ue->frame_parms.ofdm_symbol_size<<1),
ue->ch_est_alpha,dl_ch-(ue->frame_parms.ofdm_symbol_size<<1),
1,ue->frame_parms.ofdm_symbol_size);
#ifdef DEBUG_CH
printf("ch est pilot addr %p RB_DL %d\n",&pilot[p][0], ue->frame_parms.N_RB_DL);
//#ifdef DEBUG_CH
printf("pdcch ch est pilot addr %p RB_DL %d\n",&pilot[p][0], ue->frame_parms.N_RB_DL);
printf("k %d, first_carrier %d\n",k,ue->frame_parms.first_carrier_offset);
printf("rxF addr %p\n", rxF);
printf("dl_ch addr %p\n",dl_ch);
#endif
//#endif
if ((ue->frame_parms.N_RB_DL&1)==0) {
// Treat first 2 pilots specially (left edge)
openair1/PHY/NR_UE_TRANSPORT/dci_nr.c
+62 -59
View File
@@ -50,7 +50,7 @@
//#define NR_LTE_PDCCH_DCI_SWITCH
#define NR_PDCCH_DCI_RUN // activates new nr functions
#define NR_PDCCH_DCI_DEBUG // activates NR_PDCCH_DCI_DEBUG logs
//#define NR_PDCCH_DCI_DEBUG // activates NR_PDCCH_DCI_DEBUG logs
#define NR_NBR_CORESET_ACT_BWP 3 // The number of CoreSets per BWP is limited to 3 (including initial CORESET: ControlResourceId 0)
#define NR_NBR_SEARCHSPACE_ACT_BWP 10 // The number of SearSpaces per BWP is limited to 10 (including initial SEARCHSPACE: SearchSpaceId 0)
@@ -535,17 +535,19 @@ void nr_pdcch_deinterleaving(NR_DL_FRAME_PARMS *frame_parms, uint16_t *z,
* reg_bundle_size (2,3,6)
*/
#ifdef NR_PDCCH_DCI_DEBUG
printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_pdcch_deinterleaving)-> coreset_nbr_rb=(%lld), reg_bundle_size_L=(%d)\n",
coreset_nbr_rb,reg_bundle_size_L);
printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_pdcch_deinterleaving)-> coreset_nbr_rb=(%lld), reg_bundle_size_L=(%d), coreset_interleaver_size_R=(%d), n_shift=(%d)\n",
coreset_nbr_rb,reg_bundle_size_L,coreset_interleaver_size_R,n_shift);
#endif
/*
* First verify that CORESET is interleaved or not interleaved depending on parameter cce-REG-MappingType
* To be done
* if non-interleaved then do nothing: wbar table stays as it is
* if non-interleaved then do nothing: wbar table stays as it is (if REG bundle size is set to 0 by higher layer, then we consider that there is no interleaving)
*/
int coreset_interleaved = 1;
if (reg_bundle_size_L==0) coreset_interleaved=0;
/*
* if interleaved then do this: wbar table has bundles interleaved. We have to de-interleave then
* following procedure described in 38.211 Section 7.3.2.2:
*/
int coreset_interleaved = 1;
*/
uint32_t bundle_id, bundle_interleaved, c=0 ,r=-1, k, l, i=0;
uint32_t coreset_C = (uint32_t)(coreset_nbr_rb / (coreset_interleaver_size_R*reg_bundle_size_L));
uint16_t *wptr;
@@ -553,34 +555,34 @@ void nr_pdcch_deinterleaving(NR_DL_FRAME_PARMS *frame_parms, uint16_t *z,
z = &wtemp_rx[0];
bundle_id=0;
for (k=0 ; k<9*coreset_nbr_rb*coreset_time_dur; k++){
#ifdef NR_PDCCH_DCI_DEBUG
printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_pdcch_deinterleaving)-> k=%d \t coreset_interleaved=%d reg_bundle_size_L=%d coreset_C=%d coreset_interleaver_R=%d",
k,coreset_interleaved,reg_bundle_size_L, coreset_C,coreset_interleaver_size_R);
#endif
#ifdef NR_PDCCH_DCI_DEBUG
printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_pdcch_deinterleaving)-> k=%d \t coreset_interleaved=%d reg_bundle_size_L=%d coreset_C=%d coreset_interleaver_R=%d",
k,coreset_interleaved,reg_bundle_size_L, coreset_C,coreset_interleaver_size_R);
#endif
if (k%(9*reg_bundle_size_L)==0) {
// calculate offset properly
if (r==coreset_interleaver_size_R-1) {
//if (bundle_id>=(c+1)*coreset_interleaver_size_R) {
c++;
r=0;
} else{
} else {
r++;
}
#ifdef NR_PDCCH_DCI_DEBUG
printf("\t --> time to modify bundle_interleaved and bundle_id --> r=%d c=%d",r,c);
#endif
#ifdef NR_PDCCH_DCI_DEBUG
printf("\t --> time to modify bundle_interleaved and bundle_id --> r=%d c=%d",r,c);
#endif
bundle_id=c*coreset_interleaver_size_R+r;
bundle_interleaved=(r*coreset_C+c+n_shift)%(coreset_nbr_rb * coreset_time_dur/reg_bundle_size_L);
}
if (coreset_interleaved == 1){
//wptr[i+(bundle_interleaved-bundle_id)*9*reg_bundle_size_L]=wbar[i];
#ifdef NR_PDCCH_DCI_DEBUG
printf("\n\t\t\t\t\t\t\t\t\t wptr[%d] <-> wbar[%d]",i,i+(bundle_interleaved-bundle_id)*9*reg_bundle_size_L);
#endif
#ifdef NR_PDCCH_DCI_DEBUG
printf("\n\t\t\t\t\t\t\t\t\t wptr[%d] <-> wbar[%d]",i,i+(bundle_interleaved-bundle_id)*9*reg_bundle_size_L);
#endif
wptr[i]=wbar[i+(bundle_interleaved-bundle_id)*9*reg_bundle_size_L];
#ifdef NR_PDCCH_DCI_DEBUG
printf("\t\t bundle_id = %d \t bundle_interleaved = %d\n",bundle_id,bundle_interleaved);
#endif
#ifdef NR_PDCCH_DCI_DEBUG
printf("\t\t bundle_id = %d \t bundle_interleaved = %d (r=%d, c=%d)\n",bundle_id,bundle_interleaved,r,c);
#endif
i++;
} else {
wptr[i]=wbar[i];
@@ -1153,15 +1155,15 @@ void nr_pdcch_extract_rbs_single(int32_t **rxdataF,
#endif
}
dl_ch0_ext = &dl_ch_estimates_ext[aarx][symbol * (frame_parms->N_RB_DL * NBR_RE_PER_RB_WITH_DMRS)];
dl_ch0_ext = &dl_ch_estimates_ext[aarx][symbol * (frame_parms->N_RB_DL * NBR_RE_PER_RB_WITHOUT_DMRS)];
#ifdef NR_PDCCH_DCI_DEBUG
printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_pdcch_extract_rbs_single)-> dl_ch0_ext = &dl_ch_estimates_ext[aarx = (%d)][symbol * (frame_parms->N_RB_DL * 12) = (%d)]\n",
aarx,symbol * (frame_parms->N_RB_DL * 12));
printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_pdcch_extract_rbs_single)-> dl_ch0_ext = &dl_ch_estimates_ext[aarx = (%d)][symbol * (frame_parms->N_RB_DL * 9) = (%d)]\n",
aarx,symbol * (frame_parms->N_RB_DL * NBR_RE_PER_RB_WITHOUT_DMRS));
#endif
rxF_ext = &rxdataF_ext[aarx][symbol * (frame_parms->N_RB_DL * NBR_RE_PER_RB_WITH_DMRS)];
rxF_ext = &rxdataF_ext[aarx][symbol * (frame_parms->N_RB_DL * NBR_RE_PER_RB_WITHOUT_DMRS)];
#ifdef NR_PDCCH_DCI_DEBUG
printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_pdcch_extract_rbs_single)-> rxF_ext = &rxdataF_ext[aarx = (%d)][symbol * (frame_parms->N_RB_DL * 12) = (%d)]\n",
aarx,symbol * (frame_parms->N_RB_DL * 12));
printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_pdcch_extract_rbs_single)-> rxF_ext = &rxdataF_ext[aarx = (%d)][symbol * (frame_parms->N_RB_DL * 9) = (%d)]\n",
aarx,symbol * (frame_parms->N_RB_DL * NBR_RE_PER_RB_WITHOUT_DMRS));
printf("\t\t<-NR_PDCCH_DCI_DEBUG (nr_pdcch_extract_rbs_single)-> (for symbol=%d, aarx=%d), symbol_mod=%d, nushiftmod3=%d \n",symbol,aarx,symbol_mod,nushiftmod3);
#endif
@@ -1172,14 +1174,14 @@ void nr_pdcch_extract_rbs_single(int32_t **rxdataF,
* Several cases have to be handled differently as IQ symbols are situated in different parts of rxdataF:
* 1. Number of RBs in the system bandwidth is even
* 1.1 The RB is < than the N_RB_DL/2 -> IQ symbols are in the second half of the rxdataF (from first_carrier_offset)
* 1.2 The RB is >= than the N_RB_DL/2 -> IQ symbols are in the first half of the rxdataF (from element 1)
* 1.2 The RB is >= than the N_RB_DL/2 -> IQ symbols are in the first half of the rxdataF (from element 0)
* 2. Number of RBs in the system bandwidth is odd
* (particular case when the RB with DC as it is treated differently: it is situated in symbol borders of rxdataF)
* 2.1 The RB is <= than the N_RB_DL/2 -> IQ symbols are in the second half of the rxdataF (from first_carrier_offset)
* 2.2 The RB is > than the N_RB_DL/2+1 -> IQ symbols are in the first half of the rxdataF (from element 1 + 2nd half RB containing DC)
* 2.2 The RB is > than the N_RB_DL/2+1 -> IQ symbols are in the first half of the rxdataF (from element 0 + 2nd half RB containing DC)
* 2.3 The RB is == N_RB_DL/2+1 -> IQ symbols are in the lower border of the rxdataF for first 6 IQ element and the upper border of the rxdataF for the last 6 IQ elements
* If the first RB containing PDCCH within the UE BWP and within the CORESET is higher than half of the system bandwidth (N_RB_DL),
* then the IQ symbol is going to be found at the position 1+c_rb-N_RB_DL/2 in rxdataF and
* then the IQ symbol is going to be found at the position 0+c_rb-N_RB_DL/2 in rxdataF and
* we have to point the pointer at (1+c_rb-N_RB_DL/2) in rxdataF
*/
@@ -2734,7 +2736,7 @@ int32_t nr_rx_pdcch(PHY_VARS_NR_UE *ue,
uint8_t is_secondary_ue,
int nb_coreset_active,
uint16_t symbol_mon,
int do_common) {
NR_SEARCHSPACE_TYPE_t searchSpaceType) {
#ifdef MU_RECEIVER
uint8_t eNB_id_i=eNB_id+1; //add 1 to eNB_id to separate from wanted signal, chosen as the B/F'd pilots from the SeNB are shifted by 1
@@ -2745,6 +2747,9 @@ int32_t nr_rx_pdcch(PHY_VARS_NR_UE *ue,
NR_UE_PDCCH **pdcch_vars = ue->pdcch_vars[ue->current_thread_id[nr_tti_rx]];
NR_UE_PDCCH *pdcch_vars2 = ue->pdcch_vars[ue->current_thread_id[nr_tti_rx]][eNB_id];
int do_common;
if (searchSpaceType == common) do_common=1;
if (searchSpaceType == ue_specific) do_common=0;
uint8_t log2_maxh, aatx, aarx;
int32_t avgs;
uint8_t n_pdcch_symbols;
@@ -2758,11 +2763,11 @@ int32_t nr_rx_pdcch(PHY_VARS_NR_UE *ue,
* pdcch-Config
* pdcch-ConfigCommon
*/
#if 0
/*
* initialize this values for testing
*/
#if 0
pdcch_vars2->coreset[nb_coreset_active].frequencyDomainResources = 0x1FFF2FF00000;
//pdcch_vars2->coreset[nb_coreset_active].frequencyDomainResources = 0x1E0000000000;
pdcch_vars2->coreset[nb_coreset_active].duration = 2;
@@ -2782,10 +2787,11 @@ int32_t nr_rx_pdcch(PHY_VARS_NR_UE *ue,
pdcch_vars[eNB_id]->searchSpace[i].searchSpaceType.sfi_nrofCandidates_aggrlevel8 = 3;
pdcch_vars[eNB_id]->searchSpace[i].searchSpaceType.sfi_nrofCandidates_aggrlevel16 = 1;
}
#endif //(0)
/*
* to be removed after testing
*/
#endif //(0)
// number of RB (1 symbol) or REG (12 RE) in one CORESET: higher-layer parameter CORESET-freq-dom
// (bit map 45 bits: each bit indicates 6 RB in CORESET -> 1 bit MSB indicates PRB 0..6 are part of CORESET)
@@ -2805,19 +2811,26 @@ int32_t nr_rx_pdcch(PHY_VARS_NR_UE *ue,
// The UE can be assigned 4 different BWP but only one active at a time.
// For each BWP the number of CORESETs is limited to 3 (including initial CORESET Id=0 -> ControlResourceSetId (0..maxNrofControlReourceSets-1) (0..12-1)
uint32_t n_BWP_start = 0;
//uint32_t n_BWP_start = 0;
//uint32_t n_rb_offset = 0;
uint32_t n_rb_offset = pdcch_vars2->coreset[nb_coreset_active].rb_offset;
// start time position for CORESET
// parameter symbol_mon is a 14 bits bitmap indicating monitoring symbols within a slot
uint8_t start_symbol = 0;
// at the moment we are considering that the PDCCH is always starting at symbol 0 of current slot
// the following code to initialize start_symbol must be activated once we implement PDCCH demapping on symbol not equal to 0 (considering symbol_mon)
/*for (int i=0; i < 14; i++) {
for (int i=0; i < 14; i++) {
if (symbol_mon >> (13-i) != 0) {
start_symbol = i;
i=14;
}
}*/
}
#ifdef NR_PDCCH_DCI_DEBUG
printf("\t<-NR_PDCCH_DCI_DEBUG (nr_rx_pdcch)-> symbol_mon=(%d) and start_symbol=(%d)\n",symbol_mon,start_symbol);
printf("\t<-NR_PDCCH_DCI_DEBUG (nr_rx_pdcch)-> coreset_freq_dom=(%lld) n_rb_offset=(%d) coreset_time_dur=(%d) n_shift=(%d) reg_bundle_size_L=(%d) coreset_interleaver_size_R=(%d) \n",
coreset_freq_dom,n_rb_offset,coreset_time_dur,n_shift,reg_bundle_size_L,coreset_interleaver_size_R);
#endif
//
// according to 38.213 v15.1.0: a PDCCH monitoring pattern within a slot,
@@ -2860,7 +2873,7 @@ int32_t nr_rx_pdcch(PHY_VARS_NR_UE *ue,
for (int s = start_symbol; s < (start_symbol + coreset_time_dur); s++) {
printf("\t<-NR_PDCCH_DCI_DEBUG (nr_rx_pdcch)-> we enter process pdcch ofdm symbol s=%d where coreset_time_dur=%d\n",s,coreset_time_dur);
if (is_secondary_ue == 1) {
/* if (is_secondary_ue == 1) {
pdcch_extract_rbs_single(common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[nr_tti_rx]].rxdataF,
common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[nr_tti_rx]].dl_ch_estimates[eNB_id+1], //add 1 to eNB_id to compensate for the shifted B/F'd pilots from the SeNB
pdcch_vars[eNB_id]->rxdataF_ext,
@@ -2885,7 +2898,7 @@ int32_t nr_rx_pdcch(PHY_VARS_NR_UE *ue,
0,
high_speed_flag,
frame_parms);
} else {
} else {*/
#ifdef NR_PDCCH_DCI_DEBUG
printf("\t<-NR_PDCCH_DCI_DEBUG (nr_rx_pdcch)-> we enter nr_pdcch_extract_rbs_single(is_secondary_ue=%d) to remove DM-RS PDCCH\n",
is_secondary_ue);
@@ -2899,7 +2912,7 @@ int32_t nr_rx_pdcch(PHY_VARS_NR_UE *ue,
frame_parms,
coreset_freq_dom,
coreset_nbr_rb,
n_BWP_start);
n_rb_offset);
/*
printf("\t### in nr_rx_pdcch() function we enter pdcch_extract_rbs_single(is_secondary_ue=%d) to remove DM-RS PDCCH\n",is_secondary_ue);
pdcch_extract_rbs_single(common_vars->common_vars_rx_data_per_thread[ue->current_thread_id[nr_tti_rx]].rxdataF,
@@ -2911,7 +2924,7 @@ int32_t nr_rx_pdcch(PHY_VARS_NR_UE *ue,
frame_parms);
*/
}
//}
#ifdef NR_PDCCH_DCI_DEBUG
printf("\t<-NR_PDCCH_DCI_DEBUG (nr_rx_pdcch)-> we enter pdcch_channel_level(avgP=%d) => compute channel level based on ofdm symbol 0, pdcch_vars[eNB_id]->dl_ch_estimates_ext\n",avgP);
@@ -3016,9 +3029,9 @@ printf("\t### in nr_rx_pdcch() function we enter pdcch_channel_compensation(log2
}
if (mimo_mode == SISO) {
#ifdef NR_PDCCH_DCI_DEBUG
printf("\t<-NR_PDCCH_DCI_DEBUG (nr_rx_pdcch)-> we enter pdcch_siso(for symbol 0) ---> pdcch_vars[eNB_id]->rxdataF_comp\n");
printf("\t<-NR_PDCCH_DCI_DEBUG (nr_rx_pdcch)-> we enter pdcch_siso ---> pdcch_vars[eNB_id]->rxdataF_comp Nothing to do here. TO BE REMOVED!!!\n");
#endif
pdcch_siso(frame_parms, pdcch_vars[eNB_id]->rxdataF_comp,s);
//pdcch_siso(frame_parms, pdcch_vars[eNB_id]->rxdataF_comp,s);
} else pdcch_alamouti(frame_parms, pdcch_vars[eNB_id]->rxdataF_comp,s);
#ifdef MU_RECEIVER
@@ -3060,21 +3073,11 @@ printf("\t### in nr_rx_pdcch() function we enter pdcch_channel_compensation(log2
#ifdef MU_RECEIVER
}
#endif //MU_RECEIVER
#if T_TRACER
T(T_UE_PHY_PDCCH_IQ, T_INT(frame_parms->N_RB_DL), T_INT(frame_parms->N_RB_DL),
T_INT(n_pdcch_symbols),
T_BUFFER(pdcch_vars[eNB_id]->rxdataF_comp, frame_parms->N_RB_DL*12*n_pdcch_symbols* 4));
#endif
/* We do not enter this function: in NR the number of PDCCH symbols is determined by higher layers parameter CORESET-time-dur
/*/
printf("\t<-NR_PDCCH_DCI_DEBUG (nr_rx_pdcch)-> we do not enter function rx_pcfich()\n as the number of PDCCH symbols is determined by higher layers parameter CORESET-time-dur and n_pdcch_symbols=%d\n",n_pdcch_symbols);
/*
// decode pcfich here and find out pdcch ofdm symbol number
n_pdcch_symbols = rx_pcfich(frame_parms, nr_tti_rx, pdcch_vars[eNB_id],mimo_mode);
if (n_pdcch_symbols > 3) n_pdcch_symbols = 1;
*/
#ifdef DEBUG_DCI_DECODING
printf("demapping: nr_tti_rx %d, mi %d, tdd_config %d\n",nr_tti_rx,get_mi(frame_parms,nr_tti_rx),frame_parms->tdd_config);
#endif
@@ -4267,14 +4270,14 @@ void nr_dci_decoding_procedure0(int s,
dci_decoded_output[current_thread_id][3]);
#endif
} else {
dci_alloc[*dci_cnt].dci_pdu[7] = dci_decoded_output[current_thread_id][0];
/* dci_alloc[*dci_cnt].dci_pdu[7] = dci_decoded_output[current_thread_id][0];
dci_alloc[*dci_cnt].dci_pdu[6] = dci_decoded_output[current_thread_id][1];
dci_alloc[*dci_cnt].dci_pdu[5] = dci_decoded_output[current_thread_id][2];
dci_alloc[*dci_cnt].dci_pdu[4] = dci_decoded_output[current_thread_id][3];
dci_alloc[*dci_cnt].dci_pdu[3] = dci_decoded_output[current_thread_id][4];
dci_alloc[*dci_cnt].dci_pdu[2] = dci_decoded_output[current_thread_id][5];
dci_alloc[*dci_cnt].dci_pdu[1] = dci_decoded_output[current_thread_id][6];
dci_alloc[*dci_cnt].dci_pdu[0] = dci_decoded_output[current_thread_id][7];
dci_alloc[*dci_cnt].dci_pdu[4] = dci_decoded_output[current_thread_id][3];*/
dci_alloc[*dci_cnt].dci_pdu[3] = dci_decoded_output[current_thread_id][0];
dci_alloc[*dci_cnt].dci_pdu[2] = dci_decoded_output[current_thread_id][1];
dci_alloc[*dci_cnt].dci_pdu[1] = dci_decoded_output[current_thread_id][2];
dci_alloc[*dci_cnt].dci_pdu[0] = dci_decoded_output[current_thread_id][3];
// MAX_DCI_SIZE_BITS has to be redefined for dci_decoded_output FIXME
// format2_0, format2_1 can be longer than 8 bytes. FIXME
#ifdef DEBUG_DCI_DECODING
openair1/PHY/NR_UE_TRANSPORT/dci_tools_nr.c
+204 -125
View File
@@ -31,6 +31,7 @@
*/
//#include "PHY/defs.h"
#include "PHY/defs_nr_UE.h"
//#include "PHY/NR_TRANSPORT/nr_dci.h"
//#include "PHY/NR_UE_TRANSPORT/nr_transport_ue.h"
//#include "PHY/extern.h"
//#include "SCHED/defs.h"
@@ -39,6 +40,7 @@
#endif
#include "assertions.h"
#include "SCHED_NR_UE/harq_nr.h"
//#define DEBUG_HARQ
@@ -51,6 +53,8 @@
#define NR_PDCCH_DCI_TOOLS
#define NR_PDCCH_DCI_TOOLS_DEBUG
typedef unsigned __int128 uint128_t;
#if 0
@@ -3953,12 +3957,39 @@ int dump_dci(NR_DL_FRAME_PARMS *frame_parms, DCI_ALLOC_t *dci)
#endif //(0)
#ifdef NR_PDCCH_DCI_TOOLS
uint16_t nr_dci_field(uint32_t dci_pdu[4],
uint8_t dci_fields_sizes[NBR_NR_DCI_FIELDS],
uint8_t dci_field)
{
uint16_t field_value = 0 ;
// first_bit_position contains the position of the first bit of the corresponding field within the dci pdu payload
uint16_t first_bit_position = 0;
// last_bit_position contains the position of the last bit of the corresponding field within the dci pdu payload
uint16_t last_bit_position = 0;
uint8_t bit=0;
//printf("\tdci_field=%d, \tsize=%d \t|",dci_field,dci_fields_sizes[dci_field]);
for (int i=0; i<dci_field ; i++){
first_bit_position = first_bit_position + dci_fields_sizes[i];
}
last_bit_position = first_bit_position + dci_fields_sizes[dci_field];
//printf("\tfirst_bit=%d,\tlast_bit=%d",first_bit_position,last_bit_position);
for (int i=0; i<4; i++)
for (int j=0; j<32; j++){
if ((((i*32)+j) >= first_bit_position) && (((i*32)+j) < last_bit_position)){
bit = (dci_pdu[i]<<(31-j))>>31;
field_value = (field_value<<1) + bit;
//printf(" bit(%d)=%d[%d] ",(i*32)+j,bit,field_value);
}
}
return field_value;
}
int nr_extract_dci_info(PHY_VARS_NR_UE *ue,
uint8_t eNB_id,
lte_frame_type_t frame_type,
uint8_t dci_length,
uint16_t rnti,
void *dci_pdu,
uint32_t dci_pdu[4],
NR_DCI_INFO_EXTRACTED_t *nr_pdci_info_extracted,
uint8_t dci_fields_sizes[NBR_NR_DCI_FIELDS][NBR_NR_FORMATS],
NR_DL_UE_HARQ_t *pdlsch0_harq,
@@ -4031,15 +4062,22 @@ int nr_extract_dci_info(PHY_VARS_NR_UE *ue,
* 55 RESERVED_NR_DCI
*
*/
uint64_t pdu_bitmap = 0xFFFFFFFFFFFFFFFF;
pdu_bitmap = (pdu_bitmap << (64 - dci_length)) >> (64 - dci_length); // this variable will help to remove the bits of other fields when left-switching
uint8_t dci_fields_sizes_format[NBR_NR_DCI_FIELDS] ={0};
for (int m=0; m<NBR_NR_DCI_FIELDS; m++) dci_fields_sizes_format[m]=dci_fields_sizes[m][dci_format];
// uint64_t pdu_bitmap = 0xFFFFFFFFFFFFFFFF;
// uint128_t pdu_bitmap = 0xFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF;
//#define DCI_MAX_SIZE 128
// pdu_bitmap = (pdu_bitmap << (DCI_MAX_SIZE - dci_length)) >> (DCI_MAX_SIZE - dci_length); // this variable will help to remove the bits of other fields when left-switching
uint8_t dci_field=0;
uint8_t sizes_count=0;
uint8_t left_shift=0;
// uint8_t sizes_count=0;
// uint8_t left_shift=0;
#ifdef NR_PDCCH_DCI_TOOLS_DEBUG
printf("\t\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_extract_dci_info) -> Entering function nr_extract_dci_info() with dci_pdu=%llx with pdu_bitmap=%llx dci_length=%d\n",(*(uint64_t *)dci_pdu), pdu_bitmap, dci_length);
printf("\t\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_extract_dci_info) -> for format %d, dci_fields_sizes {",dci_format-15);
for (int i=0; i<NBR_NR_DCI_FIELDS; i++) printf("%d ",dci_fields_sizes[i][dci_format-15]);
printf("\t\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_extract_dci_info) -> Entering function nr_extract_dci_info() with dci_pdu=%x %x %x %x dci_length=%d\n",
dci_pdu[0],dci_pdu[1],dci_pdu[2],dci_pdu[3], dci_length);
printf("\t\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_extract_dci_info) -> for format %d, dci_fields_sizes {",dci_format);
for (int i=0; i<NBR_NR_DCI_FIELDS; i++) printf("%d ",dci_fields_sizes[i][dci_format]);
printf("}\n");
#endif
@@ -4171,15 +4209,32 @@ int nr_extract_dci_info(PHY_VARS_NR_UE *ue,
/*
* Some dci fields need to be interpreted before the others.
*/
if (dci_fields_sizes[HARQ_PROCESS_NUMBER][dci_format-15] != 0) { // E.g: 27 HARQ_PROCESS_NUMBER (27 is the position in dci_fields_sizes array for field HARQ_PROCESS_NUMBER)
for (int i=0; i<=HARQ_PROCESS_NUMBER; i++) left_shift = left_shift + dci_fields_sizes[i][dci_format-15];
nr_pdci_info_extracted->harq_process_number = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[HARQ_PROCESS_NUMBER][dci_format-15]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[HARQ_PROCESS_NUMBER][dci_format-15]));
left_shift = 0;
if (dci_fields_sizes[HARQ_PROCESS_NUMBER][dci_format] != 0) { // E.g: 27 HARQ_PROCESS_NUMBER (27 is the position in dci_fields_sizes array for field HARQ_PROCESS_NUMBER)
//for (int i=0; i<=HARQ_PROCESS_NUMBER; i++) left_shift = left_shift + dci_fields_sizes[i][dci_format];
nr_pdci_info_extracted->harq_process_number = (uint8_t)nr_dci_field(dci_pdu,dci_fields_sizes_format,HARQ_PROCESS_NUMBER);
//(((((*(uint128_t *)dci_pdu) << (left_shift - dci_fields_sizes[HARQ_PROCESS_NUMBER][dci_format]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[HARQ_PROCESS_NUMBER][dci_format]));
//left_shift = 0;
#ifdef NR_PDCCH_DCI_TOOLS_DEBUG
printf("\t\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_extract_dci_info) -> nr_pdci_info_extracted->harq_process_number=%x\n",nr_pdci_info_extracted->harq_process_number);
#endif
}
/* store rnti type */
for (int k=0; k < TOTAL_NBR_SCRAMBLED_VALUES; k++) {
if (rnti == crc_scrambled_values[k]) {
if ((dci_format == format1_0) || (dci_format == format1_1)) {
pdlsch0->rnti_type = k;
}
else {
ulsch0->rnti_type = k;
}
}
}
if (j == TOTAL_NBR_SCRAMBLED_VALUES) {
LOG_E(PHY, "Fatal error in DCI due to unknown RNTI type at line %d in function %s of file %s \n", __LINE__ , __func__, __FILE__);
}
if ((dci_format == format1_0) || (dci_format == format1_1)) {
if (rnti==crc_scrambled_values[_SI_RNTI_]) {
ue->dlsch_SI[eNB_id]->active = 1;
@@ -4204,18 +4259,19 @@ int nr_extract_dci_info(PHY_VARS_NR_UE *ue,
}
for (dci_field=0; dci_field<NBR_NR_DCI_FIELDS; dci_field++) {
left_shift = left_shift + dci_fields_sizes[dci_field][dci_format-15];
if (dci_fields_sizes[dci_field][dci_format-15] != 0){
sizes_count = dci_fields_sizes[dci_field][dci_format-15];
//left_shift = left_shift + dci_fields_sizes[dci_field][dci_format];
if (dci_fields_sizes[dci_field][dci_format] != 0){
//sizes_count = dci_fields_sizes[dci_field][dci_format];
#ifdef NR_PDCCH_DCI_TOOLS_DEBUG
printf("\t\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_extract_dci_info) -> sizes_count = dci_fields_sizes[%d][%d] = %d\n",dci_field,dci_format-15,sizes_count);
printf("\t\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_extract_dci_info) -> dci_fields_sizes[%d][%d] = %d\n",dci_field,dci_format,dci_fields_sizes[dci_field][dci_format]);
#endif
switch (dci_field){
case IDENTIFIER_DCI_FORMATS: // 0 IDENTIFIER_DCI_FORMATS: (field defined for format0_0,format0_1,format1_0,format1_1,format2_0,format2_1,format2_2,format2_3)
// if format 0_0: The value of this bit field is always set to 0, indicating an UL DCI format (TS38.212 Section 7.3.1.1.1)
// if format 1_0: The value of this bit field is always set to 1, indicating a DL DCI format (TS38.212 Section 7.3.1.2.1)
nr_pdci_info_extracted->identifier_dci_formats = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format-15]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format-15]));
nr_pdci_info_extracted->identifier_dci_formats = (uint8_t)nr_dci_field(dci_pdu,dci_fields_sizes_format,dci_field);
//(((((*(uint128_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format]));
#ifdef NR_PDCCH_DCI_TOOLS_DEBUG
printf("\t\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_extract_dci_info) -> nr_pdci_info_extracted->identifier_dci_formats=%x\n",nr_pdci_info_extracted->identifier_dci_formats);
#endif
@@ -4223,13 +4279,15 @@ int nr_extract_dci_info(PHY_VARS_NR_UE *ue,
case CARRIER_IND: // 1 CARRIER_IND: (field defined for -,format0_1,-,format1_1,-,-,-,-)
// 0 or 3 bits, as defined in Subclause x.x of [5, TS38.213]
nr_pdci_info_extracted->carrier_ind = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format-15]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format-15]));
nr_pdci_info_extracted->carrier_ind = (uint8_t)nr_dci_field(dci_pdu,dci_fields_sizes_format,dci_field);
//(((((*(uint128_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format]));
#ifdef NR_PDCCH_DCI_TOOLS_DEBUG
printf("\t\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_extract_dci_info) -> nr_pdci_info_extracted->carrier_ind=%x\n",nr_pdci_info_extracted->carrier_ind);
#endif
break;
case SUL_IND_0_1: // 2 SUL_IND_0_1: (field defined for -,format0_1,-,-,-,-,-,-)
nr_pdci_info_extracted->sul_ind_0_1 = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format-15]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format-15]));
nr_pdci_info_extracted->sul_ind_0_1 = (uint8_t)nr_dci_field(dci_pdu,dci_fields_sizes_format,dci_field);
//(((((*(uint128_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format]));
#ifdef NR_PDCCH_DCI_TOOLS_DEBUG
printf("\t\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_extract_dci_info) -> nr_pdci_info_extracted->sul_ind_0_1=%x\n",nr_pdci_info_extracted->sul_ind_0_1);
#endif
@@ -4237,48 +4295,55 @@ int nr_extract_dci_info(PHY_VARS_NR_UE *ue,
case SLOT_FORMAT_IND: // 3 SLOT_FORMAT_IND: (field defined for -,-,-,-,format2_0,-,-,-)
// size of DCI format 2_0 is configurable by higher layers up to 128 bits, according to Subclause 11.1.1 of [5, TS 38.213]
nr_pdci_info_extracted->slot_format_ind = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format-15]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format-15]));
nr_pdci_info_extracted->slot_format_ind = (uint8_t)nr_dci_field(dci_pdu,dci_fields_sizes_format,dci_field);
//(((((*(uint128_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format]));
#ifdef NR_PDCCH_DCI_TOOLS_DEBUG
printf("\t\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_extract_dci_info) -> nr_pdci_info_extracted->slot_format_ind=%x\n",nr_pdci_info_extracted->slot_format_ind);
#endif
break;
case PRE_EMPTION_IND: // 4 PRE_EMPTION_IND: (field defined for -,-,-,-,-,format2_1,-,-)
// size of DCI format 2_1 is configurable by higher layers up to 126 bits, according to Subclause 11.2 of [5, TS 38.213]. Each pre-emption indication is 14 bits
nr_pdci_info_extracted->pre_emption_ind = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format-15]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format-15]));
nr_pdci_info_extracted->pre_emption_ind = (uint8_t)nr_dci_field(dci_pdu,dci_fields_sizes_format,dci_field);
//(((((*(uint128_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format]));
#ifdef NR_PDCCH_DCI_TOOLS_DEBUG
printf("\t\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_extract_dci_info) -> nr_pdci_info_extracted->pre_emption_ind=%x\n",nr_pdci_info_extracted->pre_emption_ind);
#endif
break;
case TPC_CMD_NUMBER: // 5 TPC_CMD_NUMBER: (field defined for -,-,-,-,-,-,format2_2,-)
// The parameter xxx provided by higher layers determines the index to the TPC command number for an UL of a cell. Each TPC command number is 2 bits
nr_pdci_info_extracted->tpc_cmd_number = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format-15]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format-15]));
nr_pdci_info_extracted->tpc_cmd_number = (uint8_t)nr_dci_field(dci_pdu,dci_fields_sizes_format,dci_field);
//(((((*(uint128_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format]));
#ifdef NR_PDCCH_DCI_TOOLS_DEBUG
printf("\t\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_extract_dci_info) -> nr_pdci_info_extracted->tpc_cmd_number=%x\n",nr_pdci_info_extracted->tpc_cmd_number);
#endif
break;
case BLOCK_NUMBER: // 6 BLOCK_NUMBER: (field defined for -,-,-,-,-,-,-,format2_3)
// starting position of a block is determined by the parameter startingBitOfFormat2_3
nr_pdci_info_extracted->block_number = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format-15]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format-15]));
nr_pdci_info_extracted->block_number = (uint8_t)nr_dci_field(dci_pdu,dci_fields_sizes_format,dci_field);
//(((((*(uint128_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format]));
#ifdef NR_PDCCH_DCI_TOOLS_DEBUG
printf("\t\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_extract_dci_info) -> nr_pdci_info_extracted->block_number=%x\n",nr_pdci_info_extracted->block_number);
#endif
break;
case BANDWIDTH_PART_IND: // 7 BANDWIDTH_PART_IND: (field defined for -,format0_1,-,format1_1,-,-,-,-)
nr_pdci_info_extracted->bandwidth_part_ind = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format-15]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format-15]));
nr_pdci_info_extracted->bandwidth_part_ind = (uint8_t)nr_dci_field(dci_pdu,dci_fields_sizes_format,dci_field);
//(((((*(uint128_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format]));
#ifdef NR_PDCCH_DCI_TOOLS_DEBUG
printf("\t\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_extract_dci_info) -> nr_pdci_info_extracted->bandwidth_part_ind=%x\n",nr_pdci_info_extracted->bandwidth_part_ind);
#endif
break;
case SHORT_MESSAGE_IND: // 8 SHORT_MESSAGE_IND: (field defined for -,-,format1_0,format1_1,-,-,-,-)
nr_pdci_info_extracted->short_message_ind = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format-15]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format-15]));
nr_pdci_info_extracted->short_message_ind = (uint8_t)nr_dci_field(dci_pdu,dci_fields_sizes_format,dci_field);
//(((((*(uint128_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format]));
#ifdef NR_PDCCH_DCI_TOOLS_DEBUG
printf("\t\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_extract_dci_info) -> nr_pdci_info_extracted->short_message_ind=%x\n",nr_pdci_info_extracted->short_message_ind);
#endif
break;
case SHORT_MESSAGES: // 9 SHORT_MESSAGES: (field defined for -,-,format1_0,format1_1,-,-,-,-)
nr_pdci_info_extracted->short_messages = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format-15]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format-15]));
nr_pdci_info_extracted->short_messages = (uint8_t)nr_dci_field(dci_pdu,dci_fields_sizes_format,dci_field);
//(((((*(uint128_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format]));
#ifdef NR_PDCCH_DCI_TOOLS_DEBUG
printf("\t\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_extract_dci_info) -> nr_pdci_info_extracted->short_messages=%x\n",nr_pdci_info_extracted->short_messages);
#endif
@@ -4288,7 +4353,8 @@ int nr_extract_dci_info(PHY_VARS_NR_UE *ue,
// PUSCH hopping with resource allocation type 1 not considered
// According to 38.214 V15.1.0 Section 6.1.2.2 Two uplink resource allocation schemes, type 0 and type 1, are supported.
// The UE shall assume that when the scheduling PDCCH is received with DCI format 0_0, then uplink resource allocation type 1 is used.
nr_pdci_info_extracted->freq_dom_resource_assignment_UL = (uint16_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format-15]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format-15]));
nr_pdci_info_extracted->freq_dom_resource_assignment_UL = (uint16_t)nr_dci_field(dci_pdu,dci_fields_sizes_format,dci_field);
//(((((*(uint128_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format]));
if (dci_format == format0_1){ // uplink resource allocation type 0 or 1 can be used
}
if (dci_format == format0_0){ // only uplink resource allocation type 1
@@ -4317,7 +4383,8 @@ int nr_extract_dci_info(PHY_VARS_NR_UE *ue,
case FREQ_DOM_RESOURCE_ASSIGNMENT_DL: // 11 FREQ_DOM_RESOURCE_ASSIGNMENT_DL: (field defined for -,-,format1_0,format1_1,-,-,-,-)
// According to 38.214 V15.1.0 Section 5.1.2.2 Two downlink resource allocation schemes, type 0 and type 1, are supported.
// The UE shall assume that when the scheduling grant is received with DCI format 1_0, then downlink resource allocation type 1 is used.
nr_pdci_info_extracted->freq_dom_resource_assignment_DL = (uint16_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format-15]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format-15]));
nr_pdci_info_extracted->freq_dom_resource_assignment_DL = (uint16_t)nr_dci_field(dci_pdu,dci_fields_sizes_format,dci_field);
//(((((*(uint128_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format]));
if (dci_format == format1_1){ // uplink resource allocation type 0 or 1 can be used
}
if (dci_format == format1_0){ // only uplink resource allocation type 1
@@ -4391,7 +4458,8 @@ int nr_extract_dci_info(PHY_VARS_NR_UE *ue,
// Subclause 5.1.2.1 of [6, TS 38.214] for formats format1_0,format1_1
// The bitwidth for this field is determined as log2(I) bits,
// where I the number of entries in the higher layer parameter pusch-AllocationList
nr_pdci_info_extracted->time_dom_resource_assignment = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format-15]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format-15]));
nr_pdci_info_extracted->time_dom_resource_assignment = (uint8_t)nr_dci_field(dci_pdu,dci_fields_sizes_format,dci_field);
//(((((*(uint128_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format]));
if (dci_format == format0_0 || dci_format == format0_1){ // Subclause 6.1.2.1 of [6, TS 38.214]
k_offset = table_6_1_2_1_1_2_time_dom_res_alloc_A[nr_pdci_info_extracted->time_dom_resource_assignment][0];
sliv_S = table_6_1_2_1_1_2_time_dom_res_alloc_A[nr_pdci_info_extracted->time_dom_resource_assignment][1];
@@ -4428,7 +4496,8 @@ int nr_extract_dci_info(PHY_VARS_NR_UE *ue,
//Table 7.3.1.1.2-33: VRB-to-PRB mapping
// 0 Non-interleaved
// 1 Interleaved
nr_pdci_info_extracted->vrb_to_prb_mapping = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format-15]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format-15]));
nr_pdci_info_extracted->vrb_to_prb_mapping = (uint8_t)nr_dci_field(dci_pdu,dci_fields_sizes_format,dci_field);
//(((((*(uint128_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format]));
if (nr_pdci_info_extracted->vrb_to_prb_mapping == 0) { // Non-interleaved
} else { // Interleaved
// format 0_1 defined in TS 38.211 Section 6.3.1.7
@@ -4441,20 +4510,23 @@ int nr_extract_dci_info(PHY_VARS_NR_UE *ue,
case PRB_BUNDLING_SIZE_IND: // 14 PRB_BUNDLING_SIZE_IND: (field defined for -,-,-,format1_1,-,-,-,-)
// 0 bit if the higher layer parameter PRB_bundling is not configured or is set to 'static', or 1 bit if the higher layer parameter PRB_bundling is set to 'dynamic' according to Subclause 5.1.2.3 of [6, TS 38.214]
nr_pdci_info_extracted->prb_bundling_size_ind = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format-15]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format-15]));
nr_pdci_info_extracted->prb_bundling_size_ind = (uint8_t)nr_dci_field(dci_pdu,dci_fields_sizes_format,dci_field);
//(((((*(uint128_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format]));
#ifdef NR_PDCCH_DCI_TOOLS_DEBUG
printf("\t\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_extract_dci_info) -> nr_pdci_info_extracted->prb_bundling_size_ind=%x\n",nr_pdci_info_extracted->prb_bundling_size_ind);
#endif
break;
case RATE_MATCHING_IND: // 15 RATE_MATCHING_IND: (field defined for -,-,-,format1_1,-,-,-,-)
// 0, 1, or 2 bits according to higher layer parameter rate-match-PDSCH-resource-set
nr_pdci_info_extracted->rate_matching_ind = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format-15]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format-15]));
nr_pdci_info_extracted->rate_matching_ind = (uint8_t)nr_dci_field(dci_pdu,dci_fields_sizes_format,dci_field);
//(((((*(uint128_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format]));
#ifdef NR_PDCCH_DCI_TOOLS_DEBUG
printf("\t\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_extract_dci_info) -> nr_pdci_info_extracted->rate_matching_ind=%x\n",nr_pdci_info_extracted->rate_matching_ind);
#endif
break;
case ZP_CSI_RS_TRIGGER: // 16 ZP_CSI_RS_TRIGGER: (field defined for -,-,-,format1_1,-,-,-,-)
nr_pdci_info_extracted->zp_csi_rs_trigger = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format-15]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format-15]));
nr_pdci_info_extracted->zp_csi_rs_trigger = (uint8_t)nr_dci_field(dci_pdu,dci_fields_sizes_format,dci_field);
//(((((*(uint128_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format]));
#ifdef NR_PDCCH_DCI_TOOLS_DEBUG
printf("\t\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_extract_dci_info) -> nr_pdci_info_extracted->zp_csi_rs_trigger=%x\n",nr_pdci_info_extracted->zp_csi_rs_trigger);
#endif
@@ -4463,7 +4535,8 @@ int nr_extract_dci_info(PHY_VARS_NR_UE *ue,
case FREQ_HOPPING_FLAG: // 17 FREQ_HOPPING_FLAG: (field defined for format0_0,format0_1,-,-,-,-,-,-)
// 0 bit if only resource allocation type 0
// 1 bit otherwise, only applicable to resource allocation type 1, as defined in Subclause 6.3 of [6, TS 38.214]
nr_pdci_info_extracted->freq_hopping_flag = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format-15]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format-15]));
nr_pdci_info_extracted->freq_hopping_flag = (uint8_t)nr_dci_field(dci_pdu,dci_fields_sizes_format,dci_field);
//(((((*(uint128_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format]));
if (nr_pdci_info_extracted->freq_hopping_flag != 0) { // PUSCH frequency hopping is performed (only resource allocation type 1)
} else { // PUSCH frequency hopping is not performed (only resource allocation type 1)
@@ -4475,42 +4548,48 @@ int nr_extract_dci_info(PHY_VARS_NR_UE *ue,
break;
case TB1_MCS: // 18 TB1_MCS: (field defined for -,-,-,format1_1,-,-,-,-)
nr_pdci_info_extracted->tb1_mcs = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format-15]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format-15]));
nr_pdci_info_extracted->tb1_mcs = (uint8_t)nr_dci_field(dci_pdu,dci_fields_sizes_format,dci_field);
//(((((*(uint128_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format]));
if (nr_pdci_info_extracted->mcs < 29) pdlsch0_harq->mcs = nr_pdci_info_extracted->tb1_mcs;
#ifdef NR_PDCCH_DCI_TOOLS_DEBUG
printf("\t\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_extract_dci_info) -> nr_pdci_info_extracted->tb1_mcs=%x\n",nr_pdci_info_extracted->tb1_mcs);
#endif
break;
case TB1_NDI: // 19 TB1_NDI: (field defined for -,-,-,format1_1,-,-,-,-)
nr_pdci_info_extracted->tb1_ndi = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format-15]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format-15]));
nr_pdci_info_extracted->tb1_ndi = (uint8_t)nr_dci_field(dci_pdu,dci_fields_sizes_format,dci_field);
//(((((*(uint128_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format]));
pdlsch0_harq->DCINdi = nr_pdci_info_extracted->tb1_ndi;
#ifdef NR_PDCCH_DCI_TOOLS_DEBUG
printf("\t\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_extract_dci_info) -> nr_pdci_info_extracted->tb1_ndi=%x\n",nr_pdci_info_extracted->tb1_ndi);
#endif
break;
case TB1_RV: // 20 TB1_RV: (field defined for -,-,-,format1_1,-,-,-,-)
nr_pdci_info_extracted->tb1_rv = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format-15]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format-15]));
nr_pdci_info_extracted->tb1_rv = (uint8_t)nr_dci_field(dci_pdu,dci_fields_sizes_format,dci_field);
//(((((*(uint128_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format]));
pdlsch0_harq->rvidx = nr_pdci_info_extracted->tb1_rv;
#ifdef NR_PDCCH_DCI_TOOLS_DEBUG
printf("\t\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_extract_dci_info) -> nr_pdci_info_extracted->tb1_rv=%x\n",nr_pdci_info_extracted->tb1_rv);
#endif
break;
case TB2_MCS: // 21 TB2_MCS: (field defined for -,-,-,format1_1,-,-,-,-)
nr_pdci_info_extracted->tb2_mcs = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format-15]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format-15]));
nr_pdci_info_extracted->tb2_mcs = (uint8_t)nr_dci_field(dci_pdu,dci_fields_sizes_format,dci_field);
//(((((*(uint128_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format]));
if (nr_pdci_info_extracted->mcs < 29) pdlsch0_harq->mcs = nr_pdci_info_extracted->tb2_mcs;
#ifdef NR_PDCCH_DCI_TOOLS_DEBUG
printf("\t\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_extract_dci_info) -> nr_pdci_info_extracted->tb2_mcs=%x\n",nr_pdci_info_extracted->tb2_mcs);
#endif
break;
case TB2_NDI: // 22 TB2_NDI: (field defined for -,-,-,format1_1,-,-,-,-)
nr_pdci_info_extracted->tb2_ndi = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format-15]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format-15]));
nr_pdci_info_extracted->tb2_ndi = (uint8_t)nr_dci_field(dci_pdu,dci_fields_sizes_format,dci_field);
//(((((*(uint128_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format]));
pdlsch0_harq->DCINdi = nr_pdci_info_extracted->tb2_ndi;
#ifdef NR_PDCCH_DCI_TOOLS_DEBUG
printf("\t\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_extract_dci_info) -> nr_pdci_info_extracted->tb2_ndi=%x\n",nr_pdci_info_extracted->tb2_ndi);
#endif
break;
case TB2_RV: // 23 TB2_RV: (field defined for -,-,-,format1_1,-,-,-,-)
nr_pdci_info_extracted->tb2_rv = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format-15]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format-15]));
nr_pdci_info_extracted->tb2_rv = (uint8_t)nr_dci_field(dci_pdu,dci_fields_sizes_format,dci_field);
//(((((*(uint128_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format]));
pdlsch0_harq->rvidx = nr_pdci_info_extracted->tb2_rv;
#ifdef NR_PDCCH_DCI_TOOLS_DEBUG
printf("\t\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_extract_dci_info) -> nr_pdci_info_extracted->tb2_rv=%x\n",nr_pdci_info_extracted->tb2_rv);
@@ -4518,7 +4597,8 @@ int nr_extract_dci_info(PHY_VARS_NR_UE *ue,
break;
case MCS: // 24 MCS: (field defined for format0_0,format0_1,format1_0,-,-,-,-,-)
nr_pdci_info_extracted->mcs = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format-15]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format-15]));
nr_pdci_info_extracted->mcs = (uint8_t)nr_dci_field(dci_pdu,dci_fields_sizes_format,dci_field);
//(((((*(uint128_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format]));
if (nr_pdci_info_extracted->mcs < 29) {
if (dci_format == format0_0 || dci_format == format0_1)
ulsch0->harq_processes[nr_pdci_info_extracted->harq_process_number]->mcs = nr_pdci_info_extracted->mcs;
@@ -4533,68 +4613,30 @@ int nr_extract_dci_info(PHY_VARS_NR_UE *ue,
break;
case NDI: // 25 NDI: (field defined for format0_0,format0_1,format1_0,-,-,-,-,-)
nr_pdci_info_extracted->ndi = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format-15]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format-15]));
if (dci_format == format0_0 || dci_format == format0_1) {
ulsch0->harq_processes[nr_pdci_info_extracted->harq_process_number]->DCINdi = nr_pdci_info_extracted->ndi;
if (ulsch0->harq_processes[nr_pdci_info_extracted->harq_process_number]->first_tx==1) {
ulsch0->harq_processes[nr_pdci_info_extracted->harq_process_number]->first_tx=0;
ulsch0->harq_processes[nr_pdci_info_extracted->harq_process_number]->DCINdi= nr_pdci_info_extracted->ndi;
ulsch0->harq_processes[nr_pdci_info_extracted->harq_process_number]->round = 0;
} else {
if (ulsch0->harq_processes[nr_pdci_info_extracted->harq_process_number]->DCINdi != nr_pdci_info_extracted->ndi) { // new SDU opportunity
ulsch0->harq_processes[nr_pdci_info_extracted->harq_process_number]->DCINdi= nr_pdci_info_extracted->ndi;
ulsch0->harq_processes[nr_pdci_info_extracted->harq_process_number]->round = 0;
}
}
} else {
if (rnti == crc_scrambled_values[_TC_RNTI_]) { //fix for standalone Contention Resolution Id
pdlsch0_harq->DCINdi = (uint8_t)-1;
} else {
if ((prev_ndi != nr_pdci_info_extracted->ndi) || (pdlsch0_harq->first_tx==1)) {
pdlsch0_harq->round = 0;
pdlsch0_harq->first_tx = 0;
pdlsch0_harq->status = ACTIVE;
}
pdlsch0_harq->DCINdi = nr_pdci_info_extracted->ndi;
}
}
nr_pdci_info_extracted->ndi = (uint8_t)nr_dci_field(dci_pdu,dci_fields_sizes_format,dci_field);
//(((((*(uint128_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format]));
#ifdef NR_PDCCH_DCI_TOOLS_DEBUG
printf("\t\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_extract_dci_info) -> nr_pdci_info_extracted->ndi=%x\n",nr_pdci_info_extracted->ndi);
#endif
break;
case RV: // 26 RV: (field defined for format0_0,format0_1,format1_0,-,-,-,-,-)
nr_pdci_info_extracted->rv = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format-15]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format-15]));
nr_pdci_info_extracted->rv = (uint8_t)nr_dci_field(dci_pdu,dci_fields_sizes_format,dci_field);
//(((((*(uint128_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format]));
if (dci_format == format0_0 || dci_format == format0_1)
ulsch0->harq_processes[nr_pdci_info_extracted->harq_process_number]->rvidx = nr_pdci_info_extracted->rv;
else
pdlsch0_harq->rvidx = nr_pdci_info_extracted->rv;
if ((prev_ndi == nr_pdci_info_extracted->ndi) && (pdlsch0_harq->rvidx != 0)) { // NDI has not been toggled but rv was increased by eNB: retransmission
if (pdlsch0_harq->status == SCH_IDLE) {
// packet was actually decoded in previous transmission (ACK was missed by eNB)
// however, the round is not a good check as it might have been decoded in a retransmission prior to this one.
// skip pdsch decoding and report ack
pdlsch0->harq_processes[pdlsch0->current_harq_pid]->harq_ack.ack = 1;
pdlsch0->harq_processes[pdlsch0->current_harq_pid]->harq_ack.send_harq_status;
#if 0
pdlsch0->active = 0;
pdlsch0->harq_ack[nr_tti_rx].ack = 1;
pdlsch0->harq_ack[nr_tti_rx].harq_id = nr_pdci_info_extracted->harq_process_number;
pdlsch0->harq_ack[nr_tti_rx].send_harq_status = 1;
#endif
} else { // normal retransmission, nothing special to do
}
} else {
pdlsch0_harq->status = ACTIVE;
}
#ifdef NR_PDCCH_DCI_TOOLS_DEBUG
printf("\t\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_extract_dci_info) -> nr_pdci_info_extracted->rv=%x\n",nr_pdci_info_extracted->rv);
#endif
break;
case HARQ_PROCESS_NUMBER: // 27 HARQ_PROCESS_NUMBER: (field defined for format0_0,format0_1,format1_0,format1_1,-,-,-,-)
nr_pdci_info_extracted->harq_process_number = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format-15]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format-15]));
nr_pdci_info_extracted->harq_process_number = (uint8_t)nr_dci_field(dci_pdu,dci_fields_sizes_format,dci_field);
//(((((*(uint128_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format]));
pdlsch0->current_harq_pid = nr_pdci_info_extracted->harq_process_number;
#ifdef NR_PDCCH_DCI_TOOLS_DEBUG
printf("\t\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_extract_dci_info) -> nr_pdci_info_extracted->harq_process_number=%x\n",nr_pdci_info_extracted->harq_process_number);
@@ -4606,7 +4648,8 @@ int nr_extract_dci_info(PHY_VARS_NR_UE *ue,
// For format1_1: 4 if more than one serving cell are configured in the DL and the higher layer parameter HARQ-ACK-codebook=dynamic, where the 2 MSB bits are the counter DAI and the 2 LSB bits are the total DAI
// 2 if one serving cell is configured in the DL and the higher layer parameter HARQ-ACK-codebook=dynamic, where the 2 bits are the counter DAI
// 0 otherwise
nr_pdci_info_extracted->dai = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format-15]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format-15]));
nr_pdci_info_extracted->dai = (uint8_t)nr_dci_field(dci_pdu,dci_fields_sizes_format,dci_field);
//(((((*(uint128_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format]));
pdlsch0->harq_processes[pdlsch0->current_harq_pid]->harq_ack.vDAI_DL = nr_pdci_info_extracted->dai+1;
//pdlsch0->harq_ack[nr_tti_rx].vDAI_DL = nr_pdci_info_extracted->dai+1;
#ifdef NR_PDCCH_DCI_TOOLS_DEBUG
@@ -4616,14 +4659,16 @@ int nr_extract_dci_info(PHY_VARS_NR_UE *ue,
case FIRST_DAI: // 29 FIRST_DAI: (field defined for -,format0_1,-,-,-,-,-,-)
// (1 or 2 bits) 1 bit for semi-static HARQ-ACK
nr_pdci_info_extracted->first_dai = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format-15]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format-15]));
nr_pdci_info_extracted->first_dai = (uint8_t)nr_dci_field(dci_pdu,dci_fields_sizes_format,dci_field);
//(((((*(uint128_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format]));
#ifdef NR_PDCCH_DCI_TOOLS_DEBUG
printf("\t\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_extract_dci_info) -> nr_pdci_info_extracted->first_dai=%x\n",nr_pdci_info_extracted->first_dai);
#endif
break;
case SECOND_DAI: // 30 SECOND_DAI: (field defined for -,format0_1,-,-,-,-,-,-)
// (0 or 2 bits) 2 bits for dynamic HARQ-ACK codebook with two HARQ-ACK sub-codebooks
nr_pdci_info_extracted->second_dai = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format-15]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format-15]));
nr_pdci_info_extracted->second_dai = (uint8_t)nr_dci_field(dci_pdu,dci_fields_sizes_format,dci_field);
//(((((*(uint128_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format]));
#ifdef NR_PDCCH_DCI_TOOLS_DEBUG
printf("\t\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_extract_dci_info) -> nr_pdci_info_extracted->second_dai=%x\n",nr_pdci_info_extracted->second_dai);
#endif
@@ -4631,7 +4676,8 @@ int nr_extract_dci_info(PHY_VARS_NR_UE *ue,
case TB_SCALING: // 31 TB_SCALING: (field defined for -,format0_1,-,-,-,-,-,-)
// (0 or 2 bits) 2 bits for dynamic HARQ-ACK codebook with two HARQ-ACK sub-codebooks
nr_pdci_info_extracted->tb_scaling = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format-15]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format-15]));
nr_pdci_info_extracted->tb_scaling = (uint8_t)nr_dci_field(dci_pdu,dci_fields_sizes_format,dci_field);
//(((((*(uint128_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format]));
#ifdef NR_PDCCH_DCI_TOOLS_DEBUG
printf("\t\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_extract_dci_info) -> nr_pdci_info_extracted->tb_scaling=%x\n",nr_pdci_info_extracted->tb_scaling);
#endif
@@ -4639,7 +4685,8 @@ int nr_extract_dci_info(PHY_VARS_NR_UE *ue,
case TPC_PUSCH: // 32 TPC_PUSCH: (field defined for format0_0,format0_1,-,-,-,-,-,-)
// defined in Subclause 7.1.1 TS 38.213
nr_pdci_info_extracted->tpc_pusch = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format-15]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format-15]));
nr_pdci_info_extracted->tpc_pusch = (uint8_t)nr_dci_field(dci_pdu,dci_fields_sizes_format,dci_field);
//(((((*(uint128_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format]));
ulsch0->harq_processes[nr_pdci_info_extracted->harq_process_number]->TPC = nr_pdci_info_extracted->tpc_pusch;
if (ue->ul_power_control_dedicated[eNB_id].accumulationEnabled == 1) {
ulsch0->f_pusch += nr_delta_PUSCH_acc[ulsch0->harq_processes[nr_pdci_info_extracted->harq_process_number]->TPC];
@@ -4653,7 +4700,8 @@ int nr_extract_dci_info(PHY_VARS_NR_UE *ue,
case TPC_PUCCH: // 33 TPC_PUCCH: (field defined for -,-,format1_0,format1_1,-,-,-,-)
// defined in Subclause 7.2.1 TS 38.213
nr_pdci_info_extracted->tpc_pucch = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format-15]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format-15]));
nr_pdci_info_extracted->tpc_pucch = (uint8_t)nr_dci_field(dci_pdu,dci_fields_sizes_format,dci_field);
//(((((*(uint128_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format]));
pdlsch0_harq->delta_PUCCH = nr_delta_PUCCH_lut[nr_pdci_info_extracted->tpc_pucch &3];
#ifdef NR_PDCCH_DCI_TOOLS_DEBUG
printf("\t\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_extract_dci_info) -> nr_pdci_info_extracted->tpc_pucch=%x\n",nr_pdci_info_extracted->tpc_pucch);
@@ -4663,7 +4711,8 @@ int nr_extract_dci_info(PHY_VARS_NR_UE *ue,
case PUCCH_RESOURCE_IND: // 34 PUCCH_RESOURCE_IND: (field defined for -,-,format1_0,format1_1,-,-,-,-)
// defined in Subclause 9.2.3 TS 38.213
// PUCCH_RESOURCE_IND points to PUCCH-ResourceId, but PUCCH-ResourceId is not defined yet
nr_pdci_info_extracted->pucch_resource_ind = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format-15]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format-15]));
nr_pdci_info_extracted->pucch_resource_ind = (uint8_t)nr_dci_field(dci_pdu,dci_fields_sizes_format,dci_field);
//(((((*(uint128_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format]));
#ifdef NR_PDCCH_DCI_TOOLS_DEBUG
printf("\t\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_extract_dci_info) -> nr_pdci_info_extracted->pucch_resource_ind=%x\n",nr_pdci_info_extracted->pucch_resource_ind);
#endif
@@ -4672,91 +4721,105 @@ int nr_extract_dci_info(PHY_VARS_NR_UE *ue,
case PDSCH_TO_HARQ_FEEDBACK_TIME_IND: // 35 PDSCH_TO_HARQ_FEEDBACK_TIME_IND: (field defined for -,-,format1_0,format1_1,-,-,-,-)
// defined in Subclause 9.2.3 TS 38.213
// PDSCH_TO_HARQ_FEEDBACK_TIME_IND points to DL-data-DL-acknowledgement, but DL-data-DL-acknowledgement is not defined yet
nr_pdci_info_extracted->pdsch_to_harq_feedback_time_ind = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format-15]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format-15]));
nr_pdci_info_extracted->pdsch_to_harq_feedback_time_ind = (uint8_t)nr_dci_field(dci_pdu,dci_fields_sizes_format,dci_field);
//(((((*(uint128_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format]));
#ifdef NR_PDCCH_DCI_TOOLS_DEBUG
printf("\t\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_extract_dci_info) -> nr_pdci_info_extracted->pdsch_to_harq_feedback_time_ind=%x\n",nr_pdci_info_extracted->pdsch_to_harq_feedback_time_ind);
#endif
break;
case SRS_RESOURCE_IND: // 36 SRS_RESOURCE_IND: (field defined for -,format0_1,-,-,-,-,-,-)
nr_pdci_info_extracted->srs_resource_ind = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format-15]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format-15]));
nr_pdci_info_extracted->srs_resource_ind = (uint8_t)nr_dci_field(dci_pdu,dci_fields_sizes_format,dci_field);
//(((((*(uint128_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format]));
#ifdef NR_PDCCH_DCI_TOOLS_DEBUG
printf("\t\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_extract_dci_info) -> nr_pdci_info_extracted->srs_resource_ind=%x\n",nr_pdci_info_extracted->srs_resource_ind);
#endif
break;
case PRECOD_NBR_LAYERS: // 37 PRECOD_NBR_LAYERS: (field defined for -,format0_1,-,-,-,-,-,-)
nr_pdci_info_extracted->precod_nbr_layers = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format-15]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format-15]));
nr_pdci_info_extracted->precod_nbr_layers = (uint8_t)nr_dci_field(dci_pdu,dci_fields_sizes_format,dci_field);
//(((((*(uint128_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format]));
#ifdef NR_PDCCH_DCI_TOOLS_DEBUG
printf("\t\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_extract_dci_info) -> nr_pdci_info_extracted->precod_nbr_layers=%x\n",nr_pdci_info_extracted->precod_nbr_layers);
#endif
break;
case ANTENNA_PORTS: // 38 ANTENNA_PORTS: (field defined for -,format0_1,-,format1_1,-,-,-,-)
nr_pdci_info_extracted->antenna_ports = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format-15]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format-15]));
nr_pdci_info_extracted->antenna_ports = (uint8_t)nr_dci_field(dci_pdu,dci_fields_sizes_format,dci_field);
//(((((*(uint128_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format]));
#ifdef NR_PDCCH_DCI_TOOLS_DEBUG
printf("\t\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_extract_dci_info) -> nr_pdci_info_extracted->antenna_ports=%x\n",nr_pdci_info_extracted->antenna_ports);
#endif
break;
case TCI: // 39 TCI: (field defined for -,-,-,format1_1,-,-,-,-)
// 0 bit if higher layer parameter tci-PresentInDCI is not enabled; otherwise 3 bits
nr_pdci_info_extracted->tci = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format-15]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format-15]));
nr_pdci_info_extracted->tci = (uint8_t)nr_dci_field(dci_pdu,dci_fields_sizes_format,dci_field);
//(((((*(uint128_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format]));
#ifdef NR_PDCCH_DCI_TOOLS_DEBUG
printf("\t\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_extract_dci_info) -> nr_pdci_info_extracted->tci=%x\n",nr_pdci_info_extracted->tci);
#endif
break;
case SRS_REQUEST: // 40 SRS_REQUEST: (field defined for -,format0_1,-,format1_1,-,-,-,format2_3)
nr_pdci_info_extracted->srs_request = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format-15]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format-15]));
nr_pdci_info_extracted->srs_request = (uint8_t)nr_dci_field(dci_pdu,dci_fields_sizes_format,dci_field);
//(((((*(uint128_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format]));
#ifdef NR_PDCCH_DCI_TOOLS_DEBUG
printf("\t\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_extract_dci_info) -> nr_pdci_info_extracted->srs_request=%x\n",nr_pdci_info_extracted->srs_request);
#endif
break;
case TPC_CMD_NUMBER_FORMAT2_3: // 41 TPC_CMD_NUMBER_FORMAT2_3: (field defined for -,-,-,-,-,-,-,format2_3)
nr_pdci_info_extracted->tpc_cmd_number_format2_3 = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format-15]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format-15]));
nr_pdci_info_extracted->tpc_cmd_number_format2_3 = (uint8_t)nr_dci_field(dci_pdu,dci_fields_sizes_format,dci_field);
//(((((*(uint128_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format]));
#ifdef NR_PDCCH_DCI_TOOLS_DEBUG
printf("\t\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_extract_dci_info) -> nr_pdci_info_extracted->tpc_cmd_number_format2_3=%x\n",nr_pdci_info_extracted->tpc_cmd_number_format2_3);
#endif
break;
case CSI_REQUEST: // 42 CSI_REQUEST: (field defined for -,format0_1,-,-,-,-,-,-)
nr_pdci_info_extracted->csi_request = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format-15]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format-15]));
nr_pdci_info_extracted->csi_request = (uint8_t)nr_dci_field(dci_pdu,dci_fields_sizes_format,dci_field);
//(((((*(uint128_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format]));
#ifdef NR_PDCCH_DCI_TOOLS_DEBUG
printf("\t\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_extract_dci_info) -> nr_pdci_info_extracted->csi_request=%x\n",nr_pdci_info_extracted->csi_request);
#endif
break;
case CBGTI: // 43 CBGTI: (field defined for -,format0_1,-,format1_1,-,-,-,-)
// 0, 2, 4, 6, or 8 bits determined by higher layer parameter maxCodeBlockGroupsPerTransportBlock for the PDSCH
nr_pdci_info_extracted->cbgti = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format-15]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format-15]));
nr_pdci_info_extracted->cbgti = (uint8_t)nr_dci_field(dci_pdu,dci_fields_sizes_format,dci_field);
//(((((*(uint128_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format]));
#ifdef NR_PDCCH_DCI_TOOLS_DEBUG
printf("\t\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_extract_dci_info) -> nr_pdci_info_extracted->cbgti=%x\n",nr_pdci_info_extracted->cbgti);
#endif
break;
case CBGFI: // 44 CBGFI: (field defined for -,-,-,format1_1,-,-,-,-)
// 0 or 1 bit determined by higher layer parameter codeBlockGroupFlushIndicator
nr_pdci_info_extracted->cbgfi = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format-15]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format-15]));
nr_pdci_info_extracted->cbgfi = (uint8_t)nr_dci_field(dci_pdu,dci_fields_sizes_format,dci_field);
//(((((*(uint128_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format]));
#ifdef NR_PDCCH_DCI_TOOLS_DEBUG
printf("\t\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_extract_dci_info) -> nr_pdci_info_extracted->cbgfi=%x\n",nr_pdci_info_extracted->cbgfi);
#endif
break;
case PTRS_DMRS: // 45 PTRS_DMRS: (field defined for -,format0_1,-,-,-,-,-,-)
nr_pdci_info_extracted->ptrs_dmrs = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format-15]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format-15]));
nr_pdci_info_extracted->ptrs_dmrs = (uint8_t)nr_dci_field(dci_pdu,dci_fields_sizes_format,dci_field);
//(((((*(uint128_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format]));
#ifdef NR_PDCCH_DCI_TOOLS_DEBUG
printf("\t\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_extract_dci_info) -> nr_pdci_info_extracted->ptrs_dmrs=%x\n",nr_pdci_info_extracted->ptrs_dmrs);
#endif
break;
case BETA_OFFSET_IND: // 46 BETA_OFFSET_IND: (field defined for -,format0_1,-,-,-,-,-,-)
nr_pdci_info_extracted->beta_offset_ind = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format-15]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format-15]));
nr_pdci_info_extracted->beta_offset_ind = (uint8_t)nr_dci_field(dci_pdu,dci_fields_sizes_format,dci_field);
//(((((*(uint128_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format]));
#ifdef NR_PDCCH_DCI_TOOLS_DEBUG
printf("\t\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_extract_dci_info) -> nr_pdci_info_extracted->beta_offset_ind=%x\n",nr_pdci_info_extracted->beta_offset_ind);
#endif
break;
case DMRS_SEQ_INI: // 47 DMRS_SEQ_INI: (field defined for -,format0_1,-,format1_1,-,-,-,-)
// 1 bit if the cell has two ULs and the number of bits for DCI format 1_0 before padding is larger than the number of bits for DCI format 0_0 before padding; 0 bit otherwise
nr_pdci_info_extracted->dmrs_seq_ini = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format-15]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format-15]));
nr_pdci_info_extracted->dmrs_seq_ini = (uint8_t)nr_dci_field(dci_pdu,dci_fields_sizes_format,dci_field);
//(((((*(uint128_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format]));
#ifdef NR_PDCCH_DCI_TOOLS_DEBUG
printf("\t\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_extract_dci_info) -> nr_pdci_info_extracted->dmrs_seq_ini=%x\n",nr_pdci_info_extracted->dmrs_seq_ini);
#endif
break;
case UL_SCH_IND: // 48 UL_SCH_IND: (field defined for -,format0_1,-,-,-,-,-,-)
// value of "1" indicates UL-SCH shall be transmitted on the PUSCH and a value of "0" indicates UL-SCH shall not be transmitted on the PUSCH
nr_pdci_info_extracted->ul_sch_ind = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format-15]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format-15]));
nr_pdci_info_extracted->ul_sch_ind = (uint8_t)nr_dci_field(dci_pdu,dci_fields_sizes_format,dci_field);
//(((((*(uint128_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format]));
#ifdef NR_PDCCH_DCI_TOOLS_DEBUG
printf("\t\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_extract_dci_info) -> nr_pdci_info_extracted->dmrs_seq_ini=%x\n",nr_pdci_info_extracted->ul_sch_ind);
#endif
@@ -4764,49 +4827,56 @@ int nr_extract_dci_info(PHY_VARS_NR_UE *ue,
case PADDING_NR_DCI: // 49 PADDING_NR_DCI: (field defined for format0_0,-,format1_0,-,-,-,-,-)
// (Note 2) If DCI format 0_0 is monitored in common search space
nr_pdci_info_extracted->padding_nr_dci = (uint16_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format-15]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format-15]));
nr_pdci_info_extracted->padding_nr_dci = (uint16_t)nr_dci_field(dci_pdu,dci_fields_sizes_format,dci_field);
//(((((*(uint128_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format]));
#ifdef NR_PDCCH_DCI_TOOLS_DEBUG
printf("\t\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_extract_dci_info) -> nr_pdci_info_extracted->padding=%x\n",nr_pdci_info_extracted->padding_nr_dci);
#endif
break;
case SUL_IND_0_0: // 50 SUL_IND_0_0: (field defined for format0_0,-,-,-,-,-,-,-)
nr_pdci_info_extracted->sul_ind_0_0 = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format-15]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format-15]));
nr_pdci_info_extracted->sul_ind_0_0 = (uint8_t)nr_dci_field(dci_pdu,dci_fields_sizes_format,dci_field);
//(((((*(uint128_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format]));
#ifdef NR_PDCCH_DCI_TOOLS_DEBUG
printf("\t\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_extract_dci_info) -> nr_pdci_info_extracted->sul_ind_0_0=%x\n",nr_pdci_info_extracted->sul_ind_0_0);
#endif
break;
case RA_PREAMBLE_INDEX: // 51 RA_PREAMBLE_INDEX: (field defined for format0_0,-,-,-,-,-,-,-)
nr_pdci_info_extracted->ra_preamble_index = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format-15]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format-15]));
nr_pdci_info_extracted->ra_preamble_index = (uint8_t)nr_dci_field(dci_pdu,dci_fields_sizes_format,dci_field);
//(((((*(uint128_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format]));
#ifdef NR_PDCCH_DCI_TOOLS_DEBUG
printf("\t\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_extract_dci_info) -> nr_pdci_info_extracted->ra_preamble_index=%x\n",nr_pdci_info_extracted->ra_preamble_index);
#endif
break;
case SUL_IND_1_0: // 52 SUL_IND_1_0: (field defined for -,-,format1_0,-,-,-,-,-)
nr_pdci_info_extracted->sul_ind_1_0 = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format-15]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format-15]));
nr_pdci_info_extracted->sul_ind_1_0 = (uint8_t)nr_dci_field(dci_pdu,dci_fields_sizes_format,dci_field);
//(((((*(uint128_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format]));
#ifdef NR_PDCCH_DCI_TOOLS_DEBUG
printf("\t\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_extract_dci_info) -> nr_pdci_info_extracted->sul_ind_1_0=%x\n",nr_pdci_info_extracted->sul_ind_1_0);
#endif
break;
case SS_PBCH_INDEX: // 53 SS_PBCH_INDEX: (field defined for -,-,format1_0,-,-,-,-,-)
nr_pdci_info_extracted->ss_pbch_index = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format-15]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format-15]));
nr_pdci_info_extracted->ss_pbch_index = (uint8_t)nr_dci_field(dci_pdu,dci_fields_sizes_format,dci_field);
//(((((*(uint128_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format]));
#ifdef NR_PDCCH_DCI_TOOLS_DEBUG
printf("\t\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_extract_dci_info) -> nr_pdci_info_extracted->ss_pbch_index=%x\n",nr_pdci_info_extracted->ss_pbch_index);
#endif
break;
case PRACH_MASK_INDEX: // 54 PRACH_MASK_INDEX: (field defined for -,-,-,format1_0,-,-,-,-)
nr_pdci_info_extracted->prach_mask_index = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format-15]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format-15]));
nr_pdci_info_extracted->prach_mask_index = (uint8_t)nr_dci_field(dci_pdu,dci_fields_sizes_format,dci_field);
//(((((*(uint128_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format]));
#ifdef NR_PDCCH_DCI_TOOLS_DEBUG
printf("\t\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_extract_dci_info) -> nr_pdci_info_extracted->prach_mask_index=%x\n",nr_pdci_info_extracted->prach_mask_index);
#endif
break;
case RESERVED_NR_DCI: // 55 RESERVED_NR_DCI: (field defined for -,-,-,format1_0,-,-,-,-)
nr_pdci_info_extracted->reserved_nr_dci = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format-15]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format-15]));
nr_pdci_info_extracted->reserved_nr_dci = (uint8_t)nr_dci_field(dci_pdu,dci_fields_sizes_format,dci_field);
//(((((*(uint128_t *)dci_pdu) << (left_shift - dci_fields_sizes[dci_field][dci_format]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[dci_field][dci_format]));
#ifdef NR_PDCCH_DCI_TOOLS_DEBUG
printf("\t\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_extract_dci_info) -> nr_pdci_info_extracted->reserved_nr_dci=%x\n",nr_pdci_info_extracted->reserved_nr_dci);
#endif
@@ -4815,6 +4885,10 @@ int nr_extract_dci_info(PHY_VARS_NR_UE *ue,
}
}
}
/* process harq -> set dlsch[0]->harq_processes[dlsch[0]->current_harq_pid].rx_status give NEW TRANSMISSION or RETRANSMISSION */
get_dci_info_for_harq(ue, nr_pdci_info_extracted, pdlsch0, ulsch0, nr_tti_rx, k_offset);
#ifdef NR_PDCCH_DCI_TOOLS_DEBUG
printf("\t\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_extract_dci_info) -> Ending function nr_extract_dci_info()\n");
#endif
@@ -6920,7 +6994,7 @@ int nr_generate_ue_ul_dlsch_params_from_dci(PHY_VARS_NR_UE *ue,
uint8_t eNB_id,
int frame,
uint8_t nr_tti_rx,
void *dci_pdu,
uint32_t dci_pdu[4],
uint16_t rnti,
uint8_t dci_length,
NR_DCI_format_t dci_format,
@@ -6934,7 +7008,8 @@ int nr_generate_ue_ul_dlsch_params_from_dci(PHY_VARS_NR_UE *ue,
uint8_t dci_fields_sizes[NBR_NR_DCI_FIELDS][NBR_NR_FORMATS],
uint16_t n_RB_ULBWP,
uint16_t n_RB_DLBWP,
uint16_t crc_scrambled_values[TOTAL_NBR_SCRAMBLED_VALUES])
uint16_t crc_scrambled_values[TOTAL_NBR_SCRAMBLED_VALUES],
NR_DCI_INFO_EXTRACTED_t *nr_dci_info_extracted)
{
/*
* Note only format0_0 and format1_0 are implemented
@@ -6946,24 +7021,28 @@ int nr_generate_ue_ul_dlsch_params_from_dci(PHY_VARS_NR_UE *ue,
NR_UE_DLSCH_t *dlsch0=NULL,*dlsch1=NULL;
NR_DL_UE_HARQ_t *dlsch0_harq=NULL,*dlsch1_harq=NULL;
NR_UE_ULSCH_t *ulsch0=NULL,*ulsch1=NULL;
NR_DCI_INFO_EXTRACTED_t nr_dci_info_extracted;
uint8_t status=0,left_shift=0;
//NR_DCI_INFO_EXTRACTED_t nr_dci_info_extracted;
uint8_t status=0;//left_shift=0;
uint64_t pdu_bitmap = 0xFFFFFFFFFFFFFFFF;
pdu_bitmap = (pdu_bitmap << (64 - dci_length)) >> (64 - dci_length); // this variable will help to remove the bits of other fields when left-switching
uint8_t dci_fields_sizes_format[NBR_NR_DCI_FIELDS] ={0};
for (int m=0; m<NBR_NR_DCI_FIELDS; m++) dci_fields_sizes_format[m]=dci_fields_sizes[m][dci_format];
dlsch0 = dlsch[0];
dlsch0->active = 0;
if (dci_fields_sizes[HARQ_PROCESS_NUMBER][dci_format-15] != 0) { // 27 HARQ_PROCESS_NUMBER (27 is the position in dci_fields_sizes array for field HARQ_PROCESS_NUMBER)
for (int i=0; i<=HARQ_PROCESS_NUMBER; i++) left_shift = left_shift + dci_fields_sizes[i][dci_format-15];
nr_dci_info_extracted.harq_process_number = (uint8_t)(((((*(uint64_t *)dci_pdu) << (left_shift - dci_fields_sizes[HARQ_PROCESS_NUMBER][dci_format-15]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[HARQ_PROCESS_NUMBER][dci_format-15]));
left_shift = 0;
if (dci_fields_sizes[HARQ_PROCESS_NUMBER][dci_format] != 0) { // 27 HARQ_PROCESS_NUMBER (27 is the position in dci_fields_sizes array for field HARQ_PROCESS_NUMBER)
//for (int i=0; i<=HARQ_PROCESS_NUMBER; i++) left_shift = left_shift + dci_fields_sizes[i][dci_format];
nr_dci_info_extracted->harq_process_number = (uint8_t)nr_dci_field(dci_pdu,dci_fields_sizes_format,HARQ_PROCESS_NUMBER);
//(((((*(uint128_t *)dci_pdu) << (left_shift - dci_fields_sizes[HARQ_PROCESS_NUMBER][dci_format]))) & pdu_bitmap) >> (dci_length - dci_fields_sizes[HARQ_PROCESS_NUMBER][dci_format]));
//left_shift = 0;
#ifdef NR_PDCCH_DCI_TOOLS_DEBUG
printf("\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_generate_ue_ul_dlsch_params_from_dci) -> nr_dci_info_extracted->harq_process_number=%x\n",nr_dci_info_extracted.harq_process_number);
printf("\t<-NR_PDCCH_DCI_TOOLS_DEBUG (nr_generate_ue_ul_dlsch_params_from_dci) -> nr_dci_info_extracted->harq_process_number=%x\n",nr_dci_info_extracted->harq_process_number);
#endif
}
dlsch0_harq = dlsch[0]->harq_processes[nr_dci_info_extracted.harq_process_number];
dlsch0_harq = dlsch[0]->harq_processes[nr_dci_info_extracted->harq_process_number];
ulsch0 = ulsch;
/* printf("nr_dci_info_extracted.harq_process_number = %d\n",nr_dci_info_extracted.harq_process_number);
printf("dlsch0 = %d\n",dlsch0);
openair1/PHY/NR_UE_TRANSPORT/nr_initial_sync.c
+18 -5
View File
@@ -47,6 +47,7 @@
extern openair0_config_t openair0_cfg[];
static nfapi_nr_config_request_t config_t;
static nfapi_nr_config_request_t* config =&config_t;
int cnt=0;
/* forward declarations */
void set_default_frame_parms_single(nfapi_nr_config_request_t *config, NR_DL_FRAME_PARMS *frame_parms);
@@ -54,7 +55,7 @@ void set_default_frame_parms_single(nfapi_nr_config_request_t *config, NR_DL_FRA
int nr_pbch_detection(PHY_VARS_NR_UE *ue, runmode_t mode)
{
printf("nr pbch detec RB_DL %d\n", ue->frame_parms.N_RB_DL);
uint8_t l,pbch_decoded,frame_mod4,pbch_tx_ant,dummy;
NR_DL_FRAME_PARMS *frame_parms=&ue->frame_parms;
char phich_resource[6];
@@ -174,9 +175,10 @@ int nr_initial_sync(PHY_VARS_NR_UE *ue, runmode_t mode)
// LOG_I(PHY,"**************************************************************\n");
// First try FDD normal prefix
frame_parms->Ncp=NORMAL;
frame_parms->frame_type=FDD;
frame_parms->frame_type=TDD;
set_default_frame_parms_single(config,frame_parms);
nr_init_frame_parms_ue(config,frame_parms);
nr_init_frame_parms_ue(frame_parms);
printf("nr_initial sync ue RB_DL %d\n", ue->frame_parms.N_RB_DL);
/*
write_output("rxdata0.m","rxd0",ue->common_vars.rxdata[0],10*frame_parms->samples_per_tti,1,1);
exit(-1);
@@ -194,7 +196,9 @@ int nr_initial_sync(PHY_VARS_NR_UE *ue, runmode_t mode)
* --------------------------
* sync_pos SS/PBCH block
*/
cnt++;
if (cnt >100){
cnt =0;
/* process pss search on received buffer */
sync_pos = pss_synchro_nr(ue, NO_RATE_CHANGE);
@@ -211,7 +215,7 @@ int nr_initial_sync(PHY_VARS_NR_UE *ue, runmode_t mode)
else
ue->rx_offset = FRAME_LENGTH_COMPLEX_SAMPLES + sync_pos2 - sync_pos_slot;
printf("sync_pos %d sync_pos_slot %d rx_offset\n",sync_pos,sync_pos_slot, ue->rx_offset);
printf("sync_pos %d sync_pos_slot %d rx_offset %d\n",sync_pos,sync_pos_slot, ue->rx_offset);
// write_output("rxdata1.m","rxd1",ue->common_vars.rxdata[0],10*frame_parms->samples_per_tti,1,1);
@@ -234,6 +238,11 @@ int nr_initial_sync(PHY_VARS_NR_UE *ue, runmode_t mode)
nr_gold_pbch(ue);
ret = nr_pbch_detection(ue,mode);
nr_gold_pdcch(ue,0, 2);
nr_slot_fep(ue,0, 0, ue->rx_offset, 1, 1, NR_PDCCH_EST);
nr_slot_fep(ue,1, 0, ue->rx_offset, 1, 1, NR_PDCCH_EST);
LOG_I(PHY,"[UE %d] AUTOTEST Cell Sync : frame = %d, rx_offset %d, freq_offset %d \n",
ue->Mod_id,
@@ -254,6 +263,10 @@ LOG_I(PHY,"[UE %d] AUTOTEST Cell Sync : frame = %d, rx_offset %d, freq_offset %
LOG_I(PHY,"FDD Normal prefix: SSS error condition: sync_pos %d, sync_pos_slot %d\n", sync_pos, sync_pos_slot);
#endif
}
}
else {
ret = -1;
}
/* Consider this is a false detection if the offset is > 1000 Hz */
if( (abs(ue->common_vars.freq_offset) > 150) && (ret == 0) )
openair1/PHY/NR_UE_TRANSPORT/nr_pbch.c
+26 -13
View File
@@ -486,11 +486,11 @@ void nr_pbch_quantize(int8_t *pbch_llr8,
uint16_t i;
for (i=0; i<len; i++) {
/*if (pbch_llr[i]>7)
pbch_llr8[i]=7;
else if (pbch_llr[i]<-8)
pbch_llr8[i]=-8;
else*/
if (pbch_llr[i]>127)
pbch_llr8[i]=127;
else if (pbch_llr[i]<-128)
pbch_llr8[i]=-128;
else
pbch_llr8[i] = (char)(pbch_llr[i]);
}
@@ -696,14 +696,27 @@ int nr_rx_pbch( PHY_VARS_NR_UE *ue,
//#ifdef DEBUG_PBCH
for (i=0; i<(NR_POLAR_PBCH_PAYLOAD_BITS>>3); i++){
printf("unscrambling pbch_a[%d] = %x \n", i,pbch_a[i]);
printf("[PBCH] decoder_output[%d] = %x\n",i,decoded_output[i]);
//printf("unscrambling pbch_a[%d] = %x \n", i,pbch_a[i]);
printf("[PBCH] decoder payload[%d] = %x\n",i,decoded_output[i]);
}
//#endif
//ue->dl_indication.rx_ind.rx_request_body.pdu_index = FAPI_NR_RX_PDU_BCCH_BCH_TYPE;
//ue->dl_indication.rx_ind.rx_request_body.pdu_length = 3;
//ue->dl_indication.rx_ind.rx_request_body.pdu = &decoded_output[0];
//ue->if_inst->dl_indication(&ue->dl_indication);
ue->dl_indication.rx_ind = &ue->rx_ind; // hang on rx_ind instance
//ue->rx_ind.sfn_slot = 0; //should be set by higher-1-layer, i.e. clean_and_set_if_instance()
ue->rx_ind.number_pdus = ue->rx_ind.number_pdus + 1;
ue->rx_ind.rx_indication_body = (fapi_nr_rx_indication_body_t *)malloc(sizeof(fapi_nr_rx_indication_body_t));
ue->rx_ind.rx_indication_body->pdu_type = FAPI_NR_RX_PDU_TYPE_MIB;
ue->rx_ind.rx_indication_body->mib_pdu.pdu = &decoded_output[1];
ue->rx_ind.rx_indication_body->mib_pdu.additional_bits = decoded_output[0];
ue->rx_ind.rx_indication_body->mib_pdu.ssb_index = ssb_index; // confirm with TCL
ue->rx_ind.rx_indication_body->mib_pdu.ssb_length = Lmax; // confirm with TCL
ue->rx_ind.rx_indication_body->mib_pdu.cell_id = frame_parms->Nid_cell; // confirm with TCL
ue->if_inst->dl_indication(&ue->dl_indication);
return 0;
}
openair1/PHY/NR_UE_TRANSPORT/nr_transport_proto_ue.h
+1 -19
View File
@@ -1352,24 +1352,6 @@ int dump_dci(NR_DL_FRAME_PARMS *frame_parms, DCI_ALLOC_t *dci);
int dump_ue_stats(PHY_VARS_NR_UE *phy_vars_ue, UE_nr_rxtx_proc_t *proc, char* buffer, int length, runmode_t mode, int input_level_dBm);
void generate_pcfich_reg_mapping(NR_DL_FRAME_PARMS *frame_parms);
void pcfich_unscrambling(NR_DL_FRAME_PARMS *frame_parms,
uint8_t subframe,
int16_t *d);
uint8_t rx_pcfich(NR_DL_FRAME_PARMS *frame_parms,
uint8_t subframe,
NR_UE_PDCCH *lte_ue_pdcch_vars,
MIMO_mode_t mimo_mode);
void generate_phich_reg_mapping(NR_DL_FRAME_PARMS *frame_parms);
void init_transport_channels(uint8_t);
void generate_RIV_tables(void);
@@ -1381,7 +1363,7 @@ void generate_RIV_tables(void);
parameters are know, the routine calls some basic initialization routines (cell-specific reference signals, etc.)
@param phy_vars_ue Pointer to UE variables
*/
int initial_sync(PHY_VARS_NR_UE *phy_vars_ue, runmode_t mode);
int nr_initial_sync(PHY_VARS_NR_UE *phy_vars_ue, runmode_t mode);
/*!
openair1/PHY/NR_UE_TRANSPORT/nr_transport_ue.h
+24 -3
View File
@@ -33,6 +33,7 @@
#define __NR_TRANSPORT_UE__H__
#include <limits.h>
#include "PHY/impl_defs_top.h"
//#include "PHY/defs_nr_UE.h"
//#include "../LTE_TRANSPORT/dci.h"
//#include "../LTE_TRANSPORT/mdci.h"
@@ -50,11 +51,18 @@
* @{
*/
typedef enum {
NEW_TRANSMISSION_HARQ,
RETRANSMISSION_HARQ
} harq_result_t;
//#if defined(UPGRADE_RAT_NR)
#if 1
typedef struct {
/// HARQ process id
uint8_t harq_id;
/// HARQ rx status
harq_result_t rx_status;
/// ACK bits (after decoding) 0:NACK / 1:ACK / 2:DTX
uint8_t ack;
/// send status (for PUCCH)
@@ -81,6 +89,8 @@ typedef struct {
uint8_t first_tx;
/// Last Ndi received for this process on DCI (used for C-RNTI only)
uint8_t DCINdi;
/// HARQ tx status
harq_result_t tx_status;
/// Flag indicating that this ULSCH has a new packet (start of new round)
// uint8_t Ndi;
/// Status Flag indicating for this ULSCH (idle,active,disabled)
@@ -145,7 +155,6 @@ typedef struct {
// int calibration_flag;
/// Number of soft channel bits
uint32_t G;
// decode phich
uint8_t decode_phich;
} NR_UL_UE_HARQ_t;
@@ -159,7 +168,7 @@ typedef struct {
#if 1
// Pointers to HARQ processes for the ULSCH
NR_UL_UE_HARQ_t *harq_processes[NR_MAX_ULSCH_HARQ_PROCESSES];
int harq_process_id[NR_MAX_SLOTS_PAR_FRAME];
int harq_process_id[NR_MAX_SLOTS_PER_FRAME];
// UL number of harq processes
uint8_t number_harq_processes_for_pusch;
#endif
@@ -211,6 +220,8 @@ typedef struct {
uint8_t cooperation_flag;
/// RNTI attributed to this ULSCH
uint16_t rnti;
/// RNTI type
uint8_t rnti_type;
/// f_PUSCH parameter for PUSCH power control
int16_t f_pusch;
/// Po_PUSCH - target output power for PUSCH
@@ -282,6 +293,12 @@ typedef struct {
uint32_t G;
/// Current Number of RBs
uint16_t nb_rb;
/// Starting RB number
uint16_t start_rb;
/// Number of Symbols
uint16_t nb_symbols;
/// Starting Symbol number
uint16_t start_symbol;
/// Current subband PMI allocation
uint16_t pmi_alloc;
/// Current RB allocation (even slots)
@@ -305,6 +322,8 @@ typedef struct {
typedef struct {
/// RNTI
uint16_t rnti;
/// RNTI type
uint8_t rnti_type;
/// Active flag for DLSCH demodulation
uint8_t active;
/// Transmission mode
@@ -379,12 +398,14 @@ typedef struct {
boolean_t ra_flag;
/// rnti
rnti_t rnti;
/// rnti type
//crc_scrambled_t rnti_type;
/// Format
NR_DCI_format_t format;
/// search space
dci_space_t search_space;
/// DCI pdu
uint8_t dci_pdu[8];
uint32_t dci_pdu[4];
//#if defined(UPGRADE_RAT_NR)
#if 1
/// harq information
openair1/PHY/NR_UE_TRANSPORT/pss_nr.c
+4 -4
View File
@@ -369,7 +369,7 @@ void init_context_pss_nr(NR_DL_FRAME_PARMS *frame_parms_ue)
assert(0);
}
size = LTE_NUMBER_OF_SUBFRAMES_PER_FRAME*sizeof(int)*frame_parms_ue->samples_per_subframe;
size = NR_NUMBER_OF_SUBFRAMES_PER_FRAME*sizeof(int)*frame_parms_ue->samples_per_subframe;
q = malloc16(size);
if (q != NULL) {
pss_corr_ue[i] = q;
@@ -578,7 +578,7 @@ void restore_frame_context_pss_nr(NR_DL_FRAME_PARMS *frame_parms_ue, int rate_ch
void decimation_synchro_nr(PHY_VARS_NR_UE *PHY_vars_UE, int rate_change, int **rxdata)
{
NR_DL_FRAME_PARMS *frame_parms = &(PHY_vars_UE->frame_parms);
int samples_for_frame = LTE_NUMBER_OF_SUBFRAMES_PER_FRAME*frame_parms->samples_per_tti;
int samples_for_frame = NR_NUMBER_OF_SUBFRAMES_PER_FRAME*frame_parms->samples_per_tti;
#if TEST_SYNCHRO_TIMING_PSS
@@ -631,7 +631,7 @@ int pss_synchro_nr(PHY_VARS_NR_UE *PHY_vars_UE, int rate_change)
#ifdef DBG_PSS_NR
int samples_for_frame = frame_parms->samples_per_subframe*LTE_NUMBER_OF_SUBFRAMES_PER_FRAME;
int samples_for_frame = frame_parms->samples_per_subframe*NR_NUMBER_OF_SUBFRAMES_PER_FRAME;
write_output("rxdata0_rand.m","rxd0_rand", &PHY_vars_UE->common_vars.rxdata[0][0], samples_for_frame, 1, 1);
@@ -772,7 +772,7 @@ int pss_search_time_nr(int **rxdata, ///rx data in time domain
int result;
int synchro_out;
unsigned int tmp[NUMBER_PSS_SEQUENCE];
unsigned int length = (LTE_NUMBER_OF_SUBFRAMES_PER_FRAME*frame_parms->ttis_per_subframe*frame_parms->samples_per_tti); /* 1 frame for now, it should be 2 TODO_NR */
unsigned int length = (NR_NUMBER_OF_SUBFRAMES_PER_FRAME*frame_parms->ttis_per_subframe*frame_parms->samples_per_tti); /* 1 frame for now, it should be 2 TODO_NR */
for (int i = 0; i < NUMBER_PSS_SEQUENCE; i++) {
tmp[i] = 0;
openair1/PHY/NR_UE_TRANSPORT/pucch_nr.c
+131 -84
View File
@@ -32,6 +32,7 @@
//#include "PHY/defs.h"
#include "PHY/impl_defs_nr.h"
#include "PHY/defs_nr_common.h"
#include "PHY/defs_nr_UE.h"
//#include "PHY/extern.h"
//#include "LAYER2/MAC/extern.h"
@@ -304,10 +305,12 @@
{-23170, 23170,-23170, 23170,-23170, 23170, 23170, 23170, 23170,-23170,-23170,-23170, 23170, 23170,-23170,-23170, 23170, 23170,-23170,-23170,-23170,-23170,-23170,-23170},
{ 23170,-23170,-23170, 23170, 23170,-23170,-23170,-23170,-23170, 23170,-23170,-23170,-23170,-23170, 23170,-23170, 23170, 23170, 23170,-23170, 23170,-23170,-23170,-23170}
};
void nr_group_sequence_hopping (uint8_t PUCCH_GroupHopping,
uint32_t n_id,
void nr_group_sequence_hopping (//pucch_GroupHopping_t ue->pucch_config_common_nr.puch_GroupHopping,
//uint8_t PUCCH_GroupHopping,
PHY_VARS_NR_UE *ue,
//uint32_t n_id,
uint8_t n_hop,
uint8_t nr_tti_rx,
int nr_tti_tx,
uint8_t *u,
uint8_t *v) {
/*
@@ -322,6 +325,22 @@ void nr_group_sequence_hopping (uint8_t PUCCH_GroupHopping,
* n_hop=0 for the first hop
* n_hop=1 for the second hop
*/
// depending on the value of the PUCCH_GroupHopping, we will obtain different values for u,v
pucch_GroupHopping_t PUCCH_GroupHopping = ue->pucch_config_common_nr->pucch_GroupHopping; // from higher layers FIXME!!!
// n_id defined as per TS 38.211 subclause 6.3.2.2.1 (is given by the higher-layer parameter hoppingId)
// it is hoppingId from PUCCH-ConfigCommon:
// Cell-Specific scrambling ID for group hoppping and sequence hopping if enabled
// Corresponds to L1 parameter 'HoppingID' (see 38.211, section 6.3.2.2) BIT STRING (SIZE (10))
uint16_t n_id = ue->pucch_config_common_nr->hoppingId; // from higher layers FIXME!!!
//////////////////////////////////////initialization to be removed///////////////////////////////////////////////////////////
PUCCH_GroupHopping=neither;
n_id=10;
printf("\t\t [nr_group_sequence_hopping] initialization PUCCH_GroupHopping=%d, n_id=%d -> variable initializations TO BE REMOVED\n",PUCCH_GroupHopping,n_id);
/////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
uint8_t f_ss=0,f_gh=0;
*u=0;
*v=0;
@@ -331,31 +350,31 @@ void nr_group_sequence_hopping (uint8_t PUCCH_GroupHopping,
printf("\t\t [nr_group_sequence_hopping] calculating u,v -> ");
#endif
if (PUCCH_GroupHopping == 0){ // PUCCH_GroupHopping 'neither'
if (PUCCH_GroupHopping == neither){ // PUCCH_GroupHopping 'neither'
f_ss = n_id%30;
}
if (PUCCH_GroupHopping == 1){ // PUCCH_GroupHopping 'enabled'
if (PUCCH_GroupHopping == enable){ // PUCCH_GroupHopping 'enabled'
for (int m=0; m<8; m++){
f_gh = f_gh + ((1<<m)*((uint8_t)((s>>(8*(2*nr_tti_rx+n_hop)+m))&1))); // Not sure we have to use nr_tti_rx FIXME!!!
f_gh = f_gh + ((1<<m)*((uint8_t)((s>>(8*(2*nr_tti_tx+n_hop)+m))&1))); // Not sure we have to use nr_tti_tx FIXME!!!
}
f_gh = f_gh%30;
f_ss = n_id%30;
}
if (PUCCH_GroupHopping == 2){ // PUCCH_GroupHopping 'disabled'
if (PUCCH_GroupHopping == disable){ // PUCCH_GroupHopping 'disabled'
f_ss = n_id%30;
*v = (uint8_t)((s>>(2*nr_tti_rx+n_hop))&1); // Not sure we have to use nr_tti_rx FIXME!!!
*v = (uint8_t)((s>>(2*nr_tti_tx+n_hop))&1); // Not sure we have to use nr_tti_tx FIXME!!!
}
*u = (f_gh+f_ss)%30;
#ifdef DEBUG_NR_PUCCH_TX
printf("%d,%d\n",*u,*v);
#endif
}
double nr_cyclic_shift_hopping(uint32_t n_id,
double nr_cyclic_shift_hopping(PHY_VARS_NR_UE *ue,
uint8_t m0,
uint8_t mcs,
uint8_t lnormal,
uint8_t lprime,
uint8_t nr_tti_rx) {
int nr_tti_tx) {
/*
* Implements TS 38.211 subclause 6.3.2.2.2 Cyclic shift hopping
* - n_id: higher-layer parameter hoppingId
@@ -366,33 +385,42 @@ double nr_cyclic_shift_hopping(uint32_t n_id,
*/
// alpha_init initialized to 2*PI/12=0.5235987756
double alpha = 0.5235987756;
uint32_t c_init = n_id; // we initialize c_init again to calculate n_cs
uint16_t c_init = ue->pucch_config_common_nr->hoppingId; // we initialize c_init again to calculate n_cs
//////////////////////////////////////initialization to be removed///////////////////////////////////////////////////////////
c_init=10;
printf("\t\t [nr_cyclic_shift_hopping] initialization c_init=%d -> variable initialization TO BE REMOVED\n",c_init);
/////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
uint32_t x1,s = lte_gold_generic(&x1, &c_init, 1); // TS 38.211 Subclause 5.2.1
uint8_t n_cs=0;
#ifdef DEBUG_NR_PUCCH_TX
printf("\t\t [nr_cyclic_shift_hopping] calculating alpha (cyclic shift) -> ");
printf("\t\t [nr_cyclic_shift_hopping] calculating alpha (cyclic shift) using c_init=%d -> ",c_init);
#endif
for (int m=0; m<8; m++){
// calculating n_cs (Not sure we have to use nr_tti_rx FIXME!!!)
n_cs = n_cs+((1<<m)*((uint8_t)((s>>((14*8*nr_tti_rx) + 8*(lnormal+lprime) + m))&1)));
// calculating n_cs (Not sure we have to use nr_tti_tx FIXME!!!)
n_cs = n_cs+((1<<m)*((uint8_t)((s>>((14*8*nr_tti_tx) + 8*(lnormal+lprime) + m))&1)));
}
alpha = (alpha * (double)((m0+mcs+n_cs)%12));
#ifdef DEBUG_NR_PUCCH_TX
printf("%lf\n",alpha);
printf("n_cs=%d -> %lf\n",n_cs,alpha);
#endif
return(alpha);
}
void nr_generate_pucch0(int32_t **txdataF,
void nr_generate_pucch0(PHY_VARS_NR_UE *ue,
int32_t **txdataF,
NR_DL_FRAME_PARMS *frame_parms,
PUCCH_CONFIG_DEDICATED *pucch_config_dedicated,
int16_t amp,
uint8_t nr_tti_rx,
int nr_tti_tx,
uint8_t mcs,
uint8_t nrofSymbols,
uint8_t startingSymbolIndex,
uint8_t startingPRB) {
uint16_t startingPRB) {
#ifdef DEBUG_NR_PUCCH_TX
printf("\t [nr_generate_pucch0] start function\n");
printf("\t [nr_generate_pucch0] start function at slot(nr_tti_tx)=%d\n",nr_tti_tx);
#endif
/*
@@ -434,26 +462,22 @@ void nr_generate_pucch0(int32_t **txdataF,
*/
// the value of u,v (delta always 0 for PUCCH) has to be calculated according to TS 38.211 Subclause 6.3.2.2.1
uint8_t u=0,v=0,delta=0;
// depending on the value of the PUCCH_GroupHopping, we will obtain different values for u,v
uint8_t PUCCH_GroupHopping; // from higher layers FIXME!!
// n_id is hoppingId from PUCCH-ConfigCommon:
// Cell-Specific scrambling ID for group hoppping and sequence hopping if enabled
// Corresponds to L1 parameter 'HoppingID' (see 38.211, section 6.3.2.2) BIT STRING (SIZE (10))
uint32_t n_id; // from higher layers FIXME!!
// if frequency hopping is disabled by the higher-layer parameter PUCCH-frequency-hopping
// n_hop = 0
// if frequency hopping is enabled by the higher-layer parameter PUCCH-frequency-hopping
// n_hop = 0 for first hop
// n_hop = 1 for second hop
uint8_t n_hop = 0;
uint8_t PUCCH_Frequency_Hopping; // from higher layers FIXME!!
//uint8_t PUCCH_Frequency_Hopping; // from higher layers FIXME!!
/////////////////////////////////////////////////////////// initializing some variables for test
m0=0;
PUCCH_GroupHopping=0;
n_id=10;
PUCCH_Frequency_Hopping = 0;
// PUCCH_GroupHopping=0;
// n_id=10;
//PUCCH_Frequency_Hopping = 0;
#ifdef DEBUG_NR_PUCCH_TX
printf("\t [nr_generate_pucch0] sequence generation: variable initialization for test\n");
#endif
/////////////////////////////////////////////////////// ending variables initialization for test
// x_n contains the sequence r_u_v_alpha_delta(n)
@@ -462,8 +486,8 @@ void nr_generate_pucch0(int32_t **txdataF,
for (int l=0; l<nrofSymbols; l++){
// if frequency hopping is enabled n_hop = 1 for second hop. Not sure frequency hopping concerns format 0. FIXME!!!
//if ((PUCCH_Frequency_Hopping == 1)&&(l == (nrofSymbols-1))) n_hop = 1;
nr_group_sequence_hopping(PUCCH_GroupHopping,n_id,n_hop,nr_tti_rx,&u,&v); // calculating u and v value
alpha = nr_cyclic_shift_hopping(n_id,m0,mcs,l,startingSymbolIndex,nr_tti_rx);
nr_group_sequence_hopping(ue,n_hop,nr_tti_tx,&u,&v); // calculating u and v value
alpha = nr_cyclic_shift_hopping(ue,m0,mcs,l,startingSymbolIndex,nr_tti_tx);
#ifdef DEBUG_NR_PUCCH_TX
printf("\t [nr_generate_pucch0] sequence generation \tu=%d \tv=%d \talpha=%lf \t(for symbol l=%d)\n",u,v,alpha,l);
#endif
@@ -519,20 +543,22 @@ void nr_generate_pucch0(int32_t **txdataF,
}
}
}
void nr_generate_pucch1(int32_t **txdataF,
void nr_generate_pucch1(PHY_VARS_NR_UE *ue,
int32_t **txdataF,
NR_DL_FRAME_PARMS *frame_parms,
PUCCH_CONFIG_DEDICATED *pucch_config_dedicated,
uint64_t payload,
int16_t amp,
uint8_t nr_tti_rx,
int nr_tti_tx,
uint8_t nrofSymbols,
uint8_t startingSymbolIndex,
uint8_t startingPRB,
uint8_t startingPRB_intraSlotHopping,
uint16_t startingPRB,
uint16_t startingPRB_intraSlotHopping,
uint8_t timeDomainOCC,
uint8_t nr_bit) {
#ifdef DEBUG_NR_PUCCH_TX
printf("\t [nr_generate_pucch1] start function\n");
printf("\t [nr_generate_pucch1] start function at slot(nr_tti_tx)=%d\n",nr_tti_tx);
printf("\t [nr_generate_pucch1] startingPRB=%d startingPRB_intraSlotHopping=%d\n",startingPRB,startingPRB_intraSlotHopping);
#endif
/*
@@ -642,12 +668,6 @@ void nr_generate_pucch1(int32_t **txdataF,
*/
// the value of u,v (delta always 0 for PUCCH) has to be calculated according to TS 38.211 Subclause 6.3.2.2.1
uint8_t u=0,v=0,delta=0;
// depending on the value of the PUCCH_GroupHopping, we will obtain different values for u,v
uint8_t PUCCH_GroupHopping; // from higher layers FIXME!!
// n_id is hoppingId from PUCCH-ConfigCommon:
// Cell-Specific scrambling ID for group hoppping and sequence hopping if enabled
// Corresponds to L1 parameter 'HoppingID' (see 38.211, section 6.3.2.2) BIT STRING (SIZE (10))
uint32_t n_id; // from higher layers FIXME!!
// if frequency hopping is disabled, intraSlotFrequencyHopping is not provided
// n_hop = 0
// if frequency hopping is enabled, intraSlotFrequencyHopping is provided
@@ -657,22 +677,36 @@ void nr_generate_pucch1(int32_t **txdataF,
// Intra-slot frequency hopping shall be assumed when the higher-layer parameter intraSlotFrequencyHopping is provided,
// regardless of whether the frequency-hop distance is zero or not,
// otherwise no intra-slot frequency hopping shall be assumed
//uint8_t PUCCH_Frequency_Hopping = 0 ; // from higher layers. Let's suppose we do not support intra-slot hopping FIXME!!
//uint8_t PUCCH_Frequency_Hopping = 0 ; // from higher layers
uint8_t intraSlotFrequencyHopping = 0;
if (startingPRB != startingPRB_intraSlotHopping){
intraSlotFrequencyHopping=1;
#ifdef DEBUG_NR_PUCCH_TX
printf("\t [nr_generate_pucch1] intraSlotFrequencyHopping=%d \n",intraSlotFrequencyHopping);
#endif
// n_hop = 1 for second hop;
// FIXME
// When hopping will be activated we have to implement this function differently as PUCH signal generation depends on n_hop value for u,v calculation
}
// y_n contains the complex value d multiplied by the sequence r_u_v
int16_t y_n_re[12],y_n_im[12];
nr_group_sequence_hopping(PUCCH_GroupHopping,n_id,n_hop,nr_tti_rx,&u,&v); // calculating u and v value
alpha = nr_cyclic_shift_hopping(n_id,m0,mcs,lnormal,lprime,nr_tti_rx);
#ifdef DEBUG_NR_PUCCH_TX
printf("\t [nr_generate_pucch1] entering function nr_group_sequence_hopping with n_hop=%d, nr_tti_tx=%d\n",
n_hop,nr_tti_tx);
#endif
nr_group_sequence_hopping(ue,n_hop,nr_tti_tx,&u,&v); // calculating u and v value
alpha = nr_cyclic_shift_hopping(ue,m0,mcs,lnormal,lprime,nr_tti_tx);
for (int n=0; n<12; n++){
r_u_v_alpha_delta_re[n] = (int16_t)((((int32_t)(round(32767*cos(alpha*n)))*table_5_2_2_2_2_Re[u][n])>>15)
- (((int32_t)(round(32767*sin(alpha*n)))*table_5_2_2_2_2_Im[u][n])>>15)); // Re part of base sequence shifted by alpha
r_u_v_alpha_delta_im[n] = (int16_t)((((int32_t)(round(32767*cos(alpha*n)))*table_5_2_2_2_2_Im[u][n])>>15)
+ (((int32_t)(round(32767*sin(alpha*n)))*table_5_2_2_2_2_Re[u][n])>>15)); // Im part of base sequence shifted by alpha
r_u_v_alpha_delta_re[n] = (int16_t)(((((int32_t)(round(32767*cos(alpha*n))) * table_5_2_2_2_2_Re[u][n])>>15)
- (((int32_t)(round(32767*sin(alpha*n))) * table_5_2_2_2_2_Im[u][n])>>15))); // Re part of base sequence shifted by alpha
r_u_v_alpha_delta_im[n] = (int16_t)(((((int32_t)(round(32767*cos(alpha*n))) * table_5_2_2_2_2_Im[u][n])>>15)
+ (((int32_t)(round(32767*sin(alpha*n))) * table_5_2_2_2_2_Re[u][n])>>15))); // Im part of base sequence shifted by alpha
// PUCCH sequence = DM-RS sequence multiplied by d(0)
y_n_re[n] = (int16_t)((((int32_t)(r_u_v_alpha_delta_re[n])*d_re)>>15)
- (((int32_t)(r_u_v_alpha_delta_im[n])*d_im)>>15)); // Re part of y(n)
y_n_im[n] = (int16_t)((((int32_t)(r_u_v_alpha_delta_re[n])*d_im)>>15)
+ (((int32_t)(r_u_v_alpha_delta_im[n])*d_re)>>15)); // Im part of y(n)
y_n_re[n] = (int16_t)(((((int32_t)(r_u_v_alpha_delta_re[n])*d_re)>>15)
- (((int32_t)(r_u_v_alpha_delta_im[n])*d_im)>>15))); // Re part of y(n)
y_n_im[n] = (int16_t)(((((int32_t)(r_u_v_alpha_delta_re[n])*d_im)>>15)
+ (((int32_t)(r_u_v_alpha_delta_im[n])*d_re)>>15))); // Im part of y(n)
// DM-RS sequence
r_u_v_alpha_delta_re[n] = (int16_t)(((int32_t)amp*r_u_v_alpha_delta_re[n])>>15);
r_u_v_alpha_delta_im[n] = (int16_t)(((int32_t)amp*r_u_v_alpha_delta_im[n])>>15);
@@ -839,7 +873,7 @@ inline void nr_pucch2_3_4_scrambling(uint16_t M_bit,uint16_t rnti,uint16_t n_id,
int i;
uint8_t c;
// c_init=nRNTI*2^15+n_id according to TS 38.211 Subclause 6.3.2.6.1
//x2 = (rnti) + ((uint32_t)(1+nr_tti_rx)<<16)*(1+(fp->Nid_cell<<1));
//x2 = (rnti) + ((uint32_t)(1+nr_tti_tx)<<16)*(1+(fp->Nid_cell<<1));
x2 = ((rnti)<<15)+n_id;
s = lte_gold_generic(&x1, &x2, 1);
#ifdef DEBUG_NR_PUCCH_TX
@@ -884,30 +918,42 @@ void nr_uci_encoding(uint64_t payload,
E_init = (is_pi_over_2_bpsk_enabled == 0) ? 24:12;
if (nrofSymbols == 4) {
E = (intraSlotFrequencyHopping == 0)?(E_init*(nrofSymbols-1)*nrofPRB):((E_init*(nrofSymbols-1)*nrofPRB));
printf("format 3 nrofSymbols =4 and E_init=%d,E=%d\n",E_init,E);
#ifdef DEBUG_NR_PUCCH_TX
printf("format 3 nrofSymbols =4 and E_init=%d,E=%d\n",E_init,E);
#endif
}
if (nrofSymbols > 4) {
E = E_init*(nrofSymbols-2)*nrofPRB;
printf("format 3 nrofSymbols >4 and E_init=%d,E = %d\n",E_init,E);
#ifdef DEBUG_NR_PUCCH_TX
printf("format 3 nrofSymbols >4 and E_init=%d,E = %d\n",E_init,E);
#endif
}
if (nrofSymbols > 9) {
E = (add_dmrs == 0)?(E_init*(nrofSymbols-2)*nrofPRB):((E_init*(nrofSymbols-4)*nrofPRB));
printf("format 3 nrofSymbols >9 and E_init=%d,E = %d\n",E_init,E);
#ifdef DEBUG_NR_PUCCH_TX
printf("format 3 nrofSymbols >9 and E_init=%d,E = %d\n",E_init,E);
#endif
}
}
if (fmt == pucch_format4_nr){
E_init = (is_pi_over_2_bpsk_enabled == 0) ? 24:12;
if (nrofSymbols == 4) {
E = (intraSlotFrequencyHopping == 0)?(E_init*(nrofSymbols-1)/n_SF_PUCCH_s):((E_init*(nrofSymbols-1)/n_SF_PUCCH_s));
printf("format 4 nrofSymbols =4 and E_init=%d,E=%d\n",E_init,E);
#ifdef DEBUG_NR_PUCCH_TX
printf("format 4 nrofSymbols =4 and E_init=%d,E=%d\n",E_init,E);
#endif
}
if (nrofSymbols > 4) {
E = E_init*(nrofSymbols-2)/n_SF_PUCCH_s;
printf("format 4 nrofSymbols >4 and E_init=%d,E = %d\n",E_init,E);
#ifdef DEBUG_NR_PUCCH_TX
printf("format 4 nrofSymbols >4 and E_init=%d,E = %d\n",E_init,E);
#endif
}
if (nrofSymbols > 9) {
E = (add_dmrs == 0)?(E_init*(nrofSymbols-2)/n_SF_PUCCH_s):((E_init*(nrofSymbols-4)/n_SF_PUCCH_s));
printf("format 4 nrofSymbols >9 and E_init=%d,E = %d\n",E_init,E);
#ifdef DEBUG_NR_PUCCH_TX
printf("format 4 nrofSymbols >9 and E_init=%d,E = %d\n",E_init,E);
#endif
}
}
*M_bit = E;
@@ -938,19 +984,20 @@ void nr_uci_encoding(uint64_t payload,
}
}
//#if 0
void nr_generate_pucch2(int32_t **txdataF,
void nr_generate_pucch2(PHY_VARS_NR_UE *ue,
int32_t **txdataF,
NR_DL_FRAME_PARMS *frame_parms,
PUCCH_CONFIG_DEDICATED *pucch_config_dedicated,
uint64_t payload,
int16_t amp,
uint8_t nr_tti_rx,
int nr_tti_tx,
uint8_t nrofSymbols,
uint8_t startingSymbolIndex,
uint8_t nrofPRB,
uint8_t startingPRB,
uint16_t startingPRB,
uint8_t nr_bit) {
#ifdef DEBUG_NR_PUCCH_TX
printf("\t [nr_generate_pucch2] start function with payload=%d and nr_bit=%d\n", payload, nr_bit);
printf("\t [nr_generate_pucch2] start function at slot(nr_tti_tx)=%d with payload=%d and nr_bit=%d\n",nr_tti_tx, payload, nr_bit);
#endif
// b is the block of bits transmitted on the physical channel after payload coding
uint64_t b;
@@ -1023,7 +1070,7 @@ void nr_generate_pucch2(int32_t **txdataF,
int i=0;
int m=0;
for (int l=0; l<nrofSymbols; l++) {
x2 = (((1<<17)*((14*nr_tti_rx) + (l+startingSymbolIndex) + 1)*((2*n_id) + 1)) + (2*n_id))%(1<<31); // c_init calculation according to TS38.211 subclause
x2 = (((1<<17)*((14*nr_tti_tx) + (l+startingSymbolIndex) + 1)*((2*n_id) + 1)) + (2*n_id))%(1<<31); // c_init calculation according to TS38.211 subclause
s = lte_gold_generic(&x1, &x2, 1);
for (int rb=0; rb<nrofPRB; rb++){
//startingPRB = startingPRB + rb;
@@ -1078,23 +1125,25 @@ void nr_generate_pucch2(int32_t **txdataF,
}
}
//#if 0
void nr_generate_pucch3_4(int32_t **txdataF,
NR_DL_FRAME_PARMS *frame_parms,
pucch_format_nr_t fmt,
PUCCH_CONFIG_DEDICATED *pucch_config_dedicated,
uint64_t payload,
int16_t amp,
uint8_t nr_tti_rx,
uint8_t nrofSymbols,
uint8_t startingSymbolIndex,
uint8_t nrofPRB,
uint8_t startingPRB,
uint8_t nr_bit,
uint8_t occ_length_format4,
uint8_t occ_index_format4) {
void nr_generate_pucch3_4(PHY_VARS_NR_UE *ue,
int32_t **txdataF,
NR_DL_FRAME_PARMS *frame_parms,
pucch_format_nr_t fmt,
PUCCH_CONFIG_DEDICATED *pucch_config_dedicated,
uint64_t payload,
int16_t amp,
int nr_tti_tx,
uint8_t nrofSymbols,
uint8_t startingSymbolIndex,
uint8_t nrofPRB,
uint16_t startingPRB,
uint16_t startingPRB_intraSlotHopping,
uint8_t nr_bit,
uint8_t occ_length_format4,
uint8_t occ_index_format4) {
#ifdef DEBUG_NR_PUCCH_TX
printf("\t [nr_generate_pucch3_4] start function with payload=%d and nr_bit=%d\n", payload, nr_bit);
printf("\t [nr_generate_pucch3_4] start function at slot(nr_tti_tx)=%d with payload=%d and nr_bit=%d\n", nr_tti_tx, payload, nr_bit);
#endif
// b is the block of bits transmitted on the physical channel after payload coding
uint64_t b;
@@ -1306,8 +1355,6 @@ void nr_generate_pucch3_4(int32_t **txdataF,
*/
// the value of u,v (delta always 0 for PUCCH) has to be calculated according to TS 38.211 Subclause 6.3.2.2.1
uint8_t u=0,v=0,delta=0;
// depending on the value of the PUCCH_GroupHopping, we will obtain different values for u,v
uint8_t PUCCH_GroupHopping; // from higher layers FIXME!!
// if frequency hopping is disabled, intraSlotFrequencyHopping is not provided
// n_hop = 0
// if frequency hopping is enabled, intraSlotFrequencyHopping is provided
@@ -1336,7 +1383,7 @@ void nr_generate_pucch3_4(int32_t **txdataF,
int16_t *r_u_v_base_im = malloc(sizeof(int16_t)*12*nrofPRB);
int16_t *r_u_v_alpha_delta_re = malloc(sizeof(int16_t)*12*nrofPRB);
int16_t *r_u_v_alpha_delta_im = malloc(sizeof(int16_t)*12*nrofPRB);
nr_group_sequence_hopping(PUCCH_GroupHopping,n_id,n_hop,nr_tti_rx,&u,&v); // calculating u and v value
nr_group_sequence_hopping(ue,n_hop,nr_tti_tx,&u,&v); // calculating u and v value
// Next we proceed to calculate base sequence for DM-RS signal, according to TS 38.211 subclause 6.4.1.33
if (nrofPRB >= 3) { // TS 38.211 subclause 5.2.2.1 (Base sequences of length 36 or larger) applies
uint8_t list_of_prime_numbers[46] = {2, 3, 5, 7, 11, 13, 17, 19, 23, 29,
@@ -1401,7 +1448,7 @@ void nr_generate_pucch3_4(int32_t **txdataF,
uint16_t k=0;
for (int l=0; l<nrofSymbols; l++) {
uint16_t j=0;
alpha = nr_cyclic_shift_hopping(n_id,m0,mcs,l,startingSymbolIndex,nr_tti_rx);
alpha = nr_cyclic_shift_hopping(ue,m0,mcs,l,startingSymbolIndex,nr_tti_tx);
for (int rb=0; rb<nrofPRB; rb++){
//startingPRB = startingPRB + rb;
if (((rb+startingPRB) < (frame_parms->N_RB_DL>>1)) && ((frame_parms->N_RB_DL & 1) == 0)) { // if number RBs in bandwidth is even and current PRB is lower band
openair1/PHY/defs_nr_UE.h
+33 -50
View File
@@ -160,27 +160,6 @@
#include "NR_IF_Module.h"
//#if defined(UPGRADE_RAT_NR)
#if 1
/* see 38.321 Table 7.1-2 RNTI usage */
typedef enum { /* Type for Radio Network Temporary Identifier */
C_RNTI_NR = 0, /* Cell RNTI */
Temporary_C_RNTI_NR, /* Temporary C-RNTI */
CS_RNTI_NR, /* Configured Scheduling RNTI */
P_RNTI_NR, /* Paging RNTI */
SI_RNTI_NR, /* System information RNTI */
RA_RNTI_NR, /* Random Access RNTI */
TPC_CS_RNTI_NR, /* configured scheduling uplink power control */
TPC_PUCCH_RNTI_NR, /* PUCCH power control */
TPC_PUSCH_RNTI_NR, /* PUSCH power control */
TPC_SRS_RNTI_NR, /* SRS trigger and power control */
INT_RNTI_NR, /* Indication pre-emption in DL */
SFI_RNTI_NR, /* Slot Format Indication on the given cell */
SP_CSI_RNTI_NR /* Semipersistent CSI reporting on PUSCH */
} nr_rnti_type_t;
#endif
/// Context data structure for RX/TX portion of subframe processing
typedef struct {
/// index of the current UE RX/TX proc
@@ -611,13 +590,13 @@ typedef struct {
} NR_UE_PDSCH_FLP;
#define NR_PDCCH_DEFS_NR_UE
#define NR_NBR_CORESET_ACT_BWP 3 // The number of CoreSets per BWP is limited to 3 (including initial CORESET: ControlResourceId 0)
#define NR_NBR_SEARCHSPACE_ACT_BWP 10 // The number of SearchSpaces per BWP is limited to 10 (including initial SEARCHSPACE: SearchSpaceId 0)
#define NR_NBR_CORESET_ACT_BWP 3 // The number of CoreSets per BWP is limited to 3 (including initial CORESET: ControlResourceId 0)
#define NR_NBR_SEARCHSPACE_ACT_BWP 10 // The number of SearchSpaces per BWP is limited to 10 (including initial SEARCHSPACE: SearchSpaceId 0)
#ifdef NR_PDCCH_DEFS_NR_UE
#define MAX_NR_DCI_DECODED_SLOT 10
#define NBR_NR_FORMATS 8
#define NBR_NR_DCI_FIELDS 56
#define MAX_NR_DCI_DECODED_SLOT 10 // This value is not specified
#define NBR_NR_FORMATS 8 // The number of formats is 8 (0_0, 0_1, 1_0, 1_1, 2_0, 2_1, 2_2, 2_3)
#define NBR_NR_DCI_FIELDS 56 // The number of different dci fields defined in TS 38.212 subclause 7.3.1
#define IDENTIFIER_DCI_FORMATS 0
#define CARRIER_IND 1
@@ -655,7 +634,6 @@ typedef struct {
#define TPC_PUCCH 33
#define PUCCH_RESOURCE_IND 34
#define PDSCH_TO_HARQ_FEEDBACK_TIME_IND 35
//#define SHORT_MESSAGE_IND 33
#define SRS_RESOURCE_IND 36
#define PRECOD_NBR_LAYERS 37
#define ANTENNA_PORTS 38
@@ -701,24 +679,21 @@ typedef enum {
#define _TPC_PUSCH_RNTI_ 10
#define _TPC_PUCCH_RNTI_ 11
#define _TPC_SRS_RNTI_ 12
typedef enum {
_c_rnti = _C_RNTI_,
_cs_rnti = _CS_RNTI_,
_new_rnti = _NEW_RNTI_,
_tc_rnti = _TC_RNTI_,
_p_rnti = _P_RNTI_,
_si_rnti = _SI_RNTI_,
_ra_rnti = _RA_RNTI_,
_sp_csi_rnti = _SP_CSI_RNTI_,
_sfi_rnti = _SFI_RNTI_,
_int_rnti = _INT_RNTI_,
_tpc_pusch_rnti = _TPC_PUSCH_RNTI_,
_tpc_pucch_rnti = _TPC_PUCCH_RNTI_,
typedef enum { /* see 38.321 Table 7.1-2 RNTI usage */
_c_rnti = _C_RNTI_, /* Cell RNTI */
_cs_rnti = _CS_RNTI_, /* Configured Scheduling RNTI */
_new_rnti = _NEW_RNTI_, /* ? */
_tc_rnti = _TC_RNTI_, /* Temporary C-RNTI */
_p_rnti = _P_RNTI_, /* Paging RNTI */
_si_rnti = _SI_RNTI_, /* System information RNTI */
_ra_rnti = _RA_RNTI_, /* Random Access RNTI */
_sp_csi_rnti = _SP_CSI_RNTI_, /* Semipersistent CSI reporting on PUSCH */
_sfi_rnti = _SFI_RNTI_, /* Slot Format Indication on the given cell */
_int_rnti = _INT_RNTI_, /* Indication pre-emption in DL */
_tpc_pusch_rnti = _TPC_PUSCH_RNTI_, /* PUSCH power control */
_tpc_pucch_rnti = _TPC_PUCCH_RNTI_, /* PUCCH power control */
_tpc_srs_rnti = _TPC_SRS_RNTI_} crc_scrambled_t;
typedef enum {bundle_n2=2,bundle_n3=3,bundle_n6=6} NR_UE_CORESET_REG_bundlesize_t;
typedef enum {interleave_n2=2,interleave_n3=3,interleave_n6=6} NR_UE_CORESET_interleaversize_t;
@@ -774,11 +749,11 @@ typedef struct {
int tciStatesPDCCH;
int tciPresentInDCI;
uint16_t pdcchDMRSScramblingID;
uint16_t rb_offset;
} NR_UE_PDCCH_CORESET;
// Slots for PDCCH Monitoring configured as periodicity and offset
typedef enum {nr_sl1=1,nr_sl2=2,nr_sl4=4,nr_sl5=5,nr_sl8=8,nr_sl10=10,nr_sl16=16,nr_sl20=20} NR_UE_SLOT_PERIOD_OFFSET_t;
typedef enum {nr_sl1=1,nr_sl2=2,nr_sl4=4,nr_sl5=5,nr_sl8=8,nr_sl10=10,nr_sl16=16,nr_sl20=20,nr_sl40=40,nr_sl80=80,nr_sl160=160,nr_sl320=320,nr_sl640=640,nr_sl1280=1280,nr_sl2560=2560} NR_UE_SLOT_PERIOD_OFFSET_t;
typedef enum {nc0=0,nc1=1,nc2=2,nc3=3,nc4=4,nc5=5,nc6=6,nc8=8} NR_UE_SEARCHSPACE_nbrCAND_t;
typedef enum {nsfi1=1,nsfi2=2} NR_UE_SEARCHSPACE_nbrCAND_SFI_t;
typedef enum {n2_3_1=1,n2_3_2=2} NR_UE_SEARCHSPACE_nbrCAND_2_3_t;
@@ -848,9 +823,12 @@ typedef struct {
// INTEGER (0..maxNrofSearchSpaces-1) (0..40-1)
int searchSpaceId;
int controlResourceSetId;
// FIXME! Verify type to be used for this parameter (sl1, sl2, sl4, sl5, sl8, sl10, sl16, sl20). Maybe enum.
NR_UE_SLOT_PERIOD_OFFSET_t monitoringSlotPeriodicityAndOffset;
int monitoringSlotPeriodicityAndOffset_offset;
uint16_t monitoringSlotPeriodicityAndOffset_offset;
// duration is number of consecutive slots that a SearchSpace lasts in every occasion, i.e., upon every period as given in the periodicityAndOffset
// if the field is absent, the UE applies the value 1 slot
// the maximum valid duration is peridicity-1 (periodicity as given in the monitoringSlotPeriodicityAndOffset)
uint16_t duration;
// bit string size 14. Bitmap to indicate symbols within slot where PDCCH has to be monitored
// the MSB (left) bit represents first OFDM in slot
uint16_t monitoringSymbolWithinSlot;
@@ -916,11 +894,14 @@ typedef struct {
uint8_t dciFormat;
uint8_t agregationLevel;
#ifdef NR_PDCCH_DEFS_NR_UE
int nb_searchSpaces;
// CORESET structure, where maximum number of CORESETs to be handled is 3 (according to 38.331 V15.1.0)
NR_UE_PDCCH_CORESET coreset[NR_NBR_CORESET_ACT_BWP];
// SEARCHSPACE structure, where maximum number of SEARCHSPACEs to be handled is 10 (according to 38.331 V15.1.0)
// Each SearchSpace is associated with one ControlResourceSet
NR_UE_PDCCH_SEARCHSPACE searchSpace[NR_NBR_SEARCHSPACE_ACT_BWP];
uint32_t nb_search_space;
#endif
} NR_UE_PDCCH;
@@ -1015,9 +996,9 @@ typedef struct {
/// \brief Total gains with bypassed RF gain stage (ExpressMIMO2/Lime)
uint32_t rx_gain_byp[4];
/// \brief Current transmit power
int16_t tx_power_dBm[MAX_NR_OF_SLOTS];
int16_t tx_power_dBm[NR_MAX_SLOTS_PER_FRAME];
/// \brief Total number of REs in current transmission
int tx_total_RE[MAX_NR_OF_SLOTS];
int tx_total_RE[NR_MAX_SLOTS_PER_FRAME];
/// \brief Maximum transmit power
int8_t tx_power_max_dBm;
/// \brief Number of eNB seen by UE
@@ -1036,6 +1017,8 @@ typedef struct {
nr_ue_if_module_t *if_inst;
nr_downlink_indication_t dl_indication;
nr_uplink_indication_t ul_indication;
fapi_nr_rx_indication_t rx_ind;
fapi_nr_dci_indication_t dci_ind;
// point to the current rxTx thread index
uint8_t current_thread_id[10];
@@ -1086,7 +1069,7 @@ typedef struct {
uint32_t nr_gold_pdsch[2][20][2][21];
/// PDCCH DMRS
uint32_t nr_gold_pdcch[7][20][3][10];
uint32_t nr_gold_pdcch[7][20][3][52];
uint32_t X_u[64][839];
openair1/PHY/defs_nr_common.h
+2 -1
View File
@@ -33,6 +33,7 @@
#ifndef __PHY_DEFS_NR_COMMON__H__
#define __PHY_DEFS_NR_COMMON__H__
#include "PHY/impl_defs_top.h"
#include "defs_common.h"
#include "nfapi_nr_interface.h"
#include "impl_defs_nr.h"
@@ -176,7 +177,7 @@ typedef struct NR_DL_FRAME_PARMS {
TDD_UL_DL_SlotConfig_t *p_TDD_UL_DL_ConfigDedicated;
/// TDD configuration
uint16_t tdd_uplink_nr[MAX_NR_OF_SLOTS]; /* this is a bitmap of symbol of each slot given for 2 frames */
uint16_t tdd_uplink_nr[2*NR_MAX_SLOTS_PER_FRAME]; /* this is a bitmap of symbol of each slot given for 2 frames */
//SSB related params
/// Start in Subcarrier index of the SSB block
openair1/PHY/impl_defs_nr.h
+4 -3
View File
@@ -114,12 +114,13 @@ SystemInformationBlockType1_nr_t;
*
************************************************************************/
#define MAX_NR_OF_SLOTS (320) /* maximum number of slots */
#define NR_TDD_DOWNLINK_SLOT (0x0000)
#define NR_TDD_UPLINK_SLOT (0x3FFF) /* uplink bitmap for each symbol, there are 14 symbols per slots */
#define NR_TDD_SET_ALL_SYMBOLS (0x3FFF)
#define NR_DOWNLINK_SLOT (0x01)
#define NR_UPLINK_SLOT (0x02)
#define FRAME_DURATION_MICRO_SEC (10000) /* frame duration in microsecond */
typedef enum {
@@ -541,7 +542,7 @@ typedef struct {
const initial_pucch_resource_t initial_pucch_resource[NB_INITIAL_PUCCH_RESOURCE]; /* TS 36.213 Table 9.2.1-1: PUCCH resource sets before dedicated PUCCH resource configuration */
/* structure with all possible field for pucch format from 0 to 4 */
/* structure with all possible fields for pucch format from 0 to 4 */
typedef struct {
pucch_format_nr_t format; /* format 0 1 2 3 4 */
uint8_t initialCyclicShift; /* x x */
openair1/PHY/impl_defs_top.h
+1 -1
View File
@@ -261,7 +261,7 @@
#define NB_NUMEROLOGIES_NR (5)
#define TDD_CONFIG_NB_FRAMES (2)
#define NR_MAX_SLOTS_PAR_FRAME (160) /* number of slots per frame */
#define NR_MAX_SLOTS_PER_FRAME (160) /* number of slots per frame */
#define NR_UE_CAPABILITY_SLOT_RX_TO_TX (4) /* FFS_NR_TODO it defines ue capability which is the number of slots */
/* - between reception of pdsch and tarnsmission of its acknowlegment */
/* - between reception of un uplink grant and its related transmission */
openair1/SCHED_NR_UE/defs.h
+1 -1
View File
@@ -123,7 +123,7 @@ void phy_procedures_UE_TX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eNB
@param r_type indicates the relaying operation: 0: no_relaying, 1: unicast relaying type 1, 2: unicast relaying type 2, 3: multicast relaying
@param phy_vars_rn pointer to RN variables
*/
int phy_procedures_UE_RX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eNB_id,uint8_t abstraction_flag,uint8_t do_pdcch_flag,runmode_t mode,relaying_type_t r_type);
int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eNB_id,uint8_t abstraction_flag,uint8_t do_pdcch_flag,runmode_t mode,relaying_type_t r_type);
int phy_procedures_slot_parallelization_UE_RX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eNB_id,uint8_t abstraction_flag,uint8_t do_pdcch_flag,runmode_t mode,relaying_type_t r_type);
#ifdef UE_SLOT_PARALLELISATION
openair1/SCHED_NR_UE/fapi_nr_ue_l1.c
+109 -40
View File
@@ -41,61 +41,130 @@ extern PHY_VARS_NR_UE ***PHY_vars_UE_g;
int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){
if(scheduled_response != NULL){
if(scheduled_response->dl_config != NULL){
/// module id
module_id_t module_id = scheduled_response->module_id;
/// component carrier id
uint8_t cc_id = scheduled_response->CC_id;
uint32_t i;
}
if(scheduled_response != NULL){
PHY_VARS_NR_UE *ue = PHY_vars_UE_g[module_id][cc_id];
NR_UE_PDCCH *pdcch_vars2 = ue->pdcch_vars[0][0];
if(scheduled_response->dl_config != NULL){
fapi_nr_dl_config_request_t *dl_config = scheduled_response->dl_config;
if(scheduled_response->ul_config != NULL){
for(i=0; i<dl_config->number_pdus; ++i){
if(dl_config->dl_config_list[i].pdu_type == FAPI_NR_DL_CONFIG_TYPE_DCI){
pdcch_vars2->nb_search_space = pdcch_vars2->nb_search_space + 1;
fapi_nr_dl_config_dci_dl_pdu_rel15_t *dci_config = &dl_config->dl_config_list[i].dci_config_pdu.dci_config_rel15;
pdcch_vars2->searchSpace[i].monitoringSymbolWithinSlot = dci_config->monitoring_symbols_within_slot;
pdcch_vars2->searchSpace[i].nrofCandidates_aggrlevel1 = dci_config->number_of_candidates[0];
pdcch_vars2->searchSpace[i].nrofCandidates_aggrlevel2 = dci_config->number_of_candidates[1];
pdcch_vars2->searchSpace[i].nrofCandidates_aggrlevel4 = dci_config->number_of_candidates[2];
pdcch_vars2->searchSpace[i].nrofCandidates_aggrlevel8 = dci_config->number_of_candidates[3];
pdcch_vars2->searchSpace[i].nrofCandidates_aggrlevel16 = dci_config->number_of_candidates[4];
}
pdcch_vars2->coreset[i].duration = dci_config->coreset.duration;
pdcch_vars2->coreset[i].frequencyDomainResources = dci_config->coreset.frequency_domain_resource;
pdcch_vars2->coreset[i].rb_offset = dci_config->coreset.rb_offset;
if(scheduled_response->tx_request != NULL){
if(dci_config->coreset.cce_reg_mapping_type == CCE_REG_MAPPING_TYPE_INTERLEAVED){
pdcch_vars2->coreset[i].cce_reg_mappingType.shiftIndex = dci_config->coreset.cce_reg_interleaved_shift_index;
pdcch_vars2->coreset[i].cce_reg_mappingType.reg_bundlesize = dci_config->coreset.cce_reg_interleaved_reg_bundle_size;
pdcch_vars2->coreset[i].cce_reg_mappingType.interleaversize = dci_config->coreset.cce_reg_interleaved_interleaver_size;
}else{ //CCE_REG_MAPPING_TYPE_NON_INTERLEAVED
pdcch_vars2->coreset[i].cce_reg_mappingType.shiftIndex = 0;
pdcch_vars2->coreset[i].cce_reg_mappingType.reg_bundlesize = 0;
pdcch_vars2->coreset[i].cce_reg_mappingType.interleaversize = 0;
}
pdcch_vars2->coreset[i].precoderGranularity = dci_config->coreset.precoder_granularity;
//pdcch_vars2->coreset[i].tciStatesPDCCH;
//pdcch_vars2->coreset[i].tciPresentInDCI;
pdcch_vars2->coreset[i].pdcchDMRSScramblingID = dci_config->coreset.pdcch_dmrs_scrambling_id;
}else{ //FAPI_NR_DL_CONFIG_TYPE_DLSCH
// dlsch config pdu
}
}
fapi_nr_dl_config_dlsch_pdu_rel15_t *dlsch_pdu = &dl_config->dl_config_list[i].dlsch_config_pdu.dlsch_config_rel15;
NR_UE_DLSCH_t **dlsch = ue->dlsch[ue->current_thread_id[0]][0]; //nr_tti_rx
NR_UE_DLSCH_t *dlsch0 = dlsch[0];
NR_DL_UE_HARQ_t *dlsch0_harq = dlsch[0]->harq_processes[dlsch_pdu->harq_pid];
return 0;
dlsch0->rnti = dl_config->dl_config_list[i].dlsch_config_pdu.rnti;
dlsch0_harq->start_rb = dlsch_pdu->start_rb;
dlsch0_harq->nb_rb = dlsch_pdu->number_rbs;
dlsch0_harq->nb_symbols = dlsch_pdu->number_symbols;
dlsch0_harq->nb_symbols = dlsch_pdu->number_symbols;
dlsch0_harq->start_symbol = dlsch_pdu->start_symbol;
dlsch0->current_harq_pid = dlsch_pdu->harq_pid;
dlsch0->active = 1;
dlsch0_harq->mcs = dlsch_pdu->mcs;
dlsch0_harq->DCINdi = dlsch_pdu->ndi;
}
}
}else{
pdcch_vars2->nb_search_space = 0;
}
if(scheduled_response->ul_config != NULL){
}else{
}
if(scheduled_response->tx_request != NULL){
}else{
}
}
return 0;
}
int8_t nr_ue_phy_config_request(nr_phy_config_t *phy_config){
if(phy_config != NULL){
if(phy_config->config_req.config_mask & FAPI_NR_CONFIG_REQUEST_MASK_PBCH){
printf("[L1][IF module][PHY CONFIG]\n");
printf("subcarrier spacing: %d\n", phy_config->config_req.pbch_config.subcarrier_spacing_common);
printf("ssb carrier offset: %d\n", phy_config->config_req.pbch_config.ssb_subcarrier_offset);
printf("dmrs type A position: %d\n", phy_config->config_req.pbch_config.dmrs_type_a_position);
printf("pdcch config sib1: %d\n", phy_config->config_req.pbch_config.pdcch_config_sib1);
printf("cell barred: %d\n", phy_config->config_req.pbch_config.cell_barred);
printf("intra frequcney reselection: %d\n", phy_config->config_req.pbch_config.intra_frequency_reselection);
printf("system frame number: %d\n", phy_config->config_req.pbch_config.system_frame_number);
printf("ssb index: %d\n", phy_config->config_req.pbch_config.ssb_index);
printf("half frame bit: %d\n", phy_config->config_req.pbch_config.half_frame_bit);
printf("-------------------------------\n");
if(phy_config != NULL){
if(phy_config->config_req.config_mask & FAPI_NR_CONFIG_REQUEST_MASK_PBCH){
printf("[L1][IF module][PHY CONFIG]\n");
printf("subcarrier spacing: %d\n", phy_config->config_req.pbch_config.subcarrier_spacing_common);
printf("ssb carrier offset: %d\n", phy_config->config_req.pbch_config.ssb_subcarrier_offset);
printf("dmrs type A position: %d\n", phy_config->config_req.pbch_config.dmrs_type_a_position);
printf("pdcch config sib1: %d\n", phy_config->config_req.pbch_config.pdcch_config_sib1);
printf("cell barred: %d\n", phy_config->config_req.pbch_config.cell_barred);
printf("intra frequcney reselection: %d\n", phy_config->config_req.pbch_config.intra_frequency_reselection);
printf("system frame number: %d\n", phy_config->config_req.pbch_config.system_frame_number);
printf("ssb index: %d\n", phy_config->config_req.pbch_config.ssb_index);
printf("half frame bit: %d\n", phy_config->config_req.pbch_config.half_frame_bit);
printf("-------------------------------\n");
PHY_vars_UE_g[0][0]->proc.proc_rxtx[0].frame_rx = phy_config->config_req.pbch_config.system_frame_number;
}
if(phy_config->config_req.config_mask & FAPI_NR_CONFIG_REQUEST_MASK_DL_BWP_COMMON){
}
PHY_vars_UE_g[0][0]->proc.proc_rxtx[0].frame_rx = phy_config->config_req.pbch_config.system_frame_number;
}
if(phy_config->config_req.config_mask & FAPI_NR_CONFIG_REQUEST_MASK_DL_BWP_COMMON){
}
if(phy_config->config_req.config_mask & FAPI_NR_CONFIG_REQUEST_MASK_UL_BWP_COMMON){
}
if(phy_config->config_req.config_mask & FAPI_NR_CONFIG_REQUEST_MASK_UL_BWP_COMMON){
}
if(phy_config->config_req.config_mask & FAPI_NR_CONFIG_REQUEST_MASK_DL_BWP_DEDICATED){
}
if(phy_config->config_req.config_mask & FAPI_NR_CONFIG_REQUEST_MASK_DL_BWP_DEDICATED){
}
if(phy_config->config_req.config_mask & FAPI_NR_CONFIG_REQUEST_MASK_UL_BWP_DEDICATED){
}
}
if(phy_config->config_req.config_mask & FAPI_NR_CONFIG_REQUEST_MASK_UL_BWP_DEDICATED){
}
}
return 0;
return 0;
}
openair1/SCHED_NR_UE/harq_nr.c
+78 -34
View File
@@ -89,9 +89,53 @@
************************************************************************/
#include "PHY/defs_nr_UE.h"
#include "PHY/NR_UE_TRANSPORT/nr_transport_ue.h"
#include "SCHED_NR_UE/harq_nr.h"
/********************* define **************************************/
#define DL_DCI (1)
#define UL_DCI (0)
/*******************************************************************
*
* NAME : get_dci_info_for_harq
*
* PARAMETERS : pointer to ue context
* id of current gNB
* number of uplink processes
* maximum number of uplink retransmissions
* RETURN : none
*
* DESCRIPTION : update HARQ entity with information from DCI
* TS 38.212 7.3.1.2 DCI formats for scheduling PDSCH
*
*********************************************************************/
void get_dci_info_for_harq(PHY_VARS_NR_UE *ue, NR_DCI_INFO_EXTRACTED_t *nr_dci_info_extracted,
NR_UE_DLSCH_t **dlsch, NR_UE_ULSCH_t *ulsch, uint8_t nr_tti_rx, uint8_t tx_offset)
{
if (nr_dci_info_extracted->identifier_dci_formats == DL_DCI) {
dlsch[0]->current_harq_pid = nr_dci_info_extracted->harq_process_number;
NR_DL_UE_HARQ_t *dl_harq = dlsch[0]->harq_processes[dlsch[0]->current_harq_pid];
dl_harq->harq_ack.vDAI_DL = nr_dci_info_extracted->dai+1;
dl_harq->harq_ack.pucch_resource_indicator = nr_dci_info_extracted->pucch_resource_ind;
dl_harq->harq_ack.slot_for_feedback_ack = (nr_tti_rx + nr_dci_info_extracted->pdsch_to_harq_feedback_time_ind)%ue->frame_parms.ttis_per_subframe;
dl_harq->harq_ack.harq_id = nr_dci_info_extracted->harq_process_number;
dl_harq->harq_ack.rx_status = downlink_harq_process(dl_harq, dlsch[0]->current_harq_pid, nr_dci_info_extracted->ndi, dlsch[0]->rnti_type);
}
else if (nr_dci_info_extracted->identifier_dci_formats == UL_DCI) {
/* store harq id for which pusch should be transmitted at rx_slot + tx_offset */
set_tx_harq_id(ulsch, nr_dci_info_extracted->harq_process_number, (nr_tti_rx + tx_offset)%ue->frame_parms.ttis_per_subframe);
ulsch->harq_processes[nr_dci_info_extracted->harq_process_number]->tx_status = uplink_harq_process(ulsch, nr_dci_info_extracted->harq_process_number, nr_dci_info_extracted->ndi, ulsch->rnti_type);
}
}
/*******************************************************************
*
* NAME : config_uplink_harq_process
@@ -139,6 +183,10 @@ void config_uplink_harq_process(PHY_VARS_NR_UE *ue, int gNB_id, uint8_t number_h
ulsch->harq_processes[harq_pid]->first_tx = 1;
ulsch->harq_processes[harq_pid]->round = 0;
}
for (int slot_tx = 0; slot_tx < NR_MAX_SLOTS_PER_FRAME; slot_tx++) {
ue->ulsch[gNB_id]->harq_process_id[slot_tx] = NR_MAX_HARQ_PROCESSES;
}
}
/*******************************************************************
@@ -184,9 +232,9 @@ void release_uplink_harq_process(PHY_VARS_NR_UE *ue, int gNB_id)
*
*********************************************************************/
void set_tx_harq_id(PHY_VARS_NR_UE *ue, int gNB_id, int harq_pid, int slot_tx)
void set_tx_harq_id(NR_UE_ULSCH_t *ulsch, int harq_pid, int slot_tx)
{
ue->ulsch[gNB_id]->harq_process_id[slot_tx] = harq_pid;
ulsch->harq_process_id[slot_tx] = harq_pid;
}
/*******************************************************************
@@ -199,30 +247,14 @@ void set_tx_harq_id(PHY_VARS_NR_UE *ue, int gNB_id, int harq_pid, int slot_tx)
*
* RETURN : harq process identifier
*
* DESCRIPTION : return tx harq process identifier for given transmission slot
* DESCRIPTION : return tx harq process identifier for given slot transmission
*
*********************************************************************/
int get_tx_harq_id(PHY_VARS_NR_UE *ue, int gNB_id, int slot_tx)
int get_tx_harq_id(NR_UE_ULSCH_t *ulsch, int slot_tx)
{
return (ue->ulsch[gNB_id]->harq_process_id[slot_tx]);
}
/*******************************************************************
*
* NAME : get_dci_slot_rx_to_tx
*
* PARAMETERS : dci index
*
* RETURN : number of slots
*
* DESCRIPTION : extract from DCI number of slots between current reception and its related transmission
*
*********************************************************************/
int get_dci_slot_rx_to_tx(int dci_index)
{
return (4);
return (ulsch->harq_process_id[slot_tx]);
}
/*******************************************************************
@@ -244,13 +276,17 @@ int get_dci_slot_rx_to_tx(int dci_index)
*
*********************************************************************/
harq_result_t uplink_harq_process(NR_UE_ULSCH_t *ulsch, int harq_pid, int ndi, nr_rnti_type_t rnti_type)
harq_result_t uplink_harq_process(NR_UE_ULSCH_t *ulsch, int harq_pid, int ndi, uint8_t rnti_type)
{
harq_result_t result_harq = RETRANSMISSION_HARQ;
if ((rnti_type != C_RNTI_NR) && (rnti_type != Temporary_C_RNTI_NR)) {
LOG_E(PHY, "Fatal error in HARQ entity due to unsupported RNTI at line %d in function %s of file %s \n", __LINE__ , __func__, __FILE__);
assert(0);
if (rnti_type == _CS_RNTI_) {
LOG_E(PHY, "Fatal error in HARQ entity due to not supported CS_RNTI at line %d in function %s of file %s \n", __LINE__ , __func__, __FILE__);
return(NEW_TRANSMISSION_HARQ);
}
else if ((rnti_type != _C_RNTI_) && (rnti_type != _TC_RNTI_)) {
/* harq mechanism is not relevant for other rnti */
return(NEW_TRANSMISSION_HARQ);
}
else if (harq_pid > ulsch->number_harq_processes_for_pusch) {
LOG_E(PHY, "Fatal error in HARQ entity due to unknown process identity %d at line %d in function %s of file %s \n", harq_pid, __LINE__ , __func__, __FILE__);
@@ -258,7 +294,7 @@ harq_result_t uplink_harq_process(NR_UE_ULSCH_t *ulsch, int harq_pid, int ndi, n
}
/* 38.321 5.4.2.1 2> if the uplink grant was received on PDCCH for the C-RNTI and the HARQ buffer of the identified process is empty */
if ((ulsch->harq_processes[harq_pid]->first_tx == 1) && (rnti_type == C_RNTI_NR)) { /* no transmission yet on this process so consider its harq buffer as empty */
if ((ulsch->harq_processes[harq_pid]->first_tx == 1) && (rnti_type == _C_RNTI_)) { /* no transmission yet on this process so consider its harq buffer as empty */
ulsch->harq_processes[harq_pid]->first_tx = 0;
ulsch->harq_processes[harq_pid]->DCINdi = ndi; /* store first value of ndi */
ulsch->harq_processes[harq_pid]->round = 0;
@@ -270,7 +306,7 @@ harq_result_t uplink_harq_process(NR_UE_ULSCH_t *ulsch, int harq_pid, int ndi, n
}
/* 38.321 5.4.2.1 2> if the received grant was not addressed to a Temporary C-RNTI on PDCCH, and the NDI provided in the associated HARQ */
/* information has been toggled compared to the value in the previous transmission of this TB of this HARQ process */
else if ((ulsch->harq_processes[harq_pid]->DCINdi != ndi) && (rnti_type != Temporary_C_RNTI_NR)) { /* is ndi toogled so this is a new grant ? */
else if ((ulsch->harq_processes[harq_pid]->DCINdi != ndi) && (rnti_type != _TC_RNTI_)) { /* is ndi toogled so this is a new grant ? */
ulsch->harq_processes[harq_pid]->DCINdi = ndi; /* store first value of ndi */
ulsch->harq_processes[harq_pid]->round = 0;
ulsch->harq_processes[harq_pid]->subframe_scheduling_flag = 1;
@@ -313,7 +349,7 @@ void init_downlink_harq_status(NR_DL_UE_HARQ_t *dl_harq)
dl_harq->harq_ack.send_harq_status = 0;
dl_harq->harq_ack.vDAI_UL = UL_DAI_NO_SET;
dl_harq->harq_ack.vDAI_DL = DL_DAI_NO_SET;
dl_harq->harq_ack.slot_for_feedback_ack = NR_MAX_SLOTS_PAR_FRAME;
dl_harq->harq_ack.slot_for_feedback_ack = NR_MAX_SLOTS_PER_FRAME;
dl_harq->harq_ack.pucch_resource_indicator = MAX_PUCCH_RESOURCE_INDICATOR;
dl_harq->harq_ack.n_CCE = 0;
dl_harq->harq_ack.N_CCE = 0;;
@@ -418,13 +454,18 @@ void release_downlink_harq_process(PHY_VARS_NR_UE *ue, int gNB_id, int TB_id, in
*
*********************************************************************/
harq_result_t downlink_harq_process(NR_DL_UE_HARQ_t *dl_harq, int harq_pid, int ndi, nr_rnti_type_t rnti_type)
harq_result_t downlink_harq_process(NR_DL_UE_HARQ_t *dl_harq, int harq_pid, int ndi, uint8_t rnti_type)
{
harq_result_t result_harq = RETRANSMISSION_HARQ;
if ((rnti_type != C_RNTI_NR) && (rnti_type != Temporary_C_RNTI_NR)) {
LOG_E(PHY, "Fatal error in HARQ entity due to unknown RNTI at line %d in function %s of file %s \n", __LINE__ , __func__, __FILE__);
assert(0);
if (rnti_type == _CS_RNTI_)
{
LOG_E(PHY, "Fatal error in HARQ entity due to not supported CS_RNTI at line %d in function %s of file %s \n", __LINE__ , __func__, __FILE__);
return(NEW_TRANSMISSION_HARQ);
}
else if ((rnti_type != _C_RNTI_) && (rnti_type != _TC_RNTI_)) {
/* harq mechanism is not relevant for other rnti */
return(NEW_TRANSMISSION_HARQ);
}
if (dl_harq->first_tx == 1) {
@@ -436,7 +477,8 @@ harq_result_t downlink_harq_process(NR_DL_UE_HARQ_t *dl_harq, int harq_pid, int
result_harq = NEW_TRANSMISSION_HARQ;
NR_TST_PHY_PRINTF("[HARQ-DL-PDSCH harqId : %d] first new reception \n", harq_pid);
} else if (dl_harq->DCINdi != ndi) {
}
else if (dl_harq->DCINdi != ndi) {
dl_harq->round = 0;
dl_harq->status = ACTIVE;
dl_harq->DCINdi = ndi;
@@ -444,7 +486,9 @@ harq_result_t downlink_harq_process(NR_DL_UE_HARQ_t *dl_harq, int harq_pid, int
result_harq = NEW_TRANSMISSION_HARQ;
NR_TST_PHY_PRINTF("[HARQ-DL-PDSCH harqId : %d] new reception due to toogle of ndi \n", harq_pid);
} else {
}
else {
dl_harq->round++;
result_harq = RETRANSMISSION_HARQ;
openair1/SCHED_NR_UE/harq_nr.h
+20 -17
View File
@@ -61,16 +61,25 @@
/************* TYPE ***********************************************/
typedef enum {
NEW_TRANSMISSION_HARQ,
RETRANSMISSION_HARQ
} harq_result_t;
/************** VARIABLES *****************************************/
/*************** FUNCTIONS ****************************************/
/** \brief This function updates HARQ context according to dci
@param PHY_VARS_NR_UE ue context
@param nr_dci_info_extracted extracted information from dci
@param dlsch downlink context
@param ulsch uplink context
@param nr_tti_rx rx slot
@param tx_offset slot offset for tx
@returns none */
void get_dci_info_for_harq(PHY_VARS_NR_UE *ue, NR_DCI_INFO_EXTRACTED_t *nr_dci_info_extracted,
NR_UE_DLSCH_t **dlsch, NR_UE_ULSCH_t *ulsch, uint8_t nr_tti_rx, uint8_t tx_offset);
/** \brief This function configures uplink HARQ context
@param PHY_VARS_NR_UE ue context
@param gNB_id gNodeB identifier
@@ -87,32 +96,26 @@ void config_uplink_harq_process(PHY_VARS_NR_UE *ue, int gNB_id, uint8_t number_h
void release_uplink_harq_process(PHY_VARS_NR_UE *ue, int gNB_id);
/** \brief This function stores slot for transmission in HARQ context
@param ulsch_harq uplink harq context
@param ulsch uplink context
@param harq process identifier harq_pid
@param slot_tx slot for transmission related to current downlink PDCCH
@returns 0 none */
void set_tx_harq_id(PHY_VARS_NR_UE *ue, int gNB_id, int harq_pid, int slot_tx);
void set_tx_harq_id(NR_UE_ULSCH_t *ulsch, int harq_pid, int slot_tx);
/** \brief This function initialises context of an uplink HARQ process
@param ulsch_harq uplink harq context
@param ulsch uplink context
@param harq process identifier harq_pid
@returns 0 none */
@returns harq number for tx slot */
int get_tx_harq_id(PHY_VARS_NR_UE *ue, int gNB_id, int slot_tx);
/** \brief This function returns number of slots between current reception and related transmission
@param dci value
@returns slots number between reception and related transmission */
int get_dci_slot_rx_to_tx(int dci_index);
int get_tx_harq_id(NR_UE_ULSCH_t *ulsch, int slot_tx);
/** \brief This function update uplink harq context and return transmission type (new transmission or retransmission)
@param ulsch uplink harq context
@param harq process identifier harq_pid
@returns retransmission or new transmission */
harq_result_t uplink_harq_process(NR_UE_ULSCH_t *ulsch, int harq_pid, int ndi, nr_rnti_type_t rnti_type);
harq_result_t uplink_harq_process(NR_UE_ULSCH_t *ulsch, int harq_pid, int ndi, uint8_t rnti_type);
/** \brief This function initialises downlink HARQ status
@param pointer to downlink harq status
@@ -145,7 +148,7 @@ void release_downlink_harq_process(PHY_VARS_NR_UE *ue, int gNB_id, int TB_id, in
@param rnti_type type of rnti
@returns retransmission or new transmission */
harq_result_t downlink_harq_process(NR_DL_UE_HARQ_t *dlsch, int harq_pid, int ndi, nr_rnti_type_t rnti_type);
harq_result_t downlink_harq_process(NR_DL_UE_HARQ_t *dlsch, int harq_pid, int ndi, uint8_t rnti_type);
#undef EXTERN
#undef INIT_VARIABLES_HARQ_NR_H
openair1/SCHED_NR_UE/phy_frame_config_nr.c
+7 -7
View File
@@ -250,26 +250,26 @@ int set_tdd_configuration_dedicated_nr(NR_DL_FRAME_PARMS *frame_parms)
*
*********************************************************************/
nr_slot_t slot_select_nr(NR_DL_FRAME_PARMS *frame_parms, int nr_frame, int nr_tti)
int slot_select_nr(NR_DL_FRAME_PARMS *frame_parms, int nr_frame, int nr_tti)
{
/* for FFD all slot can be considered as an uplink */
if (frame_parms->frame_type == FDD) {
return (NR_TDD_UPLINK_SLOT);
return (NR_UPLINK_SLOT | NR_DOWNLINK_SLOT );
}
if (nr_frame%2 == 0) {
if (frame_parms->tdd_uplink_nr[nr_tti] == NR_TDD_UPLINK_SLOT) {
return (NR_TDD_UPLINK_SLOT);
return (NR_UPLINK_SLOT);
}
else {
return (NR_TDD_DOWNLINK_SLOT);
return (NR_DOWNLINK_SLOT);
}
}
else if ((frame_parms->tdd_uplink_nr[(frame_parms->ttis_per_subframe * LTE_NUMBER_OF_SUBFRAMES_PER_FRAME) + nr_tti] == NR_TDD_UPLINK_SLOT)) {
return (NR_TDD_UPLINK_SLOT);
return (NR_UPLINK_SLOT);
}
else {
return (NR_TDD_DOWNLINK_SLOT);
return (NR_DOWNLINK_SLOT);
}
}
@@ -296,7 +296,7 @@ void free_tdd_configuration_nr(NR_DL_FRAME_PARMS *frame_parms)
free(p_tdd_UL_DL_Configuration);
}
for (int number_of_slot = 0; number_of_slot < MAX_NR_OF_SLOTS; number_of_slot++) {
for (int number_of_slot = 0; number_of_slot < NR_MAX_SLOTS_PER_FRAME; number_of_slot++) {
frame_parms->tdd_uplink_nr[number_of_slot] = NR_TDD_DOWNLINK_SLOT;
}
}
openair1/SCHED_NR_UE/phy_frame_config_nr.h
+1 -1
View File
@@ -76,7 +76,7 @@ int set_tdd_configuration_dedicated_nr(NR_DL_FRAME_PARMS *frame_parms);
* @param nr_tti : slot number
@returns nr_slot_t : downlink or uplink */
nr_slot_t slot_select_nr(NR_DL_FRAME_PARMS *frame_parms, int nr_frame, int nr_tti);
int slot_select_nr(NR_DL_FRAME_PARMS *frame_parms, int nr_frame, int nr_tti);
/** \brief This function frees tdd configuration for nr
* @param frame_parms NR DL Frame parameters
openair1/SCHED_NR_UE/phy_procedures_nr_ue.c
+164 -535
View File
File diff suppressed because it is too large Load Diff
openair1/SCHED_NR_UE/pucch_uci_ue_nr.c
+89 -7
View File
@@ -154,7 +154,7 @@ bool pucch_procedures_ue_nr(PHY_VARS_NR_UE *ue, uint8_t gNB_id, UE_nr_rxtx_proc_
if (ue->mac_enabled == 1) {
/* sr_payload = 1 means that this is a positive SR, sr_payload = 0 means that it is a negative SR */
sr_payload = ue_get_SR(Mod_id,
sr_payload = nr_ue_get_SR(Mod_id,
CC_id,
frame_tx,
gNB_id,
@@ -250,6 +250,7 @@ bool pucch_procedures_ue_nr(PHY_VARS_NR_UE *ue, uint8_t gNB_id, UE_nr_rxtx_proc_
nb_symbols_total = initial_pucch_resource[initial_pucch_id].nrofSymbols;
int N_CS = initial_pucch_resource[initial_pucch_id].nb_CS_indexes;
/* see TS 38213 Table 9.2.1-1: PUCCH resource sets before dedicated PUCCH resource configuration */
int RB_BWP_offset;
if (initial_pucch_id == 15) {
RB_BWP_offset = ue->systemInformationBlockType1_nr.N_BWP_SIZE/4;
@@ -385,7 +386,7 @@ bool pucch_procedures_ue_nr(PHY_VARS_NR_UE *ue, uint8_t gNB_id, UE_nr_rxtx_proc_
}
/* TS 38.212 6.3.1.2 Code block segmentation and CRC attachment */
/* crc attachment can be done depending of paylaod size */
/* crc attachment can be done depending of payload size */
if (N_UCI < 11) {
O_CRC = 0; /* no additional crc bits */
}
@@ -468,11 +469,11 @@ bool pucch_procedures_ue_nr(PHY_VARS_NR_UE *ue, uint8_t gNB_id, UE_nr_rxtx_proc_
NR_TST_PHY_PRINTF("PUCCH ( AbsSubframe : %d.%d ) ( total payload size %d data 0x%02x ) ( ack length %d data 0x%02x ) ( sr length %d value %d ) ( csi length %d data : 0x%02x ) \n",
frame_tx%1024, nr_tti_tx, N_UCI, pucch_payload, O_ACK, pucch_ack_payload, O_SR, sr_payload, csi_status, csi_payload);
NR_TST_PHY_PRINTF("PUCCH ( format : %d ) ( modulation : %s ) ( nb prb : %d ) ( nb symbols : %d ) ( max code rate*100 : %d ) ( starting_symbol_index : %d ) \n",
format, (Q_m == BITS_PER_SYMBOL_QPSK ? " QPSK " : " BPSK "), nb_of_prbs, nb_symbols, max_code_rate, starting_symbol_index);
NR_TST_PHY_PRINTF("PUCCH ( format : %d ) ( modulation : %s ) ( nb prb : %d ) ( nb symbols total: %d ) ( nb symbols : %d ) ( max code rate*100 : %d ) ( starting_symbol_index : %d ) \n",
format, (Q_m == BITS_PER_SYMBOL_QPSK ? " QPSK " : " BPSK "), nb_of_prbs, nb_symbols_total, nb_symbols, max_code_rate, starting_symbol_index);
NR_TST_PHY_PRINTF("PUCCH ( starting_prb : %d ) ( second_hop : %d ) ( m_0 : %d ) ( m_CS : %d ) ( time_domain_occ %d ) (occ_length : %d ) ( occ_Index : %d ) \n",
starting_prb, second_hop, m_0, m_CS, time_domain_occ, occ_length, occ_Index);
starting_prb, second_hop, m_0, m_CS, time_domain_occ, occ_length, occ_Index);
/* Part - IV */
/* Generate PUCCH signal according to its format and parameters */
@@ -482,6 +483,88 @@ bool pucch_procedures_ue_nr(PHY_VARS_NR_UE *ue, uint8_t gNB_id, UE_nr_rxtx_proc_
nb_of_prbs, N_sc_ctrl_RB, nb_symbols, N_UCI, O_SR, O_CSI, O_ACK,
O_CRC, n_HARQ_ACK);
/* set tx power */
ue->tx_power_dBm[nr_tti_tx] = pucch_tx_power;
ue->tx_total_RE[nr_tti_tx] = nb_of_prbs*N_SC_RB;
int tx_amp;
#if defined(EXMIMO) || defined(OAI_USRP) || defined(OAI_BLADERF) || defined(OAI_LMSSDR) || defined(OAI_ADRV9371_ZC706)
tx_amp = get_tx_amp(pucch_tx_power,
ue->tx_power_max_dBm,
ue->frame_parms.N_RB_UL,
nb_of_prbs);
#else
tx_amp = AMP;
#endif
switch(format) {
case pucch_format0_nr:
{
nr_generate_pucch0(ue,ue->common_vars.txdataF,
&ue->frame_parms,
&ue->pucch_config_dedicated_nr[gNB_id],
tx_amp,
nr_tti_tx,
(uint8_t)m_CS,
nb_symbols_total,
starting_symbol_index,
starting_prb);
break;
}
case pucch_format1_nr:
{
nr_generate_pucch1(ue,ue->common_vars.txdataF,
&ue->frame_parms,
&ue->pucch_config_dedicated_nr[gNB_id],
pucch_payload,
tx_amp,
nr_tti_tx,
nb_symbols_total,
starting_symbol_index,
starting_prb,
second_hop,
(uint8_t)time_domain_occ,
(uint8_t)N_UCI);
break;
}
case pucch_format2_nr:
{
nr_generate_pucch2(ue,ue->common_vars.txdataF,
&ue->frame_parms,
&ue->pucch_config_dedicated_nr[gNB_id],
pucch_payload,
tx_amp,
nr_tti_tx,
nb_symbols_total,
starting_symbol_index,
nb_of_prbs,
starting_prb,
(uint8_t)N_UCI);
break;
}
case pucch_format3_nr:
case pucch_format4_nr:
{
nr_generate_pucch3_4(ue,ue->common_vars.txdataF,
&ue->frame_parms,
format,
&ue->pucch_config_dedicated_nr[gNB_id],
pucch_payload,
tx_amp,
nr_tti_tx,
nb_symbols_total,
starting_symbol_index,
nb_of_prbs,
starting_prb,
second_hop,
(uint8_t)N_UCI,
(uint8_t)occ_length,
(uint8_t)occ_Index);
break;
}
}
return (TRUE);
}
@@ -538,7 +621,6 @@ uint8_t get_downlink_ack(PHY_VARS_NR_UE *ue, uint8_t gNB_id, UE_nr_rxtx_proc_t
number_of_code_word = 1;
}
if (ue->n_connected_eNB > 1) {
LOG_E(PHY,"PUCCH ACK feedback is not implemented for mutiple gNB cells : at line %d in function %s of file %s \n", LINE_FILE , __func__, FILE_NAME);
return (0);
@@ -945,7 +1027,7 @@ boolean_t check_pucch_format(PHY_VARS_NR_UE *ue, uint8_t gNB_id, pucch_format_nr
}
}
NR_TST_PHY_PRINTF("PUCCH format %d nb symbols %d uci size %d selected format %d \n", format_pucch, nb_symbols_for_tx, uci_size, selected_pucch_format);
NR_TST_PHY_PRINTF("PUCCH format %d nb symbols total %d uci size %d selected format %d \n", format_pucch, nb_symbols_for_tx, uci_size, selected_pucch_format);
if (format_pucch != selected_pucch_format) {
if (format_pucch != selected_pucch_format_second) {
openair1/SIMULATION/NR_UE_PHY/unit_tests/build/CMakeLists.txt
+7 -7
View File
@@ -55,42 +55,42 @@ set(INC_UNIT_TESTS
add_executable(pss_test ${OPENAIR1_DIR}/SIMULATION/NR_UE_PHY/unit_tests/src/pss_test.c ${SRC_UNIT_TESTS} ${INC_UNIT_TESTS})
target_link_libraries(pss_test
-Wl,--start-group UTIL SCHED_UE_LIB SCHED_NR_UE_LIB PHY PHY_COMMON PHY_UE PHY_NR_UE -Wl,--end-group
-Wl,--start-group UTIL SCHED_NR_UE_LIB PHY PHY_COMMON PHY_UE PHY_NR_UE -Wl,--end-group
pthread m ${ATLAS_LIBRARIES}
)
add_executable(sss_test ${OPENAIR1_DIR}/SIMULATION/NR_UE_PHY/unit_tests/src/sss_test.c ${SRC_UNIT_TESTS} ${INC_UNIT_TESTS})
target_link_libraries(sss_test
-Wl,--start-group UTIL SCHED_UE_LIB SCHED_NR_UE_LIB PHY PHY_COMMON PHY_UE PHY_NR_UE -Wl,--end-group
-Wl,--start-group UTIL SCHED_NR_UE_LIB PHY PHY_COMMON PHY_UE PHY_NR_UE -Wl,--end-group
pthread m ${ATLAS_LIBRARIES}
)
add_executable(frame_config_test ${OPENAIR1_DIR}/SIMULATION/NR_UE_PHY/unit_tests/src/frame_config_test.c ${SRC_UNIT_TESTS} ${INC_UNIT_TESTS})
target_link_libraries(frame_config_test
-Wl,--start-group UTIL SCHED_UE_LIB SCHED_NR_UE_LIB PHY PHY_COMMON PHY_UE PHY_NR_UE -Wl,--end-group
-Wl,--start-group UTIL SCHED_NR_UE_LIB PHY PHY_COMMON PHY_UE PHY_NR_UE -Wl,--end-group
pthread m ${ATLAS_LIBRARIES}
)
add_executable(harq_test ${OPENAIR1_DIR}/SIMULATION/NR_UE_PHY/unit_tests/src/harq_test.c ${SRC_UNIT_TESTS} ${INC_UNIT_TESTS})
target_link_libraries(harq_test
-Wl,--start-group UTIL SCHED_UE_LIB SCHED_NR_UE_LIB PHY PHY_COMMON PHY_UE PHY_NR_UE -Wl,--end-group
-Wl,--start-group UTIL SCHED_NR_UE_LIB PHY PHY_COMMON PHY_UE PHY_NR_UE -Wl,--end-group
pthread m ${ATLAS_LIBRARIES}
)
add_executable(srs_test ${OPENAIR1_DIR}/SIMULATION/NR_UE_PHY/unit_tests/src/srs_test.c ${SRC_UNIT_TESTS} ${INC_UNIT_TESTS})
target_link_libraries(srs_test
-Wl,--start-group UTIL SCHED_UE_LIB SCHED_NR_UE_LIB PHY PHY_COMMON PHY_UE PHY_NR_UE -Wl,--end-group
-Wl,--start-group UTIL SCHED_NR_UE_LIB PHY PHY_COMMON PHY_UE PHY_NR_UE -Wl,--end-group
pthread m ${ATLAS_LIBRARIES}
)
add_executable(pbch_test ${OPENAIR1_DIR}/SIMULATION/NR_UE_PHY/unit_tests/src/pbch_test.c ${SRC_UNIT_TESTS} ${INC_UNIT_TESTS})
target_link_libraries(pbch_test
-Wl,--start-group UTIL SCHED_UE_LIB SCHED_NR_UE_LIB PHY PHY_COMMON PHY_UE PHY_NR_UE -Wl,--end-group
-Wl,--start-group UTIL SCHED_NR_UE_LIB PHY PHY_COMMON PHY_UE PHY_NR_UE -Wl,--end-group
pthread m ${ATLAS_LIBRARIES}
)
add_executable(pucch_uci_test ${OPENAIR1_DIR}/SIMULATION/NR_UE_PHY/unit_tests/src/pucch_uci_test.c ${SRC_UNIT_TESTS} ${INC_UNIT_TESTS})
target_link_libraries(pucch_uci_test
-Wl,--start-group UTIL SCHED_UE_LIB SCHED_NR_UE_LIB PHY PHY_COMMON PHY_UE PHY_NR_UE -Wl,--end-group
-Wl,--start-group UTIL SCHED_NR_UE_LIB PHY PHY_COMMON PHY_UE PHY_NR_UE -Wl,--end-group
pthread m ${ATLAS_LIBRARIES}
)
openair1/SIMULATION/NR_UE_PHY/unit_tests/build/run_tests.sh
+32 -23
View File
@@ -28,9 +28,10 @@
# - checking output files with reference files.
# ./run_test to build/run and check all tests
# -b no build
# -r no run
# -e no execution
# -c no check
# an alone specific test can be executed ./run_test test_name
# -m no run of meld
# an alone specific test can be executed ./run_tests test_name
#----------------------------------------------------------------------------
# CONFIGURATION
# files and directories
@@ -48,8 +49,9 @@ BROWSER="firefox"
BUILD_TEST="yes"
CHECK_TEST="yes"
RUN_TEST="yes"
EXECUTE_TEST="yes"
SINGLE_TEST="no"
RUN_MELD="yes"
# for removing files
REMOVE="rm -f"
COMPARE="cmp"
@@ -76,23 +78,28 @@ do
echo "No build of unit test"
BUILD_TEST="no"
;;
-r)
echo "No run of unit test"
RUN_TEST="no"
-e)
echo "No execution of unit test"
EXECUTE_TEST="no"
;;
-c)
echo "No check of unit test"
CHECK_TEST="no"
;;
-m)
echo "No run of meld tool"
RUN_MELD="no"
;;
-h)
echo "Option of run_test script"
echo "-b : No Build of unit tests"
echo "-c : No check for unit test"
echo "-r : No run of unit tests"
echo "-m : No run of meld tool"
exit
BUILD_TEST="no"
CHECK_TEST="no"
RUN_TEST="no"
EXECUTE_TEST="no"
;;
*)
for file in $tst_files
@@ -109,7 +116,7 @@ do
echo "Unknown parameter $1"
BUILD_TEST="no"
CHECK_TEST="no"
RUN_TEST="no"
EXECUTE_TEST="no"
exit
fi
;;
@@ -121,15 +128,12 @@ done
#--------------------------------------------------------------------------------------------
# RUN AND CHECK RESULTS
# compare reference log file to results file
# diff -s -d -a -q ./testlogs/*.txt ./reflog/*.txt
# compare $RESULTS_FILE to $REFERENCE_DIR/$RESULTS_FILE
numberDisplayFilesDifferencies=0
let MAX_NUMBER_DISPLAY_FILES_DIFFERENCES=8
num_diff=0
if [ $RUN_TEST == "yes" ]
if [ $EXECUTE_TEST == "yes" ]
then
mkdir $RESULT_DIR
fi
@@ -174,7 +178,7 @@ for file in $tst_files
make $file
fi
if [ $RUN_TEST == "yes" ]
if [ $EXECUTE_TEST == "yes" ]
then
echo "rm $RESULT_DIR/$RESULT_TEST_FILE"
rm $RESULT_DIR/$RESULT_TEST_FILE
@@ -195,20 +199,25 @@ for file in $tst_files
if [ $? == 0 ]
then
echo "Same file for $file"
echo "Test $file is PASS"
echo "Same logging file for $file"
else
echo "Difference for scenario $file"
echo "Test $file is FAIL"
echo "Difference of logging file for scenario $file"
let "num_diff=$num_diff + 1"
meld $RESULT_DIR/$RESULT_TEST_FILE $REFERENCE_DIR/$RESULT_TEST_FILE &
let "numberDisplayFilesDifferencies=$numberDisplayFilesDifferencies + 1"
echo "Meld number "$numberDisplayFilesDifferencies
if [ $numberDisplayFilesDifferencies = $MAX_NUMBER_DISPLAY_FILES_DIFFERENCES ]
if [ $RUN_MELD == "yes" ]
then
echo "###### ERROR ###### ERROR ###### ERROR ###### ERROR ###### ERROR ###### ERROR ######"
echo "=> ERROR Test aborted because there are already $MAX_NUMBER_DISPLAY_FILES_DIFFERENCES detected files which are different"
break
meld $RESULT_DIR/$RESULT_TEST_FILE $REFERENCE_DIR/$RESULT_TEST_FILE &
let "numberDisplayFilesDifferencies=$numberDisplayFilesDifferencies + 1"
echo "Meld number "$numberDisplayFilesDifferencies
if [ $numberDisplayFilesDifferencies = $MAX_NUMBER_DISPLAY_FILES_DIFFERENCES ]
then
echo "###### ERROR ###### ERROR ###### ERROR ###### ERROR ###### ERROR ###### ERROR ######"
echo "=> ERROR Test aborted because there are already $MAX_NUMBER_DISPLAY_FILES_DIFFERENCES detected logging files which are different"
break
fi
fi
fi
fi
else
echo "No reference file for test $file"
fi
openair1/SIMULATION/NR_UE_PHY/unit_tests/readme.txt
+33 -18
View File
@@ -19,7 +19,6 @@
* contact@openairinterface.org
*/
File: /home/jacques/workspace/oai_openairinterface/openairinterface5g/openair1/SIMULATION/NR_UE_PHY/unit_tests/README.txt
This directory contains testbenchs for 5G NR physical layers.
@@ -33,37 +32,30 @@ Install tools:
Build NR UE:
- under openairinterface5g/cmake_targets/build --nrUE
Files
=====
Specific test files
====================
pss_test.c: test for detection of primary synchronisation signal.
pss_test.c: test for detection of primary synchronisation signal.
sss_test.c: test for detection of secundary synchronisation signal.
pbch_test.c: test for decoding of packet braodcast channel.
srs_test.c: test of sounding reference signal.
frame_config_test.c : test of frame configurations (FDD/TDD).
harq_test.c : test of HARQ downlink and uplink.
pucch_uci_test : test of packed Uplink Control Channel Uplink Control Information
pss_util_test.c: common functions for running synchronisation tests.
pss_util_test.h: common headers for synchronisation tests.
input_buffer_test.h: it allows providing samples for pss test.
How to build & run tests
========================
Before building, oai environment should be set by entering under openairinterface5g "source oaienv".
Before building, oai environment should be set by entering under directory openairinterface5g "source oaienv".
A script allows to build, to run and to check all tests:
A script "run_tests.sh" allows to build, to run and to check all tests.
To run a complete non regression of unit tests, go under directory NR_UE_PHY/unit_tests/build and execute:
./run_tests.sh
>run_tests
This script "run_tests.sh" list all available unit tests.
build is based on cmake tool.
@@ -73,7 +65,10 @@ CMakeList.txt lists different build.
How to build: in directory "oai_openairinterface/openairinterface5g/openair1/SIMULATION/NR_UE_PHY/unit_tests/build/", below commands should be entered:
First command to do:
cmake CMakeList.txt -> it generates makefiles to build all projects.
Then build of test:
make pss_test -> build pss_test: detection of NR (Primary Synchronisation Channel - synchronisation of UE).
make sss_test -> build sss_test: detection of NR SSS (Secundary Synchronisation Channel - second step for UE synchronisation).
make pbch_test -> build pbch_test: decoding of NR PBCH (Packet Broadcast Channel -> UE read MIB Master Information Block which gives network parameters).
@@ -83,6 +78,7 @@ make harq_test -> build harq_test: Hybrid Repeat Request Acknowledgment
make pucch_uci_test -> build pucch_uci_test : Packet Uplink Control Channel / Uplink Control information : create UCI payload and select PUCCH formats and its parameters.
make clean -> clean all projects.
And execution of tests:
./pss_test -> run NR PSS tests.
./sss_test -> run NR SSS tests.
./pbch_test -> run NR PBCH tests.
@@ -94,8 +90,28 @@ make clean -> clean all projects.
There is a script in build/run_test.sh which allows:
- building/running/checking all tests
Checking consists in a comparaison of generated logging file at execution with a reference logging file which is stored under git for each test.
What is test result?
====================
Test verdict consists in a comparaison of generated logging file at execution with a reference logging file which is stored under git for each test.
By default, tool "meld" is open each time there is a difference between reference file and logging file.
It is possible to disable execution of meld with option -m.
Build/execute only one test:
===========================
The script "run_tests.sh" has different options:
"-b : No Build of unit tests"
"-c : No check for unit test"
"-e : No execution of unit tests"
"-m : No run of meld tool"
./run_tests.sh -> run all unit tests (build, execute and compare for each test)
./run_tests.sh -m -> run all unit tests but meld is not used (verdict is based on system command "cmp").
./run_tests.sh -b -c -r -m -> list all available unit tests
./run_tests.sh pss_test -> run only one test (here it is pss_test).
./run_tests.sh -c -e -m pss_test -> build only one test
./run_tests.sh -m pss_test -> run only one test but without execution of meld
Which processing can be tuned?
=============================
@@ -121,7 +137,6 @@ Status
======
NR synchronisation tests run successfully with default parameters.
Warning: Tests of PSS NR with decimation (based on FIR or CIC filter) does not run successfully at the moment.
openair1/SIMULATION/NR_UE_PHY/unit_tests/src/dummy_functions.c
+11 -1
View File
@@ -46,6 +46,11 @@ uint32_t (*p_nr_ue_get_SR)(module_id_t module_idP,int CC_id,frame_t frameP,uint8
/*****************functions****************************************/
lte_subframe_t subframe_select(LTE_DL_FRAME_PARMS *frame_parms,unsigned char subframe)
{
return(0);
}
PRACH_RESOURCES_t *ue_get_rach(module_id_t module_idP, int CC_id,
frame_t frameP, uint8_t new_Msg3,
sub_frame_t subframe){ return(NULL);}
@@ -61,7 +66,7 @@ void Msg1_transmitted(module_id_t module_idP, uint8_t CC_id,
void Msg3_transmitted(module_id_t module_idP, uint8_t CC_id,
frame_t frameP, uint8_t eNB_id){}
uint32_t ue_get_SR(module_id_t module_idP, int CC_id, frame_t frameP,
uint32_t nr_ue_get_SR(module_id_t module_idP, int CC_id, frame_t frameP,
uint8_t eNB_id, rnti_t rnti, sub_frame_t subframe){
uint32_t value = 0;
@@ -193,3 +198,8 @@ void exit_fun(const char* s)
undefined_function(__FUNCTION__);
}
uint32_t ue_get_SR(module_id_t module_idP, int CC_id, frame_t frameP,
uint8_t eNB_id, rnti_t rnti, sub_frame_t subframe){
uint32_t value = 0;
return(value);
}
openair1/SIMULATION/NR_UE_PHY/unit_tests/src/frame_config_test.c
+8 -10
View File
@@ -54,26 +54,24 @@ void display_frame_configuration(NR_DL_FRAME_PARMS *frame_parms) {
printf("\nTdd configuration tti %d downlink %d uplink %d period %d \n", frame_parms->ttis_per_subframe, frame_parms->p_tdd_UL_DL_Configuration->nrofDownlinkSlots,
frame_parms->p_tdd_UL_DL_Configuration->nrofUplinkSlots, frame_parms->p_tdd_UL_DL_Configuration->dl_UL_TransmissionPeriodicity);
int k = (TDD_CONFIG_NB_FRAMES * LTE_NUMBER_OF_SUBFRAMES_PER_FRAME) - 1; //19;
int k = (TDD_CONFIG_NB_FRAMES * NR_NUMBER_OF_SUBFRAMES_PER_FRAME) - 1; //19;
int tti = 0;
for (int j = 0; j < TDD_CONFIG_NB_FRAMES * frame_parms->ttis_per_subframe * LTE_NUMBER_OF_SUBFRAMES_PER_FRAME; j++) {
for (int j = 0; j < TDD_CONFIG_NB_FRAMES * frame_parms->ttis_per_subframe * NR_NUMBER_OF_SUBFRAMES_PER_FRAME; j++) {
int frame = 0;
if (j != 0) {
frame = (frame_parms->ttis_per_subframe * LTE_NUMBER_OF_SUBFRAMES_PER_FRAME)/j;
tti = (j)%(frame_parms->ttis_per_subframe * LTE_NUMBER_OF_SUBFRAMES_PER_FRAME);
frame = (frame_parms->ttis_per_subframe * NR_NUMBER_OF_SUBFRAMES_PER_FRAME)/j;
tti = (j)%(frame_parms->ttis_per_subframe * NR_NUMBER_OF_SUBFRAMES_PER_FRAME);
}
else {
frame = 0;
tti = 0;
}
if (slot_select_nr(frame_parms, frame, tti) == NR_TDD_DOWNLINK_SLOT) {
//if (frame_parms->tdd_uplink_nr[j] == NR_TDD_DOWNLINK_SLOT) {
if (slot_select_nr(frame_parms, frame, tti) & NR_DOWNLINK_SLOT) {
printf(" [%3d] D", j);
}
else {
if (slot_select_nr(frame_parms, frame, tti) == NR_TDD_UPLINK_SLOT) {
//if (frame_parms->tdd_uplink_nr[j] == NR_TDD_UPLINK_SLOT) {
if (slot_select_nr(frame_parms, frame, tti) & NR_UPLINK_SLOT) {
printf(" [%3d] U", j);
}
else {
@@ -83,7 +81,7 @@ void display_frame_configuration(NR_DL_FRAME_PARMS *frame_parms) {
}
if (j == k) {
printf("\n");
k += (TDD_CONFIG_NB_FRAMES * LTE_NUMBER_OF_SUBFRAMES_PER_FRAME); // 20
k += (TDD_CONFIG_NB_FRAMES * NR_NUMBER_OF_SUBFRAMES_PER_FRAME); // 20
}
}
printf("\n");
@@ -120,7 +118,7 @@ void set_tti_test(NR_DL_FRAME_PARMS *frame_parms, int ttis_per_subframe)
int test_frame_configuration(PHY_VARS_NR_UE *PHY_vars_UE)
{
LTE_DL_FRAME_PARMS *frame_parms = &(PHY_vars_UE->frame_parms);
NR_DL_FRAME_PARMS *frame_parms = &(PHY_vars_UE->frame_parms);
int v_return = 0;
#define NO_DOWNLINK_SYMBOL (0)
openair1/SIMULATION/NR_UE_PHY/unit_tests/src/harq_test.c
+2 -2
View File
@@ -56,7 +56,7 @@ int test_harq_uplink(PHY_VARS_NR_UE *phy_vars_ue)
int gNB_id = 0;
int harq_pid = 0;
int ndi = 1;
nr_rnti_type_t rnti_type = C_RNTI_NR;
uint8_t rnti_type = _C_RNTI_;
int number_steps = 5;
printf("\nHARQ Uplink \n");
@@ -113,7 +113,7 @@ int test_harq_downlink(PHY_VARS_NR_UE *phy_vars_ue)
int gNB_id = 0;
int harq_pid = 0;
int ndi = 1;
nr_rnti_type_t rnti_type = C_RNTI_NR;
uint8_t rnti_type = _C_RNTI_;
int number_steps = 5;
int thread_number = 0;
int TB_identifier = 0;
openair1/SIMULATION/NR_UE_PHY/unit_tests/src/pss_util_test.c
+1 -1
View File
@@ -256,7 +256,7 @@ int init_test(unsigned char N_tx, unsigned char N_rx, unsigned char transmission
frame_parms->threequarter_fs = 0;
frame_parms->numerology_index = NUMEROLOGY_INDEX_MAX_NR;
nr_init_frame_parms_ue(config,frame_parms);
nr_init_frame_parms_ue(frame_parms);
PHY_vars_UE->frame_parms.Nid_cell = (3 * N_ID_1_NUMBER) + N_ID_2_NUMBER; /* set to unvalid value */
openair2/LAYER2/NR_MAC_UE/mac.h
+62 -2
View File
@@ -37,9 +37,9 @@
#include <stdlib.h>
#include <string.h>
#define NR_BCCH_DL_SCH 3 // SI
#define NR_BCCH_DL_SCH 3 // SI
#define NR_BCCH_BCH 5 // MIB
#define NR_BCCH_BCH 5 // MIB
/*!\brief UE layer 2 status */
typedef enum {
@@ -49,5 +49,65 @@ typedef enum {
PHY_HO_PRACH
} NR_UE_L2_STATE_t;
typedef struct {
uint8_t LCID:6; // octet 1 [5:0]
uint8_t F:1; // octet 1 [6]
uint8_t R:1; // octet 1 [7]
uint8_t L:8; // octet 2 [7:0]
} __attribute__ ((__packed__)) NR_MAC_SUBHEADER_SHORT;
typedef struct {
uint8_t LCID:6; // octet 1 [5:0]
uint8_t F:1; // octet 1 [6]
uint8_t R:1; // octet 1 [7]
uint8_t L1:8; // octet 2 [7:0]
uint8_t L2:8; // octet 3 [7:0]
} __attribute__ ((__packed__)) NR_MAC_SUBHEADER_LONG;
typedef struct {
uint8_t LCID:5; // octet 1 [5:0]
uint8_t R:2; // octet 1 [7:6]
} __attribute__ ((__packed__)) NR_MAC_SUBHEADER_FIXED;
// 38.321 ch6.2.1, 38.331
#define DL_SCH_LCID_CCCH 0x00
#define DL_SCH_LCID_SRB1 0x01
#define DL_SCH_LCID_SRB2 0x02
#define DL_SCH_LCID_SRB3 0x03
#define DL_SCH_LCID_RECOMMENDED_BITRATE 0x2F
#define DL_SCH_LCID_SP_ZP_CSI_RS_RES_SET_ACT 0x30
#define DL_SCH_LCID_PUCCH_SPATIAL_RELATION_ACT 0x31
#define DL_SCH_LCID_SP_SRS_ACTIVATION 0x32
#define DL_SCH_LCID_SP_CSI_REP_PUCCH_ACT 0x33
#define DL_SCH_LCID_TCI_STATE_IND_UE_SPEC_PDCCH 0x34
#define DL_SCH_LCID_TCI_STATE_ACT_UE_SPEC_PDSCH 0x35
#define DL_SCH_LCID_APERIODIC_CSI_TRI_STATE_SUBSEL 0x36
#define DL_SCH_LCID_SP_CSI_RS_CSI_IM_RES_SET_ACT 0X37
#define DL_SCH_LCID_DUPLICATION_ACT 0X38
#define DL_SCH_LCID_SCell_ACT_4_OCT 0X39
#define DL_SCH_LCID_SCell_ACT_1_OCT 0X3A
#define DL_SCH_LCID_L_DRX 0x3B
#define DL_SCH_LCID_DRX 0x3C
#define DL_SCH_LCID_TA_COMMAND 0x3D
#define DL_SCH_LCID_CON_RES_ID 0x3E
#define DL_SCH_LCID_PADDING 0x3F
#define UL_SCH_LCID_CCCH 0x00
#define UL_SCH_LCID_SRB1 0x01
#define UL_SCH_LCID_SRB2 0x02
#define UL_SCH_LCID_SRB3 0x03
#define UL_SCH_LCID_CCCH_MSG3 0x21
#define UL_SCH_LCID_RECOMMENDED_BITRATE_QUERY 0x35
#define UL_SCH_LCID_MULTI_ENTRY_PHR_4_OCT 0x36
#define UL_SCH_LCID_CONFIGURED_GRANT_CONFIRMATION 0x37
#define UL_SCH_LCID_MULTI_ENTRY_PHR_1_OCT 0x38
#define UL_SCH_LCID_SINGLE_ENTRY_PHR 0x39
#define UL_SCH_LCID_C_RNTI 0x3A
#define UL_SCH_LCID_S_TRUNCATED_BSR 0x3B
#define UL_SCH_LCID_L_TRUNCATED_BSR 0x3C
#define UL_SCH_LCID_S_BSR 0x3D
#define UL_SCH_LCID_L_BSR 0x3E
#define UL_SCH_LCID_PADDING 0x3F
#endif /*__LAYER2_MAC_DEFS_H__ */
openair2/LAYER2/NR_MAC_UE/mac_defs.h
+39 -5
View File
@@ -61,11 +61,9 @@
typedef enum {
SFN_C_MOD_2_EQ_0,
SFN_C_MOD_2_EQ_1,
SFN_C_EQ_SFN_SSB
SFN_C_MOD_2_EQ_1
} SFN_C_TYPE;
/*!\brief Top level UE MAC structure */
typedef struct {
@@ -83,14 +81,16 @@ typedef struct {
uint32_t type0_pdcch_ss_mux_pattern;
SFN_C_TYPE type0_pdcch_ss_sfn_c;
uint32_t type0_pdcch_ss_n_c;
uint32_t type0_pdcch_consecutive_slots;
/// Random access parameter
uint16_t ra_rnti;
//// FAPI-like interface message
fapi_nr_tx_request_t tx_request;
fapi_nr_ul_config_request_t ul_config_request;
fapi_nr_dl_config_request_t dl_config_request;
fapi_nr_dci_indication_t dci_indication;
fapi_nr_rx_indication_t rx_indication;
@@ -100,7 +100,41 @@ typedef struct {
nr_phy_config_t phy_config;
} NR_UE_MAC_INST_t;
typedef enum seach_space_mask_e {
type0_pdcch = 0x1,
type0a_pdcch = 0x2,
type1_pdcch = 0x4,
type2_pdcch = 0x8,
type3_pdcch = 0x10
} search_space_mask_t;
typedef enum subcarrier_spacing_e {
scs_15kHz = 0x1,
scs_30kHz = 0x2,
scs_60kHz = 0x4,
scs_120kHz = 0x8,
scs_240kHz = 0x16
} subcarrier_spacing_t;
typedef enum channel_bandwidth_e {
bw_5MHz = 0x1,
bw_10MHz = 0x2,
bw_20MHz = 0x4,
bw_40MHz = 0x8,
bw_80MHz = 0x16,
bw_100MHz = 0x32
} channel_bandwidth_t;
typedef enum frequency_range_e {
FR1 = 0,
FR2
} frequency_range_t;
#define NUM_SLOT_FRAME 10
/*@}*/
#endif /*__LAYER2_MAC_DEFS_H__ */
openair2/LAYER2/NR_MAC_UE/mac_extern.h
+8 -2
View File
@@ -30,7 +30,7 @@
* \warning
*/
// Type0-PDCCH search space
extern const int32_t table_38213_13_1_c2[16];
extern const int32_t table_38213_13_1_c3[16];
extern const int32_t table_38213_13_1_c4[16];
@@ -80,4 +80,10 @@ extern const float table_38213_13_12_c1[16];
extern const int32_t table_38213_13_12_c2[16];
extern const float table_38213_13_12_c3[16];
extern const int32_t table_38213_10_1_1_c2[3];
extern const int32_t table_38213_10_1_1_c2[5];
// DCI extraction
// for PUSCH from TS 38.214 subclause 6.1.2.1.1
extern uint8_t table_6_1_2_1_1_2_time_dom_res_alloc_A[16][3];
// for PDSCH from TS 38.214 subclause 5.1.2.1.1
extern uint8_t table_5_1_2_1_1_2_time_dom_res_alloc_A[16][3];
openair2/LAYER2/NR_MAC_UE/mac_proto.h
+19 -2
View File
@@ -43,7 +43,8 @@
\param extra_bits extra bits for frame calculation
\param l_ssb_equal_64 check if ssb number of candicate is equal 64, 1=equal; 0=non equal. Reference 38.212 7.1.1
\param pduP pointer to pdu
\param pdu_length length of pdu*/
\param pdu_length length of pdu
\param cell_id cell id */
int8_t nr_ue_decode_mib(
module_id_t module_id,
int cc_id,
@@ -51,7 +52,8 @@ int8_t nr_ue_decode_mib(
uint8_t extra_bits,
uint32_t ssb_length,
uint32_t ssb_index,
void *pduP );
void *pduP,
uint16_t cell_id );
/**\brief primitive from RRC layer to MAC layer for configuration L1/L2, now supported 4 rrc messages: MIB, cell_group_config for MAC/PHY, spcell_config(serving cell config)
@@ -110,5 +112,20 @@ NR_UE_L2_STATE_t nr_ue_scheduler(
uint32_t ue_get_SR(module_id_t module_idP, int CC_id, frame_t frameP,
uint8_t eNB_id, rnti_t rnti, sub_frame_t subframe);
int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fapi_nr_dci_pdu_rel15_t *dci, uint16_t rnti, uint32_t dci_format);
uint32_t get_ssb_frame(uint32_t test);
uint32_t get_ssb_slot(uint32_t ssb_index);
uint32_t mr_ue_get_SR(module_id_t module_idP, int CC_id, frame_t frameP, uint8_t eNB_id, uint16_t rnti, sub_frame_t subframe);
void nr_ue_process_mac_pdu(
module_id_t module_idP,
uint8_t CC_id,
uint8_t *pduP,
uint16_t mac_pdu_len,
uint8_t eNB_index);
#endif
/** @}*/
openair2/LAYER2/NR_MAC_UE/mac_vars.c
+44 -1
View File
@@ -88,4 +88,47 @@ const float table_38213_13_12_c1[16] = { 0, 0, 2.5f, 2.5f, 5, 5, 0, 2.5f, 5, 7
const int32_t table_38213_13_12_c2[16] = { 1, 2, 1, 2, 1, 2, 2, 2, 2, 1, 2, 2, 1, 1, reserved, reserved}; // index 14-15 reserved
const float table_38213_13_12_c3[16] = { 1, 0.5f, 1, 0.5f, 1, 0.5f, 0.5f, 0.5f, 0.5f, 1, 0.5f, 0.5f, 1, 1, reserved, reserved}; // M, index 14-15 reserved
const int32_t table_38213_10_1_1_c2[3] = { 4, 2, 1 };
const int32_t table_38213_10_1_1_c2[5] = { 0, 0, 4, 2, 1 };
#define mu_pusch 1
// definition table j Table 6.1.2.1.1-4
#define j ((mu_pusch==3)?3:(mu_pusch==2)?2:1)
uint8_t table_6_1_2_1_1_2_time_dom_res_alloc_A[16][3]={ // for PUSCH from TS 38.214 subclause 6.1.2.1.1
{j, 0,14}, // row index 1
{j, 0,12}, // row index 2
{j, 0,10}, // row index 3
{j, 2,10}, // row index 4
{j, 4,10}, // row index 5
{j, 4,8}, // row index 6
{j, 4,6}, // row index 7
{j+1,0,14}, // row index 8
{j+1,0,12}, // row index 9
{j+1,0,10}, // row index 10
{j+2,0,14}, // row index 11
{j+2,0,12}, // row index 12
{j+2,0,10}, // row index 13
{j, 8,6}, // row index 14
{j+3,0,14}, // row index 15
{j+3,0,10} // row index 16
};
#define dmrs_typeA_pos 2
uint8_t table_5_1_2_1_1_2_time_dom_res_alloc_A[16][3]={ // for PDSCH from TS 38.214 subclause 5.1.2.1.1
{0,(dmrs_typeA_pos == 2)?2:3, (dmrs_typeA_pos == 2)?12:11}, // row index 1
{0,(dmrs_typeA_pos == 2)?2:3, (dmrs_typeA_pos == 2)?10:9}, // row index 2
{0,(dmrs_typeA_pos == 2)?2:3, (dmrs_typeA_pos == 2)?9:8}, // row index 3
{0,(dmrs_typeA_pos == 2)?2:3, (dmrs_typeA_pos == 2)?7:6}, // row index 4
{0,(dmrs_typeA_pos == 2)?2:3, (dmrs_typeA_pos == 2)?5:4}, // row index 5
{0,(dmrs_typeA_pos == 2)?9:10,(dmrs_typeA_pos == 2)?4:4}, // row index 6
{0,(dmrs_typeA_pos == 2)?4:6, (dmrs_typeA_pos == 2)?4:4}, // row index 7
{0,5,7}, // row index 8
{0,5,2}, // row index 9
{0,9,2}, // row index 10
{0,12,2}, // row index 11
{0,1,13}, // row index 12
{0,1,6}, // row index 13
{0,2,4}, // row index 14
{0,4,7}, // row index 15
{0,8,4} // row index 16
};
openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c
Executable → Regular
+389 -93
View File
@@ -34,38 +34,16 @@
#include "mac_extern.h"
#include "RRC/NR_UE/rrc_proto.h"
#include "assertions.h"
#include "PHY/defs_nr_UE.h"
#include <stdio.h>
#include <math.h>
typedef enum subcarrier_spacing_e {
scs_15kHz = 0x1,
scs_30kHz = 0x2,
scs_60kHz = 0x4,
scs_120kHz = 0x8,
scs_240kHz = 0x16
} subcarrier_spacing_t;
typedef enum channel_bandwidth_e {
bw_5MHz = 0x1,
bw_10MHz = 0x2,
bw_20MHz = 0x4,
bw_40MHz = 0x8,
bw_80MHz = 0x16,
bw_100MHz = 0x32
} channel_bandwidth_t;
typedef enum frequency_range_e {
FR1 = 0,
FR2
} frequency_range_t;
uint32_t get_ssb_slot(uint32_t ssb_index){
// this function now only support f <= 3GHz
return ssb_index & 0x3 ;
// return first_symbol(case, freq, ssb_index) / 14
}
int8_t nr_ue_decode_mib(
@@ -75,17 +53,17 @@ int8_t nr_ue_decode_mib(
uint8_t extra_bits, // 8bits 38.212 c7.1.1
uint32_t ssb_length,
uint32_t ssb_index,
void *pduP ){
void *pduP,
uint16_t cell_id ){
printf("[L2][MAC] decode mib\n");
NR_UE_MAC_INST_t *mac = get_mac_inst(module_id);
nr_mac_rrc_data_ind_ue( module_id, cc_id, gNB_index,
NR_BCCH_BCH, (uint8_t *) pduP, 3 );
nr_mac_rrc_data_ind_ue( module_id, cc_id, gNB_index, NR_BCCH_BCH, (uint8_t *) pduP, 3 ); // fixed 3 bytes MIB PDU
if(mac->mib != NULL){
AssertFatal(mac->mib != NULL, "nr_ue_decode_mib() mac->mib == NULL\n");
//if(mac->mib != NULL){
uint32_t frame = (mac->mib->systemFrameNumber.buf[0] >> mac->mib->systemFrameNumber.bits_unused);
uint32_t frame_number_4lsb = (uint32_t)(extra_bits & 0xf); // extra bits[0:3]
uint32_t half_frame_bit = (uint32_t)(( extra_bits >> 4 ) & 0x1 ); // extra bits[4]
@@ -106,7 +84,7 @@ int8_t nr_ue_decode_mib(
}
}
#if 0
#ifdef DEBUG_MIB
printf("system frame number(6 MSB bits): %d\n", mac->mib->systemFrameNumber.buf[0]);
printf("system frame number(with LSB): %d\n", (int)frame);
printf("subcarrier spacing: %d\n", (int)mac->mib->subCarrierSpacingCommon);
@@ -119,11 +97,22 @@ int8_t nr_ue_decode_mib(
printf("ssb index(extra bits): %d\n", (int)ssb_index);
#endif
subcarrier_spacing_t scs_ssb = scs_15kHz; // default for testing
subcarrier_spacing_t scs_pdcch = scs_15kHz; // default for testing
channel_bandwidth_t min_channel_bw = bw_5MHz; // deafult for testing
subcarrier_spacing_t scs_ssb = scs_30kHz; // default for
//const uint32_t scs_index = 0;
const uint32_t num_slot_per_frame = 20;
subcarrier_spacing_t scs_pdcch;
// assume carrier frequency < 6GHz
if(mac->mib->subCarrierSpacingCommon == NR_MIB__subCarrierSpacingCommon_scs15or60){
scs_pdcch = scs_15kHz;
}else{ //NR_MIB__subCarrierSpacingCommon_scs30or120
scs_pdcch = scs_30kHz;
}
channel_bandwidth_t min_channel_bw = bw_40MHz; // deafult for testing
uint32_t is_condition_A = 1;
uint32_t is_condition_A = (ssb_subcarrier_offset == 0); // 38.213 ch.13
frequency_range_t frequency_range = FR1;
uint32_t index_4msb = (mac->mib->pdcch_ConfigSIB1 >> 4) & 0xf;
uint32_t index_4lsb = (mac->mib->pdcch_ConfigSIB1 & 0xf);
@@ -248,13 +237,23 @@ int8_t nr_ue_decode_mib(
AssertFatal(num_symbols != -1, "Type0 PDCCH coreset num_symbols undefined");
AssertFatal(rb_offset != -1, "Type0 PDCCH coreset rb_offset undefined");
uint32_t cell_id = 0; // obtain from L1 later
mac->type0_pdcch_dci_config.coreset.rb_start = rb_offset;
mac->type0_pdcch_dci_config.coreset.rb_end = rb_offset + num_rbs - 1;
//uint32_t cell_id = 0; // obtain from L1 later
//mac->type0_pdcch_dci_config.coreset.rb_start = rb_offset;
//mac->type0_pdcch_dci_config.coreset.rb_end = rb_offset + num_rbs - 1;
uint64_t mask = 0x0;
uint8_t i;
for(i=0; i<(num_rbs/6); ++i){ // 38.331 Each bit corresponds a group of 6 RBs
mask = mask >> 1;
mask = mask | 0x100000000000;
}
mac->type0_pdcch_dci_config.coreset.frequency_domain_resource = mask;
mac->type0_pdcch_dci_config.coreset.rb_offset = rb_offset; // additional parameter other than coreset
//mac->type0_pdcch_dci_config.type0_pdcch_coreset.duration = num_symbols;
mac->type0_pdcch_dci_config.coreset.cce_reg_mapping_type = CCE_REG_MAPPING_TYPE_INTERLEAVED;
mac->type0_pdcch_dci_config.coreset.cce_reg_interleaved_reg_bundle_size = 6; // L
mac->type0_pdcch_dci_config.coreset.cce_reg_interleaved_interleaver_size = 2; // R
mac->type0_pdcch_dci_config.coreset.cce_reg_interleaved_reg_bundle_size = 6; // L 38.211 7.3.2.2
mac->type0_pdcch_dci_config.coreset.cce_reg_interleaved_interleaver_size = 2; // R 38.211 7.3.2.2
mac->type0_pdcch_dci_config.coreset.cce_reg_interleaved_shift_index = cell_id;
mac->type0_pdcch_dci_config.coreset.precoder_granularity = PRECODER_GRANULARITY_SAME_AS_REG_BUNDLE;
mac->type0_pdcch_dci_config.coreset.pdcch_dmrs_scrambling_id = cell_id;
@@ -265,18 +264,14 @@ int8_t nr_ue_decode_mib(
float big_o;
float big_m;
uint32_t temp;
SFN_C_TYPE sfn_c;
SFN_C_TYPE sfn_c; // only valid for mux=1
uint32_t n_c;
uint32_t number_of_search_space_per_slot;
uint32_t first_symbol_index;
uint32_t search_space_duration; // element of search space
uint32_t coreset_duration; // element of coreset
const uint32_t scs_index = 0;
const uint32_t num_slot_per_frame = 10;
// 38.213 table 10.1-1
/// MUX PATTERN 1
if(mac->type0_pdcch_ss_mux_pattern == 1 && frequency_range == FR1){
@@ -284,7 +279,7 @@ const uint32_t num_slot_per_frame = 10;
number_of_search_space_per_slot = table_38213_13_11_c2[index_4lsb];
big_m = table_38213_13_11_c3[index_4lsb];
temp = (uint32_t)(big_o*pow(2, scs_index)) + (uint32_t)(ssb_index*big_m);
temp = (uint32_t)(big_o*pow(2, scs_pdcch)) + (uint32_t)(ssb_index*big_m);
n_c = temp / num_slot_per_frame;
if((temp/num_slot_per_frame) & 0x1){
sfn_c = SFN_C_MOD_2_EQ_1;
@@ -317,7 +312,6 @@ const uint32_t num_slot_per_frame = 10;
search_space_duration = 2;
}
/// MUX PATTERN 2
if(mac->type0_pdcch_ss_mux_pattern == 2){
@@ -325,7 +319,7 @@ const uint32_t num_slot_per_frame = 10;
// 38.213 Table 13-13
AssertFatal(index_4lsb == 0, "38.213 Table 13-13 4 LSB out of range\n");
// PDCCH monitoring occasions (SFN and slot number) same as SSB frame-slot
sfn_c = SFN_C_EQ_SFN_SSB;
// sfn_c = SFN_C_EQ_SFN_SSB;
n_c = get_ssb_slot(ssb_index);
switch(ssb_index & 0x3){ // ssb_index(i) mod 4
case 0:
@@ -347,7 +341,7 @@ const uint32_t num_slot_per_frame = 10;
// 38.213 Table 13-14
AssertFatal(index_4lsb == 0, "38.213 Table 13-14 4 LSB out of range\n");
// PDCCH monitoring occasions (SFN and slot number) same as SSB frame-slot
sfn_c = SFN_C_EQ_SFN_SSB;
// sfn_c = SFN_C_EQ_SFN_SSB;
n_c = get_ssb_slot(ssb_index);
switch(ssb_index & 0x7){ // ssb_index(i) mod 8
case 0:
@@ -389,7 +383,7 @@ const uint32_t num_slot_per_frame = 10;
// 38.213 Table 13-15
AssertFatal(index_4lsb == 0, "38.213 Table 13-15 4 LSB out of range\n");
// PDCCH monitoring occasions (SFN and slot number) same as SSB frame-slot
sfn_c = SFN_C_EQ_SFN_SSB;
// sfn_c = SFN_C_EQ_SFN_SSB;
n_c = get_ssb_slot(ssb_index);
switch(ssb_index & 0x3){ // ssb_index(i) mod 4
case 0:
@@ -413,9 +407,11 @@ const uint32_t num_slot_per_frame = 10;
coreset_duration = num_symbols * number_of_search_space_per_slot;
mac->type0_pdcch_dci_config.number_of_candidates[2] = table_38213_10_1_1_c2[0]; // CCE aggregation level = 4
mac->type0_pdcch_dci_config.number_of_candidates[3] = table_38213_10_1_1_c2[1]; // CCE aggregation level = 8
mac->type0_pdcch_dci_config.number_of_candidates[4] = table_38213_10_1_1_c2[2]; // CCE aggregation level = 16
mac->type0_pdcch_dci_config.number_of_candidates[0] = table_38213_10_1_1_c2[0];
mac->type0_pdcch_dci_config.number_of_candidates[1] = table_38213_10_1_1_c2[1];
mac->type0_pdcch_dci_config.number_of_candidates[2] = table_38213_10_1_1_c2[2]; // CCE aggregation level = 4
mac->type0_pdcch_dci_config.number_of_candidates[3] = table_38213_10_1_1_c2[3]; // CCE aggregation level = 8
mac->type0_pdcch_dci_config.number_of_candidates[4] = table_38213_10_1_1_c2[4]; // CCE aggregation level = 16
mac->type0_pdcch_dci_config.duration = search_space_duration;
mac->type0_pdcch_dci_config.coreset.duration = coreset_duration; // coreset
mac->type0_pdcch_dci_config.monitoring_symbols_within_slot = (0x3fff << first_symbol_index) & (0x3fff >> (14-coreset_duration-first_symbol_index)) & 0x3fff;
@@ -423,7 +419,6 @@ const uint32_t num_slot_per_frame = 10;
mac->type0_pdcch_ss_sfn_c = sfn_c;
mac->type0_pdcch_ss_n_c = n_c;
// fill in the elements in config request inside P5 message
mac->phy_config.config_req.pbch_config.system_frame_number = frame; // after calculation
mac->phy_config.config_req.pbch_config.subcarrier_spacing_common = mac->mib->subCarrierSpacingCommon;
@@ -439,23 +434,15 @@ const uint32_t num_slot_per_frame = 10;
if(mac->if_module != NULL && mac->if_module->phy_config_request != NULL){
mac->if_module->phy_config_request(&mac->phy_config);
}
}
//}
return 0;
}
typedef enum seach_space_mask_e {
type0_pdcch = 0x1,
type0a_pdcch = 0x2,
type1_pdcch = 0x4,
type2_pdcch = 0x8,
type3_pdcch = 0x10
} search_space_mask_t;
// TODO: change to UE parameter, scs: 15KHz, slot duration: 1ms
#define NUM_SLOT_FRAME 10
uint32_t get_ssb_frame(){
return 0;
uint32_t get_ssb_frame(uint32_t test){
return test;
}
// Performs :
@@ -474,7 +461,7 @@ NR_UE_L2_STATE_t nr_ue_scheduler(
uint32_t search_space_mask = 0;
NR_UE_MAC_INST_t *mac = get_mac_inst(module_id);
fapi_nr_dl_config_request_t *dl_config = &mac->dl_config_request;
// check type0 from 38.213 13
if(ssb_index != -1){
@@ -482,49 +469,39 @@ NR_UE_L2_STATE_t nr_ue_scheduler(
// 38.213 chapter 13
if((mac->type0_pdcch_ss_sfn_c == SFN_C_MOD_2_EQ_0) && !(rx_frame & 0x1) && (rx_slot == mac->type0_pdcch_ss_n_c)){
search_space_mask = search_space_mask | type0_pdcch;
mac->type0_pdcch_consecutive_slots = mac->type0_pdcch_dci_config.duration;
}
if((mac->type0_pdcch_ss_sfn_c == SFN_C_MOD_2_EQ_1) && (rx_frame & 0x1) && (rx_slot == mac->type0_pdcch_ss_n_c)){
search_space_mask = search_space_mask | type0_pdcch;
}
if((mac->type0_pdcch_ss_sfn_c == SFN_C_EQ_SFN_SSB) && ( get_ssb_frame() )){
search_space_mask = search_space_mask | type0_pdcch;
mac->type0_pdcch_consecutive_slots = mac->type0_pdcch_dci_config.duration;
}
}
if(mac->type0_pdcch_ss_mux_pattern == 2){
// 38.213 Table 13-13, 13-14
if((rx_frame == get_ssb_frame()) && (rx_slot == mac->type0_pdcch_ss_n_c)){
if((rx_frame == get_ssb_frame(rx_frame)) && (rx_slot == mac->type0_pdcch_ss_n_c)){
search_space_mask = search_space_mask | type0_pdcch;
mac->type0_pdcch_consecutive_slots = mac->type0_pdcch_dci_config.duration;
}
}
if(mac->type0_pdcch_ss_mux_pattern == 3){
// 38.213 Table 13-15
if((rx_frame == get_ssb_frame()) && (rx_slot == mac->type0_pdcch_ss_n_c)){
if((rx_frame == get_ssb_frame(rx_frame)) && (rx_slot == mac->type0_pdcch_ss_n_c)){
search_space_mask = search_space_mask | type0_pdcch;
mac->type0_pdcch_consecutive_slots = mac->type0_pdcch_dci_config.duration;
}
}
}
#if 0
uint16_t rnti;
fapi_nr_dl_config_request_t *dl_config = &mac->dl_config_request;
// Type0 PDCCH search space
if((search_space_mask & type0_pdcch) || ( mac->type0_pdcch_consecutive_slots != 0 )){
mac->type0_pdcch_consecutive_slots = mac->type0_pdcch_consecutive_slots - 1;
fapi_nr_coreset_t coreset;
uint32_t duration;
uint8_t aggregation_level;
uint8_t number_of_candidates;
uint16_t monitoring_symbols_within_slot;
// DCI foramt-specific
uint8_t format_2_0_number_of_candidates[5]; // aggregation level 1, 2, 4, 8, 16
uint8_t format_2_3_monitorying_periodicity;
uint8_t format_2_3_number_of_candidates;
#endif
if(search_space_mask & type0_pdcch){
dl_config->dl_config_request_body[dl_config->number_pdus].dci_pdu.dci_config_rel15 = mac->type0_pdcch_dci_config;
//dl_config->dl_config_request_body[dl_config->number_pdus].pdu_type = ;
dl_config->dl_config_list[dl_config->number_pdus].dci_config_pdu.dci_config_rel15 = mac->type0_pdcch_dci_config;
dl_config->dl_config_list[dl_config->number_pdus].pdu_type = FAPI_NR_DL_CONFIG_TYPE_DCI;
dl_config->number_pdus = dl_config->number_pdus + 1;
dl_config->dl_config_request_body[dl_config->number_pdus].dci_pdu.dci_config_rel15.rnti = 0xaaaa; // to be set
dl_config->dl_config_list[dl_config->number_pdus].dci_config_pdu.dci_config_rel15.rnti = 0xaaaa; // to be set
}
if(search_space_mask & type0a_pdcch){
@@ -546,11 +523,330 @@ NR_UE_L2_STATE_t nr_ue_scheduler(
return CONNECTION_OK;
}
int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fapi_nr_dci_pdu_rel15_t *dci, uint16_t rnti, uint32_t dci_format){
uint32_t
ue_get_SR(module_id_t module_idP, int CC_id, frame_t frameP,
uint8_t eNB_id, uint16_t rnti, sub_frame_t subframe)
{
NR_UE_MAC_INST_t *mac = get_mac_inst(module_id);
fapi_nr_dl_config_request_t *dl_config = &mac->dl_config_request;
fapi_nr_ul_config_request_t *ul_config = &mac->ul_config_request;
const uint16_t n_RB_ULBWP = 106;
const uint16_t n_RB_DLBWP = 106;
uint32_t k_offset;
uint32_t sliv_S;
uint32_t sliv_L;
uint32_t l_RB;
uint32_t start_RB;
uint32_t tmp_RIV;
switch(dci_format){
case format0_0:
/* TIME_DOM_RESOURCE_ASSIGNMENT */
// 0, 1, 2, 3, or 4 bits as defined in:
// Subclause 6.1.2.1 of [6, TS 38.214] for formats format0_0,format0_1
// Subclause 5.1.2.1 of [6, TS 38.214] for formats format1_0,format1_1
// The bitwidth for this field is determined as log2(I) bits,
// where I the number of entries in the higher layer parameter pusch-AllocationList
k_offset = table_6_1_2_1_1_2_time_dom_res_alloc_A[dci->time_dom_resource_assignment][0];
sliv_S = table_6_1_2_1_1_2_time_dom_res_alloc_A[dci->time_dom_resource_assignment][1];
sliv_L = table_6_1_2_1_1_2_time_dom_res_alloc_A[dci->time_dom_resource_assignment][2];
/* FREQ_DOM_RESOURCE_ASSIGNMENT_UL */
// At the moment we are supporting only format 1_0 (and not format 1_1), so we only support resource allocation type 1 (and not type 0).
// For resource allocation type 1, the resource allocation field consists of a resource indication value (RIV):
// RIV = n_RB_ULBWP * (l_RB - 1) + start_RB if (l_RB - 1) <= floor (n_RB_ULBWP/2)
// RIV = n_RB_ULBWP * (n_RB_ULBWP - l_RB + 1) + (n_RB_ULBWP - 1 - start_RB) if (l_RB - 1) > floor (n_RB_ULBWP/2)
// the following two expressions apply only if (l_RB - 1) <= floor (n_RB_ULBWP/2)
l_RB = floor(dci->freq_dom_resource_assignment_DL/n_RB_ULBWP) + 1;
start_RB = dci->freq_dom_resource_assignment_DL%n_RB_ULBWP;
// if (l_RB - 1) > floor (n_RB_ULBWP/2) we need to recalculate them using the following lines
tmp_RIV = n_RB_ULBWP * (l_RB - 1) + start_RB;
if (tmp_RIV != dci->freq_dom_resource_assignment_DL) { // then (l_RB - 1) > floor (n_RB_ULBWP/2) and we need to recalculate l_RB and start_RB
l_RB = n_RB_ULBWP - l_RB + 2;
start_RB = n_RB_ULBWP - start_RB - 1;
}
// UL_CONFIG_REQ
ul_config->ul_config_list[ul_config->number_pdus].pdu_type = FAPI_NR_UL_CONFIG_TYPE_PUSCH;
ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.rnti = rnti;
fapi_nr_ul_config_pusch_pdu_rel15_t *ulsch_config_pdu = &ul_config->ul_config_list[ul_config->number_pdus].ulsch_config_pdu.ulsch_pdu_rel15;
ulsch_config_pdu->number_rbs = l_RB;
ulsch_config_pdu->start_rb = start_RB;
ulsch_config_pdu->number_symbols = sliv_L;
ulsch_config_pdu->start_symbol = sliv_S;
ulsch_config_pdu->mcs = dci->mcs;
//ulsch0->harq_processes[dci->harq_process_number]->first_rb = start_RB;
//ulsch0->harq_processes[dci->harq_process_number]->nb_rb = l_RB;
//ulsch0->harq_processes[dci->harq_process_number]->mcs = dci->mcs;
//ulsch0->harq_processes[nr_pdci_info_extracted->harq_process_number]->DCINdi= nr_pdci_info_extracted->ndi;
break;
case format0_1:
break;
case format1_0:
/* TIME_DOM_RESOURCE_ASSIGNMENT */
// Subclause 5.1.2.1 of [6, TS 38.214]
// the Time domain resource assignment field of the DCI provides a row index of a higher layer configured table pdsch-symbolAllocation
// FIXME! To clarify which parameters to update after reception of row index
k_offset = table_5_1_2_1_1_2_time_dom_res_alloc_A[dci->time_dom_resource_assignment][0];
sliv_S = table_5_1_2_1_1_2_time_dom_res_alloc_A[dci->time_dom_resource_assignment][1];
sliv_L = table_5_1_2_1_1_2_time_dom_res_alloc_A[dci->time_dom_resource_assignment][2];
/* FREQ_DOM_RESOURCE_ASSIGNMENT_DL */
// only uplink resource allocation type 1
// At the moment we are supporting only format 0_0 (and not format 0_1), so we only support resource allocation type 1 (and not type 0).
// For resource allocation type 1, the resource allocation field consists of a resource indication value (RIV):
// RIV = n_RB_DLBWP * (l_RB - 1) + start_RB if (l_RB - 1) <= floor (n_RB_DLBWP/2)
// RIV = n_RB_DLBWP * (n_RB_DLBWP - l_RB + 1) + (n_RB_DLBWP - 1 - start_RB) if (l_RB - 1) > floor (n_RB_DLBWP/2)
// the following two expressions apply only if (l_RB - 1) <= floor (n_RB_DLBWP/2)
l_RB = floor(dci->freq_dom_resource_assignment_DL/n_RB_DLBWP) + 1;
start_RB = dci->freq_dom_resource_assignment_DL%n_RB_DLBWP;
// if (l_RB - 1) > floor (n_RB_DLBWP/2) we need to recalculate them using the following lines
tmp_RIV = n_RB_DLBWP * (l_RB - 1) + start_RB;
if (tmp_RIV != dci->freq_dom_resource_assignment_DL) { // then (l_RB - 1) > floor (n_RB_DLBWP/2) and we need to recalculate l_RB and start_RB
l_RB = n_RB_DLBWP - l_RB + 2;
start_RB = n_RB_DLBWP - start_RB - 1;
}
// DL_CONFIG_REQ
dl_config->dl_config_list[dl_config->number_pdus].pdu_type = FAPI_NR_DL_CONFIG_TYPE_DLSCH;
dl_config->dl_config_list[dl_config->number_pdus].dlsch_config_pdu.rnti = rnti;
fapi_nr_dl_config_dlsch_pdu_rel15_t *dlsch_config_pdu = &dl_config->dl_config_list[dl_config->number_pdus].dlsch_config_pdu.dlsch_config_rel15;
dlsch_config_pdu->number_rbs = l_RB;
dlsch_config_pdu->start_rb = start_RB;
dlsch_config_pdu->number_symbols = sliv_L;
dlsch_config_pdu->start_symbol = sliv_S;
dlsch_config_pdu->mcs = dci->mcs;
dlsch_config_pdu->ndi = dci->ndi;
dlsch_config_pdu->harq_pid = dci->harq_process_number;
dl_config->number_pdus = dl_config->number_pdus + 1;
break;
case format1_1:
break;
case format2_0:
break;
case format2_1:
break;
case format2_2:
break;
case format2_3:
break;
default:
break;
}
if(rnti == SI_RNTI){
}else if(rnti == mac->ra_rnti){
}else if(rnti == P_RNTI){
}else{ // c-rnti
/// check if this is pdcch order
//dci->random_access_preamble_index;
//dci->ss_pbch_index;
//dci->prach_mask_index;
/// else normal DL-SCH grant
}
}
int8_t nr_ue_get_SR(module_id_t module_idP, int CC_id, frame_t frameP, uint8_t eNB_id, uint16_t rnti, sub_frame_t subframe){
return 0;
}
}
void nr_ue_process_mac_pdu(
module_id_t module_idP,
uint8_t CC_id,
uint8_t *pduP,
uint16_t mac_pdu_len,
uint8_t eNB_index){
uint8_t *pdu_ptr = pduP;
uint16_t pdu_len = mac_pdu_len;
uint16_t mac_ce_len;
uint16_t mac_subheader_len;
uint16_t mac_sdu_len;
// For both DL/UL-SCH
// Except:
// - UL/DL-SCH: fixed-size MAC CE(known by LCID)
// - UL/DL-SCH: padding
// - UL-SCH: MSG3 48-bits
// |0|1|2|3|4|5|6|7| bit-wise
// |R|F| LCID |
// | L |
// |0|1|2|3|4|5|6|7| bit-wise
// |R|F| LCID |
// | L |
// | L |
// For both DL/UL-SCH
// For:
// - UL/DL-SCH: fixed-size MAC CE(known by LCID)
// - UL/DL-SCH: padding, for single/multiple 1-oct padding CE(s)
// - UL-SCH: MSG3 48-bits
// |0|1|2|3|4|5|6|7| bit-wise
// |R|R| LCID |
// LCID: The Logical Channel ID field identifies the logical channel instance of the corresponding MAC SDU or the type of the corresponding MAC CE or padding as described in Tables 6.2.1-1 and 6.2.1-2 for the DL-SCH and UL-SCH respectively. There is one LCID field per MAC subheader. The LCID field size is 6 bits;
// L: The Length field indicates the length of the corresponding MAC SDU or variable-sized MAC CE in bytes. There is one L field per MAC subheader except for subheaders corresponding to fixed-sized MAC CEs and padding. The size of the L field is indicated by the F field;
// F: lenght of L is 0:8 or 1:16 bits wide
// R: Reserved bit, set to zero.
uint8_t done = 0;
while (!done || pdu_len <= 0){
mac_ce_len = 0x0000;
mac_subheader_len = 0x0001; // default to fixed-length subheader = 1-oct
mac_sdu_len = 0x0000;
switch(((NR_MAC_SUBHEADER_FIXED *)pdu_ptr)->LCID){
// MAC CE
case DL_SCH_LCID_CCCH:
// MSG4 RRC Connection Setup 38.331
// varialbe length
mac_ce_len |= (uint16_t)((NR_MAC_SUBHEADER_SHORT *)pdu_ptr)->L;
mac_subheader_len = 2;
if(((NR_MAC_SUBHEADER_SHORT *)pdu_ptr)->F){
mac_ce_len |= (uint16_t)(((NR_MAC_SUBHEADER_LONG *)pdu_ptr)->L2)<<8;
mac_subheader_len = 3;
}
break;
case DL_SCH_LCID_TCI_STATE_ACT_UE_SPEC_PDSCH:
// 38.321 Ch6.1.3.14
// varialbe length
mac_ce_len |= (uint16_t)((NR_MAC_SUBHEADER_SHORT *)pdu_ptr)->L;
mac_subheader_len = 2;
if(((NR_MAC_SUBHEADER_SHORT *)pdu_ptr)->F){
mac_ce_len |= (uint16_t)(((NR_MAC_SUBHEADER_LONG *)pdu_ptr)->L2)<<8;
mac_subheader_len = 3;
}
break;
case DL_SCH_LCID_APERIODIC_CSI_TRI_STATE_SUBSEL:
// 38.321 Ch6.1.3.13
// varialbe length
mac_ce_len |= (uint16_t)((NR_MAC_SUBHEADER_SHORT *)pdu_ptr)->L;
mac_subheader_len = 2;
if(((NR_MAC_SUBHEADER_SHORT *)pdu_ptr)->F){
mac_ce_len |= (uint16_t)(((NR_MAC_SUBHEADER_LONG *)pdu_ptr)->L2)<<8;
mac_subheader_len = 3;
}
break;
case DL_SCH_LCID_SP_CSI_RS_CSI_IM_RES_SET_ACT:
// 38.321 Ch6.1.3.12
// varialbe length
mac_ce_len |= (uint16_t)((NR_MAC_SUBHEADER_SHORT *)pdu_ptr)->L;
mac_subheader_len = 2;
if(((NR_MAC_SUBHEADER_SHORT *)pdu_ptr)->F){
mac_ce_len |= (uint16_t)(((NR_MAC_SUBHEADER_LONG *)pdu_ptr)->L2)<<8;
mac_subheader_len = 3;
}
break;
case DL_SCH_LCID_SP_SRS_ACTIVATION:
// 38.321 Ch6.1.3.17
// varialbe length
mac_ce_len |= (uint16_t)((NR_MAC_SUBHEADER_SHORT *)pdu_ptr)->L;
mac_subheader_len = 2;
if(((NR_MAC_SUBHEADER_SHORT *)pdu_ptr)->F){
mac_ce_len |= (uint16_t)(((NR_MAC_SUBHEADER_LONG *)pdu_ptr)->L2)<<8;
mac_subheader_len = 3;
}
break;
case DL_SCH_LCID_RECOMMENDED_BITRATE:
// 38.321 Ch6.1.3.20
mac_ce_len = 2;
break;
case DL_SCH_LCID_SP_ZP_CSI_RS_RES_SET_ACT:
// 38.321 Ch6.1.3.19
mac_ce_len = 2;
break;
case DL_SCH_LCID_PUCCH_SPATIAL_RELATION_ACT:
// 38.321 Ch6.1.3.18
mac_ce_len = 3;
break;
case DL_SCH_LCID_SP_CSI_REP_PUCCH_ACT:
// 38.321 Ch6.1.3.16
mac_ce_len = 2;
break;
case DL_SCH_LCID_TCI_STATE_IND_UE_SPEC_PDCCH:
// 38.321 Ch6.1.3.15
mac_ce_len = 2;
break;
case DL_SCH_LCID_DUPLICATION_ACT:
// 38.321 Ch6.1.3.11
mac_ce_len = 1;
break;
case DL_SCH_LCID_SCell_ACT_4_OCT:
// 38.321 Ch6.1.3.10
mac_ce_len = 4;
break;
case DL_SCH_LCID_SCell_ACT_1_OCT:
// 38.321 Ch6.1.3.10
mac_ce_len = 1;
break;
case DL_SCH_LCID_L_DRX:
// 38.321 Ch6.1.3.6
// fixed length but not yet specify.
mac_ce_len = 0;
break;
case DL_SCH_LCID_DRX:
// 38.321 Ch6.1.3.5
// fixed length but not yet specify.
mac_ce_len = 0;
break;
case DL_SCH_LCID_TA_COMMAND:
// 38.321 Ch6.1.3.4
mac_ce_len = 1;
break;
case DL_SCH_LCID_CON_RES_ID:
// 38.321 Ch6.1.3.3
mac_ce_len = 6;
break;
case DL_SCH_LCID_PADDING:
done = 1;
// end of MAC PDU, can ignore the rest.
break;
// MAC SDU
case DL_SCH_LCID_SRB1:
// check if LCID is valid at current time.
case UL_SCH_LCID_SRB2:
// check if LCID is valid at current time.
case UL_SCH_LCID_SRB3:
// check if LCID is valid at current time.
default:
// check if LCID is valid at current time.
mac_sdu_len |= (uint16_t)((NR_MAC_SUBHEADER_SHORT *)pdu_ptr)->L;
mac_subheader_len = 2;
if(((NR_MAC_SUBHEADER_SHORT *)pdu_ptr)->F){
mac_sdu_len |= (uint16_t)(((NR_MAC_SUBHEADER_LONG *)pdu_ptr)->L2)<<8;
mac_subheader_len = 3;
}
// DRB LCID by RRC
break;
}
pdu_ptr += ( mac_subheader_len + mac_ce_len + mac_sdu_len );
pdu_len -= ( mac_subheader_len + mac_ce_len + mac_sdu_len );
AssertFatal(pdu_len >= 0, "[MAC] nr_ue_process_mac_pdu, residual mac pdu length < 0!\n");
}
}
openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c
Executable → Regular
+99 -21
View File
@@ -32,6 +32,7 @@
#include "NR_IF_Module.h"
#include "mac_proto.h"
#include "assertions.h"
#include <stdio.h>
@@ -39,27 +40,30 @@
static nr_ue_if_module_t *nr_ue_if_module_inst[MAX_IF_MODULES];
// L2 Abstraction Layer
int8_t handle_bcch_bch(module_id_t module_id, int cc_id, uint8_t gNB_index, uint8_t *pduP, uint8_t additional_bits, uint32_t ssb_index, uint32_t ssb_length, uint16_t cell_id){
int8_t handle_bcch_bch(uint8_t *pduP, uint8_t additional_bits, uint32_t ssb_index, uint32_t l_ssb){
// pdu_len = 4, 32bits
//uint8_t extra_bits = pduP[0];
nr_ue_decode_mib( (module_id_t)0,
0,
0,
additional_bits,
l_ssb, // Lssb = 64 is not support
ssb_index,
&pduP[1] );
return nr_ue_decode_mib( module_id,
cc_id,
gNB_index,
additional_bits,
ssb_length, // Lssb = 64 is not support
ssb_index,
pduP,
cell_id);
}
// L2 Abstraction Layer
int8_t handle_bcch_dlsch(module_id_t module_id, int cc_id, uint8_t gNB_index, uint32_t sibs_mask, uint8_t *pduP, uint32_t pdu_len){
return 0;
}
// L2 Abstraction Layer
int8_t handle_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fapi_nr_dci_pdu_rel15_t *dci, uint16_t rnti, uint32_t dci_type){
int8_t handle_bcch_dlsch(uint32_t pdu_len, uint8_t *pduP){
return nr_ue_process_dci(module_id, cc_id, gNB_index, dci, rnti, dci_type);
return 0;
}
int8_t nr_ue_ul_indication(nr_uplink_indication_t *ul_info){
@@ -68,6 +72,12 @@ int8_t nr_ue_ul_indication(nr_uplink_indication_t *ul_info){
module_id_t module_id = ul_info->module_id;
NR_UE_MAC_INST_t *mac = get_mac_inst(module_id);
// clean previous FAPI messages
mac->tx_request.number_of_pdus = 0;
mac->ul_config_request.number_pdus = 0;
mac->dl_config_request.number_pdus = 0;
// clean previous FAPI messages
ret = nr_ue_scheduler(
ul_info->module_id,
ul_info->gNB_index,
@@ -99,6 +109,7 @@ int8_t nr_ue_ul_indication(nr_uplink_indication_t *ul_info){
int8_t nr_ue_dl_indication(nr_downlink_indication_t *dl_info){
int32_t i;
uint32_t ret_mask = 0x0;
module_id_t module_id = dl_info->module_id;
NR_UE_MAC_INST_t *mac = get_mac_inst(module_id);
@@ -107,31 +118,98 @@ int8_t nr_ue_dl_indication(nr_downlink_indication_t *dl_info){
if(dl_info->rx_ind != NULL){
printf("[L2][IF MODULE][DL INDICATION][RX_IND]\n");
for(i=0; i<dl_info->rx_ind->number_pdus; ++i){
switch(dl_info->rx_ind->rx_request_body[i].pdu_type){
switch(dl_info->rx_ind->rx_indication_body[i].pdu_type){
case FAPI_NR_RX_PDU_TYPE_MIB:
handle_bcch_bch(dl_info->rx_ind->rx_request_body[i].mib_pdu.pdu, dl_info->rx_ind->rx_request_body[i].mib_pdu.additional_bits, dl_info->rx_ind->rx_request_body[i].mib_pdu.ssb_index, dl_info->rx_ind->rx_request_body[i].mib_pdu.l_ssb);
ret_mask |= (handle_bcch_bch(dl_info->module_id, dl_info->cc_id, dl_info->gNB_index,
(dl_info->rx_ind->rx_indication_body+i)->mib_pdu.pdu,
(dl_info->rx_ind->rx_indication_body+i)->mib_pdu.additional_bits,
(dl_info->rx_ind->rx_indication_body+i)->mib_pdu.ssb_index,
(dl_info->rx_ind->rx_indication_body+i)->mib_pdu.ssb_length,
(dl_info->rx_ind->rx_indication_body+i)->mib_pdu.cell_id )) << FAPI_NR_RX_PDU_TYPE_MIB;
break;
case FAPI_NR_RX_PDU_TYPE_SIB:
ret_mask |= (handle_bcch_dlsch(dl_info->module_id, dl_info->cc_id, dl_info->gNB_index,
(dl_info->rx_ind->rx_indication_body+i)->sib_pdu.sibs_mask,
(dl_info->rx_ind->rx_indication_body+i)->sib_pdu.pdu,
(dl_info->rx_ind->rx_indication_body+i)->sib_pdu.pdu_length )) << FAPI_NR_RX_PDU_TYPE_SIB;
break;
case FAPI_NR_RX_PDU_TYPE_DLSCH:
ret_mask |= (0) << FAPI_NR_RX_PDU_TYPE_DLSCH;
break;
default:
break;
}
}
}
if(dl_info->dci_ind != NULL){
printf("[L2][IF MODULE][DL INDICATION][DCI_IND]\n");
for(i=0; dl_info->dci_ind->number_of_dcis; ++i){
fapi_nr_dci_pdu_rel15_t *dci = &dl_info->dci_ind->dci_list[i].dci;
ret_mask |= (handle_dci(
dl_info->module_id,
dl_info->cc_id,
dl_info->gNB_index,
dci,
(dl_info->dci_ind->dci_list+i)->rnti,
(dl_info->dci_ind->dci_list+i)->dci_format)) << FAPI_NR_DCI_IND;
/*switch((dl_info->dci_ind->dci_list+i)->dci_type){
case FAPI_NR_DCI_TYPE_0_0:
case FAPI_NR_DCI_TYPE_0_1:
case FAPI_NR_DCI_TYPE_1_1:
case FAPI_NR_DCI_TYPE_2_0:
case FAPI_NR_DCI_TYPE_2_1:
case FAPI_NR_DCI_TYPE_2_2:
case FAPI_NR_DCI_TYPE_2_3:
AssertFatal(1==0, "Not yet support at this moment!\n");
break;
case FAPI_NR_DCI_TYPE_1_0:
dl_config->dl_config_list[dl_config->number_pdus].pdu_type = FAPI_NR_DL_CONFIG_TYPE_DLSCH;
// mapping into DL_CONFIG_REQ for DL-SCH
fapi_nr_dl_config_dlsch_pdu_rel15_t *dlsch_config_pdu = &dl_config->dl_config_list[dl_config->number_pdus].dlsch_config_pdu.dlsch_config_rel15;
dl_config->dl_config_list[dl_config->number_pdus].dlsch_config_pdu.rnti = 0x0000; // TX RNTI: UE-spec
memcpy(dlsch_config_pdu, dci, sizeof(fapi_nr_dci_pdu_rel15_t));
dl_config->number_pdus = dl_config->number_pdus + 1;
ret_mask |= (handle_dci(
dl_info->module_id,
dl_info->cc_id,
dl_info->gNB_index,
dci,
(dl_info->dci_ind->dci_list+i)->rnti,
(dl_info->dci_ind->dci_list+i)->dci_type)) << FAPI_NR_DCI_IND;
break;
default:
break;
}*/
//(dl_info->dci_list+i)->rnti
}
}
if(nr_ue_if_module_inst[module_id] != NULL){
nr_ue_if_module_inst[module_id]->scheduled_response(&mac->scheduled_response);
}
AssertFatal( nr_ue_if_module_inst[module_id] != NULL, "IF module is void!\n" );
nr_ue_if_module_inst[module_id]->scheduled_response(&mac->scheduled_response);
return 0;
}
openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.h
+12 -8
View File
@@ -41,6 +41,8 @@
typedef struct {
/// module id
module_id_t module_id;
/// gNB index
uint32_t gNB_index;
/// component carrier id
int cc_id;
/// frame
@@ -179,20 +181,22 @@ int8_t nr_ue_if_module_kill(uint32_t module_id);
\param dl_info including dci_ind and rx_request messages*/
int8_t nr_ue_dl_indication(nr_downlink_indication_t *dl_info);
// TODO check
/**\brief handle BCCH-BCH message from dl_indication
\param
\param
\param
\param */
int8_t handle_bcch_bch(uint8_t *pduP, uint8_t additional_bits, uint32_t ssb_index, uint32_t l_ssb);
\param pduP pointer to bch pdu
\param additional_bits corresponding to 38.212 ch.7
\param ssb_index SSB index within 0 - (L_ssb-1) corresponding to 38.331 ch.13 parameter i
\param ssb_length corresponding to L1 parameter L_ssb
\param cell_id cell id */
int8_t handle_bcch_bch(module_id_t module_id, int cc_id, uint8_t gNB_index, uint8_t *pduP, uint8_t additional_bits, uint32_t ssb_index, uint32_t ssb_length, uint16_t cell_id);
// TODO check
/**\brief handle BCCH-DL-SCH message from dl_indication
\param pdu_len length(bytes) of pdu
\param pduP pointer to pdu*/
int8_t handle_bcch_dlsch(uint32_t pdu_len, uint8_t *pduP);
int8_t handle_bcch_dlsch(module_id_t module_id, int cc_id, uint8_t gNB_index, uint32_t sibs_mask, uint8_t *pduP, uint32_t pdu_len);
int8_t handle_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fapi_nr_dci_pdu_rel15_t *dci, uint16_t rnti, uint32_t dci_type);
#endif
targets/RT/USER/nr-ue.c
+120 -45
View File
@@ -42,6 +42,8 @@
#include "fapi_nr_ue_l1.h"
#include "PHY/phy_extern_nr_ue.h"
#include "PHY/INIT/phy_init.h"
#include "PHY/MODULATION/modulation_UE.h"
#include "LAYER2/NR_MAC_UE/mac_proto.h"
#include "RRC/NR_UE/rrc_proto.h"
@@ -65,6 +67,69 @@ extern double cpuf;
static nfapi_nr_config_request_t config_t;
static nfapi_nr_config_request_t* config =&config_t;
/*
* NR SLOT PROCESSING SEQUENCE
*
* Processing occurs with following steps for connected mode:
*
* - Rx samples for a slot are received,
* - PDCCH processing (including DCI extraction for downlink and uplink),
* - PDSCH processing (including transport blocks decoding),
* - PUCCH/PUSCH (transmission of acknowledgements, CSI, ... or data).
*
* Time between reception of the slot and related transmission depends on UE processing performance.
* It is defined by the value NR_UE_CAPABILITY_SLOT_RX_TO_TX.
*
* In NR, network gives the duration between Rx slot and Tx slot in the DCI:
* - for reception of a PDSCH and its associated acknowledgment slot (with a PUCCH or a PUSCH),
* - for reception of an uplink grant and its associated PUSCH slot.
*
* So duration between reception and it associated transmission depends on its transmission slot given in the DCI.
* NR_UE_CAPABILITY_SLOT_RX_TO_TX means the minimum duration but higher duration can be given by the network because UE can support it.
*
* Slot k
* -------+------------+--------
* Frame | Tx samples |
* Subframe | buffer |
* Slot n -------+------------+--------
* ------ +------------+-------- |
* | Rx samples | |
* | buffer | |
* -------+------------+-------- |
* | |
* V |
* +------------+ |
* | PDCCH | |
* | processing | |
* +------------+ |
* | | |
* | v |
* | +------------+ |
* | | PDSCH | |
* | | processing | decoding result |
* | +------------+ -> ACK/NACK of PDSCH |
* | | |
* | v |
* | +-------------+------------+ |
* | | PUCCH/PUSCH | Tx samples | |
* | | processing | transfer | |
* | +-------------+------------+ |
* | |
* |/___________________________________________________________\|
* \ duration between reception and associated transmission /
*
* Remark: processing is done slot by slot, it can be distribute on different threads which are executed in parallel.
* This is an architecture optimization in order to cope with real time constraints.
* By example, for LTE, subframe processing is spread over 4 different threads.
*
*/
#ifndef NO_RAT_NR
#define DURATION_RX_TO_TX (NR_UE_CAPABILITY_SLOT_RX_TO_TX) /* for NR this will certainly depends to such UE capability which is not yet defined */
#else
#define DURATION_RX_TO_TX (4) /* For LTE, this duration is fixed to 4 and it is linked to LTE standard for both modes FDD/TDD */
#endif
#define FRAME_PERIOD 100000000ULL
#define DAQ_PERIOD 66667ULL
#define FIFO_PRIORITY 40
@@ -331,7 +396,7 @@ static void *UE_thread_synch(void *arg) {
switch (sync_mode) {
case pss:
LOG_I(PHY,"[SCHED][UE] Scanning band %d (%d), freq %u\n",bands_to_scan.band_info[current_band].band, current_band,bands_to_scan.band_info[current_band].dl_min+current_offset);
lte_sync_timefreq(UE,current_band,bands_to_scan.band_info[current_band].dl_min+current_offset);
//lte_sync_timefreq(UE,current_band,bands_to_scan.band_info[current_band].dl_min+current_offset);
current_offset += 20000000; // increase by 20 MHz
if (current_offset > bands_to_scan.band_info[current_band].dl_max-bands_to_scan.band_info[current_band].dl_min) {
@@ -425,7 +490,7 @@ static void *UE_thread_synch(void *arg) {
//UE->rfdevice.trx_set_gains_func(&openair0,&openair0_cfg[0]);
//UE->rfdevice.trx_stop_func(&UE->rfdevice);
// sleep(1);
nr_init_frame_parms_ue(config,&UE->frame_parms);
nr_init_frame_parms_ue(&UE->frame_parms);
/*if (UE->rfdevice.trx_start_func(&UE->rfdevice) != 0 ) {
LOG_E(HW,"Could not start the device\n");
oai_exit=1;
@@ -582,39 +647,18 @@ static void *UE_thread_rxn_txnp4(void *arg) {
pickTime(current);
// updateTimes(proc->gotIQs, &t2, 10000, "Delay to wake up UE_Thread_Rx (case 2)");
#ifndef NO_RAT_NR
// Process Rx data for one sub-frame
nr_slot_t nr_slot ; //= slot_select_nr(&UE->frame_parms, proc->frame_tx, proc->nr_tti_tx);
if (slot_select_nr(&UE->frame_parms, proc->frame_tx, proc->nr_tti_tx) & NR_DOWNLINK_SLOT) {
if (nr_slot == NR_TDD_DOWNLINK_SLOT) {
#else
// Process Rx data for one sub-frame
lte_subframe_t sf_type = subframe_select( &UE->frame_parms, proc->subframe_rx);
if ((sf_type == SF_DL) ||
(UE->frame_parms.frame_type == FDD) ||
(sf_type == SF_S)) {
//clean previous FAPI MESSAGE
UE->rx_ind.number_pdus = 0;
UE->dci_ind.number_of_dcis = 0;
//clean previous FAPI MESSAGE
if (UE->frame_parms.frame_type == TDD) {
LOG_D(PHY, "%s,TDD%d,%s: calling UE_RX\n",
threadname,
UE->frame_parms.tdd_config,
(sf_type==SF_DL? "SF_DL" :
(sf_type==SF_UL? "SF_UL" :
(sf_type==SF_S ? "SF_S" : "UNKNOWN_SF_TYPE"))));
} else {
LOG_D(PHY, "%s,%s,%s: calling UE_RX\n",
threadname,
(UE->frame_parms.frame_type==FDD? "FDD":
(UE->frame_parms.frame_type==TDD? "TDD":"UNKNOWN_DUPLEX_MODE")),
(sf_type==SF_DL? "SF_DL" :
(sf_type==SF_UL? "SF_UL" :
(sf_type==SF_S ? "SF_S" : "UNKNOWN_SF_TYPE"))));
}
#endif
#ifdef UE_SLOT_PARALLELISATION
phy_procedures_slot_parallelization_UE_RX( UE, proc, 0, 0, 1, UE->mode, no_relay, NULL );
#else
phy_procedures_UE_RX( UE, proc, 0, 0, 1, UE->mode, no_relay, NULL );
phy_procedures_nrUE_RX( UE, proc, 0, 0, 1, UE->mode, no_relay, NULL );
#endif
}
@@ -630,7 +674,8 @@ static void *UE_thread_rxn_txnp4(void *arg) {
UE->ul_indication.module_id = 0;
UE->ul_indication.gNB_index = 0;
UE->ul_indication.cc_id = 0;
UE->ul_indication.slot = 0; // to be fill
UE->ul_indication.frame = 0; // to be fill
// [TODO] mapping right after NR initial sync
//UE->ul_indication.frame = ;
//UE->ul_indication.slot = ;
@@ -692,17 +737,22 @@ static void *UE_thread_rxn_txnp4(void *arg) {
// Prepare the future Tx data
#if 0
#ifndef NO_RAT_NR
if (slot_select_nr(&UE->frame_parms, proc->frame_tx, proc->nr_tti_tx) & NR_UPLINK_SLOT)
#else
if ((subframe_select( &UE->frame_parms, proc->subframe_tx) == SF_UL) ||
(UE->frame_parms.frame_type == FDD) )
#endif
if (UE->mode != loop_through_memory)
phy_procedures_UE_TX(UE,proc,0,0,UE->mode,no_relay);
#endif
#if 0
if ((subframe_select( &UE->frame_parms, proc->subframe_tx) == SF_S) &&
(UE->frame_parms.frame_type == TDD))
if (UE->mode != loop_through_memory)
//phy_procedures_UE_S_TX(UE,0,0,no_relay);
updateTimes(current, &t3, 10000, timing_proc_name);
#endif
if (pthread_mutex_lock(&proc->mutex_rxtx) != 0) {
LOG_E( PHY, "[SCHED][UE] error locking mutex for UE RXTX\n" );
@@ -806,7 +856,7 @@ void *UE_thread(void *arg) {
if (UE->mode != loop_through_memory) {
for (int i=0; i<UE->frame_parms.nb_antennas_rx; i++)
rxp[i] = (void*)&dummy_rx[i][0];
for (int sf=0; sf<10; sf++)
for (int sf=0; sf<LTE_NUMBER_OF_SUBFRAMES_PER_FRAME; sf++)
// printf("Reading dummy sf %d\n",sf);
UE->rfdevice.trx_read_func(&UE->rfdevice,
&timestamp,
@@ -823,13 +873,28 @@ void *UE_thread(void *arg) {
start_rx_stream=1;
if (UE->mode != loop_through_memory) {
if (UE->no_timing_correction==0) {
LOG_I(PHY,"Resynchronizing RX by %d samples (mode = %d)\n",UE->rx_offset,UE->mode);
printf("before resync\n");
//nr_slot_fep(UE,0, 0, UE->rx_offset, 1, 1, NR_PDCCH_EST);
//nr_slot_fep(UE,1, 0, UE->rx_offset, 1, 1, NR_PDCCH_EST);
//write_output("txdata_pre.m", "txdata_pre", UE->common_vars.rxdata[0], UE->frame_parms.samples_per_subframe*10, 1, 1);
/*LOG_I(PHY,"Resynchronizing RX by %d samples (mode = %d)\n",UE->rx_offset,UE->mode);
AssertFatal(UE->rx_offset ==
UE->rfdevice.trx_read_func(&UE->rfdevice,
&timestamp,
(void**)UE->common_vars.rxdata,
UE->rx_offset,
UE->frame_parms.nb_antennas_rx),"");
AssertFatal(UE->frame_parms.samples_per_subframe*10 ==
UE->rfdevice.trx_read_func(&UE->rfdevice,
&timestamp,
(void**)UE->common_vars.rxdata,
UE->frame_parms.samples_per_subframe*10,
UE->frame_parms.nb_antennas_rx),"");*/
//write_output("txdataF_ue.m", "txdataF_ue", UE->common_vars.rxdata[0], UE->frame_parms.samples_per_subframe*10, 1, 1);
}
UE->rx_offset=0;
UE->time_sync_cell=0;
@@ -838,6 +903,8 @@ void *UE_thread(void *arg) {
for (th_id=0; th_id < RX_NB_TH; th_id++) {
UE->proc.proc_rxtx[th_id].frame_rx++;
}
//printf("first stream frame rx %d\n",UE->proc.proc_rxtx[0].frame_rx);
// read in first symbol
AssertFatal (UE->frame_parms.ofdm_symbol_size+UE->frame_parms.nb_prefix_samples0 ==
@@ -846,14 +913,16 @@ void *UE_thread(void *arg) {
(void**)UE->common_vars.rxdata,
UE->frame_parms.ofdm_symbol_size+UE->frame_parms.nb_prefix_samples0,
UE->frame_parms.nb_antennas_rx),"");
nr_slot_fep(UE,0, 0, 0, 0, 0, NR_PBCH_EST);
//write_output("txdata_sym.m", "txdata_sym", UE->common_vars.rxdata[0], (UE->frame_parms.ofdm_symbol_size+UE->frame_parms.nb_prefix_samples0), 1, 1);
//nr_slot_fep(UE,0, 0, 0, 1, 1, NR_PDCCH_EST);
} //UE->mode != loop_through_memory
else
rt_sleep_ns(1000*1000);
} else {
tti_nr++;
tti_nr%=10*UE->frame_parms.ttis_per_subframe;
int ttis_per_frame = LTE_NUMBER_OF_SUBFRAMES_PER_FRAME*UE->frame_parms.ttis_per_subframe;
tti_nr %= ttis_per_frame;
UE_nr_rxtx_proc_t *proc = &UE->proc.proc_rxtx[thread_idx];
// update thread index for received subframe
UE->current_thread_id[tti_nr] = thread_idx;
@@ -874,7 +943,7 @@ void *UE_thread(void *arg) {
txp[i] = (void*)&UE->common_vars.txdata[i][((tti_nr+2)%10*UE->frame_parms.ttis_per_subframe)*UE->frame_parms.samples_per_tti];
int readBlockSize, writeBlockSize;
if (tti_nr<(10*UE->frame_parms.ttis_per_subframe-1)) {
if (tti_nr<(ttis_per_frame - 1)) {
readBlockSize=UE->frame_parms.samples_per_tti;
writeBlockSize=UE->frame_parms.samples_per_tti;
} else {
@@ -897,7 +966,7 @@ void *UE_thread(void *arg) {
UE->rx_offset_diff;
}
AssertFatal(readBlockSize ==
/*AssertFatal(readBlockSize ==
UE->rfdevice.trx_read_func(&UE->rfdevice,
&timestamp,
rxp,
@@ -912,17 +981,17 @@ void *UE_thread(void *arg) {
txp,
writeBlockSize,
UE->frame_parms.nb_antennas_tx,
1),"");
if( tti_nr==(10*UE->frame_parms.ttis_per_subframe-1)) {
1),"");*/
if( tti_nr==(ttis_per_frame-1)) {
// read in first symbol of next frame and adjust for timing drift
int first_symbols=writeBlockSize-readBlockSize;
if ( first_symbols > 0 )
AssertFatal(first_symbols ==
/*AssertFatal(first_symbols ==
UE->rfdevice.trx_read_func(&UE->rfdevice,
&timestamp1,
(void**)UE->common_vars.rxdata,
first_symbols,
UE->frame_parms.nb_antennas_rx),"");
UE->frame_parms.nb_antennas_rx),"");*/
if ( first_symbols <0 )
LOG_E(PHY,"can't compensate: diff =%d\n", first_symbols);
}
@@ -950,13 +1019,19 @@ void *UE_thread(void *arg) {
for (th_id=0; th_id < RX_NB_TH; th_id++) {
UE->proc.proc_rxtx[th_id].gotIQs=readTime(gotIQs);
}
proc->nr_tti_rx=tti_nr;
proc->nr_tti_tx=(tti_nr+4)%(10*UE->frame_parms.ttis_per_subframe);
proc->subframe_rx=tti_nr>>((uint8_t)(log2 (UE->frame_parms.ttis_per_subframe)));
proc->frame_tx = proc->frame_rx + (proc->subframe_rx>5?1:0);
proc->frame_tx = proc->frame_rx;
proc->nr_tti_tx= tti_nr + DURATION_RX_TO_TX;
if (proc->nr_tti_tx > ttis_per_frame) {
proc->frame_tx = (proc->frame_tx + 1)%MAX_FRAME_NUMBER;
proc->nr_tti_tx %= ttis_per_frame;
}
proc->subframe_tx=(proc->nr_tti_tx)>>((uint8_t)(log2 (UE->frame_parms.ttis_per_subframe)));
proc->timestamp_tx = timestamp+
(4*UE->frame_parms.samples_per_tti)-
(DURATION_RX_TO_TX*UE->frame_parms.samples_per_tti)-
UE->frame_parms.ofdm_symbol_size-UE->frame_parms.nb_prefix_samples0;
proc->instance_cnt_rxtx++;
@@ -1097,7 +1172,7 @@ void fill_ue_band_info(void) {
int setup_ue_buffers(PHY_VARS_NR_UE **phy_vars_ue, openair0_config_t *openair0_cfg) {
int i, CC_id;
LTE_DL_FRAME_PARMS *frame_parms;
NR_DL_FRAME_PARMS *frame_parms;
openair0_rf_map *rf_map;
for (CC_id=0; CC_id<MAX_NUM_CCs; CC_id++) {
targets/RT/USER/nr-uesoftmodem.c
+8 -8
View File
@@ -245,7 +245,7 @@ int emulate_rf = 0;
threads_t threads= {-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1,-1};
/* forward declarations */
void set_default_frame_parms(nfapi_nr_config_request_t *config[MAX_NUM_CCs], NR_DL_FRAME_PARMS *frame_parms[MAX_NUM_CCs]);
void set_default_frame_parms(NR_DL_FRAME_PARMS *frame_parms[MAX_NUM_CCs]);
/* see file openair2/LAYER2/MAC/main.c for why abstraction_flag is needed
@@ -628,7 +628,7 @@ int T_port = 2021; /* default port to listen to to wait for the tracer */
int T_dont_fork = 0; /* default is to fork, see 'T_init' to understand */
#endif
void set_default_frame_parms(nfapi_nr_config_request_t *config[MAX_NUM_CCs], NR_DL_FRAME_PARMS *frame_parms[MAX_NUM_CCs]) {
void set_default_frame_parms(NR_DL_FRAME_PARMS *frame_parms[MAX_NUM_CCs]) {
int CC_id;
@@ -700,7 +700,6 @@ void set_default_frame_parms_single(nfapi_nr_config_request_t *config, NR_DL_FRA
//int CC_id;
//for (CC_id=0; CC_id<MAX_NUM_CCs; CC_id++) {
frame_parms = (NR_DL_FRAME_PARMS*) malloc(sizeof(NR_DL_FRAME_PARMS));
/* Set some default values that may be overwritten while reading options */
frame_parms = (NR_DL_FRAME_PARMS*) malloc(sizeof(NR_DL_FRAME_PARMS));
config = (nfapi_nr_config_request_t*) malloc(sizeof(nfapi_nr_config_request_t));
@@ -899,7 +898,7 @@ int main( int argc, char **argv ) {
set_latency_target();
// set default parameters
set_default_frame_parms(config,frame_parms);
set_default_frame_parms(frame_parms);
// initialize logging
logInit();
@@ -985,6 +984,7 @@ int main( int argc, char **argv ) {
LOG_I(HW, "Version: %s\n", PACKAGE_VERSION);
// set_default_frame_parms(frame_parms);//
// init the parameters
for (CC_id=0; CC_id<MAX_NUM_CCs; CC_id++) {
@@ -995,10 +995,10 @@ int main( int argc, char **argv ) {
LOG_I(PHY,"Set nb_rx_antenna %d , nb_tx_antenna %d \n",frame_parms[CC_id]->nb_antennas_rx, frame_parms[CC_id]->nb_antennas_tx);
set_default_frame_parms(config[CC_id],frame_parms[CC_id]);
//set_default_frame_parms(config[CC_id],frame_parms[CC_id]);
//init_ul_hopping(frame_parms[CC_id]);
nr_init_frame_parms_ue(config[CC_id],frame_parms[CC_id]);
nr_init_frame_parms_ue(frame_parms[CC_id]);
printf("after init frame_parms %d\n",frame_parms[CC_id]->ofdm_symbol_size);
// phy_init_top(frame_parms[CC_id]);
phy_init_nr_top(frame_parms[CC_id]);
@@ -1238,7 +1238,7 @@ int main( int argc, char **argv ) {
//}
// connect the TX/RX buffers
if (UE_flag==1) {
//if (UE_flag==1) {
for (CC_id=0; CC_id<MAX_NUM_CCs; CC_id++) {
@@ -1265,7 +1265,7 @@ int main( int argc, char **argv ) {
printf("error reading from file\n");
}
//p_exmimo_config->framing.tdd_config = TXRXSWITCH_TESTRX;
}
//}
sleep(3);