Handle changing N_TA_offset on the UE correctly in higher layers
Send new N_TA_offset in config_request to PHY. Remove N_TA_offset update from ta_command.
This commit is contained in:
+27
-8
@@ -147,6 +147,24 @@ static void *nrL1_UE_stats_thread(void *param)
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return NULL;
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}
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static int determine_N_TA_offset(PHY_VARS_NR_UE *ue) {
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if (ue->sl_mode == 2)
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return 0;
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else {
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int N_TA_offset = ue->nrUE_config.cell_config.N_TA_offset;
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if (N_TA_offset == -1) {
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return set_default_nta_offset(ue->frame_parms.freq_range, ue->frame_parms.samples_per_subframe);
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} else {
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// Return N_TA_offet in samples, as described in 38.211 4.1 and 4.3.1
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// T_c[s] = 1/(Δf_max x N_f) = 1 / (480 * 1000 * 4096)
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// N_TA_offset[s] = N_TA_offset x T_c
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// N_TA_offset[samples] = samples_per_second x N_TA_offset[s]
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// N_TA_offset[samples] = N_TA_offset x samples_per_subframe x 1000 x T_c
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return (N_TA_offset * ue->frame_parms.samples_per_subframe) / (4096 * 480);
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}
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}
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}
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void init_nr_ue_vars(PHY_VARS_NR_UE *ue, uint8_t UE_id)
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{
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int nb_connected_gNB = 1;
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@@ -165,8 +183,8 @@ void init_nr_ue_vars(PHY_VARS_NR_UE *ue, uint8_t UE_id)
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// intialize transport
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init_nr_ue_transport(ue);
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// init N_TA offset
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init_N_TA_offset(ue);
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ue->ta_frame = -1;
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ue->ta_slot = -1;
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}
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void init_nrUE_standalone_thread(int ue_idx)
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@@ -867,7 +885,7 @@ void *UE_thread(void *arg)
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initNotifiedFIFO_nothreadSafe(&freeBlocks);
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int timing_advance = UE->timing_advance;
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int N_TA_offset = UE->N_TA_offset;
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UE->N_TA_offset = determine_N_TA_offset(UE);
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NR_UE_MAC_INST_t *mac = get_mac_inst(UE->Mod_id);
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bool syncRunning = false;
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@@ -1090,7 +1108,7 @@ void *UE_thread(void *arg)
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// use previous timing_advance value to compute writeTimestamp
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const openair0_timestamp writeTimestamp = rx_timestamp + fp->get_samples_slot_timestamp(slot_nr, fp, duration_rx_to_tx)
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- firstSymSamp - N_TA_offset - timing_advance;
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- firstSymSamp - UE->N_TA_offset - timing_advance;
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// but use current UE->timing_advance value to compute writeBlockSize
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int writeBlockSize = fp->get_samples_per_slot((slot_nr + duration_rx_to_tx) % nb_slot_frame, fp) - iq_shift_to_apply;
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@@ -1099,10 +1117,11 @@ void *UE_thread(void *arg)
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writeBlockSize -= new_timing_advance- timing_advance;
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timing_advance = new_timing_advance;
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}
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int new_N_TA_offset = UE->N_TA_offset;
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if (new_N_TA_offset != N_TA_offset) {
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writeBlockSize -= new_N_TA_offset - N_TA_offset;
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N_TA_offset = new_N_TA_offset;
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int new_N_TA_offset = determine_N_TA_offset(UE);
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if (new_N_TA_offset != UE->N_TA_offset) {
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LOG_I(PHY, "N_TA_offset changed from %d to %d\n", UE->N_TA_offset, new_N_TA_offset);
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writeBlockSize -= new_N_TA_offset - UE->N_TA_offset;
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UE->N_TA_offset = new_N_TA_offset;
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}
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if (curMsg.proc.nr_slot_tx == 0)
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@@ -551,7 +551,6 @@ typedef struct {
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int ta_frame;
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int ta_slot;
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int ta_command;
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int ta_offset;
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bool is_rar;
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} fapi_nr_ta_command_pdu;
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@@ -616,7 +615,7 @@ typedef struct
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{
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uint8_t phy_cell_id;//Physical Cell ID, 𝑁_{𝐼𝐷}^{𝑐𝑒𝑙𝑙} [38.211, sec 7.4.2.1] Value: 0 ->1007
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uint8_t frame_duplex_type;//Frame duplex type Value: 0 = FDD 1 = TDD
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uint32_t N_TA_offset;
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} fapi_nr_cell_config_t;
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typedef struct
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@@ -492,24 +492,6 @@ void clean_UE_harq(PHY_VARS_NR_UE *UE)
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}
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}
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void init_N_TA_offset(PHY_VARS_NR_UE *ue)
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{
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NR_DL_FRAME_PARMS *fp = &ue->frame_parms;
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// No timing offset for Sidelink, refer to 3GPP 38.211 Section 8.5
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if (ue->sl_mode == 2)
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ue->N_TA_offset = 0;
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else
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ue->N_TA_offset = set_default_nta_offset(fp->freq_range, fp->samples_per_subframe);
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ue->ta_frame = -1;
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ue->ta_slot = -1;
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LOG_I(PHY,
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"UE %d Setting N_TA_offset to %d samples (UL Freq %lu, N_RB %d, mu %d)\n",
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ue->Mod_id, ue->N_TA_offset, fp->ul_CarrierFreq, fp->N_RB_DL, fp->numerology_index);
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}
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void phy_init_nr_top(PHY_VARS_NR_UE *ue) {
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NR_DL_FRAME_PARMS *frame_parms = &ue->frame_parms;
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init_delay_table(frame_parms->ofdm_symbol_size, MAX_DELAY_COMP, NR_MAX_OFDM_SYMBOL_SIZE, frame_parms->delay_table);
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@@ -36,7 +36,6 @@ int nr_init_frame_parms_ue_sl(NR_DL_FRAME_PARMS *fp,
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int init_nr_ue_signal(PHY_VARS_NR_UE *ue,int nb_connected_eNB);
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void term_nr_ue_signal(PHY_VARS_NR_UE *ue, int nb_connected_gNB);
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void init_nr_ue_transport(PHY_VARS_NR_UE *ue);
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void init_N_TA_offset(PHY_VARS_NR_UE *ue);
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void nr_dump_frame_parms(NR_DL_FRAME_PARMS *frame_parms);
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void phy_init_nr_gNB(PHY_VARS_gNB *gNB);
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int init_codebook_gNB(PHY_VARS_gNB *gNB);
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@@ -419,15 +419,6 @@ static void configure_ta_command(PHY_VARS_NR_UE *ue, fapi_nr_ta_command_pdu *ta_
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LOG_D(PHY,
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"TA command received in %d.%d Starting UL time alignment procedures. TA update will be applied at frame %d slot %d\n",
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ta_command_pdu->ta_frame, ta_command_pdu->ta_slot, ue->ta_frame, ue->ta_slot);
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if (ta_command_pdu->ta_offset != -1) {
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// ta_offset_samples : ta_offset = samples_per_subframe : (Δf_max x N_f / 1000)
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// As described in Section 4.3.1 in 38.211
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int ta_offset_samples = (ta_command_pdu->ta_offset * samples_per_subframe) / (4096 * 480);
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ue->N_TA_offset = ta_offset_samples;
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LOG_D(PHY, "Received N_TA offset %d from upper layers. Corresponds to %d samples.\n",
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ta_command_pdu->ta_offset, ta_offset_samples);
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}
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}
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static void nr_ue_scheduled_response_dl(NR_UE_MAC_INST_t *mac,
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@@ -44,6 +44,24 @@
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#include "oai_asn1.h"
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#include "executables/position_interface.h"
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static int get_ta_offset(long *n_TimingAdvanceOffset)
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{
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if (!n_TimingAdvanceOffset)
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return -1;
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switch (*n_TimingAdvanceOffset) {
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case NR_ServingCellConfigCommonSIB__n_TimingAdvanceOffset_n0 :
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return 0;
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case NR_ServingCellConfigCommonSIB__n_TimingAdvanceOffset_n25600 :
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return 25600;
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case NR_ServingCellConfigCommonSIB__n_TimingAdvanceOffset_n39936 :
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return 39936;
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default :
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AssertFatal(false, "Invalid n-TimingAdvanceOffset\n");
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}
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return -1;
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}
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static void set_tdd_config_nr_ue(fapi_nr_tdd_table_t *tdd_table, const frame_structure_t *fs)
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{
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tdd_table->tdd_period_in_slots = fs->numb_slots_period;
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@@ -143,6 +161,7 @@ static void config_common_ue_sa(NR_UE_MAC_INST_t *mac, NR_ServingCellConfigCommo
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// cell config
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cfg->cell_config.phy_cell_id = mac->physCellId;
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cfg->cell_config.frame_duplex_type = frame_type;
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cfg->cell_config.N_TA_offset = get_ta_offset(scc->n_TimingAdvanceOffset);
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// SSB config
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cfg->ssb_config.ss_pbch_power = scc->ss_PBCH_BlockPower;
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@@ -345,6 +364,7 @@ static void config_common_ue(NR_UE_MAC_INST_t *mac, NR_ServingCellConfigCommon_t
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// cell config
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cfg->cell_config.phy_cell_id = *scc->physCellId;
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cfg->cell_config.frame_duplex_type = frame_type;
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cfg->cell_config.N_TA_offset = get_ta_offset(scc->n_TimingAdvanceOffset);
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// SSB config
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cfg->ssb_config.ss_pbch_power = scc->ss_PBCH_BlockPower;
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@@ -1685,24 +1705,6 @@ void nr_rrc_mac_config_req_reset(module_id_t module_id, NR_UE_MAC_reset_cause_t
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AssertFatal(!ret, "mutex failed %d\n", ret);
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}
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static int get_ta_offset(long *n_TimingAdvanceOffset)
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{
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if (!n_TimingAdvanceOffset)
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return -1;
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switch (*n_TimingAdvanceOffset) {
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case NR_ServingCellConfigCommonSIB__n_TimingAdvanceOffset_n0 :
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return 0;
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case NR_ServingCellConfigCommonSIB__n_TimingAdvanceOffset_n25600 :
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return 25600;
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case NR_ServingCellConfigCommonSIB__n_TimingAdvanceOffset_n39936 :
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return 39936;
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default :
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AssertFatal(false, "Invalid n-TimingAdvanceOffset\n");
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}
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return -1;
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}
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static void configure_si_schedulingInfo(NR_UE_MAC_INST_t *mac,
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NR_SI_SchedulingInfo_t *si_SchedulingInfo,
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NR_SI_SchedulingInfo_v1700_t *si_SchedulingInfo_v1700)
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@@ -1744,7 +1746,6 @@ void nr_rrc_mac_config_req_sib1(module_id_t module_id, int cc_idP, NR_SIB1_t *si
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AssertFatal(scc, "SIB1 SCC should not be NULL\n");
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UPDATE_IE(mac->tdd_UL_DL_ConfigurationCommon, scc->tdd_UL_DL_ConfigurationCommon, NR_TDD_UL_DL_ConfigCommon_t);
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configure_si_schedulingInfo(mac, si_SchedulingInfo, si_SchedulingInfo_v1700);
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mac->n_ta_offset = get_ta_offset(scc->n_TimingAdvanceOffset);
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config_common_ue_sa(mac, scc, cc_idP);
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configure_common_BWP_dl(mac,
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@@ -1813,7 +1814,6 @@ static void handle_reconfiguration_with_sync(NR_UE_MAC_INST_t *mac,
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if (reconfWithSync->spCellConfigCommon) {
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NR_ServingCellConfigCommon_t *scc = reconfWithSync->spCellConfigCommon;
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mac->n_ta_offset = get_ta_offset(scc->n_TimingAdvanceOffset);
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if (scc->physCellId)
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mac->physCellId = *scc->physCellId;
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mac->dmrs_TypeA_Position = scc->dmrs_TypeA_Position;
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@@ -633,7 +633,6 @@ typedef struct NR_UE_MAC_INST_s {
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int dmrs_TypeA_Position;
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int p_Max;
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int p_Max_alt;
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int n_ta_offset; // -1 not present, otherwise value to be applied
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ntn_timing_advance_componets_t ntn_ta;
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@@ -68,7 +68,6 @@ void nr_ue_init_mac(NR_UE_MAC_INST_t *mac)
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mac->uecap_maxMIMO_PUSCH_layers_nocb = 0;
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mac->p_Max = INT_MIN;
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mac->p_Max_alt = INT_MIN;
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mac->n_ta_offset = -1;
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mac->ntn_ta.ntn_params_changed = false;
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reset_mac_inst(mac);
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@@ -3626,7 +3626,6 @@ static void schedule_ta_command(fapi_nr_dl_config_request_t *dl_config, NR_UE_MA
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fapi_nr_ta_command_pdu *ta = &dl_config->dl_config_list[dl_config->number_pdus].ta_command_pdu;
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ta->ta_frame = ul_time_alignment->frame;
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ta->ta_slot = ul_time_alignment->slot;
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ta->ta_offset = mac->n_ta_offset;
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ta->is_rar = ul_time_alignment->ta_apply == rar_ta;
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ta->ta_command = ul_time_alignment->ta_command;
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dl_config->dl_config_list[dl_config->number_pdus].pdu_type = FAPI_NR_CONFIG_TA_COMMAND;
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