TBSLBRM for DL computed ad MAC (added fapi parameter)
This commit is contained in:
@@ -464,7 +464,7 @@ typedef struct {
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uint8_t nEpreRatioOfPDSCHToPTRS;
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/// MCS table for this DLSCH
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uint8_t mcs_table;
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uint32_t tbslbrm;
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uint16_t pduBitmap;
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} fapi_nr_dl_config_dlsch_pdu_rel15_t;
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@@ -776,6 +776,10 @@ typedef struct {
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nfapi_nr_dl_dci_pdu_t dci_pdu[MAX_DCI_CORESET];
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} nfapi_nr_dl_tti_pdcch_pdu_rel15_t;
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typedef struct {
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uint32_t tbSizeLbrmBytes;
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}nfapi_v3_pdsch_maintenance_parameters_t;
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typedef struct {
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uint16_t pduBitmap;
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uint16_t rnti;
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@@ -854,6 +858,7 @@ typedef struct {
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uint8_t nEpreRatioOfPDSCHToPTRS;
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// Beamforming
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nfapi_nr_tx_precoding_and_beamforming_t precodingAndBeamforming;
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nfapi_v3_pdsch_maintenance_parameters_t maintenance_parms_v3;
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}nfapi_nr_dl_tti_pdsch_pdu_rel15_t;
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@@ -481,10 +481,6 @@ uint32_t nr_compute_tbs(uint16_t Qm,
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uint8_t tb_scaling,
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uint8_t Nl);
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uint32_t nr_compute_tbslbrm(uint16_t table,
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uint16_t nb_rb,
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uint8_t Nl);
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void nr_interleaving_ldpc(uint32_t E, uint8_t Qm, uint8_t *e,uint8_t *f);
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void nr_deinterleaving_ldpc(uint32_t E, uint8_t Qm, int16_t *e,int16_t *f);
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@@ -229,13 +229,8 @@ void ldpc8blocks( void *p) {
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impp->F,
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Kr-impp->F-2*(*impp->Zc),
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mod_order,nb_rb);
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// for tbslbrm calculation according to 5.4.2.1 of 38.212
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uint8_t Nl = 4;
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if (rel15->nrOfLayers < Nl)
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Nl = rel15->nrOfLayers;
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uint32_t Tbslbrm = nr_compute_tbslbrm(rel15->mcsTable[0],nb_rb,Nl);
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uint32_t Tbslbrm = rel15->maintenance_parms_v3.tbSizeLbrmBytes;
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uint8_t Ilbrm = 1;
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uint8_t e[E];
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@@ -259,7 +259,6 @@ void nr_processULSegment(void* arg) {
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int rv_index = rdata->rv_index;
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int r_offset = rdata->r_offset;
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uint8_t kc = rdata->Kc;
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uint32_t Tbslbrm = rdata->Tbslbrm;
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short* ulsch_llr = rdata->ulsch_llr;
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int max_ldpc_iterations = p_decoderParms->numMaxIter;
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int8_t llrProcBuf[OAI_UL_LDPC_MAX_NUM_LLR] __attribute__ ((aligned(32)));
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@@ -319,7 +318,7 @@ void nr_processULSegment(void* arg) {
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//start_meas(&phy_vars_gNB->ulsch_rate_unmatching_stats);
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if (nr_rate_matching_ldpc_rx(Ilbrm,
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Tbslbrm,
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0,
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p_decoderParms->BG,
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p_decoderParms->Z,
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ulsch_harq->d[r],
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@@ -420,7 +419,6 @@ uint32_t nr_ulsch_decoding(PHY_VARS_gNB *phy_vars_gNB,
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uint32_t r_offset;
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uint32_t offset;
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int kc;
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int Tbslbrm;
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int E;
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#ifdef PRINT_CRC_CHECK
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@@ -559,7 +557,6 @@ uint32_t nr_ulsch_decoding(PHY_VARS_gNB *phy_vars_gNB,
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if (!frame%100)
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printf("K %d C %d Z %d \n", harq_process->K, harq_process->C, harq_process->Z);
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#endif
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Tbslbrm = nr_compute_tbslbrm(0,nb_rb,n_layers);
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p_decParams->Z = harq_process->Z;
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@@ -610,7 +607,6 @@ uint32_t nr_ulsch_decoding(PHY_VARS_gNB *phy_vars_gNB,
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rdata->r_offset = r_offset;
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rdata->Kr_bytes = Kr_bytes;
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rdata->rv_index = pusch_pdu->pusch_data.rv_index;
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rdata->Tbslbrm = Tbslbrm;
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rdata->offset = offset;
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rdata->ulsch = ulsch;
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rdata->ulsch_id = ULSCH_id;
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@@ -472,7 +472,6 @@ uint32_t nr_dlsch_decoding(PHY_VARS_NR_UE *phy_vars_ue,
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phy_vars_ue->dl_stats[harq_process->round]++;
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LOG_D(PHY,"Round %d RV idx %d\n",harq_process->round,harq_process->rvidx);
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uint8_t kc;
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uint32_t Tbslbrm;// = 950984;
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uint16_t nb_rb;// = 30;
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double Coderate;// = 0.0;
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uint8_t dmrs_Type = harq_process->dmrsConfigType;
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@@ -583,10 +582,6 @@ uint32_t nr_dlsch_decoding(PHY_VARS_NR_UE *phy_vars_ue,
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if (LOG_DEBUGFLAG(DEBUG_DLSCH_DECOD) && (!frame%100))
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LOG_I(PHY,"K %d C %d Z %d nl %d \n", harq_process->K, harq_process->C, p_decParams->Z, harq_process->Nl);
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}
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if ((harq_process->Nl)<4)
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Tbslbrm = nr_compute_tbslbrm(harq_process->mcs_table,nb_rb,harq_process->Nl);
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else
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Tbslbrm = nr_compute_tbslbrm(harq_process->mcs_table,nb_rb,4);
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VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_DLSCH_SEGMENTATION, VCD_FUNCTION_OUT);
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p_decParams->Z = harq_process->Z;
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@@ -637,7 +632,7 @@ uint32_t nr_dlsch_decoding(PHY_VARS_NR_UE *phy_vars_ue,
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rdata->r_offset = r_offset;
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rdata->Kr_bytes = Kr_bytes;
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rdata->rv_index = harq_process->rvidx;
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rdata->Tbslbrm = Tbslbrm;
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rdata->Tbslbrm = harq_process->tbslbrm;
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rdata->offset = offset;
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rdata->dlsch = dlsch;
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rdata->dlsch_id = 0;
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@@ -303,6 +303,7 @@ typedef struct {
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uint16_t ptrs_symbols;
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// PTRS symbol index, to be updated every PTRS symbol within a slot.
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uint8_t ptrs_symbol_index;
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uint32_t tbslbrm;
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/// PDU BITMAP
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uint16_t pduBitmap;
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} NR_DL_UE_HARQ_t;
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@@ -233,8 +233,7 @@ int nr_ulsch_encoding(PHY_VARS_NR_UE *ue,
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uint16_t Kr,r;
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uint32_t r_offset;
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uint32_t E,Kb;
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uint8_t Ilbrm;
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uint32_t Tbslbrm;
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uint8_t Ilbrm;
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uint16_t R;
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float Coderate;
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@@ -256,7 +255,6 @@ int nr_ulsch_encoding(PHY_VARS_NR_UE *ue,
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r_offset=0;
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F=0;
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Ilbrm = 0;
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Tbslbrm = 950984; //max tbs
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Coderate = 0.0;
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///////////
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/////////////////////////////////////////////////////////////////////////////////////////
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@@ -440,12 +438,10 @@ int nr_ulsch_encoding(PHY_VARS_NR_UE *ue,
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E = nr_get_E(G, harq_process->C, mod_order, harq_process->pusch_pdu.nrOfLayers, r);
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Tbslbrm = nr_compute_tbslbrm(0,nb_rb,harq_process->pusch_pdu.nrOfLayers);
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VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_NR_RATE_MATCHING_LDPC, VCD_FUNCTION_IN);
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start_meas(&ue->ulsch_rate_matching_stats);
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if (nr_rate_matching_ldpc(Ilbrm,
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Tbslbrm,
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0,
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harq_process->BG,
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*pz,
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harq_process->d[r],
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@@ -928,7 +928,6 @@ typedef struct LDPCDecode_s {
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int segment_r;
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int r_offset;
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int offset;
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int Tbslbrm;
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int decodeIterations;
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} ldpcDecode_t;
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@@ -286,6 +286,7 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){
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dlsch0_harq->n_dmrs_cdm_groups = dlsch_config_pdu->n_dmrs_cdm_groups;
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dlsch0_harq->mcs = dlsch_config_pdu->mcs;
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dlsch0_harq->rvidx = dlsch_config_pdu->rv;
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dlsch0_harq->tbslbrm = dlsch_config_pdu->tbslbrm;
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dlsch0->g_pucch = dlsch_config_pdu->accumulated_delta_PUCCH;
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//get nrOfLayers from DCI info
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uint8_t Nl = 0;
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@@ -92,12 +92,10 @@ uint32_t nr_compute_tbs(uint16_t Qm,
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}
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//tbslbrm calculation according to 5.4.2.1 of 38.212
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uint32_t nr_compute_tbslbrm(uint16_t table,
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uint16_t nb_rb,
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uint8_t Nl)
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{
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uint8_t Nl) {
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uint16_t R, nb_re;
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uint16_t nb_rb_lbrm=0;
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@@ -122,34 +120,31 @@ uint32_t nr_compute_tbslbrm(uint16_t table,
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Ninfo = (nb_re * R * Qm * Nl)>>10;
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if (Ninfo <=3824) {
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n = max(3, floor(log2(Ninfo)) - 6);
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Np_info = max(24, (Ninfo>>n)<<n);
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for (int i=0; i<INDEX_MAX_TBS_TABLE; i++) {
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if (Tbstable_nr[i] >= Np_info){
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nr_tbs = Tbstable_nr[i];
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break;
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}
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}
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n = max(3, floor(log2(Ninfo)) - 6);
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Np_info = max(24, (Ninfo>>n)<<n);
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for (int i=0; i<INDEX_MAX_TBS_TABLE; i++) {
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if (Tbstable_nr[i] >= Np_info){
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nr_tbs = Tbstable_nr[i];
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break;
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}
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}
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}
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else {
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n = log2(Ninfo-24)-5;
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Np_info = max(3840, (ROUNDIDIV((Ninfo-24),(1<<n)))<<n);
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if (R <= 256) {
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C = CEILIDIV((Np_info+24),3816);
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nr_tbs = (C<<3)*CEILIDIV((Np_info+24),(C<<3)) - 24;
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}
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else {
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if (Np_info > 8424){
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C = CEILIDIV((Np_info+24),8424);
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nr_tbs = (C<<3)*CEILIDIV((Np_info+24),(C<<3)) - 24;
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}
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else {
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nr_tbs = ((CEILIDIV((Np_info+24),8))<<3) - 24;
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}
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}
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n = log2(Ninfo-24)-5;
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Np_info = max(3840, (ROUNDIDIV((Ninfo-24),(1<<n)))<<n);
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if (R <= 256) {
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C = CEILIDIV((Np_info+24),3816);
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nr_tbs = (C<<3)*CEILIDIV((Np_info+24),(C<<3)) - 24;
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}
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else {
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if (Np_info > 8424){
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C = CEILIDIV((Np_info+24),8424);
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nr_tbs = (C<<3)*CEILIDIV((Np_info+24),(C<<3)) - 24;
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}
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else
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nr_tbs = ((CEILIDIV((Np_info+24),8))<<3) - 24;
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}
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}
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return nr_tbs;
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}
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@@ -4076,6 +4076,28 @@ uint16_t compute_pucch_prb_size(uint8_t format,
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}
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}
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int get_bw_tbslbrm(NR_ServingCellConfigCommon_t *scc,
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NR_CellGroupConfig_t *cg) {
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int bw = 0;
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NR_BWP_t genericParameters;
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if (cg && cg->spCellConfig && cg->spCellConfig->spCellConfigDedicated &&
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cg->spCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList) {
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struct NR_ServingCellConfig__downlinkBWP_ToAddModList *BWP_list = cg->spCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList;
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for (int i=0; i<BWP_list->list.count; i++) {
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genericParameters = BWP_list->list.array[i]->bwp_Common->genericParameters;
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int curr_bw = NRRIV2BW(genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
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if (curr_bw > bw)
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bw = curr_bw;
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}
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}
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else {
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genericParameters = scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters;
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bw = NRRIV2BW(genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
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}
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return bw;
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}
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/* extract UL PTRS values from RRC and validate it based upon 38.214 6.2.3 */
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bool set_ul_ptrs_values(NR_PTRS_UplinkConfig_t *ul_ptrs_config,
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uint16_t rbSize,uint8_t mcsIndex, uint8_t mcsTable,
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@@ -121,6 +121,13 @@ uint8_t get_K_ptrs(uint16_t nrb0, uint16_t nrb1, uint16_t N_RB);
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uint16_t get_nr_srs_offset(NR_SRS_PeriodicityAndOffset_t periodicityAndOffset);
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int get_bw_tbslbrm(NR_ServingCellConfigCommon_t *scc,
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NR_CellGroupConfig_t *cg);
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uint32_t nr_compute_tbslbrm(uint16_t table,
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uint16_t nb_rb,
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uint8_t Nl);
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void get_type0_PDCCH_CSS_config_parameters(NR_Type0_PDCCH_CSS_config_t *type0_PDCCH_CSS_config,
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frame_t frameP,
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NR_MIB_t *mib,
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@@ -890,6 +890,12 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
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LOG_W(MAC, "[%d.%d] MCS value %d out of bounds! Possibly due to false DCI. Ignoring DCI!\n", frame, slot, dlsch_config_pdu_1_0->mcs);
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return -1;
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}
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int bw_tbslbrm = get_bw_tbslbrm(mac->scc, mac->cg);
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dlsch_config_pdu_1_0->tbslbrm = nr_compute_tbslbrm(dlsch_config_pdu_1_0->mcs_table,
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bw_tbslbrm,
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1);
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/* NDI (only if CRC scrambled by C-RNTI or CS-RNTI or new-RNTI or TC-RNTI)*/
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dlsch_config_pdu_1_0->ndi = dci->ndi;
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/* RV (only if CRC scrambled by C-RNTI or CS-RNTI or new-RNTI or TC-RNTI)*/
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@@ -1254,6 +1260,15 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
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dl_config->number_pdus = dl_config->number_pdus + 1;
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/* TODO same calculation for MCS table as done in UL */
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dlsch_config_pdu_1_1->mcs_table = (pdsch_Config->mcs_Table) ? (*pdsch_Config->mcs_Table + 1) : 0;
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// TBS_LBRM according to section 5.4.2.1 of 38.212
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long *maxMIMO_Layers = mac->cg->spCellConfig->spCellConfigDedicated->pdsch_ServingCellConfig->choice.setup->ext1->maxMIMO_Layers;
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AssertFatal (maxMIMO_Layers != NULL,"Option with max MIMO layers not configured is not supported\n");
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int nl_tbslbrm = *maxMIMO_Layers < 4 ? *maxMIMO_Layers : 4;
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int bw_tbslbrm = get_bw_tbslbrm(mac->scc, mac->cg);
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dlsch_config_pdu_1_1->tbslbrm = nr_compute_tbslbrm(dlsch_config_pdu_1_1->mcs_table,
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bw_tbslbrm,
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nl_tbslbrm);
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/*PTRS configuration */
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dlsch_config_pdu_1_1->pduBitmap = 0;
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if(pdsch_Config->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->phaseTrackingRS != NULL) {
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@@ -1338,6 +1338,11 @@ void nr_generate_Msg2(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra
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uint8_t tb_scaling = 0;
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nr_get_tbs_dl(&dl_tti_pdsch_pdu->pdsch_pdu, x_Overhead, pdsch_pdu_rel15->numDmrsCdmGrpsNoData, tb_scaling);
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int bw_tbslbrm = get_bw_tbslbrm(scc, ra->CellGroup);
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pdsch_pdu_rel15->maintenance_parms_v3.tbSizeLbrmBytes = nr_compute_tbslbrm(mcsTableIdx,
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bw_tbslbrm,
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1);
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// Fill PDCCH DL DCI PDU
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nfapi_nr_dl_dci_pdu_t *dci_pdu = &pdcch_pdu_rel15->dci_pdu[pdcch_pdu_rel15->numDlDci];
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pdcch_pdu_rel15->numDlDci++;
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@@ -1715,6 +1720,11 @@ void nr_generate_Msg4(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra
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int x_Overhead = 0;
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nr_get_tbs_dl(&dl_tti_pdsch_pdu->pdsch_pdu, x_Overhead, pdsch_pdu_rel15->numDmrsCdmGrpsNoData, tb_scaling);
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int bw_tbslbrm = get_bw_tbslbrm(scc, ra->CellGroup);
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pdsch_pdu_rel15->maintenance_parms_v3.tbSizeLbrmBytes = nr_compute_tbslbrm(mcsTableIdx,
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bw_tbslbrm,
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1);
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pdsch_pdu_rel15->precodingAndBeamforming.num_prgs=1;
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pdsch_pdu_rel15->precodingAndBeamforming.prg_size=275;
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pdsch_pdu_rel15->precodingAndBeamforming.dig_bf_interfaces=1;
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@@ -502,6 +502,10 @@ void nr_fill_nfapi_dl_sib1_pdu(int Mod_idP,
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pdsch_pdu_rel15->dlDmrsSymbPos = dlDmrsSymbPos;
|
||||
LOG_D(MAC,"dlDmrsSymbPos = 0x%x\n", pdsch_pdu_rel15->dlDmrsSymbPos);
|
||||
|
||||
pdsch_pdu_rel15->maintenance_parms_v3.tbSizeLbrmBytes = nr_compute_tbslbrm(0,
|
||||
pdsch_pdu_rel15->BWPSize,
|
||||
1);
|
||||
|
||||
/* Fill PDCCH DL DCI PDU */
|
||||
nfapi_nr_dl_dci_pdu_t *dci_pdu = &pdcch_pdu_rel15->dci_pdu[pdcch_pdu_rel15->numDlDci];
|
||||
pdcch_pdu_rel15->numDlDci++;
|
||||
|
||||
@@ -1140,6 +1140,16 @@ void nr_schedule_ue_spec(module_id_t module_id,
|
||||
pdsch_pdu->StartSymbolIndex = ps->startSymbolIndex;
|
||||
pdsch_pdu->NrOfSymbols = ps->nrOfSymbols;
|
||||
|
||||
// TBS_LBRM according to section 5.4.2.1 of 38.212
|
||||
long *maxMIMO_Layers = cg->spCellConfig->spCellConfigDedicated->pdsch_ServingCellConfig->choice.setup->ext1->maxMIMO_Layers;
|
||||
AssertFatal (maxMIMO_Layers != NULL,"Option with max MIMO layers not configured is not supported\n");
|
||||
int nl_tbslbrm = *maxMIMO_Layers < 4 ? *maxMIMO_Layers : 4;
|
||||
// Maximum number of PRBs across all configured DL BWPs
|
||||
int bw_tbslbrm = get_bw_tbslbrm(scc, cg);
|
||||
pdsch_pdu->maintenance_parms_v3.tbSizeLbrmBytes = nr_compute_tbslbrm(ps->mcsTableIdx,
|
||||
bw_tbslbrm,
|
||||
nl_tbslbrm);
|
||||
|
||||
NR_PDSCH_Config_t *pdsch_Config=NULL;
|
||||
if (bwp &&
|
||||
bwp->bwp_Dedicated &&
|
||||
@@ -1189,7 +1199,7 @@ void nr_schedule_ue_spec(module_id_t module_id,
|
||||
dci_pdu_rel15_t dci_payload;
|
||||
memset(&dci_payload, 0, sizeof(dci_pdu_rel15_t));
|
||||
// bwp indicator
|
||||
const int n_dl_bwp = bwp ? UE_info->CellGroup[UE_id]->spCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList->list.count : 0;
|
||||
const int n_dl_bwp = bwp ? cg->spCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList->list.count : 0;
|
||||
AssertFatal(n_dl_bwp <= 1, "downlinkBWP_ToAddModList has %d BWP!\n", n_dl_bwp);
|
||||
|
||||
// as per table 7.3.1.1.2-1 in 38.212
|
||||
@@ -1242,7 +1252,7 @@ void nr_schedule_ue_spec(module_id_t module_id,
|
||||
const int rnti_type = NR_RNTI_C;
|
||||
|
||||
fill_dci_pdu_rel15(scc,
|
||||
UE_info->CellGroup[UE_id],
|
||||
cg,
|
||||
dci_pdu,
|
||||
&dci_payload,
|
||||
dci_format,
|
||||
|
||||
Reference in New Issue
Block a user