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Merge remote-tracking branch 'origin/NR_CSI_reporting' into integration_2020_wk44

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hardy
2020-10-26 17:30:17 +01:00
parent b0797c0899 1a1ee59d39
commit 779362dcb7
34 changed files with 1887 additions and 1249 deletions
Download Patch File Download Diff File Expand all files Collapse all files
cmake_targets/CMakeLists.txt
+1
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@@ -1593,6 +1593,7 @@ set(PHY_SRC_UE
${OPENAIR1_DIR}/PHY/NR_TRANSPORT/nr_ulsch_llr_computation.c
${OPENAIR1_DIR}/PHY/NR_TRANSPORT/nr_ulsch_demodulation.c
${OPENAIR1_DIR}/PHY/NR_REFSIG/nr_dmrs_rx.c
${OPENAIR1_DIR}/PHY/NR_TRANSPORT/nr_csi_rs.c
${OPENAIR1_DIR}/PHY/NR_REFSIG/nr_gold.c
${OPENAIR1_DIR}/PHY/NR_REFSIG/scrambling_luts.c
${OPENAIR1_DIR}/PHY/NR_REFSIG/nr_gen_mod_table.c
nfapi/open-nFAPI/nfapi/public_inc/nfapi_nr_interface_scf.h
+2 -2
View File
@@ -1260,7 +1260,7 @@ typedef struct
typedef struct
{
uint8_t pdu_idx;//This value is an index for number of PDU identified by nPDU in this message Value: 0 -> 65535
uint8_t pdu_idx;//This value is an index for number of PDU identified by nPDU in this message Value: 0 -> 255
} nfapi_nr_ul_tti_request_number_of_ue_t;
@@ -1541,7 +1541,7 @@ typedef struct
}nfapi_nr_uci_pucch_pdu_format_2_3_4_t;
typedef enum {
NFAPI_NR_UCI_PDCCH_PDU_TYPE = 0,
NFAPI_NR_UCI_PUSCH_PDU_TYPE = 0,
NFAPI_NR_UCI_FORMAT_0_1_PDU_TYPE = 1,
NFAPI_NR_UCI_FORMAT_2_3_4_PDU_TYPE = 2,
} nfapi_nr_uci_pdu_type_e;
openair1/PHY/CODING/crc_byte.c
+1 -1
View File
@@ -260,7 +260,7 @@ crc6 (unsigned char * inptr, int bitlen)
}
if (resbit > 0)
crc = (crc << resbit) ^ (crc8Table[((*inptr) >> (8 - resbit)) ^ (crc >> (32 - resbit))] << 24);
crc = (crc << resbit) ^ (crc6Table[((*inptr) >> (8 - resbit)) ^ (crc >> (32 - resbit))] << 24);
return crc;
}
openair1/PHY/INIT/nr_init.c
+18
View File
@@ -181,9 +181,27 @@ int phy_init_nr_gNB(PHY_VARS_gNB *gNB,
LOG_D(PHY,"Initializing PUSCH DMRS Gold sequence with (%x,%x)\n",Nid_pusch[0],Nid_pusch[1]);
nr_gold_pusch(gNB, &Nid_pusch[0]);
//CSI RS init
gNB->nr_gold_csi_rs = (uint32_t ***)malloc16(fp->slots_per_frame*sizeof(uint32_t **));
uint32_t ***csi_rs = gNB->nr_gold_csi_rs;
AssertFatal(csi_rs!=NULL, "NR init: csi reference signal malloc failed\n");
for (int slot=0; slot<fp->slots_per_frame; slot++) {
csi_rs[slot] = (uint32_t **)malloc16(fp->symbols_per_slot*sizeof(uint32_t *));
AssertFatal(csi_rs[slot]!=NULL, "NR init: csi reference signal for slot %d - malloc failed\n", slot);
for (int symb=0; symb<fp->symbols_per_slot; symb++) {
csi_rs[slot][symb] = (uint32_t *)malloc16(NR_MAX_CSI_RS_INIT_LENGTH_DWORD*sizeof(uint32_t));
AssertFatal(csi_rs[slot][symb]!=NULL, "NR init: csi reference signal for slot %d symbol %d - malloc failed\n", slot, symb);
}
}
nr_init_csi_rs(gNB, 0); // TODO scramblingID currently hardcoded to 0, to be taken from higher layer parameter scramblingID when implemented
/// Transport init necessary for NR synchro
init_nr_transport(gNB);
gNB->first_run_I0_measurements = 1;
common_vars->rxdata = (int32_t **)malloc16(Prx*sizeof(int32_t*));
openair1/PHY/NR_REFSIG/nr_gold.c
+24 -1
View File
@@ -65,7 +65,7 @@ void nr_init_pdcch_dmrs(PHY_VARS_gNB* gNB, uint32_t Nid)
for (uint8_t symb=0; symb<fp->symbols_per_slot; symb++) {
reset = 1;
x2 = ((1<<17) * (14*slot+symb+1) * ((Nid<<1)+1)) + (Nid<<1);
x2 = ((1<<17) * (fp->symbols_per_slot*slot+symb+1) * ((Nid<<1)+1) + (Nid<<1));
for (uint32_t n=0; n<NR_MAX_PDCCH_DMRS_INIT_LENGTH_DWORD; n++) {
pdcch_dmrs[slot][symb][n] = lte_gold_generic(&x1, &x2, reset);
@@ -130,3 +130,26 @@ void nr_gold_pusch(PHY_VARS_gNB* gNB, uint32_t *Nid) {
}
}
}
void nr_init_csi_rs(PHY_VARS_gNB* gNB, uint32_t Nid)
{
NR_DL_FRAME_PARMS *fp = &gNB->frame_parms;
uint32_t ***csi_rs = gNB->nr_gold_csi_rs;
uint32_t x1, x2;
uint8_t reset;
for (uint8_t slot=0; slot<fp->slots_per_frame; slot++) {
for (uint8_t symb=0; symb<fp->symbols_per_slot; symb++) {
reset = 1;
x2 = ((1<<10) * (fp->symbols_per_slot*slot+symb+1) * ((Nid<<1)+1) + (Nid));
for (uint32_t n=0; n<NR_MAX_PDCCH_DMRS_INIT_LENGTH_DWORD; n++) {
csi_rs[slot][symb][n] = lte_gold_generic(&x1, &x2, reset);
reset = 0;
}
}
}
}
openair1/PHY/NR_REFSIG/nr_refsig.h
+1
View File
@@ -38,6 +38,7 @@ void nr_init_pbch_dmrs(PHY_VARS_gNB* gNB);
*/
void nr_init_pdcch_dmrs(PHY_VARS_gNB* gNB, uint32_t Nid);
void nr_init_pdsch_dmrs(PHY_VARS_gNB* gNB, uint32_t Nid);
void nr_init_csi_rs(PHY_VARS_gNB* gNB, uint32_t Nid);
void nr_gold_pusch(PHY_VARS_gNB* gNB, uint32_t *Nid);
openair1/PHY/NR_TRANSPORT/nr_csi_rs.c
+608
View File
@@ -0,0 +1,608 @@
/*
* Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership.
* The OpenAirInterface Software Alliance licenses this file to You under
* the OAI Public License, Version 1.1 (the "License"); you may not use this file
* except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.openairinterface.org/?page_id=698
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*-------------------------------------------------------------------------------
* For more information about the OpenAirInterface (OAI) Software Alliance:
* contact@openairinterface.org
*/
#include "PHY/NR_TRANSPORT/nr_transport_proto.h"
#include "PHY/MODULATION/nr_modulation.h"
//#define NR_CSIRS_DEBUG
int nr_generate_csi_rs(uint32_t **gold_csi_rs,
int32_t** txdataF,
int16_t amp,
NR_DL_FRAME_PARMS frame_parms,
nfapi_nr_dl_tti_csi_rs_pdu_rel15_t csi_params)
{
int16_t mod_csi[frame_parms.symbols_per_slot][NR_MAX_CSI_RS_LENGTH>>1];
uint16_t b = csi_params.freq_domain;
uint16_t n, csi_bw, csi_start, p, k, l, mprime, na, kpn, csi_length;
uint8_t size, ports, kprime, lprime, i, gs;
uint8_t j[16], k_n[6], koverline[16], loverline[16];
int found = 0;
int wf, wt, lp, kp, symb;
uint8_t fi = 0;
double rho, alpha;
uint32_t beta = amp;
AssertFatal(b!=0, "Invalid CSI frequency domain mapping: no bit selected in bitmap\n");
switch (csi_params.row) {
// implementation of table 7.4.1.5.3-1 of 38.211
// lprime and kprime are the max value of l' and k'
case 1:
ports = 1;
kprime = 0;
lprime = 0;
size = 3;
while (found < 1) {
if ((b >> fi) & 0x01) {
k_n[found] = fi;
found++;
}
else
fi++;
}
for (i=0; i<size; i++) {
j[i] = 0;
loverline[i] = csi_params.symb_l0;
koverline[i] = k_n[0] + (i<<2);
}
break;
case 2:
ports = 1;
kprime = 0;
lprime = 0;
size = 1;
while (found < 1) {
if ((b >> fi) & 0x01) {
k_n[found] = fi;
found++;
}
else
fi++;
}
for (i=0; i<size; i++) {
j[i] = 0;
loverline[i] = csi_params.symb_l0;
koverline[i] = k_n[0];
}
break;
case 3:
ports = 2;
kprime = 1;
lprime = 0;
size = 1;
while (found < 1) {
if ((b >> fi) & 0x01) {
k_n[found] = fi<<1;
found++;
}
else
fi++;
}
for (i=0; i<size; i++) {
j[i] = 0;
loverline[i] = csi_params.symb_l0;
koverline[i] = k_n[0];
}
break;
case 4:
ports = 4;
kprime = 1;
lprime = 0;
size = 2;
while (found < 1) {
if ((b >> fi) & 0x01) {
k_n[found] = fi<<2;
found++;
}
else
fi++;
}
for (i=0; i<size; i++) {
j[i] = i;
loverline[i] = csi_params.symb_l0;
koverline[i] = k_n[0] + (i<<1);
}
break;
case 5:
ports = 4;
kprime = 1;
lprime = 0;
size = 2;
while (found < 1) {
if ((b >> fi) & 0x01) {
k_n[found] = fi<<1;
found++;
}
else
fi++;
}
for (i=0; i<size; i++) {
j[i] = i;
loverline[i] = csi_params.symb_l0 + i;
koverline[i] = k_n[0];
}
break;
case 6:
ports = 8;
kprime = 1;
lprime = 0;
size = 4;
while (found < 4) {
if ((b >> fi) & 0x01) {
k_n[found] = fi<<1;
found++;
}
fi++;
}
for (i=0; i<size; i++) {
j[i] = i;
loverline[i] = csi_params.symb_l0;
koverline[i] = k_n[i];
}
break;
case 7:
ports = 8;
kprime = 1;
lprime = 0;
size = 4;
while (found < 2) {
if ((b >> fi) & 0x01) {
k_n[found] = fi<<1;
found++;
}
fi++;
}
for (i=0; i<size; i++) {
j[i] = i;
loverline[i] = csi_params.symb_l0 + (i>>1);
koverline[i] = k_n[i%2];
}
break;
case 8:
ports = 8;
kprime = 1;
lprime = 1;
size = 2;
while (found < 2) {
if ((b >> fi) & 0x01) {
k_n[found] = fi<<1;
found++;
}
fi++;
}
for (i=0; i<size; i++) {
j[i] = i;
loverline[i] = csi_params.symb_l0;
koverline[i] = k_n[i];
}
break;
case 9:
ports = 12;
kprime = 1;
lprime = 0;
size = 6;
while (found < 6) {
if ((b >> fi) & 0x01) {
k_n[found] = fi<<1;
found++;
}
fi++;
}
for (i=0; i<size; i++) {
j[i] = i;
loverline[i] = csi_params.symb_l0;
koverline[i] = k_n[i];
}
break;
case 10:
ports = 12;
kprime = 1;
lprime = 1;
size = 3;
while (found < 3) {
if ((b >> fi) & 0x01) {
k_n[found] = fi<<1;
found++;
}
fi++;
}
for (i=0; i<size; i++) {
j[i] = i;
loverline[i] = csi_params.symb_l0;
koverline[i] = k_n[i];
}
break;
case 11:
ports = 16;
kprime = 1;
lprime = 0;
size = 8;
while (found < 4) {
if ((b >> fi) & 0x01) {
k_n[found] = fi<<1;
found++;
}
fi++;
}
for (i=0; i<size; i++) {
j[i] = i;
loverline[i] = csi_params.symb_l0 + (i>>2);
koverline[i] = k_n[i%4];
}
break;
case 12:
ports = 16;
kprime = 1;
lprime = 1;
size = 4;
while (found < 4) {
if ((b >> fi) & 0x01) {
k_n[found] = fi<<1;
found++;
}
fi++;
}
for (i=0; i<size; i++) {
j[i] = i;
loverline[i] = csi_params.symb_l0;
koverline[i] = k_n[i];
}
break;
case 13:
ports = 24;
kprime = 1;
lprime = 0;
size = 12;
while (found < 3) {
if ((b >> fi) & 0x01) {
k_n[found] = fi<<1;
found++;
}
fi++;
}
for (i=0; i<size; i++) {
j[i] = i;
if (i<6)
loverline[i] = csi_params.symb_l0 + i/3;
else
loverline[i] = csi_params.symb_l1 + i/9;
koverline[i] = k_n[i%3];
}
break;
case 14:
ports = 24;
kprime = 1;
lprime = 1;
size = 6;
while (found < 3) {
if ((b >> fi) & 0x01) {
k_n[found] = fi<<1;
found++;
}
fi++;
}
for (i=0; i<size; i++) {
j[i] = i;
if (i<3)
loverline[i] = csi_params.symb_l0;
else
loverline[i] = csi_params.symb_l1;
koverline[i] = k_n[i%3];
}
break;
case 15:
ports = 24;
kprime = 1;
lprime = 3;
size = 3;
while (found < 3) {
if ((b >> fi) & 0x01) {
k_n[found] = fi<<1;
found++;
}
fi++;
}
for (i=0; i<size; i++) {
j[i] = i;
loverline[i] = csi_params.symb_l0;
koverline[i] = k_n[i];
}
break;
case 16:
ports = 32;
kprime = 1;
lprime = 0;
size = 16;
while (found < 4) {
if ((b >> fi) & 0x01) {
k_n[found] = fi<<1;
found++;
}
fi++;
}
for (i=0; i<size; i++) {
j[i] = i;
if (i<8)
loverline[i] = csi_params.symb_l0 + (i>>2);
else
loverline[i] = csi_params.symb_l1 + (i/12);
koverline[i] = k_n[i%4];
}
break;
case 17:
ports = 32;
kprime = 1;
lprime = 1;
size = 8;
while (found < 4) {
if ((b >> fi) & 0x01) {
k_n[found] = fi<<1;
found++;
}
fi++;
}
for (i=0; i<size; i++) {
j[i] = i;
if (i<4)
loverline[i] = csi_params.symb_l0;
else
loverline[i] = csi_params.symb_l1;
koverline[i] = k_n[i%4];
}
break;
case 18:
ports = 32;
kprime = 1;
lprime = 3;
size = 4;
while (found < 4) {
if ((b >> fi) & 0x01) {
k_n[found] = fi<<1;
found++;
}
fi++;
}
for (i=0; i<size; i++) {
j[i] = i;
loverline[i] = csi_params.symb_l0;
koverline[i] = k_n[i];
}
break;
default:
AssertFatal(0==1, "Row %d is not valid for CSI Table 7.4.1.5.3-1\n", csi_params.row);
}
#ifdef NR_CSIRS_DEBUG
printf(" row %d, n. of ports %d\n k' ",csi_params.row,ports);
for (kp=0; kp<=kprime; kp++)
printf("%d, ",kp);
printf("l' ");
for (lp=0; lp<=lprime; lp++)
printf("%d, ",lp);
printf("\n k overline ");
for (i=0; i<size; i++)
printf("%d, ",koverline[i]);
printf("\n l overline ");
for (i=0; i<size; i++)
printf("%d, ",loverline[i]);
printf("\n");
#endif
// setting the frequency density from its index
switch (csi_params.freq_density) {
case 0:
rho = 0.5;
break;
case 1:
rho = 0.5;
break;
case 2:
rho = 1;
break;
case 3:
rho = 3;
break;
default:
AssertFatal(0==1, "Invalid frequency density index for CSI\n");
}
if (ports == 1)
alpha = rho;
else
alpha = 2*rho;
#ifdef NR_CSIRS_DEBUG
printf(" rho %f, alpha %f\n",rho,alpha);
#endif
// CDM group size from CDM type index
switch (csi_params.cdm_type) {
case 0:
gs = 1;
break;
case 1:
gs = 2;
break;
case 2:
gs = 4;
break;
case 3:
gs = 8;
break;
default:
AssertFatal(0==1, "Invalid cdm type index for CSI\n");
}
// according to 38.214 5.2.2.3.1 last paragraph
if (csi_params.start_rb<csi_params.bwp_start)
csi_start = csi_params.bwp_start;
else
csi_start = csi_params.start_rb;
if (csi_params.nr_of_rbs > (csi_params.bwp_start+csi_params.bwp_size-csi_start))
csi_bw = csi_params.bwp_start+csi_params.bwp_size-csi_start;
else
csi_bw = csi_params.nr_of_rbs;
if (rho < 1) {
if (csi_params.freq_density == 0)
csi_length = (((csi_bw + csi_start)>>1)<<kprime)<<1;
else
csi_length = ((((csi_bw + csi_start)>>1)<<kprime)+1)<<1;
}
else
csi_length = (((uint16_t) rho*(csi_bw + csi_start))<<kprime)<<1;
#ifdef NR_CSIRS_DEBUG
printf(" start rb %d, n. rbs %d, csi length %d\n",csi_start,csi_bw,csi_length);
#endif
// TRS
if (csi_params.csi_type == 0) {
// ???
}
// NZP CSI RS
if (csi_params.csi_type == 1) {
// assuming amp is the amplitude of SSB channels
switch (csi_params.power_control_offset_ss) {
case 0:
beta = (amp*ONE_OVER_SQRT2_Q15)>>15;
break;
case 1:
beta = amp;
break;
case 2:
beta = (amp*ONE_OVER_SQRT2_Q15)>>14;
break;
case 3:
beta = amp<<1;
break;
default:
AssertFatal(0==1, "Invalid SS power offset density index for CSI\n");
}
for (lp=0; lp<=lprime; lp++){
symb = csi_params.symb_l0;
nr_modulation(gold_csi_rs[symb+lp], csi_length, DMRS_MOD_ORDER, mod_csi[symb+lp]);
if ((csi_params.row == 5) || (csi_params.row == 7) || (csi_params.row == 11) || (csi_params.row == 13) || (csi_params.row == 16))
nr_modulation(gold_csi_rs[symb+1], csi_length, DMRS_MOD_ORDER, mod_csi[symb+1]);
if ((csi_params.row == 14) || (csi_params.row == 13) || (csi_params.row == 16) || (csi_params.row == 17)) {
symb = csi_params.symb_l1;
nr_modulation(gold_csi_rs[symb+lp], csi_length, DMRS_MOD_ORDER, mod_csi[symb+lp]);
if ((csi_params.row == 13) || (csi_params.row == 16))
nr_modulation(gold_csi_rs[symb+1], csi_length, DMRS_MOD_ORDER, mod_csi[symb+1]);
}
}
}
uint16_t start_sc = frame_parms.first_carrier_offset;
// resource mapping according to 38.211 7.4.1.5.3
for (n=csi_start; n<(csi_start+csi_bw); n++) {
if ( (csi_params.freq_density > 1) || (csi_params.freq_density == (n%2))) { // for freq density 0.5 checks if even or odd RB
for (int ji=0; ji<size; ji++) { // loop over CDM groups
for (int s=0 ; s<gs; s++) { // loop over each CDM group size
p = s+j[ji]*gs; // port index
for (kp=0; kp<=kprime; kp++) { // loop over frequency resource elements within a group
k = (start_sc+(n*NR_NB_SC_PER_RB)+koverline[ji]+kp)%(frame_parms.ofdm_symbol_size); // frequency index of current resource element
// wf according to tables 7.4.5.3-2 to 7.4.5.3-5
if (kp == 0)
wf = 1;
else
wf = -2*(s%2)+1;
na = n*alpha;
kpn = (rho*koverline[ji])/NR_NB_SC_PER_RB;
mprime = na + kp + kpn; // sequence index
for (lp=0; lp<=lprime; lp++) { // loop over frequency resource elements within a group
l = lp + loverline[ji];
// wt according to tables 7.4.5.3-2 to 7.4.5.3-5
if (s < 2)
wt = 1;
else if (s < 4)
wt = -2*(lp%2)+1;
else if (s < 6)
wt = -2*(lp/2)+1;
else {
if ((lp == 0) || (lp == 3))
wt = 1;
else
wt = -1;
}
// ZP CSI RS
if (csi_params.csi_type == 2) {
((int16_t*)txdataF[p])[(l*frame_parms.ofdm_symbol_size + k)<<1] = 0;
((int16_t*)txdataF[p])[((l*frame_parms.ofdm_symbol_size + k)<<1) + 1] = 0;
}
else {
((int16_t*)txdataF[p])[(l*frame_parms.ofdm_symbol_size + k)<<1] = (beta*wt*wf*mod_csi[l][mprime<<1]) >> 15;
((int16_t*)txdataF[p])[((l*frame_parms.ofdm_symbol_size + k)<<1) + 1] = (beta*wt*wf*mod_csi[l][(mprime<<1) + 1]) >> 15;
}
#ifdef NR_CSIRS_DEBUG
printf("l,k (%d %d) seq. index %d \t port %d \t (%d,%d)\n",l,k-start_sc,mprime,p+3000,((int16_t*)txdataF[p])[(l*frame_parms.ofdm_symbol_size + k)<<1],
((int16_t*)txdataF[p])[((l*frame_parms.ofdm_symbol_size + k)<<1) + 1]);
#endif
}
}
}
}
}
}
return 0;
}
openair1/PHY/NR_TRANSPORT/nr_transport_proto.h
+12
View File
@@ -327,6 +327,13 @@ int nr_find_pucch(uint16_t rnti,
void init_prach_list(PHY_VARS_gNB *gNB);
void init_prach_ru_list(RU_t *ru);
void free_nr_ru_prach_entry(RU_t *ru, int prach_id);
int nr_generate_csi_rs(uint32_t **gold_csi_rs,
int32_t **txdataF,
int16_t amp,
NR_DL_FRAME_PARMS frame_parms,
nfapi_nr_dl_tti_csi_rs_pdu_rel15_t csi_params);
void free_nr_prach_entry(PHY_VARS_gNB *gNB, int prach_id);
void nr_decode_pucch1(int32_t **rxdataF,
@@ -354,5 +361,10 @@ void nr_decode_pucch0(PHY_VARS_gNB *gNB,
nfapi_nr_uci_pucch_pdu_format_0_1_t* uci_pdu,
nfapi_nr_pucch_pdu_t* pucch_pdu);
void nr_decode_pucch2(PHY_VARS_gNB *gNB,
int slot,
nfapi_nr_uci_pucch_pdu_format_2_3_4_t* uci_pdu,
nfapi_nr_pucch_pdu_t* pucch_pdu);
#endif /*__NR_TRANSPORT__H__*/
openair1/PHY/NR_TRANSPORT/nr_ulsch_demodulation.c
+2 -2
View File
@@ -1136,8 +1136,8 @@ int nr_rx_pusch(PHY_VARS_gNB *gNB,
rel15_ul);
for (aarx = 0; aarx < frame_parms->nb_antennas_rx; aarx++) {
gNB->pusch_vars[ulsch_id]->ulsch_power[aarx] = signal_energy(&gNB->pusch_vars[ulsch_id]->ul_ch_estimates[aarx][symbol*frame_parms->ofdm_symbol_size],
rel15_ul->rb_size*12);
gNB->pusch_vars[ulsch_id]->ulsch_power[aarx] = signal_energy_nodc(&gNB->pusch_vars[ulsch_id]->ul_ch_estimates[aarx][symbol*frame_parms->ofdm_symbol_size],
rel15_ul->rb_size*12);
if (gNB->pusch_vars[ulsch_id]->ulsch_power[aarx]==1) return (1);
}
openair1/PHY/NR_TRANSPORT/pucch_rx.c
+75 -99
View File
@@ -96,7 +96,6 @@ void nr_fill_pucch(PHY_VARS_gNB *gNB,
pucch->slot = slot;
pucch->active = 1;
memcpy((void*)&pucch->pucch_pdu, (void*)pucch_pdu, sizeof(nfapi_nr_pucch_pdu_t));
}
@@ -166,7 +165,6 @@ void nr_decode_pucch0(PHY_VARS_gNB *gNB,
nfapi_nr_uci_pucch_pdu_format_0_1_t* uci_pdu,
nfapi_nr_pucch_pdu_t* pucch_pdu) {
int32_t **rxdataF = gNB->common_vars.rxdataF;
NR_DL_FRAME_PARMS *frame_parms = &gNB->frame_parms;
@@ -381,7 +379,7 @@ void nr_decode_pucch0(PHY_VARS_gNB *gNB,
#endif
// estimate CQI for MAC (from antenna port 0 only)
int SNRtimes10 = dB_fixed_times10(signal_energy(&rxdataF[0][pucch_pdu->start_symbol_index*frame_parms->ofdm_symbol_size+re_offset],12)) - (10*gNB->measurements.n0_power_tot_dB);
int SNRtimes10 = dB_fixed_times10(signal_energy_nodc(&rxdataF[0][pucch_pdu->start_symbol_index*frame_parms->ofdm_symbol_size+re_offset],12)) - (10*gNB->measurements.n0_power_tot_dB);
int cqi;
if (SNRtimes10 < -640) cqi=0;
else if (SNRtimes10 > 635) cqi=255;
@@ -395,9 +393,9 @@ void nr_decode_pucch0(PHY_VARS_gNB *gNB,
// first bit of bitmap for sr presence and second bit for acknack presence
uci_pdu->pduBitmap = pucch_pdu->sr_flag | ((pucch_pdu->bit_len_harq>0)<<1);
uci_pdu->pucch_format = 0; // format 0
uci_pdu->ul_cqi = cqi; // currently not valid
uci_pdu->ul_cqi = cqi;
uci_pdu->timing_advance = 0xffff; // currently not valid
uci_pdu->rssi = 1280 - (10*dB_fixed(32767*32767)-dB_fixed_times10(signal_energy(&rxdataF[0][pucch_pdu->start_symbol_index*frame_parms->ofdm_symbol_size+re_offset],12)));
uci_pdu->rssi = 1280 - (10*dB_fixed(32767*32767)-dB_fixed_times10(signal_energy_nodc(&rxdataF[0][pucch_pdu->start_symbol_index*frame_parms->ofdm_symbol_size+re_offset],12)));
if (pucch_pdu->bit_len_harq==0) {
uci_pdu->harq = NULL;
uci_pdu->sr = calloc(1,sizeof(*uci_pdu->sr));
@@ -414,8 +412,8 @@ void nr_decode_pucch0(PHY_VARS_gNB *gNB,
uci_pdu->harq->harq_confidence_level = (no_conf) ? 1 : 0;
uci_pdu->harq->harq_list = (nfapi_nr_harq_t*)malloc(1);
uci_pdu->harq->harq_list[0].harq_value = index&0x01;
LOG_D(PHY, "HARQ value %d with confidence level (0 is good, 1 is bad) %d\n",
uci_pdu->harq->harq_list[0].harq_value,uci_pdu->harq->harq_confidence_level);
LOG_I(PHY, "Slot %d HARQ value %d with confidence level (0 is good, 1 is bad) %d\n",
slot,uci_pdu->harq->harq_list[0].harq_value,uci_pdu->harq->harq_confidence_level);
if (pucch_pdu->sr_flag == 1) {
uci_pdu->sr = calloc(1,sizeof(*uci_pdu->sr));
uci_pdu->sr->sr_indication = (index>1) ? 1 : 0;
@@ -429,8 +427,8 @@ void nr_decode_pucch0(PHY_VARS_gNB *gNB,
uci_pdu->harq->harq_list = (nfapi_nr_harq_t*)malloc(2);
uci_pdu->harq->harq_list[1].harq_value = index&0x01;
uci_pdu->harq->harq_list[0].harq_value = (index>>1)&0x01;
LOG_D(PHY, "HARQ values %d and %d with confidence level (0 is good, 1 is bad) %d\n",
uci_pdu->harq->harq_list[1].harq_value,uci_pdu->harq->harq_list[0].harq_value,uci_pdu->harq->harq_confidence_level);
LOG_I(PHY, "Slot %d HARQ values %d and %d with confidence level (0 is good, 1 is bad) %d\n",
slot,uci_pdu->harq->harq_list[1].harq_value,uci_pdu->harq->harq_list[0].harq_value,uci_pdu->harq->harq_confidence_level);
if (pucch_pdu->sr_flag == 1) {
uci_pdu->sr = calloc(1,sizeof(*uci_pdu->sr));
uci_pdu->sr->sr_indication = (index>3) ? 1 : 0;
@@ -1091,11 +1089,12 @@ void nr_decode_pucch2(PHY_VARS_gNB *gNB,
NR_DL_FRAME_PARMS *frame_parms = &gNB->frame_parms;
//pucch_GroupHopping_t pucch_GroupHopping = pucch_pdu->group_hop_flag + (pucch_pdu->sequence_hop_flag<<1);
AssertFatal(pucch_pdu->nr_of_symbols==1 || pucch_pdu->nr_of_symbols==2,
"Illegal number of symbols for PUCCH 2 %d\n",pucch_pdu->nr_of_symbols);
AssertFatal((pucch_pdu->prb_start-((pucch_pdu->prb_start>>2)<<2))==0,
"Current pucch2 receiver implementation requires a PRB offset multiple of 4. The one selected is %d",
pucch_pdu->prb_start);
//extract pucch and dmrs first
@@ -1118,10 +1117,24 @@ void nr_decode_pucch2(PHY_VARS_gNB *gNB,
int16_t rd_im_ext[Prx2][4*pucch_pdu->nr_of_symbols*pucch_pdu->prb_size] __attribute__((aligned(32)));
int16_t *r_re_ext_p,*r_im_ext_p,*rd_re_ext_p,*rd_im_ext_p;
int16_t *rp[Prx2];
int nb_re_pucch = 12*pucch_pdu->prb_size;
int16_t rp[Prx2][nb_re_pucch*2],*tmp_rp;
__m64 dmrs_re,dmrs_im;
for (int aa=0;aa<Prx;aa++) rp[aa] = ((int16_t *)&rxdataF[aa][(l2*frame_parms->ofdm_symbol_size)+re_offset]);
for (int aa=0;aa<Prx;aa++){
tmp_rp = ((int16_t *)&rxdataF[aa][l2*frame_parms->ofdm_symbol_size]);
if (re_offset + nb_re_pucch < frame_parms->ofdm_symbol_size) {
memcpy1((void*)rp[aa],(void*)&tmp_rp[re_offset*2],nb_re_pucch*sizeof(int32_t));
}
else {
int neg_length = frame_parms->ofdm_symbol_size-re_offset;
int pos_length = nb_re_pucch-neg_length;
memcpy1((void*)rp[aa],(void*)&tmp_rp[re_offset*2],neg_length*sizeof(int32_t));
memcpy1((void*)&rp[aa][neg_length*2],(void*)tmp_rp,pos_length*sizeof(int32_t));
}
}
#ifdef DEBUG_NR_PUCCH_RX
printf("Decoding pucch2 for %d symbols, %d PRB\n",pucch_pdu->nr_of_symbols,pucch_pdu->prb_size);
@@ -1142,67 +1155,19 @@ void nr_decode_pucch2(PHY_VARS_gNB *gNB,
rd_re_ext_p=&rd_re_ext[aa][4*prb];
rd_im_ext_p=&rd_im_ext[aa][4*prb];
r_re_ext_p[0]=rp[aa][0];
r_im_ext_p[0]=rp[aa][1];
rd_re_ext_p[0]=rp[aa][2];
rd_im_ext_p[0]=rp[aa][3];
r_re_ext_p[1]=rp[aa][4];
r_im_ext_p[1]=rp[aa][5];
r_re_ext_p[2]=rp[aa][6];
r_im_ext_p[2]=rp[aa][7];
rd_re_ext_p[1]=rp[aa][8];
rd_im_ext_p[1]=rp[aa][9];
r_re_ext_p[3]=rp[aa][10];
r_im_ext_p[3]=rp[aa][11];
r_re_ext_p[4]=rp[aa][12];
r_im_ext_p[4]=rp[aa][13];
rd_re_ext_p[2]=rp[aa][14];
rd_im_ext_p[2]=rp[aa][15];
r_re_ext_p[5]=rp[aa][16];
r_im_ext_p[5]=rp[aa][17];
r_re_ext_p[6]=rp[aa][18];
r_im_ext_p[6]=rp[aa][19];
rd_re_ext_p[3]=rp[aa][20];
rd_im_ext_p[3]=rp[aa][21];
r_re_ext_p[7]=rp[aa][22];
r_im_ext_p[7]=rp[aa][23];
r_re_ext_p[8]=rp[aa][24];
r_im_ext_p[8]=rp[aa][25];
rd_re_ext_p[4]=rp[aa][26];
rd_im_ext_p[4]=rp[aa][27];
r_re_ext_p[9]=rp[aa][28];
r_im_ext_p[9]=rp[aa][29];
r_re_ext_p[10]=rp[aa][30];
r_im_ext_p[10]=rp[aa][31];
rd_re_ext_p[5]=rp[aa][32];
rd_im_ext_p[5]=rp[aa][33];
r_re_ext_p[11]=rp[aa][34];
r_im_ext_p[11]=rp[aa][35];
r_re_ext_p[12]=rp[aa][36];
r_im_ext_p[12]=rp[aa][37];
rd_re_ext_p[6]=rp[aa][38];
rd_im_ext_p[6]=rp[aa][39];
r_re_ext_p[13]=rp[aa][40];
r_im_ext_p[13]=rp[aa][41];
r_re_ext_p[14]=rp[aa][42];
r_im_ext_p[14]=rp[aa][43];
rd_re_ext_p[7]=rp[aa][44];
rd_im_ext_p[7]=rp[aa][45];
r_re_ext_p[15]=rp[aa][46];
r_im_ext_p[15]=rp[aa][47];
for (int idx=0; idx<8; idx++) {
r_re_ext_p[idx<<1]=rp[aa][prb*24+6*idx];
r_im_ext_p[idx<<1]=rp[aa][prb*24+1+6*idx];
rd_re_ext_p[idx]=rp[aa][prb*24+2+6*idx];
rd_im_ext_p[idx]=rp[aa][prb*24+3+6*idx];
r_re_ext_p[1+(idx<<1)]=rp[aa][prb*24+4+6*idx];
r_im_ext_p[1+(idx<<1)]=rp[aa][prb*24+5+6*idx];
}
#ifdef DEBUG_NR_PUCCH_RX
for (int i=0;i<8;i++) printf("Ant %d PRB %d dmrs[%d] -> (%d,%d)\n",aa,prb+(i>>2),i,rd_re_ext_p[i],rd_im_ext_p[i]);
for (int i=0;i<16;i++) printf("Ant %d PRB %d data[%d] -> (%d,%d)\n",aa,prb+(i>>3),i,r_re_ext_p[i],r_im_ext_p[i]);
#endif
rp[aa]+=48;
} // aa
} // prb
@@ -1214,7 +1179,11 @@ void nr_decode_pucch2(PHY_VARS_gNB *gNB,
printf("slot %d, start_symbol_index %d, dmrs_scrambling_id %d\n",
slot,pucch_pdu->start_symbol_index,pucch_pdu->dmrs_scrambling_id);
#endif
s = lte_gold_generic(&x1, &x2, 1);
int reset = 1;
for (int i=0; i<=(pucch_pdu->prb_start>>2); i++) {
s = lte_gold_generic(&x1, &x2, reset);
reset = 0;
}
for (int group=0;group<ngroup;group++) {
// each group has 8*nc_group_size elements, compute 1 complex correlation with DMRS per group
@@ -1476,7 +1445,7 @@ void nr_decode_pucch2(PHY_VARS_gNB *gNB,
for (int aa=0;aa<Prx;aa++) {
LOG_D(PHY,"pucch2 cw %d group %d aa %d: (%d,%d)+(%d,%d) = (%d,%d)\n",cw,group,aa,
corr32_re[group][aa],corr32_im[0][aa],
corr32_re[group][aa],corr32_im[group][aa],
((int16_t*)(&prod_re[aa]))[0],
((int16_t*)(&prod_im[aa]))[0],
corr32_re[group][aa]+((int16_t*)(&prod_re[aa]))[0],
@@ -1495,7 +1464,7 @@ void nr_decode_pucch2(PHY_VARS_gNB *gNB,
}
} // cw loop
corr_dB = dB_fixed64((uint64_t)corr);
LOG_D(PHY,"cw_ML %d, metric %d dB\n",cw_ML,corr_dB);
LOG_I(PHY,"cw_ML %d, metric %d dB\n",cw_ML,corr_dB);
decodedPayload[0]=(uint64_t)cw_ML;
}
else { // polar coded case
@@ -1554,24 +1523,24 @@ void nr_decode_pucch2(PHY_VARS_gNB *gNB,
corr_re = ( corr32_re[half_prb>>2][aa]/(2*nc_group_size*4/2)+((int16_t*)(&prod_re[aa]))[0]);
corr_im = ( corr32_im[half_prb>>2][aa]/(2*nc_group_size*4/2)+((int16_t*)(&prod_im[aa]))[0]);
corr_tmp += corr_re*corr_re + corr_im*corr_im;
/*
LOG_D(PHY,"pucch2 half_prb %d cw %d (%d,%d) aa %d: (%d,%d,%d,%d,%d,%d,%d,%d)x(%d,%d,%d,%d,%d,%d,%d,%d) (%d,%d)+(%d,%d) = (%d,%d) => %d\n",
half_prb,cw,cw&15,cw>>4,aa,
((int16_t*)&pucch2_polar_4bit[cw&15])[0],((int16_t*)&pucch2_polar_4bit[cw>>4])[0],
((int16_t*)&pucch2_polar_4bit[cw&15])[1],((int16_t*)&pucch2_polar_4bit[cw>>4])[1],
((int16_t*)&pucch2_polar_4bit[cw&15])[2],((int16_t*)&pucch2_polar_4bit[cw>>4])[2],
((int16_t*)&pucch2_polar_4bit[cw&15])[3],((int16_t*)&pucch2_polar_4bit[cw>>4])[3],
((int16_t*)&rp_re[aa][half_prb])[0],((int16_t*)&rp_im[aa][half_prb])[0],
((int16_t*)&rp_re[aa][half_prb])[1],((int16_t*)&rp_im[aa][half_prb])[1],
((int16_t*)&rp_re[aa][half_prb])[2],((int16_t*)&rp_im[aa][half_prb])[2],
((int16_t*)&rp_re[aa][half_prb])[3],((int16_t*)&rp_im[aa][half_prb])[3],
corr32_re[half_prb>>2][aa]/(2*nc_group_size*4/2),corr32_im[half_prb>>2][aa]/(2*nc_group_size*4/2),
((int16_t*)(&prod_re[aa]))[0],
((int16_t*)(&prod_im[aa]))[0],
corr_re,
corr_im,
corr_tmp);
*/
/*
LOG_D(PHY,"pucch2 half_prb %d cw %d (%d,%d) aa %d: (%d,%d,%d,%d,%d,%d,%d,%d)x(%d,%d,%d,%d,%d,%d,%d,%d) (%d,%d)+(%d,%d) = (%d,%d) => %d\n",
half_prb,cw,cw&15,cw>>4,aa,
((int16_t*)&pucch2_polar_4bit[cw&15])[0],((int16_t*)&pucch2_polar_4bit[cw>>4])[0],
((int16_t*)&pucch2_polar_4bit[cw&15])[1],((int16_t*)&pucch2_polar_4bit[cw>>4])[1],
((int16_t*)&pucch2_polar_4bit[cw&15])[2],((int16_t*)&pucch2_polar_4bit[cw>>4])[2],
((int16_t*)&pucch2_polar_4bit[cw&15])[3],((int16_t*)&pucch2_polar_4bit[cw>>4])[3],
((int16_t*)&rp_re[aa][half_prb])[0],((int16_t*)&rp_im[aa][half_prb])[0],
((int16_t*)&rp_re[aa][half_prb])[1],((int16_t*)&rp_im[aa][half_prb])[1],
((int16_t*)&rp_re[aa][half_prb])[2],((int16_t*)&rp_im[aa][half_prb])[2],
((int16_t*)&rp_re[aa][half_prb])[3],((int16_t*)&rp_im[aa][half_prb])[3],
corr32_re[half_prb>>2][aa]/(2*nc_group_size*4/2),corr32_im[half_prb>>2][aa]/(2*nc_group_size*4/2),
((int16_t*)(&prod_re[aa]))[0],
((int16_t*)(&prod_im[aa]))[0],
corr_re,
corr_im,
corr_tmp);
*/
}
corr16 = _mm_set1_epi16((int16_t)(corr_tmp>>8));
/*
@@ -1625,26 +1594,34 @@ void nr_decode_pucch2(PHY_VARS_gNB *gNB,
} // half_prb
// run polar decoder on llrs
decoderState = polar_decoder_int16((int16_t*)llrs, decodedPayload, 0, currentPtr);
LOG_D(PHY,"UCI decoderState %d, payload[0] %llux\n",decoderState,(unsigned long long)decodedPayload[0]);
LOG_D(PHY,"UCI decoderState %d, payload[0] %llu\n",decoderState,(unsigned long long)decodedPayload[0]);
if (decoderState>0) decoderState=1;
corr_dB = dB_fixed64(corr);
LOG_D(PHY,"metric %d dB\n",corr_dB);
}
re_offset = (12*pucch_pdu->prb_start) + (12*pucch_pdu->bwp_start) + frame_parms->first_carrier_offset;
// estimate CQI for MAC (from antenna port 0 only)
int SNRtimes10 = dB_fixed_times10(signal_energy_nodc(&rxdataF[0][(l2*frame_parms->ofdm_symbol_size)+re_offset],12*pucch_pdu->prb_size)) - (10*gNB->measurements.n0_power_tot_dB);
int cqi;
if (SNRtimes10 < -640) cqi=0;
else if (SNRtimes10 > 635) cqi=255;
else cqi=(640+SNRtimes10)/5;
uci_pdu->harq.harq_bit_len = pucch_pdu->bit_len_harq;
uci_pdu->pduBitmap=0;
uci_pdu->rnti=pucch_pdu->rnti;
uci_pdu->handle=pucch_pdu->handle;
uci_pdu->pucch_format=0;
uci_pdu->ul_cqi=corr_dB;
// need to fill these field!
uci_pdu->timing_advance=31;
uci_pdu->rssi=0;
uci_pdu->ul_cqi=cqi;
uci_pdu->timing_advance=0xffff; // currently not valid
uci_pdu->rssi=1280 - (10*dB_fixed(32767*32767)-dB_fixed_times10(signal_energy_nodc(&rxdataF[0][(l2*frame_parms->ofdm_symbol_size)+re_offset],12*pucch_pdu->prb_size)));
if (pucch_pdu->bit_len_harq>0) {
int harq_bytes=pucch_pdu->bit_len_harq>>3;
if ((pucch_pdu->bit_len_harq&7) > 0) harq_bytes++;
uci_pdu->pduBitmap|=1;
uci_pdu->harq.harq_payload = (uint8_t*)malloc(harq_bytes);
uci_pdu->harq.harq_crc = decoderState > 0 ? 1 : 0;
uci_pdu->harq.harq_crc = decoderState;
int i=0;
for (;i<harq_bytes-1;i++) {
uci_pdu->harq.harq_payload[i] = decodedPayload[0] & 255;
@@ -1667,19 +1644,18 @@ void nr_decode_pucch2(PHY_VARS_gNB *gNB,
int csi_part1_bytes=pucch_pdu->bit_len_csi_part1>>3;
if ((pucch_pdu->bit_len_csi_part1&7) > 0) csi_part1_bytes++;
uci_pdu->csi_part1.csi_part1_payload = (uint8_t*)malloc(csi_part1_bytes);
uci_pdu->csi_part1.csi_part1_crc = decoderState > 0 ? 1 : 0;
uci_pdu->csi_part1.csi_part1_crc = decoderState;
int i=0;
for (;i<csi_part1_bytes-1;i++) {
uci_pdu->csi_part1.csi_part1_payload[i] = decodedPayload[0] & 255;
decodedPayload[0]>>=8;
}
uci_pdu->csi_part1.csi_part1_payload[i] = decodedPayload[0] & ((1<<(pucch_pdu->bit_len_csi_part1&7))-1);
decodedPayload[0] >>= pucch_pdu->bit_len_csi_part1;
decodedPayload[0] >>= pucch_pdu->bit_len_csi_part1;
}
if (pucch_pdu->bit_len_csi_part2>0) {
uci_pdu->pduBitmap|=8;
}
}
openair1/PHY/NR_UE_ESTIMATION/nr_estimation.h
+6
View File
@@ -87,6 +87,10 @@ void nr_ue_measurements(PHY_VARS_NR_UE *ue,
unsigned char rank_adaptation,
uint8_t subframe);
void nr_ue_rsrp_measurements(PHY_VARS_NR_UE *ue,
uint8_t slot,
uint8_t abstraction_flag);
void phy_adjust_gain_nr(PHY_VARS_NR_UE *ue,
uint32_t rx_power_fil_dB,
uint8_t eNB_id);
@@ -94,4 +98,6 @@ void phy_adjust_gain_nr(PHY_VARS_NR_UE *ue,
int16_t get_nr_PL(uint8_t Mod_id, uint8_t CC_id, uint8_t gNB_index);
float_t get_nr_RSRP(module_id_t Mod_id,uint8_t CC_id,uint8_t gNB_index);
#endif
openair1/PHY/NR_UE_ESTIMATION/nr_ue_measurements.c
+101 -1
View File
@@ -23,6 +23,7 @@
#include "PHY/phy_extern_nr_ue.h"
#include "common/utils/LOG/log.h"
#include "PHY/sse_intrin.h"
#include "openair2/LAYER2/NR_MAC_UE/mac_proto.h"
//#define k1 1000
#define k1 ((long long int) 1000)
@@ -76,6 +77,35 @@ int16_t get_nr_PL(uint8_t Mod_id, uint8_t CC_id, uint8_t gNB_index){
//(ue->frame_parms.pdsch_config_common.referenceSignalPower*10))/10));
}
uint32_t get_nr_rx_total_gain_dB (module_id_t Mod_id,uint8_t CC_id)
{
PHY_VARS_NR_UE *ue = PHY_vars_UE_g[Mod_id][CC_id];
if (ue)
return ue->rx_total_gain_dB;
return 0xFFFFFFFF;
}
float_t get_nr_RSRP(module_id_t Mod_id,uint8_t CC_id,uint8_t gNB_index)
{
AssertFatal(PHY_vars_UE_g!=NULL,"PHY_vars_UE_g is null\n");
AssertFatal(PHY_vars_UE_g[Mod_id]!=NULL,"PHY_vars_UE_g[%d] is null\n",Mod_id);
AssertFatal(PHY_vars_UE_g[Mod_id][CC_id]!=NULL,"PHY_vars_UE_g[%d][%d] is null\n",Mod_id,CC_id);
PHY_VARS_NR_UE *ue = PHY_vars_UE_g[Mod_id][CC_id];
if (ue)
return (10*log10(ue->measurements.rsrp[gNB_index])-
get_nr_rx_total_gain_dB(Mod_id,0) -
10*log10(20*12));
return -140.0;
}
void nr_ue_measurements(PHY_VARS_NR_UE *ue,
unsigned int subframe_offset,
unsigned char N0_symbol,
@@ -191,4 +221,74 @@ void nr_ue_measurements(PHY_VARS_NR_UE *ue,
_mm_empty();
_m_empty();
#endif
}
}
void nr_ue_rsrp_measurements(PHY_VARS_NR_UE *ue,
uint8_t slot,
uint8_t abstraction_flag)
{
int aarx,rb, symbol_offset;
int16_t *rxF;
uint16_t Nid_cell = ue->frame_parms.Nid_cell;
uint8_t eNB_offset=0,l,nushift;
uint16_t off,nb_rb;
// NR_UE_MAC_INST_t *mac = get_mac_inst(0);
int **rxdataF=ue->common_vars.common_vars_rx_data_per_thread[ue->current_thread_id[slot]].rxdataF;
nushift = ue->frame_parms.Nid_cell%4;
ue->frame_parms.nushift = nushift;
unsigned int ssb_offset = ue->frame_parms.first_carrier_offset + ue->frame_parms.ssb_start_subcarrier;
if (ssb_offset>= ue->frame_parms.ofdm_symbol_size) ssb_offset-=ue->frame_parms.ofdm_symbol_size;
symbol_offset = ue->frame_parms.ofdm_symbol_size*(ue->symbol_offset+1);
ue->measurements.rsrp[eNB_offset] = 0;
//if (mac->csirc->reportQuantity.choice.ssb_Index_RSRP){
nb_rb = 20;
//} else{
// LOG_E(PHY,"report quantity not supported \n");
//}
if (abstraction_flag == 0) {
for (l=0; l<1; l++) {
LOG_D(PHY,"[UE %d] slot %d Doing ue_rrc_measurements rsrp/rssi (Nid_cell %d, nushift %d, eNB_offset %d, l %d)\n",ue->Mod_id,slot,Nid_cell,nushift,
eNB_offset,l);
for (aarx=0; aarx<ue->frame_parms.nb_antennas_rx; aarx++) {
rxF = (int16_t *)&rxdataF[aarx][(symbol_offset+ssb_offset+nushift)];
off = 0;
if (l==0) {
for (rb=0; rb<nb_rb; rb++) {
ue->measurements.rsrp[eNB_offset] += (((int32_t)(rxF[off])*rxF[off])+((int32_t)(rxF[off+1])*rxF[off+1]));
//printf("rb %d, off %d : %d\n",rb,off,((((int32_t)rxF[off])*rxF[off])+((int32_t)(rxF[off+1])*rxF[off+1])));
off = (off+4) % ue->frame_parms.ofdm_symbol_size;
}
}
}
}
ue->measurements.rsrp[eNB_offset]/=nb_rb;
} else {
ue->measurements.rsrp[eNB_offset] = -93 ;
}
if (eNB_offset == 0)
LOG_I(PHY,"[UE %d] slot %d RRC Measurements (idx %d, Cell id %d) => rsrp: %3.1f dBm/RE (%d)\n",
ue->Mod_id,
slot,eNB_offset,
(eNB_offset>0) ? ue->measurements.adj_cell_id[eNB_offset-1] : ue->frame_parms.Nid_cell,
10*log10(ue->measurements.rsrp[eNB_offset])-ue->rx_total_gain_dB,
ue->measurements.rsrp[eNB_offset]);
}
openair1/PHY/NR_UE_TRANSPORT/pucch_nr.c
+5 -1
View File
@@ -1045,7 +1045,11 @@ void nr_generate_pucch2(PHY_VARS_NR_UE *ue,
for (int l=0; l<nrofSymbols; l++) {
x2 = (((1<<17)*((14*nr_tti_tx) + (l+startingSymbolIndex) + 1)*((2*dmrs_scrambling_id) + 1)) + (2*dmrs_scrambling_id))%(1U<<31); // c_init calculation according to TS38.211 subclause
s = lte_gold_generic(&x1, &x2, 1);
int reset = 1;
for (int ii=0; ii<=(startingPRB>>2); ii++) {
s = lte_gold_generic(&x1, &x2, reset);
reset = 0;
}
m = 0;
for (int rb=0; rb<nrofPRB; rb++) {
//startingPRB = startingPRB + rb;
openair1/PHY/defs_gNB.h
+3
View File
@@ -752,6 +752,9 @@ typedef struct PHY_VARS_gNB_s {
uint32_t rb_mask_ul[9];
int ulmask_symb;
/// CSI RS sequence
uint32_t ***nr_gold_csi_rs;
/// Indicator set to 0 after first SR
uint8_t first_sr[NUMBER_OF_NR_SR_MAX];
openair1/PHY/defs_nr_common.h
+3
View File
@@ -82,6 +82,9 @@
#define NR_MAX_PDSCH_DMRS_LENGTH 3300 //275*6(k)*2(QPSK real+imag)
#define NR_MAX_PDSCH_DMRS_INIT_LENGTH_DWORD 104 // ceil(NR_MAX_PDSCH_DMRS_LENGTH/32)
#define NR_MAX_CSI_RS_LENGTH 4400 //275*8(max allocation per RB)*2(QPSK)
#define NR_MAX_CSI_RS_INIT_LENGTH_DWORD 138 // ceil(NR_MAX_CSI_RS_LENGTH/32)
#define NR_MAX_PUSCH_DMRS_LENGTH NR_MAX_PDSCH_DMRS_LENGTH
#define NR_MAX_PUSCH_DMRS_INIT_LENGTH_DWORD NR_MAX_PDSCH_DMRS_INIT_LENGTH_DWORD
openair1/SCHED_NR/phy_procedures_nr_gNB.c
+18 -6
View File
@@ -136,8 +136,6 @@ void phy_procedures_gNB_TX(PHY_VARS_gNB *gNB,
int offset = gNB->CC_id;
uint8_t ssb_frame_periodicity = 1; // every how many frames SSB are generated
int txdataF_offset = (slot%2)*fp->samples_per_slot_wCP;
if (cfg->ssb_table.ssb_period.value > 1)
ssb_frame_periodicity = 1 <<(cfg->ssb_table.ssb_period.value -1) ;
@@ -518,7 +516,6 @@ void phy_procedures_gNB_common_RX(PHY_VARS_gNB *gNB, int frame_rx, int slot_rx)
0);
}
}
}
void phy_procedures_gNB_uespec_RX(PHY_VARS_gNB *gNB, int frame_rx, int slot_rx) {
@@ -538,10 +535,8 @@ void phy_procedures_gNB_uespec_RX(PHY_VARS_gNB *gNB, int frame_rx, int slot_rx)
nfapi_nr_pucch_pdu_t *pucch_pdu = &pucch->pucch_pdu;
uint16_t num_ucis;
switch (pucch_pdu->format_type) {
case 0:
num_ucis = gNB->UL_INFO.uci_ind.num_ucis;
gNB->UL_INFO.uci_ind.uci_list = &gNB->uci_pdu_list[0];
gNB->UL_INFO.uci_ind.sfn = frame_rx;
@@ -558,8 +553,25 @@ void phy_procedures_gNB_uespec_RX(PHY_VARS_gNB *gNB, int frame_rx, int slot_rx)
gNB->UL_INFO.uci_ind.num_ucis += 1;
pucch->active = 0;
break;
case 2:
num_ucis = gNB->UL_INFO.uci_ind.num_ucis;
gNB->UL_INFO.uci_ind.uci_list = &gNB->uci_pdu_list[0];
gNB->UL_INFO.uci_ind.sfn = frame_rx;
gNB->UL_INFO.uci_ind.slot = slot_rx;
gNB->uci_pdu_list[num_ucis].pdu_type = NFAPI_NR_UCI_FORMAT_2_3_4_PDU_TYPE;
gNB->uci_pdu_list[num_ucis].pdu_size = sizeof(nfapi_nr_uci_pucch_pdu_format_2_3_4_t);
nfapi_nr_uci_pucch_pdu_format_2_3_4_t *uci_pdu_format2 = &gNB->uci_pdu_list[num_ucis].pucch_pdu_format_2_3_4;
nr_decode_pucch2(gNB,
slot_rx,
uci_pdu_format2,
pucch_pdu);
gNB->UL_INFO.uci_ind.num_ucis += 1;
pucch->active = 0;
break;
default:
AssertFatal(1==0,"Only PUCCH format 0 is currently supported\n");
AssertFatal(1==0,"Only PUCCH formats 0 and 2 are currently supported\n");
}
}
}
openair1/SCHED_NR_UE/phy_procedures_nr_ue.c
+10
View File
@@ -50,7 +50,9 @@
#include "SCHED/phy_procedures_emos.h"
#endif
#include "executables/softmodem-common.h"
#include "openair2/LAYER2/NR_MAC_UE/mac_proto.h"
//#define DEBUG_PHY_PROC
#define NR_PDCCH_SCHED
//#define NR_PDCCH_SCHED_DEBUG
//#define NR_PUCCH_SCHED
@@ -1649,6 +1651,8 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,
uint8_t dci_cnt = 0;
NR_DL_FRAME_PARMS *fp = &ue->frame_parms;
//NR_UE_MAC_INST_t *mac = get_mac_inst(0);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_UE_RX, VCD_FUNCTION_IN);
LOG_D(PHY," ****** start RX-Chain for Frame.Slot %d.%d ****** \n", frame_rx%1024, nr_tti_rx);
@@ -1687,6 +1691,12 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,
#endif
}
//if (mac->csirc->reportQuantity.choice.ssb_Index_RSRP){
nr_ue_rsrp_measurements(ue,nr_tti_rx,0);
//}
nr_ue_pbch_procedures(gNB_id, ue, proc, 0);
if (ue->no_timing_correction==0) {
openair1/SCHED_NR_UE/pucch_uci_ue_nr.c
+146 -34
View File
@@ -37,6 +37,8 @@
#include "PHY/defs_nr_UE.h"
#include <openair1/SCHED/sched_common.h>
#include <openair1/PHY/NR_UE_TRANSPORT/pucch_nr.h>
#include "openair2/LAYER2/NR_MAC_UE/mac_proto.h"
#include "openair1/PHY/NR_UE_ESTIMATION/nr_estimation.h"
#ifndef NO_RAT_NR
@@ -54,6 +56,44 @@
uint8_t nr_is_cqi_TXOp(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t gNB_id);
uint8_t nr_is_ri_TXOp(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t gNB_id);
long
binary_search_float_nr(
float elements[],
long numElem,
float value
)
//-----------------------------------------------------------------------------
{
long first, last, middle;
first = 0;
last = numElem-1;
middle = (first+last)/2;
if(value < elements[0]) {
return first;
}
if(value >= elements[last]) {
return last;
}
while (last - first > 1) {
if (elements[middle] > value) {
last = middle;
} else {
first = middle;
}
middle = (first+last)/2;
}
if (first < 0 || first >= numElem) {
LOG_E(RRC,"\n Error in binary search float!");
}
return first;
}
/*
void nr_generate_pucch0(int32_t **txdataF,
NR_DL_FRAME_PARMS *frame_parms,
@@ -241,7 +281,17 @@ bool pucch_procedures_ue_nr(PHY_VARS_NR_UE *ue, uint8_t gNB_id, UE_nr_rxtx_proc_
ri_status = ((ue->cqi_report_config[gNB_id].CQI_ReportPeriodic.ri_ConfigIndex>0) &&
(nr_is_ri_TXOp(ue,proc,gNB_id) == 1));
csi_status = get_csi_nr(ue, gNB_id, &csi_payload);
NR_CSI_MeasConfig_t *csi_MeasConfig = mac->scg->spCellConfig->spCellConfigDedicated->csi_MeasConfig->choice.setup;
uint16_t report_slot_csi =csi_MeasConfig->csi_ReportConfigToAddModList->list.array[0]->reportConfigType.choice.periodic->reportSlotConfig.choice.slots320;
//if (mac->csirc->reportQuantity.choice.ssb_Index_RSRP){
if (report_slot_csi == proc->nr_tti_tx)
csi_status = get_csi_nr(mac, ue, gNB_id, &csi_payload);
else
csi_status = 0;
//}
O_CSI = cqi_status + ri_status + csi_status;
@@ -397,7 +447,7 @@ bool pucch_procedures_ue_nr(PHY_VARS_NR_UE *ue, uint8_t gNB_id, UE_nr_rxtx_proc_
}
int max_code_rate = 0;
int Q_m = BITS_PER_SYMBOL_QPSK; /* default pucch modulation type is QPSK with 2 bits per symbol */
//int Q_m = BITS_PER_SYMBOL_QPSK; /* default pucch modulation type is QPSK with 2 bits per symbol */
int N_sc_ctrl_RB = 0;
int O_CRC = 0;
@@ -426,18 +476,18 @@ bool pucch_procedures_ue_nr(PHY_VARS_NR_UE *ue, uint8_t gNB_id, UE_nr_rxtx_proc_
case pucch_format3_nr:
{
nb_of_prbs = pucch_resource->format.choice.format3->nrofPRBs;
if (mac->ULbwp[bwp_id-1]->bwp_Dedicated->pucch_Config->choice.setup->format3->choice.setup->pi2BPSK[0] == 1) {
Q_m = BITS_PER_SYMBOL_BPSK; /* set bpsk modulation type with 1 bit per modulation symbol */
}
//if (mac->ULbwp[bwp_id-1]->bwp_Dedicated->pucch_Config->choice.setup->format3->choice.setup->pi2BPSK[0] == 1) {
// Q_m = BITS_PER_SYMBOL_BPSK; /* set bpsk modulation type with 1 bit per modulation symbol */
//}
N_sc_ctrl_RB = N_SC_RB;
nb_symbols = nb_symbols_excluding_dmrs[nb_symbols_total-4][index_additional_dmrs][index_hopping];
break;
}
case pucch_format4_nr:
{
if (mac->ULbwp[bwp_id-1]->bwp_Dedicated->pucch_Config->choice.setup->format4->choice.setup->pi2BPSK[0] == 1) {
Q_m = BITS_PER_SYMBOL_BPSK; /* set bpsk modulation type with 1 bit per modulation symbol */
}
//if (mac->ULbwp[bwp_id-1]->bwp_Dedicated->pucch_Config->choice.setup->format4->choice.setup->pi2BPSK[0] == 1) {
// Q_m = BITS_PER_SYMBOL_BPSK; /* set bpsk modulation type with 1 bit per modulation symbol */
//}
nb_symbols = nb_symbols_excluding_dmrs[nb_symbols_total-4][index_additional_dmrs][index_hopping];
nb_of_prbs = 1;
subframe_number = nr_tti_tx/(ue->frame_parms.slots_per_subframe);//ttis_per_subframe);
@@ -464,26 +514,27 @@ bool pucch_procedures_ue_nr(PHY_VARS_NR_UE *ue, uint8_t gNB_id, UE_nr_rxtx_proc_
/* TS 38.212 6.3.1.2 Code block segmentation and CRC attachment */
/* crc attachment can be done depending of payload size */
if (N_UCI < 11) {
O_CRC = 0; /* no additional crc bits */
}
else if ((N_UCI >= 12) && (N_UCI <= 19)) {
O_CRC = 6; /* number of additional crc bits */
}
else if (N_UCI >= 20) {
O_CRC = 11; /* number of additional crc bits */
}
// if (N_UCI < 11) {
// O_CRC = 0; /* no additional crc bits */
// }
// else if ((N_UCI >= 12) && (N_UCI <= 19)) {
// O_CRC = 6; /* number of additional crc bits */
// }
// else if (N_UCI >= 20) {
// O_CRC = 11; /* number of additional crc bits */
// }
N_UCI = N_UCI + O_CRC;
/* for format 2 and 3, number of prb should be adjusted to minimum value which cope to information size */
if (nb_of_prbs > 1 ) {
/*if (nb_of_prbs > 1 ) {
int nb_prb_min = 0;
int payload_in_bits;
do {
nb_prb_min++;
payload_in_bits = (nb_prb_min * N_sc_ctrl_RB * nb_symbols * Q_m * max_code_rate)/100; /* code rate has been multiplied by 100 */
NR_TST_PHY_PRINTF("PUCCH Adjust number of prb : (N_UCI : %d ) (payload_in_bits : %d) (N_sc_ctrl_RB : %d) (nb_symbols : %d) (Q_m : %d) (max_code_rate*100 : %d) \n",
payload_in_bits = (nb_prb_min * N_sc_ctrl_RB * nb_symbols * Q_m * max_code_rate)/100; */ /* code rate has been multiplied by 100 */
/*NR_TST_PHY_PRINTF("PUCCH Adjust number of prb : (N_UCI : %d ) (payload_in_bits : %d) (N_sc_ctrl_RB : %d) (nb_symbols : %d) (Q_m : %d) (max_code_rate*100 : %d) \n",
N_UCI, payload_in_bits, N_sc_ctrl_RB, nb_symbols, Q_m, max_code_rate);
} while (N_UCI > payload_in_bits);
@@ -494,7 +545,7 @@ bool pucch_procedures_ue_nr(PHY_VARS_NR_UE *ue, uint8_t gNB_id, UE_nr_rxtx_proc_
else {
nb_of_prbs = nb_prb_min;
}
}
}*/
/* TS 38.213 9.2.4 for a positive SR transmission, payload b(0) = 0 */
if ((O_SR == 1) && (format == pucch_format1_nr)) {
@@ -986,7 +1037,10 @@ boolean_t select_pucch_resource(PHY_VARS_NR_UE *ue, NR_UE_MAC_INST_t *mac, uint8
current_resource_id = r_PUCCH;
}
else {
current_resource_id = mac->ULbwp[bwp_id-1]->bwp_Dedicated->pucch_Config->choice.setup->resourceSetToAddModList->list.array[pucch_resource_set_id]->resourceList.list.array[pucch_resource_indicator][0];
if (pucch_resource_set_id !=0 )
current_resource_id = 3; //TBC mac->ULbwp[bwp_id-1]->bwp_Dedicated->pucch_Config->choice.setup->resourceSetToAddModList->list.array[pucch_resource_set_id]->resourceList.list.array[pucch_resource_indicator][0];
else
current_resource_id = 1;
}
}
@@ -1050,7 +1104,7 @@ boolean_t select_pucch_resource(PHY_VARS_NR_UE *ue, NR_UE_MAC_INST_t *mac, uint8
int find_pucch_resource_set(NR_UE_MAC_INST_t *mac, uint8_t gNB_id, int uci_size)
{
int pucch_resource_set_id = 0;
long *pucch_max_pl_bits = NULL;
//long *pucch_max_pl_bits = NULL;
/* from TS 38.331 field maxPayloadMinus1
-- Maximum number of payload bits minus 1 that the UE may transmit using this PUCCH resource set. In a PUCCH occurrence, the UE
@@ -1062,9 +1116,15 @@ int find_pucch_resource_set(NR_UE_MAC_INST_t *mac, uint8_t gNB_id, int uci_size)
/* look for the first resource set which supports uci_size number of bits for payload */
while (pucch_resource_set_id < MAX_NB_OF_PUCCH_RESOURCE_SETS) {
if (mac->ULbwp[bwp_id-1]->bwp_Dedicated->pucch_Config->choice.setup->resourceSetToAddModList->list.array[pucch_resource_set_id] != NULL) {
pucch_max_pl_bits = mac->ULbwp[bwp_id-1]->bwp_Dedicated->pucch_Config->choice.setup->resourceSetToAddModList->list.array[pucch_resource_set_id]->maxPayloadMinus1;
if (uci_size <= (((pucch_max_pl_bits != NULL) ? *pucch_max_pl_bits : 1706) + 1)) {
NR_TST_PHY_PRINTF("PUCCH found resource set %d \n", pucch_resource_set_id);
//pucch_max_pl_bits = mac->ULbwp[bwp_id-1]->bwp_Dedicated->pucch_Config->choice.setup->resourceSetToAddModList->list.array[pucch_resource_set_id]->maxPayloadMinus1;
if (uci_size <= 2) { //TBC rrc (((pucch_max_pl_bits != NULL) ? *pucch_max_pl_bits : 1706) + 1)) {
//NR_TST_PHY_PRINTF("PUCCH found resource set %d max bits %d\n", pucch_resource_set_id, pucch_max_pl_bits);
pucch_resource_set_id = 0;
return (pucch_resource_set_id);
break;
}
else {
pucch_resource_set_id = 1;
return (pucch_resource_set_id);
break;
}
@@ -1096,7 +1156,7 @@ boolean_t check_pucch_format(NR_UE_MAC_INST_t *mac, uint8_t gNB_id, pucch_format
{
pucch_format_nr_t selected_pucch_format;
pucch_format_nr_t selected_pucch_format_second;
NR_SetupRelease_PUCCH_FormatConfig_t *identified_format = NULL;
/*NR_SetupRelease_PUCCH_FormatConfig_t *identified_format = NULL;
switch (format_pucch) {
case pucch_format1_nr:
@@ -1121,12 +1181,12 @@ boolean_t check_pucch_format(NR_UE_MAC_INST_t *mac, uint8_t gNB_id, pucch_format
default:
break;
}
}*/
if ((identified_format != NULL) && (identified_format->choice.setup->nrofSlots[0] != 1)) {
/* if ((identified_format != NULL) && (identified_format->choice.setup->nrofSlots[0] != 1)) {
LOG_E(PHY,"PUCCH not implemented multislots transmission : at line %d in function %s of file %s \n", LINE_FILE , __func__, FILE_NAME);
return (FALSE);
}
}*/
if (nb_symbols_for_tx <= 2) {
if (uci_size <= 2) {
@@ -1247,19 +1307,68 @@ uint32_t dummy_csi_payload = 0;
/* FFS TODO_NR code that should be developed */
int get_csi_nr(PHY_VARS_NR_UE *ue, uint8_t gNB_id, uint32_t *csi_payload)
uint16_t get_nr_csi_bitlen(NR_UE_MAC_INST_t *mac) {
uint16_t csi_bitlen =0;
uint16_t rsrp_bitlen = 0;
uint16_t diff_rsrp_bitlen = 0;
uint16_t nb_ssbri_cri = 0;
uint16_t cri_ssbri_bitlen = 0;
NR_CSI_MeasConfig_t *csi_MeasConfig = mac->scg->spCellConfig->spCellConfigDedicated->csi_MeasConfig->choice.setup;
struct NR_CSI_ResourceConfig__csi_RS_ResourceSetList__nzp_CSI_RS_SSB * nzp_CSI_RS_SSB = csi_MeasConfig->csi_ResourceConfigToAddModList->list.array[0]->csi_RS_ResourceSetList.choice.nzp_CSI_RS_SSB;
uint16_t nb_csi_ssb_report = nzp_CSI_RS_SSB->csi_SSB_ResourceSetList!=NULL ? nzp_CSI_RS_SSB->csi_SSB_ResourceSetList->list.count:0;
if (0 != nb_csi_ssb_report){
uint8_t nb_ssb_resources =0;
if (NULL != csi_MeasConfig->csi_ReportConfigToAddModList->list.array[0]->groupBasedBeamReporting.choice.disabled->nrofReportedRS)
nb_ssbri_cri = *(csi_MeasConfig->csi_ReportConfigToAddModList->list.array[0]->groupBasedBeamReporting.choice.disabled->nrofReportedRS)+1;
else
nb_ssbri_cri = 1;
nb_ssb_resources = csi_MeasConfig->csi_SSB_ResourceSetToAddModList->list.array[0]->csi_SSB_ResourceList.list.count;
if (nb_ssb_resources){
cri_ssbri_bitlen =ceil(log2 (nb_ssb_resources));
rsrp_bitlen = 7;
diff_rsrp_bitlen = 4;
}
else{
cri_ssbri_bitlen =0;
rsrp_bitlen = 0;
diff_rsrp_bitlen = 0;
}
csi_bitlen = ((cri_ssbri_bitlen * nb_ssbri_cri) + rsrp_bitlen +(diff_rsrp_bitlen *(nb_ssbri_cri -1 ))) *nb_csi_ssb_report;
//printf("get csi bitlen %d nb_ssbri_cri %d nb_csi_report %d nb_resources %d\n", csi_bitlen,nb_ssbri_cri ,nb_csi_ssb_report, nb_ssb_resources);
}
return csi_bitlen;
}
int get_csi_nr(NR_UE_MAC_INST_t *mac, PHY_VARS_NR_UE *ue, uint8_t gNB_id, uint32_t *csi_payload)
{
VOID_PARAMETER ue;
VOID_PARAMETER gNB_id;
float rsrp_db[7];
int nElem = 98;
int rsrp_offset = 17;
int csi_status = 0;
csi_status = get_nr_csi_bitlen(mac);
rsrp_db[0] = get_nr_RSRP(0,0,0);
if (dummy_csi_status == 0) {
if (csi_status == 0) {
*csi_payload = 0;
}
else {
*csi_payload = dummy_csi_payload;
*csi_payload = binary_search_float_nr(RSRP_meas_mapping_nr,nElem, rsrp_db[0]) + rsrp_offset;
}
return (dummy_csi_status);
return (csi_status);
}
/* FFS TODO_NR code that should be removed */
@@ -1326,6 +1435,9 @@ int get_ics_pucch(NR_PUCCH_Resource_t *pucch_resource, pucch_format_nr_t format_
case pucch_format1_nr:
return pucch_resource->format.choice.format1->initialCyclicShift;
case pucch_format2_nr:
return 0;
default:
return -1;
openair1/SCHED_NR_UE/pucch_uci_ue_nr.h
+108 -1
View File
@@ -60,6 +60,111 @@
/************** VARIABLES *****************************************/
float RSRP_meas_mapping_nr[98]
#ifdef INIT_VARIABLES_PUCCH_UE_NR_H
= {
-140,
-139,
-138,
-137,
-136,
-135,
-134,
-133,
-132,
-131,
-130,
-129,
-128,
-127,
-126,
-125,
-124,
-123,
-122,
-121,
-120,
-119,
-118,
-117,
-116,
-115,
-114,
-113,
-112,
-111,
-110,
-109,
-108,
-107,
-106,
-105,
-104,
-103,
-102,
-101,
-100,
-99,
-98,
-97,
-96,
-95,
-94,
-93,
-92,
-91,
-90,
-89,
-88,
-87,
-86,
-85,
-84,
-83,
-82,
-81,
-80,
-79,
-78,
-77,
-76,
-75,
-74,
-73,
-72,
-71,
-70,
-69,
-68,
-67,
-66,
-65,
-64,
-63,
-62,
-61,
-60,
-59,
-58,
-57,
-56,
-55,
-54,
-53,
-52,
-51,
-50,
-49,
-48,
-47,
-46,
-45,
-44,
-43
}
#endif
;
/* TS 36.213 Table 9.2.1-1: PUCCH resource sets before dedicated PUCCH resource configuration */
const initial_pucch_resource_t initial_pucch_resource[NB_INITIAL_PUCCH_RESOURCE]
#ifdef INIT_VARIABLES_PUCCH_UE_NR_H
@@ -226,12 +331,14 @@ int trigger_periodic_scheduling_request(PHY_VARS_NR_UE *ue, uint8_t gNB_id, UE_n
@param csi_payload is updated with CSI
@returns number of bits of CSI */
int get_csi_nr(PHY_VARS_NR_UE *ue, uint8_t gNB_id, uint32_t *csi_payload);
int get_csi_nr(NR_UE_MAC_INST_t *mac, PHY_VARS_NR_UE *ue, uint8_t gNB_id, uint32_t *csi_payload);
/** \brief This dummy function sets current CSI for simulation
@param csi_status
@param csi_payload is updated with CSI
@returns none */
uint16_t get_nr_csi_bitlen(NR_UE_MAC_INST_t *mac);
void set_csi_nr(int csi_status, uint32_t csi_payload);
openair1/SIMULATION/NR_PHY/dlsim.c
+2 -1
View File
@@ -537,13 +537,14 @@ int main(int argc, char **argv)
uint64_t ssb_bitmap;
fill_scc(rrc.carrier.servingcellconfigcommon,&ssb_bitmap,N_RB_DL,N_RB_DL,mu,mu);
fix_scc(scc,ssb_bitmap);
fill_default_secondaryCellGroup(scc,
secondaryCellGroup,
0,
1,
n_tx,
0);
fix_scc(scc,ssb_bitmap);
xer_fprint(stdout, &asn_DEF_NR_CellGroupConfig, (const void*)secondaryCellGroup);
openair1/SIMULATION/NR_PHY/pbchsim.c
+1
View File
@@ -35,6 +35,7 @@
#include "PHY/NR_REFSIG/refsig_defs_ue.h"
#include "PHY/MODULATION/modulation_eNB.h"
#include "PHY/MODULATION/modulation_UE.h"
#include "PHY/MODULATION/nr_modulation.h"
#include "PHY/INIT/phy_init.h"
#include "PHY/NR_TRANSPORT/nr_transport_proto.h"
#include "PHY/NR_UE_TRANSPORT/nr_transport_proto_ue.h"
openair1/SIMULATION/NR_PHY/ulsim.c
+2 -1
View File
@@ -565,13 +565,14 @@ int main(int argc, char **argv)
uint64_t ssb_bitmap;
fill_scc(rrc.carrier.servingcellconfigcommon,&ssb_bitmap,N_RB_DL,N_RB_DL,mu,mu);
fix_scc(scc,ssb_bitmap);
fill_default_secondaryCellGroup(scc,
secondaryCellGroup,
0,
1,
n_tx,
0);
fix_scc(scc,ssb_bitmap);
// xer_fprint(stdout, &asn_DEF_NR_CellGroupConfig, (const void*)secondaryCellGroup);
openair2/LAYER2/NR_MAC_UE/mac_defs.h
+6 -1
View File
@@ -63,7 +63,11 @@
#include "NR_PhysicalCellGroupConfig.h"
#include "NR_CellGroupConfig.h"
#include "NR_ServingCellConfig.h"
#include "NR_MeasConfig.h"
#include "fapi_nr_ue_interface.h"
#include "NR_IF_Module.h"
#include "PHY/defs_nr_common.h"
#include "openair2/LAYER2/NR_MAC_COMMON/nr_mac.h"
#define NB_NR_UE_MAC_INST 1
/*!\brief Maximum number of logical channl group IDs */
@@ -158,6 +162,7 @@ typedef struct {
NR_CellGroupConfig_t *scg;
NR_RACH_ConfigDedicated_t *rach_ConfigDedicated;
int servCellIndex;
NR_CSI_ReportConfig_t *csirc;
//// MAC config
NR_DRX_Config_t *drx_Config;
NR_SchedulingRequestConfig_t *schedulingRequestConfig;
openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c
+1 -1
View File
@@ -538,7 +538,7 @@ int8_t nr_ue_decode_mib(module_id_t module_id,
first_symbol_index = 0;
}
// 38.213 chapter 13: over two consecutive slots
search_space_duration = 2;
//search_space_duration = 2;
}
/// MUX PATTERN 2
openair2/LAYER2/NR_MAC_gNB/config.c
+2
View File
@@ -315,6 +315,7 @@ void config_common(int Mod_idP, int pdsch_AntennaPorts, NR_ServingCellConfigComm
}
int rrc_mac_config_req_gNB(module_id_t Mod_idP,
int ssb_SubcarrierOffset,
int pdsch_AntennaPorts,
@@ -367,6 +368,7 @@ int rrc_mac_config_req_gNB(module_id_t Mod_idP,
if (add_ue == 1 && get_softmodem_params()->phy_test) {
const int UE_id = add_new_nr_ue(Mod_idP,rnti);
UE_info->secondaryCellGroup[UE_id] = secondaryCellGroup;
compute_csi_bitlen (secondaryCellGroup, UE_info, UE_id);
struct NR_ServingCellConfig__downlinkBWP_ToAddModList *bwpList =
secondaryCellGroup->spCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList;
AssertFatal(bwpList->list.count == 1,
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c
+32 -39
View File
@@ -344,9 +344,8 @@ void nr_schedule_pucch(int Mod_idP,
frame_t frameP,
sub_frame_t slotP) {
uint16_t O_uci;
uint16_t O_ack;
uint8_t SR_flag = 0; // no SR in PUCCH implemented for now
uint16_t O_csi, O_ack, O_uci;
uint8_t O_sr = 0; // no SR in PUCCH implemented for now
NR_ServingCellConfigCommon_t *scc = RC.nrmac[Mod_idP]->common_channels->ServingCellConfigCommon;
NR_UE_info_t *UE_info = &RC.nrmac[Mod_idP]->UE_info;
AssertFatal(UE_info->active[UE_id],"Cannot find UE_id %d is not active\n",UE_id);
@@ -359,31 +358,36 @@ void nr_schedule_pucch(int Mod_idP,
NR_sched_pucch *curr_pucch;
for (int k=0; k<nr_ulmix_slots; k++) {
curr_pucch = &UE_info->UE_sched_ctrl[UE_id].sched_pucch[k];
if ((curr_pucch->dai_c > 0) && (frameP == curr_pucch->frame) && (slotP == curr_pucch->ul_slot)) {
UL_tti_req->SFN = curr_pucch->frame;
UL_tti_req->Slot = curr_pucch->ul_slot;
UL_tti_req->pdus_list[UL_tti_req->n_pdus].pdu_type = NFAPI_NR_UL_CONFIG_PUCCH_PDU_TYPE;
UL_tti_req->pdus_list[UL_tti_req->n_pdus].pdu_size = sizeof(nfapi_nr_pucch_pdu_t);
nfapi_nr_pucch_pdu_t *pucch_pdu = &UL_tti_req->pdus_list[UL_tti_req->n_pdus].pucch_pdu;
memset(pucch_pdu,0,sizeof(nfapi_nr_pucch_pdu_t));
UL_tti_req->n_pdus+=1;
for (int l=0; l<2; l++) {
curr_pucch = &UE_info->UE_sched_ctrl[UE_id].sched_pucch[k][l];
O_ack = curr_pucch->dai_c;
O_uci = O_ack; // for now we are just sending acknacks in pucch
O_csi = curr_pucch->csi_bits;
O_uci = O_ack + O_csi + O_sr;
if ((O_uci>0) && (frameP == curr_pucch->frame) && (slotP == curr_pucch->ul_slot)) {
UL_tti_req->SFN = curr_pucch->frame;
UL_tti_req->Slot = curr_pucch->ul_slot;
UL_tti_req->pdus_list[UL_tti_req->n_pdus].pdu_type = NFAPI_NR_UL_CONFIG_PUCCH_PDU_TYPE;
UL_tti_req->pdus_list[UL_tti_req->n_pdus].pdu_size = sizeof(nfapi_nr_pucch_pdu_t);
nfapi_nr_pucch_pdu_t *pucch_pdu = &UL_tti_req->pdus_list[UL_tti_req->n_pdus].pucch_pdu;
memset(pucch_pdu,0,sizeof(nfapi_nr_pucch_pdu_t));
UL_tti_req->n_pdus+=1;
LOG_D(MAC, "Scheduling pucch reception for frame %d slot %d\n", frameP, slotP);
LOG_I(MAC,"Scheduling pucch reception for frame %d slot %d with (%d, %d, %d) (SR ACK, CSI) bits\n",
frameP,slotP,O_sr,O_ack,curr_pucch->csi_bits);
nr_configure_pucch(pucch_pdu,
scc,
ubwp,
curr_pucch->resource_indicator,
O_uci,
O_ack,
SR_flag);
nr_configure_pucch(pucch_pdu,
scc,
ubwp,
UE_info->rnti[UE_id],
curr_pucch->resource_indicator,
O_csi,
O_ack,
O_sr);
memset((void *) &UE_info->UE_sched_ctrl[UE_id].sched_pucch[k],
0,
sizeof(NR_sched_pucch));
memset((void *) &UE_info->UE_sched_ctrl[UE_id].sched_pucch[k][l],
0,
sizeof(NR_sched_pucch));
}
}
}
}
@@ -395,6 +399,7 @@ bool is_xlsch_in_slot(uint64_t bitmap, sub_frame_t slot) {
void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
frame_t frame,
sub_frame_t slot){
protocol_ctxt_t ctxt;
PROTOCOL_CTXT_SET_BY_MODULE_ID(&ctxt, module_idP, ENB_FLAG_YES, NOT_A_RNTI, frame, slot,module_idP);
@@ -411,19 +416,6 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
const int num_slots_per_tdd = slots_per_frame[*scc->ssbSubcarrierSpacing] >> (7 - tdd_pattern->dl_UL_TransmissionPeriodicity);
const int nr_ulmix_slots = tdd_pattern->nrofUplinkSlots + (tdd_pattern->nrofUplinkSymbols!=0);
if (slot == 0 && UE_info->active[UE_id]) {
for (int k=0; k<nr_ulmix_slots; k++) {
/* Seems to be covered 384? */
/*memset((void *) &UE_info->UE_sched_ctrl[UE_id].sched_pucch[k],
0,
sizeof(NR_sched_pucch));*/
/* Seems to be covered in line 335? */
/*memset((void *) &UE_info->UE_sched_ctrl[UE_id].sched_pusch[k],
0,
sizeof(NR_sched_pusch));*/
}
}
start_meas(&RC.nrmac[module_idP]->eNB_scheduler);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_gNB_DLSCH_ULSCH_SCHEDULER,VCD_FUNCTION_IN);
@@ -466,8 +458,9 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
// This schedule SR
// TODO
// This schedule CSI
// TODO
// This schedule CSI measurement reporting
if (UE_info->active[UE_id])
nr_csi_meas_reporting(module_idP, UE_id, frame, slot, num_slots_per_tdd, nr_ulmix_slots, slots_per_frame[*scc->ssbSubcarrierSpacing]);
// This schedule RA procedure if not in phy_test mode
// Otherwise already consider 5G already connected
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c
+92 -56
View File
@@ -343,68 +343,98 @@ int nr_generate_dlsch_pdu(module_id_t module_idP,
return offset;
}
void handle_nr_uci(NR_UL_IND_t *UL_info, NR_UE_sched_ctrl_t *sched_ctrl, NR_mac_stats_t *stats, int target_snrx10) {
void nr_rx_acknack(nfapi_nr_uci_pusch_pdu_t *uci_pusch,
nfapi_nr_uci_pucch_pdu_format_0_1_t *uci_01,
nfapi_nr_uci_pucch_pdu_format_2_3_4_t *uci_234,
NR_UL_IND_t *UL_info, NR_UE_sched_ctrl_t *sched_ctrl, NR_mac_stats_t *stats) {
// TODO
int max_harq_rounds = 4; // TODO define macro
int num_ucis = UL_info->uci_ind.num_ucis;
nfapi_nr_uci_t *uci_list = UL_info->uci_ind.uci_list;
for (int i = 0; i < num_ucis; i++) {
switch (uci_list[i].pdu_type) {
case NFAPI_NR_UCI_PDCCH_PDU_TYPE: break;
if (uci_01 != NULL) {
// handle harq
int harq_idx_s = 0;
case NFAPI_NR_UCI_FORMAT_0_1_PDU_TYPE: {
//if (get_softmodem_params()->phy_test == 0) {
nfapi_nr_uci_pucch_pdu_format_0_1_t *uci_pdu = &uci_list[i].pucch_pdu_format_0_1;
// handle harq
int harq_idx_s = 0;
// tpc (power control)
sched_ctrl->tpc1 = nr_get_tpc(target_snrx10,uci_pdu->ul_cqi,30);
// iterate over received harq bits
for (int harq_bit = 0; harq_bit < uci_pdu->harq->num_harq; harq_bit++) {
// search for the right harq process
for (int harq_idx = harq_idx_s; harq_idx < NR_MAX_NB_HARQ_PROCESSES; harq_idx++) {
// if the gNB received ack with a good confidence
if ((UL_info->slot-1) == sched_ctrl->harq_processes[harq_idx].feedback_slot) {
if ((uci_pdu->harq->harq_list[harq_bit].harq_value == 1) &&
(uci_pdu->harq->harq_confidence_level == 0)) {
// toggle NDI and reset round
sched_ctrl->harq_processes[harq_idx].ndi ^= 1;
sched_ctrl->harq_processes[harq_idx].round = 0;
}
else
sched_ctrl->harq_processes[harq_idx].round++;
sched_ctrl->harq_processes[harq_idx].is_waiting = 0;
harq_idx_s = harq_idx + 1;
// if the max harq rounds was reached
if (sched_ctrl->harq_processes[harq_idx].round == max_harq_rounds) {
sched_ctrl->harq_processes[harq_idx].ndi ^= 1;
sched_ctrl->harq_processes[harq_idx].round = 0;
stats->dlsch_errors++;
}
break;
}
// if feedback slot processing is aborted
else if (((UL_info->slot-1) > sched_ctrl->harq_processes[harq_idx].feedback_slot) &&
(sched_ctrl->harq_processes[harq_idx].is_waiting)) {
sched_ctrl->harq_processes[harq_idx].round++;
if (sched_ctrl->harq_processes[harq_idx].round == max_harq_rounds) {
sched_ctrl->harq_processes[harq_idx].ndi ^= 1;
sched_ctrl->harq_processes[harq_idx].round = 0;
}
sched_ctrl->harq_processes[harq_idx].is_waiting = 0;
}
}
// iterate over received harq bits
for (int harq_bit = 0; harq_bit < uci_01->harq->num_harq; harq_bit++) {
// search for the right harq process
for (int harq_idx = harq_idx_s; harq_idx < NR_MAX_NB_HARQ_PROCESSES; harq_idx++) {
// if the gNB received ack with a good confidence
if ((UL_info->slot-1) == sched_ctrl->harq_processes[harq_idx].feedback_slot) {
if ((uci_01->harq->harq_list[harq_bit].harq_value == 1) &&
(uci_01->harq->harq_confidence_level == 0)) {
// toggle NDI and reset round
sched_ctrl->harq_processes[harq_idx].ndi ^= 1;
sched_ctrl->harq_processes[harq_idx].round = 0;
}
//}
break;
else
sched_ctrl->harq_processes[harq_idx].round++;
sched_ctrl->harq_processes[harq_idx].is_waiting = 0;
harq_idx_s = harq_idx + 1;
// if the max harq rounds was reached
if (sched_ctrl->harq_processes[harq_idx].round == max_harq_rounds) {
sched_ctrl->harq_processes[harq_idx].ndi ^= 1;
sched_ctrl->harq_processes[harq_idx].round = 0;
stats->dlsch_errors++;
}
break;
}
// if feedback slot processing is aborted
else if (((UL_info->slot-1) > sched_ctrl->harq_processes[harq_idx].feedback_slot) &&
(sched_ctrl->harq_processes[harq_idx].is_waiting)) {
sched_ctrl->harq_processes[harq_idx].round++;
if (sched_ctrl->harq_processes[harq_idx].round == max_harq_rounds) {
sched_ctrl->harq_processes[harq_idx].ndi ^= 1;
sched_ctrl->harq_processes[harq_idx].round = 0;
}
sched_ctrl->harq_processes[harq_idx].is_waiting = 0;
}
}
case NFAPI_NR_UCI_FORMAT_2_3_4_PDU_TYPE: break;
}
}
UL_info->uci_ind.num_ucis = 0;
if (uci_234 != NULL) {
int harq_idx_s = 0;
int acknack;
// iterate over received harq bits
for (int harq_bit = 0; harq_bit < uci_234->harq.harq_bit_len; harq_bit++) {
acknack = ((uci_234->harq.harq_payload[harq_bit>>3])>>harq_bit)&0x01;
for (int harq_idx = harq_idx_s; harq_idx < NR_MAX_NB_HARQ_PROCESSES-1; harq_idx++) {
// if the gNB received ack with a good confidence or if the max harq rounds was reached
if ((UL_info->slot-1) == sched_ctrl->harq_processes[harq_idx].feedback_slot) {
// TODO add some confidence level for when there is no CRC
if ((uci_234->harq.harq_crc != 1) && acknack) {
// toggle NDI and reset round
sched_ctrl->harq_processes[harq_idx].ndi ^= 1;
sched_ctrl->harq_processes[harq_idx].round = 0;
}
else
sched_ctrl->harq_processes[harq_idx].round++;
sched_ctrl->harq_processes[harq_idx].is_waiting = 0;
harq_idx_s = harq_idx + 1;
// if the max harq rounds was reached
if (sched_ctrl->harq_processes[harq_idx].round == max_harq_rounds) {
sched_ctrl->harq_processes[harq_idx].ndi ^= 1;
sched_ctrl->harq_processes[harq_idx].round = 0;
stats->dlsch_errors++;
}
break;
}
// if feedback slot processing is aborted
else if (((UL_info->slot-1) > sched_ctrl->harq_processes[harq_idx].feedback_slot) &&
(sched_ctrl->harq_processes[harq_idx].is_waiting)) {
sched_ctrl->harq_processes[harq_idx].round++;
if (sched_ctrl->harq_processes[harq_idx].round == max_harq_rounds) {
sched_ctrl->harq_processes[harq_idx].ndi ^= 1;
sched_ctrl->harq_processes[harq_idx].round = 0;
}
sched_ctrl->harq_processes[harq_idx].is_waiting = 0;
}
}
}
}
}
int getNrOfSymbols(NR_BWP_Downlink_t *bwp, int tda) {
@@ -505,8 +535,14 @@ void nr_simple_dlsch_preprocessor(module_id_t module_id,
UE_info->num_pdcch_cand[UE_id][cid]++;
/* Find PUCCH occasion */
nr_update_pucch_scheduling(
module_id, UE_id, frame, slot, num_slots_per_tdd, &sched_ctrl->pucch_sched_idx);
nr_acknack_scheduling(module_id,
UE_id,
frame,
slot,
num_slots_per_tdd,
&sched_ctrl->pucch_sched_idx,
&sched_ctrl->pucch_occ_idx);
AssertFatal(sched_ctrl->pucch_sched_idx >= 0, "no uplink slot for PUCCH found!\n");
uint8_t *vrb_map = RC.nrmac[module_id]->common_channels[CC_id].vrb_map;
@@ -634,7 +670,7 @@ void nr_schedule_ue_spec(module_id_t module_id,
const int current_harq_pid = sched_ctrl->current_harq_pid;
NR_UE_harq_t *harq = &sched_ctrl->harq_processes[current_harq_pid];
NR_sched_pucch *pucch = &sched_ctrl->sched_pucch[sched_ctrl->pucch_sched_idx];
NR_sched_pucch *pucch = &sched_ctrl->sched_pucch[sched_ctrl->pucch_sched_idx][sched_ctrl->pucch_occ_idx];
harq->feedback_slot = pucch->ul_slot;
harq->is_waiting = 1;
UE_info->mac_stats[UE_id].dlsch_rounds[harq->round]++;
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c
-1
View File
@@ -369,7 +369,6 @@ int configure_fapi_dl_pdu_phytest(int Mod_idP,
dci_pdu_rel15[0].ndi = UE_info->UE_sched_ctrl[UE_id].harq_processes[current_harq_pid].ndi;
// DAI
dci_pdu_rel15[0].dai[0].val = (pucch_sched->dai_c-1)&3;
// TPC for PUCCH
dci_pdu_rel15[0].tpc = UE_info->UE_sched_ctrl[UE_id].tpc1; // table 7.2.1-1 in 38.213
// PUCCH resource indicator
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c
+410 -38
View File
@@ -735,10 +735,11 @@ void nr_configure_pdcch(gNB_MAC_INST *nr_mac,
void nr_configure_pucch(nfapi_nr_pucch_pdu_t* pucch_pdu,
NR_ServingCellConfigCommon_t *scc,
NR_BWP_Uplink_t *bwp,
uint16_t rnti,
uint8_t pucch_resource,
uint16_t O_uci,
uint16_t O_csi,
uint16_t O_ack,
uint8_t SR_flag) {
uint8_t O_sr) {
NR_PUCCH_Config_t *pucch_Config;
NR_PUCCH_Resource_t *pucchres;
@@ -753,6 +754,8 @@ void nr_configure_pucch(nfapi_nr_pucch_pdu_t* pucch_pdu,
pucch_pdu->bit_len_harq = O_ack;
uint16_t O_uci = O_csi + O_ack;
if (bwp) { // This is not the InitialBWP
NR_PUSCH_Config_t *pusch_Config = bwp->bwp_Dedicated->pusch_Config->choice.setup;
@@ -815,7 +818,7 @@ void nr_configure_pucch(nfapi_nr_pucch_pdu_t* pucch_pdu,
else
AssertFatal(1==0,"Couldn't fine pucch resource indicator %d in PUCCH resource set %d for %d UCI bits",pucch_resource,i,O_uci);
}
else {
if (pucchresset->pucch_ResourceSetId == 1 && O_uci>2) {
N3 = pucchresset->maxPayloadMinus1!= NULL ? *pucchresset->maxPayloadMinus1 : 1706;
if (N2<O_uci && N3>O_uci) {
if (pucch_resource < n_list)
@@ -841,6 +844,7 @@ void nr_configure_pucch(nfapi_nr_pucch_pdu_t* pucch_pdu,
if (pucchres->pucch_ResourceId == *resource_id) {
res_found = 1;
pucch_pdu->prb_start = pucchres->startingPRB;
pucch_pdu->rnti = rnti;
// FIXME why there is only one frequency hopping flag
// what about inter slot frequency hopping?
pucch_pdu->freq_hop_flag = pucchres->intraSlotFrequencyHopping!= NULL ? 1 : 0;
@@ -851,7 +855,7 @@ void nr_configure_pucch(nfapi_nr_pucch_pdu_t* pucch_pdu,
pucch_pdu->initial_cyclic_shift = pucchres->format.choice.format0->initialCyclicShift;
pucch_pdu->nr_of_symbols = pucchres->format.choice.format0->nrofSymbols;
pucch_pdu->start_symbol_index = pucchres->format.choice.format0->startingSymbolIndex;
pucch_pdu->sr_flag = SR_flag;
pucch_pdu->sr_flag = O_sr;
break;
case NR_PUCCH_Resource__format_PR_format1 :
pucch_pdu->format_type = 1;
@@ -859,21 +863,23 @@ void nr_configure_pucch(nfapi_nr_pucch_pdu_t* pucch_pdu,
pucch_pdu->nr_of_symbols = pucchres->format.choice.format1->nrofSymbols;
pucch_pdu->start_symbol_index = pucchres->format.choice.format1->startingSymbolIndex;
pucch_pdu->time_domain_occ_idx = pucchres->format.choice.format1->timeDomainOCC;
pucch_pdu->sr_flag = SR_flag;
pucch_pdu->sr_flag = O_sr;
break;
case NR_PUCCH_Resource__format_PR_format2 :
pucch_pdu->format_type = 2;
pucch_pdu->nr_of_symbols = pucchres->format.choice.format2->nrofSymbols;
pucch_pdu->start_symbol_index = pucchres->format.choice.format2->startingSymbolIndex;
pucch_pdu->prb_size = pucchres->format.choice.format2->nrofPRBs;
pucch_pdu->data_scrambling_id = pusch_id!= NULL ? *pusch_id : *scc->physCellId;
pucch_pdu->dmrs_scrambling_id = id0!= NULL ? *id0 : *scc->physCellId;
pucch_pdu->prb_size = compute_pucch_prb_size(2,pucchres->format.choice.format2->nrofPRBs,
O_uci+O_sr,O_csi,pucch_Config->format2->choice.setup->maxCodeRate,
2,pucchres->format.choice.format2->nrofSymbols,8);
pucch_pdu->bit_len_csi_part1 = O_csi;
break;
case NR_PUCCH_Resource__format_PR_format3 :
pucch_pdu->format_type = 3;
pucch_pdu->nr_of_symbols = pucchres->format.choice.format3->nrofSymbols;
pucch_pdu->start_symbol_index = pucchres->format.choice.format3->startingSymbolIndex;
pucch_pdu->prb_size = pucchres->format.choice.format3->nrofPRBs;
pucch_pdu->data_scrambling_id = pusch_id!= NULL ? *pusch_id : *scc->physCellId;
if (pucch_Config->format3 == NULL) {
pucch_pdu->pi_2bpsk = 0;
@@ -884,6 +890,19 @@ void nr_configure_pucch(nfapi_nr_pucch_pdu_t* pucch_pdu,
pucch_pdu->pi_2bpsk = pucchfmt->pi2BPSK!= NULL ? 1 : 0;
pucch_pdu->add_dmrs_flag = pucchfmt->additionalDMRS!= NULL ? 1 : 0;
}
int f3_dmrs_symbols;
if (pucchres->format.choice.format3->nrofSymbols==4)
f3_dmrs_symbols = 1<<pucch_pdu->freq_hop_flag;
else {
if(pucchres->format.choice.format3->nrofSymbols<10)
f3_dmrs_symbols = 2;
else
f3_dmrs_symbols = 2<<pucch_pdu->add_dmrs_flag;
}
pucch_pdu->prb_size = compute_pucch_prb_size(3,pucchres->format.choice.format3->nrofPRBs,
O_uci+O_sr,O_csi,pucch_Config->format3->choice.setup->maxCodeRate,
2-pucch_pdu->pi_2bpsk,pucchres->format.choice.format3->nrofSymbols-f3_dmrs_symbols,12);
pucch_pdu->bit_len_csi_part1 = O_csi;
break;
case NR_PUCCH_Resource__format_PR_format4 :
pucch_pdu->format_type = 4;
@@ -901,6 +920,7 @@ void nr_configure_pucch(nfapi_nr_pucch_pdu_t* pucch_pdu,
pucch_pdu->pi_2bpsk = pucchfmt->pi2BPSK!= NULL ? 1 : 0;
pucch_pdu->add_dmrs_flag = pucchfmt->additionalDMRS!= NULL ? 1 : 0;
}
pucch_pdu->bit_len_csi_part1 = O_csi;
break;
default :
AssertFatal(1==0,"Undefined PUCCH format \n");
@@ -916,6 +936,84 @@ void nr_configure_pucch(nfapi_nr_pucch_pdu_t* pucch_pdu,
}
uint16_t compute_pucch_prb_size(uint8_t format,
uint8_t nr_prbs,
uint16_t O_tot,
uint16_t O_csi,
NR_PUCCH_MaxCodeRate_t *maxCodeRate,
uint8_t Qm,
uint8_t n_symb,
uint8_t n_re_ctrl) {
uint16_t O_crc;
if (O_tot<12)
O_crc = 0;
else{
if (O_tot<20)
O_crc = 6;
else {
if (O_tot<360)
O_crc = 11;
else
AssertFatal(1==0,"Case for segmented PUCCH not yet implemented");
}
}
int rtimes100;
switch(*maxCodeRate){
case NR_PUCCH_MaxCodeRate_zeroDot08 :
rtimes100 = 8;
break;
case NR_PUCCH_MaxCodeRate_zeroDot15 :
rtimes100 = 15;
break;
case NR_PUCCH_MaxCodeRate_zeroDot25 :
rtimes100 = 25;
break;
case NR_PUCCH_MaxCodeRate_zeroDot35 :
rtimes100 = 35;
break;
case NR_PUCCH_MaxCodeRate_zeroDot45 :
rtimes100 = 45;
break;
case NR_PUCCH_MaxCodeRate_zeroDot60 :
rtimes100 = 60;
break;
case NR_PUCCH_MaxCodeRate_zeroDot80 :
rtimes100 = 80;
break;
default :
AssertFatal(1==0,"Invalid MaxCodeRate");
}
float r = (float)rtimes100/100;
if (O_csi == O_tot) {
if ((O_tot+O_csi)>(nr_prbs*n_re_ctrl*n_symb*Qm*r))
AssertFatal(1==0,"MaxCodeRate %.2f can't support %d UCI bits and %d CRC bits with %d PRBs",
r,O_tot,O_crc,nr_prbs);
else
return nr_prbs;
}
if (format==2){
// TODO fix this for multiple CSI reports
for (int i=1; i<=nr_prbs; i++){
if((O_tot+O_crc)<=(i*n_symb*Qm*n_re_ctrl*r) &&
(O_tot+O_crc)>((i-1)*n_symb*Qm*n_re_ctrl*r))
return i;
}
AssertFatal(1==0,"MaxCodeRate %.2f can't support %d UCI bits and %d CRC bits with at most %d PRBs",
r,O_tot,O_crc,nr_prbs);
}
else{
AssertFatal(1==0,"Not yet implemented");
}
}
void prepare_dci(NR_CellGroupConfig_t *secondaryCellGroup,
dci_pdu_rel15_t *dci_pdu_rel15,
nr_dci_format_t format,
@@ -1686,15 +1784,21 @@ int add_new_nr_ue(module_id_t mod_idP, rnti_t rntiP){
memset((void *) &UE_info->UE_sched_ctrl[UE_id],
0,
sizeof(NR_UE_sched_ctrl_t));
UE_info->UE_sched_ctrl[UE_id].ta_timer = 100;
UE_info->UE_sched_ctrl[UE_id].ta_update = 31;
UE_info->UE_sched_ctrl[UE_id].ul_rssi = 0;
UE_info->UE_sched_ctrl[UE_id].sched_pucch = (NR_sched_pucch *)malloc(num_slots_ul*sizeof(NR_sched_pucch));
UE_info->UE_sched_ctrl[UE_id].sched_pucch = (NR_sched_pucch **)malloc(num_slots_ul*sizeof(NR_sched_pucch *));
for (int s=0; s<num_slots_ul;s++)
UE_info->UE_sched_ctrl[UE_id].sched_pucch[s] = (NR_sched_pucch *)malloc(2*sizeof(NR_sched_pucch));
UE_info->UE_sched_ctrl[UE_id].sched_pusch = (NR_sched_pusch *)malloc(num_slots_ul*sizeof(NR_sched_pusch));
for (int k=0; k<num_slots_ul; k++) {
memset((void *) &UE_info->UE_sched_ctrl[UE_id].sched_pucch[k],
0,
sizeof(NR_sched_pucch));
for (int l=0; l<2; l++)
memset((void *) &UE_info->UE_sched_ctrl[UE_id].sched_pucch[k][l],
0,
sizeof(NR_sched_pucch));
memset((void *) &UE_info->UE_sched_ctrl[UE_id].sched_pusch[k],
0,
sizeof(NR_sched_pusch));
@@ -1817,50 +1921,302 @@ void get_pdsch_to_harq_feedback(int Mod_idP,
}
}
uint16_t nr_get_csi_bitlen(int Mod_idP,
int UE_id,
uint8_t csi_report_id) {
uint16_t csi_bitlen =0;
NR_UE_info_t *UE_info = &RC.nrmac[Mod_idP]->UE_info;
CRI_SSBRI_RSRP_bitlen_t * CSI_report_bitlen = NULL;
CSI_report_bitlen = &(UE_info->csi_report_template[UE_id][csi_report_id].CSI_report_bitlen[0]);
csi_bitlen = ((CSI_report_bitlen->cri_ssbri_bitlen * CSI_report_bitlen->nb_ssbri_cri) +
CSI_report_bitlen->rsrp_bitlen +(CSI_report_bitlen->diff_rsrp_bitlen *
(CSI_report_bitlen->nb_ssbri_cri -1 )) *UE_info->csi_report_template[UE_id][csi_report_id].nb_of_csi_ssb_report);
return csi_bitlen;
}
void csi_period_offset(NR_CSI_ReportConfig_t *csirep,
int *period, int *offset) {
NR_CSI_ReportPeriodicityAndOffset_PR p_and_o = csirep->reportConfigType.choice.periodic->reportSlotConfig.present;
switch(p_and_o){
case NR_CSI_ReportPeriodicityAndOffset_PR_slots4:
*period = 4;
*offset = csirep->reportConfigType.choice.periodic->reportSlotConfig.choice.slots4;
break;
case NR_CSI_ReportPeriodicityAndOffset_PR_slots5:
*period = 5;
*offset = csirep->reportConfigType.choice.periodic->reportSlotConfig.choice.slots5;
break;
case NR_CSI_ReportPeriodicityAndOffset_PR_slots8:
*period = 8;
*offset = csirep->reportConfigType.choice.periodic->reportSlotConfig.choice.slots8;
break;
case NR_CSI_ReportPeriodicityAndOffset_PR_slots10:
*period = 10;
*offset = csirep->reportConfigType.choice.periodic->reportSlotConfig.choice.slots10;
break;
case NR_CSI_ReportPeriodicityAndOffset_PR_slots16:
*period = 16;
*offset = csirep->reportConfigType.choice.periodic->reportSlotConfig.choice.slots16;
break;
case NR_CSI_ReportPeriodicityAndOffset_PR_slots20:
*period = 20;
*offset = csirep->reportConfigType.choice.periodic->reportSlotConfig.choice.slots20;
break;
case NR_CSI_ReportPeriodicityAndOffset_PR_slots40:
*period = 40;
*offset = csirep->reportConfigType.choice.periodic->reportSlotConfig.choice.slots40;
break;
case NR_CSI_ReportPeriodicityAndOffset_PR_slots80:
*period = 80;
*offset = csirep->reportConfigType.choice.periodic->reportSlotConfig.choice.slots80;
break;
case NR_CSI_ReportPeriodicityAndOffset_PR_slots160:
*period = 160;
*offset = csirep->reportConfigType.choice.periodic->reportSlotConfig.choice.slots160;
break;
case NR_CSI_ReportPeriodicityAndOffset_PR_slots320:
*period = 320;
*offset = csirep->reportConfigType.choice.periodic->reportSlotConfig.choice.slots320;
break;
default:
AssertFatal(1==0,"No periodicity and offset resource found in CSI report");
}
}
//!TODO : same function can be written to handle csi_resources
void compute_csi_bitlen (NR_CellGroupConfig_t *secondaryCellGroup, NR_UE_info_t *UE_info, int UE_id) {
uint8_t csi_report_id = 0;
uint8_t csi_resourceidx =0;
uint8_t csi_ssb_idx =0;
NR_CSI_MeasConfig_t *csi_MeasConfig = secondaryCellGroup->spCellConfig->spCellConfigDedicated->csi_MeasConfig->choice.setup;
NR_CSI_ResourceConfigId_t csi_ResourceConfigId;
for (csi_report_id=0; csi_report_id < csi_MeasConfig->csi_ReportConfigToAddModList->list.count; csi_report_id++){
csi_ResourceConfigId=csi_MeasConfig->csi_ReportConfigToAddModList->list.array[csi_report_id]->resourcesForChannelMeasurement;
UE_info->csi_report_template[UE_id][csi_report_id].reportQuantity_type = csi_MeasConfig->csi_ReportConfigToAddModList->list.array[csi_report_id]->reportQuantity.present;
for ( csi_resourceidx = 0; csi_resourceidx < csi_MeasConfig->csi_ResourceConfigToAddModList->list.count; csi_resourceidx++) {
if ( csi_MeasConfig->csi_ResourceConfigToAddModList->list.array[csi_resourceidx]->csi_ResourceConfigId != csi_ResourceConfigId)
continue;
else {
//Finding the CSI_RS or SSB Resources
UE_info->csi_report_template[UE_id][csi_report_id].CSI_Resource_type= csi_MeasConfig->csi_ResourceConfigToAddModList->list.array[csi_resourceidx]->csi_RS_ResourceSetList.present;
if (NR_CSI_ResourceConfig__csi_RS_ResourceSetList_PR_nzp_CSI_RS_SSB ==UE_info->csi_report_template[UE_id][csi_report_id].CSI_Resource_type){
struct NR_CSI_ResourceConfig__csi_RS_ResourceSetList__nzp_CSI_RS_SSB * nzp_CSI_RS_SSB = csi_MeasConfig->csi_ResourceConfigToAddModList->list.array[csi_resourceidx]->csi_RS_ResourceSetList.choice.nzp_CSI_RS_SSB;
UE_info->csi_report_template[UE_id][csi_report_id].nb_of_nzp_csi_report = nzp_CSI_RS_SSB->nzp_CSI_RS_ResourceSetList!=NULL ? nzp_CSI_RS_SSB->nzp_CSI_RS_ResourceSetList->list.count:0;
UE_info->csi_report_template[UE_id][csi_report_id].nb_of_csi_ssb_report = nzp_CSI_RS_SSB->csi_SSB_ResourceSetList!=NULL ? nzp_CSI_RS_SSB->csi_SSB_ResourceSetList->list.count:0;
}
if (0 != UE_info->csi_report_template[UE_id][csi_report_id].nb_of_csi_ssb_report){
uint8_t nb_ssb_resources =0;
for ( csi_ssb_idx = 0; csi_ssb_idx < csi_MeasConfig->csi_SSB_ResourceSetToAddModList->list.count; csi_ssb_idx++) {
if (csi_MeasConfig->csi_SSB_ResourceSetToAddModList->list.array[csi_ssb_idx]->csi_SSB_ResourceSetId ==
*(csi_MeasConfig->csi_ResourceConfigToAddModList->list.array[csi_resourceidx]->csi_RS_ResourceSetList.choice.nzp_CSI_RS_SSB->csi_SSB_ResourceSetList->list.array[0])) { ///We can configure only one SSB resource set from spec 38.331 IE CSI-ResourceConfig
if (NR_CSI_ReportConfig__groupBasedBeamReporting_PR_disabled ==
csi_MeasConfig->csi_ReportConfigToAddModList->list.array[csi_report_id]->groupBasedBeamReporting.present ) {
if (NULL != csi_MeasConfig->csi_ReportConfigToAddModList->list.array[csi_report_id]->groupBasedBeamReporting.choice.disabled->nrofReportedRS)
UE_info->csi_report_template[UE_id][csi_report_id].CSI_report_bitlen[0].nb_ssbri_cri = *(csi_MeasConfig->csi_ReportConfigToAddModList->list.array[csi_report_id]->groupBasedBeamReporting.choice.disabled->nrofReportedRS)+1;
else
/*! From Spec 38.331
* nrofReportedRS
* The number (N) of measured RS resources to be reported per report setting in a non-group-based report. N <= N_max, where N_max is either 2 or 4 depending on UE
* capability. FFS: The signaling mechanism for the gNB to select a subset of N beams for the UE to measure and report.
* When the field is absent the UE applies the value 1
*/
UE_info->csi_report_template[UE_id][csi_report_id].CSI_report_bitlen[0].nb_ssbri_cri= 1;
}else
UE_info->csi_report_template[UE_id][csi_report_id].CSI_report_bitlen[0].nb_ssbri_cri= 2;
nb_ssb_resources= csi_MeasConfig->csi_SSB_ResourceSetToAddModList->list.array[csi_ssb_idx]->csi_SSB_ResourceList.list.count;
if (nb_ssb_resources){
UE_info->csi_report_template[UE_id][csi_report_id].CSI_report_bitlen[0].cri_ssbri_bitlen =ceil(log2 (nb_ssb_resources));
UE_info->csi_report_template[UE_id][csi_report_id].CSI_report_bitlen[0].rsrp_bitlen = 7; //From spec 38.212 Table 6.3.1.1.2-6: CRI, SSBRI, and RSRP
UE_info->csi_report_template[UE_id][csi_report_id].CSI_report_bitlen[0].diff_rsrp_bitlen =4; //From spec 38.212 Table 6.3.1.1.2-6: CRI, SSBRI, and RSRP
}
else{
UE_info->csi_report_template[UE_id][csi_report_id].CSI_report_bitlen[0].cri_ssbri_bitlen =0;
UE_info->csi_report_template[UE_id][csi_report_id].CSI_report_bitlen[0].rsrp_bitlen = 0;
UE_info->csi_report_template[UE_id][csi_report_id].CSI_report_bitlen[0].diff_rsrp_bitlen =0;
}
LOG_I (MAC, "UCI: CSI_bit len : ssbri %d, rsrp: %d, diff_rsrp: %d",
UE_info->csi_report_template[UE_id][csi_report_id].CSI_report_bitlen[0].cri_ssbri_bitlen,
UE_info->csi_report_template[UE_id][csi_report_id].CSI_report_bitlen[0].rsrp_bitlen,
UE_info->csi_report_template[UE_id][csi_report_id].CSI_report_bitlen[0].diff_rsrp_bitlen);
break ;
}
}
}
if (0 != UE_info->csi_report_template[UE_id][csi_report_id].nb_of_nzp_csi_report){
AssertFatal(1==0,"Currently configuring only SSB beamreporting.");
}
break;
}
}
}
}
void nr_csi_meas_reporting(int Mod_idP,
int UE_id,
frame_t frame,
sub_frame_t slot,
int slots_per_tdd,
int ul_slots,
int n_slots_frame) {
NR_UE_info_t *UE_info = &RC.nrmac[Mod_idP]->UE_info;
NR_sched_pucch *curr_pucch;
NR_PUCCH_ResourceSet_t *pucchresset;
NR_CSI_ReportConfig_t *csirep;
NR_CellGroupConfig_t *secondaryCellGroup = UE_info->secondaryCellGroup[UE_id];
NR_CSI_MeasConfig_t *csi_measconfig = secondaryCellGroup->spCellConfig->spCellConfigDedicated->csi_MeasConfig->choice.setup;
NR_BWP_Uplink_t *ubwp=secondaryCellGroup->spCellConfig->spCellConfigDedicated->uplinkConfig->uplinkBWP_ToAddModList->list.array[0];
NR_PUCCH_Config_t *pucch_Config = ubwp->bwp_Dedicated->pucch_Config->choice.setup;
AssertFatal(csi_measconfig->csi_ReportConfigToAddModList->list.count>0,"NO CSI report configuration available");
for (int csi_report_id = 0; csi_report_id < csi_measconfig->csi_ReportConfigToAddModList->list.count; csi_report_id++){
csirep = csi_measconfig->csi_ReportConfigToAddModList->list.array[csi_report_id];
AssertFatal(csirep->reportConfigType.choice.periodic!=NULL,"Only periodic CSI reporting is implemented currently");
int period, offset, sched_slot;
csi_period_offset(csirep,&period,&offset);
sched_slot = (period+offset)%n_slots_frame;
// prepare to schedule csi measurement reception according to 5.2.1.4 in 38.214
// preparation is done in first slot of tdd period
if ( (frame%(period/n_slots_frame)==(offset/n_slots_frame)) && (slot==((sched_slot/slots_per_tdd)*slots_per_tdd))) {
// we are scheduling pucch for csi in the first pucch occasion (this comes before ack/nack)
curr_pucch = &UE_info->UE_sched_ctrl[UE_id].sched_pucch[sched_slot-slots_per_tdd+ul_slots][0];
NR_PUCCH_CSI_Resource_t *pucchcsires = csirep->reportConfigType.choice.periodic->pucch_CSI_ResourceList.list.array[0];
int found = -1;
pucchresset = pucch_Config->resourceSetToAddModList->list.array[1]; // set with formats >1
int n_list = pucchresset->resourceList.list.count;
for (int i=0; i<n_list; i++) {
if (*pucchresset->resourceList.list.array[i] == pucchcsires->pucch_Resource)
found = i;
}
AssertFatal(found>-1,"CSI resource not found among PUCCH resources");
curr_pucch->resource_indicator = found;
n_list = pucch_Config->resourceToAddModList->list.count;
// going through the list of PUCCH resources to find the one indexed by resource_id
for (int i=0; i<n_list; i++) {
NR_PUCCH_Resource_t *pucchres = pucch_Config->resourceToAddModList->list.array[i];
if (pucchres->pucch_ResourceId == *pucchresset->resourceList.list.array[found]) {
switch(pucchres->format.present){
case NR_PUCCH_Resource__format_PR_format2:
if (pucch_Config->format2->choice.setup->simultaneousHARQ_ACK_CSI == NULL)
curr_pucch->simultaneous_harqcsi = false;
else
curr_pucch->simultaneous_harqcsi = true;
break;
case NR_PUCCH_Resource__format_PR_format3:
if (pucch_Config->format3->choice.setup->simultaneousHARQ_ACK_CSI == NULL)
curr_pucch->simultaneous_harqcsi = false;
else
curr_pucch->simultaneous_harqcsi = true;
break;
case NR_PUCCH_Resource__format_PR_format4:
if (pucch_Config->format4->choice.setup->simultaneousHARQ_ACK_CSI == NULL)
curr_pucch->simultaneous_harqcsi = false;
else
curr_pucch->simultaneous_harqcsi = true;
break;
default:
AssertFatal(1==0,"Invalid PUCCH format type");
}
}
}
curr_pucch->csi_bits += nr_get_csi_bitlen(Mod_idP,UE_id,csi_report_id); // TODO function to compute CSI meas report bit size
curr_pucch->frame = frame;
curr_pucch->ul_slot = sched_slot;
}
}
}
// function to update pucch scheduling parameters in UE list when a USS DL is scheduled
void nr_update_pucch_scheduling(int Mod_idP,
int UE_id,
frame_t frameP,
sub_frame_t slotP,
int slots_per_tdd,
int *pucch_id) {
void nr_acknack_scheduling(int Mod_idP,
int UE_id,
frame_t frameP,
sub_frame_t slotP,
int slots_per_tdd,
int *pucch_id,
int *pucch_occ) {
NR_ServingCellConfigCommon_t *scc = RC.nrmac[Mod_idP]->common_channels->ServingCellConfigCommon;
NR_UE_info_t *UE_info = &RC.nrmac[Mod_idP]->UE_info;
NR_sched_pucch *curr_pucch;
int first_ul_slot_tdd,k,i;
int max_acknacks,pucch_res,first_ul_slot_tdd,k,i,l;
uint8_t pdsch_to_harq_feedback[8];
int found = 0;
int nr_ulmix_slots = scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSlots;
if (scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSymbols!=0)
nr_ulmix_slots++;
bool csi_pres=false;
for (k=0; k<nr_ulmix_slots; k++) {
if(UE_info->UE_sched_ctrl[UE_id].sched_pucch[k][0].csi_bits>0)
csi_pres=true;
}
// As a preference always schedule ack nacks in PUCCH0 (max 2 per slots)
// Unless there is CSI meas reporting scheduled in the period to avoid conflicts in the same slot
if (csi_pres)
max_acknacks=10;
else
max_acknacks=2;
// this is hardcoded for now as ue specific
NR_SearchSpace__searchSpaceType_PR ss_type = NR_SearchSpace__searchSpaceType_PR_ue_Specific;
get_pdsch_to_harq_feedback(Mod_idP,UE_id,ss_type,pdsch_to_harq_feedback);
// for each possible ul or mixed slot
for (k=0; k<nr_ulmix_slots; k++) {
curr_pucch = &UE_info->UE_sched_ctrl[UE_id].sched_pucch[k];
// if there is free room in current pucch structure
if (curr_pucch->dai_c<MAX_ACK_BITS) {
curr_pucch->frame = frameP;
curr_pucch->dai_c++;
curr_pucch->resource_indicator = 0; // in phytest with only 1 UE we are using just the 1st resource
// first pucch occasion in first UL or MIXED slot
first_ul_slot_tdd = scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofDownlinkSlots;
i = 0;
while (i<8 && found == 0) { // look if timing indicator is among allowed values
if (pdsch_to_harq_feedback[i]==(first_ul_slot_tdd+k)-(slotP % slots_per_tdd))
found = 1;
if (found == 0) i++;
}
if (found == 1) {
// computing slot in which pucch is scheduled
curr_pucch->ul_slot = first_ul_slot_tdd + k + (slotP - (slotP % slots_per_tdd));
curr_pucch->timing_indicator = i; // index in the list of timing indicators
*pucch_id = k;
return;
for (l=0; l<1; l++) { // scheduling 2 PUCCH in a single slot does not work with the phone, currently
curr_pucch = &UE_info->UE_sched_ctrl[UE_id].sched_pucch[k][l];
//if it is possible to schedule acknack in current pucch (no exclusive csi pucch)
if ((curr_pucch->csi_bits == 0) || (curr_pucch->simultaneous_harqcsi==true)) {
// if there is free room in current pucch structure
if (curr_pucch->dai_c<max_acknacks) {
pucch_res = get_pucch_resource(UE_info,UE_id,k,l);
if (pucch_res>-1){
curr_pucch->resource_indicator = pucch_res;
curr_pucch->frame = frameP;
// first pucch occasion in first UL or MIXED slot
first_ul_slot_tdd = scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofDownlinkSlots;
i = 0;
while (i<8 && found == 0) { // look if timing indicator is among allowed values
if (pdsch_to_harq_feedback[i]==(first_ul_slot_tdd+k)-(slotP % slots_per_tdd))
found = 1;
if (found == 0) i++;
}
if (found == 1) {
// computing slot in which pucch is scheduled
curr_pucch->dai_c++;
curr_pucch->ul_slot = first_ul_slot_tdd + k + (slotP - (slotP % slots_per_tdd));
curr_pucch->timing_indicator = i; // index in the list of timing indicators
*pucch_id = k;
*pucch_occ = l;
return;
}
}
}
}
}
}
@@ -1868,6 +2224,22 @@ void nr_update_pucch_scheduling(int Mod_idP,
}
int get_pucch_resource(NR_UE_info_t *UE_info,int UE_id,int k,int l) {
// to be updated later, for now simple implementation
// use the second allocation just in case there is csi in the first
// in that case use second resource (for a different symbol) see 9.2 in 38.213
if (l==1) {
if (UE_info->UE_sched_ctrl[UE_id].sched_pucch[k][0].csi_bits==0)
return -1;
else
return 1;
}
else
return 0;
}
void find_aggregation_candidates(uint8_t *aggregation_level,
uint8_t *nr_of_candidates,
NR_SearchSpace_t *ss) {
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c
+1
View File
@@ -340,6 +340,7 @@ void nr_rx_sdu(const module_id_t gnb_mod_idP,
LOG_I(MAC, "reset RA state information for RA-RNTI %04x\n", ra->rnti);
const int UE_id = add_new_nr_ue(gnb_mod_idP, ra->rnti);
UE_info->secondaryCellGroup[UE_id] = ra->secondaryCellGroup;
compute_csi_bitlen (ra->secondaryCellGroup, UE_info, UE_id);
UE_info->UE_beam_index[UE_id] = ra->beam_id;
struct NR_ServingCellConfig__downlinkBWP_ToAddModList *bwpList = ra->secondaryCellGroup->spCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList;
AssertFatal(bwpList->list.count == 1,
openair2/LAYER2/NR_MAC_gNB/mac_proto.h
+36 -10
View File
@@ -36,8 +36,6 @@
#include "LAYER2/NR_MAC_gNB/nr_mac_gNB.h"
#include "NR_TAG-Id.h"
#define MAX_ACK_BITS 2 //only format 0 is available for now
void set_cset_offset(uint16_t);
void mac_top_init_gNB(void);
@@ -163,6 +161,11 @@ int configure_fapi_dl_pdu_phytest(int Mod_id,
uint16_t *rbSize,
uint16_t *rbStart);
void nr_rx_acknack(nfapi_nr_uci_pusch_pdu_t *uci_pusch,
nfapi_nr_uci_pucch_pdu_format_0_1_t *uci_01,
nfapi_nr_uci_pucch_pdu_format_2_3_4_t *uci_234,
NR_UL_IND_t *UL_info, NR_UE_sched_ctrl_t *sched_ctrl, NR_mac_stats_t *stats);
void config_uldci(NR_BWP_Uplink_t *ubwp,
nfapi_nr_pusch_pdu_t *pusch_pdu,
nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15,
@@ -198,12 +201,23 @@ void nr_schedule_pucch(int Mod_idP,
frame_t frameP,
sub_frame_t slotP);
void nr_update_pucch_scheduling(int Mod_idP,
int UE_id,
frame_t frameP,
sub_frame_t slotP,
int slots_per_tdd,
int *pucch_id);
void nr_csi_meas_reporting(int Mod_idP,
int UE_id,
frame_t frameP,
sub_frame_t slotP,
int slots_per_tdd,
int ul_slots,
int n_slots_frame);
void nr_acknack_scheduling(int Mod_idP,
int UE_id,
frame_t frameP,
sub_frame_t slotP,
int slots_per_tdd,
int *pucch_id,
int *pucch_occ);
int get_pucch_resource(NR_UE_info_t *UE_info,int UE_id,int k,int l);
void get_pdsch_to_harq_feedback(int Mod_idP,
int UE_id,
@@ -232,10 +246,11 @@ int nr_is_dci_opportunity(nfapi_nr_search_space_t search_space,
void nr_configure_pucch(nfapi_nr_pucch_pdu_t* pucch_pdu,
NR_ServingCellConfigCommon_t *scc,
NR_BWP_Uplink_t *bwp,
uint16_t rnti,
uint8_t pucch_resource,
uint16_t O_uci,
uint16_t O_csi,
uint16_t O_ack,
uint8_t SR_flag);
uint8_t O_sr);
void find_search_space(int ss_type,
NR_BWP_Downlink_t *bwp,
@@ -320,6 +335,17 @@ int allocate_nr_CCEs(gNB_MAC_INST *nr_mac,
int m,
int nr_of_candidates);
uint16_t compute_pucch_prb_size(uint8_t format,
uint8_t nr_prbs,
uint16_t O_tot,
uint16_t O_csi,
NR_PUCCH_MaxCodeRate_t *maxCodeRate,
uint8_t Qm,
uint8_t n_symb,
uint8_t n_re_ctrl);
void compute_csi_bitlen (NR_CellGroupConfig_t *secondaryCellGroup, NR_UE_info_t *UE_info, int UE_id);
int get_dlscs(nfapi_nr_config_request_t *cfg);
int get_ulscs(nfapi_nr_config_request_t *cfg);
openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h
+26 -2
View File
@@ -274,10 +274,12 @@ typedef struct UE_info {
typedef struct NR_sched_pucch {
int frame;
int ul_slot;
bool sr_flag;
int csi_bits;
bool simultaneous_harqcsi;
uint8_t dai_c;
uint8_t timing_indicator;
uint8_t resource_indicator;
bool active;
} NR_sched_pucch;
typedef struct NR_sched_pusch {
@@ -315,6 +317,25 @@ typedef struct NR_UE_ul_harq {
NR_UL_harq_states_t state;
} NR_UE_ul_harq_t;
typedef struct {
uint8_t nb_ssbri_cri;
uint8_t cri_ssbri_bitlen;
uint8_t rsrp_bitlen;
uint8_t diff_rsrp_bitlen;
}CRI_SSBRI_RSRP_bitlen_t;
#define MAX_CSI_RESOURCE_SET_IN_CSI_RESOURCE_CONFIG 16
typedef struct nr_csi_report {
NR_CSI_ReportConfig__reportQuantity_PR reportQuantity_type;
NR_CSI_ResourceConfig__csi_RS_ResourceSetList_PR CSI_Resource_type;
uint8_t nb_of_nzp_csi_report;
uint8_t nb_of_csi_ssb_report;
CRI_SSBRI_RSRP_bitlen_t CSI_report_bitlen[MAX_CSI_RESOURCE_SET_IN_CSI_RESOURCE_CONFIG];
} nr_csi_report_t;
/*! \brief scheduling control information set through an API */
typedef struct {
/// total amount of data awaiting for this UE
@@ -324,9 +345,10 @@ typedef struct {
/// the currently active BWP in DL
NR_BWP_Downlink_t *active_bwp;
NR_sched_pucch *sched_pucch;
NR_sched_pucch **sched_pucch;
/// selected PUCCH index, if scheduled
int pucch_sched_idx;
int pucch_occ_idx;
NR_sched_pusch *sched_pusch;
/// CCE index and aggregation, should be coherent with cce_list
@@ -385,9 +407,11 @@ typedef struct {
} NR_UE_list_t;
/*! \brief UE list used by gNB to order UEs/CC for scheduling*/
#define MAX_CSI_REPORTCONFIG 48
typedef struct {
DLSCH_PDU DLSCH_pdu[4][MAX_MOBILES_PER_GNB];
/// scheduling control info
nr_csi_report_t csi_report_template[MAX_MOBILES_PER_GNB][MAX_CSI_REPORTCONFIG];
NR_UE_sched_ctrl_t UE_sched_ctrl[MAX_MOBILES_PER_GNB];
NR_mac_stats_t mac_stats[MAX_MOBILES_PER_GNB];
NR_UE_list_t list;
openair2/NR_PHY_INTERFACE/NR_IF_Module.c
+38
View File
@@ -79,6 +79,44 @@ void handle_nr_rach(NR_UL_IND_t *UL_info) {
}
void handle_nr_uci(NR_UL_IND_t *UL_info, NR_UE_sched_ctrl_t *sched_ctrl, NR_mac_stats_t *stats, int target_snrx10) {
int num_ucis = UL_info->uci_ind.num_ucis;
nfapi_nr_uci_t *uci_list = UL_info->uci_ind.uci_list;
for (int i = 0; i < num_ucis; i++) {
switch (uci_list[i].pdu_type) {
case NFAPI_NR_UCI_PUSCH_PDU_TYPE: break;
case NFAPI_NR_UCI_FORMAT_0_1_PDU_TYPE: {
nfapi_nr_uci_pucch_pdu_format_0_1_t *uci_pdu = &uci_list[i].pucch_pdu_format_0_1;
// tpc (power control)
sched_ctrl->tpc1 = nr_get_tpc(target_snrx10,uci_pdu->ul_cqi,30);
if( (uci_pdu->pduBitmap>>1) & 0x01)
nr_rx_acknack(NULL,uci_pdu,NULL,UL_info,sched_ctrl,stats);
break;
}
case NFAPI_NR_UCI_FORMAT_2_3_4_PDU_TYPE: {
nfapi_nr_uci_pucch_pdu_format_2_3_4_t *uci_pdu = &uci_list[i].pucch_pdu_format_2_3_4;
// tpc (power control)
sched_ctrl->tpc1 = nr_get_tpc(target_snrx10,uci_pdu->ul_cqi,30);
if( (uci_pdu->pduBitmap>>1) & 0x01)
nr_rx_acknack(NULL,NULL,uci_pdu,UL_info,sched_ctrl,stats);
break;
}
}
}
UL_info->uci_ind.num_ucis = 0;
}
void handle_nr_ulsch(NR_UL_IND_t *UL_info, NR_UE_sched_ctrl_t *sched_ctrl, NR_mac_stats_t *stats) {
if(nfapi_mode == 1) {
openair2/RRC/NR/rrc_gNB_reconfig.c
+94 -951
View File
File diff suppressed because it is too large Load Diff