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feat(oran_fhlib_5g): Adapt oran_fhlib_5g for K release

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Adapt the oran_fhlib_5g code to compile with xran K release.
Like previously E and F, uses preprocessor directives to separate codes for different xran releases.

Notes:
1. Release K of the FHI library supports many numerologies on one instance.
   As of now the integration supports only one numerology.
2. Several arrays in the xran interface are indexed by the numerology.
   It was ambiguous whether they were indexed by the actual numerology number or by the index of the relevant numerology within the numerology array.
   They are actually indexed by the numerology number so that when one is using only numerlogy 1 for example, he should only use perMu[1], fftSize[1], ...

Signed-off-by: Teodora Vladić <teodora.vladic@openairinterface.org>
This commit is contained in:
Teodora Vladić
2026-04-23 10:06:26 +02:00
parent e7c4d80a5d
commit 77bb143b04
4 changed files with 471 additions and 88 deletions
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radio/fhi_72/oaioran.c
+83 -9
View File
@@ -35,7 +35,11 @@
// Declare variable useful for the send buffer function
volatile bool first_call_set = false;
int xran_is_prach_slot(uint8_t PortId, uint32_t subframe_id, uint32_t slot_id);
int xran_is_prach_slot(uint8_t PortId, uint32_t subframe_id, uint32_t slot_id
#if defined K_RELEASE
, uint8_t mu
#endif
);
#include "common/utils/LOG/log.h"
#ifndef USE_POLLING
@@ -50,7 +54,11 @@ volatile oran_sync_info_t oran_sync_info = {0};
* timing information and unblock another thread in xran_fh_rx_read_slot()
* through either a message queue, or writing in global memory with polling, on
* a full slot boundary. */
void oai_xran_fh_rx_callback(void *pCallbackTag, xran_status_t status)
void oai_xran_fh_rx_callback(void *pCallbackTag, xran_status_t status
#if defined K_RELEASE
, uint8_t mu
#endif
)
{
struct xran_cb_tag *callback_tag = (struct xran_cb_tag *)pCallbackTag;
@@ -60,9 +68,13 @@ void oai_xran_fh_rx_callback(void *pCallbackTag, xran_status_t status)
const struct xran_fh_init *fh_init = get_xran_fh_init();
int num_ports = fh_init->xran_ports;
#if defined K_RELEASE
const int slots_in_sf = 1 << mu;
#elif defined F_RELEASE
/* assuming all RUs have the same numerology */
const struct xran_fh_config *fh_cfg = get_xran_fh_config(0);
const int slots_in_sf = 1 << fh_cfg->frame_conf.nNumerology;
#endif
const int sf_in_frame = 10;
static int rx_RU[XRAN_PORTS_NUM][160] = {0};
@@ -121,6 +133,9 @@ void oai_xran_fh_rx_callback(void *pCallbackTag, xran_status_t status)
info->tti = tti;
info->sl = slot2;
info->f = frame;
#if defined K_RELEASE
info->mu = mu;
#endif
LOG_D(HW, "Push %d.%d.%d (slot %d, subframe %d,last_slot %d)\n", frame, info->sl, slot, ru_id, subframe, last_slot);
atomic_fetch_add(&xran_queue_length, 1);
pushNotifiedFIFO(&oran_sync_fifo, req);
@@ -129,6 +144,9 @@ void oai_xran_fh_rx_callback(void *pCallbackTag, xran_status_t status)
oran_sync_info.tti = tti;
oran_sync_info.sl = slot2;
oran_sync_info.f = frame;
#if defined K_RELEASE
oran_sync_info.mu = mu;
#endif
#endif
} else
LOG_E(HW, "Cannot Push %d.%d.%d (slot %d, subframe %d,last_slot %d)\n", frame, slot2, ru_id, slot, subframe, last_slot);
@@ -139,7 +157,11 @@ void oai_xran_fh_rx_callback(void *pCallbackTag, xran_status_t status)
/** @details Only used to unblock timing in oai_xran_fh_rx_callback() on first
* call. */
int oai_physide_dl_tti_call_back(void *param)
int oai_physide_dl_tti_call_back(void *param
#if defined K_RELEASE
, uint8_t mu
#endif
)
{
if (!first_call_set)
LOG_I(HW, "first_call set from phy cb\n");
@@ -152,7 +174,11 @@ int oai_physide_dl_tti_call_back(void *param)
* @details Reads PRACH data from xran-specific buffers and, if I/Q compression
* (bitwidth < 16 bits) is configured, uncompresses the data. Places PRACH data
* in OAI buffer. */
static int read_prach_data(ru_info_t *ru, int frame, int slot)
static int read_prach_data(ru_info_t *ru, int frame, int slot
#if defined K_RELEASE
, uint8_t mu
#endif
)
{
/* calculate tti and subframe_id from frame, slot num */
int sym_idx = 0;
@@ -174,7 +200,12 @@ static int read_prach_data(ru_info_t *ru, int frame, int slot)
int prach_start_sym = prach_info.start_symbol;
int prach_end_sym = prach_info.N_dur + prach_start_sym;
struct xran_ru_config *ru_conf = &fh_cfg->ru_conf;
#if defined K_RELEASE
int slots_per_frame = 10 << mu;
#elif defined F_RELEASE
int slots_per_frame = 10 << fh_cfg->frame_conf.nNumerology;
#endif
int tti = slots_per_frame * (frame) + (slot);
int nb_rx_per_ru = ru->nb_rx / fh_init->xran_ports;
@@ -330,10 +361,16 @@ int xran_fh_rx_read_slot(ru_info_t *ru, int *frame, int *slot)
*slot = info->sl;
*frame = info->f;
#if defined K_RELEASE
uint8_t mu = info->mu;
#endif
delNotifiedFIFO_elt(res);
#else
*slot = oran_sync_info.sl;
*frame = oran_sync_info.f;
#if defined K_RELEASE
uint8_t mu = oran_sync_info.mu;
#endif
uint32_t tti_in = oran_sync_info.tti;
static int last_slot = -1;
@@ -350,14 +387,26 @@ int xran_fh_rx_read_slot(ru_info_t *ru, int *frame, int *slot)
// return(0);
struct xran_fh_config *fh_cfg = get_xran_fh_config(0);
#if defined K_RELEASE
int slots_per_frame = 10 << mu;
#elif defined F_RELEASE
int slots_per_frame = 10 << fh_cfg->frame_conf.nNumerology;
#endif
int tti = slots_per_frame * (*frame) + (*slot);
read_prach_data(ru, *frame, *slot);
read_prach_data(ru, *frame, *slot
#if defined K_RELEASE
, mu
#endif
);
const struct xran_fh_init *fh_init = get_xran_fh_init();
#if defined K_RELEASE
int fftsize = 1 << fh_cfg->perMu[mu].nULFftSize;
#elif defined F_RELEASE
int fftsize = 1 << fh_cfg->nULFftSize;
#endif
int slot_offset_rxdata = 3 & (*slot);
uint32_t slot_size = 4 * 14 * fftsize;
@@ -397,7 +446,22 @@ int xran_fh_rx_read_slot(ru_info_t *ru, int *frame, int *slot)
uint8_t *pData;
struct xran_section_desc *p_sec_desc = NULL;
struct xran_prb_elm *pRbElm = &pRbMap->prbMap[idxElm];
#if defined F_RELEASE
#if defined K_RELEASE
uint32_t one_rb_size =
(((pRbElm->iqWidth == 0) || (pRbElm->iqWidth == 16)) ? (N_SC_PER_PRB * 2 * 2) : (3 * pRbElm->iqWidth + 1));
if (fh_init->mtu < num_totalRB * one_rb_size)
pData = bufs->dst[ant_id % nb_rx_per_ru][tti % XRAN_N_FE_BUF_LEN]
.pBuffers[sym_idx % XRAN_NUM_OF_SYMBOL_PER_SLOT]
.pData;
else {
p_sec_desc = &pRbElm->sec_desc[sym_idx];
pData = p_sec_desc->pData;
}
numRB = num_totalRB;
startRB = start_totalRB;
{
{
#elif defined F_RELEASE
// UP_nRBSize & UP_nRBStart are for DL U-plane only
LOG_D(HW, "[%d.%d] idxElm[%d] startSym[%d]:numSym[%d] UP_startRB[%d]:UP_numRB[%d] sym_idx[%d] ant_id[%d] pRbElm->nRBStart[%d]:pRbElm->nRBSize[%d]\n", *frame, *slot, idxElm, pRbElm->nStartSymb, pRbElm->numSymb, pRbElm->UP_nRBStart, pRbElm->UP_nRBSize, sym_idx, ant_id, pRbElm->nRBStart, pRbElm->nRBSize);
for (int idxDesc = 0; idxDesc < XRAN_MAX_FRAGMENT; idxDesc++) {
@@ -516,7 +580,12 @@ int xran_fh_tx_send_slot(ru_info_t *ru, int frame, int slot, uint64_t timestamp)
const struct xran_fh_init *fh_init = get_xran_fh_init();
const struct xran_fh_config *fh_cfg = get_xran_fh_config(0);
#if defined K_RELEASE
uint8_t mu_number = fh_cfg->mu_number[0];
int fftsize = 1 << fh_cfg->perMu[mu_number].nDLFftSize;
#elif defined F_RELEASE
int fftsize = 1 << fh_cfg->nDLFftSize;
#endif
int nb_tx_per_ru = ru->nb_tx / fh_init->xran_ports;
int nb_rx_per_ru = ru->nb_rx / fh_init->xran_ports;
@@ -542,12 +611,15 @@ int xran_fh_tx_send_slot(ru_info_t *ru, int frame, int slot, uint64_t timestamp)
LOG_D(HW, "pPrbMap->nPrbElm %d\n", pPrbMap->nPrbElm);
for (uint32_t idxElm = 0; idxElm < pPrbMap->nPrbElm; idxElm++) {
struct xran_section_desc *p_sec_desc = NULL;
struct xran_prb_elm *pRbElm = &pPrbMap->prbMap[idxElm];
int numRB, startRB;
#if defined F_RELEASE
numRB = pRbElm->UP_nRBSize;
startRB = pRbElm->UP_nRBStart;
struct xran_section_desc *p_sec_desc = &pRbElm->sec_desc[sym_idx][0];
#if defined F_RELEASE
p_sec_desc = &pRbElm->sec_desc[sym_idx][0];
#elif defined K_RELEASE
p_sec_desc = &pRbElm->sec_desc[sym_idx];
#endif
LOG_D(HW, "pPrbMap[%d] : PRBstart %d nPRBs %d\n", idxElm, startRB, numRB);
// For Liteon FR2 with RunSlotPrbMapBySymbolEnable xran_prb_map will have xran_prb_elm prbMap[14], each idxElm matches to sym_idx.
@@ -644,9 +716,11 @@ int xran_fh_tx_send_slot(ru_info_t *ru, int frame, int slot, uint64_t timestamp)
// => seems that the RUs don't check for E-bit
#if defined F_RELEASE
p_sec_desc = &p_prbMapElm->sec_desc[sym_idx][0];
#elif defined K_RELEASE
p_sec_desc = &p_prbMapElm->sec_desc[sym_idx];
#endif
int16_t startRB = p_prbMapElm->UP_nRBStart;
int16_t numRB = p_prbMapElm->UP_nRBSize;
#endif
if (p_sec_desc == NULL) {
printf("p_sec_desc == NULL\n");
radio/fhi_72/oaioran.h
+13 -2
View File
@@ -12,11 +12,22 @@ typedef struct {
uint32_t tti;
uint32_t sl;
uint32_t f;
#if defined K_RELEASE
uint8_t mu;
#endif
} oran_sync_info_t;
/** @brief xran callback for fronthaul RX, see xran_5g_fronthault_config(). */
void oai_xran_fh_rx_callback(void *pCallbackTag, xran_status_t status);
void oai_xran_fh_rx_callback(void *pCallbackTag, xran_status_t status
#if defined K_RELEASE
, uint8_t mu
#endif
);
/** @brief xran callback for time alignment, see xran_reg_physide_cb(). */
int oai_physide_dl_tti_call_back(void *param);
int oai_physide_dl_tti_call_back(void *param
#if defined K_RELEASE
, uint8_t mu
#endif
);
#endif /* OAIORAN_H */
radio/fhi_72/oran-config.c
+331 -62
View File
@@ -108,11 +108,9 @@ static void print_fh_init_io_cfg(const struct xran_io_cfg *io_cfg)
io_cfg->one_vf_cu_plane);
print_fh_eowd_cmn(io_cfg->id, &io_cfg->eowd_cmn[io_cfg->id]);
printf("eowd_port (filled within xran library)\n");
#if defined F_RELEASE
printf("\
bbu_offload %d\n",
io_cfg->bbu_offload);
#endif
}
static void print_fh_init_eaxcid_conf(const struct xran_eaxcid_config *eaxcid_conf)
@@ -154,7 +152,13 @@ void print_fh_init(const struct xran_fh_init *fh_init)
{
printf("xran_fh_init:\n");
print_fh_init_io_cfg(&fh_init->io_cfg);
#if defined K_RELEASE
for (int32_t o_xu_id = 0; o_xu_id < fh_init->xran_ports; o_xu_id++) {
print_fh_init_eaxcid_conf(&fh_init->eAxCId_conf[o_xu_id]);
}
#elif defined F_RELEASE
print_fh_init_eaxcid_conf(&fh_init->eAxCId_conf);
#endif
printf("\
xran_ports %d\n\
dpdkBasebandFecMode %d\n\
@@ -173,34 +177,58 @@ void print_fh_init(const struct xran_fh_init *fh_init)
printf("\
totalBfWeights %d\n",
fh_init->totalBfWeights);
#if defined F_RELEASE
printf("\
mlogxranenable %d\n\
dlCpProcBurst %d\n",
fh_init->mlogxranenable,
fh_init->dlCpProcBurst);
#endif
}
static void print_prach_config(const struct xran_prach_config *prach_conf)
{
printf("\
prach_config:\n\
nPrachConfIdx %d\n\
nPrachSubcSpacing %d\n\
nPrachZeroCorrConf %d\n\
nPrachRestrictSet %d\n\
nPrachRootSeqIdx %d\n\
nPrachFreqStart %d\n\
nPrachFreqOffset %d\n\
nPrachFilterIdx %d\n\
startSymId %d\n\
lastSymId %d\n\
startPrbc %d\n\
numPrbc %d\n\
timeOffset %d\n\
freqOffset %d\n\
eAxC_offset %d\n",
"
#if defined K_RELEASE
" prach_config:\n\
nPrachConfIdx %d\n\
nPrachSubcSpacing %d\n\
nPrachZeroCorrConf %d\n\
nPrachRestrictSet %d\n\
nPrachRootSeqIdx %d\n\
nPrachFreqStart %d\n\
nPrachFreqOffset %d\n\
nPrachFilterIdx %d\n\
startSymId %d\n\
lastSymId %d\n\
startPrbc %d\n\
numPrbc %d\n\
timeOffset %d\n\
freqOffset %d\n\
prachEaxcOffset %d\n\
nprachformat %d\n\
periodicity %d\n\
startTime %d\n\
suboffset %d\n\
numSubCarriers %d\n\
nRep %d\n",
#elif defined F_RELEASE
" prach_config:\n\
nPrachConfIdx %d\n\
nPrachSubcSpacing %d\n\
nPrachZeroCorrConf %d\n\
nPrachRestrictSet %d\n\
nPrachRootSeqIdx %d\n\
nPrachFreqStart %d\n\
nPrachFreqOffset %d\n\
nPrachFilterIdx %d\n\
startSymId %d\n\
lastSymId %d\n\
startPrbc %d\n\
numPrbc %d\n\
timeOffset %d\n\
freqOffset %d\n\
eAxC_offset %d\n",
#endif
prach_conf->nPrachConfIdx,
prach_conf->nPrachSubcSpacing,
prach_conf->nPrachZeroCorrConf,
@@ -215,33 +243,55 @@ static void print_prach_config(const struct xran_prach_config *prach_conf)
prach_conf->numPrbc,
prach_conf->timeOffset,
prach_conf->freqOffset,
prach_conf->eAxC_offset);
#if defined F_RELEASE
#if defined K_RELEASE
prach_conf->prachEaxcOffset,
prach_conf->nprachformat,
prach_conf->periodicity,
prach_conf->startTime,
prach_conf->suboffset,
prach_conf->numSubCarriers,
prach_conf->nRep
#elif defined F_RELEASE
prach_conf->eAxC_offset
#endif
);
printf("\
nPrachConfIdxLTE %d\n",
prach_conf->nPrachConfIdxLTE);
#endif
}
static void print_srs_config(const struct xran_srs_config *srs_conf)
{
printf("\
srs_config:\n\
symbMask %04x\n\
eAxC_offset %d\n",
symbMask %04x\n"
#if defined K_RELEASE
" srsEaxcOffset %d\n",
#elif defined F_RELEASE
" eAxC_offset %d\n",
#endif
srs_conf->symbMask,
srs_conf->eAxC_offset);
#if defined K_RELEASE
srs_conf->srsEaxcOffset
#elif defined F_RELEASE
srs_conf->eAxC_offset
#endif
);
}
static void print_frame_config(const struct xran_frame_config *frame_conf)
{
printf("\
frame_conf:\n\
nFrameDuplexType %s\n\
nNumerology %d\n\
nTddPeriod %d\n",
nFrameDuplexType %s\n"
#if defined F_RELEASE
" nNumerology %d\n"
#endif
" nTddPeriod %d\n",
frame_conf->nFrameDuplexType == XRAN_TDD ? "TDD" : "FDD",
#if defined F_RELEASE
frame_conf->nNumerology,
#endif
frame_conf->nTddPeriod);
for (int i = 0; i < frame_conf->nTddPeriod; ++i) {
printf(" sSlotConfig[%d]: ", i);
@@ -253,7 +303,11 @@ static void print_frame_config(const struct xran_frame_config *frame_conf)
}
}
static void print_ru_config(const struct xran_ru_config *ru_conf)
static void print_ru_config(
#if defined K_RELEASE
uint8_t mu_number,
#endif
const struct xran_ru_config *ru_conf)
{
printf("\
ru_config:\n\
@@ -263,9 +317,13 @@ static void print_ru_config(const struct xran_ru_config *ru_conf)
iqWidth %d\n\
compMeth %d\n\
iqWidth_PRACH %d\n\
compMeth_PRACH %d\n\
fftSize %d\n\
byteOrder %s\n\
compMeth_PRACH %d\n"
#if defined K_RELEASE
" fftSize[mu_number] %d\n"
#elif defined F_RELEASE
" fftSize %d\n"
#endif
" byteOrder %s\n\
iqOrder %s\n\
xran_max_frame %d\n",
ru_conf->xranTech == XRAN_RAN_5GNR ? "NR" : "LTE",
@@ -275,27 +333,106 @@ static void print_ru_config(const struct xran_ru_config *ru_conf)
ru_conf->compMeth,
ru_conf->iqWidth_PRACH,
ru_conf->compMeth_PRACH,
#if defined K_RELEASE
ru_conf->fftSize[mu_number],
#elif defined F_RELEASE
ru_conf->fftSize,
#endif
ru_conf->byteOrder == XRAN_NE_BE_BYTE_ORDER ? "network/BE" : "CPU/LE",
ru_conf->iqOrder == XRAN_I_Q_ORDER ? "I_Q" : "Q_I",
ru_conf->xran_max_frame);
}
#if defined K_RELEASE
void print_fh_per_mu_cfg(const struct xran_fh_per_mu_cfg *perMu)
{
printf("\
perMu:\n\
nDLBandwidth %d\n\
nULBandwidth %d\n",
perMu->nDLBandwidth,
perMu->nULBandwidth);
print_prach_config(&perMu->prach_conf);
printf("\
freqOffset %d\n\
nDLFftSize %d\n\
nULFftSize %d\n\
eaxcOffset %d\n\
nDLRBs %d\n\
nULRBs %d\n\
Tadv_cp_dl %d\n\
T2a_min_cp_dl %d\n\
T2a_max_cp_dl %d\n\
T2a_min_cp_ul %d\n\
T2a_max_cp_ul %d\n\
T2a_min_up %d\n\
T2a_max_up %d\n\
Ta3_min %d\n\
Ta3_max %d\n\
T1a_min_cp_dl %d\n\
T1a_max_cp_dl %d\n\
T1a_min_cp_ul %d\n\
T1a_max_cp_ul %d\n\
T1a_min_up %d\n\
T1a_max_up %d\n\
Ta4_min %d\n\
Ta4_max %d\n\
prachEnable %d\n\
prachConfigIndex %d\n\
prachConfigIndexLTE %d\n\
nbIotUlScs %d\n\
adv_tx_time %d\n",
perMu->freqOffset,
perMu->nDLFftSize,
perMu->nULFftSize,
perMu->eaxcOffset,
perMu->nDLRBs,
perMu->nULRBs,
perMu->Tadv_cp_dl,
perMu->T2a_min_cp_dl,
perMu->T2a_max_cp_dl,
perMu->T2a_min_cp_ul,
perMu->T2a_max_cp_ul,
perMu->T2a_min_up,
perMu->T2a_max_up,
perMu->Ta3_min,
perMu->Ta3_max,
perMu->T1a_min_cp_dl,
perMu->T1a_max_cp_dl,
perMu->T1a_min_cp_ul,
perMu->T1a_max_cp_ul,
perMu->T1a_min_up,
perMu->T1a_max_up,
perMu->Ta4_min,
perMu->Ta4_max,
perMu->prachEnable,
perMu->prachConfigIndex,
perMu->prachConfigIndexLTE,
perMu->nbIotUlScs,
perMu->adv_tx_time);
}
#endif
void print_fh_config(const struct xran_fh_config *fh_config)
{
printf("xran_fh_config:\n");
printf("\
dpdk_port %d\n\
sector_id %d\n\
nCC %d\n\
neAxc %d\n\
neAxcUl %d\n\
nAntElmTRx %d\n\
nDLFftSize %d\n\
nAntElmTRx %d\n"
#if defined F_RELEASE
" nDLFftSize %d\n\
nULFftSize %d\n\
nDLRBs %d\n\
nULRBs %d\n\
nDLAbsFrePointA %d\n\
nULRBs %d\n"
#endif
" nDLAbsFrePointA %d\n\
nULAbsFrePointA %d\n\
nDLCenterFreqARFCN %d\n\
nULCenterFreqARFCN %d\n\
@@ -307,17 +444,23 @@ void print_fh_config(const struct xran_fh_config *fh_config)
fh_config->neAxc,
fh_config->neAxcUl,
fh_config->nAntElmTRx,
#if defined F_RELEASE
fh_config->nDLFftSize,
fh_config->nULFftSize,
fh_config->nDLRBs,
fh_config->nULRBs,
#endif
fh_config->nDLAbsFrePointA,
fh_config->nULAbsFrePointA,
fh_config->nDLCenterFreqARFCN,
fh_config->nULCenterFreqARFCN,
fh_config->ttiCb,
fh_config->ttiCbParam);
#if defined K_RELEASE
uint8_t mu_number = fh_config->mu_number[0];
print_fh_per_mu_cfg(&fh_config->perMu[mu_number]);
#endif
#if defined F_RELEASE
printf("\
Tadv_cp_dl %d\n\
T2a_min_cp_dl %d\n\
@@ -353,45 +496,49 @@ void print_fh_config(const struct xran_fh_config *fh_config)
fh_config->T1a_max_up,
fh_config->Ta4_min,
fh_config->Ta4_max);
#endif
printf("\
enableCP %d\n\
prachEnable %d\n\
srsEnable %d\n\
enableCP %d\n"
#if defined F_RELEASE
" prachEnable %d\n"
#endif
" srsEnable %d\n\
puschMaskEnable %d\n\
puschMaskSlot %d\n\
cp_vlan_tag %d\n\
up_vlan_tag %d\n\
debugStop %d\n\
debugStopCount %d\n\
DynamicSectionEna %d\n\
GPS_Alpha %d\n\
GPS_Beta %d\n",
fh_config->enableCP,
#if defined F_RELEASE
fh_config->prachEnable,
#endif
fh_config->srsEnable,
fh_config->puschMaskEnable,
fh_config->puschMaskSlot,
fh_config->cp_vlan_tag,
fh_config->up_vlan_tag,
fh_config->debugStop,
fh_config->debugStopCount,
fh_config->DynamicSectionEna,
fh_config->GPS_Alpha,
fh_config->GPS_Beta);
#if defined F_RELEASE
printf("\
srsEnableCp %d\n\
SrsDelaySym %d\n",
fh_config->srsEnableCp,
fh_config->SrsDelaySym);
#endif
#if defined F_RELEASE
print_prach_config(&fh_config->prach_conf);
#endif
print_srs_config(&fh_config->srs_conf);
print_frame_config(&fh_config->frame_conf);
print_ru_config(&fh_config->ru_conf);
print_ru_config(
#if defined K_RELEASE
mu_number,
#endif
&fh_config->ru_conf);
printf("\
bbdev_enc %p\n\
@@ -413,7 +560,6 @@ void print_fh_config(const struct xran_fh_config *fh_config)
fh_config->max_sections_per_slot,
fh_config->max_sections_per_symbol);
#if defined F_RELEASE
printf("\
RunSlotPrbMapBySymbolEnable %d\n\
dssEnable %d\n\
@@ -422,6 +568,15 @@ void print_fh_config(const struct xran_fh_config *fh_config)
fh_config->RunSlotPrbMapBySymbolEnable,
fh_config->dssEnable,
fh_config->dssPeriod);
#if defined K_RELEASE
printf("\
numMUs %d\n\
mu_number[0] %d\n\
nNumerology[0] %d\n",
fh_config->numMUs,
fh_config->mu_number[0],
fh_config->nNumerology[0]);
#endif
}
@@ -536,9 +691,7 @@ static bool set_fh_io_cfg(struct xran_io_cfg *io_cfg, const paramdef_t *fhip, in
/* eCPRI OWDM per port variables for O-DU; this parameter is filled within xran library */
// eowd_port[0][XRAN_VF_MAX]
#if defined F_RELEASE
io_cfg->bbu_offload = 0; // enable packet handling on BBU cores
#endif
return true;
}
@@ -575,7 +728,7 @@ static bool set_fh_eaxcid_conf_mplane(struct xran_eaxcid_config *eaxcid_conf, en
return true;
}
#else
static bool set_fh_eaxcid_conf(struct xran_eaxcid_config *eaxcid_conf, enum xran_category cat)
static bool __attribute__((unused)) set_fh_eaxcid_conf(struct xran_eaxcid_config *eaxcid_conf, enum xran_category cat)
{
/* CUS specification, section 3.1.3.1.6
DU_port_ID - used to differentiate processing units at O-DU (e.g., different baseband cards).
@@ -666,8 +819,16 @@ static bool set_fh_init(void *mplane_api, struct xran_fh_init *fh_init, enum xra
fh_init->xran_ports = num_rus; // since we use xran as O-DU, xran_ports is set to the number of RUs
if (!set_fh_io_cfg(&fh_init->io_cfg, fhip, nump, num_rus))
return false;
#if defined K_RELEASE
for (int32_t o_xu_id = 0; o_xu_id < fh_init->xran_ports; o_xu_id++) {
if (!set_fh_eaxcid_conf_mplane(&fh_init->eAxCId_conf[o_xu_id], xran_cat, ru_session_list))
return false;
}
#elif defined F_RELEASE
if (!set_fh_eaxcid_conf_mplane(&fh_init->eAxCId_conf, xran_cat, ru_session_list))
return false;
#endif
/* maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be
communicated in a single xRAN network layer transaction. Based on the MTU size, xran calculates the number
of DL fragments (nPrbElm) needed for transmission of one symbol. */
@@ -691,8 +852,16 @@ static bool set_fh_init(void *mplane_api, struct xran_fh_init *fh_init, enum xra
if (!set_fh_io_cfg(&fh_init->io_cfg, fhip, nump, num_rus))
return false;
#if defined K_RELEASE
for (int32_t o_xu_id = 0; o_xu_id < fh_init->xran_ports; o_xu_id++) {
if (!set_fh_eaxcid_conf(&fh_init->eAxCId_conf[o_xu_id], xran_cat))
return false;
}
#elif defined F_RELEASE
if (!set_fh_eaxcid_conf(&fh_init->eAxCId_conf, xran_cat))
return false;
#endif
/* maximum transmission unit (MTU) is the size of the largest protocol data unit (PDU) that can be
communicated in a single xRAN network layer transaction. Based on the MTU size, xran calculates the number
of DL fragments (nPrbElm) needed for transmission of one symbol. */
@@ -736,11 +905,9 @@ static bool set_fh_init(void *mplane_api, struct xran_fh_init *fh_init, enum xra
fh_init->filePrefix = strdup(*gpd(fhip, nump, ORAN_CONFIG_FILE_PREFIX)->strptr);
fh_init->totalBfWeights = 0; // only used if id = O_RU (for emulation); C-plane extension types; section 5.4.6 of CUS spec
#if defined F_RELEASE
fh_init->mlogxranenable = 0; // enable mlog; 0 -> disabled
fh_init->dlCpProcBurst = 0; /* 1 -> DL CP processing will be done on single symbol,
0 -> DL CP processing will be spread across all allowed symbols and multiple cores to reduce burstiness */
#endif
return true;
}
@@ -780,9 +947,7 @@ static bool set_fh_prach_config(void *mplane_api,
prach_config->numPrbc = 0;
prach_config->timeOffset = 0;
prach_config->freqOffset = 0;
#if defined F_RELEASE
prach_config->nPrachConfIdxLTE = 0; // used only if DSS enabled and technology is XRAN_RAN_LTE
#endif
/* xran defines PDSCH eAxC IDs as [0...Ntx-1];
xran defines PUSCH eAxC IDs as [0...Nrx-1];
@@ -791,10 +956,18 @@ static bool set_fh_prach_config(void *mplane_api,
Please note that this approach only applies to the RUs that support this functionality, e.g. LITEON RU. */
#ifdef OAI_MPLANE
xran_mplane_t *xran_mplane = (xran_mplane_t *)mplane_api;
#if defined F_RELEASE
prach_config->eAxC_offset = xran_mplane->prach_offset;
#elif defined K_RELEASE
prach_config->prachEaxcOffset = xran_mplane->prach_offset;
#endif
#else
const paramdef_t *pd = gpd(prachp, nprach, ORAN_PRACH_CONFIG_EAXC_OFFSET);
#if defined F_RELEASE
prach_config->eAxC_offset = pd->paramflags & PARAMFLAG_PARAMSET ? *pd->u8ptr : max_num_ant;
#elif defined K_RELEASE
prach_config->prachEaxcOffset = pd->paramflags & PARAMFLAG_PARAMSET ? *pd->u8ptr : max_num_ant;
#endif
#endif
g_kbar = *gpd(prachp, nprach, ORAN_PRACH_CONFIG_KBAR)->uptr;
@@ -806,8 +979,10 @@ static bool set_fh_frame_config(const openair0_config_t *oai0, struct xran_frame
{
const split7_config_t *s7cfg = &oai0->split7;
frame_config->nFrameDuplexType = oai0->duplex_mode == duplex_mode_TDD ? XRAN_TDD : XRAN_FDD; // Frame Duplex type: 0 -> FDD, 1 -> TDD
#if defined F_RELEASE
frame_config->nNumerology = oai0->nr_scs_for_raster; /* 0 -> 15kHz, 1 -> 30kHz, 2 -> 60kHz
3 -> 120kHz, 4 -> 240kHz */
#endif
if (frame_config->nFrameDuplexType == XRAN_FDD)
return true;
@@ -824,7 +999,11 @@ static bool set_fh_frame_config(const openair0_config_t *oai0, struct xran_frame
return true;
}
static bool set_fh_ru_config(void *mplane_api, const paramdef_t *rup, uint16_t fftSize, int nru, enum xran_category xran_cat, struct xran_ru_config *ru_config)
static bool set_fh_ru_config(void *mplane_api, const paramdef_t *rup, uint16_t fftSize, int nru, enum xran_category xran_cat
#if defined K_RELEASE
, uint8_t mu_number
#endif
, struct xran_ru_config *ru_config)
{
ru_config->xranTech = XRAN_RAN_5GNR; // 5GNR or LTE
ru_config->xranCat = xran_cat; // mode: Catergory A or Category B
@@ -843,7 +1022,11 @@ static bool set_fh_ru_config(void *mplane_api, const paramdef_t *rup, uint16_t f
ru_config->compMeth_PRACH = ru_config->iqWidth_PRACH < 16 ? XRAN_COMPMETHOD_BLKFLOAT : XRAN_COMPMETHOD_NONE; // compression method for PRACH
AssertFatal(fftSize > 0, "FFT size cannot be 0\n");
#if defined K_RELEASE
ru_config->fftSize[mu_number] = fftSize; // FFT Size
#elif defined F_RELEASE
ru_config->fftSize = fftSize; // FFT Size
#endif
ru_config->byteOrder = XRAN_NE_BE_BYTE_ORDER; // order of bytes in int16_t in buffer; big or little endian
ru_config->iqOrder = XRAN_I_Q_ORDER; // order of IQs in the buffer
ru_config->xran_max_frame = 0; // max frame number supported; if not specified, default of 1023 is used
@@ -866,6 +1049,69 @@ static bool set_maxmin_pd(const paramdef_t *pd, int num, const char *name, uint1
return true;
}
#if defined K_RELEASE
static bool set_fh_per_mu_cfg(void *mplane_api, int ru_idx, int num_rus, const openair0_config_t *oai0, struct xran_fh_per_mu_cfg *perMu)
{
char aprefix[MAX_OPTNAME_SIZE] = {0};
paramdef_t FHconfigs[] = ORAN_FH_DESC;
paramlist_def_t FH_ConfigList = {CONFIG_STRING_ORAN_FH};
sprintf(aprefix, "%s", CONFIG_STRING_ORAN);
const int nfh = sizeofArray(FHconfigs);
config_getlist(config_get_if(), &FH_ConfigList, FHconfigs, nfh, aprefix);
if (FH_ConfigList.numelt == 0) {
printf("No configuration section \"%s\" found inside \"%s\": cannot initialize fhi_lib!\n", CONFIG_STRING_ORAN_FH, aprefix);
return false;
}
paramdef_t *fhp = FH_ConfigList.paramarray[ru_idx];
paramdef_t prachp[] = ORAN_PRACH_DESC;
int nprach = sizeofArray(prachp);
sprintf(aprefix, "%s.%s.[%d].%s", CONFIG_STRING_ORAN, CONFIG_STRING_ORAN_FH, ru_idx, CONFIG_STRING_ORAN_PRACH);
int ret = config_get(config_get_if(), prachp, nprach, aprefix);
if (ret < 0) {
printf("No configuration section \"%s\": cannot initialize fhi_lib!\n", aprefix);
return false;
}
perMu->nDLBandwidth = 0; // Carrier bandwidth for in MHz. Value: 5->400. Not used in K release
perMu->nULBandwidth = 0; // Carrier bandwidth for in MHz. Value: 5->400. Not used in K release
if (!set_fh_prach_config(mplane_api, oai0, RTE_MAX(oai0->tx_num_channels / num_rus, oai0->rx_num_channels / num_rus), prachp, nprach, &perMu->prach_conf))
return false;
perMu->freqOffset = 0;
perMu->nDLFftSize = oai0->split7.fftSize; // DL FFT size
perMu->nULFftSize = oai0->split7.fftSize; // UL FFT size
perMu->eaxcOffset = 0; // Starting value of Eaxc for PDSCH, PUSCH packets (Absolute value) of this numerology. Should be unique across all numerologies for the RU
perMu->nDLRBs = oai0->num_rb_dl; // DL PRB
perMu->nULRBs = oai0->num_rb_dl; // UL PRB
/* DU delay profile */
if (!set_maxmin_pd(fhp, nfh, ORAN_FH_CONFIG_T1A_CP_DL, &perMu->T1a_min_cp_dl, &perMu->T1a_max_cp_dl)) // E - min not used in xran, max yes; F - both min and max are used in xran
return false;
if (!set_maxmin_pd(fhp, nfh, ORAN_FH_CONFIG_T1A_CP_UL, &perMu->T1a_min_cp_ul, &perMu->T1a_max_cp_ul)) // both E and F - min not used in xran, max yes
return false;
if (!set_maxmin_pd(fhp, nfh, ORAN_FH_CONFIG_T1A_UP, &perMu->T1a_min_up, &perMu->T1a_max_up)) // both E and F - min not used in xran, max yes
return false;
if (!set_maxmin_pd(fhp, nfh, ORAN_FH_CONFIG_TA4, &perMu->Ta4_min, &perMu->Ta4_max)) // both E and F - min not used in xran, max yes
return false;
perMu->prachEnable = 1; // enable PRACH
const split7_config_t *s7cfg = &oai0->split7;
perMu->prachConfigIndex = s7cfg->prach_index; // TS36.211 - Table 5.7.1-2 : PRACH Configuration Index
perMu->prachConfigIndexLTE = 0; // PRACH Configuration Index for LTE in dss case
perMu->nbIotUlScs = XRAN_NBIOT_UL_SCS_15; /* Applicable only for NB-IOT (mu=4). NBIOT supports asymmetric SCS usage in
downlink and uplink directions. xran library will use this parameter to derive
slot-duration for UL NB-IOT:
XRAN_NBIOT_UL_SCS_15: slot-duration=1ms
XRAN_NBIOT_UL_SCS_3_75: slot-duration=2ms */
perMu->adv_tx_time = 0; // Time by which the packet should be transmitted in advance (microseconds)
return true;
}
static bool set_fh_config(void *mplane_api, int ru_idx, int num_rus, enum xran_category xran_cat, const openair0_config_t *oai0, struct xran_fh_config *fh_config)
{
AssertFatal(num_rus == 1 || num_rus == 2, "only support 1 or 2 RUs as of now\n");
@@ -915,10 +1161,12 @@ static bool set_fh_config(void *mplane_api, int ru_idx, int num_rus, enum xran_c
fh_config->neAxc = RTE_MAX(oai0->tx_num_channels / num_rus, oai0->rx_num_channels / num_rus); // number of eAxc supported on one CC = max(PDSCH, PUSCH)
fh_config->neAxcUl = 0; // number of eAxc supported on one CC for UL direction = PUSCH; used only if XRAN_CATEGORY_B
fh_config->nAntElmTRx = 0; // number of antenna elements for TX and RX = SRS; used only if XRAN_CATEGORY_B
#if defined F_RELEASE
fh_config->nDLFftSize = oai0->split7.fftSize; // DL FFT size; not used in xran
fh_config->nULFftSize = oai0->split7.fftSize; // UL FFT size; not used in xran
fh_config->nDLRBs = oai0->num_rb_dl; // DL PRB; used in oaioran.c/oran-init.c; not used in xran, neither in E nor in F release
fh_config->nULRBs = oai0->num_rb_dl; // UL PRB; used in oaioran.c/oran-init.c; in xran E release not used so the patch fixes it, but in xran F release this value is properly used
#endif
fh_config->nDLAbsFrePointA = 0; // Abs Freq Point A of the Carrier Center Frequency for in KHz Value; not used in xran
fh_config->nULAbsFrePointA = 0; // Abs Freq Point A of the Carrier Center Frequency for in KHz Value; not used in xran
fh_config->nDLCenterFreqARFCN = 0; // center frequency for DL in NR-ARFCN; not used in xran
@@ -926,6 +1174,13 @@ static bool set_fh_config(void *mplane_api, int ru_idx, int num_rus, enum xran_c
fh_config->ttiCb = NULL; // check tti_to_phy_cb(), tx_cp_dl_cb() and tx_cp_ul_cb => first_call
fh_config->ttiCbParam = NULL; // check tti_to_phy_cb(), tx_cp_dl_cb() and tx_cp_ul_cb => first_call
#if defined K_RELEASE
uint8_t mu_number = oai0->nr_scs_for_raster;
if(!set_fh_per_mu_cfg(mplane_api, ru_idx, num_rus, oai0, &fh_config->perMu[mu_number]))
return false;
#endif
#if defined F_RELEASE
/* DU delay profile */
if (!set_maxmin_pd(fhp, nfh, ORAN_FH_CONFIG_T1A_CP_DL, &fh_config->T1a_min_cp_dl, &fh_config->T1a_max_cp_dl)) // E - min not used in xran, max yes; F - both min and max are used in xran
return false;
@@ -935,9 +1190,12 @@ static bool set_fh_config(void *mplane_api, int ru_idx, int num_rus, enum xran_c
return false;
if (!set_maxmin_pd(fhp, nfh, ORAN_FH_CONFIG_TA4, &fh_config->Ta4_min, &fh_config->Ta4_max)) // both E and F - min not used in xran, max yes
return false;
#endif
fh_config->enableCP = 1; // enable C-plane
#if defined F_RELEASE
fh_config->prachEnable = 1; // enable PRACH
#endif
fh_config->srsEnable = 0; // enable SRS; used only if XRAN_CATEGORY_B
// For LiteOn E release, no need to take care of prach eAxC_offset. xran lib is hacked to handle it.
#if defined F_RELEASE
@@ -946,22 +1204,35 @@ static bool set_fh_config(void *mplane_api, int ru_idx, int num_rus, enum xran_c
#endif
fh_config->puschMaskEnable = 0; // enable PUSCH mask; only used if id = O_RU
fh_config->puschMaskSlot = 0; // specific which slot PUSCH channel masked; only used if id = O_RU
#if defined K_RELEASE
fh_config->csirsEnable = 0; // enable CSI-RS (Cat B specific)
#elif defined F_RELEASE
fh_config->cp_vlan_tag = 0; // C-plane VLAN tag; not used in xran; needed for M-plane
fh_config->up_vlan_tag = 0; // U-plane VLAN tag; not used in xran; needed for M-plane
#endif
fh_config->debugStop = 0; // enable auto stop; only used if id = O_RU
fh_config->debugStopCount = 0; // enable auto stop after number of Tx packets; not used in xran
fh_config->DynamicSectionEna = 0; // enable dynamic C-Plane section allocation
fh_config->GPS_Alpha = 0; // refers to alpha as defined in section 9.7.2 of ORAN spec. this value should be alpha*(1/1.2288ns), range 0 - 1e7 (ns); offset_nsec = (pConf->GPS_Beta - offset_sec * 100) * 1e7 + pConf->GPS_Alpha
fh_config->GPS_Beta = 0; // beta value as defined in section 9.7.2 of ORAN spec. range -32767 ~ +32767; offset_sec = pConf->GPS_Beta / 100
#if defined K_RELEASE
fh_config->numMUs = 1;
fh_config->nNumerology[0] = mu_number; /* 0 -> 15kHz, 1 -> 30kHz, 2 -> 60kHz, 3 -> 120kHz, 4 -> 240kHz */
#elif defined F_RELEASE
if (!set_fh_prach_config(mplane_api, oai0, fh_config->neAxc, prachp, nprach, &fh_config->prach_conf))
return false;
#endif
/* SRS only used if XRAN_CATEGORY_B
Note: srs_config->eAxC_offset >= prach_config->eAxC_offset + PRACH */
// fh_config->srs_conf = {0};
if (!set_fh_frame_config(oai0, &fh_config->frame_conf))
return false;
if (!set_fh_ru_config(mplane_api, rup, oai0->split7.prach_fftSize, nru, xran_cat, &fh_config->ru_conf))
if (!set_fh_ru_config(mplane_api, rup, oai0->split7.prach_fftSize, nru, xran_cat
#if defined K_RELEASE
, mu_number
#endif
, &fh_config->ru_conf))
return false;
fh_config->bbdev_enc = NULL; // call back to poll BBDev encoder
@@ -985,13 +1256,11 @@ static bool set_fh_config(void *mplane_api, int ru_idx, int num_rus, enum xran_c
fh_config->max_sections_per_slot = 0; // not used in xran
fh_config->max_sections_per_symbol = 0; // not used in xran
#if defined F_RELEASE
fh_config->RunSlotPrbMapBySymbolEnable = *gpd(fhp, nfh, ORAN_CONFIG_CP_MULTISECTION)->uptr; // enable PRB mapping by symbol with multisection
fh_config->dssEnable = 0; // enable DSS (extension-9)
fh_config->dssPeriod = 0; // DSS pattern period for LTE/NR
// fh_config->technology[XRAN_MAX_DSS_PERIODICITY] // technology array represents slot is LTE(0)/NR(1); used only if DSS enabled
#endif
return true;
}
radio/fhi_72/oran-init.c
+44 -15
View File
@@ -81,7 +81,12 @@ static struct xran_prb_map get_xran_prb_map(const struct xran_fh_config *f, cons
e->nStartSymb = start_sym;
e->numSymb = num_sym;
e->nRBStart = 0;
#if defined K_RELEASE
uint8_t mu_number = f->mu_number[0];
e->nRBSize = (dir == XRAN_DIR_DL) ? f->perMu[mu_number].nDLRBs : f->perMu[mu_number].nULRBs;
#elif defined F_RELEASE
e->nRBSize = (dir == XRAN_DIR_DL) ? f->nDLRBs : f->nULRBs;
#endif
e->nBeamIndex = 0;
e->compMethod = f->ru_conf.compMeth;
e->iqWidth = f->ru_conf.iqWidth;
@@ -182,10 +187,8 @@ static void oran_allocate_cplane_buffers(void *instHandle,
struct xran_flat_buffer buf[XRAN_MAX_ANTENNA_NR][XRAN_N_FE_BUF_LEN],
uint32_t ant,
uint32_t sect,
#if defined F_RELEASE
uint32_t mtu,
const struct xran_fh_config *fh_config,
#endif
uint32_t size_of_prb_map,
oran_cplane_prb_config *prb_conf)
{
@@ -219,20 +222,27 @@ static void oran_allocate_cplane_buffers(void *instHandle,
// get mixed slot map if in TDD and in mixed slot
if (prb_conf->nTddPeriod != 0 && (j % prb_conf->nTddPeriod) == prb_conf->mixed_slot_index)
src = &prb_conf->mixedSlotMap;
#if defined F_RELEASE
if (fh_config->RunSlotPrbMapBySymbolEnable) {
#if defined K_RELEASE
uint8_t mu_number = fh_config->mu_number[0];
xran_init_PrbMap_by_symbol_from_cfg(src, ptr, mtu, fh_config->perMu[mu_number].nDLRBs);
#elif defined F_RELEASE
xran_init_PrbMap_by_symbol_from_cfg(src, ptr, mtu, fh_config->nDLRBs);
#endif
} else {
xran_init_PrbMap_from_cfg(src, ptr, mtu);
}
#endif
}
}
printf("xran_bm_allocate_buffer() hInstance %p poolIdx %u count %u\n", instHandle, poolPrb, count1);
}
/* callback not actively used */
static void oai_xran_fh_rx_prach_callback(void *pCallbackTag, xran_status_t status)
static void oai_xran_fh_rx_prach_callback(void *pCallbackTag, xran_status_t status
#if defined K_RELEASE
, uint8_t mu
#endif
)
{
rte_pause();
}
@@ -241,9 +251,7 @@ static void oran_allocate_buffers(void *handle,
int xran_inst,
int num_sectors,
oran_port_instance_t *portInstances,
#if defined F_RELEASE
uint32_t mtu,
#endif
const struct xran_fh_config *fh_config)
{
AssertFatal(num_sectors == 1, "only support one sector at the moment\n");
@@ -297,38 +305,40 @@ static void oran_allocate_buffers(void *handle,
.mixedSlotMap = ulPmMixed,
};
#if defined F_RELEASE
uint32_t numPrbElm = (fh_config->RunSlotPrbMapBySymbolEnable) ? XRAN_NUM_OF_SYMBOL_PER_SLOT : xran_get_num_prb_elm(&dlPm, mtu);
uint32_t size_of_prb_map = sizeof(struct xran_prb_map) + sizeof(struct xran_prb_elm) * (numPrbElm);
#endif
// PDSCH
#if defined K_RELEASE
const uint32_t txBufSize = get_nSW_ToFpga_FTH_TxBufferLen(fh_config->nNumerology[0], fh_config->max_sections_per_slot);
#elif defined F_RELEASE
const uint32_t txBufSize = get_nSW_ToFpga_FTH_TxBufferLen(fh_config->frame_conf.nNumerology, fh_config->max_sections_per_slot);
#endif
oran_allocate_uplane_buffers(pi->instanceHandle, bl->src, bl->bufs.tx, xran_max_antenna_nr, txBufSize);
oran_allocate_cplane_buffers(pi->instanceHandle,
bl->srccp,
bl->bufs.tx_prbmap,
xran_max_antenna_nr,
xran_max_sections_per_slot,
#if defined F_RELEASE
mtu,
fh_config,
#endif
size_of_prb_map,
&dlConf);
// PUSCH
#if defined K_RELEASE
const uint32_t rxBufSize = get_nFpgaToSW_FTH_RxBufferLen(fh_config->nNumerology[0]);
#elif defined F_RELEASE
const uint32_t rxBufSize = get_nFpgaToSW_FTH_RxBufferLen(fh_config->frame_conf.nNumerology);
#endif
oran_allocate_uplane_buffers(pi->instanceHandle, bl->dst, bl->bufs.rx, xran_max_antenna_nr, rxBufSize);
oran_allocate_cplane_buffers(pi->instanceHandle,
bl->dstcp,
bl->bufs.rx_prbmap,
xran_max_antenna_nr,
xran_max_sections_per_slot,
#if defined F_RELEASE
mtu,
fh_config,
#endif
size_of_prb_map,
&ulConf);
@@ -364,8 +374,13 @@ static void oran_allocate_buffers(void *handle,
}
}
#if defined K_RELEASE
xran_5g_fronthault_config(pi->instanceHandle, src, srccp, dst, dstcp, oai_xran_fh_rx_callback, &portInstances->pusch_tag, fh_config->nNumerology[0]);
xran_5g_prach_req(pi->instanceHandle, prach, prachdecomp, oai_xran_fh_rx_prach_callback, &portInstances->prach_tag, fh_config->nNumerology[0]);
#elif defined F_RELEASE
xran_5g_fronthault_config(pi->instanceHandle, src, srccp, dst, dstcp, oai_xran_fh_rx_callback, &portInstances->pusch_tag);
xran_5g_prach_req(pi->instanceHandle, prach, prachdecomp, oai_xran_fh_rx_prach_callback, &portInstances->prach_tag);
#endif
}
int *oai_oran_initialize(struct xran_fh_init *xran_fh_init, struct xran_fh_config *xran_fh_config)
@@ -394,20 +409,34 @@ int *oai_oran_initialize(struct xran_fh_init *xran_fh_init, struct xran_fh_confi
struct xran_cb_tag tag = {.cellId = sector, .oXuId = o_xu_id};
pi->prach_tag = tag;
pi->pusch_tag = tag;
#if defined F_RELEASE
oran_allocate_buffers(gxran_handle, o_xu_id, 1, pi, xran_fh_init->mtu, &xran_fh_config[o_xu_id]);
#endif
#if defined K_RELEASE
if ((xret = xran_timingsource_reg_tticb(gxran_handle, oai_physide_dl_tti_call_back, NULL, 10, XRAN_CB_TTI)) != XRAN_STATUS_SUCCESS) {
printf("xran_timingsource_reg_tticb failed %d\n", xret);
exit(-1);
}
#elif defined F_RELEASE
if ((xret = xran_reg_physide_cb(gxran_handle, oai_physide_dl_tti_call_back, NULL, 10, XRAN_CB_TTI)) != XRAN_STATUS_SUCCESS) {
printf("xran_reg_physide_cb failed %d\n", xret);
exit(-1);
}
#endif
// retrieve and store prach duration
#if defined K_RELEASE
uint8_t mu = xran_fh_config[o_xu_id].nNumerology[0];
uint8_t idx = xran_fh_config[o_xu_id].perMu[mu].prach_conf.nPrachConfIdx;
#elif defined F_RELEASE
uint8_t idx = xran_fh_config[o_xu_id].prach_conf.nPrachConfIdx;
#endif
const struct xran_frame_config *fc = &xran_fh_config[o_xu_id].frame_conf;
g_prach_info[o_xu_id] = get_nr_prach_occasion_info_from_index(idx,
#if defined K_RELEASE
mu > 2 ? FR2 : FR1,
#elif defined F_RELEASE
fc->nNumerology > 2 ? FR2 : FR1,
#endif
fc->nFrameDuplexType == XRAN_FDD ? duplex_mode_FDD : duplex_mode_TDD);
}