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Remove (unnecessary) num_slots_per_tdd in DLSCH sched

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This commit is contained in:
Robert Schmidt
2021-02-07 10:39:39 +01:00
parent 2225cd26fe
commit 7879e6ad32
6 changed files with 14 additions and 27 deletions
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openair1/SIMULATION/NR_PHY/dlsim.c
+2 -6
View File
@@ -186,8 +186,7 @@ void update_dmrs_config(NR_CellGroupConfig_t *scg,PHY_VARS_NR_UE *ue, int8_t* dm
int g_mcsIndex = -1, g_mcsTableIdx = 0, g_rbStart = -1, g_rbSize = -1;
void nr_dlsim_preprocessor(module_id_t module_id,
frame_t frame,
sub_frame_t slot,
int num_slots_per_tdd) {
sub_frame_t slot) {
NR_UE_info_t *UE_info = &RC.nrmac[module_id]->UE_info;
AssertFatal(UE_info->num_UEs == 1, "can have only a single UE\n");
NR_UE_sched_ctrl_t *sched_ctrl = &UE_info->UE_sched_ctrl[0];
@@ -902,10 +901,7 @@ int main(int argc, char **argv)
gNB_mac->UE_info.num_pdcch_cand[0][i] = 0;
if (css_flag == 0) {
const uint8_t slots_per_frame[5] = {10, 20, 40, 80, 160};
const NR_TDD_UL_DL_Pattern_t *tdd_pattern = &scc->tdd_UL_DL_ConfigurationCommon->pattern1;
const int num_slots_per_tdd = slots_per_frame[*scc->ssbSubcarrierSpacing] >> (7 - tdd_pattern->dl_UL_TransmissionPeriodicity);
nr_schedule_ue_spec(0, frame, slot, num_slots_per_tdd);
nr_schedule_ue_spec(0, frame, slot);
} else {
nr_schedule_css_dlsch_phytest(0,frame,slot);
}
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c
+2 -4
View File
@@ -426,10 +426,8 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
}
// This schedules the DCI for Downlink and PDSCH
if (is_xlsch_in_slot(dlsch_in_slot_bitmap, slot % num_slots_per_tdd)
&& slot < 10) {
nr_schedule_ue_spec(module_idP, frame, slot, num_slots_per_tdd);
}
if (is_xlsch_in_slot(dlsch_in_slot_bitmap, slot) && slot < 10)
nr_schedule_ue_spec(module_idP, frame, slot);
if (UE_info->active[UE_id])
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c
+5 -7
View File
@@ -374,8 +374,7 @@ uint8_t getN_PRB_DMRS(NR_BWP_Downlink_t *bwp, int numDmrsCdmGrpsNoData) {
void nr_simple_dlsch_preprocessor(module_id_t module_id,
frame_t frame,
sub_frame_t slot,
int num_slots_per_tdd) {
sub_frame_t slot) {
NR_UE_info_t *UE_info = &RC.nrmac[module_id]->UE_info;
AssertFatal(UE_info->num_UEs <= 1,
@@ -449,7 +448,7 @@ void nr_simple_dlsch_preprocessor(module_id_t module_id,
uint16_t *vrb_map = RC.nrmac[module_id]->common_channels[CC_id].vrb_map;
// for now HARQ PID is fixed and should be the same as in post-processor
const int current_harq_pid = slot % num_slots_per_tdd;
const int current_harq_pid = slot % 8;
NR_UE_harq_t *harq = &sched_ctrl->harq_processes[current_harq_pid];
NR_UE_ret_info_t *retInfo = &sched_ctrl->retInfo[current_harq_pid];
const uint16_t bwpSize = NRRIV2BW(sched_ctrl->active_bwp->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
@@ -530,12 +529,11 @@ void nr_simple_dlsch_preprocessor(module_id_t module_id,
void nr_schedule_ue_spec(module_id_t module_id,
frame_t frame,
sub_frame_t slot,
int num_slots_per_tdd) {
sub_frame_t slot) {
gNB_MAC_INST *gNB_mac = RC.nrmac[module_id];
/* PREPROCESSOR */
gNB_mac->pre_processor_dl(module_id, frame, slot, num_slots_per_tdd);
gNB_mac->pre_processor_dl(module_id, frame, slot);
NR_UE_info_t *UE_info = &gNB_mac->UE_info;
@@ -588,7 +586,7 @@ void nr_schedule_ue_spec(module_id_t module_id,
1 /* nrOfLayers */)
>> 3;
const int current_harq_pid = slot % num_slots_per_tdd;
const int current_harq_pid = slot % 8;
NR_UE_harq_t *harq = &sched_ctrl->harq_processes[current_harq_pid];
NR_sched_pucch_t *pucch = &sched_ctrl->sched_pucch[0];
harq->feedback_slot = pucch->ul_slot;
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c
+1 -2
View File
@@ -255,8 +255,7 @@ void nr_schedule_css_dlsch_phytest(module_id_t module_idP,
/* schedules whole bandwidth for first user, all the time */
void nr_preprocessor_phytest(module_id_t module_id,
frame_t frame,
sub_frame_t slot,
int num_slots_per_tdd)
sub_frame_t slot)
{
NR_UE_info_t *UE_info = &RC.nrmac[module_id]->UE_info;
const int UE_id = 0;
openair2/LAYER2/NR_MAC_gNB/mac_proto.h
+3 -6
View File
@@ -77,8 +77,7 @@ int nr_generate_dlsch_pdu(module_id_t Mod_idP,
void nr_schedule_ue_spec(module_id_t module_id,
frame_t frame,
sub_frame_t slot,
int num_slots_per_tdd);
sub_frame_t slot);
void schedule_control_sib1(module_id_t module_id,
int CC_id,
@@ -92,8 +91,7 @@ void schedule_nr_sib1(module_id_t module_idP, frame_t frameP, sub_frame_t subfra
/* \brief default preprocessor */
void nr_simple_dlsch_preprocessor(module_id_t module_id,
frame_t frame,
sub_frame_t slot,
int num_slots_per_tdd);
sub_frame_t slot);
void schedule_nr_mib(module_id_t module_idP, frame_t frameP, sub_frame_t subframeP, uint8_t slots_per_frame);
@@ -159,8 +157,7 @@ uint16_t nr_mac_compute_RIV(uint16_t N_RB_DL, uint16_t RBstart, uint16_t Lcrbs);
* freq resources */
void nr_preprocessor_phytest(module_id_t module_id,
frame_t frame,
sub_frame_t slot,
int num_slots_per_tdd);
sub_frame_t slot);
/* \brief UL preprocessor for phytest: schedules UE_id 0 with fixed MCS on a
* fixed set of resources */
void nr_ul_preprocessor_phytest(module_id_t module_id,
openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h
+1 -2
View File
@@ -479,8 +479,7 @@ typedef struct {
typedef void (*nr_pp_impl_dl)(module_id_t mod_id,
frame_t frame,
sub_frame_t slot,
int num_slots_per_tdd);
sub_frame_t slot);
typedef void (*nr_pp_impl_ul)(module_id_t mod_id,
frame_t frame,
sub_frame_t slot,