handling 2-port CSI report at MAC gNB
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@@ -136,7 +136,7 @@ int init_codebook_gNB(PHY_VARS_gNB *gNB) {
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}
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}
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int max_mimo_layers =(CSI_RS_antenna_ports<NR_MAX_NB_LAYERS) ? CSI_RS_antenna_ports : NR_MAX_NB_LAYERS;
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int max_mimo_layers = (CSI_RS_antenna_ports<NR_MAX_NB_LAYERS) ? CSI_RS_antenna_ports : NR_MAX_NB_LAYERS;
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gNB->nr_mimo_precoding_matrix = (int32_t ***)malloc16(max_mimo_layers* sizeof(int32_t **));
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int32_t ***mat = gNB->nr_mimo_precoding_matrix;
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@@ -236,7 +236,7 @@ int init_codebook_gNB(PHY_VARS_gNB *gNB) {
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if((llb != ll) || (mmb != mm) || ((N1 == 1) && (N2 == 1))){
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pmiq += 1;
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mat[1][pmiq] = (int32_t *)malloc16((2*N1*N2)*(2)*sizeof(int32_t));
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LOG_I(PHY, "layer 2 Codebook pmiq = %d\n",pmiq);
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LOG_D(PHY, "layer 2 Codebook pmiq = %d\n",pmiq);
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for(int j_col=0; j_col<2; j_col++) {
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if (j_col==0) {
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llc = llb;
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@@ -320,7 +320,7 @@ int init_codebook_gNB(PHY_VARS_gNB *gNB) {
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if((llb != ll) || (mmb != mm)){
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pmiq += 1;
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mat[2][pmiq] = (int32_t *)malloc16((2*N1*N2)*(3)*sizeof(int32_t));
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LOG_I(PHY, "layer 3 Codebook pmiq = %d\n",pmiq);
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LOG_D(PHY, "layer 3 Codebook pmiq = %d\n",pmiq);
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for(int j_col=0; j_col<3; j_col++) {
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if (j_col==0) {
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llc = llb;
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@@ -411,7 +411,7 @@ int init_codebook_gNB(PHY_VARS_gNB *gNB) {
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if((llb != ll) || (mmb != mm)){
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pmiq += 1;
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mat[3][pmiq] = (int32_t *)malloc16((2*N1*N2)*4*sizeof(int32_t));
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LOG_I(PHY, "layer 4 pmiq = %d\n",pmiq);
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LOG_D(PHY, "layer 4 pmiq = %d\n",pmiq);
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for(int j_col=0; j_col<4; j_col++) {
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if (j_col==0) {
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llc = llb;
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@@ -1174,6 +1174,18 @@ void nr_schedule_ue_spec(module_id_t module_id,
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pdsch_pdu->StartSymbolIndex = ps->startSymbolIndex;
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pdsch_pdu->NrOfSymbols = ps->nrOfSymbols;
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// Precoding
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if (sched_ctrl->set_pmi) {
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int report_id = sched_ctrl->CSI_report.cri_ri_li_pmi_cqi_report.csi_report_id;
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nr_csi_report_t *csi_report = &UE_info->csi_report_template[UE_id][report_id];
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pdsch_pdu->precodingAndBeamforming.prg_size = pdsch_pdu->rbSize;
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pdsch_pdu->precodingAndBeamforming.prgs_list[0].pm_idx = set_pm_index(sched_ctrl,
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nrOfLayers,
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csi_report->N1,
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csi_report->N2,
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csi_report->codebook_mode);
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}
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NR_PDSCH_Config_t *pdsch_Config=NULL;
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if (bwp &&
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bwp->bwp_Dedicated &&
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@@ -145,6 +145,25 @@ uint8_t set_dl_nrOfLayers(NR_UE_sched_ctrl_t *sched_ctrl) {
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}
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uint16_t set_pm_index(NR_UE_sched_ctrl_t *sched_ctrl,
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int layers,
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int N1, int N2,
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int codebook_mode) {
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int x1 = sched_ctrl->CSI_report.cri_ri_li_pmi_cqi_report.pmi_x1;
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int x2 = sched_ctrl->CSI_report.cri_ri_li_pmi_cqi_report.pmi_x2;
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int antenna_ports = (N1*N2)<<1;
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sched_ctrl->set_pmi = false;
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if (antenna_ports == 2)
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return x2;
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else
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AssertFatal(1==0,"More than 2 antenna ports not yet supported\n");
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}
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void set_dl_mcs(NR_sched_pdsch_t *sched_pdsch,
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NR_UE_sched_ctrl_t *sched_ctrl,
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uint8_t *target_mcs,
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@@ -186,7 +205,7 @@ void set_dl_mcs(NR_sched_pdsch_t *sched_pdsch,
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}
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}
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}
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sched_ctrl->set_mcs = FALSE;
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sched_ctrl->set_mcs = false;
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}
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}
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@@ -2147,7 +2166,8 @@ int add_new_nr_ue(module_id_t mod_idP, rnti_t rntiP, NR_CellGroupConfig_t *CellG
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compute_csi_bitlen (CellGroup->spCellConfig->spCellConfigDedicated->csi_MeasConfig->choice.setup, UE_info, UE_id, mod_idP);
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NR_UE_sched_ctrl_t *sched_ctrl = &UE_info->UE_sched_ctrl[UE_id];
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memset(sched_ctrl, 0, sizeof(*sched_ctrl));
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sched_ctrl->set_mcs = TRUE;
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sched_ctrl->set_mcs = true;
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sched_ctrl->set_pmi = false;
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sched_ctrl->lcid_mask = 0;
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if (!get_softmodem_params()->phy_test && !get_softmodem_params()->do_ra && !get_softmodem_params()->sa) {
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sched_ctrl->lcid_mask = 1<<DL_SCH_LCID_DTCH;
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@@ -501,6 +501,9 @@ void compute_pmi_bitlen(struct NR_CSI_ReportConfig *csi_reportconfig,
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int n1,n2,o1,o2,x1,x2;
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get_n1n2_o1o2_singlepanel(&n1,&n2,&o1,&o2,codebookConfig->codebookType.choice.type1->subType.choice.typeI_SinglePanel->nrOfAntennaPorts.choice.moreThanTwo);
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get_x1x2_bitlen_singlepanel(n1,n2,o1,o2,&x1,&x2,i+1,codebookConfig->codebookType.choice.type1->codebookMode);
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csi_report->N1 = n1;
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csi_report->N2 = n2;
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csi_report->codebook_mode = codebookConfig->codebookType.choice.type1->codebookMode;
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csi_report->csi_meas_bitlen.pmi_x1_bitlen[i]=x1;
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csi_report->csi_meas_bitlen.pmi_x2_bitlen[i]=x2;
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}
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@@ -1210,7 +1213,7 @@ void evaluate_cqi_report(uint8_t *payload,
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sched_ctrl->CSI_report.cri_ri_li_pmi_cqi_report.wb_cqi_2tb = temp_cqi;
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LOG_D(MAC,"Wide-band CQI for the second TB %d\n", temp_cqi);
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}
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sched_ctrl->set_mcs = TRUE;
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sched_ctrl->set_mcs = true;
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}
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@@ -1233,6 +1236,7 @@ uint8_t evaluate_pmi_report(uint8_t *payload,
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sched_ctrl->CSI_report.cri_ri_li_pmi_cqi_report.pmi_x1,
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sched_ctrl->CSI_report.cri_ri_li_pmi_cqi_report.pmi_x2);
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sched_ctrl->set_pmi = true;
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return tot_bitlen;
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}
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@@ -1338,6 +1342,7 @@ void extract_pucch_csi_report(NR_CSI_MeasConfig_t *csi_MeasConfig,
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if (r_index != -1)
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skip_zero_padding(&cumul_bits,csi_report,r_index,bitlen);
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pmi_bitlen = evaluate_pmi_report(payload,csi_report,cumul_bits,r_index,sched_ctrl);
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sched_ctrl->CSI_report.cri_ri_li_pmi_cqi_report.csi_report_id = csi_report_id;
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cumul_bits += pmi_bitlen;
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evaluate_cqi_report(payload,csi_report,cumul_bits,r_index,sched_ctrl,csirep->cqi_Table);
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break;
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@@ -1355,6 +1360,7 @@ void extract_pucch_csi_report(NR_CSI_MeasConfig_t *csi_MeasConfig,
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if (r_index != -1)
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skip_zero_padding(&cumul_bits,csi_report,r_index,bitlen);
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pmi_bitlen = evaluate_pmi_report(payload,csi_report,cumul_bits,r_index,sched_ctrl);
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sched_ctrl->CSI_report.cri_ri_li_pmi_cqi_report.csi_report_id = csi_report_id;
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cumul_bits += pmi_bitlen;
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evaluate_cqi_report(payload,csi_report,cumul_bits,r_index,sched_ctrl,csirep->cqi_Table);
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break;
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@@ -455,6 +455,11 @@ void find_SSB_and_RO_available(module_id_t module_idP);
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void set_dl_dmrs_ports(NR_pdsch_semi_static_t *ps);
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uint16_t set_pm_index(NR_UE_sched_ctrl_t *sched_ctrl,
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int layers,
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int N1, int N2,
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int codebook_mode);
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void set_dl_mcs(NR_sched_pdsch_t *sched_pdsch,
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NR_UE_sched_ctrl_t *sched_ctrl,
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uint8_t *target_mcs,
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@@ -479,6 +479,7 @@ struct CRI_RI_LI_PMI_CQI {
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uint8_t wb_cqi_1tb;
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uint8_t wb_cqi_2tb;
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uint8_t cqi_table;
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uint8_t csi_report_id;
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};
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typedef struct CRI_SSB_RSRP {
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@@ -522,6 +523,9 @@ typedef struct nr_csi_report {
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uint8_t nb_of_csi_ssb_report;
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L1_RSRP_bitlen_t CSI_report_bitlen;
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CSI_Meas_bitlen_t csi_meas_bitlen;
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int codebook_mode;
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int N1;
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int N2;
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} nr_csi_report_t;
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/*! As per the spec 38.212 and table: 6.3.1.1.2-12 in a single UCI sequence we can have multiple CSI_report
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@@ -621,6 +625,7 @@ typedef struct {
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struct CSI_Report CSI_report;
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bool SR;
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bool set_mcs;
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bool set_pmi;
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/// information about every HARQ process
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NR_UE_harq_t harq_processes[NR_MAX_NB_HARQ_PROCESSES];
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/// HARQ processes that are free
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