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reverting some changes in the UE that were introduced by nr_polar_encoder_optimizations to make UE work again on real-time testbench. Now at least the PDCCH can be detected and used for time tracking. However, the DCI is not yet decoded (this will be fixed on branch nr_pdcch_fixes). The reverted changes are most notably passing the correct slot number to slot_fep in phy_procedures_nrUE. This will have to be changed as well in the future when we pass to slot-based processing at the UE.

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This commit is contained in:
Florian Kaltenberger
2019-02-13 11:47:26 +01:00
parent 151fced6d3
commit 7cb58c9a31
5 changed files with 12 additions and 15 deletions
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openair1/PHY/MODULATION/slot_fep_nr.c
+2 -2
View File
@@ -130,8 +130,8 @@ int nr_slot_fep(PHY_VARS_NR_UE *ue,
#ifdef DEBUG_FEP
// if (ue->frame <100)
/*LOG_I(PHY,*/printf("slot_fep: frame %d: slot %d, symbol %d, nb_prefix_samples %d, nb_prefix_samples0 %d, slot_offset %d, subframe_offset %d, sample_offset %d,rx_offset %d, frame_length_samples %d\n", ue->proc.proc_rxtx[(Ns>>1)&1].frame_rx,Ns, symbol,
nb_prefix_samples,nb_prefix_samples0,slot_offset,subframe_offset,sample_offset,rx_offset,frame_length_samples);
/*LOG_I(PHY,*/printf("slot_fep: frame %d: slot %d, symbol %d, nb_prefix_samples %d, nb_prefix_samples0 %d, slot_offset %d, sample_offset %d,rx_offset %d, frame_length_samples %d\n", ue->proc.proc_rxtx[(Ns>>1)&1].frame_rx,Ns, symbol,
nb_prefix_samples,nb_prefix_samples0,slot_offset,sample_offset,rx_offset,frame_length_samples);
#endif
if (l==0) {
openair1/PHY/NR_UE_ESTIMATION/nr_dl_channel_estimation.c
+3 -3
View File
@@ -28,7 +28,7 @@
#include "PHY/NR_REFSIG/refsig_defs_ue.h"
#include "filt16a_32.h"
#include "T.h"
//#define DEBUG_PDSCH
//#define DEBUG_PDCCH
int nr_pbch_channel_estimation(PHY_VARS_NR_UE *ue,
@@ -297,7 +297,7 @@ int nr_pdcch_channel_estimation(PHY_VARS_NR_UE *ue,
// generate pilot
nr_pdcch_dmrs_rx(ue,eNB_offset,Ns,ue->nr_gold_pdcch[eNB_offset][Ns][symbol], &pilot[0],2000,nb_rb_coreset);
nr_pdcch_dmrs_rx(ue,eNB_offset,Ns,ue->nr_gold_pdcch[eNB_offset][Ns>>1][symbol], &pilot[0],2000,nb_rb_coreset);
for (aarx=0; aarx<ue->frame_parms.nb_antennas_rx; aarx++) {
@@ -459,7 +459,7 @@ int nr_pdcch_channel_estimation(PHY_VARS_NR_UE *ue,
break;
}
if( (Ns== 2) && (l == 0))
//if( (Ns== 2) && (l == 0))
{
// do ifft of channel estimate
for (aarx=0; aarx<ue->frame_parms.nb_antennas_rx; aarx++)
openair1/PHY/NR_UE_TRANSPORT/dci_nr.c
+2 -2
View File
@@ -821,8 +821,8 @@ int32_t nr_rx_pdcch(PHY_VARS_NR_UE *ue,
#ifdef NR_PDCCH_DCI_DEBUG
printf("\t<-NR_PDCCH_DCI_DEBUG (nr_rx_pdcch)-> symbol_mon=(%d) and start_symbol=(%d)\n",symbol_mon,start_symbol);
printf("\t<-NR_PDCCH_DCI_DEBUG (nr_rx_pdcch)-> coreset_freq_dom=(%ld) n_rb_offset=(%d) coreset_time_dur=(%d) n_shift=(%d) reg_bundle_size_L=(%d) coreset_interleaver_size_R=(%d) \n",
coreset_freq_dom,n_rb_offset,coreset_time_dur,n_shift,reg_bundle_size_L,coreset_interleaver_size_R);
printf("\t<-NR_PDCCH_DCI_DEBUG (nr_rx_pdcch)-> coreset_freq_dom=(%ld) n_rb_offset=(%d) coreset_time_dur=(%d) n_shift=(%d) reg_bundle_size_L=(%d) coreset_interleaver_size_R=(%d) scrambling_ID=(%d) \n",
coreset_freq_dom,n_rb_offset,coreset_time_dur,n_shift,reg_bundle_size_L,coreset_interleaver_size_R,pdcch_DMRS_scrambling_id);
#endif
//
openair1/SCHED_NR_UE/phy_procedures_nr_ue.c
+1 -4
View File
@@ -2781,8 +2781,6 @@ void nr_ue_measurement_procedures(
*/
eNB_id = 0;
LOG_D(PHY,"start adjust sync l = %d slot = %d no timing %d\n",l, slot, ue->no_timing_correction);
if (ue->no_timing_correction==0)
nr_adjust_synch_ue(&ue->frame_parms,
@@ -2791,7 +2789,6 @@ void nr_ue_measurement_procedures(
nr_tti_rx,
0,
16384);
}
@@ -5064,7 +5061,7 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,UE_nr_rxtx_proc_t *proc,uint8_t eN
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_UE_SLOT_FEP, VCD_FUNCTION_IN);
nr_slot_fep(ue,
l,
nr_tti_rx,
nr_tti_rx<<1,
0,
0,
1,
openair2/NR_UE_PHY_INTERFACE/NR_IF_Module.c
+4 -4
View File
@@ -268,11 +268,11 @@ int nr_ue_dcireq(nr_dcireq_t *dcireq) {
// Type0 PDCCH search space
dl_config->number_pdus = 1;
dl_config->dl_config_list[0].pdu_type = FAPI_NR_DL_CONFIG_TYPE_DCI;
dl_config->dl_config_list[0].dci_config_pdu.dci_config_rel15.rnti = 0xaaaa; // to be set
dl_config->dl_config_list[0].dci_config_pdu.dci_config_rel15.rnti = 0x1234; // to be set
uint64_t mask = 0x0;
uint16_t num_rbs=48;
uint16_t rb_offset=47;
uint16_t num_rbs=24;
uint16_t rb_offset=0;
uint16_t cell_id=0;
uint16_t num_symbols=2;
for(int i=0; i<(num_rbs/6); ++i){ // 38.331 Each bit corresponds a group of 6 RBs
@@ -292,7 +292,7 @@ int nr_ue_dcireq(nr_dcireq_t *dcireq) {
uint32_t number_of_search_space_per_slot=1;
uint32_t first_symbol_index=0;
uint32_t search_space_duration=1; // element of search space
uint32_t search_space_duration=0; // element of search space
uint32_t coreset_duration; // element of coreset
coreset_duration = num_symbols * number_of_search_space_per_slot;