maki/openairinterface5g
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

Merge remote-tracking branch 'origin/NR_UL_VRB_MAP_improv' into integration_2022_wk11

Browse Source
This commit is contained in:
Robert Schmidt
2022-03-16 23:26:59 +01:00
parent 5be1825361 ddbc306246
commit 7cbca077e0
11 changed files with 269 additions and 144 deletions
Download Patch File Download Diff File Expand all files Collapse all files
common/utils/nr/nr_common.c
-2
View File
@@ -521,7 +521,6 @@ int get_subband_size(int NPRB,int size) {
}
// from start symbol index and nb or symbols to symbol occupation bitmap in a slot
uint16_t SL_to_bitmap(int startSymbolIndex, int nrOfSymbols) {
return ((1<<nrOfSymbols)-1)<<startSymbolIndex;
@@ -543,5 +542,4 @@ void SLIV2SL(int SLIV,int *S,int *L) {
*L=15-SLIVdiv14;
*S=13-SLIVmod14;
}
}
openair2/GNB_APP/gnb_config.c
+18 -12
View File
@@ -624,15 +624,18 @@ void RCconfig_NR_L1(void) {
config_getlist( &GNBParamList,GNBParams,sizeof(GNBParams)/sizeof(paramdef_t),NULL);
char *ulprbbl = *GNBParamList.paramarray[0][GNB_ULPRBBLACKLIST_IDX].strptr;
if (ulprbbl) LOG_I(NR_PHY,"PRB blacklist %s\n",ulprbbl);
char *pt = strtok(ulprbbl,",");
char *save = NULL;
char *pt = strtok_r(ulprbbl, ",", &save);
int prbbl[275];
int num_prbbl=0;
memset(prbbl,0,275*sizeof(int));
while (pt) {
prbbl[atoi(pt)] = 1;
const int rb = atoi(pt);
AssertFatal(rb < 275, "RB %d out of bounds (max 275)\n", rb);
prbbl[rb] = 0x3FFF; // all symbols taken
LOG_I(NR_PHY,"Blacklisting prb %d\n",atoi(pt));
pt = strtok(NULL,",");
pt = strtok_r(NULL, ",", &save);
num_prbbl++;
}
@@ -736,15 +739,16 @@ void RCconfig_nr_macrlc() {
config_getlist( &GNBParamList,GNBParams,sizeof(GNBParams)/sizeof(paramdef_t),NULL);
char *ulprbbl = *GNBParamList.paramarray[0][GNB_ULPRBBLACKLIST_IDX].strptr;
char *pt = strtok(ulprbbl,",");
int prbbl[275];
char *save = NULL;
char *pt = strtok_r(ulprbbl, ",", &save);
uint16_t prbbl[275];
int num_prbbl=0;
int prb;
memset(prbbl,0,275*sizeof(int));
memset(prbbl,0,sizeof(prbbl));
while (pt) {
prb=atoi(pt);
prbbl[prb] = 1;
pt = strtok(NULL,",");
const int prb = atoi(pt);
AssertFatal(prb < 275, "RB %d out of bounds (max 275)\n", prb);
prbbl[prb] = 0x3FFF; // all symbols taken
pt = strtok_r(NULL, ",", &save);
num_prbbl++;
}
@@ -1458,7 +1462,8 @@ int RCconfig_NR_NG(MessageDef *msg_p, uint32_t i) {
// NGAP_REGISTER_GNB_REQ (msg_p).enb_interface_name_for_NGU = strdup(enb_interface_name_for_NGU);
cidr = *(NETParams[GNB_IPV4_ADDRESS_FOR_NG_AMF_IDX].strptr);
address = strtok(cidr, "/");
char *save = NULL;
address = strtok_r(cidr, "/", &save);
NGAP_REGISTER_GNB_REQ (msg_p).gnb_ip_address.ipv6 = 0;
NGAP_REGISTER_GNB_REQ (msg_p).gnb_ip_address.ipv4 = 1;
@@ -1730,7 +1735,8 @@ int RCconfig_NR_X2(MessageDef *msg_p, uint32_t i) {
}
cidr = *(NETParams[ENB_IPV4_ADDR_FOR_X2C_IDX].strptr);
address = strtok(cidr, "/");
char *save = NULL;
address = strtok_r(cidr, "/", &save);
X2AP_REGISTER_ENB_REQ (msg_p).enb_x2_ip_address.ipv6 = 0;
X2AP_REGISTER_ENB_REQ (msg_p).enb_x2_ip_address.ipv4 = 1;
strcpy(X2AP_REGISTER_ENB_REQ (msg_p).enb_x2_ip_address.ipv4_address, address);
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c
+1 -1
View File
@@ -318,7 +318,7 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
const int num_slots = nr_slots_per_frame[*scc->ssbSubcarrierSpacing];
const int last_slot = (slot + num_slots - 1) % num_slots;
uint16_t *vrb_map_UL = cc[CC_id].vrb_map_UL;
memset(&vrb_map_UL[last_slot * MAX_BWP_SIZE], 0, sizeof(uint16_t) * MAX_BWP_SIZE);
memcpy(&vrb_map_UL[last_slot * MAX_BWP_SIZE], &RC.nrmac[module_idP]->ulprbbl, sizeof(uint16_t) * MAX_BWP_SIZE);
clear_nr_nfapi_information(RC.nrmac[module_idP], CC_id, frame, slot);
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c
+16 -6
View File
@@ -389,7 +389,7 @@ void schedule_nr_prach(module_id_t module_idP, frame_t frameP, sub_frame_t slotP
const int16_t N_RA_RB = get_N_RA_RB(cfg->prach_config.prach_sub_c_spacing.value, mu_pusch);
uint16_t *vrb_map_UL = &cc->vrb_map_UL[slotP * MAX_BWP_SIZE];
for (int i = 0; i < N_RA_RB * fdm; ++i)
vrb_map_UL[bwp_start + rach_ConfigGeneric->msg1_FrequencyStart + i] = 0xff; // all symbols
vrb_map_UL[bwp_start + rach_ConfigGeneric->msg1_FrequencyStart + i] = SL_to_bitmap(start_symbol, N_t_slot*N_dur);
}
}
}
@@ -772,6 +772,8 @@ void nr_generate_Msg3_retransmission(module_id_t module_idP, int CC_id, frame_t
int scs = scc->uplinkConfigCommon->initialUplinkBWP->genericParameters.subcarrierSpacing;
int fh = 0;
int startSymbolAndLength = scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[ra->Msg3_tda_id]->startSymbolAndLength;
int StartSymbolIndex, NrOfSymbols;
SLIV2SL(startSymbolAndLength, &StartSymbolIndex, &NrOfSymbols);
int mappingtype = scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[ra->Msg3_tda_id]->mappingType;
uint16_t *vrb_map_UL = &RC.nrmac[module_idP]->common_channels[CC_id].vrb_map_UL[sched_slot * MAX_BWP_SIZE];
@@ -780,7 +782,7 @@ void nr_generate_Msg3_retransmission(module_id_t module_idP, int CC_id, frame_t
int BWPSize = nr_mac->type0_PDCCH_CSS_config[ra->beam_id].num_rbs;
int rbStart = 0;
for (int i = 0; (i < ra->msg3_nb_rb) && (rbStart <= (BWPSize - ra->msg3_nb_rb)); i++) {
if (vrb_map_UL[rbStart + BWPStart + i]) {
if (vrb_map_UL[rbStart + BWPStart + i]&SL_to_bitmap(StartSymbolIndex, NrOfSymbols)) {
rbStart += i;
i = 0;
}
@@ -898,7 +900,7 @@ void nr_generate_Msg3_retransmission(module_id_t module_idP, int CC_id, frame_t
aggregation_level);
for (int rb = 0; rb < ra->msg3_nb_rb; rb++) {
vrb_map_UL[rbStart + BWPStart + rb] = 1;
vrb_map_UL[rbStart + BWPStart + rb] |= SL_to_bitmap(StartSymbolIndex, NrOfSymbols);
}
// reset state to wait msg3
@@ -928,6 +930,9 @@ void nr_get_Msg3alloc(module_id_t module_id,
int mu = ubwp ?
ubwp->bwp_Common->genericParameters.subcarrierSpacing :
scc->uplinkConfigCommon->initialUplinkBWP->genericParameters.subcarrierSpacing;
int StartSymbolIndex = 0;
int NrOfSymbols = 0;
int startSymbolAndLength = 0;
int temp_slot = 0;
ra->Msg3_tda_id = 16; // initialization to a value above limit
@@ -942,6 +947,8 @@ void nr_get_Msg3alloc(module_id_t module_id,
int nb_periods_per_frame = get_nb_periods_per_frame(scc->tdd_UL_DL_ConfigurationCommon->pattern1.dl_UL_TransmissionPeriodicity);
int nb_slots_per_period = ((1<<mu)*10)/nb_periods_per_frame;
for (int i=0; i<pusch_TimeDomainAllocationList->list.count; i++) {
startSymbolAndLength = pusch_TimeDomainAllocationList->list.array[i]->startSymbolAndLength;
SLIV2SL(startSymbolAndLength, &StartSymbolIndex, &NrOfSymbols);
k2 = *pusch_TimeDomainAllocationList->list.array[i]->k2;
// we want to transmit in the uplink symbols of mixed slot
if ((k2 + DELTA[mu])%nb_slots_per_period == 0) {
@@ -949,6 +956,8 @@ void nr_get_Msg3alloc(module_id_t module_id,
ra->Msg3_slot = temp_slot%nr_slots_per_frame[mu];
if (is_xlsch_in_slot(RC.nrmac[module_id]->ulsch_slot_bitmap[ra->Msg3_slot / 64], ra->Msg3_slot)) {
ra->Msg3_tda_id = i;
ra->msg3_startsymb = StartSymbolIndex;
ra->msg3_nrsymb = NrOfSymbols;
break;
}
}
@@ -1002,11 +1011,12 @@ void nr_get_Msg3alloc(module_id_t module_id,
while (rbSize < msg3_nb_rb) {
rbStart += rbSize; /* last iteration rbSize was not enough, skip it */
rbSize = 0;
while (rbStart < bwpSize && vrb_map_UL[rbStart + bwpStart])
while (rbStart < bwpSize &&
(vrb_map_UL[rbStart + bwpStart]&SL_to_bitmap(StartSymbolIndex, NrOfSymbols)))
rbStart++;
AssertFatal(rbStart < bwpSize - msg3_nb_rb, "no space to allocate Msg 3 for RA!\n");
while (rbStart + rbSize < bwpSize
&& !vrb_map_UL[rbStart + bwpStart + rbSize]
&& !(vrb_map_UL[rbStart + bwpStart + rbSize]&SL_to_bitmap(StartSymbolIndex, NrOfSymbols))
&& rbSize < msg3_nb_rb)
rbSize++;
}
@@ -1113,7 +1123,7 @@ void nr_add_msg3(module_id_t module_idP, int CC_id, frame_t frameP, sub_frame_t
i + ra->msg3_first_rb,
ra->Msg3_frame,
ra->Msg3_slot);
vrb_map_UL[i + ra->msg3_first_rb + ra->msg3_bwp_start] = 1;
vrb_map_UL[i + ra->msg3_first_rb + ra->msg3_bwp_start] |= SL_to_bitmap(ra->msg3_startsymb, ra->msg3_nrsymb);
}
LOG_D(NR_MAC, "[gNB %d][RAPROC] Frame %d, Slot %d : CC_id %d RA is active, Msg3 in (%d,%d)\n", module_idP, frameP, slotP, CC_id, ra->Msg3_frame, ra->Msg3_slot);
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c
+2 -2
View File
@@ -691,7 +691,7 @@ bool allocate_dl_retransmission(module_id_t module_id,
/* retransmissions: directly allocate */
*n_rb_sched -= sched_ctrl->sched_pdsch.rbSize;
for (int rb = 0; rb < sched_ctrl->sched_pdsch.rbSize; rb++)
rballoc_mask[rb + sched_ctrl->sched_pdsch.rbStart] -= SL_to_bitmap(ps->startSymbolIndex, ps->nrOfSymbols);
rballoc_mask[rb + sched_ctrl->sched_pdsch.rbStart] ^= SL_to_bitmap(ps->startSymbolIndex, ps->nrOfSymbols);
return true;
}
@@ -910,7 +910,7 @@ void pf_dl(module_id_t module_id,
/* transmissions: directly allocate */
n_rb_sched -= sched_pdsch->rbSize;
for (int rb = 0; rb < sched_pdsch->rbSize; rb++)
rballoc_mask[rb + sched_pdsch->rbStart] -= slbitmap;
rballoc_mask[rb + sched_pdsch->rbStart] ^= slbitmap;
}
}
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c
+2 -3
View File
@@ -481,9 +481,8 @@ bool nr_ul_preprocessor_phytest(module_id_t module_id, frame_t frame, sub_frame_
uint16_t *vrb_map_UL =
&RC.nrmac[module_id]->common_channels[CC_id].vrb_map_UL[sched_slot * MAX_BWP_SIZE];
const uint16_t symb = ((1 << ps->nrOfSymbols) - 1) << ps->startSymbolIndex;
for (int i = rbStart; i < rbStart + rbSize; ++i) {
if ((vrb_map_UL[i+BWPStart] & symb) != 0) {
if ((vrb_map_UL[i+BWPStart] & SL_to_bitmap(ps->startSymbolIndex, ps->nrOfSymbols)) != 0) {
LOG_E(MAC,
"%s(): %4d.%2d RB %d is already reserved, cannot schedule UE\n",
__func__,
@@ -561,6 +560,6 @@ bool nr_ul_preprocessor_phytest(module_id_t module_id, frame_t frame, sub_frame_
sched_ctrl->aggregation_level);
for (int rb = rbStart; rb < rbStart + rbSize; rb++)
vrb_map_UL[rb+BWPStart] = 1;
vrb_map_UL[rb+BWPStart] |= SL_to_bitmap(ps->startSymbolIndex, ps->nrOfSymbols);
return true;
}
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c
+39 -10
View File
@@ -1235,23 +1235,26 @@ void nr_configure_pucch(nfapi_nr_pucch_pdu_t* pucch_pdu,
else { // this is the default PUCCH configuration, PUCCH format 0 or 1
LOG_D(NR_MAC,"pucch_acknak: Filling default PUCCH configuration from Tables (r_pucch %d, bwp %p)\n",r_pucch,bwp);
int rsetindex = *scc->uplinkConfigCommon->initialUplinkBWP->pucch_ConfigCommon->choice.setup->pucch_ResourceCommon;
int prboffset = r_pucch/default_pucch_csset[rsetindex];
int prboffsetm8 = (r_pucch-8)/default_pucch_csset[rsetindex];
pucch_pdu->prb_start = (r_pucch>>3)==0 ?
default_pucch_prboffset[rsetindex] + prboffset:
pucch_pdu->bwp_size-1-default_pucch_prboffset[rsetindex]-prboffsetm8;
int prb_start, second_hop_prb, nr_of_symb, start_symb;
set_r_pucch_parms(rsetindex,
r_pucch,
pucch_pdu->bwp_size,
&prb_start,
&second_hop_prb,
&nr_of_symb,
&start_symb);
pucch_pdu->prb_start = prb_start;
pucch_pdu->rnti = rnti;
pucch_pdu->freq_hop_flag = 1;
pucch_pdu->second_hop_prb = (r_pucch>>3)==0?
pucch_pdu->bwp_size-1-default_pucch_prboffset[rsetindex]-prboffset:
default_pucch_prboffset[rsetindex] + prboffsetm8;
pucch_pdu->second_hop_prb = second_hop_prb;
pucch_pdu->format_type = default_pucch_fmt[rsetindex];
pucch_pdu->initial_cyclic_shift = r_pucch%default_pucch_csset[rsetindex];
if (rsetindex==3||rsetindex==7||rsetindex==11) pucch_pdu->initial_cyclic_shift*=6;
else if (rsetindex==1||rsetindex==2) pucch_pdu->initial_cyclic_shift*=3;
else pucch_pdu->initial_cyclic_shift*=4;
pucch_pdu->nr_of_symbols = default_pucch_numbsymb[rsetindex];
pucch_pdu->start_symbol_index = default_pucch_firstsymb[rsetindex];
pucch_pdu->nr_of_symbols = nr_of_symb;
pucch_pdu->start_symbol_index = start_symb;
if (pucch_pdu->format_type == 1) pucch_pdu->time_domain_occ_idx = 0; // check this!!
pucch_pdu->sr_flag = O_sr;
pucch_pdu->prb_size=1;
@@ -1259,6 +1262,32 @@ void nr_configure_pucch(nfapi_nr_pucch_pdu_t* pucch_pdu,
}
void set_r_pucch_parms(int rsetindex,
int r_pucch,
int bwp_size,
int *prb_start,
int *second_hop_prb,
int *nr_of_symbols,
int *start_symbol_index) {
// procedure described in 38.213 section 9.2.1
int prboffset = r_pucch/default_pucch_csset[rsetindex];
int prboffsetm8 = (r_pucch-8)/default_pucch_csset[rsetindex];
*prb_start = (r_pucch>>3)==0 ?
default_pucch_prboffset[rsetindex] + prboffset:
bwp_size-1-default_pucch_prboffset[rsetindex]-prboffsetm8;
*second_hop_prb = (r_pucch>>3)==0?
bwp_size-1-default_pucch_prboffset[rsetindex]-prboffset:
default_pucch_prboffset[rsetindex] + prboffsetm8;
*nr_of_symbols = default_pucch_numbsymb[rsetindex];
*start_symbol_index = default_pucch_firstsymb[rsetindex];
}
void prepare_dci(const NR_CellGroupConfig_t *CellGroup,
dci_pdu_rel15_t *dci_pdu_rel15,
nr_dci_format_t format,
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c
+118 -58
View File
@@ -760,16 +760,16 @@ void nr_csi_meas_reporting(int Mod_idP,
switch(pucchres->format.present){
case NR_PUCCH_Resource__format_PR_format2:
len = pucchres->format.choice.format2->nrofPRBs;
mask = ((1 << pucchres->format.choice.format2->nrofSymbols) - 1) << pucchres->format.choice.format2->startingSymbolIndex;
mask = SL_to_bitmap(pucchres->format.choice.format2->startingSymbolIndex, pucchres->format.choice.format2->nrofSymbols);
curr_pucch->simultaneous_harqcsi = pucch_Config->format2->choice.setup->simultaneousHARQ_ACK_CSI;
break;
case NR_PUCCH_Resource__format_PR_format3:
len = pucchres->format.choice.format3->nrofPRBs;
mask = ((1 << pucchres->format.choice.format3->nrofSymbols) - 1) << pucchres->format.choice.format3->startingSymbolIndex;
mask = SL_to_bitmap(pucchres->format.choice.format3->startingSymbolIndex, pucchres->format.choice.format3->nrofSymbols);
curr_pucch->simultaneous_harqcsi = pucch_Config->format3->choice.setup->simultaneousHARQ_ACK_CSI;
break;
case NR_PUCCH_Resource__format_PR_format4:
mask = ((1 << pucchres->format.choice.format4->nrofSymbols) - 1) << pucchres->format.choice.format4->startingSymbolIndex;
mask = SL_to_bitmap(pucchres->format.choice.format4->startingSymbolIndex, pucchres->format.choice.format4->nrofSymbols);
curr_pucch->simultaneous_harqcsi = pucch_Config->format4->choice.setup->simultaneousHARQ_ACK_CSI;
break;
default:
@@ -777,7 +777,12 @@ void nr_csi_meas_reporting(int Mod_idP,
}
// verify resources are free
for (int i = start; i < start + len; ++i) {
vrb_map_UL[i+bwp_start] |= mask;
if((vrb_map_UL[i+bwp_start] & mask) != 0) {
LOG_E(NR_MAC, "%4d.%2d VRB MAP in %4d.%2d not free. Can't schedule CSI reporting on PUCCH.\n", frame, slot, frame, sched_slot);
memset(curr_pucch, 0, sizeof(*curr_pucch));
}
else
vrb_map_UL[i+bwp_start] |= mask;
}
}
}
@@ -1508,6 +1513,61 @@ void handle_nr_uci_pucch_2_3_4(module_id_t mod_id,
}
}
bool test_acknack_vrb_occupation(NR_UE_sched_ctrl_t *sched_ctrl,
NR_sched_pucch_t *pucch,
uint16_t *vrb_map_UL,
const NR_ServingCellConfigCommon_t *scc,
NR_PUCCH_Config_t *pucch_Config,
int r_pucch,
int bwp_start,
int bwp_size) {
// We assume initial cyclic shift is always 0 so different pucch resources can't overlap
NR_sched_pucch_t *csi_pucch = &sched_ctrl->sched_pucch[1];
if (csi_pucch &&
csi_pucch->csi_bits > 0 &&
csi_pucch->frame == pucch->frame &&
csi_pucch->ul_slot == pucch->ul_slot &&
csi_pucch->simultaneous_harqcsi &&
(csi_pucch->csi_bits + csi_pucch->dai_c) < 11)
return true; // available resources for csi_pucch already verified
if(r_pucch<0){
const NR_PUCCH_Resource_t *resource = pucch_Config->resourceToAddModList->list.array[0];
DevAssert(resource->format.present == NR_PUCCH_Resource__format_PR_format0);
pucch->second_hop_prb = resource->secondHopPRB!= NULL ? *resource->secondHopPRB : 0;
pucch->nr_of_symb = resource->format.choice.format0->nrofSymbols;
pucch->start_symb = resource->format.choice.format0->startingSymbolIndex;
pucch->prb_start = resource->startingPRB;
}
else{
int rsetindex = *scc->uplinkConfigCommon->initialUplinkBWP->pucch_ConfigCommon->choice.setup->pucch_ResourceCommon;
set_r_pucch_parms(rsetindex,
r_pucch,
bwp_size,
&pucch->prb_start,
&pucch->second_hop_prb,
&pucch->nr_of_symb,
&pucch->start_symb);
}
// verifying occupation of PRBs for ACK/NACK on dedicated pucch
for (int l=0; l<pucch->nr_of_symb; l++) {
uint16_t symb = SL_to_bitmap(pucch->start_symb+l, 1);
int prb;
if (l==1 && pucch->second_hop_prb != 0)
prb = pucch->second_hop_prb;
else
prb = pucch->prb_start;
if ((vrb_map_UL[bwp_start+prb] & symb) != 0) {
return false;
break;
}
}
return true;
}
// this function returns an index to NR_sched_pucch structure
// currently this structure contains PUCCH0 at index 0 and PUCCH2 at index 1
@@ -1547,6 +1607,24 @@ int nr_acknack_scheduling(int mod_id,
* later)
* * each UE has dedicated PUCCH Format 0 resources, and we use index 0! */
NR_UE_sched_ctrl_t *sched_ctrl = &RC.nrmac[mod_id]->UE_info.UE_sched_ctrl[UE_id];
NR_CellGroupConfig_t *cg = RC.nrmac[mod_id]->UE_info.CellGroup[UE_id];
NR_PUCCH_Config_t *pucch_Config = NULL;
if (sched_ctrl->active_ubwp) {
pucch_Config = sched_ctrl->active_ubwp->bwp_Dedicated->pucch_Config->choice.setup;
} else if (cg &&
cg->spCellConfig &&
cg->spCellConfig->spCellConfigDedicated &&
cg->spCellConfig->spCellConfigDedicated->uplinkConfig &&
cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP) {
pucch_Config = cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP->pucch_Config->choice.setup;
}
NR_BWP_t *genericParameters = sched_ctrl->active_ubwp ?
&sched_ctrl->active_ubwp->bwp_Common->genericParameters:
&scc->uplinkConfigCommon->initialUplinkBWP->genericParameters;
int bwp_start = NRRIV2PRBOFFSET(genericParameters->locationAndBandwidth,MAX_BWP_SIZE);
int bwp_size = NRRIV2BW(genericParameters->locationAndBandwidth, MAX_BWP_SIZE);
NR_sched_pucch_t *pucch = &sched_ctrl->sched_pucch[0];
LOG_D(NR_MAC, "In %s: %d.%d Trying to allocate pucch, current DAI %d\n", __FUNCTION__, frame, slot, pucch->dai_c);
@@ -1592,7 +1670,6 @@ int nr_acknack_scheduling(int mod_id,
LOG_D(NR_MAC, "In %s: pucch_acknak 1. DL %d.%d, UL_ACK %d.%d, DAI_C %d\n", __FUNCTION__, frame, slot, pucch->frame, pucch->ul_slot, pucch->dai_c);
// this is hardcoded for now as ue specific only if we are not on the initialBWP (to be fixed to allow ue_Specific also on initialBWP
NR_CellGroupConfig_t *cg = RC.nrmac[mod_id]->UE_info.CellGroup[UE_id];
NR_BWP_UplinkDedicated_t *ubwpd=NULL;
if (cg &&
@@ -1666,23 +1743,36 @@ int nr_acknack_scheduling(int mod_id,
// Find the right timing_indicator value.
int ind_found = -1;
// while we are within the feedback limits
uint16_t *vrb_map_UL;
while ((n_slots_frame + pucch->ul_slot - slot) % n_slots_frame <= max_fb_time) {
int i = 0;
while (i < 8) {
LOG_D(NR_MAC, "In %s: pdsch_to_harq_feedback[%d] = %d (pucch->ul_slot %d - slot %d)\n", __FUNCTION__,
i,pdsch_to_harq_feedback[i],pucch->ul_slot,slot);
int diff = pucch->ul_slot - slot;
if (diff<0)
diff += n_slots_frame;
if (pdsch_to_harq_feedback[i] == diff &&
pdsch_to_harq_feedback[i] >= minfbtime) {
ind_found = i;
break;
// checking if in ul_slot the resources potentially to be assigned to this PUCCH are available
vrb_map_UL = &RC.nrmac[mod_id]->common_channels[CC_id].vrb_map_UL[pucch->ul_slot * MAX_BWP_SIZE];
bool ret = test_acknack_vrb_occupation(sched_ctrl,
pucch,
vrb_map_UL,
scc,
pucch_Config,
r_pucch,
bwp_start,
bwp_size);
if (ret) {
int i = 0;
while (i < 8) {
LOG_D(NR_MAC,"pdsch_to_harq_feedback[%d] = %d (pucch->ul_slot %d - slot %d)\n",
i,pdsch_to_harq_feedback[i],pucch->ul_slot,slot);
int diff = pucch->ul_slot - slot;
if (diff<0)
diff += n_slots_frame;
if (pdsch_to_harq_feedback[i] == diff &&
pdsch_to_harq_feedback[i] >= minfbtime) {
ind_found = i;
break;
}
++i;
}
++i;
if (ind_found!=-1)
break;
}
if (ind_found!=-1)
break;
// advance to the next ul slot
const int f = pucch->frame;
const int s = pucch->ul_slot;
@@ -1743,46 +1833,16 @@ int nr_acknack_scheduling(int mod_id,
pucch->dai_c++;
pucch->resource_indicator = 0; // each UE has dedicated PUCCH resources
pucch->r_pucch=r_pucch;
NR_PUCCH_Config_t *pucch_Config = NULL;
if (sched_ctrl->active_ubwp) {
pucch_Config = sched_ctrl->active_ubwp->bwp_Dedicated->pucch_Config->choice.setup;
} else if (RC.nrmac[mod_id]->UE_info.CellGroup[UE_id] &&
RC.nrmac[mod_id]->UE_info.CellGroup[UE_id]->spCellConfig &&
RC.nrmac[mod_id]->UE_info.CellGroup[UE_id]->spCellConfig->spCellConfigDedicated &&
RC.nrmac[mod_id]->UE_info.CellGroup[UE_id]->spCellConfig->spCellConfigDedicated->uplinkConfig &&
RC.nrmac[mod_id]->UE_info.CellGroup[UE_id]->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP &&
RC.nrmac[mod_id]->UE_info.CellGroup[UE_id]->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP->pucch_Config->choice.setup) {
pucch_Config = RC.nrmac[mod_id]->UE_info.CellGroup[UE_id]->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP->pucch_Config->choice.setup;
}
NR_BWP_t *genericParameters = sched_ctrl->active_ubwp ?
&sched_ctrl->active_ubwp->bwp_Common->genericParameters:
&scc->uplinkConfigCommon->initialUplinkBWP->genericParameters;
int bwp_start = NRRIV2PRBOFFSET(genericParameters->locationAndBandwidth,MAX_BWP_SIZE);
/* verify that at that slot and symbol, resources are free. We only do this
* for initialCyclicShift 0 (we assume it always has that one), so other
* initialCyclicShifts can overlap with ICS 0!*/
if (pucch_Config) {
const NR_PUCCH_Resource_t *resource = pucch_Config->resourceToAddModList->list.array[pucch->resource_indicator];
DevAssert(resource->format.present == NR_PUCCH_Resource__format_PR_format0);
int second_hop_prb = resource->secondHopPRB!= NULL ? *resource->secondHopPRB : 0;
int nr_of_symbols = resource->format.choice.format0->nrofSymbols;
if (resource->format.choice.format0->initialCyclicShift == 0) {
uint16_t *vrb_map_UL = &RC.nrmac[mod_id]->common_channels[CC_id].vrb_map_UL[pucch->ul_slot * MAX_BWP_SIZE];
for (int l=0; l<nr_of_symbols; l++) {
uint16_t symb = 1 << (resource->format.choice.format0->startingSymbolIndex + l);
int prb;
if (l==1 && second_hop_prb != 0)
prb = second_hop_prb;
else
prb = resource->startingPRB;
if ((vrb_map_UL[bwp_start+prb] & symb) != 0)
LOG_W(MAC, "symbol 0x%x is not free for PUCCH alloc in vrb_map_UL at RB %ld and slot %d.%d\n", symb, resource->startingPRB, pucch->frame, pucch->ul_slot);
vrb_map_UL[bwp_start+prb] |= symb;
}
}
vrb_map_UL = &RC.nrmac[mod_id]->common_channels[CC_id].vrb_map_UL[pucch->ul_slot * MAX_BWP_SIZE];
for (int l=0; l<pucch->nr_of_symb; l++) {
uint16_t symb = SL_to_bitmap(pucch->start_symb+l, 1);
int prb;
if (l==1 && pucch->second_hop_prb != 0)
prb = pucch->second_hop_prb;
else
prb = pucch->prb_start;
vrb_map_UL[bwp_start+prb] |= symb;
}
return 0;
}
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c
+58 -49
View File
@@ -977,13 +977,6 @@ bool allocate_ul_retransmission(module_id_t module_id,
LOG_D(NR_MAC,"retInfo->time_domain_allocation = %d, tda = %d\n", retInfo->time_domain_allocation, tda);
LOG_D(NR_MAC,"num_dmrs_cdm_grps_no_data %d, tbs %d\n",num_dmrs_cdm_grps_no_data, retInfo->tb_size);
if (tda == retInfo->time_domain_allocation) {
/* Check the resource is enough for retransmission */
while (rbStart < bwpSize && !rballoc_mask[rbStart])
rbStart++;
if (rbStart + retInfo->rbSize > bwpSize) {
LOG_W(NR_MAC, "cannot allocate retransmission of UE %d/RNTI %04x: no resources (rbStart %d, retInfo->rbSize %d, bwpSize %d\n", UE_id, UE_info->rnti[UE_id], rbStart, retInfo->rbSize, bwpSize);
return false;
}
/* check whether we need to switch the TDA allocation since tha last
* (re-)transmission */
NR_pusch_semi_static_t *ps = &sched_ctrl->pusch_semi_static;
@@ -997,18 +990,29 @@ bool allocate_ul_retransmission(module_id_t module_id,
nr_set_pusch_semi_static(scc, sched_ctrl->active_ubwp, ubwpd, dci_format, tda, num_dmrs_cdm_grps_no_data, ps);
sched_ctrl->update_pusch_ps = false;
}
/* Check the resource is enough for retransmission */
while (rbStart < bwpSize &&
!(rballoc_mask[rbStart]&SL_to_bitmap(ps->startSymbolIndex, ps->nrOfSymbols)))
rbStart++;
if (rbStart + retInfo->rbSize > bwpSize) {
LOG_W(NR_MAC, "cannot allocate retransmission of UE %d/RNTI %04x: no resources (rbStart %d, retInfo->rbSize %d, bwpSize %d\n", UE_id, UE_info->rnti[UE_id], rbStart, retInfo->rbSize, bwpSize);
return false;
}
LOG_D(NR_MAC, "%s(): retransmission keeping TDA %d and TBS %d\n", __func__, tda, retInfo->tb_size);
} else {
/* the retransmission will use a different time domain allocation, check
* that we have enough resources */
while (rbStart < bwpSize && !rballoc_mask[rbStart])
rbStart++;
int rbSize = 0;
while (rbStart + rbSize < bwpSize && rballoc_mask[rbStart + rbSize])
rbSize++;
NR_pusch_semi_static_t temp_ps;
int dci_format = get_dci_format(sched_ctrl);
nr_set_pusch_semi_static(scc, sched_ctrl->active_ubwp,ubwpd, dci_format, tda, num_dmrs_cdm_grps_no_data, &temp_ps);
/* the retransmission will use a different time domain allocation, check
* that we have enough resources */
while (rbStart < bwpSize &&
!(rballoc_mask[rbStart]&SL_to_bitmap(temp_ps.startSymbolIndex, temp_ps.nrOfSymbols)))
rbStart++;
int rbSize = 0;
while (rbStart + rbSize < bwpSize &&
(rballoc_mask[rbStart + rbSize]&SL_to_bitmap(temp_ps.startSymbolIndex, temp_ps.nrOfSymbols)))
rbSize++;
uint32_t new_tbs;
uint16_t new_rbSize;
bool success = nr_find_nb_rb(retInfo->Qm,
@@ -1091,7 +1095,7 @@ bool allocate_ul_retransmission(module_id_t module_id,
/* Mark the corresponding RBs as used */
n_rb_sched -= sched_pusch->rbSize;
for (int rb = 0; rb < sched_ctrl->sched_pusch.rbSize; rb++)
rballoc_mask[rb + sched_ctrl->sched_pusch.rbStart] = 0;
rballoc_mask[rb + sched_ctrl->sched_pusch.rbStart] ^= SL_to_bitmap(sched_ctrl->pusch_semi_static.startSymbolIndex, sched_ctrl->pusch_semi_static.nrOfSymbols);
return true;
}
@@ -1209,21 +1213,6 @@ void pf_ul(module_id_t module_id,
if (max_num_ue < 0)
return;
LOG_D(NR_MAC,"Looking for min_rb %d RBs, starting at %d\n", min_rb, rbStart);
while (rbStart < bwpSize && !rballoc_mask[rbStart]) rbStart++;
if (rbStart + min_rb >= bwpSize) {
LOG_W(NR_MAC, "cannot allocate continuous UL data for UE %d/RNTI %04x: no resources (rbStart %d, min_rb %d, bwpSize %d\n",
UE_id, UE_info->rnti[UE_id],rbStart,min_rb,bwpSize);
return;
}
sched_ctrl->cce_index = CCEIndex;
fill_pdcch_vrb_map(RC.nrmac[module_id],
CC_id,
&sched_ctrl->sched_pdcch,
CCEIndex,
sched_ctrl->aggregation_level);
/* Save PUSCH field */
/* we want to avoid a lengthy deduction of DMRS and other parameters in
* every TTI if we can save it, so check whether dci_format, TDA, or
@@ -1238,6 +1227,24 @@ void pf_ul(module_id_t module_id,
nr_set_pusch_semi_static(scc, sched_ctrl->active_ubwp, ubwpd, dci_format, tda, num_dmrs_cdm_grps_no_data, ps);
sched_ctrl->update_pusch_ps = false;
}
LOG_D(NR_MAC,"Looking for min_rb %d RBs, starting at %d\n", min_rb, rbStart);
while (rbStart < bwpSize &&
!(rballoc_mask[rbStart]&SL_to_bitmap(ps->startSymbolIndex, ps->nrOfSymbols)))
rbStart++;
if (rbStart + min_rb >= bwpSize) {
LOG_W(NR_MAC, "cannot allocate continuous UL data for UE %d/RNTI %04x: no resources (rbStart %d, min_rb %d, bwpSize %d\n",
UE_id, UE_info->rnti[UE_id],rbStart,min_rb,bwpSize);
return;
}
sched_ctrl->cce_index = CCEIndex;
fill_pdcch_vrb_map(RC.nrmac[module_id],
CC_id,
&sched_ctrl->sched_pdcch,
CCEIndex,
sched_ctrl->aggregation_level);
NR_sched_pusch_t *sched_pusch = &sched_ctrl->sched_pusch;
sched_pusch->mcs = 9;
update_ul_ue_R_Qm(sched_pusch, ps);
@@ -1256,7 +1263,7 @@ void pf_ul(module_id_t module_id,
/* Mark the corresponding RBs as used */
n_rb_sched -= sched_pusch->rbSize;
for (int rb = 0; rb < sched_ctrl->sched_pusch.rbSize; rb++)
rballoc_mask[rb + sched_ctrl->sched_pusch.rbStart] = 0;
rballoc_mask[rb + sched_ctrl->sched_pusch.rbStart] ^= SL_to_bitmap(ps->startSymbolIndex, ps->nrOfSymbols);
continue;
}
@@ -1331,19 +1338,6 @@ void pf_ul(module_id_t module_id,
NR_sched_pusch_t *sched_pusch = &sched_ctrl->sched_pusch;
NR_pusch_semi_static_t *ps = &sched_ctrl->pusch_semi_static;
while (rbStart < bwpSize && !rballoc_mask[rbStart]) rbStart++;
sched_pusch->rbStart = rbStart;
uint16_t max_rbSize = 1;
while (rbStart + max_rbSize < bwpSize && rballoc_mask[rbStart + max_rbSize])
max_rbSize++;
if (rbStart + min_rb >= bwpSize) {
LOG_W(NR_MAC, "cannot allocate UL data for UE %d/RNTI %04x: no resources (rbStart %d, min_rb %d, bwpSize %d\n",
UE_id, UE_info->rnti[UE_id],rbStart,min_rb,bwpSize);
return;
}
else LOG_D(NR_MAC,"allocating UL data for UE %d/RNTI %04x (rbStsart %d, min_rb %d, bwpSize %d\n",UE_id, UE_info->rnti[UE_id],rbStart,min_rb,bwpSize);
/* Save PUSCH field */
/* we want to avoid a lengthy deduction of DMRS and other parameters in
* every TTI if we can save it, so check whether dci_format, TDA, or
@@ -1360,6 +1354,23 @@ void pf_ul(module_id_t module_id,
}
update_ul_ue_R_Qm(sched_pusch, ps);
while (rbStart < bwpSize &&
!(rballoc_mask[rbStart]&SL_to_bitmap(ps->startSymbolIndex, ps->nrOfSymbols)))
rbStart++;
sched_pusch->rbStart = rbStart;
uint16_t max_rbSize = 1;
while (rbStart + max_rbSize < bwpSize &&
(rballoc_mask[rbStart + max_rbSize]&&SL_to_bitmap(ps->startSymbolIndex, ps->nrOfSymbols)))
max_rbSize++;
if (rbStart + min_rb >= bwpSize) {
LOG_W(NR_MAC, "cannot allocate UL data for UE %d/RNTI %04x: no resources (rbStart %d, min_rb %d, bwpSize %d\n",
UE_id, UE_info->rnti[UE_id],rbStart,min_rb,bwpSize);
return;
}
else LOG_D(NR_MAC,"allocating UL data for UE %d/RNTI %04x (rbStsart %d, min_rb %d, bwpSize %d\n",UE_id, UE_info->rnti[UE_id],rbStart,min_rb,bwpSize);
/* Calculate the current scheduling bytes and the necessary RBs */
const int B = cmax(sched_ctrl->estimated_ul_buffer - sched_ctrl->sched_ul_bytes, 0);
uint16_t rbSize = 0;
@@ -1390,7 +1401,7 @@ void pf_ul(module_id_t module_id,
n_rb_sched -= sched_pusch->rbSize;
for (int rb = 0; rb < sched_ctrl->sched_pusch.rbSize; rb++)
rballoc_mask[rb + sched_ctrl->sched_pusch.rbStart] = 0;
rballoc_mask[rb + sched_ctrl->sched_pusch.rbStart] ^= SL_to_bitmap(ps->startSymbolIndex, ps->nrOfSymbols);
}
}
@@ -1473,11 +1484,9 @@ bool nr_fr1_ulsch_preprocessor(module_id_t module_id, frame_t frame, sub_frame_t
const int startSymbolAndLength = tdaList->list.array[tda]->startSymbolAndLength;
int startSymbolIndex, nrOfSymbols;
SLIV2SL(startSymbolAndLength, &startSymbolIndex, &nrOfSymbols);
const uint16_t symb = ((1 << nrOfSymbols) - 1) << startSymbolIndex;
const uint16_t symb = SL_to_bitmap(startSymbolIndex, nrOfSymbols);
int st = 0, e = 0, len = 0;
for (int i = 0; i < bwpSize; i++)
if (RC.nrmac[module_id]->ulprbbl[i] == 1) vrb_map_UL[i]=symb;
for (int i = 0; i < bwpSize; i++) {
while ((vrb_map_UL[bwpStart + i] & symb) != 0 && i < bwpSize)
@@ -1498,7 +1507,7 @@ bool nr_fr1_ulsch_preprocessor(module_id_t module_id, frame_t frame, sub_frame_t
/* Calculate mask: if any RB in vrb_map_UL is blocked (1), the current RB will be 0 */
for (int i = 0; i < bwpSize; i++)
rballoc_mask[i] = i >= st && i <= e;
rballoc_mask[i] = (i >= st && i <= e)*SL_to_bitmap(startSymbolIndex, nrOfSymbols);
/* proportional fair scheduling algorithm */
pf_ul(module_id,
openair2/LAYER2/NR_MAC_gNB/mac_proto.h
+8
View File
@@ -291,6 +291,14 @@ void prepare_dci(const NR_CellGroupConfig_t *CellGroup,
nr_dci_format_t format,
int bwp_id);
void set_r_pucch_parms(int rsetindex,
int r_pucch,
int bwp_size,
int *prb_start,
int *second_hop_prb,
int *nr_of_symbols,
int *start_symbol_index);
/* find coreset within the search space */
NR_ControlResourceSet_t *get_coreset(module_id_t module_idP,
NR_ServingCellConfigCommon_t *scc,
openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h
+7 -1
View File
@@ -171,6 +171,8 @@ typedef struct {
uint8_t msg3_round;
/// Flag to indicate if Msg3 carries a DCCH or DTCH message
bool msg3_dcch_dtch;
int msg3_startsymb;
int msg3_nrsymb;
/// TBS used for Msg4
int msg4_TBsize;
/// MCS used for Msg4
@@ -327,6 +329,10 @@ typedef struct NR_sched_pucch {
uint8_t timing_indicator;
uint8_t resource_indicator;
int r_pucch;
int prb_start;
int second_hop_prb;
int nr_of_symb;
int start_symb;
} NR_sched_pucch_t;
/* PUSCH semi-static configuration: as long as the TDA and DCI format remain
@@ -724,7 +730,7 @@ typedef struct gNB_MAC_INST_s {
/// current PDU index (BCH,DLSCH)
uint16_t pdu_index[NFAPI_CC_MAX];
int num_ulprbbl;
int ulprbbl[275];
uint16_t ulprbbl[275];
/// NFAPI Config Request Structure
nfapi_nr_config_request_scf_t config[NFAPI_CC_MAX];
/// NFAPI DL Config Request Structure