Added NFAPI MCH scheduling support

M3AP ASN1 source spec updated

	ACKNOWLEDGEMENT:
 	1. This commit was developed at Vicomtech (https://www.vicomtech.org) under UE project CDN-X-ALL: "CDN edge-cloud computing for efficient cache and reliable streaming aCROSS Aggregated unicast-multicast LinkS"
 	2. Project funded by Fed4FIRE+ OC5 (https://www.fed4fire.eu)

	Signed-off-by: Javier Morgade <javier.morgade@ieee.org>
This commit is contained in:
Javier Morgade
2019-12-14 13:01:12 +01:00
parent 58734eb019
commit 7d86b936ce
10 changed files with 1541 additions and 827 deletions
+3 -1
View File
@@ -102,9 +102,11 @@ void generate_mch(PHY_VARS_eNB *eNB,L1_rxtx_proc_t *proc,uint8_t *a)
eNB->common_vars.txdataF,
AMP);
AssertFatal(eNB->dlsch_MCH->harq_processes[0]->pdu != NULL, "attempt to encode a NULL harq PDU\n");
AssertFatal(dlsch_encoding(eNB,
a,
// a,
eNB->dlsch_MCH->harq_processes[0]->pdu,
1,
eNB->dlsch_MCH,
proc->frame_tx,
+8 -4
View File
@@ -319,17 +319,21 @@ void mch_channel_level_khz_1dot25(int **dl_ch_estimates_ext,
for (i=0; i<(nre>>2); i++) {
#if defined(__x86_64__) || defined(__i386__)
avg128 = _mm_add_epi32(avg128,_mm_madd_epi16(dl_ch128[0],dl_ch128[0]));
//avg128 = _mm_add_epi32(avg128,_mm_madd_epi16(dl_ch128[0],dl_ch128[0]));
avg128 = _mm_add_epi32(avg128,_mm_srai_epi32(_mm_madd_epi16(dl_ch128[0],dl_ch128[0]),log2_approx(nre>>2)-1));
#elif defined(__arm__)
#endif
}
avg[aarx] = (((int*)&avg128)[0] +
// avg[aarx] = (((int*)&avg128)[0] +
// ((int*)&avg128)[1] +
// ((int*)&avg128)[2] +
// ((int*)&avg128)[3])/nre;
avg[aarx] = (((((int*)&avg128)[0] +
((int*)&avg128)[1] +
((int*)&avg128)[2] +
((int*)&avg128)[3])/nre;
((int*)&avg128)[3])/(nre>>factor2(nre)))*(1<<(log2_approx(nre>>2)-1-factor2(nre))));
//printf("Channel level : %d\n",avg[(aatx<<1)+aarx]);
}
+71 -1
View File
@@ -139,6 +139,54 @@ void handle_nfapi_bch_pdu(PHY_VARS_eNB *eNB,L1_rxtx_proc_t *proc,
// adjust transmit amplitude here based on NFAPI info
}
void handle_nfapi_mch_pdu(PHY_VARS_eNB *eNB,int frame,int subframe,L1_rxtx_proc_t *proc,
nfapi_dl_config_request_pdu_t *dl_config_pdu,
uint8_t *sdu){
nfapi_dl_config_mch_pdu_rel8_t *rel8 = &dl_config_pdu->mch_pdu.mch_pdu_rel8;
LTE_eNB_DLSCH_t *dlsch = eNB->dlsch_MCH;
LTE_DL_FRAME_PARMS *frame_parms=&eNB->frame_parms;
// dlsch->rnti = M_RNTI;
dlsch->harq_processes[0]->mcs = rel8->modulation;
// dlsch->harq_processes[0]->Ndi = ndi;
dlsch->harq_processes[0]->rvidx = 0;//rvidx;
dlsch->harq_processes[0]->Nl = 1;
dlsch->harq_processes[0]->TBS = TBStable[get_I_TBS(dlsch->harq_processes[0]->mcs)][frame_parms->N_RB_DL-1];
// dlsch->harq_ids[subframe] = 0;
dlsch->harq_processes[0]->nb_rb = frame_parms->N_RB_DL;
switch(frame_parms->N_RB_DL) {
case 6:
dlsch->harq_processes[0]->rb_alloc[0] = 0x3f;
break;
case 25:
dlsch->harq_processes[0]->rb_alloc[0] = 0x1ffffff;
break;
case 50:
dlsch->harq_processes[0]->rb_alloc[0] = 0xffffffff;
dlsch->harq_processes[0]->rb_alloc[1] = 0x3ffff;
break;
case 100:
dlsch->harq_processes[0]->rb_alloc[0] = 0xffffffff;
dlsch->harq_processes[0]->rb_alloc[1] = 0xffffffff;
dlsch->harq_processes[0]->rb_alloc[2] = 0xffffffff;
dlsch->harq_processes[0]->rb_alloc[3] = 0xf;
break;
}
dlsch->harq_ids[proc->frame_tx%2][proc->subframe_tx] = 0;
dlsch->harq_processes[0]->pdu = sdu;
dlsch->active = 1;
}
#if (LTE_RRC_VERSION >= MAKE_VERSION(14, 0, 0))
extern uint32_t localRIV2alloc_LUT6[32];
extern uint32_t localRIV2alloc_LUT25[512];
@@ -839,8 +887,30 @@ void schedule_response(Sched_Rsp_t *Sched_INFO) {
break;
case NFAPI_DL_CONFIG_MCH_PDU_TYPE:
case NFAPI_DL_CONFIG_MCH_PDU_TYPE:{
// handle_nfapi_mch_dl_pdu(eNB,dl_config_pdu);
//AssertFatal(1==0,"OK\n");
nfapi_dl_config_mch_pdu_rel8_t *mch_pdu_rel8 = &dl_config_pdu->mch_pdu.mch_pdu_rel8;
uint16_t pdu_index = mch_pdu_rel8->pdu_index;
uint16_t tx_pdus = TX_req->tx_request_body.number_of_pdus;
uint16_t invalid_pdu = pdu_index == -1;
uint8_t *sdu = invalid_pdu ? NULL : pdu_index >= tx_pdus ? NULL : TX_req->tx_request_body.tx_pdu_list[pdu_index].segments[0].segment_data;
LOG_D(PHY,"%s() [PDU:%d] NFAPI_DL_CONFIG_MCH_PDU_TYPE SFN/SF:%04d%d TX:%d/%d RX:%d/%d pdu_index:%d sdu:%p\n",
__FUNCTION__, i,
NFAPI_SFNSF2SFN(DL_req->sfn_sf),NFAPI_SFNSF2SF(DL_req->sfn_sf),
proc->frame_tx, proc->subframe_tx,
proc->frame_rx, proc->subframe_rx,
pdu_index, sdu);
if (sdu) { //sdu != NULL)
if (NFAPI_MODE!=NFAPI_MODE_VNF)
handle_nfapi_mch_pdu(eNB,NFAPI_SFNSF2SFN(DL_req->sfn_sf),NFAPI_SFNSF2SF(DL_req->sfn_sf),proc,dl_config_pdu, sdu);
} else {
dont_send=1;
LOG_E(MAC,"%s() NFAPI_DL_CONFIG_MCH_PDU_TYPE sdu is NULL DL_CFG:SFN/SF:%d:pdu_index:%d TX_REQ:SFN/SF:%d:pdus:%d\n", __FUNCTION__, NFAPI_SFNSF2DEC(DL_req->sfn_sf), pdu_index,
NFAPI_SFNSF2DEC(TX_req->sfn_sf), tx_pdus);
}
do_oai=1;
}
break;
case NFAPI_DL_CONFIG_DLSCH_PDU_TYPE: {
+5
View File
@@ -53,6 +53,11 @@ void handle_nfapi_dlsch_pdu(PHY_VARS_eNB *eNB,int frame,int subframe,L1_rxtx_pro
nfapi_dl_config_request_pdu_t *dl_config_pdu,
uint8_t codeword_index,
uint8_t *sdu);
void handle_nfapi_mch_pdu(PHY_VARS_eNB *eNB,int frame,int subframe,L1_rxtx_proc_t *proc,
nfapi_dl_config_request_pdu_t *dl_config_pdu,
uint8_t *sdu);
void handle_nfapi_ul_pdu(PHY_VARS_eNB *eNB,L1_rxtx_proc_t *proc,
nfapi_ul_config_request_pdu_t *ul_config_pdu,
uint16_t frame,uint8_t subframe,uint8_t srs_present);
+15 -1
View File
@@ -47,6 +47,8 @@
#include "intertask_interface.h"
#define MBMS_NFAPI_SCHEDULER
nfapi_ue_release_request_body_t release_rntis;
int16_t get_hundred_times_delta_IF_eNB(PHY_VARS_eNB *eNB,uint16_t UE_id,uint8_t harq_pid, uint8_t bw_factor) {
@@ -117,6 +119,16 @@ lte_subframe_t get_subframe_direction(uint8_t Mod_id,uint8_t CC_id,uint8_t subfr
return(subframe_select(&RC.eNB[Mod_id][CC_id]->frame_parms,subframe));
}
#ifdef MBMS_NFAPI_SCHEDULER
void pmch_procedures(PHY_VARS_eNB *eNB,L1_rxtx_proc_t *proc) {
int subframe = proc->subframe_tx;
// This is DL-Cell spec pilots in Control region
generate_pilots_slot (eNB, eNB->common_vars.txdataF, AMP, subframe << 1, 1);
if(eNB->dlsch_MCH->active==1)
generate_mch (eNB, proc,NULL/*, eNB->dlsch_MCH->harq_processes[0]->pdu*/);
eNB->dlsch_MCH->active = 0;
}
#else
void pmch_procedures(PHY_VARS_eNB *eNB,L1_rxtx_proc_t *proc) {
#if (LTE_RRC_VERSION >= MAKE_VERSION(10, 0, 0))
MCH_PDU *mch_pduP=NULL;
@@ -151,14 +163,16 @@ void pmch_procedures(PHY_VARS_eNB *eNB,L1_rxtx_proc_t *proc) {
if (mch_pduP) {
fill_eNB_dlsch_MCH (eNB, mch_pduP->mcs, 1, 0);
eNB->dlsch_MCH->harq_ids[proc->frame_tx%2][subframe] = 0;
eNB->dlsch_MCH->harq_processes[0]->pdu=(uint8_t *) mch_pduP->payload;
// Generate PMCH
generate_mch (eNB, proc, (uint8_t *) mch_pduP->payload);
generate_mch (eNB, proc, NULL/*(uint8_t *) mch_pduP->payload*/);
} else {
LOG_D (PHY, "[eNB/RN] Frame %d subframe %d: MCH not generated \n", proc->frame_tx, subframe);
}
#endif
}
#endif
void common_signal_procedures (PHY_VARS_eNB *eNB,int frame, int subframe) {
LTE_DL_FRAME_PARMS *fp=&eNB->frame_parms;
+5 -1
View File
@@ -940,7 +940,11 @@ eNB_dlsch_ulsch_scheduler(module_id_t module_idP,
for (CC_id = 0; CC_id < MAX_NUM_CCs; CC_id++) {
if (cc[CC_id].MBMS_flag > 0) {
start_meas(&RC.mac[module_idP]->schedule_mch);
mbsfn_status[CC_id] = schedule_MBMS(module_idP, CC_id, frameP, subframeP);
int(*schedule_mch)(module_id_t module_idP, uint8_t CC_id, frame_t frameP, sub_frame_t subframe) = NULL;
schedule_mch = schedule_MBMS_NFAPI;
if(schedule_mch){
mbsfn_status[CC_id] = schedule_mch(module_idP, CC_id, frameP, subframeP);
}
stop_meas(&RC.mac[module_idP]->schedule_mch);
}
}
+813
View File
@@ -34,6 +34,7 @@
#include "LAYER2/MAC/mac_proto.h"
#include "LAYER2/MAC/mac_extern.h"
#include "common/utils/LOG/log.h"
#include "nfapi/oai_integration/vendor_ext.h"
#include "common/utils/LOG/vcd_signal_dumper.h"
#include "UTIL/OPT/opt.h"
#include "OCG.h"
@@ -92,6 +93,818 @@ static uint8_t msi_sfs=0;
//MSI_ELEMENT * ptr =NULL;
int
schedule_MBMS_NFAPI(module_id_t module_idP, uint8_t CC_id, frame_t frameP,
sub_frame_t subframeP)
{
nfapi_dl_config_request_body_t *dl_req;
//nfapi_dl_config_request_pdu_t *dl_config_pdu;
int mcch_flag = 0, mtch_flag = 0, msi_flag = 0;
int mbsfn_period = 0; // 1<<(RC.mac[module_idP]->mbsfn_SubframeConfig[0]->radioframeAllocationPeriod);
int mcch_period = 0; //32<<(RC.mac[module_idP]->mbsfn_AreaInfo[0]->mcch_Config_r9.mcch_RepetitionPeriod_r9);
if(RC.mac[module_idP]->common_channels[CC_id].
pmch_Config[0] == NULL )
return 0;
int mch_scheduling_period =
8 << (RC.mac[module_idP]->common_channels[CC_id].
pmch_Config[0]->mch_SchedulingPeriod_r9);
unsigned char mcch_sdu_length;
unsigned char header_len_mcch = 0, header_len_msi =
0, header_len_mtch = 0, header_len_mtch_temp =
0, header_len_mcch_temp = 0, header_len_msi_temp = 0;
int ii = 0, msi_pos = 0;
int mcch_mcs = -1;
uint16_t TBS, j = -1, padding = 0, post_padding = 0;
mac_rlc_status_resp_t rlc_status;
int num_mtch;
int msi_length, i, k;
//uint8_t l =0;
unsigned char sdu_lcids[11], num_sdus = 0, offset = 0;
uint16_t sdu_lengths[11], sdu_length_total = 0;
unsigned char mch_buffer[MAX_DLSCH_PAYLOAD_BYTES]; // check the max value, this is for dlsch only
COMMON_channels_t *cc = &RC.mac[module_idP]->common_channels[CC_id];
cc->MCH_pdu.Pdu_size = 0;
for (i = 0; i < cc->num_active_mbsfn_area; i++) {
// assume, that there is always a mapping
if ((j = get_mbsfn_sf_alloction(module_idP, CC_id, i)) == -1) {
return 0;
}
mbsfn_period =
1 << (cc->mbsfn_SubframeConfig[j]->radioframeAllocationPeriod);
mcch_period =
32 << (cc->mbsfn_AreaInfo[i]->
mcch_Config_r9.mcch_RepetitionPeriod_r9);
msi_pos = 0;
ii = 0;
LOG_D(MAC,
"[eNB %d] CC_id %d Frame %d subframeP %d : Checking MBSFN Sync Area %d/%d with SF allocation %d/%d for MCCH and MTCH (mbsfn period %d, mcch period %d)\n",
module_idP, CC_id, frameP, subframeP, i,
cc->num_active_mbsfn_area, j, cc->num_sf_allocation_pattern,
mbsfn_period, mcch_period);
switch (cc->mbsfn_AreaInfo[i]->mcch_Config_r9.signallingMCS_r9) {
case 0:
mcch_mcs = 2;
break;
case 1:
mcch_mcs = 7;
break;
case 2:
mcch_mcs = 13;
break;
case 3:
mcch_mcs = 19;
break;
}
// 1st: Check the MBSFN subframes from SIB2 info (SF allocation pattern i, max 8 non-overlapping patterns exist)
if (frameP % mbsfn_period == cc->mbsfn_SubframeConfig[j]->radioframeAllocationOffset) { // MBSFN frameP
if (cc->mbsfn_SubframeConfig[j]->subframeAllocation.present == LTE_MBSFN_SubframeConfig__subframeAllocation_PR_oneFrame) { // one-frameP format
// Find the first subframeP in this MCH to transmit MSI
if (frameP % mch_scheduling_period ==
cc->mbsfn_SubframeConfig[j]->
radioframeAllocationOffset) {
while (ii == 0) {
ii = cc->
mbsfn_SubframeConfig[j]->subframeAllocation.
choice.oneFrame.buf[0] & (0x80 >> msi_pos);
msi_pos++;
}
LOG_D(MAC,
"[eNB %d] CC_id %d Frame %d subframeP %d : sync area %d sf allocation pattern %d sf alloc %x msi pos is %d \n",
module_idP, CC_id, frameP, subframeP, i, j,
cc->mbsfn_SubframeConfig[j]->
subframeAllocation.choice.oneFrame.buf[0],
msi_pos);
}
// Check if the subframeP is for MSI, MCCH or MTCHs and Set the correspoding flag to 1
switch (subframeP) {
case 1:
if (cc->tdd_Config == NULL) {
if ((cc->
mbsfn_SubframeConfig[j]->subframeAllocation.
choice.oneFrame.buf[0] & MBSFN_FDD_SF1) ==
MBSFN_FDD_SF1) {
if (msi_pos == 1) {
msi_flag = 1;
}
if ((frameP % mcch_period ==
cc->mbsfn_AreaInfo[i]->
mcch_Config_r9.mcch_Offset_r9)
&&
((cc->mbsfn_AreaInfo[i]->
mcch_Config_r9.sf_AllocInfo_r9.
buf[0] & MBSFN_FDD_SF1) ==
MBSFN_FDD_SF1)) {
mcch_flag = 1;
}
mtch_flag = 1;
}
}
break;
case 2:
if (cc->tdd_Config == NULL) {
if ((cc->
mbsfn_SubframeConfig[j]->subframeAllocation.
choice.oneFrame.buf[0] & MBSFN_FDD_SF2) ==
MBSFN_FDD_SF2) {
if (msi_pos == 2) {
msi_flag = 1;
}
if ((frameP % mcch_period ==
cc->mbsfn_AreaInfo[i]->
mcch_Config_r9.mcch_Offset_r9)
&&
((cc->mbsfn_AreaInfo[i]->
mcch_Config_r9.sf_AllocInfo_r9.
buf[0] & MBSFN_FDD_SF2) ==
MBSFN_FDD_SF2)) {
mcch_flag = 1;
}
mtch_flag = 1;
}
}
break;
case 3:
if (cc->tdd_Config != NULL) { // TDD
if ((cc->
mbsfn_SubframeConfig[j]->subframeAllocation.
choice.oneFrame.buf[0] & MBSFN_TDD_SF3) ==
MBSFN_TDD_SF3) {
if (msi_pos == 1) {
msi_flag = 1;
}
if ((frameP % mcch_period ==
cc->mbsfn_AreaInfo[i]->
mcch_Config_r9.mcch_Offset_r9)
&&
((cc->mbsfn_AreaInfo[i]->
mcch_Config_r9.sf_AllocInfo_r9.
buf[0] & MBSFN_TDD_SF3) ==
MBSFN_TDD_SF3)) {
mcch_flag = 1;
}
mtch_flag = 1;
}
} else { // FDD
if ((cc->
mbsfn_SubframeConfig[j]->subframeAllocation.
choice.oneFrame.buf[0] & MBSFN_FDD_SF3) ==
MBSFN_FDD_SF3) {
if (msi_pos == 3) {
msi_flag = 1;
}
if ((frameP % mcch_period ==
cc->mbsfn_AreaInfo[i]->
mcch_Config_r9.mcch_Offset_r9)
&&
((cc->mbsfn_AreaInfo[i]->
mcch_Config_r9.sf_AllocInfo_r9.
buf[0] & MBSFN_FDD_SF3) ==
MBSFN_FDD_SF3)) {
mcch_flag = 1;
}
mtch_flag = 1;
}
}
break;
case 4:
if (cc->tdd_Config != NULL) {
if ((cc->
mbsfn_SubframeConfig[j]->subframeAllocation.
choice.oneFrame.buf[0] & MBSFN_TDD_SF4) ==
MBSFN_TDD_SF4) {
if (msi_pos == 2) {
msi_flag = 1;
}
if ((frameP % mcch_period ==
cc->mbsfn_AreaInfo[i]->
mcch_Config_r9.mcch_Offset_r9)
&&
((cc->mbsfn_AreaInfo[i]->
mcch_Config_r9.sf_AllocInfo_r9.
buf[0] & MBSFN_TDD_SF4) ==
MBSFN_TDD_SF4)) {
mcch_flag = 1;
}
mtch_flag = 1;
}
}
break;
case 6:
if (cc->tdd_Config == NULL) {
if ((cc->
mbsfn_SubframeConfig[j]->subframeAllocation.
choice.oneFrame.buf[0] & MBSFN_FDD_SF6) ==
MBSFN_FDD_SF6) {
if (msi_pos == 4) {
msi_flag = 1;
}
if ((frameP % mcch_period ==
cc->mbsfn_AreaInfo[i]->
mcch_Config_r9.mcch_Offset_r9)
&&
((cc->mbsfn_AreaInfo[i]->
mcch_Config_r9.sf_AllocInfo_r9.
buf[0] & MBSFN_FDD_SF6) ==
MBSFN_FDD_SF6)) {
mcch_flag = 1;
}
mtch_flag = 1;
}
}
break;
case 7:
if (cc->tdd_Config != NULL) { // TDD
if ((cc->
mbsfn_SubframeConfig[j]->subframeAllocation.
choice.oneFrame.buf[0] & MBSFN_TDD_SF7) ==
MBSFN_TDD_SF7) {
if (msi_pos == 3) {
msi_flag = 1;
}
if ((frameP % mcch_period ==
cc->mbsfn_AreaInfo[i]->
mcch_Config_r9.mcch_Offset_r9)
&&
((cc->mbsfn_AreaInfo[i]->
mcch_Config_r9.sf_AllocInfo_r9.
buf[0] & MBSFN_TDD_SF7) ==
MBSFN_TDD_SF7)) {
mcch_flag = 1;
}
mtch_flag = 1;
}
} else { // FDD
if ((cc->
mbsfn_SubframeConfig[j]->subframeAllocation.
choice.oneFrame.buf[0] & MBSFN_FDD_SF7) ==
MBSFN_FDD_SF7) {
if (msi_pos == 5) {
msi_flag = 1;
}
if ((frameP % mcch_period ==
cc->mbsfn_AreaInfo[i]->
mcch_Config_r9.mcch_Offset_r9)
&&
((cc->mbsfn_AreaInfo[i]->
mcch_Config_r9.sf_AllocInfo_r9.
buf[0] & MBSFN_FDD_SF7) ==
MBSFN_FDD_SF7)) {
mcch_flag = 1;
}
mtch_flag = 1;
}
}
break;
case 8:
if (cc->tdd_Config != NULL) { //TDD
if ((cc->
mbsfn_SubframeConfig[j]->subframeAllocation.
choice.oneFrame.buf[0] & MBSFN_TDD_SF8) ==
MBSFN_TDD_SF8) {
if (msi_pos == 4) {
msi_flag = 1;
}
if ((frameP % mcch_period ==
cc->mbsfn_AreaInfo[i]->
mcch_Config_r9.mcch_Offset_r9)
&&
((cc->mbsfn_AreaInfo[i]->
mcch_Config_r9.sf_AllocInfo_r9.
buf[0] & MBSFN_TDD_SF8) ==
MBSFN_TDD_SF8)) {
mcch_flag = 1;
}
mtch_flag = 1;
}
} else { // FDD
if ((cc->
mbsfn_SubframeConfig[j]->subframeAllocation.
choice.oneFrame.buf[0] & MBSFN_FDD_SF8) ==
MBSFN_FDD_SF8) {
if (msi_pos == 6) {
msi_flag = 1;
}
if ((frameP % mcch_period ==
cc->mbsfn_AreaInfo[i]->
mcch_Config_r9.mcch_Offset_r9)
&&
((cc->mbsfn_AreaInfo[i]->
mcch_Config_r9.sf_AllocInfo_r9.
buf[0] & MBSFN_FDD_SF8) ==
MBSFN_FDD_SF8)) {
mcch_flag = 1;
}
mtch_flag = 1;
}
}
break;
case 9:
if (cc->tdd_Config != NULL) {
if ((cc->
mbsfn_SubframeConfig[j]->subframeAllocation.
choice.oneFrame.buf[0] & MBSFN_TDD_SF9) ==
MBSFN_TDD_SF9) {
if (msi_pos == 5) {
msi_flag = 1;
}
if ((frameP % mcch_period ==
cc->mbsfn_AreaInfo[i]->
mcch_Config_r9.mcch_Offset_r9)
&&
((cc->mbsfn_AreaInfo[i]->
mcch_Config_r9.sf_AllocInfo_r9.
buf[0] & MBSFN_TDD_SF9) ==
MBSFN_TDD_SF9)) {
mcch_flag = 1;
}
mtch_flag = 1;
}
}
break;
} // end switch
// sf allocation is non-overlapping
if ((msi_flag == 1) || (mcch_flag == 1)
|| (mtch_flag == 1)) {
LOG_D(MAC,
"[eNB %d] CC_id %d Frame %d Subframe %d: sync area %d SF alloc %d: msi flag %d, mcch flag %d, mtch flag %d\n",
module_idP, CC_id, frameP, subframeP, i, j,
msi_flag, mcch_flag, mtch_flag);
break;
}
} else { // four-frameP format
}
}
} // end of for loop
cc->msi_active = 0;
cc->mcch_active = 0;
cc->mtch_active = 0;
// Calculate the mcs
if ((msi_flag == 1) || (mcch_flag == 1)) {
cc->MCH_pdu.mcs = mcch_mcs;
} else if (mtch_flag == 1) { // only MTCH in this subframeP
cc->MCH_pdu.mcs = cc->pmch_Config[0]->dataMCS_r9;
}
uint8_t num_sf_alloc=0;
for( int iii=0; iii < 6; iii++)
num_sf_alloc += ( 0x39 & (0x80>>iii)) == (0x80 >> iii);
num_sf_alloc = 1;
// 2nd: Create MSI, get MCCH from RRC and MTCHs from RLC
// there is MSI (MCH Scheduling Info)
if (msi_flag == 1) {
// Create MSI here
uint16_t msi_control_element[29], *msi_ptr;
msi_ptr = &msi_control_element[0];
//((MSI_ELEMENT *) msi_ptr)->lcid = MCCH_LCHANID; //MCCH
//if (mcch_flag == 1) {
// ((MSI_ELEMENT *) msi_ptr)->stop_sf_MSB = 0;
// ((MSI_ELEMENT *) msi_ptr)->stop_sf_LSB = 0;
//} else { // no mcch for this MSP
// ((MSI_ELEMENT *) msi_ptr)->stop_sf_MSB = 0x7; // stop value is 2047
// ((MSI_ELEMENT *) msi_ptr)->stop_sf_LSB = 0xff;
//}
//msi_ptr += sizeof(MSI_ELEMENT);
//Header for MTCHs
num_mtch = cc->mbms_SessionList[0]->list.count;
TBS =
get_TBS_DL(cc->MCH_pdu.mcs, to_prb(cc->mib->message.dl_Bandwidth));
//l=0;
for (k = 0; k < num_mtch; k++) { // loop for all session in this MCH (MCH[0]) at this moment
((MSI_ELEMENT *) msi_ptr)->lcid = cc->mbms_SessionList[0]->list.array[k]->logicalChannelIdentity_r9; //mtch_lcid;
if( msi_sfs != 0 )
msi_pmch_stop = msi_sfs-1;
else
msi_pmch_stop = msi_sfs;
if( msi_pmch_stop > cc->pmch_Config[0]->sf_AllocEnd_r9)
LOG_W(MAC,"e-MBMS Buffer Overflow\n");
if(msi_pmch_stop>=num_sf_alloc /*&& msi_pmch_stop <=cc->pmch_Config[0]->sf_AllocEnd_r9*/) {
((MSI_ELEMENT *) msi_ptr)->stop_sf_MSB = 0; // last subframeP of this mtch (only one mtch now) & stop_sf limited to 256
//((MSI_ELEMENT *) msi_ptr)->stop_sf_LSB = msi_pmch_stop;
((MSI_ELEMENT *) msi_ptr)->stop_sf_LSB = (msi_pmch_stop <=cc->pmch_Config[0]->sf_AllocEnd_r9 ? msi_pmch_stop: cc->pmch_Config[0]->sf_AllocEnd_r9);
msi_pmch_stop = (msi_pmch_stop <=cc->pmch_Config[0]->sf_AllocEnd_r9 ? msi_pmch_stop: cc->pmch_Config[0]->sf_AllocEnd_r9);
}else{
((MSI_ELEMENT *) msi_ptr)->stop_sf_MSB = 0x7; // last subframeP of this mtch (only one mtch now)
((MSI_ELEMENT *) msi_ptr)->stop_sf_LSB = 0xFF;
msi_pmch_stop=0;
}
msi_ptr += sizeof(MSI_ELEMENT);
}
msi_length = msi_ptr - msi_control_element;
if (msi_length < 128) {
header_len_msi = 2;
} else {
header_len_msi = 3;
}
LOG_D(MAC,
"[eNB %d] CC_id %d Frame %d : MSI->MCH, length of MSI is %d bytes TBS %d, bytes in buffer %d stop_sf_LSB %d msi_sfs %d cc->pmch_Config[0]->sf_AllocEnd_r9 %ld\n",
module_idP, CC_id, frameP, msi_length,TBS, bytes_in_buffer,msi_pmch_stop,msi_sfs,cc->pmch_Config[0]->sf_AllocEnd_r9);
msi_sfs = 0;
//LOG_D(MAC,"Scheduler: MSI is transmitted in this subframeP \n" );
// LOG_D(MAC,"Scheduler: MSI length is %d bytes\n",msi_length);
// Store MSI data to mch_buffer[0]
memcpy((char *) &mch_buffer[sdu_length_total],
msi_control_element, msi_length);
sdu_lcids[num_sdus] = MCH_SCHDL_INFO;
sdu_lengths[num_sdus] = msi_length;
sdu_length_total += sdu_lengths[num_sdus];
LOG_D(MAC, "[eNB %d] CC_id %d Create %d bytes for MSI\n",
module_idP, CC_id, sdu_lengths[num_sdus]);
num_sdus++;
cc->msi_active = 1;
}
// there is MCCH
if (mcch_flag == 1) {
LOG_D(MAC,
"[eNB %d] CC_id %d Frame %d Subframe %d: Schedule MCCH MESSAGE (area %d, sfAlloc %d)\n",
module_idP, CC_id, frameP, subframeP, i, j);
mcch_sdu_length = mac_rrc_data_req(module_idP, CC_id, frameP, MCCH, 0xFFFC, 1, &cc->MCCH_pdu.payload[0],
i); // this is the mbsfn sync area index
mcch_sdu_length+=1; //RLC ?
if (mcch_sdu_length > 0) {
LOG_D(MAC,
"[eNB %d] CC_id %d Frame %d subframeP %d : MCCH->MCH, Received %d bytes from RRC \n",
module_idP, CC_id, frameP, subframeP, mcch_sdu_length);
header_len_mcch = 2;
if (cc->tdd_Config != NULL) {
LOG_D(MAC,
"[eNB %d] CC_id %d Frame %d subframeP %d: Scheduling MCCH->MCH (TDD) for MCCH message %d bytes (mcs %d )\n",
module_idP, CC_id, frameP, subframeP,
mcch_sdu_length, mcch_mcs);
} else {
LOG_D(MAC,
"[eNB %d] CC_id %d Frame %d subframeP %d: Scheduling MCCH->MCH (FDD) for MCCH message %d bytes (mcs %d)\n",
module_idP, CC_id, frameP, subframeP,
mcch_sdu_length, mcch_mcs);
}
cc->mcch_active = 1;
memcpy((char *) &mch_buffer[sdu_length_total]+1,
&cc->MCCH_pdu.payload[0], mcch_sdu_length);
sdu_lcids[num_sdus] = MCCH_LCHANID;
sdu_lengths[num_sdus] = mcch_sdu_length;
if (sdu_lengths[num_sdus] > 128) {
header_len_mcch = 3;
}
sdu_length_total += sdu_lengths[num_sdus];
LOG_D(MAC,
"[eNB %d] CC_id %d Got %d bytes for MCCH from RRC \n",
module_idP, CC_id, sdu_lengths[num_sdus]);
num_sdus++;
}
}
TBS =
get_TBS_DL(/*cc->pmch_Config[0]->dataMCS_r9*/cc->MCH_pdu.mcs, to_prb(cc->mib->message.dl_Bandwidth));
#if (LTE_RRC_VERSION >= MAKE_VERSION(10, 0, 0))
// do not let mcch and mtch multiplexing when relaying is active
// for sync area 1, so not transmit data
//if ((i == 0) && ((RC.mac[module_idP]->MBMS_flag != multicast_relay) || (RC.mac[module_idP]->mcch_active==0))) {
#endif
// there is MTCHs, loop if there are more than 1
if (mtch_flag == 1 ) {
// Calculate TBS
/* if ((msi_flag==1) || (mcch_flag==1)) {
TBS = mac_xface->get_TBS(mcch_mcs, mac_xface->frame_parms->N_RB_DL);
}
else { // only MTCH in this subframeP
TBS = mac_xface->get_TBS(RC.mac[module_idP]->pmch_Config[0]->dataMCS_r9, mac_xface->frame_parms->N_RB_DL);
}
// get MTCH data from RLC (like for DTCH)
LOG_D(MAC,"[eNB %d] CC_id %d Frame %d subframe %d: Schedule MTCH (area %d, sfAlloc %d)\n",Mod_id,CC_id,frame,subframe,i,j);
header_len_mtch = 3;
LOG_D(MAC,"[eNB %d], CC_id %d, Frame %d, MTCH->MCH, Checking RLC status (rab %d, tbs %d, len %d)\n",
Mod_id,CC_id,frame,MTCH,TBS,
TBS-header_len_mcch-header_len_msi-sdu_length_total-header_len_mtch);
rlc_status = mac_rlc_status_ind(Mod_id,frame,1,RLC_MBMS_YES,MTCH+ (maxDRB + 3) * MAX_MOBILES_PER_RG,
TBS-header_len_mcch-header_len_msi-sdu_length_total-header_len_mtch);
printf("frame %d, subframe %d, rlc_status.bytes_in_buffer is %d\n",frame,subframe, rlc_status.bytes_in_buffer);
*/
// get MTCH data from RLC (like for DTCH)
LOG_D(MAC,
"[eNB %d] CC_id %d Frame %d subframeP %d: Schedule MTCH (area %d, sfAlloc %d)\n",
module_idP, CC_id, frameP, subframeP, i, j);
header_len_mtch = 3;
LOG_D(MAC,
"[eNB %d], CC_id %d, Frame %d, MTCH->MCH, Checking RLC status (rab %d, tbs %d, len %d)\n",
module_idP, CC_id, frameP, MTCH, TBS,
TBS - header_len_mcch - header_len_msi - sdu_length_total -
header_len_mtch);
mbms_rab_id = cc->mbms_SessionList[0]->list.array[0]->logicalChannelIdentity_r9;
rlc_status =
mac_rlc_status_ind(module_idP, 0, frameP, subframeP,
module_idP, ENB_FLAG_YES, MBMS_FLAG_YES,
cc->mbms_SessionList[0]->list.array[0]->logicalChannelIdentity_r9,
//MTCH,
TBS - header_len_mcch - header_len_msi -
sdu_length_total - header_len_mtch
#if (LTE_RRC_VERSION >= MAKE_VERSION(14, 0, 0))
,0, 0
#endif
);
bytes_in_buffer = rlc_status.bytes_in_buffer;
msi_sfs = rlc_status.bytes_in_buffer/TBS+(rlc_status.bytes_in_buffer%TBS?1:0);
LOG_D(MAC,
"e-MBMS log channel %u frameP %d, subframeP %d, rlc_status.bytes_in_buffer is %d TBS %d pmch_stop %d msi_sfs %d\n",
MTCH, frameP, subframeP, rlc_status.bytes_in_buffer,TBS,msi_pmch_stop,msi_sfs);
if (rlc_status.bytes_in_buffer > 0 || msi_pmch_stop > 0 /*msi_pmch_stop>=num_sf_alloc*/ ) {
//if(rlc_status.bytes_in_buffer > 0){
LOG_I(MAC,
"[eNB %d][MBMS USER-PLANE], CC_id %d, Frame %d, MTCH->MCH, Requesting %d bytes from RLC (header len mtch %d) rlc_status.bytes_in_buffer %d\n",
module_idP, CC_id, frameP,
TBS - header_len_mcch - header_len_msi -
sdu_length_total - header_len_mtch, header_len_mtch, rlc_status.bytes_in_buffer);
sdu_lengths[num_sdus] = mac_rlc_data_req(module_idP, 0, module_idP, frameP, ENB_FLAG_YES, MBMS_FLAG_YES,cc->mbms_SessionList[0]->list.array[0]->logicalChannelIdentity_r9, 0, //not used
(char *)
&mch_buffer[sdu_length_total]
#if (LTE_RRC_VERSION >= MAKE_VERSION(14, 0, 0))
,0,
0
#endif
);
//sdu_lengths[num_sdus] = mac_rlc_data_req(module_idP,frameP, MBMS_FLAG_NO, MTCH+(MAX_NUM_RB*(MAX_MOBILES_PER_ENB+1)), (char*)&mch_buffer[sdu_length_total]);
LOG_I(MAC,
"[eNB %d][MBMS USER-PLANE] CC_id %d Got %d bytes for MTCH %d msi_pmch_stop %d msi_sfs %d sdu_lengths[num_sdus] %d\n",
module_idP, CC_id, sdu_lengths[num_sdus], MTCH,msi_pmch_stop,msi_sfs, sdu_lengths[num_sdus]);
cc->mtch_active = 1;
sdu_lcids[num_sdus] = cc->mbms_SessionList[0]->list.array[0]->logicalChannelIdentity_r9/*MTCH*/;
sdu_length_total += sdu_lengths[num_sdus];
if (msi_pmch_stop != 0)
msi_pmch_stop--;
if (sdu_lengths[num_sdus] < 128) {
header_len_mtch = 2;
}
num_sdus++;
//}
}
else {
// LOG_E(MAC,
// "[eNB %d][MBMS USER-PLANE] CC_id %d Got %d bytes for MTCH %d msi_pmch_stop %d msi_buffer %d msi_sfs %ld msi_buffer_act %ld sdu_lengths[num_sdus] %d\n",
// module_idP, CC_id, sdu_lengths[num_sdus], MTCH,msi_pmch_stop,msi_sfs,msi_buffer_act, sdu_lengths[num_sdus]);
header_len_mtch = 0;
}
}
#if (LTE_RRC_VERSION >= MAKE_VERSION(10, 0, 0))
// }
#endif
// FINAL STEP: Prepare and multiplexe MSI, MCCH and MTCHs
if ((sdu_length_total + header_len_msi + header_len_mcch +
header_len_mtch) > 0) {
// Adjust the last subheader
/* if ((msi_flag==1) || (mcch_flag==1)) {
RC.mac[module_idP]->MCH_pdu.mcs = mcch_mcs;
}
else if (mtch_flag == 1) { // only MTCH in this subframeP
RC.mac[module_idP]->MCH_pdu.mcs = RC.mac[module_idP]->pmch_Config[0]->dataMCS_r9;
}
*/
header_len_mtch_temp = header_len_mtch;
header_len_mcch_temp = header_len_mcch;
header_len_msi_temp = header_len_msi;
if (header_len_mtch > 0) {
header_len_mtch = 1; // remove Length field in the subheader for the last PDU
} else if (header_len_mcch > 0) {
header_len_mcch = 1;
} else {
header_len_msi = 1;
}
// Calculate the padding
if ((TBS - header_len_mtch - header_len_mcch - header_len_msi -
sdu_length_total) < 0) {
LOG_E(MAC, "Error in building MAC PDU, TBS %d < PDU %d \n",
TBS,
header_len_mtch + header_len_mcch + header_len_msi +
sdu_length_total);
return 0;
} else
if ((TBS - header_len_mtch - header_len_mcch - header_len_msi -
sdu_length_total) <= 2) {
padding =
(TBS - header_len_mtch - header_len_mcch - header_len_msi -
sdu_length_total);
post_padding = 0;
} else { // using post_padding, give back the Length field of subheader for the last PDU
padding = 0;
if (header_len_mtch > 0) {
header_len_mtch = header_len_mtch_temp;
} else if (header_len_mcch > 0) {
header_len_mcch = header_len_mcch_temp;
} else {
header_len_msi = header_len_msi_temp;
}
post_padding =
TBS - sdu_length_total - header_len_msi - header_len_mcch -
header_len_mtch;
}
// Generate the MAC Header for MCH
// here we use the function for DLSCH because DLSCH & MCH have the same Header structure
offset = generate_dlsch_header((unsigned char *) cc->MCH_pdu.payload, num_sdus, sdu_lengths, sdu_lcids, 255, // no drx
31, // no timing advance
NULL, // no contention res id
padding, post_padding);
cc->MCH_pdu.Pdu_size = TBS;
cc->MCH_pdu.sync_area = i;
cc->MCH_pdu.msi_active = cc->msi_active;
cc->MCH_pdu.mcch_active = cc->mcch_active;
cc->MCH_pdu.mtch_active = cc->mtch_active;
LOG_D(MAC,
" MCS for this sf is %d (mcch active %d, mtch active %d)\n",
cc->MCH_pdu.mcs, cc->MCH_pdu.mcch_active,
cc->MCH_pdu.mtch_active);
LOG_D(MAC,
"[eNB %d][MBMS USER-PLANE ] CC_id %d Generate header : sdu_length_total %d, num_sdus %d, sdu_lengths[0] %d, sdu_lcids[0] %d => payload offset %d,padding %d,post_padding %d (mcs %d, TBS %d), header MTCH %d, header MCCH %d, header MSI %d\n",
module_idP, CC_id, sdu_length_total, num_sdus,
sdu_lengths[0], sdu_lcids[0], offset, padding, post_padding,
cc->MCH_pdu.mcs, TBS, header_len_mtch, header_len_mcch,
header_len_msi);
// copy SDU to mch_pdu after the MAC Header
memcpy(&cc->MCH_pdu.payload[offset], mch_buffer, sdu_length_total);
// filling remainder of MCH with random data if necessery
for (j = 0; j < (TBS - sdu_length_total - offset); j++) {
cc->MCH_pdu.payload[offset + sdu_length_total + j] =
(char) (taus() & 0xff);
}
/* Tracing of PDU is done on UE side */
if (opt_enabled == 1) {
trace_pdu(DIRECTION_DOWNLINK, (uint8_t *) cc->MCH_pdu.payload, TBS, module_idP, WS_M_RNTI , 0xffff, // M_RNTI = 6 in wirehsark
RC.mac[module_idP]->frame,
RC.mac[module_idP]->subframe, 0, 0);
LOG_D(OPT,
"[eNB %d][MCH] CC_id %d Frame %d : MAC PDU with size %d\n",
module_idP, CC_id, frameP, TBS);
}
eNB_MAC_INST *eNB = RC.mac[module_idP];
dl_req = &eNB->DL_req[CC_id].dl_config_request_body;
// dl_config_pdu = &dl_req->dl_config_pdu_list[dl_req->number_pdu];
// memset((void *) dl_config_pdu,
// 0,
// sizeof(nfapi_dl_config_request_pdu_t));
dl_req->tl.tag = NFAPI_DL_CONFIG_REQUEST_BODY_TAG;
fill_nfapi_mch_config(
dl_req,
TBS,
0,
0xfffd,
0,
get_Qm(cc->MCH_pdu.mcs),
cc->MCH_pdu.mcs,
6000, //equal to RS power
0 //mbsfn_area_id
);
eNB->TX_req[CC_id].sfn_sf = fill_nfapi_tx_req(&eNB->TX_req[CC_id].tx_request_body,
(frameP * 10) + subframeP,
TBS,
eNB->pdu_index[CC_id],
(uint8_t*)cc->MCH_pdu.payload);
/*
for (j=0;j<sdu_length_total;j++)
printf("%2x.",RC.mac[module_idP]->MCH_pdu.payload[j+offset]);
printf(" \n"); */
return 1;
} else {
cc->MCH_pdu.Pdu_size = 0;
cc->MCH_pdu.sync_area = 0;
cc->MCH_pdu.msi_active = 0;
cc->MCH_pdu.mcch_active = 0;
cc->MCH_pdu.mtch_active = 0;
// for testing purpose, fill with random data
//for (j=0;j<(TBS-sdu_length_total-offset);j++)
// RC.mac[module_idP]->MCH_pdu.payload[offset+sdu_length_total+j] = (char)(taus()&0xff);
return 0;
}
//this is for testing
/*
if (mtch_flag == 1) {
// LOG_D(MAC,"DUY: mch_buffer length so far is : %ld\n", &mch_buffer[sdu_length_total]-&mch_buffer[0]);
return 1;
}
else
return 0;
*/
}
int
schedule_MBMS(module_id_t module_idP, uint8_t CC_id, frame_t frameP,
sub_frame_t subframeP)
@@ -1605,6 +1605,39 @@ fill_nfapi_uci_acknak(module_id_t module_idP,
return (((ackNAK_absSF / 10) << 4) + (ackNAK_absSF % 10));
}
//------------------------------------------------------------------------------
void
fill_nfapi_mch_config(nfapi_dl_config_request_body_t *dl_req,
uint16_t length,
uint16_t pdu_index,
uint16_t rnti,
uint8_t resource_allocation_type,
uint16_t resource_block_coding,
uint8_t modulation,
uint16_t transmission_power,
uint8_t mbsfn_area_id){
nfapi_dl_config_request_pdu_t *dl_config_pdu =
&dl_req->dl_config_pdu_list[dl_req->number_pdu];
memset((void *) dl_config_pdu, 0,
sizeof(nfapi_dl_config_request_pdu_t));
dl_config_pdu->pdu_type = NFAPI_DL_CONFIG_MCH_PDU_TYPE;
dl_config_pdu->pdu_size = (uint8_t) (2 + sizeof(nfapi_dl_config_mch_pdu));
dl_config_pdu->mch_pdu.mch_pdu_rel8.tl.tag = NFAPI_DL_CONFIG_REQUEST_MCH_PDU_REL8_TAG;
dl_config_pdu->mch_pdu.mch_pdu_rel8.length = length;
dl_config_pdu->mch_pdu.mch_pdu_rel8.pdu_index = pdu_index;
dl_config_pdu->mch_pdu.mch_pdu_rel8.rnti = rnti;
dl_config_pdu->mch_pdu.mch_pdu_rel8.resource_allocation_type = resource_allocation_type;
dl_config_pdu->mch_pdu.mch_pdu_rel8.resource_block_coding = resource_block_coding;
dl_config_pdu->mch_pdu.mch_pdu_rel8.modulation = modulation;
dl_config_pdu->mch_pdu.mch_pdu_rel8.transmission_power = transmission_power;
dl_config_pdu->mch_pdu.mch_pdu_rel8.mbsfn_area_id = mbsfn_area_id;
dl_req->number_pdu++;
}
//------------------------------------------------------------------------------
//------------------------------------------------------------------------------
void
fill_nfapi_dlsch_config(eNB_MAC_INST *eNB,
+20
View File
@@ -86,6 +86,15 @@ void schedule_SI_MBMS(module_id_t module_idP, frame_t frameP,
int schedule_MBMS(module_id_t module_idP, uint8_t CC_id, frame_t frameP,
sub_frame_t subframe);
/** \brief MBMS scheduling: Checking the position for MBSFN subframes. Create MSI, transfer MCCH from RRC to MAC, transfer MTCHs from RLC to MAC. Multiplexing MSI,MCCH&MTCHs. Return 1 if there are MBSFN data being allocated, otherwise return 0;
@param Mod_id Instance ID of eNB
@param frame Frame index
@param subframe Subframe number on which to act
*/
int schedule_MBMS_NFAPI(module_id_t module_idP, uint8_t CC_id, frame_t frameP,
sub_frame_t subframe);
/** \brief check the mapping between sf allocation and sync area, Currently only supports 1:1 mapping
@param Mod_id Instance ID of eNB
@param mbsfn_sync_area index of mbsfn sync area
@@ -1217,6 +1226,17 @@ void program_dlsch_acknak(module_id_t module_idP, int CC_idP, int UE_idP,
frame_t frameP, sub_frame_t subframeP,
uint8_t cce_idx);
void
fill_nfapi_mch_config(nfapi_dl_config_request_body_t *dl_req,
uint16_t length,
uint16_t pdu_index,
uint16_t rnti,
uint8_t resource_allocation_type,
uint16_t resource_block_coding,
uint8_t modulation,
uint16_t transmission_power,
uint8_t mbsfn_area_id);
void fill_nfapi_dlsch_config(eNB_MAC_INST * eNB,
nfapi_dl_config_request_body_t * dl_req,
uint16_t length, int16_t pdu_index,
File diff suppressed because it is too large Load Diff