adapting coreset0 parameter

2021-09-14 16:22:51 +02:00
parent b93cb71483
commit 7e3cb7a32d
2 changed files with 2 additions and 2 deletions
@@ -362,7 +362,7 @@ uint32_t schedule_control_sib1(module_id_t module_id,

  const uint16_t bwpSize = type0_PDCCH_CSS_config->num_rbs;
  int rbStart = type0_PDCCH_CSS_config->cset_start_rb;
-printf("%d %d\n",bwpSize,rbStart);
+
  // TODO: There are exceptions to this in table 5.1.2.1.1-4,5 (Default time domain allocation tables B, C)
  int mappingtype = (startSymbolIndex <= 3)? typeA: typeB;

@@ -40,7 +40,7 @@ gNBs =

     pdcch_ConfigSIB1 = (
      {
-        controlResourceSetZero = 12;
+        controlResourceSetZero = 11;
        searchSpaceZero = 0;
      }
      );