fixed bug in lte-softmodem (messup with CC_id), fixed phy_scope, added support for multiple bandwidth in openair0_lib, minor log updates
git-svn-id: http://svn.eurecom.fr/openair4G/trunk@5721 818b1a75-f10b-46b9-bf7c-635c3b92a50f
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@@ -5110,7 +5110,7 @@ double sinr_eff_cqi_calc(PHY_VARS_UE *phy_vars_ue, uint8_t eNB_id){
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sinr_eff_qam64 = (p_qam64[0]*pow(I_qam64_avg,7) + p_qam64[1]*pow(I_qam64_avg,6) + p_qam64[2]*pow(I_qam64_avg,5) + p_qam64[3]*pow(I_qam64_avg,4) + p_qam64[4]*pow(I_qam64_avg,3) + p_qam64[5]*pow(I_qam64_avg,2) + p_qam64[6]*I_qam64_avg + p_qam64[7]);
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sinr_eff = cmax3(sinr_eff_qpsk,sinr_eff_qam16,sinr_eff_qam64);
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msg("SINR_Eff = %e\n",sinr_eff);
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//msg("SINR_Eff = %e\n",sinr_eff);
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return(sinr_eff);
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}
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@@ -158,7 +158,7 @@ void phy_scope_eNB(FD_lte_phy_scope_enb *form,
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float *chest_f_abs;
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float time[FRAME_LENGTH_COMPLEX_SAMPLES];
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float freq[nsymb_ce*nb_antennas_rx*nb_antennas_tx];
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int frame = phy_vars_enb->frame;
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int frame = phy_vars_enb->proc[0].frame_tx;
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uint32_t total_dlsch_bitrate = phy_vars_enb->total_dlsch_bitrate;
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int coded_bits_per_codeword = 0;
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uint8_t harq_pid; // in TDD config 3 it is sf-2, i.e., can be 0,1,2
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@@ -469,6 +469,7 @@ void phy_scope_UE(FD_lte_phy_scope_ue *form,
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phy_vars_ue->dlsch_ue[eNB_id][0]->harq_processes[harq_pid]->nb_rb,
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phy_vars_ue->dlsch_ue[eNB_id][0]->harq_processes[harq_pid]->rb_alloc,
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get_Qm(mcs),
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phy_vars_ue->dlsch_ue[eNB_id][0]->harq_processes[harq_pid]->Nl,
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num_pdcch_symbols,
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frame,
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subframe);
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@@ -1688,10 +1688,10 @@ void fill_DLSCH_dci(module_id_t module_idP,frame_t frameP, sub_frame_t subframeP
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}
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} // RA is scheduled in this subframeP
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printf("Doing UE_spec DCIs\n");
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LOG_I(MAC,"Doing UE_spec DCIs\n");
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// UE specific DCIs
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for (UE_id=UE_list->head;UE_id>=0;UE_id=UE_list->next[UE_id]) {
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printf("UE_id: %d => status %d\n",UE_id,eNB_dlsch_info[module_idP][UE_id].status);
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LOG_I(MAC,"UE_id: %d => status %d\n",UE_id,eNB_dlsch_info[module_idP][UE_id].status);
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if (eNB_dlsch_info[module_idP][UE_id].status == S_DL_SCHEDULED) {
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// clear scheduling flag
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@@ -255,7 +255,7 @@ int openair0_device_init(openair0_device *device, openair0_config_t *openair0_cf
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// Initialize card
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int ret;
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int ant;
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int resampling_factor=2;
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ret = openair0_open();
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@@ -292,11 +292,23 @@ int openair0_device_init(openair0_device *device, openair0_config_t *openair0_cf
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p_exmimo_config->framing.eNB_flag = 1;//!UE_flag;
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p_exmimo_config->framing.tdd_config = DUPLEXMODE_FDD + TXRXSWITCH_LSB;
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if (openair0_cfg->sample_rate==30.72e6)
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resampling_factor = 0;
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else if (openair0_cfg->sample_rate==15.36e6)
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resampling_factor = 1;
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else if (openair0_cfg->sample_rate==7.68e6)
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resampling_factor = 2;
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else {
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printf("Sampling rate not supported, using default 7.68MHz");
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resampling_factor = 2;
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}
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#if (BOARD_SWREV_CNTL2>=0x0A)
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for (ant=0; ant<4; ant++)
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p_exmimo_config->framing.resampling_factor[ant] = 2;
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p_exmimo_config->framing.resampling_factor[ant] = resampling_factor;
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#else
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p_exmimo_config->framing.resampling_factor = 2;
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p_exmimo_config->framing.resampling_factor = resampling_factor;
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#endif
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if (!openair0_cfg) {
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@@ -84,6 +84,6 @@ int openair0_stop(int card);
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int openair0_stop_without_reset(int card);
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// return the DAQ block counter
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unsigned int *openair0_daq_cnt();
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unsigned int *openair0_daq_cnt(void);
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#endif
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@@ -424,14 +424,14 @@ static void *scope_thread(void *arg) {
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# ifdef ENABLE_XFORMS_WRITE_STATS
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len =
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# endif
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dump_ue_stats (PHY_vars_UE_g[0], stats_buffer, 0, mode,rx_input_level_dBm);
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dump_ue_stats (PHY_vars_UE_g[0][0], stats_buffer, 0, mode,rx_input_level_dBm);
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fl_set_object_label(form_stats->stats_text, stats_buffer);
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# ifdef ENABLE_XFORMS_WRITE_STATS
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rewind (UE_stats);
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fwrite (stats_buffer, 1, len, UE_stats);
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# endif
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phy_scope_UE(form_ue[UE_id],
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PHY_vars_UE_g[UE_id],
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PHY_vars_UE_g[UE_id][0],
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eNB_id,
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UE_id,7);
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@@ -1047,7 +1047,6 @@ void init_eNB_proc() {
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pthread_attr_setschedparam (&attr_eNB_proc_rx[CC_id][i], &sched_param_eNB_proc_rx[CC_id][i]);
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pthread_attr_setschedpolicy (&attr_eNB_proc_rx[CC_id][i], SCHED_FIFO);
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for (CC_id=0;CC_id<MAX_NUM_CCs;CC_id++) {
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PHY_vars_eNB_g[0][CC_id]->proc[i].instance_cnt_tx=-1;
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PHY_vars_eNB_g[0][CC_id]->proc[i].instance_cnt_rx=-1;
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PHY_vars_eNB_g[0][CC_id]->proc[i].subframe=i;
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@@ -1067,7 +1066,6 @@ void init_eNB_proc() {
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PHY_vars_eNB_g[0][CC_id]->proc[i].subframe_rx = i;
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PHY_vars_eNB_g[0][CC_id]->proc[i].subframe_tx = (i+2)%10;
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#endif
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}
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}
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@@ -1371,10 +1369,10 @@ static void *eNB_thread(void *arg)
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if (multi_thread == 0) {
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if ((slot&1) == 0) {
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LOG_I(PHY,"[eNB] Single thread slot %d\n",slot);
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for (CC_id=0;CC_id<MAX_NUM_CCs;CC_id++) {
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phy_procedures_eNB_lte ((2+(slot>>1))%10, PHY_vars_eNB_g[0][CC_id], 0, no_relay,NULL);
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do_OFDM_mod((2+(slot>>1))%10,PHY_vars_eNB_g[0][CC_id]);
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}
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phy_procedures_eNB_lte ((2+(slot>>1))%10, PHY_vars_eNB_g[0], 0, no_relay,NULL);
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for (CC_id=0;CC_id<MAX_NUM_CCs;CC_id++) {
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do_OFDM_mod((2+(slot>>1))%10,PHY_vars_eNB_g[0][CC_id]);
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}
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}
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}
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else { // multi-thread > 0
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@@ -1881,8 +1879,8 @@ static void get_options (int argc, char **argv) {
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frame_parms->tdd_config_S = enb_properties->properties[i]->tdd_config_s;
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for (j=0; j < enb_properties->properties[i]->nb_cc; j++ ){
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frame_parms->Nid_cell = enb_properties->properties[i]->cell_id;
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frame_parms->N_RB_DL = enb_properties->properties[i]->N_RB_DL;
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frame_parms->Nid_cell = enb_properties->properties[i]->cell_id[j];
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frame_parms->N_RB_DL = enb_properties->properties[i]->N_RB_DL[j];
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} // j
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glog_level = enb_properties->properties[i]->glog_level;
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@@ -1941,7 +1939,9 @@ int main(int argc, char **argv) {
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// int ret, ant;
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int ant_offset=0;
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#ifdef XFORMS
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int ret;
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#endif
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#if defined (EMOS) || (! defined (RTAI))
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int error_code;
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#endif
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@@ -2204,7 +2204,7 @@ int main(int argc, char **argv) {
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NB_INST=1;
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openair_daq_vars.ue_dl_rb_alloc=0x1fff;
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openair_daq_vars.target_ue_dl_mcs=16;
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openair_daq_vars.target_ue_dl_mcs=20;
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openair_daq_vars.ue_ul_nb_rb=6;
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openair_daq_vars.target_ue_ul_mcs=6;
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