Integration PHY and MAC procedures for Timing Advance updates. Compilation and run is OK. TA updates need further fixes as not working as expected.
- "nr_process_timing_advance": TA to be applied is commented out, need to be uncommented - with introduced delay of 50 in rx_rf, TA update should be 34 in MAC CE but this does not occur when ta is applied at UE side according to standard - introduced ULSCH scheduler and NR RX SDU functions - fixes to logic in UL fill RX indication - added crc indication in UL RX - temporary hardcoded UE_id to 0, rnti not considered in the logic
This commit is contained in:
@@ -1642,6 +1642,7 @@ set (MAC_NR_SRC
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${NR_MAC_DIR}/gNB_scheduler.c
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${NR_MAC_DIR}/gNB_scheduler_bch.c
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${NR_MAC_DIR}/gNB_scheduler_dlsch.c
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${NR_MAC_DIR}/gNB_scheduler_ulsch.c
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${NR_MAC_DIR}/gNB_scheduler_primitives.c
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${NR_MAC_DIR}/gNB_scheduler_phytest.c
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)
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@@ -46,3 +46,5 @@ void handle_nr_nfapi_dlsch_pdu(PHY_VARS_gNB *gNB,int frame,int slot,
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uint8_t *sdu);
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void nr_fill_rx_indication(PHY_VARS_gNB *gNB, int frame, int slot_rx, int UE_id, uint8_t harq_pid);
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void nr_fill_crc_indication(PHY_VARS_gNB *gNB, int frame, int slot_rx, int UE_id, uint8_t crc_flag);
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@@ -267,7 +267,7 @@ void nr_fill_rx_indication(PHY_VARS_gNB *gNB, int frame, int slot_rx, int UE_id,
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// [hna] TO BE CLEANED
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// --------------------
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// nfapi_rx_indication_pdu_t *pdu;
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nfapi_rx_indication_pdu_t *pdu;
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int timing_advance_update;
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int sync_pos;
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@@ -277,7 +277,7 @@ void nr_fill_rx_indication(PHY_VARS_gNB *gNB, int frame, int slot_rx, int UE_id,
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// gNB->UL_INFO.rx_ind.sfn_sf = frame<<4| slot_rx;
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// gNB->UL_INFO.rx_ind.rx_indication_body.tl.tag = NFAPI_RX_INDICATION_BODY_TAG;
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// pdu = &gNB->UL_INFO.rx_ind.rx_indication_body.rx_pdu_list[gNB->UL_INFO.rx_ind.rx_indication_body.number_of_pdus];
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pdu = &gNB->UL_INFO.rx_ind.rx_indication_body.rx_pdu_list[gNB->UL_INFO.rx_ind.rx_indication_body.number_of_pdus];
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// pdu->rx_ue_information.handle = gNB->ulsch[UE_id+1][0]->handle;
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// pdu->rx_ue_information.tl.tag = NFAPI_RX_UE_INFORMATION_TAG;
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@@ -285,11 +285,10 @@ void nr_fill_rx_indication(PHY_VARS_gNB *gNB, int frame, int slot_rx, int UE_id,
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// pdu->rx_indication_rel8.tl.tag = NFAPI_RX_INDICATION_REL8_TAG;
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// pdu->rx_indication_rel8.length = gNB->ulsch[UE_id+1][0]->harq_processes[harq_pid]->TBS>>3;
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// pdu->rx_indication_rel8.offset = 1; // DJP - I dont understand - but broken unless 1 ???? 0; // filled in at the end of the UL_INFO formation
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// pdu->data = gNB->ulsch[UE_id+1][0]->harq_processes[harq_pid]->b;
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pdu->data = gNB->ulsch[UE_id+1][0]->harq_processes[harq_pid]->b;
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// estimate timing advance for MAC
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sync_pos = nr_est_timing_advance_pusch(gNB, UE_id);
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timing_advance_update = sync_pos; // - gNB->frame_parms.nb_prefix_samples/4; //to check
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// printf("\x1B[33m" "timing_advance_update = %d\n" "\x1B[0m", timing_advance_update);
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switch (gNB->frame_parms.N_RB_DL) {
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// case 6: /* nothing to do */ break;
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@@ -309,7 +308,9 @@ void nr_fill_rx_indication(PHY_VARS_gNB *gNB, int frame, int slot_rx, int UE_id,
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if (timing_advance_update < 0) timing_advance_update = 0;
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if (timing_advance_update > 63) timing_advance_update = 63;
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// pdu->rx_indication_rel8.timing_advance = timing_advance_update;
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printf("\x1B[33m" "Estimated timing advance PUSCH is = %d, timing_advance_update is %d \n" "\x1B[0m", sync_pos,timing_advance_update);
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pdu->rx_indication_rel8.timing_advance = timing_advance_update;
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// estimate UL_CQI for MAC (from antenna port 0 only)
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// int SNRtimes10 = dB_fixed_times10(gNB->pusch_vars[UE_id]->ulsch_power[0]) - 300;//(10*gNB->measurements.n0_power_dB[0]);
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@@ -322,12 +323,28 @@ void nr_fill_rx_indication(PHY_VARS_gNB *gNB, int frame, int slot_rx, int UE_id,
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// harq_pid,frame,slot_rx,SNRtimes10,pdu->rx_indication_rel8.ul_cqi,pdu->rx_indication_rel8.timing_advance,
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// timing_advance_update);
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// gNB->UL_INFO.rx_ind.rx_indication_body.number_of_pdus++;
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gNB->UL_INFO.rx_ind.rx_indication_body.number_of_pdus++;
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// gNB->UL_INFO.rx_ind.sfn_sf = frame<<4 | slot_rx;
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// pthread_mutex_unlock(&gNB->UL_INFO_mutex);
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}
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void nr_fill_crc_indication (PHY_VARS_gNB *gNB, int frame, int slot_rx, int UE_id, uint8_t crc_flag){
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// pthread_mutex_lock(&gNB->UL_INFO_mutex);
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nfapi_crc_indication_pdu_t *pdu = &gNB->UL_INFO.crc_ind.crc_indication_body.crc_pdu_list[gNB->UL_INFO.crc_ind.crc_indication_body.number_of_crcs];
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// gNB->UL_INFO.crc_ind.sfn_sf = frame<<4 | subframe;
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// gNB->UL_INFO.crc_ind.header.message_id = NFAPI_CRC_INDICATION;
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// gNB->UL_INFO.crc_ind.crc_indication_body.tl.tag = NFAPI_CRC_INDICATION_BODY_TAG;
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// pdu->instance_length = 0; // don't know what to do with this
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// // pdu->rx_ue_information.handle = handle;
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// pdu->rx_ue_information.tl.tag = NFAPI_RX_UE_INFORMATION_TAG;
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// pdu->rx_ue_information.rnti = gNB->ulsch[UE_id]->rnti;
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// pdu->crc_indication_rel8.tl.tag = NFAPI_CRC_INDICATION_REL8_TAG;
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// pdu->crc_indication_rel8.crc_flag = crc_flag;
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gNB->UL_INFO.crc_ind.crc_indication_body.number_of_crcs++;
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//LOG_D(PHY, "%s() rnti:%04x crcs:%d crc_flag:%d\n", __FUNCTION__, pdu->rx_ue_information.rnti, gNB->UL_INFO.crc_ind.crc_indication_body.number_of_crcs, crc_flag);
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// pthread_mutex_unlock(&gNB->UL_INFO_mutex);
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}
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void phy_procedures_gNB_common_RX(PHY_VARS_gNB *gNB, int frame_rx, int slot_rx) {
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@@ -355,9 +372,10 @@ void phy_procedures_gNB_uespec_RX(PHY_VARS_gNB *gNB, int frame_rx, int slot_rx)
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int num_pusch_pdu = UL_tti_req->n_pdus;
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LOG_D(PHY,"phy_procedures_gNB_uespec_RX frame %d, slot %d, num_pusch_pdu %d\n",frame_rx,slot_rx,num_pusch_pdu);
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for (int i = 0; i < num_pusch_pdu; i++) {
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gNB->UL_INFO.rx_ind.rx_indication_body.number_of_pdus = 0;
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for (int i = 0; i < num_pusch_pdu; i++) {
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switch (UL_tti_req->pdus_list[i].pdu_type) {
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case NFAPI_NR_UL_CONFIG_PUSCH_PDU_TYPE:
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{
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@@ -378,6 +396,7 @@ void phy_procedures_gNB_uespec_RX(PHY_VARS_gNB *gNB, int frame_rx, int slot_rx)
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//LOG_M("rxdataF_ext.m","rxF_ext",gNB->pusch_vars[UE_id]->rxdataF_ext[0],6900,1,1);
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nr_ulsch_procedures(gNB, frame_rx, slot_rx, UE_id, harq_pid);
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nr_fill_rx_indication(gNB, frame_rx, slot_rx, UE_id, harq_pid); // indicate SDU to MAC
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nr_fill_crc_indication(gNB, frame_rx, slot_rx, UE_id, 0);
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}
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}
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}
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@@ -1551,10 +1551,10 @@ void nr_process_timing_advance(module_id_t Mod_id, uint8_t CC_id, uint8_t timing
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int factor_mu = 1 << mu;
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PHY_vars_UE_g[Mod_id][CC_id]->timing_advance += (timing_advance - 31) * 1024 / factor_mu ;
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//PHY_vars_UE_g[Mod_id][CC_id]->timing_advance += (timing_advance - 31) * 1024 / factor_mu ;
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LOG_D(PHY,"[UE %d] Got timing advance %d from MAC, new value is %d\n",Mod_id, timing_advance, PHY_vars_UE_g[Mod_id][CC_id]->timing_advance);
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LOG_D(PHY,"[UE %d] Got timing advance %u from MAC, new value is %u\n",Mod_id, timing_advance, PHY_vars_UE_g[Mod_id][CC_id]->timing_advance);
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}
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void ue_ulsch_uespec_procedures(PHY_VARS_NR_UE *ue,
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@@ -185,7 +185,7 @@ nr_schedule_ue_spec(module_id_t module_idP, frame_t frameP, sub_frame_t slotP){
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uint16_t sdu_lengths[NR_MAX_NB_RB] = {0};
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int padding = 0, post_padding = 0, ta_len = 0, header_length_total = 0, sdu_length_total = 0, num_sdus = 0;
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int CC_id, sub_pdu_id, lcid, offset, i, j=0, k=0;
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int CC_id, sub_pdu_id, lcid, offset, i, j=0, k=0, ta_update;
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// hardcoded parameters
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// for DMRS configuration type 1
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@@ -195,11 +195,11 @@ nr_schedule_ue_spec(module_id_t module_idP, frame_t frameP, sub_frame_t slotP){
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uint16_t R = 697;
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uint16_t nb_rb = 50 ;
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uint32_t TBS = nr_compute_tbs(Qm, R, nb_rb, 12, 6, 0, 1)/8; // this is in bits TODO use nr_get_tbs
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int ta_update = 17;
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NR_TAG_Id_t tag_id = 0;
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int UE_id = 0; // UE_list->head is -1 !
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UE_sched_ctrl_t *ue_sched_ctl = &UE_list->UE_sched_ctrl[UE_id];
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ta_update = ue_sched_ctl->ta_update;
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for (CC_id = 0; CC_id < RC.nb_nr_mac_CC[module_idP] + 1; CC_id++) {
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LOG_D(MAC, "doing nr_schedule_ue_spec for CC_id %d\n", CC_id);
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@@ -214,13 +214,14 @@ nr_schedule_ue_spec(module_id_t module_idP, frame_t frameP, sub_frame_t slotP){
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} else { // This is a potentially new SDU opportunity */
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if (gNB->tag->timeAlignmentTimer != NULL) {
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printf(" SHOULD NOT ENTER HERE \n");
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if (gNB->tag->timeAlignmentTimer == 0) {
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ta_update = ue_sched_ctl->ta_update;
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/* if we send TA then set timer to not send it for a while */
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if (ta_update != 31)
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ue_sched_ctl->ta_timer = 20;
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/* reset ta_update */
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ue_sched_ctl->ta_update = 31;
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ue_sched_ctl->ta_update = 31;
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} else {
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ta_update = 31;
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}
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@@ -464,3 +464,21 @@ int get_symbolsperslot(nfapi_nr_config_request_t *cfg) {
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}
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int find_nrUE_id(module_id_t mod_idP, rnti_t rntiP) {
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int UE_id;
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UE_list_t *UE_list = &RC.nrmac[mod_idP]->UE_list;
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for (UE_id = 0; UE_id < MAX_MOBILES_PER_GNB; UE_id++) {
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if (UE_list->active[UE_id] == TRUE) {
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if (UE_list->UE_template[nrUE_PCCID(mod_idP, UE_id)][UE_id].rnti == rntiP) {
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return UE_id;
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}
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}
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}
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return -1;
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}
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int nrUE_PCCID(module_id_t mod_idP, int ue_idP) {
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return (RC.nrmac[mod_idP]->UE_list.pCC_id[ue_idP]);
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}
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File diff suppressed because it is too large
Load Diff
@@ -149,6 +149,10 @@ uint32_t to_nrarfcn(int nr_bandP, uint64_t dl_CarrierFreq, uint32_t bw);
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int32_t get_nr_uldl_offset(int nr_bandP);
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int find_nrUE_id(module_id_t mod_idP, rnti_t rntiP);
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int nrUE_PCCID(module_id_t mod_idP, int ue_idP);
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void config_nr_mib(int Mod_idP,
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int CC_idP,
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int p_gNBP,
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@@ -159,4 +163,22 @@ void config_nr_mib(int Mod_idP,
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int cellBarred,
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int intraFreqReselection);
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/* \brief Function to indicate a received SDU on ULSCH.
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@param Mod_id Instance ID of gNB
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@param CC_id Component carrier index
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@param rnti RNTI of UE transmitting the SDU
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@param sdu Pointer to received SDU
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@param sdu_len Length of SDU
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@param timing_advance timing advance adjustment after this pdu
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@param ul_cqi Uplink CQI estimate after this pdu (SNR quantized to 8 bits, -64 ... 63.5 dB in .5dB steps)
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*/
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void nr_rx_sdu(const module_id_t gnb_mod_idP,
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const int CC_idP,
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const frame_t frameP,
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const sub_frame_t subframeP,
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const rnti_t rntiP,
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uint8_t * sduP,
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const uint16_t sdu_lenP,
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const uint16_t timing_advance, const uint8_t ul_cqi);
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#endif /*__LAYER2_NR_MAC_PROTO_H__*/
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@@ -169,6 +169,7 @@ void handle_nr_ulsch(NR_UL_IND_t *UL_info) {
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UL_info->rx_ind.rx_indication_body.number_of_pdus = 0;
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}
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} else {
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printf("UL_info->rx_ind.rx_indication_body.number_of_pdus %d UL_info->crc_ind.crc_indication_body.number_of_crcs %d\n", UL_info->rx_ind.rx_indication_body.number_of_pdus, UL_info->crc_ind.crc_indication_body.number_of_crcs);
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if (UL_info->rx_ind.rx_indication_body.number_of_pdus>0 && UL_info->crc_ind.crc_indication_body.number_of_crcs>0) {
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for (int i=0; i<UL_info->rx_ind.rx_indication_body.number_of_pdus; i++) {
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for (int j=0; j<UL_info->crc_ind.crc_indication_body.number_of_crcs; j++) {
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@@ -182,28 +183,29 @@ void handle_nr_ulsch(NR_UL_IND_t *UL_info) {
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if (UL_info->crc_ind.crc_indication_body.crc_pdu_list[j].crc_indication_rel8.crc_flag == 1) { // CRC error indication
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LOG_D(MAC,"Frame %d, Slot %d Calling rx_sdu (CRC error) \n",UL_info->frame,UL_info->slot);
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rx_sdu(UL_info->module_id,
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UL_info->CC_id,
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NFAPI_SFNSF2SFN(UL_info->rx_ind.sfn_sf), //UL_info->frame,
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NFAPI_SFNSF2SF(UL_info->rx_ind.sfn_sf), //UL_info->slot,
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UL_info->rx_ind.rx_indication_body.rx_pdu_list[i].rx_ue_information.rnti,
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(uint8_t *)NULL,
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UL_info->rx_ind.rx_indication_body.rx_pdu_list[i].rx_indication_rel8.length,
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UL_info->rx_ind.rx_indication_body.rx_pdu_list[i].rx_indication_rel8.timing_advance,
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UL_info->rx_ind.rx_indication_body.rx_pdu_list[i].rx_indication_rel8.ul_cqi);
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} else {
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LOG_D(MAC,"Frame %d, Slot %d Calling rx_sdu (CRC ok) \n",UL_info->frame,UL_info->slot);
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rx_sdu(UL_info->module_id,
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UL_info->CC_id,
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NFAPI_SFNSF2SFN(UL_info->rx_ind.sfn_sf), //UL_info->frame,
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NFAPI_SFNSF2SF(UL_info->rx_ind.sfn_sf), //UL_info->slot,
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UL_info->rx_ind.rx_indication_body.rx_pdu_list[i].rx_ue_information.rnti,
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UL_info->rx_ind.rx_indication_body.rx_pdu_list[i].data,
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UL_info->rx_ind.rx_indication_body.rx_pdu_list[i].rx_indication_rel8.length,
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UL_info->rx_ind.rx_indication_body.rx_pdu_list[i].rx_indication_rel8.timing_advance,
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UL_info->rx_ind.rx_indication_body.rx_pdu_list[i].rx_indication_rel8.ul_cqi);
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nr_rx_sdu(UL_info->module_id,
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UL_info->CC_id,
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NFAPI_SFNSF2SFN(UL_info->rx_ind.sfn_sf), //UL_info->frame,
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NFAPI_SFNSF2SF(UL_info->rx_ind.sfn_sf), //UL_info->slot,
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UL_info->rx_ind.rx_indication_body.rx_pdu_list[i].rx_ue_information.rnti,
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(uint8_t *)NULL,
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UL_info->rx_ind.rx_indication_body.rx_pdu_list[i].rx_indication_rel8.length,
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UL_info->rx_ind.rx_indication_body.rx_pdu_list[i].rx_indication_rel8.timing_advance,
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UL_info->rx_ind.rx_indication_body.rx_pdu_list[i].rx_indication_rel8.ul_cqi);
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}
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else {
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LOG_D(MAC,"Frame %d, Slot %d Calling rx_sdu (CRC ok) \n",UL_info->frame,UL_info->slot);
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nr_rx_sdu(UL_info->module_id,
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UL_info->CC_id,
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NFAPI_SFNSF2SFN(UL_info->rx_ind.sfn_sf), //UL_info->frame,
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NFAPI_SFNSF2SF(UL_info->rx_ind.sfn_sf), //UL_info->slot,
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UL_info->rx_ind.rx_indication_body.rx_pdu_list[i].rx_ue_information.rnti,
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UL_info->rx_ind.rx_indication_body.rx_pdu_list[i].data,
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UL_info->rx_ind.rx_indication_body.rx_pdu_list[i].rx_indication_rel8.length,
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UL_info->rx_ind.rx_indication_body.rx_pdu_list[i].rx_indication_rel8.timing_advance,
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UL_info->rx_ind.rx_indication_body.rx_pdu_list[i].rx_indication_rel8.ul_cqi);
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}
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printf("rx_indication_rel8.timing_advance %d\n", UL_info->rx_ind.rx_indication_body.rx_pdu_list[i].rx_indication_rel8.timing_advance);
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break;
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} //if (UL_info->crc_ind.crc_pdu_list[j].rx_ue_information.rnti ==
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Block a user