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merging develop with develop-nr

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This commit is contained in:
Florian Kaltenberger
2018-10-25 03:15:09 -07:00
parent 09187015aa 861f8107ba
commit 83e9908adb
1300 changed files with 990656 additions and 1481 deletions
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.gitignore
+4
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@@ -0,0 +1,4 @@
cmake_targets/log/
cmake_targets/ran_build/
targets/bin/
README.txt
+1 -1
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@@ -2,7 +2,7 @@ OpenAirInterface is under OpenAirInterface Software Alliance license.
├── http://www.openairinterface.org/?page_id=101
├── http://www.openairinterface.org/?page_id=698
It is distributed under OAI Public License V1.0.
It is distributed under OAI Public License V1.1.
The license information is distributed under LICENSE file in the same directory.
Please see NOTICE.txt for third party software that is included in the sources.
ci-scripts/Jenkinsfile-gitlab
+47 -14
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@@ -40,7 +40,7 @@ pipeline {
disableConcurrentBuilds()
timestamps()
gitLabConnection('OAI GitLab')
gitlabBuilds(builds: ["Build eNb-USRP", "Build basic-sim", "Build phy-sim", "Build eNb-ethernet", "Build UE-ethernet", "Analysis with cppcheck", "Test phy-sim", "Test basic-sim", "Test-FDD-Band7", "Test-TDD-Band40", "Test-IF4p5-FDD-Band7", "Test-IF4p5-TDD-Band40"])
gitlabBuilds(builds: ["Build eNb-USRP", "Build basic-sim", "Build gNb-usrp", "Build nr-UE-usrp", "Build phy-sim", "Build eNb-ethernet", "Build UE-ethernet", "Analysis with cppcheck", "Test phy-sim", "Test basic-sim", "Test-FDD-Band7", "Test-TDD-Band40", "Test-IF4p5-FDD-Band7", "Test-IF4p5-TDD-Band40"])
ansiColor('xterm')
}
@@ -163,6 +163,22 @@ pipeline {
}
}
stage ("Start VM -- gnb-usrp") {
steps {
timeout (time: 5, unit: 'MINUTES') {
sh "./ci-scripts/createVM.sh --variant gnb-usrp --job-name ${JOB_NAME} --build-id ${BUILD_ID}"
}
}
}
stage ("Start VM -- nu-ue-usrp") {
steps {
timeout (time: 5, unit: 'MINUTES') {
sh "./ci-scripts/createVM.sh --variant nu-ue-usrp --job-name ${JOB_NAME} --build-id ${BUILD_ID}"
}
}
}
stage ("Variant Builds") {
parallel {
stage ("Analysis with cppcheck") {
@@ -192,15 +208,6 @@ pipeline {
}
}
}
stage ("Build physical simulators") {
steps {
gitlabCommitStatus(name: "Build phy-sim") {
timeout (time: 20, unit: 'MINUTES') {
sh "./ci-scripts/buildOnVM.sh --workspace $WORKSPACE --variant phy-sim --job-name ${JOB_NAME} --build-id ${BUILD_ID} --keep-vm-alive"
}
}
}
}
stage ("Build eNb-ethernet") {
steps {
gitlabCommitStatus(name: "Build eNb-ethernet") {
@@ -219,6 +226,34 @@ pipeline {
}
}
}
stage ("Build 5G gNB-USRP") {
steps {
gitlabCommitStatus(name: "Build gNb-usrp") {
timeout (time: 20, unit: 'MINUTES') {
sh "./ci-scripts/buildOnVM.sh --workspace $WORKSPACE --variant gnb-usrp --job-name ${JOB_NAME} --build-id ${BUILD_ID}"
}
}
}
}
stage ("Build 5G NR-UE-USRP") {
steps {
gitlabCommitStatus(name: "Build nr-UE-usrp") {
timeout (time: 20, unit: 'MINUTES') {
sh "./ci-scripts/buildOnVM.sh --workspace $WORKSPACE --variant nu-ue-usrp --job-name ${JOB_NAME} --build-id ${BUILD_ID}"
}
}
}
}
stage ("Build physical simulators") {
steps {
gitlabCommitStatus(name: "Build phy-sim") {
timeout (time: 20, unit: 'MINUTES') {
sh "./ci-scripts/buildOnVM.sh --workspace $WORKSPACE --variant phy-sim --job-name ${JOB_NAME} --build-id ${BUILD_ID} --keep-vm-alive"
}
}
}
}
stage ("Build eNb-USRP on Red Hat") {
when {
expression {doRedHatBuild}
@@ -246,7 +281,7 @@ pipeline {
always {
script {
dir ('archives') {
sh "zip -r -qq vm_build_logs.zip basic_sim enb_usrp phy_sim cppcheck enb_eth ue_eth red_hat"
sh "zip -r -qq vm_build_logs.zip basic_sim enb_usrp phy_sim cppcheck gnb_usrp nrue_usrp red_hat"
}
if(fileExists('archives/vm_build_logs.zip')) {
archiveArtifacts artifacts: 'archives/vm_build_logs.zip'
@@ -489,9 +524,7 @@ pipeline {
}
}
}
}
}
}
}
}
}
}
ci-scripts/buildOnRH.sh
+1 -1
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@@ -179,7 +179,7 @@ echo "############################################################"
echo "Checking build status"
echo "############################################################"
LOG_PATTERN=.Rel14.txt
LOG_PATTERN=.Rel15.txt
NB_PATTERN_FILES=4
LOG_FILES=`ls $ARCHIVES_LOC/*.txt`
ci-scripts/buildOnVM.sh
+50 -16
View File
@@ -48,6 +48,8 @@ function usage {
echo " --variant basic-sim OR -v2"
echo " --variant phy-sim OR -v3"
echo " --variant cppcheck OR -v4"
echo " --variant gnb-usrp OR -v5"
echo " --variant nu-ue-usrp OR -v6"
echo " --variant enb-ethernet OR -v7"
echo " --variant ue-ethernet OR -v8"
echo " Specify the variant to build."
@@ -68,6 +70,8 @@ function variant_usage {
echo " --variant basic-sim OR -v2"
echo " --variant phy-sim OR -v3"
echo " --variant cppcheck OR -v4"
echo " --variant gnb-usrp OR -v5"
echo " --variant nu-ue-usrp OR -v6"
echo " --variant enb-ethernet OR -v7"
echo " --variant ue-ethernet OR -v8"
echo ""
@@ -88,7 +92,7 @@ VM_NAME=ci-enb-usrp
VM_MEMORY=2048
VM_CPU=4
ARCHIVES_LOC=enb_usrp
LOG_PATTERN=.Rel14.txt
LOG_PATTERN=.Rel15.txt
NB_PATTERN_FILES=4
BUILD_OPTIONS="--eNB -w USRP"
KEEP_VM_ALIVE=0
@@ -125,7 +129,7 @@ case $key in
-v1)
VM_NAME=ci-enb-usrp
ARCHIVES_LOC=enb_usrp
LOG_PATTERN=.Rel14.txt
LOG_PATTERN=.Rel15.txt
NB_PATTERN_FILES=4
BUILD_OPTIONS="--eNB -w USRP --mu"
shift
@@ -143,24 +147,40 @@ case $key in
-v3)
VM_NAME=ci-phy-sim
ARCHIVES_LOC=phy_sim
LOG_PATTERN=.Rel14.txt
NB_PATTERN_FILES=3
LOG_PATTERN=.Rel15.txt
NB_PATTERN_FILES=5
BUILD_OPTIONS="--phy_simulators"
shift
;;
-v4)
VM_NAME=ci-cppcheck
VM_MEMORY=4096
VM_MEMORY=8192
ARCHIVES_LOC=cppcheck
LOG_PATTERN=cppcheck.xml
NB_PATTERN_FILES=1
BUILD_OPTIONS="--enable=warning --force --xml --xml-version=2"
BUILD_OPTIONS="--enable=warning --force --xml --xml-version=2 -i openair1/PHY/CODING/nrLDPC_decoder/nrLDPC_decoder.c"
shift
;;
-v5)
VM_NAME=ci-gnb-usrp
ARCHIVES_LOC=gnb_usrp
LOG_PATTERN=.Rel15.txt
NB_PATTERN_FILES=4
BUILD_OPTIONS="--gNB -w USRP"
shift
;;
-v6)
VM_NAME=ci-ue-nr-usrp
ARCHIVES_LOC=nrue_usrp
LOG_PATTERN=.Rel15.txt
NB_PATTERN_FILES=4
BUILD_OPTIONS="--nrUE -w USRP"
shift
;;
-v7)
VM_NAME=ci-enb-ethernet
ARCHIVES_LOC=enb_eth
LOG_PATTERN=.Rel14.txt
LOG_PATTERN=.Rel15.txt
NB_PATTERN_FILES=6
BUILD_OPTIONS="--eNB -t ETHERNET --noS1"
shift
@@ -168,7 +188,7 @@ case $key in
-v8)
VM_NAME=ci-ue-ethernet
ARCHIVES_LOC=ue_eth
LOG_PATTERN=.Rel14.txt
LOG_PATTERN=.Rel15.txt
NB_PATTERN_FILES=6
BUILD_OPTIONS="--UE -t ETHERNET --noS1"
shift
@@ -179,7 +199,7 @@ case $key in
enb-usrp)
VM_NAME=ci-enb-usrp
ARCHIVES_LOC=enb_usrp
LOG_PATTERN=.Rel14.txt
LOG_PATTERN=.Rel15.txt
NB_PATTERN_FILES=4
BUILD_OPTIONS="--eNB -w USRP --mu"
;;
@@ -195,29 +215,43 @@ case $key in
phy-sim)
VM_NAME=ci-phy-sim
ARCHIVES_LOC=phy_sim
LOG_PATTERN=.Rel14.txt
NB_PATTERN_FILES=3
LOG_PATTERN=.Rel15.txt
NB_PATTERN_FILES=5
BUILD_OPTIONS="--phy_simulators"
;;
cppcheck)
VM_NAME=ci-cppcheck
VM_MEMORY=4096
VM_MEMORY=8192
ARCHIVES_LOC=cppcheck
LOG_PATTERN=cppcheck.xml
NB_PATTERN_FILES=1
BUILD_OPTIONS="--enable=warning --force --xml --xml-version=2"
BUILD_OPTIONS="--enable=warning --force --xml --xml-version=2 -i openair1/PHY/CODING/nrLDPC_decoder/nrLDPC_decoder.c"
;;
gnb-usrp)
VM_NAME=ci-gnb-usrp
ARCHIVES_LOC=gnb_usrp
LOG_PATTERN=.Rel15.txt
NB_PATTERN_FILES=4
BUILD_OPTIONS="--gNB -w USRP"
;;
nu-ue-usrp)
VM_NAME=ci-ue-nr-usrp
ARCHIVES_LOC=nrue_usrp
LOG_PATTERN=.Rel15.txt
NB_PATTERN_FILES=4
BUILD_OPTIONS="--nrUE -w USRP"
;;
enb-ethernet)
VM_NAME=ci-enb-ethernet
ARCHIVES_LOC=enb_eth
LOG_PATTERN=.Rel14.txt
LOG_PATTERN=.Rel15.txt
NB_PATTERN_FILES=6
BUILD_OPTIONS="--eNB -t ETHERNET --noS1"
;;
ue-ethernet)
VM_NAME=ci-ue-ethernet
ARCHIVES_LOC=ue_eth
LOG_PATTERN=.Rel14.txt
LOG_PATTERN=.Rel15.txt
NB_PATTERN_FILES=6
BUILD_OPTIONS="--UE -t ETHERNET --noS1"
;;
@@ -368,7 +402,7 @@ do
if [[ $FULLFILE == *"$LOG_PATTERN"* ]]
then
filename=$(basename -- "$FULLFILE")
if [ "$LOG_PATTERN" == ".Rel14.txt" ]
if [ "$LOG_PATTERN" == ".Rel15.txt" ]
then
PASS_PATTERN=`echo $filename | sed -e "s#$LOG_PATTERN##"`
fi
ci-scripts/checkAddedWarnings.sh
+1 -1
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@@ -110,7 +110,7 @@ MODIFIED_FILES=`git log $TARGET_INIT_COMMIT..$MERGE_COMMMIT --oneline --name-sta
NB_WARNINGS_FILES=0
# Retrieve list of warnings
LIST_WARNING_FILES=`egrep "error:|warning:" archives/*/*.Rel14.txt archives/*/basic_simulator_*txt | egrep -v "jobserver unavailable|Clock skew detected.|flexran.proto" | sed -e "s#^.*/home/ubuntu/tmp/##" -e "s#^.*/tmp/CI-eNB/##" -e "s#common/utils/.*/itti#common/utils/itti#" | awk -F ":" '{print $1}' | sort | uniq`
LIST_WARNING_FILES=`egrep "error:|warning:" archives/*/*.Rel15.txt archives/*/basic_simulator_*txt | egrep -v "jobserver unavailable|Clock skew detected.|flexran.proto" | sed -e "s#^.*/home/ubuntu/tmp/##" -e "s#^.*/tmp/CI-eNB/##" -e "s#common/utils/.*/itti#common/utils/itti#" | awk -F ":" '{print $1}' | sort | uniq`
echo ""
echo "List of files that have been modified by the Merge Request AND"
ci-scripts/conf_files/lte-basic-sim.conf
+259
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@@ -0,0 +1,259 @@
Active_eNBs = ( "eNB-Eurecom-LTEBox");
# Asn1_verbosity, choice in: none, info, annoying
Asn1_verbosity = "none";
eNBs =
(
{
////////// Identification parameters:
eNB_ID = 0xe00;
cell_type = "CELL_MACRO_ENB";
eNB_name = "eNB-Eurecom-LTEBox";
// Tracking area code, 0x0000 and 0xfffe are reserved values
tracking_area_code = "1";
mobile_country_code = "208";
mobile_network_code = "93";
tr_s_preference = "local_mac"
////////// Physical parameters:
component_carriers = (
{
node_function = "3GPP_eNODEB";
node_timing = "synch_to_ext_device";
node_synch_ref = 0;
frame_type = "FDD";
tdd_config = 3;
tdd_config_s = 0;
prefix_type = "NORMAL";
eutra_band = 7;
downlink_frequency = 2680000000L;
uplink_frequency_offset = -120000000;
Nid_cell = 0;
N_RB_DL = 25;
Nid_cell_mbsfn = 0;
nb_antenna_ports = 1;
nb_antennas_tx = 1;
nb_antennas_rx = 1;
tx_gain = 90;
rx_gain = 125;
pbch_repetition = "FALSE";
prach_root = 0;
prach_config_index = 0;
prach_high_speed = "DISABLE";
prach_zero_correlation = 1;
prach_freq_offset = 2;
pucch_delta_shift = 1;
pucch_nRB_CQI = 0;
pucch_nCS_AN = 0;
pucch_n1_AN = 0;
pdsch_referenceSignalPower = -27;
pdsch_p_b = 0;
pusch_n_SB = 1;
pusch_enable64QAM = "DISABLE";
pusch_hoppingMode = "interSubFrame";
pusch_hoppingOffset = 0;
pusch_groupHoppingEnabled = "ENABLE";
pusch_groupAssignment = 0;
pusch_sequenceHoppingEnabled = "DISABLE";
pusch_nDMRS1 = 1;
phich_duration = "NORMAL";
phich_resource = "ONESIXTH";
srs_enable = "DISABLE";
/* srs_BandwidthConfig =;
srs_SubframeConfig =;
srs_ackNackST =;
srs_MaxUpPts =;*/
pusch_p0_Nominal = -96;
pusch_alpha = "AL1";
pucch_p0_Nominal = -104;
msg3_delta_Preamble = 6;
pucch_deltaF_Format1 = "deltaF2";
pucch_deltaF_Format1b = "deltaF3";
pucch_deltaF_Format2 = "deltaF0";
pucch_deltaF_Format2a = "deltaF0";
pucch_deltaF_Format2b = "deltaF0";
rach_numberOfRA_Preambles = 64;
rach_preamblesGroupAConfig = "DISABLE";
/*
rach_sizeOfRA_PreamblesGroupA = ;
rach_messageSizeGroupA = ;
rach_messagePowerOffsetGroupB = ;
*/
rach_powerRampingStep = 4;
rach_preambleInitialReceivedTargetPower = -108;
rach_preambleTransMax = 10;
rach_raResponseWindowSize = 10;
rach_macContentionResolutionTimer = 48;
rach_maxHARQ_Msg3Tx = 4;
pcch_default_PagingCycle = 128;
pcch_nB = "oneT";
bcch_modificationPeriodCoeff = 2;
ue_TimersAndConstants_t300 = 1000;
ue_TimersAndConstants_t301 = 1000;
ue_TimersAndConstants_t310 = 1000;
ue_TimersAndConstants_t311 = 10000;
ue_TimersAndConstants_n310 = 20;
ue_TimersAndConstants_n311 = 1;
ue_TransmissionMode = 1;
//Parameters for SIB18
rxPool_sc_CP_Len = "normal";
rxPool_sc_Period = "sf40";
rxPool_data_CP_Len = "normal";
rxPool_ResourceConfig_prb_Num = 20;
rxPool_ResourceConfig_prb_Start = 5;
rxPool_ResourceConfig_prb_End = 44;
rxPool_ResourceConfig_offsetIndicator_present = "prSmall";
rxPool_ResourceConfig_offsetIndicator_choice = 0;
rxPool_ResourceConfig_subframeBitmap_present = "prBs40";
rxPool_ResourceConfig_subframeBitmap_choice_bs_buf = "00000000000000000000";
rxPool_ResourceConfig_subframeBitmap_choice_bs_size = 5;
rxPool_ResourceConfig_subframeBitmap_choice_bs_bits_unused = 0;
/* rxPool_dataHoppingConfig_hoppingParameter = 0;
rxPool_dataHoppingConfig_numSubbands = "ns1";
rxPool_dataHoppingConfig_rbOffset = 0;
rxPool_commTxResourceUC-ReqAllowed = "TRUE";
*/
// Parameters for SIB19
discRxPool_cp_Len = "normal"
discRxPool_discPeriod = "rf32"
discRxPool_numRetx = 1;
discRxPool_numRepetition = 2;
discRxPool_ResourceConfig_prb_Num = 5;
discRxPool_ResourceConfig_prb_Start = 3;
discRxPool_ResourceConfig_prb_End = 21;
discRxPool_ResourceConfig_offsetIndicator_present = "prSmall";
discRxPool_ResourceConfig_offsetIndicator_choice = 0;
discRxPool_ResourceConfig_subframeBitmap_present = "prBs40";
discRxPool_ResourceConfig_subframeBitmap_choice_bs_buf = "f0ffffffff";
discRxPool_ResourceConfig_subframeBitmap_choice_bs_size = 5;
discRxPool_ResourceConfig_subframeBitmap_choice_bs_bits_unused = 0;
}
);
srb1_parameters :
{
# timer_poll_retransmit = (ms) [5, 10, 15, 20,... 250, 300, 350, ... 500]
timer_poll_retransmit = 80;
# timer_reordering = (ms) [0,5, ... 100, 110, 120, ... ,200]
timer_reordering = 35;
# timer_reordering = (ms) [0,5, ... 250, 300, 350, ... ,500]
timer_status_prohibit = 0;
# poll_pdu = [4, 8, 16, 32 , 64, 128, 256, infinity(>10000)]
poll_pdu = 4;
# poll_byte = (kB) [25,50,75,100,125,250,375,500,750,1000,1250,1500,2000,3000,infinity(>10000)]
poll_byte = 99999;
# max_retx_threshold = [1, 2, 3, 4 , 6, 8, 16, 32]
max_retx_threshold = 4;
}
# ------- SCTP definitions
SCTP :
{
# Number of streams to use in input/output
SCTP_INSTREAMS = 2;
SCTP_OUTSTREAMS = 2;
};
////////// MME parameters:
mme_ip_address = ( { ipv4 = "CI_MME_IP_ADDR";
ipv6 = "192:168:30::17";
active = "yes";
preference = "ipv4";
}
);
NETWORK_INTERFACES :
{
ENB_INTERFACE_NAME_FOR_S1_MME = "eth0";
ENB_IPV4_ADDRESS_FOR_S1_MME = "CI_ENB_IP_ADDR";
ENB_INTERFACE_NAME_FOR_S1U = "eth0";
ENB_IPV4_ADDRESS_FOR_S1U = "CI_ENB_IP_ADDR";
ENB_PORT_FOR_S1U = 2152; # Spec 2152
ENB_IPV4_ADDRESS_FOR_X2C = "CI_ENB_IP_ADDR";
ENB_PORT_FOR_X2C = 36422; # Spec 36422
};
}
);
MACRLCs = (
{
num_cc = 1;
tr_s_preference = "local_L1";
tr_n_preference = "local_RRC";
phy_test_mode = 0;
puSch10xSnr = 200;
puCch10xSnr = 200;
}
);
L1s = (
{
num_cc = 1;
tr_n_preference = "local_mac";
}
);
RUs = (
{
local_rf = "yes"
nb_tx = 1
nb_rx = 1
att_tx = 0
att_rx = 0;
bands = [7];
max_pdschReferenceSignalPower = -27;
max_rxgain = 125;
eNB_instances = [0];
}
);
NETWORK_CONTROLLER :
{
FLEXRAN_ENABLED = "no";
FLEXRAN_INTERFACE_NAME = "lo";
FLEXRAN_IPV4_ADDRESS = "127.0.0.1";
FLEXRAN_PORT = 2210;
FLEXRAN_CACHE = "/mnt/oai_agent_cache";
FLEXRAN_AWAIT_RECONF = "no";
};
log_config :
{
global_log_level ="info";
global_log_verbosity ="medium";
hw_log_level ="info";
hw_log_verbosity ="medium";
phy_log_level ="info";
phy_log_verbosity ="medium";
mac_log_level ="info";
mac_log_verbosity ="high";
rlc_log_level ="info";
rlc_log_verbosity ="medium";
pdcp_log_level ="info";
pdcp_log_verbosity ="medium";
rrc_log_level ="info";
rrc_log_verbosity ="medium";
};
ci-scripts/createVM.sh
+20 -4
View File
@@ -45,6 +45,8 @@ function usage {
echo " --variant basic-sim OR -v2"
echo " --variant phy-sim OR -v3"
echo " --variant cppcheck OR -v4"
echo " --variant gnb-usrp OR -v5"
echo " --variant nu-ue-usrp OR -v6"
echo " --variant enb-ethernet OR -v7"
echo " --variant ue-ethernet OR -v8"
echo " Specify the variant to build."
@@ -62,6 +64,8 @@ function variant_usage {
echo " --variant basic-sim OR -v2"
echo " --variant phy-sim OR -v3"
echo " --variant cppcheck OR -v4"
echo " --variant gnb-usrp OR -v5"
echo " --variant nu-ue-usrp OR -v6"
echo " --variant enb-ethernet OR -v7"
echo " --variant ue-ethernet OR -v8"
echo ""
@@ -117,8 +121,15 @@ case $key in
;;
-v4)
VM_NAME=ci-cppcheck
VM_MEMORY=4096
VM_CPU=4
VM_MEMORY=8192
shift
;;
-v5)
VM_NAME=ci-gnb-usrp
shift
;;
-v6)
VM_NAME=ci-ue-nr-usrp
shift
;;
-v7)
@@ -144,8 +155,13 @@ case $key in
;;
cppcheck)
VM_NAME=ci-cppcheck
VM_MEMORY=4096
VM_CPU=4
VM_MEMORY=8192
;;
gnb-usrp)
VM_NAME=ci-gnb-usrp
;;
nu-ue-usrp)
VM_NAME=ci-ue-nr-usrp
;;
enb-ethernet)
VM_NAME=ci-enb-ethernet
ci-scripts/reportBuildLocally.sh
+64 -26
View File
@@ -525,49 +525,78 @@ sca_summary_table_row ./archives/cppcheck/cppcheck.xml "Expression depends on or
sca_summary_table_footer ./archives/cppcheck/cppcheck.xml
summary_table_header "OAI Build eNB -- USRP option"
summary_table_row "LTE SoftModem - Release 14" ./archives/enb_usrp/lte-softmodem.Rel14.txt "Built target lte-softmodem" ./enb_usrp_row1.html
summary_table_row "Coding - Release 14" ./archives/enb_usrp/coding.Rel14.txt "Built target coding" ./enb_usrp_row2.html
summary_table_row "OAI USRP device if - Release 14" ./archives/enb_usrp/oai_usrpdevif.Rel14.txt "Built target oai_usrpdevif" ./enb_usrp_row3.html
summary_table_row "Parameters Lib Config - Release 14" ./archives/enb_usrp/params_libconfig.Rel14.txt "Built target params_libconfig" ./enb_usrp_row4.html
summary_table_row "LTE SoftModem - Release 15" ./archives/enb_usrp/lte-softmodem.Rel15.txt "Built target lte-softmodem" ./enb_usrp_row1.html
summary_table_row "Coding - Release 15" ./archives/enb_usrp/coding.Rel15.txt "Built target coding" ./enb_usrp_row2.html
summary_table_row "OAI USRP device if - Release 15" ./archives/enb_usrp/oai_usrpdevif.Rel15.txt "Built target oai_usrpdevif" ./enb_usrp_row3.html
summary_table_row "Parameters Lib Config - Release 15" ./archives/enb_usrp/params_libconfig.Rel15.txt "Built target params_libconfig" ./enb_usrp_row4.html
summary_table_footer
summary_table_header "OAI Build basic simulator option"
summary_table_row "Basic Simulator eNb - Release 14" ./archives/basic_sim/basic_simulator_enb.txt "Built target lte-softmodem" ./basic_sim_row1.html
summary_table_row "Basic Simulator UE - Release 14" ./archives/basic_sim/basic_simulator_ue.txt "Built target lte-uesoftmodem" ./basic_sim_row2.html
summary_table_row "Conf 2 UE data - Release 14" ./archives/basic_sim/conf2uedata.Rel14.txt "Built target conf2uedata" ./basic_sim_row3.html
summary_table_row "Basic Simulator eNb - Release 15" ./archives/basic_sim/basic_simulator_enb.txt "Built target lte-softmodem" ./basic_sim_row1.html
summary_table_row "Basic Simulator UE - Release 15" ./archives/basic_sim/basic_simulator_ue.txt "Built target lte-uesoftmodem" ./basic_sim_row2.html
summary_table_row "Conf 2 UE data - Release 15" ./archives/basic_sim/conf2uedata.Rel15.txt "Built target conf2uedata" ./basic_sim_row3.html
summary_table_footer
summary_table_header "OAI Build Physical simulators option"
summary_table_row "DL Simulator - Release 14" ./archives/phy_sim/dlsim.Rel14.txt "Built target dlsim" ./phy_sim_row1.html
summary_table_row "UL Simulator - Release 14" ./archives/phy_sim/ulsim.Rel14.txt "Built target ulsim" ./phy_sim_row2.html
summary_table_row "Coding - Release 14" ./archives/phy_sim/coding.Rel14.txt "Built target coding" ./phy_sim_row3.html
summary_table_row "DL Simulator - Release 15" ./archives/phy_sim/dlsim.Rel15.txt "Built target dlsim" ./phy_sim_row1.html
summary_table_row "UL Simulator - Release 15" ./archives/phy_sim/ulsim.Rel15.txt "Built target ulsim" ./phy_sim_row2.html
summary_table_row "Coding - Release 15" ./archives/phy_sim/coding.Rel15.txt "Built target coding" ./phy_sim_row3.html
if [ -f ./archives/phy_sim/./archives/phy_sim/ldpctest.Rel15.txt ]
then
summary_table_row "LDPC Test - Release 15" ./archives/phy_sim/ldpctest.Rel15.txt "Built target coding" ./phy_sim_row4.html
fi
if [ -f ./archives/phy_sim/./archives/phy_sim/polartest.Rel15.txt ]
then
summary_table_row "Polar Test - Release 15" ./archives/phy_sim/polartest.Rel15.txt "Built target coding" ./phy_sim_row5.html
fi
summary_table_footer
if [ -f archives/gnb_usrp/nr-softmodem.Rel15.txt ]
then
summary_table_header "OAI Build gNB -- USRP option"
summary_table_row "LTE SoftModem - Release 15" ./archives/gnb_usrp/nr-softmodem.Rel15.txt "Built target nr-softmodem" ./gnb_usrp_row1.html
summary_table_row "Coding - Release 15" ./archives/gnb_usrp/coding.Rel15.txt "Built target coding" ./gnb_usrp_row2.html
summary_table_row "OAI USRP device if - Release 15" ./archives/gnb_usrp/oai_usrpdevif.Rel15.txt "Built target oai_usrpdevif" ./gnb_usrp_row3.html
summary_table_row "Parameters Lib Config - Release 15" ./archives/gnb_usrp/params_libconfig.Rel15.txt "Built target params_libconfig" ./gnb_usrp_row4.html
summary_table_footer
fi
if [ -f archives/nrue_usrp/nr-uesoftmodem.Rel15.txt ]
then
summary_table_header "OAI Build 5G NR UE -- USRP option"
summary_table_row "UE SoftModem - Release 15" ./archives/nrue_usrp/nr-uesoftmodem.Rel15.txt "Built target nr-uesoftmodem" ./nrue_usrp_row1.html
summary_table_row "Coding - Release 15" ./archives/nrue_usrp/coding.Rel15.txt "Built target coding" ./nrue_usrp_row2.html
summary_table_row "OAI USRP device if - Release 15" ./archives/nrue_usrp/oai_usrpdevif.Rel15.txt "Built target oai_usrpdevif" ./nrue_usrp_row3.html
summary_table_row "Parameters Lib Config - Release 15" ./archives/nrue_usrp/params_libconfig.Rel15.txt "Built target params_libconfig" ./nrue_usrp_row4.html
summary_table_footer
fi
summary_table_header "OAI Build eNB -- ETHERNET transport option"
summary_table_row "LTE SoftModem w/o S1 - Release 14" ./archives/enb_eth/lte-softmodem-nos1.Rel14.txt "Built target lte-softmodem" ./enb_eth_row1.html
summary_table_row "Coding - Release 14" ./archives/enb_eth/coding.Rel14.txt "Built target coding" ./enb_eth_row2.html
summary_table_row "OAI ETHERNET transport - Release 14" ./archives/enb_eth/oai_eth_transpro.Rel14.txt "Built target oai_eth_transpro" ./enb_eth_row3.html
summary_table_row "Parameters Lib Config - Release 14" ./archives/enb_eth/params_libconfig.Rel14.txt "Built target params_libconfig" ./enb_eth_row4.html
summary_table_row "RB Tools - Release 14" ./archives/enb_eth/rb_tool.Rel14.txt "Built target rb_tool" ./enb_eth_row5.html
summary_table_row "NAS Mesh - Release 14" ./archives/enb_eth/nasmesh.Rel14.txt "Built target nasmesh" ./enb_eth_row6.html
summary_table_row "LTE SoftModem w/o S1 - Release 15" ./archives/enb_eth/lte-softmodem-nos1.Rel15.txt "Built target lte-softmodem" ./enb_eth_row1.html
summary_table_row "Coding - Release 15" ./archives/enb_eth/coding.Rel15.txt "Built target coding" ./enb_eth_row2.html
summary_table_row "OAI ETHERNET transport - Release 15" ./archives/enb_eth/oai_eth_transpro.Rel15.txt "Built target oai_eth_transpro" ./enb_eth_row3.html
summary_table_row "Parameters Lib Config - Release 15" ./archives/enb_eth/params_libconfig.Rel15.txt "Built target params_libconfig" ./enb_eth_row4.html
summary_table_row "RB Tools - Release 15" ./archives/enb_eth/rb_tool.Rel15.txt "Built target rb_tool" ./enb_eth_row5.html
summary_table_row "NAS Mesh - Release 15" ./archives/enb_eth/nasmesh.Rel15.txt "Built target nasmesh" ./enb_eth_row6.html
summary_table_footer
summary_table_header "OAI Build UE -- ETHERNET transport option"
summary_table_row "LTE UE SoftModem w/o S1 - Release 14" ./archives/ue_eth/lte-uesoftmodem-nos1.Rel14.txt "Built target lte-uesoftmodem" ./ue_eth_row1.html
summary_table_row "Coding - Release 14" ./archives/ue_eth/coding.Rel14.txt "Built target coding" ./ue_eth_row2.html
summary_table_row "OAI ETHERNET transport - Release 14" ./archives/ue_eth/oai_eth_transpro.Rel14.txt "Built target oai_eth_transpro" ./ue_eth_row3.html
summary_table_row "Parameters Lib Config - Release 14" ./archives/ue_eth/params_libconfig.Rel14.txt "Built target params_libconfig" ./ue_eth_row4.html
summary_table_row "RB Tools - Release 14" ./archives/ue_eth/rb_tool.Rel14.txt "Built target rb_tool" ./ue_eth_row5.html
summary_table_row "NAS Mesh - Release 14" ./archives/ue_eth/nasmesh.Rel14.txt "Built target nasmesh" ./ue_eth_row6.html
summary_table_row "LTE UE SoftModem w/o S1 - Release 15" ./archives/ue_eth/lte-uesoftmodem-nos1.Rel15.txt "Built target lte-uesoftmodem" ./ue_eth_row1.html
summary_table_row "Coding - Release 15" ./archives/ue_eth/coding.Rel15.txt "Built target coding" ./ue_eth_row2.html
summary_table_row "OAI ETHERNET transport - Release 15" ./archives/ue_eth/oai_eth_transpro.Rel15.txt "Built target oai_eth_transpro" ./ue_eth_row3.html
summary_table_row "Parameters Lib Config - Release 15" ./archives/ue_eth/params_libconfig.Rel15.txt "Built target params_libconfig" ./ue_eth_row4.html
summary_table_row "RB Tools - Release 15" ./archives/ue_eth/rb_tool.Rel15.txt "Built target rb_tool" ./ue_eth_row5.html
summary_table_row "NAS Mesh - Release 15" ./archives/ue_eth/nasmesh.Rel15.txt "Built target nasmesh" ./ue_eth_row6.html
summary_table_footer
echo " <h2>Red Hat (CentOS Linux release 7.4.1708) -- Summary</h2>" >> ./build_results.html
summary_table_header "Red Hat -- OAI Build eNB -- USRP option"
summary_table_row "LTE SoftModem - Release 14" ./archives/red_hat/lte-softmodem.Rel14.txt "Built target lte-softmodem" ./enb_usrp_rh_row1.html
summary_table_row "Coding - Release 14" ./archives/red_hat/coding.Rel14.txt "Built target coding" ./enb_usrp_rh_row2.html
summary_table_row "OAI USRP device if - Release 14" ./archives/red_hat/oai_usrpdevif.Rel14.txt "Built target oai_usrpdevif" ./enb_usrp_rh_row3.html
summary_table_row "Parameters Lib Config - Release 14" ./archives/red_hat/params_libconfig.Rel14.txt "Built target params_libconfig" ./enb_usrp_rh_row4.html
summary_table_row "LTE SoftModem - Release 15" ./archives/red_hat/lte-softmodem.Rel15.txt "Built target lte-softmodem" ./enb_usrp_rh_row1.html
summary_table_row "Coding - Release 15" ./archives/red_hat/coding.Rel15.txt "Built target coding" ./enb_usrp_rh_row2.html
summary_table_row "OAI USRP device if - Release 15" ./archives/red_hat/oai_usrpdevif.Rel15.txt "Built target oai_usrpdevif" ./enb_usrp_rh_row3.html
summary_table_row "Parameters Lib Config - Release 15" ./archives/red_hat/params_libconfig.Rel15.txt "Built target params_libconfig" ./enb_usrp_rh_row4.html
summary_table_footer
echo " <h3>Details</h3>" >> ./build_results.html
@@ -584,6 +613,15 @@ for DETAILS_TABLE in `ls ./phy_sim_row*.html`
do
cat $DETAILS_TABLE >> ./build_results.html
done
for DETAILS_TABLE in `ls ./gnb_usrp_row*.html`
do
cat $DETAILS_TABLE >> ./build_results.html
done
for DETAILS_TABLE in `ls ./nrue_usrp_row*.html`
do
cat $DETAILS_TABLE >> ./build_results.html
done
for DETAILS_TABLE in `ls ./enb_eth_row*.html`
do
cat $DETAILS_TABLE >> ./build_results.html
cmake_targets/CMakeLists.txt
+506 -26
View File
@@ -287,7 +287,8 @@ set(protobuf_generated_dir ${OPENAIR_BIN_DIR})
# RRC
######
add_list2_option(RRC_ASN1_VERSION "Rel14" "ASN.1 version of RRC interface" "Rel8" "Rel10" "Rel14" "CBA")
add_list2_option(RRC_ASN1_VERSION "Rel15" "ASN.1 version of RRC interface" "Rel8" "Rel10" "Rel14" "CBA")
if (${RRC_ASN1_VERSION} STREQUAL "Rel8")
make_version(RRC_VERSION 8 6 0)
@@ -312,15 +313,17 @@ elseif (${RRC_ASN1_VERSION} STREQUAL "Rel14")
make_version(RRC_VERSION 14 7 0)
set (RRC_GRAMMAR ${OPENAIR2_DIR}/RRC/LTE/MESSAGES/asn1c/ASN1_files/lte-rrc-14.7.0.asn1)
elseif (${RRC_ASN1_VERSION} STREQUAL "Rel15")
make_version(RRC_VERSION 15 2 2)
set (RRC_GRAMMAR ${OPENAIR2_DIR}/RRC/LTE/MESSAGES/asn1c/ASN1_files/lte-rrc-15.2.2.asn1)
make_version(RRC_VERSION 15 3 0)
set (RRC_GRAMMAR ${OPENAIR2_DIR}/RRC/LTE/MESSAGES/asn1c/ASN1_files/lte-rrc-15.3.0.asn1)
endif (${RRC_ASN1_VERSION} STREQUAL "Rel8")
add_definitions(-DRRC_VERSION=${RRC_VERSION})
set (RRC_FULL_DIR ${asn1_generated_dir}/RRC_${RRC_ASN1_VERSION})
message("calling asn1c -pdu=all -fcompound-names -gen-PER -no-gen-OER -no-gen-example -D ${RRC_FULL_DIR} ${RRC_GRAMMAR}")
execute_process(COMMAND mkdir -p ${RRC_FULL_DIR}
COMMAND env asn1c -pdu=all -fcompound-names -gen-PER -no-gen-OER -no-gen-example -D ${RRC_FULL_DIR} ${RRC_GRAMMAR}
RESULT_VARIABLE ret)
RESULT_VARIABLE ret
OUTPUT_QUIET
ERROR_QUIET)
if (NOT ${ret} STREQUAL 0)
message(FATAL_ERROR "${ret}: error")
endif (NOT ${ret} STREQUAL 0)
@@ -343,11 +346,53 @@ add_custom_command (
DEPENDS ${RRC_GRAMMAR}
)
#NR RRC
######
add_list2_option(NR_RRC_ASN1_VERSION "NR_Rel15" "ASN.1 version of NR_RRC interface")
if (${NR_RRC_ASN1_VERSION} STREQUAL "NR_Rel15")
make_version(NR_RRC_VERSION 15 3 0)
set (NR_RRC_GRAMMAR ${OPENAIR2_DIR}/RRC/NR/MESSAGES/asn1c/ASN1_files/nr-rrc-15.3.0.asn1)
endif (${NR_RRC_ASN1_VERSION} STREQUAL "NR_Rel15")
add_definitions(-DNR_RRC_VERSION=${NR_RRC_VERSION})
set (NR_RRC_FULL_DIR ${asn1_generated_dir}/${NR_RRC_ASN1_VERSION})
message("calling ASN1C_PREFIX=NR_ asn1c -pdu=all -fcompound-names -findirect-choice -gen-PER -no-gen-OER -no-gen-example -D ${NR_RRC_FULL_DIR} ${NR_RRC_GRAMMAR}")
execute_process(COMMAND mkdir -p ${NR_RRC_FULL_DIR}
COMMAND env "ASN1C_PREFIX=NR_" asn1c -fcompound-names -findirect-choice -gen-PER -no-gen-OER -no-gen-example -D ${NR_RRC_FULL_DIR} ${NR_RRC_GRAMMAR}
RESULT_VARIABLE ret
OUTPUT_QUIET
ERROR_QUIET)
if (NOT ${ret} STREQUAL 0)
message(FATAL_ERROR "${ret}: error")
endif (NOT ${ret} STREQUAL 0)
file(GLOB nr_rrc_source ${NR_RRC_FULL_DIR}/*.c)
file(GLOB nr_rrc_h ${NR_RRC_FULL_DIR}/*.h)
set(nr_rrc_h ${nr_rrc_h} ${NR_RRC_FULL_DIR}/NR_asn_constant.h)
#set_source_files_properties(${nr_rrc_source} PROPERTIES COMPILE_FLAGS -w) # suppress warnings from generated code
add_library(NR_RRC_LIB
${nr_rrc_h}
${nr_rrc_source}
${OPENAIR2_DIR}/RRC/NR/MESSAGES/asn1_msg.c)
include_directories ("${NR_RRC_FULL_DIR}")
# add the command to generate the source code
# Warning: if you modify ASN.1 source file to generate new C files, cmake should be re-run instead of make
add_custom_command (OUTPUT ${NR_RRC_FULL_DIR}/NR_asn_constant.h
COMMAND mkdir -p ${NR_RRC_FULL_DIR}
DEPENDS ${NR_RRC_GRAMMAR}
)
# S1AP
# Same limitation as described in RRC: unknown generated file list
# so we generate it at cmake time
##############
add_list1_option(S1AP_RELEASE R14 "S1AP ASN.1 grammar version" R8 R9 R10 R14 R15)
add_list1_option(S1AP_RELEASE R15 "S1AP ASN.1 grammar version" R8 R9 R10 R14 R15)
set(S1AP_DIR ${OPENAIR3_DIR}/S1AP)
if (${S1AP_RELEASE} STREQUAL "R8")
@@ -369,11 +414,11 @@ elseif (${S1AP_RELEASE} STREQUAL "R13")
make_version(S1AP_VERSION 13 6 0)
set(S1AP_ASN_FILES "s1ap-13.6.0.asn1")
elseif (${S1AP_RELEASE} STREQUAL "R14")
make_version(S1AP_VERSION 14 5 0)
set(S1AP_ASN_FILES "s1ap-14.5.0.asn1")
make_version(S1AP_VERSION 14 7 0)
set(S1AP_ASN_FILES "s1ap-14.7.0.asn1")
else (${S1AP_RELEASE} STREQUAL "R15")
make_version(S1AP_VERSION 15 1 0)
set(S1AP_ASN_FILES "s1ap-15.1.0.asn1")
make_version(S1AP_VERSION 15 3 0)
set(S1AP_ASN_FILES "s1ap-15.3.0.asn1")
endif(${S1AP_RELEASE} STREQUAL "R8")
add_definitions(-DS1AP_VERSION=${S1AP_VERSION})
set(S1AP_ASN_DIR ${S1AP_DIR}/MESSAGES/ASN1/${S1AP_RELEASE})
@@ -381,7 +426,9 @@ set(S1AP_C_DIR ${asn1_generated_dir}/S1AP_${S1AP_RELEASE})
message("calling ASN1C_PREFIX=S1AP_ asn1c -pdu=all -fcompound-names -fno-include-deps -gen-PER -no-gen-OER -no-gen-example -D ${S1AP_C_DIR} ${S1AP_ASN_DIR}/${S1AP_ASN_FILES}")
execute_process(COMMAND mkdir -p ${S1AP_C_DIR}
COMMAND env "ASN1C_PREFIX=S1AP_" asn1c -pdu=all -fcompound-names -fno-include-deps -gen-PER -no-gen-OER -no-gen-example -D ${S1AP_C_DIR} ${S1AP_ASN_DIR}/${S1AP_ASN_FILES}
RESULT_VARIABLE ret)
RESULT_VARIABLE ret
OUTPUT_QUIET
ERROR_QUIET)
if (NOT ${ret} STREQUAL 0)
message(FATAL_ERROR "${ret}: error")
endif (NOT ${ret} STREQUAL 0)
@@ -423,7 +470,7 @@ add_library(S1AP_ENB
# Same limitation as described in RRC/S1AP: unknown generated file list
# so we generate it at cmake time
##############
add_list1_option(X2AP_RELEASE R14 "X2AP ASN.1 grammar version" R8 R11 R12 R14 R15)
add_list1_option(X2AP_RELEASE R15 "X2AP ASN.1 grammar version" R8 R11 R12 R14 R15)
set(X2AP_DIR ${OPENAIR2_DIR}/X2AP)
if (${X2AP_RELEASE} STREQUAL "R8")
@@ -439,8 +486,8 @@ elseif (${X2AP_RELEASE} STREQUAL "R14")
make_version(X2AP_VERSION 14 6 0)
set(X2AP_ASN_FILES x2ap-14.6.0.asn1)
elseif (${X2AP_RELEASE} STREQUAL "R15")
make_version(X2AP_VERSION 15 1 0)
set(X2AP_ASN_FILES x2ap-15.1.0.asn1)
make_version(X2AP_VERSION 15 3 0)
set(X2AP_ASN_FILES x2ap-15.3.0.asn1)
endif(${X2AP_RELEASE} STREQUAL "R8")
add_definitions(-DX2AP_VERSION=${X2AP_VERSION})
set(X2AP_ASN_DIR ${X2AP_DIR}/MESSAGES/ASN1/${X2AP_RELEASE})
@@ -448,7 +495,9 @@ set(X2AP_C_DIR ${asn1_generated_dir}/X2AP_${X2AP_RELEASE})
message("calling ASN1C_PREFIX=X2AP_ asn1c -pdu=all -fcompound-names -fno-include-deps -gen-PER -no-gen-OER -no-gen-example -D ${X2AP_C_DIR} ${X2AP_ASN_DIR}/${X2AP_ASN_FILES}")
execute_process(COMMAND mkdir -p ${X2AP_C_DIR}
COMMAND env "ASN1C_PREFIX=X2AP_" asn1c -pdu=all -fcompound-names -fno-include-deps -gen-PER -no-gen-OER -no-gen-example -D ${X2AP_C_DIR} ${X2AP_ASN_DIR}/${X2AP_ASN_FILES}
RESULT_VARIABLE ret)
RESULT_VARIABLE ret
OUTPUT_QUIET
ERROR_QUIET)
if (NOT ${ret} STREQUAL 0)
message(FATAL_ERROR "${ret}: error")
endif (NOT ${ret} STREQUAL 0)
@@ -773,6 +822,7 @@ include_directories("${OPENAIR_DIR}/targets/ARCH/COMMON")
include_directories("${OPENAIR_DIR}/targets/ARCH/EXMIMO/USERSPACE/LIB/")
include_directories("${OPENAIR_DIR}/targets/ARCH/EXMIMO/DEFS")
include_directories("${OPENAIR2_DIR}/ENB_APP")
include_directories("${OPENAIR2_DIR}/GNB_APP")
include_directories("${OPENAIR2_DIR}/ENB_APP/CONTROL_MODULES/MAC")
include_directories("${OPENAIR2_DIR}/ENB_APP/CONTROL_MODULES/RRC")
include_directories("${OPENAIR2_DIR}/ENB_APP/CONTROL_MODULES/PDCP")
@@ -978,8 +1028,16 @@ set(SCHED_SRC
)
add_library(SCHED_LIB ${SCHED_SRC})
set(SCHED_NR_SRC
${OPENAIR1_DIR}/SCHED_NR/fapi_nr_l1.c
${OPENAIR1_DIR}/SCHED_NR/phy_procedures_nr_common.c
${OPENAIR1_DIR}/SCHED_NR/phy_procedures_nr_gNB.c
)
add_library(SCHED_NR_LIB ${SCHED_NR_SRC})
set(SCHED_SRC_RU
${OPENAIR1_DIR}/SCHED/ru_procedures.c
${OPENAIR1_DIR}/SCHED_NR/nr_ru_procedures.c
${OPENAIR1_DIR}/SCHED/prach_procedures.c
)
add_library(SCHED_RU_LIB ${SCHED_SRC_RU})
@@ -993,6 +1051,17 @@ set(SCHED_SRC_UE
)
add_library(SCHED_UE_LIB ${SCHED_SRC_UE})
set(SCHED_SRC_NR_UE
${OPENAIR1_DIR}/SCHED_NR_UE/phy_procedures_nr_ue.c
${OPENAIR1_DIR}/SCHED_NR/phy_procedures_nr_common.c
${OPENAIR1_DIR}/SCHED_NR_UE/fapi_nr_ue_l1.c
${OPENAIR1_DIR}/SCHED_NR_UE/phy_frame_config_nr.c
${OPENAIR1_DIR}/SCHED_NR_UE/harq_nr.c
${OPENAIR1_DIR}/SCHED_NR_UE/pucch_uci_ue_nr.c
${OPENAIR1_DIR}/SCHED_NR_UE/pucch_power_control_ue_nr.c
)
add_library(SCHED_NR_UE_LIB ${SCHED_SRC_NR_UE})
# nFAPI
#################################
set(NFAPI_COMMON_SRC
@@ -1055,11 +1124,33 @@ set(PHY_TURBOSRC
${OPENAIR1_DIR}/PHY/CODING/3gpplte_turbo_decoder_avx2_16bit.c
${OPENAIR1_DIR}/PHY/CODING/3gpplte_turbo_decoder.c
)
set(PHY_POLARSRC
${OPENAIR1_DIR}/PHY/CODING/nr_polar_init.c
${OPENAIR1_DIR}/PHY/CODING/nrPolar_tools/nr_bitwise_operations.c
${OPENAIR1_DIR}/PHY/CODING/nrPolar_tools/nr_crc_byte.c
${OPENAIR1_DIR}/PHY/CODING/nrPolar_tools/nr_polar_crc.c
${OPENAIR1_DIR}/PHY/CODING/nrPolar_tools/nr_polar_decoder.c
${OPENAIR1_DIR}/PHY/CODING/nrPolar_tools/nr_polar_decoding_tools.c
${OPENAIR1_DIR}/PHY/CODING/nrPolar_tools/nr_polar_encoder.c
${OPENAIR1_DIR}/PHY/CODING/nrPolar_tools/nr_polar_interleaving_pattern.c
${OPENAIR1_DIR}/PHY/CODING/nrPolar_tools/nr_polar_kernal_operation.c
${OPENAIR1_DIR}/PHY/CODING/nrPolar_tools/nr_polar_kronecker_power_matrices.c
${OPENAIR1_DIR}/PHY/CODING/nrPolar_tools/nr_polar_matrix_and_array.c
${OPENAIR1_DIR}/PHY/CODING/nrPolar_tools/nr_polar_procedures.c
${OPENAIR1_DIR}/PHY/CODING/nrPolar_tools/nr_polar_sequence_pattern.c
)
set(PHY_TURBOIF
${OPENAIR1_DIR}/PHY/CODING/coding_load.c
)
)
set(PHY_LDPCSRC
${OPENAIR1_DIR}/PHY/CODING/nrLDPC_decoder/nrLDPC_decoder.c
${OPENAIR1_DIR}/PHY/CODING/nrLDPC_encoder/ldpc_encoder.c
${OPENAIR1_DIR}/PHY/CODING/nrLDPC_encoder/ldpc_encoder2.c
${OPENAIR1_DIR}/PHY/CODING/nrLDPC_encoder/ldpc_generate_coefficient.c
)
add_library(coding MODULE ${PHY_TURBOSRC} )
set(PHY_SRC_COMMON
# depend on code generation from asn1c
${RRC_FULL_DIR}/asn_constant.h
@@ -1089,6 +1180,8 @@ set(PHY_SRC_COMMON
${OPENAIR1_DIR}/PHY/LTE_REFSIG/lte_dl_mbsfn.c
${OPENAIR1_DIR}/PHY/LTE_REFSIG/lte_ul_ref.c
${OPENAIR1_DIR}/PHY/CODING/lte_segmentation.c
${OPENAIR1_DIR}/PHY/CODING/nr_segmentation.c
${OPENAIR1_DIR}/PHY/CODING/nr_compute_tbs.c
${OPENAIR1_DIR}/PHY/CODING/ccoding_byte.c
${OPENAIR1_DIR}/PHY/CODING/ccoding_byte_lte.c
${OPENAIR1_DIR}/PHY/CODING/3gpplte_sse.c
@@ -1151,6 +1244,7 @@ set(PHY_SRC_RU
${OPENAIR1_DIR}/PHY/MODULATION/beamforming.c
${OPENAIR1_DIR}/PHY/MODULATION/compute_bf_weights.c
${OPENAIR1_DIR}/PHY/INIT/lte_init_ru.c
${OPENAIR1_DIR}/PHY/INIT/nr_init_ru.c
${OPENAIR1_DIR}/PHY/LTE_TRANSPORT/prach.c
)
@@ -1186,6 +1280,7 @@ set(PHY_SRC_UE
${OPENAIR1_DIR}/PHY/MODULATION/ul_7_5_kHz_ue.c
${OPENAIR1_DIR}/PHY/LTE_ESTIMATION/lte_sync_time.c
${OPENAIR1_DIR}/PHY/LTE_ESTIMATION/lte_sync_timefreq.c
${OPENAIR1_DIR}/PHY/LTE_ESTIMATION/lte_adjust_sync.c
${OPENAIR1_DIR}/PHY/LTE_ESTIMATION/lte_adjust_sync_ue.c
${OPENAIR1_DIR}/PHY/LTE_ESTIMATION/lte_dl_channel_estimation.c
${OPENAIR1_DIR}/PHY/LTE_ESTIMATION/lte_dl_bf_channel_estimation.c
@@ -1196,17 +1291,92 @@ set(PHY_SRC_UE
${OPENAIR1_DIR}/PHY/INIT/lte_init_ue.c
)
set(PHY_NR_SRC
# depend on code generation from asn1c
${RRC_FULL_DIR}/asn_constant.h
# actual source
${OPENAIR1_DIR}/PHY/INIT/nr_init.c
${OPENAIR1_DIR}/PHY/INIT/nr_parms.c
${OPENAIR1_DIR}/PHY/NR_TRANSPORT/nr_pss.c
${OPENAIR1_DIR}/PHY/NR_TRANSPORT/nr_sss.c
${OPENAIR1_DIR}/PHY/NR_TRANSPORT/nr_pbch.c
${OPENAIR1_DIR}/PHY/NR_TRANSPORT/nr_dci.c
${OPENAIR1_DIR}/PHY/NR_TRANSPORT/nr_dci_tools.c
${OPENAIR1_DIR}/PHY/NR_REFSIG/nr_gold.c
${OPENAIR1_DIR}/PHY/TOOLS/file_output.c
${OPENAIR1_DIR}/PHY/TOOLS/cadd_vv.c
${OPENAIR1_DIR}/PHY/TOOLS/lte_dfts.c
${OPENAIR1_DIR}/PHY/TOOLS/log2_approx.c
${OPENAIR1_DIR}/PHY/TOOLS/cmult_sv.c
${OPENAIR1_DIR}/PHY/TOOLS/cmult_vv.c
${OPENAIR1_DIR}/PHY/TOOLS/cdot_prod.c
${OPENAIR1_DIR}/PHY/TOOLS/signal_energy.c
${OPENAIR1_DIR}/PHY/TOOLS/dB_routines.c
${OPENAIR1_DIR}/PHY/TOOLS/sqrt.c
${OPENAIR1_DIR}/PHY/TOOLS/time_meas.c
${OPENAIR1_DIR}/PHY/TOOLS/lut.c
${PHY_POLARSRC}
${PHY_LDPCSRC}
)
set(PHY_NR_UE_SRC
# depend on code generation from asn1c
${RRC_FULL_DIR}/asn_constant.h
# actual source
${OPENAIR1_DIR}/PHY/MODULATION/slot_fep_nr.c
${OPENAIR1_DIR}/PHY/INIT/nr_parms.c
${OPENAIR1_DIR}/PHY/NR_UE_TRANSPORT/pss_nr.c
${OPENAIR1_DIR}/PHY/NR_UE_TRANSPORT/sss_nr.c
${OPENAIR1_DIR}/PHY/NR_UE_TRANSPORT/cic_filter_nr.c
${OPENAIR1_DIR}/PHY/NR_UE_TRANSPORT/dmrs_nr.c
${OPENAIR1_DIR}/PHY/NR_UE_TRANSPORT/nr_initial_sync.c
${OPENAIR1_DIR}/PHY/NR_UE_TRANSPORT/nr_pbch.c
${OPENAIR1_DIR}/PHY/NR_UE_TRANSPORT/
${OPENAIR1_DIR}/PHY/NR_UE_TRANSPORT/nr_prach.c
${OPENAIR1_DIR}/PHY/NR_UE_TRANSPORT/srs_modulation_nr.c
${OPENAIR1_DIR}/PHY/NR_UE_TRANSPORT/dci_nr.c
${OPENAIR1_DIR}/PHY/NR_UE_TRANSPORT/dci_tools_nr.c
${OPENAIR1_DIR}/PHY/NR_UE_TRANSPORT/pucch_nr.c
${OPENAIR1_DIR}/PHY/NR_REFSIG/ul_ref_seq_nr.c
${OPENAIR1_DIR}/PHY/NR_REFSIG/nr_dmrs_rx.c
${OPENAIR1_DIR}/PHY/NR_REFSIG/nr_gold_ue.c
${OPENAIR1_DIR}/PHY/NR_UE_ESTIMATION/nr_dl_channel_estimation.c
${OPENAIR1_DIR}/PHY/TOOLS/file_output.c
${OPENAIR1_DIR}/PHY/TOOLS/cadd_vv.c
${OPENAIR1_DIR}/PHY/TOOLS/lte_dfts.c
${OPENAIR1_DIR}/PHY/TOOLS/log2_approx.c
${OPENAIR1_DIR}/PHY/TOOLS/cmult_sv.c
${OPENAIR1_DIR}/PHY/TOOLS/cmult_vv.c
${OPENAIR1_DIR}/PHY/TOOLS/cdot_prod.c
${OPENAIR1_DIR}/PHY/TOOLS/signal_energy.c
${OPENAIR1_DIR}/PHY/TOOLS/dB_routines.c
${OPENAIR1_DIR}/PHY/TOOLS/sqrt.c
${OPENAIR1_DIR}/PHY/TOOLS/time_meas.c
${OPENAIR1_DIR}/PHY/TOOLS/lut.c
${OPENAIR1_DIR}/PHY/INIT/nr_init_ue.c
${PHY_POLARSRC}
${PHY_LDPCSRC}
)
if (${SMBV})
set(PHY_SRC "${PHY_SRC} ${OPENAIR1_DIR}/PHY/TOOLS/smbv.c")
endif (${SMBV})
if (${COMPILATION_AVX2} STREQUAL "True")
#set(PHY_SRC ${PHY_SRC} ${OPENAIR1_DIR}/PHY/LTE_TRANSPORT/dlsch_llr_computation_avx2.c)
set(PHY_SRC_UE ${PHY_SRC_UE} ${OPENAIR1_DIR}/PHY/LTE_UE_TRANSPORT/dlsch_llr_computation_avx2.c)
endif ()
if (${COMPILATION_AVX2} STREQUAL "True")
set(PHY_NR_UE_SRC ${PHY_NR_UE_SRC} ${OPENAIR1_DIR}/PHY/LTE_UE_TRANSPORT/dlsch_llr_computation_avx2.c)
endif ()
add_library(PHY_COMMON ${PHY_SRC_COMMON})
add_library(PHY ${PHY_SRC})
add_library(PHY_UE ${PHY_SRC_UE})
add_library(PHY_NR ${PHY_NR_SRC})
add_library(PHY_NR_UE ${PHY_NR_UE_SRC})
add_library(PHY_RU ${PHY_SRC_RU})
#Library for mex functions
@@ -1238,12 +1408,18 @@ add_library(PHY_MEX ${PHY_MEX_UE})
#Layer 2 library
#####################
set(MAC_DIR ${OPENAIR2_DIR}/LAYER2/MAC)
set(NR_MAC_DIR ${OPENAIR2_DIR}/LAYER2/NR_MAC_gNB)
set(NR_UE_MAC_DIR ${OPENAIR2_DIR}/LAYER2/NR_MAC_UE)
set(PHY_INTERFACE_DIR ${OPENAIR2_DIR}/PHY_INTERFACE)
set(NR_PHY_INTERFACE_DIR ${OPENAIR2_DIR}/NR_PHY_INTERFACE)
set(NR_UE_PHY_INTERFACE_DIR ${OPENAIR2_DIR}/NR_UE_PHY_INTERFACE)
set(RLC_DIR ${OPENAIR2_DIR}/LAYER2/RLC)
set(RLC_UM_DIR ${OPENAIR2_DIR}/LAYER2/RLC/UM_v9.3.0)
set(RLC_AM_DIR ${OPENAIR2_DIR}/LAYER2/RLC/AM_v9.3.0)
set(RLC_TM_DIR ${OPENAIR2_DIR}/LAYER2/RLC/TM_v9.3.0)
set(RRC_DIR ${OPENAIR2_DIR}/RRC/LTE)
set(NR_RRC_DIR ${OPENAIR2_DIR}/RRC/NR)
set(NR_UE_RRC_DIR ${OPENAIR2_DIR}/RRC/NR_UE)
set(PDCP_DIR ${OPENAIR2_DIR}/LAYER2/PDCP_v10.1.0)
set(L2_SRC
${OPENAIR2_DIR}/LAYER2/openair2_proc.c
@@ -1291,6 +1467,13 @@ set(L2_SRC
${RRC_DIR}/L2_interface_ue.c
)
set(L2_NR_SRC
${NR_RRC_DIR}/rrc_gNB.c
${NR_RRC_DIR}/nr_rrc_common.c
${NR_RRC_DIR}/L2_nr_interface.c
${NR_RRC_DIR}/nr_rrc_config.c
)
set(L2_SRC_UE
${PDCP_DIR}/pdcp.c
${PDCP_DIR}/pdcp_fifo.c
@@ -1332,6 +1515,20 @@ set(L2_SRC_UE
${RRC_DIR}/L2_interface_ue.c
)
set(NR_L2_SRC_UE
${NR_UE_RRC_DIR}/L2_interface_ue.c
${NR_UE_RRC_DIR}/main_ue.c
${NR_UE_RRC_DIR}/rrc_UE.c
# ${NR_UE_RRC_DIR}/mac_vars.c
#${RRC_DIR}/rrc_UE.c
)
set(L2_NR_SRC_UE
${NR_UE_RRC_DIR}/L2_interface_ue.c
${NR_UE_RRC_DIR}/main_ue.c
${NR_UE_RRC_DIR}/rrc_UE.c
)
set (MAC_SRC
#${PHY_INTERFACE_DIR}/phy_stub_UE.c
${PHY_INTERFACE_DIR}/IF_Module.c
@@ -1353,9 +1550,20 @@ set (MAC_SRC
${MAC_DIR}/eNB_scheduler_phytest.c
${MAC_DIR}/pre_processor.c
${MAC_DIR}/config.c
#${MAC_DIR}/config_ue.c
${MAC_DIR}/config_ue.c
)
set (MAC_NR_SRC
${NR_PHY_INTERFACE_DIR}/NR_IF_Module.c
${NR_MAC_DIR}/main.c
${NR_MAC_DIR}/config.c
${NR_MAC_DIR}/gNB_scheduler.c
${NR_MAC_DIR}/gNB_scheduler_bch.c
${NR_MAC_DIR}/gNB_scheduler_primitives.c
${NR_MAC_DIR}/gNB_scheduler_phytest.c
)
set (MAC_SRC_UE
${PHY_INTERFACE_DIR}/phy_stub_UE.c
${MAC_DIR}/main_ue.c
@@ -1364,26 +1572,90 @@ set (MAC_SRC_UE
${MAC_DIR}/l1_helpers.c
${MAC_DIR}/rar_tools_ue.c
${MAC_DIR}/config_ue.c
)
set (MAC_NR_SRC_UE
${NR_UE_PHY_INTERFACE_DIR}/NR_IF_Module.c
${NR_UE_MAC_DIR}/config_ue.c
${NR_UE_MAC_DIR}/mac_vars.c
${NR_UE_MAC_DIR}/main_ue_nr.c
${NR_UE_MAC_DIR}/nr_ue_procedures.c
)
set (ENB_APP_SRC
${OPENAIR2_DIR}/ENB_APP/enb_app.c
${OPENAIR2_DIR}/ENB_APP/enb_config.c
${OPENAIR2_DIR}/ENB_APP/RRC_config_tools.c
)
set (GNB_APP_SRC
${OPENAIR2_DIR}/GNB_APP/gnb_app.c
${OPENAIR2_DIR}/GNB_APP/gnb_config.c
)
add_library(L2
${L2_SRC}
${MAC_SRC}
${ENB_APP_SRC})
${ENB_APP_SRC}
)
# ${OPENAIR2_DIR}/RRC/L2_INTERFACE/openair_rrc_L2_interface.c)
add_library(L2_NR
${L2_NR_SRC}
${MAC_NR_SRC}
${GNB_APP_SRC}
)
add_library(L2_UE
${L2_SRC_UE}
${MAC_SRC_UE}
#${MAC_NR_SRC_UE}
)
include_directories(${NFAPI_USER_DIR})
add_library( NR_L2_UE
#${L2_SRC_UE}
${NR_L2_SRC_UE}
${MAC_NR_SRC_UE}
#${MAC_SRC_UE}
)
set ( NR_LTE_UE_REUSE_SRC
${OPENAIR1_DIR}/PHY/LTE_ESTIMATION/lte_sync_timefreq.c
${OPENAIR1_DIR}/SCHED/phy_procedures_lte_common.c
#${OPENAIR1_DIR}/SCHED_UE/phy_procedures_lte_ue.c
${OPENAIR1_DIR}/PHY/LTE_TRANSPORT/lte_mcs.c
${OPENAIR1_DIR}/PHY/LTE_TRANSPORT/pmch_common.c
${OPENAIR1_DIR}/PHY/LTE_REFSIG/lte_dl_cell_spec.c
${OPENAIR1_DIR}/PHY/CODING/lte_segmentation.c
${OPENAIR1_DIR}/PHY/LTE_TRANSPORT/prach_common.c
# ${OPENAIR1_DIR}/PHY/INIT/lte_init_ue.c
${OPENAIR1_DIR}/PHY/CODING/crc_byte.c
${OPENAIR1_DIR}/PHY/CODING/viterbi_lte.c
${OPENAIR1_DIR}/PHY/CODING/viterbi.c
${OPENAIR1_DIR}/PHY/LTE_TRANSPORT/phich_common.c
${OPENAIR1_DIR}/PHY/LTE_UE_TRANSPORT/dlsch_llr_computation.c
${OPENAIR1_DIR}/PHY/LTE_TRANSPORT/dci_tools_common.c
${OPENAIR1_DIR}/PHY/CODING/lte_rate_matching.c
${OPENAIR1_DIR}/PHY/CODING/ccoding_byte_lte.c
${OPENAIR1_DIR}/PHY/CODING/ccoding_byte.c
${OPENAIR1_DIR}/PHY/LTE_REFSIG/lte_gold.c
${OPENAIR1_DIR}/PHY/LTE_ESTIMATION/lte_est_freq_offset.c
${OPENAIR1_DIR}/PHY/LTE_ESTIMATION/lte_dl_channel_estimation.c
${OPENAIR1_DIR}/PHY/LTE_ESTIMATION/lte_ue_measurements.c
${OPENAIR1_DIR}/PHY/LTE_UE_TRANSPORT/dlsch_demodulation.c
#${OPENAIR1_DIR}/PHY/LTE_UE_TRANSPORT/dlsch_llr_computation_avx2.c
)
add_library( NR_LTE_UE_REUSE_LIB
${NR_LTE_UE_REUSE_SRC}
)
include_directories("${OPENAIR2_DIR}/NR_UE_PHY_INTERFACE")
include_directories("${OPENAIR2_DIR}/LAYER2/NR_MAC_UE")
include_directories("${OPENAIR1_DIR}/SCHED_NR_UE")
#include_directories("${NFAPI_USER_DIR}"")
# L3 Libs
##########################
@@ -2023,7 +2295,7 @@ add_executable(lte-uesoftmodem
target_link_libraries (lte-uesoftmodem
-Wl,--start-group
RRC_LIB S1AP_LIB S1AP_ENB X2AP_LIB X2AP_ENB GTPV1U SECU_CN SECU_OSA UTIL HASHTABLE SCTP_CLIENT UDP SCHED_RU_LIB SCHED_UE_LIB PHY_COMMON PHY_UE PHY_RU LFDS L2_UE SIMU
RRC_LIB SECU_CN SECU_OSA UTIL HASHTABLE SCTP_CLIENT UDP SCHED_RU_LIB SCHED_UE_LIB PHY_COMMON PHY_UE PHY_RU LFDS L2_UE SIMU
${MSC_LIB} ${RAL_LIB} ${NAS_UE_LIB} ${ITTI_LIB} ${FLPT_MSG_LIB} ${ASYNC_IF_LIB} LFDS7 ${ATLAS_LIBRARIES}
NFAPI_COMMON_LIB NFAPI_LIB NFAPI_PNF_LIB NFAPI_USER_LIB
-Wl,--end-group z dl)
@@ -2072,6 +2344,155 @@ target_link_libraries (lte-uesoftmodem-nos1 pthread m ${CONFIG_LIBRARIES} rt cry
target_link_libraries (lte-uesoftmodem-nos1 ${LIB_LMS_LIBRARIES})
target_link_libraries (lte-uesoftmodem-nos1 ${T_LIB})
# nr-softmodem
###################################################
add_executable(nr-softmodem
${rrc_h}
${nr_rrc_h}
${s1ap_h}
# ${OPENAIR_BIN_DIR}/messages_xml.h
${OPENAIR_TARGETS}/RT/USER/rt_wrapper.c
${OPENAIR_TARGETS}/RT/USER/nr-gnb.c
${OPENAIR_TARGETS}/RT/USER/nr-ru.c
${OPENAIR_TARGETS}/RT/USER/nr-softmodem.c
${OPENAIR1_DIR}/SIMULATION/TOOLS/taus.c
${OPENAIR_TARGETS}/COMMON/create_nr_tasks.c
${OPENAIR_TARGETS}/ARCH/COMMON/common_lib.c
${OPENAIR1_DIR}/SIMULATION/ETH_TRANSPORT/netlink_init.c
${OPENAIR_DIR}/common/utils/utils.c
${OPENAIR_DIR}/common/utils/system.c
${GTPU_need_ITTI}
${XFORMS_SOURCE}
${XFORMS_SOURCE_SOFTMODEM}
${T_SOURCE}
${CONFIG_SOURCES}
${SHLIB_LOADER_SOURCES}
)
target_link_libraries (nr-softmodem
-Wl,--start-group
UTIL HASHTABLE SCTP_CLIENT UDP SCHED_LIB SCHED_RU_LIB SCHED_NR_LIB PHY_NR PHY PHY_COMMON PHY_RU LFDS GTPV1U SECU_CN SECU_OSA
${ITTI_LIB} ${FLPT_MSG_LIB} ${ASYNC_IF_LIB} ${FLEXRAN_AGENT_LIB} LFDS7 ${MSC_LIB} ${RAL_LIB} ${NAS_UE_LIB}
RRC_LIB NR_RRC_LIB S1AP_LIB S1AP_ENB L2 L2_NR
NFAPI_COMMON_LIB NFAPI_LIB NFAPI_VNF_LIB NFAPI_PNF_LIB NFAPI_USER_LIB
-Wl,--end-group z dl)
target_link_libraries (nr-softmodem ${LIBXML2_LIBRARIES})
target_link_libraries (nr-softmodem pthread m ${CONFIG_LIBRARIES} rt crypt ${CRYPTO_LIBRARIES} ${OPENSSL_LIBRARIES} ${NETTLE_LIBRARIES} sctp ${XFORMS_LIBRARIES} ${PROTOBUF_LIB} ${CMAKE_DL_LIBS} ${LIBYAML_LIBRARIES} ${ATLAS_LIBRARIES})
target_link_libraries (nr-softmodem ${LIB_LMS_LIBRARIES})
target_link_libraries (nr-softmodem ${T_LIB})
# nr-softmodem-nos1
###################################################
add_executable(nr-softmodem-nos1
${rrc_h}
${s1ap_h}
# ${OPENAIR_BIN_DIR}/messages_xml.h
${OPENAIR_TARGETS}/RT/USER/rt_wrapper.c
${OPENAIR_TARGETS}/RT/USER/nr-gnb.c
${OPENAIR_TARGETS}/RT/USER/nr-ru.c
${OPENAIR_TARGETS}/RT/USER/nr-softmodem.c
${OPENAIR1_DIR}/SIMULATION/TOOLS/taus.c
${OPENAIR_TARGETS}/COMMON/create_tasks.c
${OPENAIR_TARGETS}/COMMON/create_nr_tasks.c
${OPENAIR_TARGETS}/ARCH/COMMON/common_lib.c
${OPENAIR2_DIR}/RRC/NAS/nas_config.c
${OPENAIR2_DIR}/RRC/NAS/rb_config.c
${OPENAIR1_DIR}/SIMULATION/ETH_TRANSPORT/netlink_init.c
${OPENAIR_DIR}/common/utils/utils.c
${OPENAIR_DIR}/common/utils/system.c
${GTPU_need_ITTI}
${XFORMS_SOURCE}
${XFORMS_SOURCE_SOFTMODEM}
${T_SOURCE}
${CONFIG_SOURCES}
${SHLIB_LOADER_SOURCES}
)
target_link_libraries (nr-softmodem-nos1
-Wl,--start-group
UTIL HASHTABLE SCTP_CLIENT UDP SCHED_LIB SCHED_RU_LIB SCHED_NR_LIB PHY_NR PHY PHY_COMMON PHY_RU LFDS GTPV1U SECU_CN SECU_OSA
${ITTI_LIB} ${FLPT_MSG_LIB} ${ASYNC_IF_LIB} ${FLEXRAN_AGENT_LIB} LFDS7 ${MSC_LIB} ${RAL_LIB} ${NAS_UE_LIB} ${MIH_LIB}
RRC_LIB NR_RRC_LIB S1AP_LIB S1AP_ENB L2 L2_NR
NFAPI_COMMON_LIB NFAPI_LIB NFAPI_VNF_LIB NFAPI_PNF_LIB NFAPI_USER_LIB
-Wl,--end-group z dl)
target_link_libraries (nr-softmodem-nos1 ${LIBXML2_LIBRARIES})
target_link_libraries (nr-softmodem-nos1 pthread m ${CONFIG_LIBRARIES} rt crypt ${CRYPTO_LIBRARIES} ${OPENSSL_LIBRARIES} ${NETTLE_LIBRARIES} sctp ${XFORMS_LIBRARIES} ${PROTOBUF_LIB} ${CMAKE_DL_LIBS} ${LIBYAML_LIBRARIES})
target_link_libraries (nr-softmodem-nos1 ${LIB_LMS_LIBRARIES})
target_link_libraries (nr-softmodem-nos1 ${T_LIB})
# nr-uesoftmodem is UE implementation
#######################################
add_executable(nr-uesoftmodem
${rrc_h}
${s1ap_h}
# ${OPENAIR_BIN_DIR}/messages_xml.h
${OPENAIR_TARGETS}/RT/USER/rt_wrapper.c
${OPENAIR_TARGETS}/RT/USER/nr-ue.c
${OPENAIR_TARGETS}/RT/USER/nr-uesoftmodem.c
${OPENAIR1_DIR}/SIMULATION/TOOLS/taus.c
# ${OPENAIR_TARGETS}/COMMON/create_tasks_ue.c
${OPENAIR_TARGETS}/ARCH/COMMON/common_lib.c
${OPENAIR1_DIR}/SIMULATION/ETH_TRANSPORT/netlink_init.c
${OPENAIR3_DIR}/NAS/UE/nas_ue_task.c
${OPENAIR_DIR}/common/utils/utils.c
${OPENAIR_DIR}/common/utils/system.c
${XFORMS_SOURCE}
${XFORMS_SOURCE_SOFTMODEM}
${T_SOURCE}
${CONFIG_SOURCES}
${SHLIB_LOADER_SOURCES}
)
target_link_libraries (nr-uesoftmodem
-Wl,--start-group
RRC_LIB NR_RRC_LIB SECU_CN SECU_OSA UTIL HASHTABLE SCTP_CLIENT UDP SCHED_RU_LIB SCHED_UE_LIB SCHED_NR_UE_LIB PHY_COMMON PHY_UE PHY_NR_UE PHY_RU LFDS NR_L2_UE #NR_LTE_UE_REUSE_LIB
${MSC_LIB} ${RAL_LIB} ${NAS_UE_LIB} ${ITTI_LIB} ${FLPT_MSG_LIB} ${ASYNC_IF_LIB} LFDS7 ${ATLAS_LIBRARIES}
-Wl,--end-group z dl)
target_link_libraries (nr-uesoftmodem ${LIBXML2_LIBRARIES})
target_link_libraries (nr-uesoftmodem pthread m ${CONFIG_LIBRARIES} rt crypt ${CRYPTO_LIBRARIES} ${OPENSSL_LIBRARIES} ${NETTLE_LIBRARIES} sctp ${XFORMS_LIBRARIES} ${PROTOBUF_LIB} ${CMAKE_DL_LIBS} ${LIBYAML_LIBRARIES} ${ATLAS_LIBRARIES})
target_link_libraries (nr-uesoftmodem ${LIB_LMS_LIBRARIES})
target_link_libraries (nr-uesoftmodem ${T_LIB})
# nr-uesoftmodem is UE implementation
#######################################
add_executable(nr-uesoftmodem-nos1
${rrc_h}
${s1ap_h}
# ${OPENAIR_BIN_DIR}/messages_xml.h
${OPENAIR_TARGETS}/RT/USER/rt_wrapper.c
${OPENAIR_TARGETS}/RT/USER/nr-ue.c
${OPENAIR_TARGETS}/RT/USER/nr-uesoftmodem.c
${OPENAIR1_DIR}/SIMULATION/TOOLS/taus.c
#${OPENAIR_TARGETS}/COMMON/create_tasks_ue.c
${OPENAIR_TARGETS}/ARCH/COMMON/common_lib.c
${OPENAIR1_DIR}/SIMULATION/ETH_TRANSPORT/netlink_init.c
${OPENAIR_DIR}/common/utils/utils.c
${OPENAIR_DIR}/common/utils/system.c
${XFORMS_SOURCE}
${XFORMS_SOURCE_SOFTMODEM}
${T_SOURCE}
${CONFIG_SOURCES}
${SHLIB_LOADER_SOURCES}
)
target_link_libraries (nr-uesoftmodem-nos1
-Wl,--start-group
RRC_LIB NR_RRC_LIB S1AP_LIB S1AP_ENB GTPV1U SECU_CN SECU_OSA UTIL HASHTABLE SCTP_CLIENT UDP SCHED_RU_LIB SCHED_UE_LIB SCHED_NR_UE_LIB PHY_COMMON PHY_NR_UE PHY_UE PHY_RU LFDS NR_L2_UE
${MSC_LIB} ${RAL_LIB} ${ITTI_LIB} ${FLPT_MSG_LIB} ${ASYNC_IF_LIB} LFDS7 ${ATLAS_LIBRARIES}
-Wl,--end-group z dl)
target_link_libraries (nr-uesoftmodem-nos1 ${LIBXML2_LIBRARIES})
target_link_libraries (nr-uesoftmodem-nos1 pthread m ${CONFIG_LIBRARIES} rt crypt ${CRYPTO_LIBRARIES} ${OPENSSL_LIBRARIES} ${NETTLE_LIBRARIES} sctp ${XFORMS_LIBRARIES} ${PROTOBUF_LIB} ${CMAKE_DL_LIBS} ${LIBYAML_LIBRARIES})
target_link_libraries (nr-uesoftmodem-nos1 ${LIB_LMS_LIBRARIES})
target_link_libraries (nr-uesoftmodem-nos1 ${T_LIB})
# USIM process
#################
#add_executable(usim
@@ -2114,6 +2535,12 @@ target_link_libraries (dlsim_tm4
pthread m rt ${CONFIG_LIBRARIES} ${ATLAS_LIBRARIES} ${XFORMS_LIBRARIES} ${T_LIB}
)
add_executable(polartest ${OPENAIR1_DIR}/PHY/CODING/TESTBENCH/polartest.c)
target_link_libraries(polartest m SIMU PHY PHY_NR PHY_COMMON -lm ${ATLAS_LIBRARIES})
add_executable(ldpctest ${OPENAIR1_DIR}/PHY/CODING/TESTBENCH/ldpctest.c)
target_link_libraries(ldpctest m SIMU PHY PHY_NR ${ATLAS_LIBRARIES})
foreach(myExe dlsim dlsim_tm7 ulsim pbchsim scansim mbmssim pdcchsim pucchsim prachsim syncsim)
add_executable(${myExe}
@@ -2193,16 +2620,69 @@ if (${T_TRACER})
foreach(i
#all "add_executable" definitions (except tests, rb_tool, updatefw)
lte-softmodem lte-softmodem-nos1 lte-uesoftmodem lte-uesoftmodem-nos1
nr-softmodem nr-softmodem-nos1 nr-uesoftmodem nr-uesoftmodem-nos1
dlsim_tm4 dlsim dlsim_tm7 ulsim pbchsim scansim mbmssim
pdcchsim pucchsim prachsim syncsim ulsim
ldpctest polartest
#all "add_library" definitions
ITTI RRC_LIB S1AP_LIB S1AP_ENB X2AP_LIB X2AP_ENB
oai_exmimodevif oai_usrpdevif oai_bladerfdevif oai_lmssdrdevif
oai_eth_transpro
FLPT_MSG ASYNC_IF FLEXRAN_AGENT HASHTABLE MSC UTIL OMG_SUMO SECU_OSA
SECU_CN SCHED_LIB PHY L2 default_sched remote_sched RAL CN_UTILS
GTPV1U SCTP_CLIENT UDP LIB_NAS_UE LFDS LFDS7 SIMU OPENAIR0_LIB PHY_MEX
coding)
ITTI
RRC_LIB
NR_RRC_LIB
S1AP_LIB
S1AP_ENB
X2AP_LIB
X2AP_ENB
params_libconfig
oai_exmimodevif
oai_usrpdevif
oai_bladerfdevif
oai_lmssdrdevif
oai_eth_transpro
oai_mobipass
tcp_bridge
tcp_bridge_oai
coding
FLPT_MSG
ASYNC_IF
FLEXRAN_AGENT
HASHTABLE
MSC
UTIL
SECU_OSA
SECU_CN
SCHED_LIB
SCHED_NR_LIB
SCHED_RU_LIB
SCHED_UE_LIB
SCHED_NR_UE_LIB
NFAPI_COMMON_LIB
NFAPI_LIB
NFAPI_PNF_LIB
NFAPI_VNF_LIB
NFAPI_USER_LIB
PHY_COMMON
PHY
PHY_UE
PHY_NR
PHY_NR_UE
PHY_RU
PHY_MEX
L2
L2_NR
L2_UE
NR_L2_UE
NR_LTE_UE_REUSE_LIB
CN_UTILS
GTPV1U
SCTP_CLIENT
UDP
LIB_NAS_UE
NB_IoT
LFDS
LFDS7
SIMU
SIMU_ETH
OPENAIR0_LIB)
if (TARGET ${i})
add_dependencies(${i} generate_T)
endif()
cmake_targets/autotests/test_case_list.xml
+43 -2
View File
@@ -955,7 +955,7 @@
<compile_prog_args> --phy_simulators -c </compile_prog_args>
<pre_exec>$OPENAIR_DIR/cmake_targets/autotests/tools/free_mem.bash</pre_exec>
<pre_exec_args></pre_exec_args>
<main_exec> $OPENAIR_DIR/targets/bin/dlsim.Rel14</main_exec>
<main_exec> $OPENAIR_DIR/targets/bin/dlsim.Rel15</main_exec>
<main_exec_args> -m5 -gF -s-1 -w1.0 -f.2 -n500 -B50 -c2 -z2 -O60
-m4 -gF -s0 -w1.0 -f.2 -n500 -B6 -c4 -z2 -O60
-m15 -gF -s6.7 -w1.0 -f.2 -n500 -B50 -c2 -z2 -O60
@@ -989,7 +989,7 @@
<compile_prog_args> --phy_simulators -c </compile_prog_args>
<pre_exec>$OPENAIR_DIR/cmake_targets/autotests/tools/free_mem.bash</pre_exec>
<pre_exec_args></pre_exec_args>
<main_exec> $OPENAIR_DIR/targets/bin/ulsim.Rel14</main_exec>
<main_exec> $OPENAIR_DIR/targets/bin/ulsim.Rel15</main_exec>
<main_exec_args> -BnbRBs=25 -mcs=5 -yN_rx=1 -gchannel=N -xTransmission=1 -snr=6 -wsnrInterrupt=1.0 -e_snr_step=.1 -P -nb_frame=500 -Operf=70
-BnbRBs=25 -mcs=16 -yN_rx=1 -gchannel=N -xTransmission=1 -snr=12 -wsnrInterrupt=1.0 -e_snr_step=.1 -P -nb_frame=500 -Operf=70
-BnbRBs=50 -mcs=5 -yN_rx=1 -gchannel=N -xTransmission=1 -snr=6 -wsnrInterrupt=1.0 -e_snr_step=.1 -P -nb_frame=500 -Operf=70
@@ -1002,6 +1002,47 @@
<nruns>3</nruns>
</testCase>
<testCase id="015102">
<class>execution</class>
<desc>ldpctest test cases.</desc>
<pre_compile_prog></pre_compile_prog>
<compile_prog>$OPENAIR_DIR/cmake_targets/build_oai</compile_prog>
<compile_prog_args> --phy_simulators -c </compile_prog_args>
<pre_exec>$OPENAIR_DIR/cmake_targets/autotests/tools/free_mem.bash</pre_exec>
<pre_exec_args></pre_exec_args>
<main_exec> $OPENAIR_DIR/targets/bin/ldpctest.Rel15</main_exec>
<main_exec_args>-l3872 -s10 -n100
-l4224 -s10 -n100
-l4576 -s10 -n100
-l4928 -s10 -n100
-l5280 -s10 -n100
-l5632 -s10 -n100
-l6336 -s10 -n100
-l7040 -s10 -n100
-l7744 -s10 -n100
-l8448 -s10 -n100</main_exec_args>
<tags>ldpctest.test1</tags>
<search_expr_true>BLER 0.000000</search_expr_true>
<search_expr_false>segmentation fault|assertion|exiting|fatal</search_expr_false>
<nruns>3</nruns>
</testCase>
<testCase id="015103">
<class>execution</class>
<desc>polartest test cases.</desc>
<pre_compile_prog></pre_compile_prog>
<compile_prog>$OPENAIR_DIR/cmake_targets/build_oai</compile_prog>
<compile_prog_args> --phy_simulators -c </compile_prog_args>
<pre_exec>$OPENAIR_DIR/cmake_targets/autotests/tools/free_mem.bash</pre_exec>
<pre_exec_args></pre_exec_args>
<main_exec> $OPENAIR_DIR/targets/bin/polartest.Rel15</main_exec>
<main_exec_args>-q -s-10 -f0</main_exec_args>
<tags>polartest.test1</tags>
<search_expr_true>BLER= 0.000000</search_expr_true>
<search_expr_false>segmentation fault|assertion|exiting|fatal</search_expr_false>
<nruns>3</nruns>
</testCase>
<testCase id="015110">
<class>execution</class>
<desc>dlsim_tm4 test cases (Test 1: 10 MHz, R2.FDD (MCS 5), EVA5, -1dB),
cmake_targets/build_oai
+167 -56
View File
@@ -48,10 +48,12 @@ VCD_TIMING="False"
DEADLINE_SCHEDULER_FLAG_USER="False"
FORCE_DEADLINE_SCHEDULER_FLAG_USER=""
CPU_AFFINITY_FLAG_USER="False" #Only valid when lowlatecy flag is set to False
REL="Rel14"
REL="Rel15"
NR_REL="NR_Rel15"
HW="None"
TP="None"
NOS1=0
HW_LATENCY=0
EPC=0
VERBOSE_COMPILE=0
CFLAGS_PROCESSOR_USER=""
@@ -68,6 +70,7 @@ UE_TIMING_TRACE="False"
DISABLE_LOG_X="False"
USRP_REC_PLAY="False"
BUILD_ECLIPSE=0
NR="False"
UE_NAS_USE_TUN="False"
BASIC_SIMULATOR=0
trap handle_ctrl_c INT
@@ -95,19 +98,25 @@ Options
-h | --help
Print this help
--eNB
Makes the LTE softmodem
Makes the LTE softmodem
--gNB
Makes the NR softmodem
--nrUE
Makes the NR UE softmodem
--UE
Makes the UE specific parts (ue_ip, usim, nvram) from the given configuration file
--UE-conf-nvram [configuration file]
Specify conf_nvram_path (default \"$conf_nvram_path\")
--UE-gen-nvram [output path]
Specify gen_nvram_path (default \"$gen_nvram_path\")
--HWLAT
Makes test program for haw latency tests
-r | --3gpp-release
default is Rel14,
Rel8 limits the implementation to 3GPP Release 8 version
Rel10 limits the implementation to 3GPP Release 10 version
-w | --hardware
EXMIMO, USRP, BLADERF, ETHERNET, LMSSDR, None (Default)
EXMIMO, USRP, BLADERF, ETHERNET, LMSSDR, ADRV9371_ZC706, None (Default)
Adds this RF board support (in external packages installation and in compilation)
-t | --transport protocol
ETHERNET , None
@@ -207,13 +216,23 @@ function main() {
eNB=1
echo_info "Will compile eNB"
shift;;
--gNB)
gNB=1
NR="True"
echo_info "Will compile gNB"
shift;;
-a | --agent)
echo_info "FlexRAN support is always compiled into the eNB"
shift;;
echo_info "FlexRAN support is always compiled into the eNB"
shift;;
--UE)
UE=1
echo_info "Will compile UE"
shift;;
--nrUE)
nrUE=1
NR="True"
echo_info "Will compile NR UE"
shift;;
--mu)
UE_EXPANSION="True"
echo_info "Will compile with UE_EXPANSION"
@@ -230,13 +249,16 @@ function main() {
shift 2;;
-w | --hardware)
HW="$2" #"${i#*=}"
# Use OAI_USRP as the key word USRP is used inside UHD driver
if [ "$HW" != "BLADERF" -a "$HW" != "USRP" -a "$HW" != "LMSSDR" -a "$HW" != "None" -a "$HW" != "EXMIMO" ] ; then
# Use OAI_USRP as the key word USRP is used inside UHD driver
if [ "$HW" != "BLADERF" -a "$HW" != "USRP" -a "$HW" != "LMSSDR" -a "$HW" != "None" -a "$HW" != "EXMIMO" -a "$HW" != "ADRV9371_ZC706" ] ; then
echo_fatal "Unknown HW type $HW will exit..."
else
if [ "$HW" == "USRP" ] ; then
HW="OAI_USRP"
fi
if [ "$HW" == "ADRV9371_ZC706" ] ; then
HW="OAI_ADRV9371_ZC706"
fi
if [ "$HW" == "BLADERF" ] ; then
HW="OAI_BLADERF"
fi
@@ -289,6 +311,14 @@ function main() {
NOS1=1
echo_info "Will compile without S1 interface"
shift;;
--HWLAT)
HWLAT=1
echo_info "Will compile hw latency test program"
shift;;
--HWLAT_TEST)
HWLAT_TEST=1
echo_info "Will compile hw latency test program"
shift;;
--verbose-compile)
VERBOSE_COMPILE=1
echo_info "Will compile with verbose instructions"
@@ -378,17 +408,18 @@ function main() {
CMAKE_CMD="$CMAKE_CMD .."
echo_info "CMAKE_CMD=$CMAKE_CMD"
if [ "$eNB" = "1" ] && [ "$UE" = "1" ]; then
echo_error "Cannot build UE and eNB on one build_oai execution"
if [ "$eNB" = "1" -o "$gNB" = "1" ] && [ "$UE" = "1" -o "$nrUE" = "1" ]; then
echo_error "Cannot build UE/nrUE and eNB/gNB on one build_oai execution"
echo_error "use 2 build_oai invocations"
exit
fi
fi
#########################################################
# check validity of HW and TP parameters for eNB
# check validity of HW and TP parameters for eNB / gNB
#########################################################
# to be discussed
if [ "$eNB" = "1" ] ; then
if [ "$eNB" = "1" -o "$gNB" = "1" ] ; then
if [ "$HW" = "None" -a "$TP" = "None" ] ; then
echo_fatal "Define a local radio head (e.g. -w EXMIMO) or a transport protocol (e.g. -t ETHERNET) to communicate with a remote radio head!"
fi
@@ -400,6 +431,12 @@ function main() {
fi
fi
if [ "$HWLAT" = "1" ] ; then
if [ "$HW" = "None" ] ; then
echo_info "No radio head has been selected (HW set to $HW)"
fi
fi
echo_info "RF HW set to $HW"
#Now we set flags to enable deadline scheduler settings
#By default: USRP: disable,
@@ -412,6 +449,8 @@ function main() {
DEADLINE_SCHEDULER_FLAG_USER="False"
elif [ "$HW" = "OAI_USRP" ] ; then
DEADLINE_SCHEDULER_FLAG_USER="False"
elif [ "$HW" = "OAI_ADRV9371_ZC706" ] ; then
DEADLINE_SCHEDULER_FLAG_USER="False"
elif [ "$HW" = "OAI_BLADERF" ] ; then
DEADLINE_SCHEDULER_FLAG_USER="False"
elif [ "$HW" = "OAI_LMSSDR" ] ; then
@@ -477,6 +516,10 @@ function main() {
install_usrp_uhd_driver $UHD_IMAGES_DIR
fi
fi
if [ "$HW" == "OAI_ADRV9371_ZC706" ] ; then
echo_info "\nInstalling packages for ADRV9371_ZC706 support"
check_install_libiio_driver
fi
if [ "$HW" == "OAI_BLADERF" ] ; then
echo_info "installing packages for BLADERF support"
check_install_bladerf_driver
@@ -499,22 +542,28 @@ function main() {
echo_info "3. building the compilation directives ..."
DIR=$OPENAIR_DIR/cmake_targets
if [ "$NOS1" = "1" ] ; then
lte_build_dir=lte_noS1_build_oai
if [ "$eNB" = "1" ] ; then
lte_exec=lte-softmodem-nos1
fi
if [ "$UE" = "1" ] ; then
lte_exec=lte-uesoftmodem-nos1
fi
if [ "$NOS1" = "1" ] ; then
build_dir=noS1_ran_build
if [ "$gNB" = "1" ] ; then
exec=nr-softmodem-nos1
elif [ "$nrUE" = "1" ] ; then
exec=nr-uesoftmodem-nos1
elif [ "$eNB" = "1" ] ; then
exec=lte-softmodem-nos1
elif [ "$UE" = "1" ] ; then
exec=lte-uesoftmodem-nos1
fi
else
lte_build_dir=lte_build_oai
if [ "$eNB" = "1" ] ; then
lte_exec=lte-softmodem
fi
if [ "$UE" = "1" ] ; then
lte_exec=lte-uesoftmodem
fi
build_dir=ran_build
if [ "$gNB" = "1" ] ; then
exec=nr-softmodem
elif [ "$nrUE" = "1" ] ; then
exec=nr-uesoftmodem
elif [ "$eNB" = "1" ] ; then
exec=lte-softmodem
elif [ "$UE" = "1" ] ; then
exec=lte-uesoftmodem
fi
fi
if [ "$T_TRACER" = "False" ] ; then
lte_build_dir=${lte_build_dir}_noLOG
@@ -523,15 +572,15 @@ function main() {
config_libconfig_shlib=params_libconfig
# first generate the CMakefile in the right directory
if [ "$eNB" = "1" -o "$UE" = "1" -o "$HW" = "EXMIMO" ] ; then
if [ "$eNB" = "1" -o "$UE" = "1" -o "$gNB" = "1" -o "$nrUE" = "1" -o "$HW" = "EXMIMO" ] ; then
# LTE softmodem compilation
[ "$CLEAN" = "1" ] && rm -rf $DIR/$lte_build_dir/build
mkdir -p $DIR/$lte_build_dir/build
cmake_file=$DIR/$lte_build_dir/CMakeLists.txt
# softmodem compilation
[ "$CLEAN" = "1" ] && rm -rf $DIR/$build_dir/build
mkdir -p $DIR/$build_dir/build
cmake_file=$DIR/$build_dir/CMakeLists.txt
echo "cmake_minimum_required(VERSION 2.8)" > $cmake_file
if [ "$NOS1" = "1" ] ; then
cat $DIR/$lte_build_dir/CMakeLists.template >> $cmake_file
cat $DIR/$build_dir/CMakeLists.template >> $cmake_file
fi
echo "set ( CMAKE_BUILD_TYPE $CMAKE_BUILD_TYPE )" >> $cmake_file
echo "set ( CFLAGS_PROCESSOR_USER \"$CFLAGS_PROCESSOR_USER\" )" >> $cmake_file
@@ -540,10 +589,11 @@ function main() {
# echo "set ( PHY_TX_THREAD $UE_EXPANSION )" >> $cmake_file
echo "set ( PRE_SCD_THREAD $UE_EXPANSION )" >> $cmake_file
echo "set ( RRC_ASN1_VERSION \"${REL}\")" >> $cmake_file
echo "set ( NR_RRC_ASN1_VERSION \"${NR_REL}\")" >> $cmake_file
echo "set ( ENABLE_VCD_FIFO $VCD_TIMING )" >> $cmake_file
echo "set ( RF_BOARD \"${HW}\")" >> $cmake_file
echo "set ( TRANSP_PRO \"${TP}\")" >> $cmake_file
echo "set(PACKAGE_NAME \"${lte_exec}\")" >> $cmake_file
echo "set(PACKAGE_NAME \"${exec}\")" >> $cmake_file
echo "set (DEADLINE_SCHEDULER \"${DEADLINE_SCHEDULER_FLAG_USER}\" )" >>$cmake_file
echo "set (CPU_AFFINITY \"${CPU_AFFINITY_FLAG_USER}\" )" >>$cmake_file
echo "set ( T_TRACER $T_TRACER )" >> $cmake_file
@@ -558,30 +608,30 @@ function main() {
echo "set (PDCP_USE_NETLINK True )" >> $cmake_file
fi
echo 'include(${CMAKE_CURRENT_SOURCE_DIR}/../CMakeLists.txt)' >> $cmake_file
cd $DIR/$lte_build_dir/build
cd $DIR/$build_dir/build
eval $CMAKE_CMD
fi
if [ "$eNB" = "1" -o "$UE" = "1" ] ; then
echo_info "Compiling $lte_exec"
if [ "$eNB" = "1" -o "$UE" = "1" -o "$gNB" = "1" -o "$nrUE" = "1" ] ; then
echo_info "Compiling $exec"
compilations \
$lte_build_dir $lte_exec \
$lte_exec $dbin/$lte_exec.$REL
$build_dir $exec \
$exec $dbin/$exec.$REL
# mandatory shared lib
compilations \
$lte_build_dir $config_libconfig_shlib \
$build_dir $config_libconfig_shlib \
lib$config_libconfig_shlib.so $dbin/lib$config_libconfig_shlib.so
compilations \
$lte_build_dir coding \
$build_dir coding \
libcoding.so $dbin/libcoding.so
if [ "$NOS1" = "1" ] ; then
compilations \
$lte_build_dir nasmesh \
$build_dir nasmesh \
CMakeFiles/nasmesh/nasmesh.ko $dbin/nasmesh.ko
compilations \
$lte_build_dir rb_tool \
$build_dir rb_tool \
rb_tool $dbin/rb_tool
cp $OPENAIR_DIR/cmake_targets/tools/init_nas_nos1 $dbin
fi
@@ -591,7 +641,7 @@ function main() {
# ue_ip driver compilation
echo_info "Compiling UE specific part"
compilations \
$lte_build_dir ue_ip \
$build_dir ue_ip \
CMakeFiles/ue_ip/ue_ip.ko $dbin/ue_ip.ko
# mkdir -p $DIR/at_commands/build
@@ -619,10 +669,10 @@ function main() {
# generate USIM data
if [ -f $dbin/conf2uedata ]; then
install_nas_tools $conf_nvram_path $gen_nvram_path
echo_info "Copying UE specific part to $DIR/$lte_build_dir/build"
cp -Rvf $dbin/.ue_emm.nvram0 $DIR/$lte_build_dir/build
cp -Rvf $dbin/.ue.nvram0 $DIR/$lte_build_dir/build
cp -Rvf $dbin/.usim.nvram0 $DIR/$lte_build_dir/build
echo_info "Copying UE specific part to $DIR/$build_dir/build"
cp -Rvf $dbin/.ue_emm.nvram0 $DIR/$build_dir/build
cp -Rvf $dbin/.ue.nvram0 $DIR/$build_dir/build
cp -Rvf $dbin/.usim.nvram0 $DIR/$build_dir/build
else
echo_warning "not generated UE NAS files: binaries not found"
fi
@@ -642,7 +692,7 @@ function main() {
echo_info "Compiling unitary tests simulators"
# TODO: fix: dlsim_tm4 pucchsim prachsim pdcchsim pbchsim mbmssim
#simlist="dlsim_tm4 dlsim ulsim pucchsim prachsim pdcchsim pbchsim mbmssim"
simlist="dlsim ulsim"
simlist="dlsim ulsim polartest ldpctest"
for f in $simlist ; do
compilations \
lte-simulators $f \
@@ -672,14 +722,14 @@ function main() {
echo_info "Compiling Express MIMO 2 board drivers"
compilations \
$lte_build_dir openair_rf \
$build_dir openair_rf \
CMakeFiles/openair_rf/openair_rf.ko $dbin/openair_rf.ko
compilations \
$lte_build_dir updatefw \
$build_dir updatefw \
updatefw $dbin/updatefw
echo_info "Compiling oarf tools. The logfile for compilation is here: $dlog/oarf.txt"
make -C $OPENAIR_DIR/cmake_targets/$lte_build_dir/build oarf > $dlog/oarf.txt 2>&1
cp $OPENAIR_DIR/cmake_targets/$lte_build_dir/build/*.oct $dbin
make -C $OPENAIR_DIR/cmake_targets/$build_dir/build oarf > $dlog/oarf.txt 2>&1
cp $OPENAIR_DIR/cmake_targets/$build_dir/build/*.oct $dbin
if [ -s $dbin/oarf_config_exmimo.oct ] ; then
echo_success "oarf tools compiled"
else
@@ -693,7 +743,7 @@ function main() {
# Telnet server compilation
#####################
if [ "$BUILD_TELNETSRV" = "1" ] ; then
build_dir=$lte_build_dir
build_dir=$build_dir
compilations \
$build_dir telnetsrv \
libtelnetsrv.so $dbin/libtelnetsrv.so
@@ -708,11 +758,67 @@ function main() {
libmsc.so $dbin/libmsc.so
fi
# HWLAT compilation
#####################
if [ "$HWLAT" = "1" ] ; then
hwlat_exec=lte-hwlat
hwlat_build_dir=lte-hwlat
echo_info "Compiling $hwlat_exec ..."
[ "$CLEAN" = "1" ] && rm -rf $DIR/lte-hwlat/build
mkdir -p $DIR/$hwlat_build_dir/build
cmake_file=$DIR/$hwlat_build_dir/CMakeLists.txt
echo "cmake_minimum_required(VERSION 2.8)" > $cmake_file
echo "set ( CMAKE_BUILD_TYPE $CMAKE_BUILD_TYPE )" >> $cmake_file
echo "set ( RF_BOARD \"${HW}\")" >> $cmake_file
echo 'set ( PACKAGE_NAME "\"lte-hwlat\"")' >> $cmake_file
echo "set ( DEADLINE_SCHEDULER \"${DEADLINE_SCHEDULER_FLAG_USER}\" )" >>$cmake_file
echo "set ( CPU_AFFINITY \"${CPU_AFFINITY_FLAG_USER}\" )" >>$cmake_file
echo "set ( HWLAT \"${HWLAT}\" )" >>$cmake_file
echo 'include(${CMAKE_CURRENT_SOURCE_DIR}/../CMakeLists.txt)' >> $cmake_file
cd $DIR/$hwlat_build_dir/build
cmake ..
compilations \
lte-hwlat lte-hwlat \
lte-hwlat $dbin/lte-hwlat
fi
# HWLAT_TEST compilation
#####################
if [ "$HWLAT_TEST" = "1" ] ; then
hwlat_test_exec=lte-hwlat-test
hwlat_test_build_dir=lte-hwlat-test
echo_info "Compiling $hwlat_test_exec ..."
[ "$CLEAN" = "1" ] && rm -rf $DIR/lte-hwlat-test/build
mkdir -p $DIR/$hwlat_test_build_dir/build
cmake_file=$DIR/$hwlat_test_build_dir/CMakeLists.txt
echo "cmake_minimum_required(VERSION 2.8)" > $cmake_file
echo "set ( CMAKE_BUILD_TYPE $CMAKE_BUILD_TYPE )" >> $cmake_file
echo "set ( RF_BOARD \"${HW}\")" >> $cmake_file
echo 'set ( PACKAGE_NAME "\"lte-hwlat-test\"")' >> $cmake_file
echo "set ( DEADLINE_SCHEDULER \"${DEADLINE_SCHEDULER_FLAG_USER}\" )" >>$cmake_file
echo "set ( CPU_AFFINITY \"${CPU_AFFINITY_FLAG_USER}\" )" >>$cmake_file
echo "set ( HWLAT \"${HWLAT}\" )" >>$cmake_file
echo 'include(${CMAKE_CURRENT_SOURCE_DIR}/../CMakeLists.txt)' >> $cmake_file
cd $DIR/$hwlat_test_build_dir/build
cmake ..
compilations \
lte-hwlat-test lte-hwlat-test \
lte-hwlat-test $dbin/lte-hwlat-test
fi
# build RF device and transport protocol libraries
#####################################
if [ "$eNB" = "1" -o "$UE" = "1" ] ; then
if [ "$eNB" = "1" -o "$UE" = "1" -o "$gNB" = "1" -o "$nrUE" = "1" -o "$HWLAT" = "1" ] ; then
build_dir=$lte_build_dir
build_dir=$build_dir
# build RF device libraries
if [ "$HW" != "None" ] ; then
@@ -728,6 +834,11 @@ function main() {
ln -sf liboai_exmimodevif.so liboai_device.so
ln -sf $dbin/liboai_exmimodevif.so.$REL $dbin/liboai_device.so
echo_info "liboai_device.so is linked to EXMIMO device library"
elif [ "$HW" == "OAI_ADRV9371_ZC706" ] ; then
ln -sf $OPENAIR_DIR/targets/ARCH/ADRV9371_ZC706/slib/libadrv9371_zc706.so liboai_device.so
echo_info "liboai_device.so is linked to ADRV9371_ZC706 device library"
elif [ "$HW" == "OAI_USRP" ] ; then
compilations \
$build_dir oai_usrpdevif \
cmake_targets/noS1_ran_build/CMakeLists.template
+61
View File
@@ -0,0 +1,61 @@
set ( DEBUG_OMG False )
set ( DISABLE_XER_PRINT False )
set ( DRIVER2013 True )
set ( ENABLE_ITTI True )
set ( ENABLE_NAS_UE_LOGGING False )
set ( ENABLE_NEW_MULTICAST True )
set ( ENABLE_RAL False )
set ( ENABLE_SECURITY False )
set ( ENABLE_STANDALONE_EPC False)
set ( ENABLE_USE_CPU_EXECUTION_TIME True )
set ( ENABLE_USE_MME False )
set ( ENABLE_USE_RAW_SOCKET_FOR_SGI False)
set ( ENABLE_VCD_FIFO False )
set ( ENB_MODE True )
set ( EXMIMO_IOT True )
set ( JUMBO_FRAME True )
set ( LARGE_SCALE False )
set ( LINK_ENB_PDCP_TO_GTPV1U False)
set ( LINUX_LIST False )
set ( LINUX True )
set ( LOCALIZATION False )
set ( LOG_NO_THREAD 1 )
set ( DEADLINE_SCHEDULER False )
set ( MAC_CONTEXT 1 )
set ( MAX_NUM_CCs 1 )
set ( MESSAGE_CHART_GENERATOR False )
set ( MESSAGE_CHART_GENERATOR_RLC_MAC False )
set ( MESSAGE_CHART_GENERATOR_PHY False )
set ( MSG_PRINT False )
set ( MU_RECEIVER False )
set ( NAS_ADDRESS_FIX False )
set ( NAS_BUILT_IN_UE False)
set ( NAS_MME False )
set ( NAS_UE False )
set ( NB_ANTENNAS_RX "2" )
set ( NB_ANTENNAS_TX "2" )
set ( NO_RRM True )
set ( OAISIM False )
set ( OAI_NW_DRIVER_TYPE_ETHERNET False )
set ( OAI_NW_DRIVER_USE_NETLINK True )
set ( OPENAIR2 True )
set ( OPENAIR_LTE True )
set ( PACKAGE_NAME "nr-softmodem-nos1" )
set ( PDCP_USE_NETLINK True )
set ( PDCP_MSG_PRINT False )
set ( PHY_CONTEXT False )
set ( PHY_EMUL False )
set ( PHYSIM True )
set ( RF_BOARD "False" )
set ( RRC_ASN1_VERSION "Rel15" )
set ( RLC_STOP_ON_LOST_PDU False )
set ( RRC_MSG_PRINT False )
set ( SECU False )
set ( SMBV False )
set ( TEST_OMG False )
set ( USE_3GPP_ADDR_AS_LINK_ADDR False )
set ( USE_MME "R10" )
set ( XER_PRINT False )
set ( DEBUG_PHY False )
set ( DEBUG_PHY_PROC False)
set ( DEBUG_DLSCH False)
cmake_targets/tools/build_helper
+3 -3
View File
@@ -293,7 +293,7 @@ check_install_usrp_uhd_driver(){
$SUDO apt-get -y --allow-unauthenticated install libuhd-dev libuhd003 uhd-host
elif [[ "$OS_BASEDISTRO" == "fedora" ]]; then
$SUDO $INSTALLER -y install python boost libusb-devel libusbx-devel boost-devel python-mako python-docutils cmake
$SUDO pip install requests
$SUDO -H pip install requests
if [[ "$OS_DISTRO" == "rhel" ]] || [[ "$OS_DISTRO" == "centos" ]]; then
# until EPEL repo hasn't bumped UHD driver to >=3.10 in EPEL, build driver from source
$SUDO $INSTALLER -y remove uhd uhd-devel uhd-firmware
@@ -476,8 +476,8 @@ check_install_additional_tools (){
#The packages below are already installed for Redhat distros (RHEL, CentOS, Fedora)
if [[ "$OS_DISTRO" == "ubuntu" ]]; then
$SUDO pip install paramiko
$SUDO pip install pyroute2 colorama
$SUDO -H pip install paramiko
$SUDO -H pip install pyroute2 colorama
log_netiface=$OPENAIR_DIR/cmake_targets/log/netiface_install_log.txt
echo_info "Installing Netinterfaces package. The logfile for installation is in $log_netiface"
(
cmake_targets/tools/fix_asn1
+25 -1
View File
@@ -94,7 +94,7 @@ function patch_rrc()
case "$version" in
Rel14 )
echo "patching RRC files release 14"
apply_patches "$directory" RRC_Rel14 ${#RRC_Rel14[*]}
#apply_patches "$directory" RRC_Rel14 ${#RRC_Rel14[*]}
;;
Rel10 )
echo "patching RRC files release 10"
@@ -109,12 +109,31 @@ function patch_rrc()
esac
}
function patch_nr_rrc()
{
local directory="$1"
local version="$2"
case "$version" in
NR_Rel15 )
echo "patching NR_RRC files release 15"
apply_patches "$directory" NR_RRC_Rel15 ${#NR_RRC_Rel15[*]}
;;
* )
error unknwon/unhandled NR_RRC version \'"$version"\'
;;
esac
}
function patch_x2ap()
{
local directory="$1"
local version="$2"
case "$version" in
R14 )
;;
R11 )
echo "patching X2AP files release 11.2"
apply_patches "$directory" X2AP_Rel11_2 ${#X2AP_Rel11_2[*]}
@@ -131,6 +150,8 @@ function patch_s1ap()
local version="$2"
case "$version" in
R14 )
;;
R10 )
#nothing to do anymore (fixes went to asn1c)
;;
@@ -161,6 +182,9 @@ function main()
RRC )
patch_rrc "$directory" "$version"
;;
NR_RRC )
patch_nr_rrc "$directory" "$version"
;;
X2AP )
patch_x2ap "$directory" "$version"
;;
cmake_targets/tools/generate_asn1
+39 -3
View File
@@ -6,9 +6,11 @@ mkdir -p $1
cd $1
shift
local module="$2"
#if this script is called with only 2 arguments (so 1 here after the shift), it's for RRC
#(there may be a better way...)
if [ $# -eq 1 ]; then
if [ $# -eq 2 ]; then
#asn1c does not work well with extension groups, we need the following fix:
# replace [[ by '<name> SEQUENCE {'
@@ -99,7 +101,25 @@ echo done with asnfix
echo running asn1c
asn1c -gen-PER -fcompound-names fixed_grammar.asn 2>&1 | grep -v -- '->' | grep -v '^Compiled' |grep -v sample
case "$module" in
RRC )
asn1c -gen-PER -fcompound-names -no-gen-example fixed_grammar.asn 2>&1 | grep -v -- '->' | grep -v '^Compiled' |grep -v sample
;;
NR_RRC )
export ASN1C_PREFIX=NR_
asn1c -gen-PER -fcompound-names -findirect-choice -no-gen-example fixed_grammar.asn 2>&1 | grep -v -- '->' | grep -v '^Compiled' |grep -v sample
;;
S1AP )
export ASN1C_PREFIX=S1AP_
asn1c -gen-PER -fcompound-names -no-gen-example fixed_grammar.asn 2>&1 | grep -v -- '->' | grep -v '^Compiled' |grep -v sample
;;
X2AP )
export ASN1C_PREFIX=X2AP_
asn1c -gen-PER -fcompound-names -no-gen-example fixed_grammar.asn 2>&1 | grep -v -- '->' | grep -v '^Compiled' |grep -v sample
;;
esac
rm -f fixed_grammar.asn
@@ -107,7 +127,23 @@ echo asn1c done
else
asn1c -gen-PER -fcompound-names $* 2>&1 | grep -v -- '->' | grep -v '^Compiled' |grep -v sample
case "$module" in
RRC )
asn1c -pdu=all -fcompound-names -gen-PER -no-gen-OER -no-gen-example $* 2>&1 | grep -v -- '->' | grep -v '^Compiled' |grep -v sample
;;
NR_RRC )
export ASN1C_PREFIX=NR_
asn1c -fcompound-names -findirect-choice -fno-include-deps -gen-PER -no-gen-OER -no-gen-example $* 2>&1 | grep -v -- '->' | grep -v '^Compiled' |grep -v sample
;;
S1AP )
export ASN1C_PREFIX=S1AP_
asn1c -fcompound-names -fno-include-deps -gen-PER -no-gen-OER -no-gen-example $* 2>&1 | grep -v -- '->' | grep -v '^Compiled' |grep -v sample
;;
X2AP )
export ASN1C_PREFIX=X2AP_
asn1c -fcompound-names -fno-include-deps -gen-PER -no-gen-OER -no-gen-example $* 2>&1 | grep -v -- '->' | grep -v '^Compiled' |grep -v sample
;;
esac
fi
common/ran_context.h
+23 -3
View File
@@ -38,7 +38,6 @@
#include "PHY/defs_eNB.h"
#include "PHY/types.h"
#include "PHY/impl_defs_top.h"
#include "PHY/impl_defs_lte.h"
#include "RRC/LTE/rrc_defs.h"
#include "flexran_agent_defs.h"
@@ -50,43 +49,64 @@
#include "PHY/defs_L1_NB_IoT.h"
#include "RRC/LTE/defs_NB_IoT.h"
#include "RRC/NR/nr_rrc_defs.h"
typedef struct {
/// RAN context config file name
char *config_file_name;
/// Number of RRC instances in this node
int nb_inst;
/// Number of NB_IoT RRC instances in this node
int nb_nb_iot_rrc_inst;
/// Number of NR RRC instances in this node
int nb_nr_inst;
/// Number of Component Carriers per instance in this node
int *nb_CC;
/// Number of NB_IoT instances in this node
int nb_nb_iot_rrc_inst;
/// Number of NR Component Carriers per instance in this node
int *nb_nr_CC;
/// Number of MACRLC instances in this node
int nb_macrlc_inst;
/// Number of NB_IoT MACRLC instances in this node
int nb_nb_iot_macrlc_inst;
/// Number of NR MACRLC instances in this node
int nb_nr_macrlc_inst;
/// Number of component carriers per instance in this node
int *nb_mac_CC;
/// Number of component carriers per instance in this node
int *nb_nr_mac_CC;
/// Number of L1 instances in this node
int nb_L1_inst;
/// Number of NB_IoT L1 instances in this node
int nb_nb_iot_L1_inst;
/// Number of NR L1 instances in this node
int nb_nr_L1_inst;
/// Number of Component Carriers per instance in this node
int *nb_L1_CC;
/// Number of NR Component Carriers per instance in this node
int *nb_nr_L1_CC;
/// Number of RU instances in this node
int nb_RU;
/// FlexRAN context variables
flexran_agent_info_t **flexran;
/// eNB context variables
struct PHY_VARS_eNB_s ***eNB;
/// gNB context variables
struct PHY_VARS_gNB_s ***gNB;
/// NB_IoT L1 context variables
struct PHY_VARS_eNB_NB_IoT_s **L1_NB_IoT;
/// RRC context variables
struct eNB_RRC_INST_s **rrc;
/// NB_IoT RRC context variables
//struct eNB_RRC_INST_NB_IoT_s **nb_iot_rrc;
/// NR RRC context variables
struct gNB_RRC_INST_s **nrrrc;
/// MAC context variables
struct eNB_MAC_INST_s **mac;
/// NB_IoT MAC context variables
struct eNB_MAC_INST_NB_IoT_s **nb_iot_mac;
/// NR MAC context variables
struct gNB_MAC_INST_s **nrmac;
/// GTPu descriptor
gtpv1u_data_t *gtpv1u_data_g;
/// RU descriptors. These describe what each radio unit is supposed to do and contain the necessary functions for fronthaul interfaces
common/utils/LOG/log.h
+8 -3
View File
@@ -181,6 +181,7 @@ typedef enum {
MIN_LOG_COMPONENTS = 0,
PHY = MIN_LOG_COMPONENTS,
MAC,
EMU,
SIM,
OCG,
OMG,
@@ -215,6 +216,10 @@ typedef enum {
USIM,
LOCALIZE,
X2AP,
GNB_APP,
NR_RRC,
NR_MAC,
NR_PHY,
LOADER,
ASN,
MAX_LOG_PREDEF_COMPONENTS,
@@ -421,8 +426,8 @@ static __inline__ uint64_t rdtsc(void) {
extern double cpuf;
static inline uint64_t checkTCPU(int timeout, char * file, int line) {
static uint64_t __thread lastCPUTime=0;
static uint64_t __thread last=0;
static __thread uint64_t lastCPUTime=0;
static __thread uint64_t last=0;
uint64_t cur=rdtsc();
struct timespec CPUt;
clock_gettime(CLOCK_THREAD_CPUTIME_ID, &CPUt);
@@ -441,7 +446,7 @@ static inline uint64_t checkTCPU(int timeout, char * file, int line) {
}
static inline unsigned long long checkT(int timeout, char * file, int line) {
static unsigned long long __thread last=0;
static __thread unsigned long long last=0;
unsigned long long cur=rdtsc();
int microCycles=(int)(cpuf*1000);
int duration=(int)((cur-last)/microCycles);
common/utils/T/T_messages.txt
+88
View File
@@ -77,6 +77,10 @@ ID = ENB_PHY_INITIATE_RA_PROCEDURE
DESC = eNodeB initiates a random access procedure after detecting enough energy for one of the preambles
GROUP = ALL:PHY:ENB
FORMAT = int,eNB_ID : int,frame : int,subframe : int,preamble : int,energy : int,delay
ID = GNB_PHY_DL_TICK
DESC = gNodeB downlink tick - one tick per ms at start of downlink processing
GROUP = ALL:PHY:GRAPHIC:GNB
FORMAT = int,gNB_ID : int,frame : int,subframe
#MAC logs
ID = ENB_MAC_UE_DL_SDU
@@ -288,6 +292,27 @@ ID = LEGACY_MAC_TRACE
GROUP = ALL:LEGACY_MAC:LEGACY_GROUP_TRACE:LEGACY
FORMAT = string,log
ID = LEGACY_NR_MAC_INFO
DESC = NR_MAC legacy logs - info level
GROUP = ALL:LEGACY_NR_MAC:LEGACY_GROUP_INFO:LEGACY
FORMAT = string,log
ID = LEGACY_NR_MAC_ERROR
DESC = NR_MAC legacy logs - error level
GROUP = ALL:LEGACY_NR_MAC:LEGACY_GROUP_ERROR:LEGACY
FORMAT = string,log
ID = LEGACY_NR_MAC_WARNING
DESC = NR_MAC legacy logs - warning level
GROUP = ALL:LEGACY_NR_MAC:LEGACY_GROUP_WARNING:LEGACY
FORMAT = string,log
ID = LEGACY_NR_MAC_DEBUG
DESC = NR_MAC legacy logs - debug level
GROUP = ALL:LEGACY_NR_MAC:LEGACY_GROUP_DEBUG:LEGACY
FORMAT = string,log
ID = LEGACY_NR_MAC_TRACE
DESC = NR_MAC legacy logs - trace level
GROUP = ALL:LEGACY_NR_MAC:LEGACY_GROUP_TRACE:LEGACY
FORMAT = string,log
ID = LEGACY_PHY_INFO
DESC = PHY legacy logs - info level
GROUP = ALL:LEGACY_PHY:LEGACY_GROUP_INFO:LEGACY
@@ -309,6 +334,27 @@ ID = LEGACY_PHY_TRACE
GROUP = ALL:LEGACY_PHY:LEGACY_GROUP_TRACE:LEGACY
FORMAT = string,log
ID = LEGACY_NR_PHY_INFO
DESC = NR_PHY legacy logs - info level
GROUP = ALL:LEGACY_NR_PHY:LEGACY_GROUP_INFO:LEGACY
FORMAT = string,log
ID = LEGACY_NR_PHY_ERROR
DESC = NR_PHY legacy logs - error level
GROUP = ALL:LEGACY_NR_PHY:LEGACY_GROUP_ERROR:LEGACY
FORMAT = string,log
ID = LEGACY_NR_PHY_WARNING
DESC = NR_PHY legacy logs - warning level
GROUP = ALL:LEGACY_NR_PHY:LEGACY_GROUP_WARNING:LEGACY
FORMAT = string,log
ID = LEGACY_NR_PHY_DEBUG
DESC = NR_PHY legacy logs - debug level
GROUP = ALL:LEGACY_NR_PHY:LEGACY_GROUP_DEBUG:LEGACY
FORMAT = string,log
ID = LEGACY_NR_PHY_TRACE
DESC = NR_PHY legacy logs - trace level
GROUP = ALL:LEGACY_NR_PHY:LEGACY_GROUP_TRACE:LEGACY
FORMAT = string,log
ID = LEGACY_S1AP_INFO
DESC = S1AP legacy logs - info level
GROUP = ALL:LEGACY_S1AP:LEGACY_GROUP_INFO:LEGACY
@@ -372,6 +418,27 @@ ID = LEGACY_RRC_TRACE
GROUP = ALL:LEGACY_RRC:LEGACY_GROUP_TRACE:LEGACY
FORMAT = string,log
ID = LEGACY_NR_RRC_INFO
DESC = NR_RRC legacy logs - info level
GROUP = ALL:LEGACY_NR_RRC:LEGACY_GROUP_INFO:LEGACY
FORMAT = string,log
ID = LEGACY_NR_RRC_ERROR
DESC = NR_RRC legacy logs - error level
GROUP = ALL:LEGACY_NR_RRC:LEGACY_GROUP_ERROR:LEGACY
FORMAT = string,log
ID = LEGACY_NR_RRC_WARNING
DESC = NR_RRC legacy logs - warning level
GROUP = ALL:LEGACY_NR_RRC:LEGACY_GROUP_WARNING:LEGACY
FORMAT = string,log
ID = LEGACY_NR_RRC_DEBUG
DESC = NR_RRC legacy logs - debug level
GROUP = ALL:LEGACY_NR_RRC:LEGACY_GROUP_DEBUG:LEGACY
FORMAT = string,log
ID = LEGACY_NR_RRC_TRACE
DESC = NR_RRC legacy logs - trace level
GROUP = ALL:LEGACY_NR_RRC:LEGACY_GROUP_TRACE:LEGACY
FORMAT = string,log
ID = LEGACY_RLC_INFO
DESC = RLC legacy logs - info level
GROUP = ALL:LEGACY_RLC:LEGACY_GROUP_INFO:LEGACY
@@ -435,6 +502,27 @@ ID = LEGACY_ENB_APP_TRACE
GROUP = ALL:LEGACY_ENB_APP:LEGACY_GROUP_TRACE:LEGACY
FORMAT = string,log
ID = LEGACY_GNB_APP_INFO
DESC = GNB_APP legacy logs - info level
GROUP = ALL:LEGACY_GNB_APP:LEGACY_GROUP_INFO:LEGACY
FORMAT = string,log
ID = LEGACY_GNB_APP_ERROR
DESC = GNB_APP legacy logs - error level
GROUP = ALL:LEGACY_GNB_APP:LEGACY_GROUP_ERROR:LEGACY
FORMAT = string,log
ID = LEGACY_GNB_APP_WARNING
DESC = GNB_APP legacy logs - warning level
GROUP = ALL:LEGACY_GNB_APP:LEGACY_GROUP_WARNING:LEGACY
FORMAT = string,log
ID = LEGACY_GNB_APP_DEBUG
DESC = GNB_APP legacy logs - debug level
GROUP = ALL:LEGACY_GNB_APP:LEGACY_GROUP_DEBUG:LEGACY
FORMAT = string,log
ID = LEGACY_GNB_APP_TRACE
DESC = GNB_APP legacy logs - trace level
GROUP = ALL:LEGACY_GNB_APP:LEGACY_GROUP_TRACE:LEGACY
FORMAT = string,log
ID = LEGACY_FLEXRAN_AGENT_INFO
DESC = FLEXRAN_AGENT legacy logs - info level
GROUP = ALL:LEGACY_FLEXRAN_AGENT:LEGACY_GROUP_INFO:LEGACY
common/utils/ocp_itti/intertask_interface.h
+5
View File
@@ -284,11 +284,13 @@ typedef struct {
TASK_DEF(TASK_RRC_ENB_NB_IoT, TASK_PRIORITY_MED, 200, NULL, NULL) \
TASK_DEF(TASK_PDCP_ENB, TASK_PRIORITY_MED, 200, NULL, NULL) \
TASK_DEF(TASK_RRC_ENB, TASK_PRIORITY_MED, 200, NULL,NULL)\
TASK_DEF(TASK_RRC_GNB, TASK_PRIORITY_MED, 200, NULL,NULL)\
TASK_DEF(TASK_RAL_ENB, TASK_PRIORITY_MED, 200, NULL, NULL) \
TASK_DEF(TASK_S1AP, TASK_PRIORITY_MED, 200, NULL, NULL) \
TASK_DEF(TASK_X2AP, TASK_PRIORITY_MED, 200, NULL, NULL) \
TASK_DEF(TASK_SCTP, TASK_PRIORITY_MED, 200, NULL, NULL) \
TASK_DEF(TASK_ENB_APP, TASK_PRIORITY_MED, 200, NULL, NULL) \
TASK_DEF(TASK_GNB_APP, TASK_PRIORITY_MED, 200, NULL, NULL) \
TASK_DEF(TASK_FLEXRAN_AGENT,TASK_PRIORITY_MED, 200, NULL, NULL) \
TASK_DEF(TASK_PHY_UE, TASK_PRIORITY_MED, 200, NULL, NULL) \
TASK_DEF(TASK_MAC_UE, TASK_PRIORITY_MED, 200, NULL, NULL) \
@@ -399,9 +401,12 @@ typedef struct __attribute__ ((__packed__)) MessageDef_s {
#define INSTANCE_DEFAULT (UINT16_MAX - 1)
/* already defined in common/utils/time_utils.h*/
/*
static inline int64_t clock_difftime_ns(struct timespec start, struct timespec end) {
return (int64_t)( end.tv_sec-start.tv_sec) * (int64_t)(1000*1000*1000) + end.tv_nsec-start.tv_nsec;
}
*/
#ifdef __cplusplus
extern "C" {
nfapi/oai_integration/nfapi_vnf.c
+19 -1
View File
@@ -31,7 +31,7 @@
#include <netinet/in.h>
#include <arpa/inet.h>
#include "nfapi_interface.h"
#include "nfapi_nr_interface.h"
#include "nfapi_vnf_interface.h"
#include "nfapi.h"
#include "vendor_ext.h"
@@ -1126,6 +1126,24 @@ int oai_nfapi_dl_config_req(nfapi_dl_config_request_t *dl_config_req)
return retval;
}
int oai_nfapi_nr_dl_config_req(nfapi_nr_dl_config_request_t *dl_config_req)
{
nfapi_vnf_p7_config_t *p7_config = vnf.p7_vnfs[0].config;
dl_config_req->header.phy_id = 1; // DJP HACK TODO FIXME - need to pass this around!!!!
int retval = nfapi_vnf_p7_dl_config_req(p7_config, dl_config_req);
dl_config_req->dl_config_request_body.number_dci = 0;
dl_config_req->dl_config_request_body.number_pdu = 0;
dl_config_req->dl_config_request_body.number_pdsch_rnti = 0;
if (retval!=0) {
LOG_E(PHY, "%s() Problem sending retval:%d\n", __FUNCTION__, retval);
}
return retval;
}
int oai_nfapi_tx_req(nfapi_tx_request_t *tx_req)
{
nfapi_vnf_p7_config_t *p7_config = vnf.p7_vnfs[0].config;
nfapi/open-nFAPI/nfapi/public_inc/fapi_nr_ue_constants.h
+59
View File
@@ -0,0 +1,59 @@
#ifndef _FAPI_NR_UE_CONSTANTS_H_
#define _FAPI_NR_UE_CONSTANTS_H_
// constants defined by specification 38.331
#define FAPI_NR_MAX_NUM_DL_ALLOCATIONS 16
#define FAPI_NR_MAX_NUM_UL_ALLOCATIONS 16
#define FAPI_NR_MAX_NUM_SERVING_CELLS 32
#define FAPI_NR_MAX_NUM_ZP_CSI_RS_RESOURCE_PER_SET 16
#define FAPI_NR_MAX_NUM_CANDIDATE_BEAMS 16
#define FAPI_NR_MAX_RA_OCCASION_PER_CSIRS 64
/// RX_IND
#define FAPI_NR_RX_PDU_TYPE_MIB 0x01
#define FAPI_NR_RX_PDU_TYPE_SIB 0x02
#define FAPI_NR_RX_PDU_TYPE_DLSCH 0x03
#define FAPI_NR_DCI_IND 0x04
#define FAPI_NR_SIBS_MASK_SIB1 0x1
/// DCI_IND
#define FAPI_NR_DCI_TYPE_0_0 0x01
#define FAPI_NR_DCI_TYPE_0_1 0x02
#define FAPI_NR_DCI_TYPE_1_0 0x03
#define FAPI_NR_DCI_TYPE_1_1 0x04
#define FAPI_NR_DCI_TYPE_2_0 0x05
#define FAPI_NR_DCI_TYPE_2_1 0x06
#define FAPI_NR_DCI_TYPE_2_2 0x07
#define FAPI_NR_DCI_TYPE_2_3 0x08
/// TX_REQ
/// DL_CONFIG_REQ
#define FAPI_NR_DL_CONFIG_LIST_NUM 10
#define FAPI_NR_DL_CONFIG_TYPE_DCI 0x01
#define FAPI_NR_DL_CONFIG_TYPE_DLSCH 0x02
#define CCE_REG_MAPPING_TYPE_INTERLEAVED 0x01
#define CCE_REG_MAPPING_TYPE_NON_INTERLEAVED 0x02
#define PRECODER_GRANULARITY_SAME_AS_REG_BUNDLE 0x01
#define PRECODER_GRANULARITY_ALL_CONTIGUOUS_RBS 0x02
/// UL_CONFIG_REQ
#define FAPI_NR_UL_CONFIG_LIST_NUM 10
#define FAPI_NR_UL_CONFIG_TYPE_PRACH 0x01
#define FAPI_NR_UL_CONFIG_TYPE_PUCCH 0x02
#define FAPI_NR_UL_CONFIG_TYPE_PUSCH 0x03
#define FAPI_NR_UL_CONFIG_TYPE_SRS 0x04
#endif
nfapi/open-nFAPI/nfapi/public_inc/fapi_nr_ue_interface.h
+835
View File
@@ -0,0 +1,835 @@
/*
* Copyright 2017 Cisco Systems, Inc.
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#ifndef _FAPI_NR_UE_INTERFACE_H_
#define _FAPI_NR_UE_INTERFACE_H_
#include "stddef.h"
#include "platform_types.h"
#include "fapi_nr_ue_constants.h"
/*
typedef unsigned int uint32_t;
typedef unsigned short uint16_t;
typedef unsigned char uint8_t;
typedef signed int int32_t;
typedef signed short int16_t;
typedef signed char int8_t;
*/
typedef struct {
uint8_t identifier_dci_formats ; // 0 IDENTIFIER_DCI_FORMATS:
uint8_t carrier_ind ; // 1 CARRIER_IND: 0 or 3 bits, as defined in Subclause x.x of [5, TS38.213]
uint8_t sul_ind_0_1 ; // 2 SUL_IND_0_1:
uint8_t slot_format_ind ; // 3 SLOT_FORMAT_IND: size of DCI format 2_0 is configurable by higher layers up to 128 bits, according to Subclause 11.1.1 of [5, TS 38.213]
uint8_t pre_emption_ind ; // 4 PRE_EMPTION_IND: size of DCI format 2_1 is configurable by higher layers up to 126 bits, according to Subclause 11.2 of [5, TS 38.213]. Each pre-emption indication is 14 bits
uint8_t block_number ; // 5 BLOCK_NUMBER: starting position of a block is determined by the parameter startingBitOfFormat2_3
uint8_t close_loop_ind ; // 6 CLOSE_LOOP_IND:
uint8_t bandwidth_part_ind ; // 7 BANDWIDTH_PART_IND:
uint8_t short_message_ind ; // 8 SHORT_MESSAGE_IND:
uint8_t short_messages ; // 9 SHORT_MESSAGES:
uint16_t freq_dom_resource_assignment_UL; // 10 FREQ_DOM_RESOURCE_ASSIGNMENT_UL: PUSCH hopping with resource allocation type 1 not considered
// (NOTE 1) If DCI format 0_0 is monitored in common search space
// and if the number of information bits in the DCI format 0_0 prior to padding
// is larger than the payload size of the DCI format 1_0 monitored in common search space
// the bitwidth of the frequency domain resource allocation field in the DCI format 0_0
// is reduced such that the size of DCI format 0_0 equals to the size of the DCI format 1_0
uint16_t freq_dom_resource_assignment_DL; // 11 FREQ_DOM_RESOURCE_ASSIGNMENT_DL:
uint8_t time_dom_resource_assignment ; // 12 TIME_DOM_RESOURCE_ASSIGNMENT: 0, 1, 2, 3, or 4 bits as defined in Subclause 6.1.2.1 of [6, TS 38.214]. The bitwidth for this field is determined as log2(I) bits,
// where I the number of entries in the higher layer parameter pusch-AllocationList
uint8_t vrb_to_prb_mapping ; // 13 VRB_TO_PRB_MAPPING: 0 bit if only resource allocation type 0
uint8_t prb_bundling_size_ind ; // 14 PRB_BUNDLING_SIZE_IND:0 bit if the higher layer parameter PRB_bundling is not configured or is set to 'static', or 1 bit if the higher layer parameter PRB_bundling is set to 'dynamic' according to Subclause 5.1.2.3 of [6, TS 38.214]
uint8_t rate_matching_ind ; // 15 RATE_MATCHING_IND: 0, 1, or 2 bits according to higher layer parameter rate-match-PDSCH-resource-set
uint8_t zp_csi_rs_trigger ; // 16 ZP_CSI_RS_TRIGGER:
uint8_t freq_hopping_flag ; // 17 FREQ_HOPPING_FLAG: 0 bit if only resource allocation type 0
uint8_t tb1_mcs ; // 18 TB1_MCS:
uint8_t tb1_ndi ; // 19 TB1_NDI:
uint8_t tb1_rv ; // 20 TB1_RV:
uint8_t tb2_mcs ; // 21 TB2_MCS:
uint8_t tb2_ndi ; // 22 TB2_NDI:
uint8_t tb2_rv ; // 23 TB2_RV:
uint8_t mcs ; // 24 MCS:
uint8_t ndi ; // 25 NDI:
uint8_t rv ; // 26 RV:
uint8_t harq_process_number ; // 27 HARQ_PROCESS_NUMBER:
uint8_t dai ; // 28 DAI: For format1_1: 4 if more than one serving cell are configured in the DL and the higher layer parameter HARQ-ACK-codebook=dynamic, where the 2 MSB bits are the counter DAI and the 2 LSB bits are the total DAI
// 2 if one serving cell is configured in the DL and the higher layer parameter HARQ-ACK-codebook=dynamic, where the 2 bits are the counter DAI
// 0 otherwise
uint8_t first_dai ; // 29 FIRST_DAI: (1 or 2 bits) 1 bit for semi-static HARQ-ACK
uint8_t second_dai ; // 30 SECOND_DAI: (0 or 2 bits) 2 bits for dynamic HARQ-ACK codebook with two HARQ-ACK sub-codebooks
uint8_t tb_scaling ; // 31 TB_SCALING:
uint8_t tpc_pusch ; // 32 TPC_PUSCH:
uint8_t tpc_pucch ; // 33 TPC_PUCCH:
uint8_t pucch_resource_ind ; // 34 PUCCH_RESOURCE_IND:
uint8_t pdsch_to_harq_feedback_time_ind ; // 35 PDSCH_TO_HARQ_FEEDBACK_TIME_IND:
uint8_t srs_resource_ind ; // 36 SRS_RESOURCE_IND:
uint8_t precod_nbr_layers ; // 37 PRECOD_NBR_LAYERS:
uint8_t antenna_ports ; // 38 ANTENNA_PORTS:
uint8_t tci ; // 39 TCI: 0 bit if higher layer parameter tci-PresentInDCI is not enabled; otherwise 3 bits
uint8_t srs_request ; // 40 SRS_REQUEST:
uint8_t tpc_cmd ; // 41 TPC_CMD:
uint8_t csi_request ; // 42 CSI_REQUEST:
uint8_t cbgti ; // 43 CBGTI: 0, 2, 4, 6, or 8 bits determined by higher layer parameter maxCodeBlockGroupsPerTransportBlock for the PDSCH
uint8_t cbgfi ; // 44 CBGFI: 0 or 1 bit determined by higher layer parameter codeBlockGroupFlushIndicator
uint8_t ptrs_dmrs ; // 45 PTRS_DMRS:
uint8_t beta_offset_ind ; // 46 BETA_OFFSET_IND:
uint8_t dmrs_seq_ini ; // 47 DMRS_SEQ_INI: 1 bit if the cell has two ULs and the number of bits for DCI format 1_0 before padding
// is larger than the number of bits for DCI format 0_0 before padding; 0 bit otherwise
uint8_t ul_sch_ind ; // 48 UL_SCH_IND: value of "1" indicates UL-SCH shall be transmitted on the PUSCH and a value of "0" indicates UL-SCH shall not be transmitted on the PUSCH
uint16_t padding_nr_dci ; // 49 PADDING_NR_DCI: (Note 2) If DCI format 0_0 is monitored in common search space
// and if the number of information bits in the DCI format 0_0 prior to padding
// is less than the payload size of the DCI format 1_0 monitored in common search space
// zeros shall be appended to the DCI format 0_0
// until the payload size equals that of the DCI format 1_0
uint8_t sul_ind_0_0 ; // 50 SUL_IND_0_0:
uint8_t ra_preamble_index ; // 51 RA_PREAMBLE_INDEX:
uint8_t sul_ind_1_0 ; // 52 SUL_IND_1_0:
uint8_t ss_pbch_index ; // 53 SS_PBCH_INDEX
uint8_t prach_mask_index ; // 54 PRACH_MASK_INDEX
uint8_t reserved_nr_dci ; // 55 RESERVED_NR_DCI
} fapi_nr_dci_pdu_rel15_t;
typedef struct {
uint8_t uci_format;
uint8_t uci_channel;
uint8_t harq_ack_bits;
uint32_t harq_ack;
uint8_t csi_bits;
uint32_t csi;
uint8_t sr_bits;
uint32_t sr;
} fapi_nr_uci_pdu_rel15_t;
typedef struct {
/// frequency_domain_resource;
//uint32_t rb_start;
//uint32_t rb_end;
uint64_t frequency_domain_resource;
uint16_t rb_offset;
uint8_t duration;
uint8_t cce_reg_mapping_type; // interleaved or noninterleaved
uint8_t cce_reg_interleaved_reg_bundle_size; // valid if CCE to REG mapping type is interleaved type
uint8_t cce_reg_interleaved_interleaver_size; // valid if CCE to REG mapping type is interleaved type
uint8_t cce_reg_interleaved_shift_index; // valid if CCE to REG mapping type is interleaved type
uint8_t precoder_granularity;
uint16_t pdcch_dmrs_scrambling_id;
uint8_t tci_state_pdcch;
uint8_t tci_present_in_dci;
} fapi_nr_coreset_t;
//
// Top level FAPI messages
//
//
// P7
//
typedef struct {
uint16_t rnti;
uint8_t dci_format;
fapi_nr_dci_pdu_rel15_t dci;
} fapi_nr_dci_indication_pdu_t;
///
typedef struct {
uint32_t sfn_slot;
uint16_t number_of_dcis;
fapi_nr_dci_indication_pdu_t dci_list[10];
} fapi_nr_dci_indication_t;
typedef struct {
uint32_t pdu_length;
uint8_t* pdu;
} fapi_nr_pdsch_pdu_t;
typedef struct {
uint8_t* pdu; // 3bytes
uint8_t additional_bits;
uint8_t ssb_index;
uint8_t ssb_length;
uint16_t cell_id;
} fapi_nr_mib_pdu_t;
typedef struct {
uint32_t pdu_length;
uint8_t* pdu;
uint32_t sibs_mask;
} fapi_nr_sib_pdu_t;
typedef struct {
uint8_t pdu_type;
union {
fapi_nr_pdsch_pdu_t pdsch_pdu;
fapi_nr_mib_pdu_t mib_pdu;
fapi_nr_sib_pdu_t sib_pdu;
};
} fapi_nr_rx_indication_body_t;
///
typedef struct {
uint32_t sfn_slot;
uint16_t number_pdus;
fapi_nr_rx_indication_body_t *rx_indication_body;
} fapi_nr_rx_indication_t;
typedef struct {
uint8_t ul_cqi;
uint16_t timing_advance;
uint16_t rnti;
} fapi_nr_tx_config_t;
typedef struct {
uint16_t pdu_length;
uint16_t pdu_index;
uint8_t* pdu;
} fapi_nr_tx_request_body_t;
///
typedef struct {
uint32_t sfn_slot;
fapi_nr_tx_config_t tx_config;
uint16_t number_of_pdus;
fapi_nr_tx_request_body_t *tx_request_body;
} fapi_nr_tx_request_t;
typedef struct {
uint8_t preamble_index;
uint8_t prach_configuration_index;
uint16_t preamble_length;
uint8_t power_ramping_step;
uint16_t preamble_received_target_power;
uint8_t msg1_fdm;
uint8_t msg1_frequency_start;
uint8_t zero_correlation_zone_config;
uint8_t subcarrier_spacing;
uint8_t restrictedset_config;
uint16_t root_sequence_index;
uint16_t rsrp_threshold_ssb;
uint16_t rsrp_threshold_sul;
} fapi_nr_ul_config_prach_pdu;
typedef struct {
} fapi_nr_ul_config_pucch_pdu;
typedef enum {pusch_freq_hopping_disabled = 0 , pusch_freq_hopping_enabled = 1}pusch_freq_hopping_t;
typedef struct{
uint8_t aperiodicSRS_ResourceTrigger;
} fapi_nr_ul_srs_config_t;
typedef struct {
uint8_t bandwidth_part_ind;
uint16_t number_rbs;
uint16_t start_rb;
uint8_t frame_offset;
uint16_t number_symbols;
uint16_t start_symbol;
pusch_freq_hopping_t pusch_freq_hopping;
uint8_t mcs;
uint8_t ndi;
uint8_t rv;
uint8_t harq_process_nbr;
int8_t accumulated_delta_PUSCH;
int8_t absolute_delta_PUSCH;
uint8_t n_layers;
uint8_t tpmi;
uint8_t n_dmrs_cdm_groups;
uint8_t dmrs_ports[4];
uint8_t n_front_load_symb;
fapi_nr_ul_srs_config_t srs_config;
uint8_t csi_reportTriggerSize;
uint8_t maxCodeBlockGroupsPerTransportBlock;
uint8_t ptrs_dmrs_association_port;
uint8_t beta_offset_ind;
} fapi_nr_ul_config_pusch_pdu_rel15_t;
typedef struct {
uint16_t rnti;
fapi_nr_ul_config_pusch_pdu_rel15_t ulsch_pdu_rel15;
} fapi_nr_ul_config_pusch_pdu;
typedef struct {
} fapi_nr_ul_config_srs_pdu;
typedef struct {
uint8_t pdu_type;
union {
fapi_nr_ul_config_prach_pdu prach_config_pdu;
fapi_nr_ul_config_pucch_pdu pucch_config_pdu;
fapi_nr_ul_config_pusch_pdu ulsch_config_pdu;
fapi_nr_ul_config_srs_pdu srs_config_pdu;
};
} fapi_nr_ul_config_request_pdu_t;
typedef struct {
uint32_t sfn_slot;
uint8_t number_pdus;
fapi_nr_ul_config_request_pdu_t ul_config_list[FAPI_NR_UL_CONFIG_LIST_NUM];
} fapi_nr_ul_config_request_t;
typedef struct {
uint16_t rnti;
fapi_nr_coreset_t coreset;
uint32_t duration;
uint8_t number_of_candidates[5]; // aggregation level 1, 2, 4, 8, 16
uint16_t monitoring_symbols_within_slot;
// DCI foramt-specific
uint8_t format_2_0_number_of_candidates[5]; // aggregation level 1, 2, 4, 8, 16
uint8_t format_2_3_monitorying_periodicity;
uint8_t format_2_3_number_of_candidates;
} fapi_nr_dl_config_dci_dl_pdu_rel15_t;
typedef struct {
fapi_nr_dl_config_dci_dl_pdu_rel15_t dci_config_rel15;
} fapi_nr_dl_config_dci_pdu;
typedef struct{
uint8_t aperiodicSRS_ResourceTrigger;
} fapi_nr_dl_srs_config_t;
typedef enum{vrb_to_prb_mapping_non_interleaved = 0, vrb_to_prb_mapping_interleaved = 1} vrb_to_prb_mapping_t;
//typedef fapi_nr_dci_pdu_rel15_t fapi_nr_dl_config_dlsch_pdu_rel15_t;
typedef struct {
uint8_t bandwidth_part_ind;
uint16_t number_rbs;
uint16_t start_rb;
uint8_t frame_offset;
uint16_t number_symbols;
uint16_t start_symbol;
uint8_t prb_bundling_size_ind;
uint8_t rate_matching_ind;
uint8_t zp_csi_rs_trigger;
uint8_t mcs;
uint8_t ndi;
uint8_t rv;
uint8_t tb2_mcs;
uint8_t tb2_ndi;
uint8_t tb2_rv;
uint8_t harq_process_nbr;
vrb_to_prb_mapping_t vrb_to_prb_mapping;
uint8_t dai;
double scaling_factor_S;
int8_t accumulated_delta_PUCCH;
uint8_t pucch_resource_id;
uint8_t pdsch_to_harq_feedback_time_ind;
uint8_t n_dmrs_cdm_groups;
uint8_t dmrs_ports[10];
uint8_t n_front_load_symb;
uint8_t tci_state;
fapi_nr_dl_srs_config_t srs_config;
uint8_t cbgti;
uint8_t codeBlockGroupFlushIndicator;
// to be check the fields needed to L1 with NR_DL_UE_HARQ_t and NR_UE_DLSCH_t
} fapi_nr_dl_config_dlsch_pdu_rel15_t;
typedef struct {
uint16_t rnti;
fapi_nr_dl_config_dlsch_pdu_rel15_t dlsch_config_rel15;
} fapi_nr_dl_config_dlsch_pdu;
typedef struct {
uint8_t pdu_type;
union {
fapi_nr_dl_config_dci_pdu dci_config_pdu;
fapi_nr_dl_config_dlsch_pdu dlsch_config_pdu;
};
} fapi_nr_dl_config_request_pdu_t;
typedef struct {
uint32_t sfn_slot;
uint8_t number_pdus;
fapi_nr_dl_config_request_pdu_t dl_config_list[FAPI_NR_DL_CONFIG_LIST_NUM];
} fapi_nr_dl_config_request_t;
//
// P5
//
typedef struct {
fapi_nr_coreset_t coreset;
uint8_t monitoring_slot_peridicity;
uint8_t monitoring_slot_offset;
uint16_t duration;
uint16_t monitoring_symbols_within_slot;
uint8_t number_of_candidates[5]; // aggregation level 1, 2, 4, 8, 16
uint8_t dci_2_0_number_of_candidates[5]; // aggregation level 1, 2, 4, 8, 16
uint8_t dci_2_3_monitorying_periodicity;
uint8_t dci_2_3_number_of_candidates;
} fapi_nr_search_space_t;
typedef struct {
fapi_nr_search_space_t search_space_sib1;
fapi_nr_search_space_t search_space_others_sib;
fapi_nr_search_space_t search_space_paging;
//fapi_nr_coreset_t coreset_ra; // common coreset
fapi_nr_search_space_t search_space_ra;
} fapi_nr_pdcch_config_common_t;
typedef struct {
uint8_t k0;
uint8_t mapping_type;
uint8_t symbol_starting;
uint8_t symbol_length;
} fapi_nr_pdsch_time_domain_resource_allocation_t;
typedef struct {
fapi_nr_pdsch_time_domain_resource_allocation_t allocation_list[FAPI_NR_MAX_NUM_DL_ALLOCATIONS];
} fapi_nr_pdsch_config_common_t;
typedef struct {
uint8_t prach_configuration_index;
uint8_t msg1_fdm;
uint8_t msg1_frequency_start;
uint8_t zero_correlation_zone_config;
uint8_t preamble_received_target_power;
uint8_t preamble_transmission_max;
uint8_t power_ramping_step;
uint8_t ra_window_size;
uint8_t total_number_of_preamble;
uint8_t ssb_occasion_per_rach;
uint8_t cb_preamble_per_ssb;
uint8_t group_a_msg3_size;
uint8_t group_a_number_of_preamble;
uint8_t group_b_power_offset;
uint8_t contention_resolution_timer;
uint8_t rsrp_threshold_ssb;
uint8_t rsrp_threshold_ssb_sul;
uint8_t prach_length; // l839, l139
uint8_t prach_root_sequence_index; // 0 - 837 for l839, 0 - 137 for l139
uint8_t msg1_subcarrier_spacing;
uint8_t restrictedset_config;
uint8_t msg3_transform_precoding;
} fapi_nr_rach_config_common_t;
typedef struct {
uint8_t k2;
uint8_t mapping_type;
uint8_t symbol_starting;
uint8_t symbol_length;
} fapi_nr_pusch_time_domain_resource_allocation_t;
typedef struct {
uint8_t group_hopping_enabled_transform_precoding;
fapi_nr_pusch_time_domain_resource_allocation_t allocation_list[FAPI_NR_MAX_NUM_UL_ALLOCATIONS];
uint8_t msg3_delta_preamble;
uint8_t p0_nominal_with_grant;
} fapi_nr_pusch_config_common_t;
typedef struct {
uint8_t pucch_resource_common;
uint8_t pucch_group_hopping;
uint8_t hopping_id;
uint8_t p0_nominal;
} fapi_nr_pucch_config_common_t;
typedef struct {
uint8_t subcarrier_spacing_common;
uint8_t ssb_subcarrier_offset;
uint8_t dmrs_type_a_position;
uint8_t pdcch_config_sib1;
uint8_t cell_barred;
uint8_t intra_frequency_reselection;
uint16_t system_frame_number;
uint8_t ssb_index;
uint8_t half_frame_bit;
} fapi_nr_pbch_config_t;
typedef struct {
fapi_nr_pdcch_config_common_t pdcch_config_common;
fapi_nr_pdsch_config_common_t pdsch_config_common;
} fapi_nr_dl_bwp_common_config_t;
typedef struct {
uint16_t int_rnti;
uint8_t time_frequency_set;
uint8_t dci_payload_size;
uint8_t serving_cell_id[FAPI_NR_MAX_NUM_SERVING_CELLS]; // interrupt configuration per serving cell
uint8_t position_in_dci[FAPI_NR_MAX_NUM_SERVING_CELLS]; // interrupt configuration per serving cell
} fapi_nr_downlink_preemption_t;
typedef struct {
uint8_t tpc_index;
uint8_t tpc_index_sul;
uint8_t target_cell;
} fapi_nr_pusch_tpc_command_config_t;
typedef struct {
uint8_t tpc_index_pcell;
uint8_t tpc_index_pucch_scell;
} fapi_nr_pucch_tpc_command_config_t;
typedef struct {
uint8_t starting_bit_of_format_2_3;
uint8_t feild_type_format_2_3;
} fapi_nr_srs_tpc_command_config_t;
typedef struct {
fapi_nr_downlink_preemption_t downlink_preemption;
fapi_nr_pusch_tpc_command_config_t tpc_pusch;
fapi_nr_pucch_tpc_command_config_t tpc_pucch;
fapi_nr_srs_tpc_command_config_t tpc_srs;
} fapi_nr_pdcch_config_dedicated_t;
typedef struct {
uint8_t dmrs_type;
uint8_t dmrs_addition_position;
uint8_t max_length;
uint16_t scrambling_id0;
uint16_t scrambling_id1;
uint8_t ptrs_frequency_density[2]; // phase tracking rs
uint8_t ptrs_time_density[3]; // phase tracking rs
uint8_t ptrs_epre_ratio; // phase tracking rs
uint8_t ptrs_resource_element_offset; // phase tracking rs
} fapi_nr_dmrs_downlink_config_t;
typedef struct {
uint8_t bwp_or_cell_level;
uint8_t pattern_type;
uint32_t resource_blocks[9]; // bitmaps type 275 bits
uint8_t slot_type; // bitmaps type one/two slot(s)
uint32_t symbols_in_resouece_block; // bitmaps type 14/28 bits
uint8_t periodic; // bitmaps type
uint32_t pattern[2]; // bitmaps type 2/4/5/8/10/20/40 bits
fapi_nr_coreset_t coreset; // coreset
uint8_t subcarrier_spacing;
uint8_t mode;
} fapi_nr_rate_matching_pattern_group_t;
typedef struct {
// resource mapping
uint8_t row; // row1/row2/row4/other
uint16_t frequency_domain_allocation; // 4/12/3/6 bits
uint8_t number_of_ports;
uint8_t first_ofdm_symbol_in_time_domain;
uint8_t first_ofdm_symbol_in_time_domain2;
uint8_t cdm_type;
uint8_t density; // .5/1/3
uint8_t density_dot5_type; // even/odd PRBs
uint8_t frequency_band_starting_rb; // freqBand
uint8_t frequency_band_number_of_rb; // freqBand
// periodicityAndOffset
uint8_t periodicity; // slot4/5/8/10/16/20/32/40/64/80/160/320/640
uint32_t offset; // 0..639 bits
} fapi_nr_zp_csi_rs_resource_t;
typedef struct {
uint16_t data_scrambling_id_pdsch;
fapi_nr_dmrs_downlink_config_t dmrs_dl_for_pdsch_mapping_type_a;
fapi_nr_dmrs_downlink_config_t dmrs_dl_for_pdsch_mapping_type_b;
uint8_t vrb_to_prb_interleaver;
uint8_t resource_allocation;
fapi_nr_pdsch_time_domain_resource_allocation_t allocation_list[FAPI_NR_MAX_NUM_DL_ALLOCATIONS];
uint8_t pdsch_aggregation_factor;
fapi_nr_rate_matching_pattern_group_t rate_matching_pattern_group1;
fapi_nr_rate_matching_pattern_group_t rate_matching_pattern_group2;
uint8_t rbg_size;
uint8_t mcs_table;
uint8_t max_num_of_code_word_scheduled_by_dci;
uint8_t bundle_size; // prb_bundling static
uint8_t bundle_size_set1; // prb_bundling dynamic
uint8_t bundle_size_set2; // prb_bundling dynamic
fapi_nr_zp_csi_rs_resource_t periodically_zp_csi_rs_resource_set[FAPI_NR_MAX_NUM_ZP_CSI_RS_RESOURCE_PER_SET];
} fapi_nr_pdsch_config_dedicated_t;
typedef struct {
uint16_t starting_prb;
uint8_t intra_slot_frequency_hopping;
uint16_t second_hop_prb;
uint8_t format; // pucch format 0..4
uint8_t initial_cyclic_shift;
uint8_t number_of_symbols;
uint8_t starting_symbol_index;
uint8_t time_domain_occ;
uint8_t number_of_prbs;
uint8_t occ_length;
uint8_t occ_index;
} fapi_nr_pucch_resource_t;
typedef struct {
uint8_t periodicity;
uint8_t number_of_harq_process;
fapi_nr_pucch_resource_t n1_pucch_an;
} fapi_nr_sps_config_t;
typedef struct {
uint8_t beam_failure_instance_max_count;
uint8_t beam_failure_detection_timer;
} fapi_nr_radio_link_monitoring_config_t;
typedef struct {
fapi_nr_pdcch_config_dedicated_t pdcch_config_dedicated;
fapi_nr_pdsch_config_dedicated_t pdsch_config_dedicated;
fapi_nr_sps_config_t sps_config;
fapi_nr_radio_link_monitoring_config_t radio_link_monitoring_config;
} fapi_nr_dl_bwp_dedicated_config_t;
typedef struct {
fapi_nr_rach_config_common_t rach_config_common;
fapi_nr_pusch_config_common_t pusch_config_common;
fapi_nr_pucch_config_common_t pucch_config_common;
} fapi_nr_ul_bwp_common_config_t;
typedef struct {
uint8_t inter_slot_frequency_hopping;
uint8_t additional_dmrs;
uint8_t max_code_rate;
uint8_t number_of_slots;
uint8_t pi2bpsk;
uint8_t simultaneous_harq_ack_csi;
} fapi_nr_pucch_format_config_t;
typedef struct {
fapi_nr_pucch_format_config_t format1;
fapi_nr_pucch_format_config_t format2;
fapi_nr_pucch_format_config_t format3;
fapi_nr_pucch_format_config_t format4;
fapi_nr_pucch_resource_t multi_csi_pucch_resources[2];
uint8_t dl_data_to_ul_ack[8];
// pucch power control
uint8_t deltaF_pucch_f0;
uint8_t deltaF_pucch_f1;
uint8_t deltaF_pucch_f2;
uint8_t deltaF_pucch_f3;
uint8_t deltaF_pucch_f4;
uint8_t two_pucch_pc_adjusment_states;
} fapi_nr_pucch_config_dedicated_t;
typedef struct {
uint8_t dmrs_type;
uint8_t dmrs_addition_position;
uint8_t ptrs_uplink_config; // to indicate if PTRS Uplink is configured of not
uint8_t ptrs_type; //cp-OFDM, dft-S-OFDM
uint16_t ptrs_frequency_density[2];
uint8_t ptrs_time_density[3];
uint8_t ptrs_max_number_of_ports;
uint8_t ptrs_resource_element_offset;
uint8_t ptrs_power;
uint16_t ptrs_sample_density[5];
uint8_t ptrs_time_density_transform_precoding;
uint8_t max_length;
uint16_t scrambling_id0;
uint16_t scrambling_id1;
uint8_t npusch_identity;
uint8_t disable_sequence_group_hopping;
uint8_t sequence_hopping_enable;
} fapi_nr_dmrs_uplink_config_t;
typedef struct {
uint8_t tpc_accmulation;
uint8_t msg3_alpha;
uint8_t p0_nominal_with_grant;
uint8_t two_pusch_pc_adjustments_states;
uint8_t delta_mcs;
} fapi_nr_pusch_power_control_t;
typedef enum {tx_config_codebook = 1, tx_config_nonCodebook = 2} tx_config_t;
typedef enum {transform_precoder_disabled = 0, transform_precoder_enabled = 1} transform_precoder_t;
typedef enum {
codebook_subset_fullyAndPartialAndNonCoherent = 1,
codebook_subset_partialAndNonCoherent = 2,
codebook_subset_nonCoherent = 3} codebook_subset_t;
typedef struct {
uint16_t data_scrambling_identity;
tx_config_t tx_config;
fapi_nr_dmrs_uplink_config_t dmrs_ul_for_pusch_mapping_type_a;
fapi_nr_dmrs_uplink_config_t dmrs_ul_for_pusch_mapping_type_b;
fapi_nr_pusch_power_control_t pusch_power_control;
uint8_t frequency_hopping;
uint16_t frequency_hopping_offset_lists[4];
uint8_t resource_allocation;
fapi_nr_pusch_time_domain_resource_allocation_t allocation_list[FAPI_NR_MAX_NUM_UL_ALLOCATIONS];
uint8_t pusch_aggregation_factor;
uint8_t mcs_table;
uint8_t mcs_table_transform_precoder;
transform_precoder_t transform_precoder;
codebook_subset_t codebook_subset;
uint8_t max_rank;
uint8_t rbg_size;
//uci-OnPUSCH
uint8_t uci_on_pusch_type; //dynamic, semi-static
uint8_t beta_offset_ack_index1[4];
uint8_t beta_offset_ack_index2[4];
uint8_t beta_offset_ack_index3[4];
uint8_t beta_offset_csi_part1_index1[4];
uint8_t beta_offset_csi_part1_index2[4];
uint8_t beta_offset_csi_part2_index1[4];
uint8_t beta_offset_csi_part2_index2[4];
uint8_t tp_pi2BPSK;
} fapi_nr_pusch_config_dedicated_t;
typedef struct {
uint8_t frequency_hopping;
fapi_nr_dmrs_uplink_config_t cg_dmrs_configuration;
uint8_t mcs_table;
uint8_t mcs_table_transform_precoder;
//uci-OnPUSCH
uint8_t uci_on_pusch_type; //dynamic, semi-static
uint8_t beta_offset_ack_index1[4];
uint8_t beta_offset_ack_index2[4];
uint8_t beta_offset_ack_index3[4];
uint8_t beta_offset_csi_part1_index1[4];
uint8_t beta_offset_csi_part1_index2[4];
uint8_t beta_offset_csi_part2_index1[4];
uint8_t beta_offset_csi_part2_index2[4];
uint8_t resource_allocation;
// rgb-Size structure missing in spec.
uint8_t power_control_loop_to_use;
// p0-PUSCH-Alpha
uint8_t p0;
uint8_t alpha;
uint8_t transform_precoder;
uint8_t number_of_harq_process;
uint8_t rep_k;
uint8_t rep_k_rv;
uint8_t periodicity;
uint8_t configured_grant_timer;
// rrc-ConfiguredUplinkGrant
uint16_t time_domain_offset;
uint8_t time_domain_allocation;
uint32_t frequency_domain_allocation;
uint8_t antenna_ports;
uint8_t dmrs_seq_initialization;
uint8_t precoding_and_number_of_layers;
uint8_t srs_resource_indicator;
uint8_t mcs_and_tbs;
uint8_t frequency_hopping_offset;
uint8_t path_loss_reference_index;
} fapi_nr_configured_grant_config_t;
typedef struct {
uint8_t qcl_type1_serving_cell_index;
uint8_t qcl_type1_bwp_id;
uint8_t qcl_type1_rs_type; // csi-rs or ssb
uint8_t qcl_type1_nzp_csi_rs_resource_id;
uint8_t qcl_type1_ssb_index;
uint8_t qcl_type1_type;
uint8_t qcl_type2_serving_cell_index;
uint8_t qcl_type2_bwp_id;
uint8_t qcl_type2_rs_type; // csi-rs or ssb
uint8_t qcl_type2_nzp_csi_rs_resource_id;
uint8_t qcl_type2_ssb_index;
uint8_t qcl_type2_type;
} fapi_nr_tci_state_t;
typedef struct {
uint8_t root_sequence_index;
// rach genertic
uint8_t prach_configuration_index;
uint8_t msg1_fdm;
uint8_t msg1_frequency_start;
uint8_t zero_correlation_zone_config;
uint8_t preamble_received_target_power;
uint8_t preamble_transmission_max;
uint8_t power_ramping_step;
uint8_t ra_window_size;
uint8_t rsrp_threshold_ssb;
// PRACH-ResourceDedicatedBFR
uint8_t bfr_ssb_index[FAPI_NR_MAX_NUM_CANDIDATE_BEAMS];
uint8_t bfr_ssb_ra_preamble_index[FAPI_NR_MAX_NUM_CANDIDATE_BEAMS];
// NZP-CSI-RS-Resource
uint8_t bfr_csi_rs_nzp_resource_mapping[FAPI_NR_MAX_NUM_CANDIDATE_BEAMS];
uint8_t bfr_csi_rs_power_control_offset[FAPI_NR_MAX_NUM_CANDIDATE_BEAMS];
uint8_t bfr_csi_rs_power_control_offset_ss[FAPI_NR_MAX_NUM_CANDIDATE_BEAMS];
uint16_t bfr_csi_rs_scrambling_id[FAPI_NR_MAX_NUM_CANDIDATE_BEAMS];
uint8_t bfr_csi_rs_resource_periodicity[FAPI_NR_MAX_NUM_CANDIDATE_BEAMS];
uint16_t bfr_csi_rs_resource_offset[FAPI_NR_MAX_NUM_CANDIDATE_BEAMS];
fapi_nr_tci_state_t qcl_infomation_periodic_csi_rs[FAPI_NR_MAX_NUM_CANDIDATE_BEAMS];
uint8_t bfr_csirs_ra_occasions[FAPI_NR_MAX_NUM_CANDIDATE_BEAMS];
uint8_t bfr_csirs_ra_preamble_index[FAPI_NR_MAX_NUM_CANDIDATE_BEAMS][FAPI_NR_MAX_RA_OCCASION_PER_CSIRS];
uint8_t ssb_per_rach_occasion;
uint8_t ra_ssb_occasion_mask_index;
fapi_nr_search_space_t recovery_search_space;
// RA-Prioritization
uint8_t power_ramping_step_high_priority;
uint8_t scaling_factor_bi;
uint8_t beam_failure_recovery_timer;
} fapi_nr_beam_failure_recovery_config_t;
typedef struct {
fapi_nr_pucch_config_dedicated_t pucch_config_dedicated;
fapi_nr_pusch_config_dedicated_t pusch_config_dedicated;
fapi_nr_configured_grant_config_t configured_grant_config;
// SRS-Config
uint8_t srs_tpc_accumulation;
fapi_nr_beam_failure_recovery_config_t beam_failure_recovery_config;
} fapi_nr_ul_bwp_dedicated_config_t;
#define FAPI_NR_CONFIG_REQUEST_MASK_PBCH 0x01
#define FAPI_NR_CONFIG_REQUEST_MASK_DL_BWP_COMMON 0x02
#define FAPI_NR_CONFIG_REQUEST_MASK_UL_BWP_COMMON 0x04
#define FAPI_NR_CONFIG_REQUEST_MASK_DL_BWP_DEDICATED 0x08
#define FAPI_NR_CONFIG_REQUEST_MASK_UL_BWP_DEDICATED 0x10
typedef struct {
uint32_t config_mask;
fapi_nr_pbch_config_t pbch_config; // MIB
fapi_nr_dl_bwp_common_config_t dl_bwp_common;
fapi_nr_dl_bwp_dedicated_config_t dl_bwp_dedicated;
fapi_nr_ul_bwp_common_config_t ul_bwp_common;
fapi_nr_ul_bwp_dedicated_config_t ul_bwp_dedicated;
} fapi_nr_config_request_t;
#endif
nfapi/open-nFAPI/nfapi/public_inc/nfapi_interface.h
+37 -6
View File
@@ -1,12 +1,12 @@
/*
* Copyright 2017 Cisco Systems, Inc.
*
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
*
* http://www.apache.org/licenses/LICENSE-2.0
*
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
@@ -30,7 +30,7 @@
// These may be changed if desired. They are used in the encoder to make sure
// that the user has not specified a 'count' larger than the max array, and also
// used by the decoder when decode an array. If the 'count' received is larger
// than the array it is to be stored in the decode fails.
// than the array it is to be stored in the decode fails.
#define NFAPI_MAX_NUM_ANTENNAS 8
#define NFAPI_MAX_NUM_SUBBANDS 13
#define NFAPI_MAX_BF_VECTORS 8
@@ -74,6 +74,9 @@
#define NFAPI_VERSION_3_0_11 0x000
#define NFAPI_VERSION_3_0_12 0x001
#define NFAPI_HALF_FRAME_INDEX_FIRST_HALF 0
#define NFAPI_HALF_FRAME_INDEX_SECOND_HALF 1
// The IANA agreed port definition of the P5 SCTP VNF enpoint
// http://www.iana.org/assignments/service-names-port-numbers/service-names-port-numbers.xhtml?search=7701
#define NFAPI_P5_SCTP_PORT 7701
@@ -338,7 +341,8 @@ typedef enum {
NFAPI_3GPP_REL_SUPPORTED_9 = 1,
NFAPI_3GPP_REL_SUPPORTED_10 = 2,
NFAPI_3GPP_REL_SUPPORTED_11 = 4,
NFAPI_3GPP_REL_SUPPORTED_12 = 8
NFAPI_3GPP_REL_SUPPORTED_12 = 8,
NFAPI_3GPP_REL_SUPPORTED_15 = 64
} nfapi_3gpp_release_supported_e;
@@ -357,7 +361,8 @@ typedef enum {
NFAPI_RAT_TYPE_LTE = 0,
NFAPI_RAT_TYPE_UTRAN = 1,
NFAPI_RAT_TYPE_GERAN = 2,
NFAPI_RAT_TYPE_NB_IOT = 3
NFAPI_RAT_TYPE_NB_IOT = 3,
NFAPI_RAT_TYPE_NR = 4
} nfapi_rat_type_e;
typedef enum {
@@ -534,6 +539,16 @@ typedef struct {
} nfapi_pnf_phy_rel13_nb_iot_t;
#define NFAPI_PNF_PHY_REL13_NB_IOT_TAG 0x100E
typedef struct {
uint16_t phy_config_index;
} nfapi_pnf_phy_rel15_info_t;
typedef struct {
nfapi_tl_t tl;
uint16_t number_of_phys;
nfapi_pnf_phy_rel15_info_t phy[NFAPI_MAX_PNF_PHY];
} nfapi_pnf_phy_rel15_t;
#define NFAPI_PNF_PHY_REL15_TAG 0x100H
typedef struct {
@@ -619,6 +634,7 @@ typedef struct {
#define NFAPI_L23_CONFIG_SFNSF_TAG 0x00F1
typedef struct {
nfapi_uint16_tlv_t numerology_index_mu;
nfapi_uint16_tlv_t duplex_mode;
nfapi_uint16_tlv_t pcfich_power_offset;
nfapi_uint16_tlv_t pb;
@@ -631,6 +647,7 @@ typedef struct {
#define NFAPI_SUBFRAME_CONFIG_PB_TAG 0x0003
#define NFAPI_SUBFRAME_CONFIG_DL_CYCLIC_PREFIX_TYPE_TAG 0x0004
#define NFAPI_SUBFRAME_CONFIG_UL_CYCLIC_PREFIX_TYPE_TAG 0x0005
#define NFAPI_SUBFRAME_CONFIG_NUMEROLOGY_INDEX_MU_TAG 0x0006
typedef struct {
nfapi_uint16_tlv_t dl_channel_bandwidth;
@@ -656,15 +673,28 @@ typedef struct {
#define NFAPI_PHICH_CONFIG_PHICH_DURATION_TAG 0x0015
#define NFAPI_PHICH_CONFIG_PHICH_POWER_OFFSET_TAG 0x0016
typedef struct {
nfapi_uint16_tlv_t primary_synchronization_signal_epre_eprers;
nfapi_uint16_tlv_t secondary_synchronization_signal_epre_eprers;
nfapi_uint16_tlv_t physical_cell_id;
nfapi_uint16_tlv_t half_frame_index;
nfapi_uint16_tlv_t ssb_subcarrier_offset;
nfapi_uint16_tlv_t ssb_position_in_burst;
nfapi_uint16_tlv_t ssb_periodicity;
nfapi_uint16_tlv_t ss_pbch_block_power;
nfapi_uint16_tlv_t n_ssb_crb;
} nfapi_sch_config_t;
#define NFAPI_SCH_CONFIG_PRIMARY_SYNCHRONIZATION_SIGNAL_EPRE_EPRERS_TAG 0x001E
#define NFAPI_SCH_CONFIG_SECONDARY_SYNCHRONIZATION_SIGNAL_EPRE_EPRERS_TAG 0x001F
#define NFAPI_SCH_CONFIG_PHYSICAL_CELL_ID_TAG 0x0020
#define NFAPI_SCH_CONFIG_HALF_FRAME_INDEX_TAG 0x0021
#define NFAPI_SCH_CONFIG_SSB_SUBCARRIER_OFFSET_TAG 0x0022
#define NFAPI_SCH_CONFIG_SSB_POSITION_IN_BURST 0x0023
#define NFAPI_SCH_CONFIG_SSB_PERIODICITY 0x0024
#define NFAPI_SCH_CONFIG_SS_PBCH_BLOCK_POWER 0x0025
#define NFAPI_SCH_CONFIG_N_SSB_CRB 0x0025
typedef struct {
nfapi_uint16_tlv_t configuration_index;
@@ -1038,6 +1068,7 @@ typedef struct {
nfapi_pnf_phy_rel12_t pnf_phy_rel12;
nfapi_pnf_phy_rel13_t pnf_phy_rel13;
nfapi_pnf_phy_rel13_nb_iot_t pnf_phy_rel13_nb_iot;
nfapi_pnf_phy_rel15_t pnf_phy_rel15;
nfapi_vendor_extension_tlv_t vendor_extension;
} nfapi_pnf_param_response_t;
nfapi/open-nFAPI/nfapi/public_inc/nfapi_nr_interface.h
+551
View File
@@ -0,0 +1,551 @@
/*
nfapi_nr_interface.h
-------------------
AUTHOR : Raymond Knopp, Guy de Souza, WEI-TAI CHEN
COMPANY : EURECOM, NTUST
EMAIL : Lionel.Gauthier@eurecom.fr, desouza@eurecom.fr, kroempa@gmail.com
*/
#ifndef _NFAPI_NR_INTERFACE_H_
#define _NFAPI_NR_INTERFACE_H_
#include "nfapi_interface.h"
#define NFAPI_NR_MAX_NB_CCE_AGGREGATION_LEVELS 5
// Extension to the generic structures for single tlv values
typedef struct {
nfapi_tl_t tl;
int32_t value;
} nfapi_int32_tlv_t;
typedef struct {
nfapi_tl_t tl;
uint32_t value;
} nfapi_uint32_tlv_t;
/*typedef struct {
nfapi_tl_t tl;
int64_t value;
} nfapi_int64_tlv_t;
typedef struct {
nfapi_tl_t tl;
uint64_t value;
} nfapi_uint64_tlv_t;*/
// nFAPI enums
typedef enum {
NFAPI_NR_DL_CONFIG_DCI_DL_PDU_TYPE = 0,
NFAPI_NR_DL_CONFIG_BCH_PDU_TYPE,
NFAPI_NR_DL_CONFIG_DLSCH_PDU_TYPE,
NFAPI_NR_DL_CONFIG_PCH_PDU_TYPE,
NFAPI_NR_DL_CONFIG_NBCH_PDU_TYPE,
NFAPI_NR_DL_CONFIG_NPDCCH_PDU_TYPE,
NFAPI_NR_DL_CONFIG_NDLSCH_PDU_TYPE
} nfapi_nr_dl_config_pdu_type_e;
//These TLVs are used exclusively by nFAPI
typedef struct
{
// These TLVs are used to setup the transport connection between VNF and PNF
// nfapi_ipv4_address_t p7_vnf_address_ipv4;
// nfapi_ipv6_address_t p7_vnf_address_ipv6;
// nfapi_uint16_tlv_t p7_vnf_port;
// nfapi_ipv4_address_t p7_pnf_address_ipv4;
// nfapi_ipv6_address_t p7_pnf_address_ipv6;
// nfapi_uint16_tlv_t p7_pnf_port;
// // These TLVs are used to setup the transport connection between VNF and PNF
// nfapi_uint8_tlv_t dl_ue_per_sf;
// nfapi_uint8_tlv_t ul_ue_per_sf;
// These TLVs are used by PNF to report its RF capabilities to the VNF software
nfapi_rf_bands_t rf_bands;
// These TLVs are used by the VNF to configure the synchronization with the PNF.
// nfapi_uint8_tlv_t timing_window;
// nfapi_uint8_tlv_t timing_info_mode;
// nfapi_uint8_tlv_t timing_info_period;
// These TLVs are used by the VNF to configure the RF in the PNF
// nfapi_uint16_tlv_t max_transmit_power;
nfapi_uint16_tlv_t earfcn;
// nfapi_nmm_frequency_bands_t nmm_gsm_frequency_bands;
// nfapi_nmm_frequency_bands_t nmm_umts_frequency_bands;
// nfapi_nmm_frequency_bands_t nmm_lte_frequency_bands;
// nfapi_uint8_tlv_t nmm_uplink_rssi_supported;
} nfapi_nr_nfapi_t;
#define NFAPI_NR_NFAPI_P7_VNF_ADDRESS_IPV4_TAG 0x5100
#define NFAPI_NR_NFAPI_P7_VNF_ADDRESS_IPV6_TAG 0x5101
#define NFAPI_NR_NFAPI_P7_VNF_PORT_TAG 0x5102
#define NFAPI_NR_NFAPI_P7_PNF_ADDRESS_IPV4_TAG 0x5103
#define NFAPI_NR_NFAPI_P7_PNF_ADDRESS_IPV6_TAG 0x5104
#define NFAPI_NR_NFAPI_P7_PNF_PORT_TAG 0x5105
#define NFAPI_NR_NFAPI_DOWNLINK_UES_PER_SUBFRAME_TAG 0x510A
#define NFAPI_NR_NFAPI_UPLINK_UES_PER_SUBFRAME_TAG 0x510B
#define NFAPI_NR_NFAPI_RF_BANDS_TAG 0x5114
#define NFAPI_NR_NFAPI_TIMING_WINDOW_TAG 0x511E
#define NFAPI_NR_NFAPI_TIMING_INFO_MODE_TAG 0x511F
#define NFAPI_NR_NFAPI_TIMING_INFO_PERIOD_TAG 0x5120
#define NFAPI_NR_NFAPI_MAXIMUM_TRANSMIT_POWER_TAG 0x5128
#define NFAPI_NR_NFAPI_EARFCN_TAG 0x5129
#define NFAPI_NR_NFAPI_NMM_GSM_FREQUENCY_BANDS_TAG 0x5130
#define NFAPI_NR_NFAPI_NMM_UMTS_FREQUENCY_BANDS_TAG 0x5131
#define NFAPI_NR_NFAPI_NMM_LTE_FREQUENCY_BANDS_TAG 0x5132
#define NFAPI_NR_NFAPI_NMM_UPLINK_RSSI_SUPPORTED_TAG 0x5133
// P5 Message Structures
typedef struct{
nfapi_tl_t tl;
uint16_t corset_ID; ///// L1 parameter 'CORESET-ID'
uint16_t freq_dom; ///// L1 parameter 'CORESET-freq-dom'
uint16_t duration; ///// L1 parameter 'CORESET-time-duration'
uint16_t reg_type; ///// L1 parameter 'CORESET-CCE-REG-mapping-type'
uint16_t reg_bundlesize; ///// L1 parameter 'CORESET-REG-bundle-size'
uint16_t interleaversize; ///// L1 parameter 'CORESET-interleaver-size'
uint16_t shiftindex; ///// L1 parameter 'CORESET-shift-index'
uint16_t precodergranularity; ///// L1 parameter 'CORESET-precoder-granuality'
uint16_t tci_stateId; ///// L1 parameter 'TCI-StatesPDCCH'
uint16_t tci_present; ///// L1 parameter 'TCI-PresentInDCI'
uint16_t dmrs_scramblingID; ///// L1 parameter 'PDCCH-DMRS-Scrambling-ID'
} nfapi_nr_ControlResourcesSet_t;
typedef struct{
nfapi_tl_t tl;
nfapi_nr_ControlResourcesSet_t coreset;
uint16_t monitoringSlotPeriodicityAndOffset; ///// L1 parameters 'Montoring-periodicity-PDCCH-slot'
uint16_t monitoringSymbolsWithinSlot; ///// L1 parameter 'Montoring-symbols-PDCCH-within-slot'
uint16_t nrofCand_aggLevel1; ///// L1 parameter 'Aggregation-level-1'
uint16_t nrofCand_aggLevel2; ///// L1 parameter 'Aggregation-level-2'
uint16_t nrofCand_aggLevel4; ///// L1 parameter 'Aggregation-level-4'
uint16_t nrofCand_aggLevel8; ///// L1 parameter 'Aggregation-level-8'
uint16_t nrofCand_aggLevel16; ///// L1 parameter 'Aggregation-level-16'
uint16_t sfi_agg_fmt2_0; ///// L1 parameters 'SFI-Num-PDCCH-cand' and 'SFI-Aggregation-Level'
uint16_t monitoringperiodicity_fmt2_3; ///// L1 parameter 'SRS-monitoring-periodicity'
uint16_t nrof_candidates_fmt_2_3; ///// L1 parameter 'SRS-Num-PDCCH-cand'
} nfapi_nr_SearchSpace_t;
typedef struct {
nfapi_uint16_tlv_t numerology_index_mu;
nfapi_uint16_tlv_t duplex_mode;
nfapi_uint16_tlv_t dl_cyclic_prefix_type;
nfapi_uint16_tlv_t ul_cyclic_prefix_type;
} nfapi_nr_subframe_config_t;
#define NFAPI_NR_SUBFRAME_CONFIG_DUPLEX_MODE_TAG 0x5001
#define NFAPI_NR_SUBFRAME_CONFIG_PCFICH_POWER_OFFSET_TAG 0x5002
#define NFAPI_NR_SUBFRAME_CONFIG_PB_TAG 0x5003
#define NFAPI_NR_SUBFRAME_CONFIG_DL_CYCLIC_PREFIX_TYPE_TAG 0x5004
#define NFAPI_NR_SUBFRAME_CONFIG_UL_CYCLIC_PREFIX_TYPE_TAG 0x5005
#define NFAPI_NR_SUBFRAME_CONFIG_NUMEROLOGY_INDEX_MU_TAG 0x5006
typedef struct {
nfapi_uint16_tlv_t tx_antenna_ports;
nfapi_uint16_tlv_t rx_antenna_ports;
nfapi_uint16_tlv_t dl_carrier_bandwidth;
nfapi_uint16_tlv_t ul_carrier_bandwidth;
nfapi_uint16_tlv_t dl_bwp_subcarrierspacing;
nfapi_uint16_tlv_t ul_bwp_subcarrierspacing;
nfapi_uint16_tlv_t dl_locationandbandwidth;
nfapi_uint16_tlv_t ul_locationandbandwidth;
nfapi_uint16_tlv_t dl_absolutefrequencypointA;
nfapi_uint16_tlv_t ul_absolutefrequencypointA;
nfapi_uint16_tlv_t dl_offsettocarrier;
nfapi_uint16_tlv_t ul_offsettocarrier;
nfapi_uint16_tlv_t dl_scs_subcarrierspacing;
nfapi_uint16_tlv_t ul_scs_subcarrierspacing;
nfapi_uint16_tlv_t dl_scs_specificcarrier_k0;
nfapi_uint16_tlv_t ul_scs_specificcarrier_k0;
nfapi_uint16_tlv_t NIA_subcarrierspacing;
} nfapi_nr_rf_config_t;
#define NFAPI_NR_RF_CONFIG_DL_CHANNEL_BANDWIDTH_TAG 0x500A
#define NFAPI_NR_RF_CONFIG_UL_CHANNEL_BANDWIDTH_TAG 0x500B
#define NFAPI_NR_RF_CONFIG_REFERENCE_SIGNAL_POWER_TAG 0x500C
#define NFAPI_NR_RF_CONFIG_TX_ANTENNA_PORTS_TAG 0x500D
#define NFAPI_NR_RF_CONFIG_RX_ANTENNA_PORTS_TAG 0x500E
typedef struct {
nfapi_uint16_tlv_t physical_cell_id;
nfapi_uint16_tlv_t half_frame_index;
nfapi_uint16_tlv_t ssb_subcarrier_offset;
nfapi_uint16_tlv_t ssb_sib1_position_in_burst;
nfapi_uint16_tlv_t ssb_scg_position_in_burst;
nfapi_uint16_tlv_t ssb_periodicity;
nfapi_uint16_tlv_t ss_pbch_block_power;
nfapi_uint16_tlv_t n_ssb_crb;
nfapi_uint16_tlv_t rmsi_pdcch_config;
} nfapi_nr_sch_config_t;
#define NFAPI_NR_SCH_CONFIG_PHYSICAL_CELL_ID_TAG 0x501E
#define NFAPI_NR_SCH_CONFIG_HALF_FRAME_INDEX_TAG 0x501F
#define NFAPI_NR_SCH_CONFIG_SSB_SUBCARRIER_OFFSET_TAG 0x5020
#define NFAPI_NR_SCH_CONFIG_SSB_POSITION_IN_BURST 0x5021
#define NFAPI_NR_SCH_CONFIG_SSB_PERIODICITY 0x5022
#define NFAPI_NR_SCH_CONFIG_SS_PBCH_BLOCK_POWER 0x5023
#define NFAPI_NR_SCH_CONFIG_N_SSB_CRB 0x5024
typedef struct {
nfapi_uint16_tlv_t prach_RootSequenceIndex; ///// L1 parameter 'PRACHRootSequenceIndex'
nfapi_uint16_tlv_t prach_msg1_SubcarrierSpacing; ///// L1 parameter 'prach-Msg1SubcarrierSpacing'
nfapi_uint16_tlv_t restrictedSetConfig;
nfapi_uint16_tlv_t msg3_transformPrecoding; ///// L1 parameter 'msg3-tp'
/////////////////--------------------NR RACH-ConfigGeneric--------------------/////////////////
nfapi_uint16_tlv_t prach_ConfigurationIndex; ///// L1 parameter 'PRACHConfigurationIndex'
nfapi_uint16_tlv_t prach_msg1_FDM; ///// L1 parameter 'prach-FDM'
nfapi_uint16_tlv_t prach_msg1_FrequencyStart; ///// L1 parameter 'prach-frequency-start'
nfapi_uint16_tlv_t zeroCorrelationZoneConfig;
nfapi_uint16_tlv_t preambleReceivedTargetPower;
} nfapi_nr_rach_config_t;
typedef struct {
nfapi_uint16_tlv_t dmrs_TypeA_Position; ///// Position of (first) DL DM-RS
nfapi_uint16_tlv_t TimeDomainResourceAllocation_k0; ///// L1 parameter 'K0'
nfapi_uint16_tlv_t TimeDomainResourceAllocation_mappingType; ///// L1 parameter 'Mapping-type'
} nfapi_nr_pdsch_config_t;
typedef struct {
nfapi_uint16_tlv_t groupHoppingEnabledTransformPrecoding; ///// L1 parameter 'Group-hopping-enabled-Transform-precoding'
nfapi_uint16_tlv_t msg3_DeltaPreamble; ///// L1 parameter 'Delta-preamble-msg3'
nfapi_uint16_tlv_t p0_NominalWithGrant; ///// L1 parameter 'p0-nominal-pusch-withgrant'
nfapi_uint16_tlv_t TimeDomainResourceAllocation_k2; ///// L1 parameter 'K2'
nfapi_uint16_tlv_t TimeDomainResourceAllocation_mappingType; ///// L1 parameter 'Mapping-type'
} nfapi_nr_pusch_config_t;
typedef struct {
nfapi_uint16_tlv_t pucch_GroupHopping; ///// L1 parameter 'PUCCH-GroupHopping'
nfapi_uint16_tlv_t p0_nominal; ///// L1 parameter 'p0-nominal-pucch'
} nfapi_nr_pucch_config_t;
typedef struct {
nfapi_tl_t tl;
nfapi_nr_SearchSpace_t sib1searchSpace;
nfapi_nr_SearchSpace_t sibssearchSpace;
nfapi_nr_SearchSpace_t ra_SearchSpace;
}nfapi_nr_pdcch_config_t;
typedef struct {
//NR TDD-UL-DL-ConfigCommon ///// L1 parameter 'UL-DL-configuration-common'
nfapi_uint16_tlv_t subcarrierspacing; ///// L1 parameter 'reference-SCS'
nfapi_uint16_tlv_t dl_ul_periodicity; ///// L1 parameter 'DL-UL-transmission-periodicity'
nfapi_uint16_tlv_t nrofDownlinkSlots; ///// L1 parameter 'number-of-DL-slots'
nfapi_uint16_tlv_t nrofDownlinkSymbols; ///// L1 parameter 'number-of-DL-symbols-common'
nfapi_uint16_tlv_t nrofUplinkSlots; ///// L1 parameter 'number-of-UL-slots'
nfapi_uint16_tlv_t nrofUplinkSymbols; ///// L1 parameter 'number-of-UL-symbols-common'
} nfapi_nr_tdd_ul_dl_config_t;
typedef struct {
//RateMatchPattern is used to configure one rate matching pattern for PDSCH ///// L1 parameter 'Resource-set-cekk'
nfapi_uint16_tlv_t Match_Id;
nfapi_uint16_tlv_t patternType;
nfapi_uint16_tlv_t symbolsInResourceBlock; ///// L1 parameter 'rate-match-PDSCH-bitmap2
nfapi_uint16_tlv_t periodicityAndPattern; ///// L1 parameter 'rate-match-PDSCH-bitmap3'
nfapi_uint16_tlv_t controlResourceSet;
nfapi_uint16_tlv_t subcarrierSpacing; ///// L1 parameter 'resource-pattern-scs'
nfapi_uint16_tlv_t mode;
} nfapi_nr_ratematchpattern_t;
typedef struct {
//NR RateMatchPatternLTE-CRS
nfapi_uint16_tlv_t carrierfreqDL; ///// L1 parameter 'center-subcarrier-location'
nfapi_uint16_tlv_t dl_bandwidth; ///// L1 parameter 'BW'
nfapi_uint16_tlv_t nrofcrs_Ports; ///// L1 parameter 'rate-match-resources-numb-LTE-CRS-antenna-port'
nfapi_uint16_tlv_t v_Shift; ///// L1 parameter 'rate-match-resources-LTE-CRS-v-shift'
nfapi_uint16_tlv_t frame_Period;
nfapi_uint16_tlv_t frame_Offset;
} nfapi_nr_ratematchpattern_lte_crs_t;
typedef struct {
nfapi_p4_p5_message_header_t header;
uint8_t num_tlv;
nfapi_nr_subframe_config_t subframe_config;
nfapi_nr_rf_config_t rf_config;
nfapi_nr_sch_config_t sch_config;
nfapi_nr_rach_config_t rach_config;
nfapi_nr_pdsch_config_t pdsch_config;
nfapi_nr_pusch_config_t pusch_config;
nfapi_nr_pucch_config_t pucch_config;
nfapi_nr_pdcch_config_t pdcch_config;
nfapi_nr_tdd_ul_dl_config_t tdd_ul_dl_config;
nfapi_nr_ratematchpattern_t ratematchpattern;
nfapi_nr_ratematchpattern_lte_crs_t ratematchpattern_lte_crs;
nfapi_nr_nfapi_t nfapi_config;
nfapi_vendor_extension_tlv_t vendor_extension;
} nfapi_nr_config_request_t;
typedef enum {
NFAPI_NR_DL_DCI_FORMAT_1_0 = 0,
NFAPI_NR_DL_DCI_FORMAT_1_1,
NFAPI_NR_DL_DCI_FORMAT_2_0,
NFAPI_NR_DL_DCI_FORMAT_2_1,
NFAPI_NR_DL_DCI_FORMAT_2_2,
NFAPI_NR_DL_DCI_FORMAT_2_3,
NFAPI_NR_UL_DCI_FORMAT_0_0,
NFAPI_NR_UL_DCI_FORMAT_0_1
} nfapi_nr_dci_format_e;
typedef enum {
NFAPI_NR_RNTI_new = 0,
NFAPI_NR_RNTI_C,
NFAPI_NR_RNTI_RA,
NFAPI_NR_RNTI_P,
NFAPI_NR_RNTI_CS,
NFAPI_NR_RNTI_TC,
NFAPI_NR_RNTI_SP_CSI,
NFAPI_NR_RNTI_SI,
NFAPI_NR_RNTI_SFI,
NFAPI_NR_RNTI_INT,
NFAPI_NR_RNTI_TPC_PUSCH,
NFAPI_NR_RNTI_TPC_PUCCH,
NFAPI_NR_RNTI_TPC_SRS
} nfapi_nr_rnti_type_e;
typedef enum {
NFAPI_NR_USS_FORMAT_0_0_AND_1_0,
NFAPI_NR_USS_FORMAT_0_1_AND_1_1,
} nfapi_nr_uss_dci_formats_e;
typedef enum {
NFAPI_NR_SEARCH_SPACE_TYPE_COMMON=0,
NFAPI_NR_SEARCH_SPACE_TYPE_UE_SPECIFIC
} nfapi_nr_search_space_type_e;
typedef enum {
NFAPI_NR_SSB_AND_CSET_MUX_PATTERN_TYPE1=0,
NFAPI_NR_SSB_AND_CSET_MUX_PATTERN_TYPE2,
NFAPI_NR_SSB_AND_CSET_MUX_PATTERN_TYPE3
} nfapi_nr_ssb_and_cset_mux_pattern_type_e;
typedef enum {
NFAPI_NR_CCE_REG_MAPPING_INTERLEAVED=0,
NFAPI_NR_CCE_REG_MAPPING_NON_INTERLEAVED
} nfapi_nr_cce_reg_mapping_type_e;
typedef enum {
NFAPI_NR_CSET_CONFIG_MIB_SIB1=0,
NFAPI_NR_CSET_CONFIG_PDCCH_CONFIG
} nfapi_nr_coreset_config_type_e;
typedef enum {
NFAPI_NR_CSET_SAME_AS_REG_BUNDLE=0,
NFAPI_NR_CSET_ALL_CONTIGUOUS_RBS
} nfapi_nr_coreset_precoder_granularity_type_e;
// P7 Sub Structures
typedef struct {
nfapi_tl_t tl;
uint8_t format_indicator; //1 bit
uint16_t frequency_domain_assignment; //up to 16 bits
uint8_t time_domain_assignment; // 4 bits
uint8_t frequency_hopping_flag; //1 bit
uint8_t ra_preamble_index; //6 bits
uint8_t ss_pbch_index; //6 bits
uint8_t prach_mask_index; //4 bits
uint8_t vrb_to_prb_mapping; //0 or 1 bit
uint8_t mcs; //5 bits
uint8_t ndi; //1 bit
uint8_t rv; //2 bits
uint8_t harq_pid; //4 bits
uint8_t dai; //0, 2 or 4 bits
uint8_t dai1; //1 or 2 bits
uint8_t dai2; //0 or 2 bits
uint8_t tpc; //2 bits
uint8_t pucch_resource_indicator; //3 bits
uint8_t pdsch_to_harq_feedback_timing_indicator; //0, 1, 2 or 3 bits
uint8_t short_messages_indicator; //2 bits
uint8_t short_messages; //8 bits
uint8_t tb_scaling; //2 bits
uint8_t carrier_indicator; //0 or 3 bits
uint8_t bwp_indicator; //0, 1 or 2 bits
uint8_t prb_bundling_size_indicator; //0 or 1 bits
uint8_t rate_matching_indicator; //0, 1 or 2 bits
uint8_t zp_csi_rs_trigger; //0, 1 or 2 bits
uint8_t transmission_configuration_indication; //0 or 3 bits
uint8_t srs_request; //2 bits
uint8_t cbgti; //CBG Transmission Information: 0, 2, 4, 6 or 8 bits
uint8_t cbgfi; //CBG Flushing Out Information: 0 or 1 bit
uint8_t dmrs_sequence_initialization; //0 or 1 bit
uint8_t srs_resource_indicator;
uint8_t precoding_information;
uint8_t csi_request;
uint8_t ptrs_dmrs_association;
uint8_t beta_offset_indicator; //0 or 2 bits
uint8_t slot_format_indicator_count;
uint8_t *slot_format_indicators;
uint8_t pre_emption_indication_count;
uint16_t *pre_emption_indications; //14 bit
uint8_t block_number_count;
uint8_t *block_numbers;
uint8_t ul_sul_indicator; //0 or 1 bit
uint8_t antenna_ports;
uint16_t reserved; //1_0/C-RNTI:10 bits, 1_0/P-RNTI: 6 bits, 1_0/SI-&RA-RNTI: 16 bits
uint16_t padding;
} nfapi_nr_dl_config_dci_dl_pdu_rel15_t;
//#define NFAPI_NR_DL_CONFIG_REQUEST_DCI_DL_PDU_REL15_TAG 0x????
typedef struct{
nfapi_tl_t tl;
uint8_t coreset_id;
uint64_t frequency_domain_resources;
uint8_t duration;
uint8_t cce_reg_mapping_type;
uint8_t reg_bundle_size;
uint8_t interleaver_size;
uint8_t shift_index;
uint8_t precoder_granularity;
uint8_t tci_state_id;
uint8_t tci_present_in_dci;
uint32_t dmrs_scrambling_id;
} nfapi_nr_coreset_t;
typedef struct{
nfapi_tl_t tl;
uint8_t search_space_id;
uint8_t coreset_id;
uint8_t search_space_type;
uint8_t duration;
uint8_t css_formats_0_0_and_1_0;
uint8_t css_format_2_0;
uint8_t css_format_2_1;
uint8_t css_format_2_2;
uint8_t css_format_2_3;
uint8_t uss_dci_formats;
uint8_t srs_monitoring_periodicity;
uint8_t slot_monitoring_periodicity;
uint8_t slot_monitoring_offset;
uint16_t monitoring_symbols_in_slot;
uint16_t number_of_candidates[NFAPI_NR_MAX_NB_CCE_AGGREGATION_LEVELS];
} nfapi_nr_search_space_t;
typedef struct {
nfapi_tl_t tl;
uint8_t rnti;
uint8_t rnti_type;
uint8_t dci_format;
uint8_t config_type;
uint8_t search_space_type;
uint8_t aggregation_level;
uint8_t n_rb;
uint8_t n_symb;
uint8_t rb_offset;
uint8_t cr_mapping_type;
uint8_t reg_bundle_size;
uint8_t interleaver_size;
uint8_t shift_index;
uint8_t mux_pattern;
uint8_t precoder_granularity;
uint8_t first_slot;
uint8_t first_symbol;
uint8_t nb_ss_sets_per_slot;
uint8_t nb_slots;
uint8_t sfn_mod2;
uint16_t scrambling_id;
nfapi_bf_vector_t bf_vector;
} nfapi_nr_dl_config_pdcch_parameters_rel15_t;
typedef struct {
nfapi_tl_t tl;
uint16_t length;
int16_t pdu_index;
uint16_t transmission_power;
} nfapi_nr_dl_config_bch_pdu_rel15_t;
#define NFAPI_NR_DL_CONFIG_REQUEST_BCH_PDU_REL15_TAG 0x5025
typedef struct {
nfapi_nr_dl_config_bch_pdu_rel15_t bch_pdu_rel15;
} nfapi_nr_dl_config_bch_pdu;
typedef struct {
nfapi_tl_t tl;
nfapi_nr_search_space_t sib1searchSpace;
nfapi_nr_coreset_t sib1ControlResourceSets;
nfapi_nr_search_space_t sibssearchSpace;
nfapi_nr_coreset_t sibsControlResourceSets;
nfapi_nr_search_space_t ra_SearchSpace;
nfapi_nr_coreset_t ra_ControlResourceSets;
}nfapi_nr_dl_config_dlsch_pdu_rel15_t;
typedef struct {
nfapi_tl_t tl;
nfapi_nr_search_space_t pagingSearchSpace;
nfapi_nr_coreset_t pagingControlResourceSets;
}nfapi_nr_dl_config_pch_pdu_rel15_t;
typedef struct {
} nfapi_nr_dl_config_nbch_pdu;
typedef struct {
} nfapi_nr_dl_config_npdcch_pdu;
typedef struct {
} nfapi_nr_dl_config_ndlsch_pdu;
typedef struct {
nfapi_nr_dl_config_dci_dl_pdu_rel15_t dci_dl_pdu_rel15;
nfapi_nr_dl_config_pdcch_parameters_rel15_t pdcch_params_rel15;
} nfapi_nr_dl_config_dci_dl_pdu;
typedef struct {
uint8_t pdu_type;
uint8_t pdu_size;
union {
nfapi_nr_dl_config_dci_dl_pdu dci_dl_pdu;
nfapi_nr_dl_config_bch_pdu_rel15_t bch_pdu_rel15;
nfapi_nr_dl_config_dlsch_pdu_rel15_t dlsch_pdu_rel15;
nfapi_nr_dl_config_pch_pdu_rel15_t pch_pdu_rel15;
//nfapi_nr_dl_config_nbch_pdu_rel15_t nbch_pdu_rel15;
//nfapi_nr_dl_config_npdcch_pdu_rel15_t npdcch_pdu_rel15;
//nfapi_nr_dl_config_ndlsch_pdu_rel15_t ndlsch_pdu_rel15;
};
} nfapi_nr_dl_config_request_pdu_t;
typedef struct {
nfapi_tl_t tl;
uint8_t number_dci;
uint8_t number_pdu;
uint8_t number_pdsch_rnti;
nfapi_nr_dl_config_request_pdu_t *dl_config_pdu_list;
} nfapi_nr_dl_config_request_body_t;
typedef struct {
nfapi_p7_message_header_t header;
uint16_t sfn_sf;
nfapi_nr_dl_config_request_body_t dl_config_request_body;
nfapi_vendor_extension_tlv_t vendor_extension;
} nfapi_nr_dl_config_request_t;
#endif
oaienv
+3
View File
@@ -17,3 +17,6 @@ alias oait='cd $OPENAIR_TARGETS'
alias oailte='cd $OPENAIR_TARGETS/RT/USER'
alias oais='cd $OPENAIR_TARGETS/SIMU/USER'
alias oaiex='cd $OPENAIR_TARGETS/SIMU/EXAMPLES'
export IIOD_REMOTE=192.168.1.2
openair1/PHY/CODING/TESTBENCH/ldpctest.c
+368
View File
@@ -0,0 +1,368 @@
/*
* Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership.
* The OpenAirInterface Software Alliance licenses this file to You under
* the OAI Public License, Version 1.1 (the "License"); you may not use this file
* except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.openairinterface.org/?page_id=698
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*-------------------------------------------------------------------------------
* For more information about the OpenAirInterface (OAI) Software Alliance:
* contact@openairinterface.org
*/
#include <stdlib.h>
#include <math.h>
#include <stdio.h>
#include <string.h>
#include "SIMULATION/TOOLS/sim.h"
#include "PHY/CODING/nrLDPC_encoder/defs.h"
#include "PHY/CODING/nrLDPC_decoder/nrLDPC_decoder.h"
#define MAX_NUM_DLSCH_SEGMENTS 16
#ifndef malloc16
# ifdef __AVX2__
# define malloc16(x) memalign(32,x)
# else
# define malloc16(x) memalign(16,x)
# endif
#endif
// 4-bit quantizer
char quantize4bit(double D,double x)
{
double qxd;
qxd = floor(x/D);
// printf("x=%f,qxd=%f\n",x,qxd);
if (qxd <= -8)
qxd = -8;
else if (qxd > 7)
qxd = 7;
return((char)qxd);
}
char quantize(double D,double x,unsigned char B)
{
double qxd;
char maxlev;
qxd = floor(x/D);
// printf("x=%f,qxd=%f\n",x,qxd);
maxlev = 1<<(B-1);
if (qxd <= -maxlev)
qxd = -maxlev;
else if (qxd >= maxlev)
qxd = maxlev-1;
return((char)qxd);
}
#define MAX_BLOCK_LENGTH 8448
int test_ldpc(short No_iteration,
//int nom_rate,
//int denom_rate,
double SNR,
unsigned char qbits,
unsigned short block_length,
unsigned int ntrials,
unsigned int *errors,
unsigned int *crc_misses)
{
//clock initiate
time_stats_t time,time_optim,tinput,tprep,tparity,toutput;
opp_enabled=1;
cpu_freq_GHz = get_cpu_freq_GHz();
//short test_input[block_length];
unsigned char *test_input[MAX_NUM_DLSCH_SEGMENTS]={NULL,NULL,NULL,NULL,NULL,NULL,NULL,NULL};;
//short *c; //padded codeword
unsigned char *estimated_output;
unsigned char *channel_input[MAX_NUM_DLSCH_SEGMENTS];
unsigned char *channel_input_optim[MAX_NUM_DLSCH_SEGMENTS];
double *channel_output;
double *modulated_input;
char *channel_output_fixed;
unsigned int i,j,trial=0;
short BG,Zc,Kb;
//short nrows,ncols;
//int no_punctured_columns,removed_bit;
int i1;
//Table of possible lifting sizes
short lift_size[51]= {2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,18,20,22,24,26,28,30,32,36,40,44,48,52,56,60,64,72,80,88,96,104,112,120,128,144,160,176,192,208,224,240,256,288,320,352,384};
int n_segments=8;
int N; //length encoded block
t_nrLDPC_dec_params decParams;
int n_iter;
*errors=0;
*crc_misses=0;
// generate input block
for(j=0;j<MAX_NUM_DLSCH_SEGMENTS;j++) {
test_input[j]=(unsigned char *)malloc16(sizeof(unsigned char) * block_length/8);
channel_input[j] = (unsigned char *)malloc16(sizeof(unsigned char) * 68*384);
channel_input_optim[j] = (unsigned char *)malloc16(sizeof(unsigned char) * 68*384);
}
modulated_input = (double *)malloc(sizeof(double) * 68*384);
channel_output = (double *)malloc(sizeof(double) * 68*384);
channel_output_fixed = (char *)malloc16(sizeof(char) * 68*384);
estimated_output = (unsigned char*) malloc16(sizeof(unsigned char) * block_length);
memset(channel_output_fixed,0,sizeof(char) * 68*384);
reset_meas(&time);
reset_meas(&time_optim);
reset_meas(&tinput);
reset_meas(&tprep);
reset_meas(&tparity);
reset_meas(&toutput);
for (j=0;j<MAX_NUM_DLSCH_SEGMENTS;j++) {
for (i=0; i<block_length/8; i++) {
test_input[j][i]=(unsigned char) rand();
//test_input[j][i]=j%256;
}
}
//determine number of bits in codeword
if ((block_length>3840) && (block_length <= MAX_BLOCK_LENGTH))
{
BG=1;
Kb = 22;
//nrows=46; //parity check bits
//ncols=22; //info bits
}
else if (block_length<=3840)
{
BG=2;
//nrows=42; //parity check bits
//ncols=10; // info bits
if (block_length>640)
Kb = 10;
else if (block_length>560)
Kb = 9;
else if (block_length>192)
Kb = 8;
else
Kb = 6;
}
else {
printf("block_length %d not supported\n",block_length);
exit(-1);
}
//find minimum value in all sets of lifting size
Zc=0;
for (i1=0; i1 < 51; i1++)
{
if (lift_size[i1] >= (double) block_length/Kb)
{
Zc = lift_size[i1];
//printf("%d\n",Zc);
break;
}
}
if (BG==1)
N=66*Zc;
else if (BG==2)
N=50*Zc;
printf("ldpc_test: block_length %d, BG %d, Zc %d, Kb %d, N %d\n",block_length,BG, Zc, Kb, N);
//no_punctured_columns=(int)((nrows-2)*Zc+block_length-block_length*(1/((float)nom_rate/(float)denom_rate)))/Zc;
// printf("puncture:%d\n",no_punctured_columns);
//removed_bit=(nrows-no_punctured_columns-2) * Zc+block_length-(int)(block_length/((float)nom_rate/(float)denom_rate));
if (ntrials==0)
ldpc_encoder_orig(test_input[0],channel_input[0], block_length, BG, 1);
for (trial=0; trial < ntrials; trial++)
{
//// encoder
start_meas(&time);
for(j=0;j<n_segments;j++) {
ldpc_encoder_orig(test_input[j], channel_input[j],block_length,BG,0);
}
stop_meas(&time);
start_meas(&time_optim);
ldpc_encoder_optim_8seg(test_input,channel_input_optim,block_length,BG,n_segments,&tinput,&tprep,&tparity,&toutput);
/*for(j=0;j<n_segments;j++) {
ldpc_encoder_optim(test_input[j],channel_input_optim[j],block_length,BG,&tinput,&tprep,&tparity,&toutput);
}*/
stop_meas(&time_optim);
if (ntrials==1)
for (j=0;j<n_segments;j++)
for (i = 0; i < 3*block_length; i++)
if (channel_input[j][i]!=channel_input_optim[j][i]) {
printf("differ in seg %d pos %d (%d,%d)\n",j,i,channel_input[j][i],channel_input_optim[j][i]);
return (-1);
}
//print_meas_now(&time, "", stdout);
// for (i=0;i<6400;i++)
//printf("channel_input[%d]=%d\n",i,channel_input[i]);
//printf("%d ",channel_input[i]);
for (i = 2*Zc; i < 3*block_length; i++)
{
#ifdef DEBUG_CODER
if ((i&0xf)==0)
printf("\ne %d..%d: ",i,i+15);
#endif
if (channel_input[0][i-2*Zc]==0)
modulated_input[i]=1/sqrt(2); //BPSK
else
modulated_input[i]=-1/sqrt(2);
channel_output[i] = modulated_input[i] + gaussdouble(0.0,1.0) * 1/sqrt(2*SNR);
if (channel_output[i]>1.0)
channel_output_fixed[i]=127;
else if (channel_output[i]<-1.0)
channel_output_fixed[i]=-128;
else
channel_output_fixed[i] = (char) ((channel_output[i]*128)<0?(channel_output[i]*128-0.5):(channel_output[i]*128+0.5)); //fixed point 9-7
//printf("llr[%d]=%d (%f)\n",i,channel_output_fixed[i],channel_output[i]);
}
/*
the LDPC decoder supports several rates and the input has to be adapted accordingly (by padding with zeros to the next lower supported rate). Moreover, the first 2*Z LLRs are zero (since they are punctured and not transmitted) then you have the LLRs corresponding to the systematic bits. After that come the filler bits, the encoder uses 0 for the filler bits hence for the decoder you need to put 127 (max LLR for bit 0) at their place. Then come the LLRs corresponding to the punctured bits followed by zeros to pad for the supported decoder rate.
*/
for (i=0;i<2*Zc;i++)
channel_output_fixed[i] = 0;
decParams.BG=BG;
decParams.Z=Zc;
decParams.R=13;
decParams.numMaxIter=6;
decParams.outMode = nrLDPC_outMode_BIT;
// decode the sequence
// decoder supports BG2, Z=128 & 256
//estimated_output=ldpc_decoder(channel_output_fixed, block_length, No_iteration, (double)((float)nom_rate/(float)denom_rate));
n_iter = nrLDPC_decoder(&decParams, (int8_t*) channel_output_fixed, (int8_t*) estimated_output, NULL);
//for (i=(Kb+nrows) * Zc-5;i<(Kb+nrows) * Zc;i++)
// printf("esimated_output[%d]=%d\n",i,esimated_output[i]);
//count errors
for (i=0; i<block_length>>3; i++)
{
if (estimated_output[i] != test_input[0][i])
{
printf("error pos %d (%d, %d)\n",i,estimated_output[i],test_input[0][i]);
*errors = (*errors) + 1;
break;
}
}
}
for(j=0;j<MAX_NUM_DLSCH_SEGMENTS;j++) {
free(test_input[j]);
free(channel_input[j]);
free(channel_input_optim[j]);
}
free(modulated_input);
free(channel_output);
free(channel_output_fixed);
free(estimated_output);
print_meas(&time,"ldpc_encoder",NULL,NULL);
print_meas(&time_optim,"ldpc_encoder_optim",NULL,NULL);
print_meas(&tinput,"ldpc_encoder_optim(input)",NULL,NULL);
print_meas(&tprep,"ldpc_encoder_optim(prep)",NULL,NULL);
print_meas(&tparity,"ldpc_encoder_optim(parity)",NULL,NULL);
print_meas(&toutput,"ldpc_encoder_optim(output)",NULL,NULL);
return *errors;
}
int main(int argc, char *argv[])
{
unsigned int errors,crc_misses;
short block_length=576; // decoder supports length: 1201 -> 1280, 2401 -> 2560
short No_iteration=25;
//double rate=0.333;
//int nom_rate=1;
//int denom_rate=3;
double SNR0=-2.0,SNR,SNR_lin;
unsigned char qbits=4;
unsigned int decoded_errors[100]; // initiate the size of matrix equivalent to size of SNR
int c,i=0;
int n_trials = 1;
randominit(0);
while ((c = getopt (argc, argv, "q:s:l:n:h")) != -1)
switch (c)
{
case 'q':
qbits = atoi(optarg);
break;
case 'l':
block_length = atoi(optarg);
break;
case 'n':
n_trials = atoi(optarg);
break;
case 's':
SNR0 = atoi(optarg);
break;
default:
case 'h':
printf("usage ldpctest -h -l blocklength -n n_trials -s SNR\n");
exit(0);
}
//printf("the decoder supports BG2, Kb=10, Z=128 & 256\n");
//printf(" range of blocklength: 1201 -> 1280, 2401 -> 2560\n");
//printf("rate: %d/%d\n",nom_rate,denom_rate);
printf("block length %d: \n", block_length);
printf("n_trials %d: \n", n_trials);
printf("SNR0 %f: \n", SNR0);
//for (block_length=8;block_length<=MAX_BLOCK_LENGTH;block_length+=8)
for (SNR=SNR0;SNR<SNR0+1.0;SNR+=1.0)
{
SNR_lin = pow(10,SNR/10);
decoded_errors[i]=test_ldpc(No_iteration,
//nom_rate,
//denom_rate,
SNR_lin, // noise standard deviation
qbits,
block_length, // block length bytes
n_trials,
&errors,
&crc_misses);
printf("SNR %f, BLER %f (%d/%d)\n",SNR,(float)decoded_errors[i]/(float)n_trials,decoded_errors[i],n_trials);
i=i+1;
}
return(0);
}
openair1/PHY/CODING/TESTBENCH/polartest.c
+441
View File
@@ -0,0 +1,441 @@
#include <math.h>
#include <stdio.h>
#include <stdint.h>
#include <stdlib.h>
#include <string.h>
#include <sys/stat.h>
#include <time.h>
#include "PHY/CODING/nrPolar_tools/nr_polar_defs.h"
#include "PHY/CODING/coding_defs.h"
#include "SIMULATION/TOOLS/sim.h"
//#define DEBUG_DCI_POLAR_PARAMS
//#define DEBUG_POLAR_TIMING
//#define DEBUG_CRC
int main(int argc, char *argv[]) {
//Initiate timing. (Results depend on CPU Frequency. Therefore, might change due to performance variances during simulation.)
time_stats_t timeEncoder,timeDecoder;
time_stats_t polar_decoder_init,polar_rate_matching,decoding,bit_extraction,deinterleaving;
time_stats_t path_metric,sorting,update_LLR;
opp_enabled=1;
int decoder_int16=0;
int generate_optim_code=0;
cpu_freq_GHz = get_cpu_freq_GHz();
reset_meas(&timeEncoder);
reset_meas(&timeDecoder);
randominit(0);
crcTableInit();
//Default simulation values (Aim for iterations = 1000000.)
int itr, iterations = 1000, arguments, polarMessageType = 0; //0=PBCH, 1=DCI, -1=UCI
double SNRstart = -20.0, SNRstop = 0.0, SNRinc= 0.5; //dB
double SNR, SNR_lin;
int16_t nBitError = 0; // -1 = Decoding failed (All list entries have failed the CRC checks).
int8_t decoderState=0, blockErrorState=0; //0 = Success, -1 = Decoding failed, 1 = Block Error.
uint16_t testLength = 0, coderLength = 0, blockErrorCumulative=0, bitErrorCumulative=0;
double timeEncoderCumulative = 0, timeDecoderCumulative = 0;
uint8_t aggregation_level = 8, decoderListSize = 8, pathMetricAppr = 0;
while ((arguments = getopt (argc, argv, "s:d:f:m:i:l:a:hqg")) != -1)
switch (arguments)
{
case 's':
SNRstart = atof(optarg);
break;
case 'd':
SNRinc = atof(optarg);
break;
case 'f':
SNRstop = atof(optarg);
break;
case 'm':
polarMessageType = atoi(optarg);
break;
case 'i':
iterations = atoi(optarg);
break;
case 'l':
decoderListSize = (uint8_t) atoi(optarg);
break;
case 'a':
pathMetricAppr = (uint8_t) atoi(optarg);
break;
case 'q':
decoder_int16=1;
break;
case 'g':
generate_optim_code=1;
iterations=1;
SNRstart=-6.0;
SNRstop =-6.0;
decoder_int16=1;
break;
case 'h':
printf("./polartest -s SNRstart -d SNRinc -f SNRstop -m [0=PBCH|1=DCI|2=UCI] -i iterations -l decoderListSize -a pathMetricAppr -q (use fixed point decoder)\n");
exit(-1);
default:
perror("[polartest.c] Problem at argument parsing with getopt");
exit(-1);
}
if (polarMessageType == 0) { //PBCH
testLength = NR_POLAR_PBCH_PAYLOAD_BITS;
coderLength = NR_POLAR_PBCH_E;
aggregation_level = NR_POLAR_PBCH_AGGREGATION_LEVEL;
} else if (polarMessageType == 1) { //DCI
//testLength = nr_get_dci_size(params_rel15->dci_format, params_rel15->rnti_type, &fp->initial_bwp_dl, cfg);
testLength = 20;
coderLength = 108; //to be changed by aggregate level function.
} else if (polarMessageType == -1) { //UCI
//testLength = ;
//coderLength = ;
}
//Logging
time_t currentTime;
time (&currentTime);
char fileName[512], currentTimeInfo[25];
char folderName[] = ".";
/*
folderName=getenv("HOME");
strcat(folderName,"/Desktop/polartestResults");
*/
#ifdef DEBUG_POLAR_TIMING
sprintf(fileName,"%s/TIMING_ListSize_%d_pmAppr_%d_Payload_%d_Itr_%d",folderName,decoderListSize,pathMetricAppr,testLength,iterations);
#else
sprintf(fileName,"%s/_ListSize_%d_pmAppr_%d_Payload_%d_Itr_%d",folderName,decoderListSize,pathMetricAppr,testLength,iterations);
#endif
strftime(currentTimeInfo, 25, "_%Y-%m-%d-%H-%M-%S.csv", localtime(&currentTime));
strcat(fileName,currentTimeInfo);
//Create "~/Desktop/polartestResults" folder if it doesn't already exist.
/*
struct stat folder = {0};
if (stat(folderName, &folder) == -1) mkdir(folderName, S_IRWXU | S_IRWXG | S_IRWXO);
*/
FILE* logFile;
logFile = fopen(fileName, "w");
if (logFile==NULL) {
fprintf(stderr,"[polartest.c] Problem creating file %s with fopen\n",fileName);
exit(-1);
}
#ifdef DEBUG_POLAR_TIMING
fprintf(logFile,",timeEncoderCRCByte[us],timeEncoderCRCBit[us],timeEncoderInterleaver[us],timeEncoderBitInsertion[us],timeEncoder1[us],timeEncoder2[us],timeEncoderRateMatching[us],timeEncoderByte2Bit[us]\n");
#else
fprintf(logFile,",SNR,nBitError,blockErrorState,t_encoder[us],t_decoder[us]\n");
#endif
uint8_t testArrayLength = ceil(testLength / 32.0);
uint8_t coderArrayLength = ceil(coderLength / 32.0);
uint32_t *testInput = malloc(sizeof(uint32_t) * testArrayLength); //generate randomly
uint32_t *encoderOutput = malloc(sizeof(uint32_t) * coderArrayLength);
uint32_t *estimatedOutput = malloc(sizeof(uint32_t) * testArrayLength); //decoder output
memset(testInput,0,sizeof(uint32_t) * testArrayLength);
memset(encoderOutput,0,sizeof(uint32_t) * coderArrayLength);
memset(estimatedOutput,0,sizeof(uint32_t) * testArrayLength);
uint8_t *encoderOutputByte = malloc(sizeof(uint8_t) * coderLength);
double *modulatedInput = malloc (sizeof(double) * coderLength); //channel input
double *channelOutput = malloc (sizeof(double) * coderLength); //add noise
int16_t *channelOutput_int16;
if (decoder_int16 == 1) channelOutput_int16 = (int16_t*)malloc (sizeof(int16_t) * coderLength);
t_nrPolar_paramsPtr nrPolar_params = NULL, currentPtr = NULL;
nr_polar_init(&nrPolar_params, polarMessageType, testLength, aggregation_level);
currentPtr = nr_polar_params(nrPolar_params, polarMessageType, testLength, aggregation_level);
#ifdef DEBUG_DCI_POLAR_PARAMS
uint32_t dci_pdu[4];
memset(dci_pdu,0,sizeof(uint32_t)*4);
dci_pdu[0]=0x01189400;
printf("dci_pdu: [0]->0x%08x \t [1]->0x%08x \t [2]->0x%08x \t [3]->0x%08x\n",
dci_pdu[0], dci_pdu[1], dci_pdu[2], dci_pdu[3]);
uint32_t encoder_output[54];
memset(encoder_output,0,sizeof(uint32_t)*54);
uint16_t size=41;
uint16_t rnti=3;
aggregation_level=8;
nr_polar_init(&nrPolar_params, 1, size, aggregation_level);
t_nrPolar_paramsPtr currentPtrDCI=nr_polar_params(nrPolar_params, 1, size, aggregation_level);
polar_encoder_dci(dci_pdu, encoder_output, currentPtrDCI, rnti);
for (int i=0;i<54;i++)
printf("encoder_output: [%2d]->0x%08x \n",i, encoder_output[i]);
uint8_t *encoder_outputByte = malloc(sizeof(uint8_t) * currentPtrDCI->encoderLength);
double *channel_output = malloc (sizeof(double) * currentPtrDCI->encoderLength);
uint32_t dci_estimation[4];
memset(dci_estimation,0,sizeof(uint32_t)*4);
printf("dci_estimation: [0]->0x%08x \t [1]->0x%08x \t [2]->0x%08x \t [3]->0x%08x\n",
dci_estimation[0], dci_estimation[1], dci_estimation[2], dci_estimation[3]);
nr_bit2byte_uint32_8_t(encoder_output, currentPtrDCI->encoderLength, encoder_outputByte);
printf("[polartest] encoder_outputByte: ");
for (int i = 0; i < currentPtrDCI->encoderLength; i++) printf("%d-", encoder_outputByte[i]);
printf("\n");
for(int i=0; i<currentPtrDCI->encoderLength; i++) {
if (encoder_outputByte[i] == 0) {
channel_output[i]=1/sqrt(2);
}
else {
channel_output[i]=(-1)/sqrt(2);
}
}
decoderState = polar_decoder_dci(channel_output,
dci_estimation,
currentPtrDCI,
NR_POLAR_DECODER_LISTSIZE,
NR_POLAR_DECODER_PATH_METRIC_APPROXIMATION,
rnti);
printf("dci_estimation: [0]->0x%08x \t [1]->0x%08x \t [2]->0x%08x \t [3]->0x%08x\n",
dci_estimation[0], dci_estimation[1], dci_estimation[2], dci_estimation[3]);
return 0;
#endif
#ifdef DEBUG_CRC
uint32_t crc;
unsigned int poly24c = 0xb2b11700;
uint32_t testInputCRC[4];
testInputCRC[0]=0x00291880;
//testInputCRC[0]=0x01189400;
testInputCRC[1]=0x00000000;
testInputCRC[2]=0x00000000;
testInputCRC[3]=0x00000000;
uint32_t testInputcrc=0x01189400;
uint32_t testInputcrc2=0x00291880;
uint8_t testInputCRC2[8];
nr_crc_bit2bit_uint32_8_t(testInputCRC, 32, testInputCRC2);
printf("testInputCRC2: [0]->%x \t [1]->%x \t [2]->%x \t [3]->%x\n"
" [4]->%x \t [5]->%x \t [6]->%x \t [7]->%x\n",
testInputCRC2[0], testInputCRC2[1], testInputCRC2[2], testInputCRC2[3],
testInputCRC2[4], testInputCRC2[5], testInputCRC2[6], testInputCRC2[7]);
unsigned int crc41 = crc24c(testInputCRC, 32);
unsigned int crc65 = crc24c(testInputCRC, 56);
printf("crc41: [0]->0x%08x\tcrc65: [0]->0x%08x\n",crc41, crc65);
for (int i=0;i<32;i++) printf("crc41[%d]=%d\tcrc65[%d]=%d\n",i,(crc41>>i)&1,i,(crc65>>i)&1);
crc = crc24c(testInputCRC, testLength)>>8;
for (int i=0;i<24;i++) printf("[i]=%d\n",(crc>>i)&1);
printf("crc: [0]->0x%08x\n",crc);
//crcbit(testInputCRC, sizeof(test) - 1, poly24c));
testInputCRC[testLength>>3] = ((uint8_t*)&crc)[2];
testInputCRC[1+(testLength>>3)] = ((uint8_t*)&crc)[1];
testInputCRC[2+(testLength>>3)] = ((uint8_t*)&crc)[0];
printf("testInputCRC: [0]->0x%08x \t [1]->0x%08x \t [2]->0x%08x \t [3]->0x%08x\n",
testInputCRC[0], testInputCRC[1], testInputCRC[2], testInputCRC[3]);
//uint32_t trial32 = 0xffffffff;
uint32_t trial32 = 0xf10fffff;
uint8_t a[4];
//memcpy(a, &trial32, sizeof(trial32));
*(uint32_t *)a = trial32;
unsigned char trial[4];
trial[0]=0xff; trial[1]=0xff; trial[2]=0x0f; trial[3]=0xf1;
uint32_t trialcrc = crc24c(trial, 32);
uint32_t trialcrc32 = crc24c((uint8_t *)&trial32, 32);
//uint32_t trialcrc32 = crc24c(a, 32);
printf("crcbit(trial = %x\n", crcbit(trial, 4, poly24c));
printf("trialcrc = %x\n", trialcrc);
printf("trialcrc32 = %x\n", trialcrc32);
for (int i=0;i<32;i++) printf("trialcrc[%2d]=%d\ttrialcrc32[%2d]=%d\n",i,(trialcrc>>i)&1,i,(trialcrc32>>i)&1);
//uint8_t nr_polar_A[32] = {1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1};
uint8_t nr_polar_A[32] = {1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,0,0,0,0,1,1,1,1,1,1,1,1,0,0,0,1};
uint8_t nr_polar_crc[24];
uint8_t **crc_generator_matrix = crc24c_generator_matrix(32);
nr_matrix_multiplication_uint8_t_1D_uint8_t_2D(nr_polar_A,
crc_generator_matrix,
nr_polar_crc,
32,
24);
for (uint8_t i = 0; i < 24; i++){
nr_polar_crc[i] = (nr_polar_crc[i] % 2);
printf("nr_polar_crc[%d]=%d\n",i,nr_polar_crc[i]);
}
return 0;
#endif
#ifdef DEBUG_POLAR_TIMING
for (SNR = SNRstart; SNR <= SNRstop; SNR += SNRinc) {
SNR_lin = pow(10, SNR / 10);
for (itr = 1; itr <= iterations; itr++) {
for (int j=0; j<ceil(testLength / 32.0); j++) {
for(int i=0; i<32; i++) {
testInput[j] |= ( ((uint32_t) (rand()%2)) &1);
testInput[j]<<=1;
}
}
printf("testInput: [0]->0x%08x \n", testInput[0]);
polar_encoder_timing(testInput, encoderOutput, currentPtr, cpu_freq_GHz, logFile);
}
}
fclose(logFile);
free(testInput);
free(encoderOutput);
free(modulatedInput);
free(channelOutput);
free(estimatedOutput);
return (0);
#endif
// We assume no a priori knowledge available about the payload.
double aPrioriArray[currentPtr->payloadBits];
for (int i=0; i<currentPtr->payloadBits; i++) aPrioriArray[i] = NAN;
for (SNR = SNRstart; SNR <= SNRstop; SNR += SNRinc) {
printf("SNR %f\n",SNR);
SNR_lin = pow(10, SNR/10);
for (itr = 1; itr <= iterations; itr++) {
for (int i = 0; i < testArrayLength; i++) {
for (int j = 0; j < (sizeof(testInput[0])*8)-1; j++) {
testInput[i] |= ( ((uint32_t) (rand()%2)) &1);
testInput[i]<<=1;
}
testInput[i] |= ( ((uint32_t) (rand()%2)) &1);
}
/*printf("testInput: [0]->0x%08x\n", testInput[0]);
for (int i=0; i<32; i++)
printf("%d\n",(testInput[0]>>i)&1);*/
start_meas(&timeEncoder);
polar_encoder(testInput, encoderOutput, currentPtr);
stop_meas(&timeEncoder);
/*printf("encoderOutput: [0]->0x%08x\n", encoderOutput[0]);
printf("encoderOutput: [1]->0x%08x\n", encoderOutput[1]);*/
//Bit-to-byte:
nr_bit2byte_uint32_8_t(encoderOutput, coderLength, encoderOutputByte);
//BPSK modulation
for(int i=0; i<coderLength; i++) {
if (encoderOutputByte[i] == 0)
modulatedInput[i]=1/sqrt(2);
else
modulatedInput[i]=(-1)/sqrt(2);
channelOutput[i] = modulatedInput[i] + (gaussdouble(0.0,1.0) * (1/sqrt(2*SNR_lin)));
if (decoder_int16==1) {
if (channelOutput[i] > 15) channelOutput_int16[i] = 127;
else if (channelOutput[i] < -16) channelOutput_int16[i] = -128;
else channelOutput_int16[i] = (int16_t) (8*channelOutput[i]);
}
}
start_meas(&timeDecoder);
/*decoderState = polar_decoder(channelOutput,
estimatedOutput,
currentPtr,
NR_POLAR_DECODER_LISTSIZE,
aPrioriArray,
NR_POLAR_DECODER_PATH_METRIC_APPROXIMATION);*/
if (decoder_int16==0)
decoderState = polar_decoder_aPriori(channelOutput,
estimatedOutput,
currentPtr,
NR_POLAR_DECODER_LISTSIZE,
NR_POLAR_DECODER_PATH_METRIC_APPROXIMATION,
aPrioriArray);
else
decoderState = polar_decoder_int16(channelOutput_int16,
estimatedOutput,
currentPtr);
stop_meas(&timeDecoder);
/*printf("testInput: [0]->0x%08x\n", testInput[0]);
printf("estimatedOutput: [0]->0x%08x\n", estimatedOutput[0]);*/
//calculate errors
if (decoderState==-1) {
blockErrorState=-1;
nBitError=-1;
} else {
for (int i = 0; i < testArrayLength; i++) {
for (int j = 0; j < (sizeof(testInput[0])*8); j++) {
if (((estimatedOutput[i]>>j) & 1) != ((testInput[i]>>j) & 1)) nBitError++;
}
}
if (nBitError>0) blockErrorState=1;
}
//Iteration times are in microseconds.
timeEncoderCumulative+=(timeEncoder.diff/(cpu_freq_GHz*1000.0));
timeDecoderCumulative+=(timeDecoder.diff/(cpu_freq_GHz*1000.0));
fprintf(logFile,",%f,%d,%d,%f,%f\n", SNR, nBitError, blockErrorState,
(timeEncoder.diff/(cpu_freq_GHz*1000.0)), (timeDecoder.diff/(cpu_freq_GHz*1000.0)));
if (nBitError<0) {
blockErrorCumulative++;
bitErrorCumulative+=testLength;
} else {
blockErrorCumulative+=blockErrorState;
bitErrorCumulative+=nBitError;
}
decoderState=0;
nBitError=0;
blockErrorState=0;
}
//Calculate error statistics for the SNR.
printf("[ListSize=%d, Appr=%d] SNR=%+8.3f, BLER=%9.6f, BER=%12.9f, t_Encoder=%9.3fus, t_Decoder=%9.3fus\n",
decoderListSize, pathMetricAppr, SNR, ((double)blockErrorCumulative/iterations),
((double)bitErrorCumulative / (iterations*testLength)),
(timeEncoderCumulative/iterations),timeDecoderCumulative/iterations);
if (blockErrorCumulative==0 && bitErrorCumulative==0)
break;
blockErrorCumulative = 0; bitErrorCumulative = 0;
timeEncoderCumulative = 0; timeDecoderCumulative = 0;
}
print_meas(&timeEncoder,"polar_encoder",NULL,NULL);
print_meas(&timeDecoder,"polar_decoder",NULL,NULL);
fclose(logFile);
//Bit
free(testInput);
free(encoderOutput);
free(estimatedOutput);
//Byte
free(encoderOutputByte);
free(modulatedInput);
free(channelOutput);
return (0);
}
openair1/PHY/CODING/coding_defs.h
+31 -9
View File
@@ -347,7 +347,7 @@ based on 3GPP UMTS/LTE specifications.
@param inPtr Pointer to input byte stream
@param bitlen length of inputs in bits
*/
uint32_t crc24a (uint8_t * inptr, uint32_t bitlen);
unsigned int crc24a (unsigned char * inptr, int bitlen);
/*!\fn uint32_t crc24b(uint8_t *inPtr, int32_t bitlen)
\brief This computes a 24-bit crc ('b' variant for transport-block segments)
@@ -355,25 +355,33 @@ based on 3GPP UMTS/LTE specifications.
@param inPtr Pointer to input byte stream
@param bitlen length of inputs in bits
*/
uint32_t crc24b (uint8_t * inptr, uint32_t bitlen);
uint32_t crc24b (uint8_t *inPtr, int32_t bitlen);
/*!\fn uint32_t crc24c(uint8_t *inPtr, int32_t bitlen)
\brief This computes a 24-bit crc ('c' variant for transport-block segments)
based on 3GPP Rel 15 specifications.
@param inPtr Pointer to input byte stream
@param bitlen length of inputs in bits
*/
uint32_t crc24c (uint8_t *inPtr, int32_t bitlen);
/*!\fn uint32_t crc16(uint8_t *inPtr, int32_t bitlen)
\brief This computes a 16-bit crc based on 3GPP UMTS specifications.
@param inPtr Pointer to input byte stream
@param bitlen length of inputs in bits*/
uint32_t crc16 (uint8_t * inptr, uint32_t bitlen);
unsigned int crc16 (unsigned char * inptr, int bitlen);
/*!\fn uint32_t crc12(uint8_t *inPtr, int32_t bitlen)
\brief This computes a 12-bit crc based on 3GPP UMTS specifications.
@param inPtr Pointer to input byte stream
@param bitlen length of inputs in bits*/
uint32_t crc12 (uint8_t * inptr, uint32_t bitlen);
unsigned int crc12 (unsigned char * inptr, int bitlen);
/*!\fn uint32_t crc8(uint8_t *inPtr, int32_t bitlen)
\brief This computes a 8-bit crc based on 3GPP UMTS specifications.
@param inPtr Pointer to input byte stream
@param bitlen length of inputs in bits*/
uint32_t crc8 (uint8_t * inptr, uint32_t bitlen);
unsigned int crc8 (unsigned char * inptr, int bitlen);
/*!\fn void phy_viterbi_dot11_sse2(int8_t *y, uint8_t *decoded_bytes, uint16_t n,int offset,int traceback)
\brief This routine performs a SIMD optmized Viterbi decoder for the 802.11 64-state convolutional code. It can be
@@ -431,9 +439,7 @@ int32_t rate_matching_lte(uint32_t N_coded,
uint32_t crcbit (uint8_t * ,
int32_t,
uint32_t);
unsigned int crcbit (unsigned char * inputptr, int octetlen, unsigned int poly);
int16_t reverseBits(int32_t ,int32_t);
void phy_viterbi_dot11(int8_t *,uint8_t *,uint16_t);
@@ -442,4 +448,20 @@ decoder_if_t phy_threegpplte_turbo_decoder;
decoder_if_t phy_threegpplte_turbo_decoder8;
decoder_if_t phy_threegpplte_turbo_decoder16;
int32_t nr_segmentation(unsigned char *input_buffer,
unsigned char **output_buffers,
unsigned int B,
unsigned int *C,
unsigned int *Kplus,
unsigned int *Kminus,
unsigned int *Zout,
unsigned int *F);
uint32_t nr_compute_tbs(uint8_t mcs,
uint16_t nb_rb,
uint16_t nb_symb_sch,
uint8_t nb_re_dmrs,
uint16_t length_dmrs,
uint8_t Nl);
#endif
openair1/PHY/CODING/crc_byte.c
+190 -136
View File
@@ -30,196 +30,250 @@
Modified in June, 2001, to include the length non multiple of 8
*/
#include "PHY/types.h"
// For initialization && verification purposes, bit by bit implementation with any polynomial
// The first bit is in the MSB of each byte
#include "coding_defs.h"
// Reference 38.212 V15.1.1 Section 5.1 (36-212 v8.6.0 , pp 8-9)
// The highest degree is set by default
/** 1000 0110 0100 1100 1111 1011 D^24 + D^23 + D^18 + D^17 + D^14 + D^11 + D^10 + D^7 + D^6 + D^5 + D^4 + D^3 + D + 1 */
static const uint32_t poly24a = 0x864cfb00;
/** 1000 0000 0000 0000 0110 0011 D^24 + D^23 + D^6 + D^5 + D + 1 */
static const uint32_t poly24b = 0x80006300;
/** 0001 0000 0010 0001 D^16 + D^12 + D^5 + 1 */
static const uint32_t poly16 = 0x10210000;
/** 1000 0000 1111 D^12 + D^11 + D^3 + D^2 + D + 1 */
static const uint32_t poly12 = 0x80F00000;
/** 1001 1011 D^8 + D^7 + D^4 + D^3 + D + 1 */
static const uint32_t poly8 = 0x9B000000;
/*ref 36-212 v8.6.0 , pp 8-9 */
/* the highest degree is set by default */
unsigned int poly24a = 0x864cfb00; // 1000 0110 0100 1100 1111 1011
// D^24 + D^23 + D^18 + D^17 + D^14 + D^11 + D^10 + D^7 + D^6 + D^5 + D^4 + D^3 + D + 1
unsigned int poly24b = 0x80006300; // 1000 0000 0000 0000 0110 0011
// D^24 + D^23 + D^6 + D^5 + D + 1
unsigned int poly24c = 0xb2b11700; // 1011 0010 1011 0001 0001 0111
// D^24+D^23+D^21+D^20+D^17+D^15+D^13+D^12+D^8+D^4+D^2+D+1
unsigned int poly16 = 0x10210000; // 0001 0000 0010 0001 D^16 + D^12 + D^5 + 1
unsigned int poly12 = 0x80F00000; // 1000 0000 1111 D^12 + D^11 + D^3 + D^2 + D + 1
unsigned int poly8 = 0x9B000000; // 1001 1011 D^8 + D^7 + D^4 + D^3 + D + 1
uint32_t poly6 = 0x84000000; // 10000100000... -> D^6+D^5+1
uint32_t poly11 = 0xc4200000; //11000100001000... -> D^11+D^10+D^9+D^5+1
// The following arrays are generated with the function 'crcTableInit'
/** Encoding table for CRC 24A */
static const uint32_t crc24aTable[256] = {0x0, 0x864cfb00, 0x8ad50d00, 0xc99f600, 0x93e6e100, 0x15aa1a00, 0x1933ec00, 0x9f7f1700, 0xa1813900, 0x27cdc200, 0x2b543400, 0xad18cf00, 0x3267d800, 0xb42b2300, 0xb8b2d500, 0x3efe2e00, 0xc54e8900, 0x43027200, 0x4f9b8400, 0xc9d77f00, 0x56a86800, 0xd0e49300, 0xdc7d6500, 0x5a319e00, 0x64cfb000, 0xe2834b00, 0xee1abd00, 0x68564600, 0xf7295100, 0x7165aa00, 0x7dfc5c00, 0xfbb0a700, 0xcd1e900, 0x8a9d1200, 0x8604e400, 0x481f00, 0x9f370800, 0x197bf300, 0x15e20500, 0x93aefe00, 0xad50d000, 0x2b1c2b00, 0x2785dd00, 0xa1c92600, 0x3eb63100, 0xb8faca00, 0xb4633c00, 0x322fc700, 0xc99f6000, 0x4fd39b00, 0x434a6d00, 0xc5069600, 0x5a798100, 0xdc357a00, 0xd0ac8c00, 0x56e07700, 0x681e5900, 0xee52a200, 0xe2cb5400, 0x6487af00, 0xfbf8b800, 0x7db44300, 0x712db500, 0xf7614e00, 0x19a3d200, 0x9fef2900, 0x9376df00, 0x153a2400, 0x8a453300, 0xc09c800, 0x903e00, 0x86dcc500, 0xb822eb00, 0x3e6e1000, 0x32f7e600, 0xb4bb1d00, 0x2bc40a00, 0xad88f100, 0xa1110700, 0x275dfc00, 0xdced5b00, 0x5aa1a000, 0x56385600, 0xd074ad00, 0x4f0bba00, 0xc9474100, 0xc5deb700, 0x43924c00, 0x7d6c6200, 0xfb209900, 0xf7b96f00, 0x71f59400, 0xee8a8300, 0x68c67800, 0x645f8e00, 0xe2137500, 0x15723b00, 0x933ec000, 0x9fa73600, 0x19ebcd00, 0x8694da00, 0xd82100, 0xc41d700, 0x8a0d2c00, 0xb4f30200, 0x32bff900, 0x3e260f00, 0xb86af400, 0x2715e300, 0xa1591800, 0xadc0ee00, 0x2b8c1500, 0xd03cb200, 0x56704900, 0x5ae9bf00, 0xdca54400, 0x43da5300, 0xc596a800, 0xc90f5e00, 0x4f43a500, 0x71bd8b00, 0xf7f17000, 0xfb688600, 0x7d247d00, 0xe25b6a00, 0x64179100, 0x688e6700, 0xeec29c00, 0x3347a400, 0xb50b5f00, 0xb992a900, 0x3fde5200, 0xa0a14500, 0x26edbe00, 0x2a744800, 0xac38b300, 0x92c69d00, 0x148a6600, 0x18139000, 0x9e5f6b00, 0x1207c00, 0x876c8700, 0x8bf57100, 0xdb98a00, 0xf6092d00, 0x7045d600, 0x7cdc2000, 0xfa90db00, 0x65efcc00, 0xe3a33700, 0xef3ac100, 0x69763a00, 0x57881400, 0xd1c4ef00, 0xdd5d1900, 0x5b11e200, 0xc46ef500, 0x42220e00, 0x4ebbf800, 0xc8f70300, 0x3f964d00, 0xb9dab600, 0xb5434000, 0x330fbb00, 0xac70ac00, 0x2a3c5700, 0x26a5a100, 0xa0e95a00, 0x9e177400, 0x185b8f00, 0x14c27900, 0x928e8200, 0xdf19500, 0x8bbd6e00, 0x87249800, 0x1686300, 0xfad8c400, 0x7c943f00, 0x700dc900, 0xf6413200, 0x693e2500, 0xef72de00, 0xe3eb2800, 0x65a7d300, 0x5b59fd00, 0xdd150600, 0xd18cf000, 0x57c00b00, 0xc8bf1c00, 0x4ef3e700, 0x426a1100, 0xc426ea00, 0x2ae47600, 0xaca88d00, 0xa0317b00, 0x267d8000, 0xb9029700, 0x3f4e6c00, 0x33d79a00, 0xb59b6100, 0x8b654f00, 0xd29b400, 0x1b04200, 0x87fcb900, 0x1883ae00, 0x9ecf5500, 0x9256a300, 0x141a5800, 0xefaaff00, 0x69e60400, 0x657ff200, 0xe3330900, 0x7c4c1e00, 0xfa00e500, 0xf6991300, 0x70d5e800, 0x4e2bc600, 0xc8673d00, 0xc4fecb00, 0x42b23000, 0xddcd2700, 0x5b81dc00, 0x57182a00, 0xd154d100, 0x26359f00, 0xa0796400, 0xace09200, 0x2aac6900, 0xb5d37e00, 0x339f8500, 0x3f067300, 0xb94a8800, 0x87b4a600, 0x1f85d00, 0xd61ab00, 0x8b2d5000, 0x14524700, 0x921ebc00, 0x9e874a00, 0x18cbb100, 0xe37b1600, 0x6537ed00, 0x69ae1b00, 0xefe2e000, 0x709df700, 0xf6d10c00, 0xfa48fa00, 0x7c040100, 0x42fa2f00, 0xc4b6d400, 0xc82f2200, 0x4e63d900, 0xd11cce00, 0x57503500, 0x5bc9c300, 0xdd853800};
/*********************************************************
/** Encoding table for CRC 24B */
static const uint32_t crc24bTable[256] = {0x0, 0x80006300, 0x8000a500, 0xc600, 0x80012900, 0x14a00, 0x18c00, 0x8001ef00, 0x80023100, 0x25200, 0x29400, 0x8002f700, 0x31800, 0x80037b00, 0x8003bd00, 0x3de00, 0x80040100, 0x46200, 0x4a400, 0x8004c700, 0x52800, 0x80054b00, 0x80058d00, 0x5ee00, 0x63000, 0x80065300, 0x80069500, 0x6f600, 0x80071900, 0x77a00, 0x7bc00, 0x8007df00, 0x80086100, 0x80200, 0x8c400, 0x8008a700, 0x94800, 0x80092b00, 0x8009ed00, 0x98e00, 0xa5000, 0x800a3300, 0x800af500, 0xa9600, 0x800b7900, 0xb1a00, 0xbdc00, 0x800bbf00, 0xc6000, 0x800c0300, 0x800cc500, 0xca600, 0x800d4900, 0xd2a00, 0xdec00, 0x800d8f00, 0x800e5100, 0xe3200, 0xef400, 0x800e9700, 0xf7800, 0x800f1b00, 0x800fdd00, 0xfbe00, 0x8010a100, 0x10c200, 0x100400, 0x80106700, 0x118800, 0x8011eb00, 0x80112d00, 0x114e00, 0x129000, 0x8012f300, 0x80123500, 0x125600, 0x8013b900, 0x13da00, 0x131c00, 0x80137f00, 0x14a000, 0x8014c300, 0x80140500, 0x146600, 0x80158900, 0x15ea00, 0x152c00, 0x80154f00, 0x80169100, 0x16f200, 0x163400, 0x80165700, 0x17b800, 0x8017db00, 0x80171d00, 0x177e00, 0x18c000, 0x8018a300, 0x80186500, 0x180600, 0x8019e900, 0x198a00, 0x194c00, 0x80192f00, 0x801af100, 0x1a9200, 0x1a5400, 0x801a3700, 0x1bd800, 0x801bbb00, 0x801b7d00, 0x1b1e00, 0x801cc100, 0x1ca200, 0x1c6400, 0x801c0700, 0x1de800, 0x801d8b00, 0x801d4d00, 0x1d2e00, 0x1ef000, 0x801e9300, 0x801e5500, 0x1e3600, 0x801fd900, 0x1fba00, 0x1f7c00, 0x801f1f00, 0x80212100, 0x214200, 0x218400, 0x8021e700, 0x200800, 0x80206b00, 0x8020ad00, 0x20ce00, 0x231000, 0x80237300, 0x8023b500, 0x23d600, 0x80223900, 0x225a00, 0x229c00, 0x8022ff00, 0x252000, 0x80254300, 0x80258500, 0x25e600, 0x80240900, 0x246a00, 0x24ac00, 0x8024cf00, 0x80271100, 0x277200, 0x27b400, 0x8027d700, 0x263800, 0x80265b00, 0x80269d00, 0x26fe00, 0x294000, 0x80292300, 0x8029e500, 0x298600, 0x80286900, 0x280a00, 0x28cc00, 0x8028af00, 0x802b7100, 0x2b1200, 0x2bd400, 0x802bb700, 0x2a5800, 0x802a3b00, 0x802afd00, 0x2a9e00, 0x802d4100, 0x2d2200, 0x2de400, 0x802d8700, 0x2c6800, 0x802c0b00, 0x802ccd00, 0x2cae00, 0x2f7000, 0x802f1300, 0x802fd500, 0x2fb600, 0x802e5900, 0x2e3a00, 0x2efc00, 0x802e9f00, 0x318000, 0x8031e300, 0x80312500, 0x314600, 0x8030a900, 0x30ca00, 0x300c00, 0x80306f00, 0x8033b100, 0x33d200, 0x331400, 0x80337700, 0x329800, 0x8032fb00, 0x80323d00, 0x325e00, 0x80358100, 0x35e200, 0x352400, 0x80354700, 0x34a800, 0x8034cb00, 0x80340d00, 0x346e00, 0x37b000, 0x8037d300, 0x80371500, 0x377600, 0x80369900, 0x36fa00, 0x363c00, 0x80365f00, 0x8039e100, 0x398200, 0x394400, 0x80392700, 0x38c800, 0x8038ab00, 0x80386d00, 0x380e00, 0x3bd000, 0x803bb300, 0x803b7500, 0x3b1600, 0x803af900, 0x3a9a00, 0x3a5c00, 0x803a3f00, 0x3de000, 0x803d8300, 0x803d4500, 0x3d2600, 0x803cc900, 0x3caa00, 0x3c6c00, 0x803c0f00, 0x803fd100, 0x3fb200, 0x3f7400, 0x803f1700, 0x3ef800, 0x803e9b00, 0x803e5d00, 0x3e3e00};
For initialization && verification purposes,
bit by bit implementation with any polynomial
/** Encoding table for CRC 16 */
static const uint16_t crc16Table[256] = {0x0, 0x1021, 0x2042, 0x3063, 0x4084, 0x50a5, 0x60c6, 0x70e7, 0x8108, 0x9129, 0xa14a, 0xb16b, 0xc18c, 0xd1ad, 0xe1ce, 0xf1ef, 0x1231, 0x210, 0x3273, 0x2252, 0x52b5, 0x4294, 0x72f7, 0x62d6, 0x9339, 0x8318, 0xb37b, 0xa35a, 0xd3bd, 0xc39c, 0xf3ff, 0xe3de, 0x2462, 0x3443, 0x420, 0x1401, 0x64e6, 0x74c7, 0x44a4, 0x5485, 0xa56a, 0xb54b, 0x8528, 0x9509, 0xe5ee, 0xf5cf, 0xc5ac, 0xd58d, 0x3653, 0x2672, 0x1611, 0x630, 0x76d7, 0x66f6, 0x5695, 0x46b4, 0xb75b, 0xa77a, 0x9719, 0x8738, 0xf7df, 0xe7fe, 0xd79d, 0xc7bc, 0x48c4, 0x58e5, 0x6886, 0x78a7, 0x840, 0x1861, 0x2802, 0x3823, 0xc9cc, 0xd9ed, 0xe98e, 0xf9af, 0x8948, 0x9969, 0xa90a, 0xb92b, 0x5af5, 0x4ad4, 0x7ab7, 0x6a96, 0x1a71, 0xa50, 0x3a33, 0x2a12, 0xdbfd, 0xcbdc, 0xfbbf, 0xeb9e, 0x9b79, 0x8b58, 0xbb3b, 0xab1a, 0x6ca6, 0x7c87, 0x4ce4, 0x5cc5, 0x2c22, 0x3c03, 0xc60, 0x1c41, 0xedae, 0xfd8f, 0xcdec, 0xddcd, 0xad2a, 0xbd0b, 0x8d68, 0x9d49, 0x7e97, 0x6eb6, 0x5ed5, 0x4ef4, 0x3e13, 0x2e32, 0x1e51, 0xe70, 0xff9f, 0xefbe, 0xdfdd, 0xcffc, 0xbf1b, 0xaf3a, 0x9f59, 0x8f78, 0x9188, 0x81a9, 0xb1ca, 0xa1eb, 0xd10c, 0xc12d, 0xf14e, 0xe16f, 0x1080, 0xa1, 0x30c2, 0x20e3, 0x5004, 0x4025, 0x7046, 0x6067, 0x83b9, 0x9398, 0xa3fb, 0xb3da, 0xc33d, 0xd31c, 0xe37f, 0xf35e, 0x2b1, 0x1290, 0x22f3, 0x32d2, 0x4235, 0x5214, 0x6277, 0x7256, 0xb5ea, 0xa5cb, 0x95a8, 0x8589, 0xf56e, 0xe54f, 0xd52c, 0xc50d, 0x34e2, 0x24c3, 0x14a0, 0x481, 0x7466, 0x6447, 0x5424, 0x4405, 0xa7db, 0xb7fa, 0x8799, 0x97b8, 0xe75f, 0xf77e, 0xc71d, 0xd73c, 0x26d3, 0x36f2, 0x691, 0x16b0, 0x6657, 0x7676, 0x4615, 0x5634, 0xd94c, 0xc96d, 0xf90e, 0xe92f, 0x99c8, 0x89e9, 0xb98a, 0xa9ab, 0x5844, 0x4865, 0x7806, 0x6827, 0x18c0, 0x8e1, 0x3882, 0x28a3, 0xcb7d, 0xdb5c, 0xeb3f, 0xfb1e, 0x8bf9, 0x9bd8, 0xabbb, 0xbb9a, 0x4a75, 0x5a54, 0x6a37, 0x7a16, 0xaf1, 0x1ad0, 0x2ab3, 0x3a92, 0xfd2e, 0xed0f, 0xdd6c, 0xcd4d, 0xbdaa, 0xad8b, 0x9de8, 0x8dc9, 0x7c26, 0x6c07, 0x5c64, 0x4c45, 0x3ca2, 0x2c83, 0x1ce0, 0xcc1, 0xef1f, 0xff3e, 0xcf5d, 0xdf7c, 0xaf9b, 0xbfba, 0x8fd9, 0x9ff8, 0x6e17, 0x7e36, 0x4e55, 0x5e74, 0x2e93, 0x3eb2, 0xed1, 0x1ef0};
The first bit is in the MSB of each byte
/** Encoding table for CRC 12 */
static const uint16_t crc12Table[256] = {0x0, 0x80f0, 0x8110, 0x1e0, 0x82d0, 0x220, 0x3c0, 0x8330, 0x8550, 0x5a0, 0x440, 0x84b0, 0x780, 0x8770, 0x8690, 0x660, 0x8a50, 0xaa0, 0xb40, 0x8bb0, 0x880, 0x8870, 0x8990, 0x960, 0xf00, 0x8ff0, 0x8e10, 0xee0, 0x8dd0, 0xd20, 0xcc0, 0x8c30, 0x9450, 0x14a0, 0x1540, 0x95b0, 0x1680, 0x9670, 0x9790, 0x1760, 0x1100, 0x91f0, 0x9010, 0x10e0, 0x93d0, 0x1320, 0x12c0, 0x9230, 0x1e00, 0x9ef0, 0x9f10, 0x1fe0, 0x9cd0, 0x1c20, 0x1dc0, 0x9d30, 0x9b50, 0x1ba0, 0x1a40, 0x9ab0, 0x1980, 0x9970, 0x9890, 0x1860, 0xa850, 0x28a0, 0x2940, 0xa9b0, 0x2a80, 0xaa70, 0xab90, 0x2b60, 0x2d00, 0xadf0, 0xac10, 0x2ce0, 0xafd0, 0x2f20, 0x2ec0, 0xae30, 0x2200, 0xa2f0, 0xa310, 0x23e0, 0xa0d0, 0x2020, 0x21c0, 0xa130, 0xa750, 0x27a0, 0x2640, 0xa6b0, 0x2580, 0xa570, 0xa490, 0x2460, 0x3c00, 0xbcf0, 0xbd10, 0x3de0, 0xbed0, 0x3e20, 0x3fc0, 0xbf30, 0xb950, 0x39a0, 0x3840, 0xb8b0, 0x3b80, 0xbb70, 0xba90, 0x3a60, 0xb650, 0x36a0, 0x3740, 0xb7b0, 0x3480, 0xb470, 0xb590, 0x3560, 0x3300, 0xb3f0, 0xb210, 0x32e0, 0xb1d0, 0x3120, 0x30c0, 0xb030, 0xd050, 0x50a0, 0x5140, 0xd1b0, 0x5280, 0xd270, 0xd390, 0x5360, 0x5500, 0xd5f0, 0xd410, 0x54e0, 0xd7d0, 0x5720, 0x56c0, 0xd630, 0x5a00, 0xdaf0, 0xdb10, 0x5be0, 0xd8d0, 0x5820, 0x59c0, 0xd930, 0xdf50, 0x5fa0, 0x5e40, 0xdeb0, 0x5d80, 0xdd70, 0xdc90, 0x5c60, 0x4400, 0xc4f0, 0xc510, 0x45e0, 0xc6d0, 0x4620, 0x47c0, 0xc730, 0xc150, 0x41a0, 0x4040, 0xc0b0, 0x4380, 0xc370, 0xc290, 0x4260, 0xce50, 0x4ea0, 0x4f40, 0xcfb0, 0x4c80, 0xcc70, 0xcd90, 0x4d60, 0x4b00, 0xcbf0, 0xca10, 0x4ae0, 0xc9d0, 0x4920, 0x48c0, 0xc830, 0x7800, 0xf8f0, 0xf910, 0x79e0, 0xfad0, 0x7a20, 0x7bc0, 0xfb30, 0xfd50, 0x7da0, 0x7c40, 0xfcb0, 0x7f80, 0xff70, 0xfe90, 0x7e60, 0xf250, 0x72a0, 0x7340, 0xf3b0, 0x7080, 0xf070, 0xf190, 0x7160, 0x7700, 0xf7f0, 0xf610, 0x76e0, 0xf5d0, 0x7520, 0x74c0, 0xf430, 0xec50, 0x6ca0, 0x6d40, 0xedb0, 0x6e80, 0xee70, 0xef90, 0x6f60, 0x6900, 0xe9f0, 0xe810, 0x68e0, 0xebd0, 0x6b20, 0x6ac0, 0xea30, 0x6600, 0xe6f0, 0xe710, 0x67e0, 0xe4d0, 0x6420, 0x65c0, 0xe530, 0xe350, 0x63a0, 0x6240, 0xe2b0, 0x6180, 0xe170, 0xe090, 0x6060};
/** Encoding table for CRC 8 */
static const uint8_t crc8Table[256] = {0x0, 0x9b, 0xad, 0x36, 0xc1, 0x5a, 0x6c, 0xf7, 0x19, 0x82, 0xb4, 0x2f, 0xd8, 0x43, 0x75, 0xee, 0x32, 0xa9, 0x9f, 0x4, 0xf3, 0x68, 0x5e, 0xc5, 0x2b, 0xb0, 0x86, 0x1d, 0xea, 0x71, 0x47, 0xdc, 0x64, 0xff, 0xc9, 0x52, 0xa5, 0x3e, 0x8, 0x93, 0x7d, 0xe6, 0xd0, 0x4b, 0xbc, 0x27, 0x11, 0x8a, 0x56, 0xcd, 0xfb, 0x60, 0x97, 0xc, 0x3a, 0xa1, 0x4f, 0xd4, 0xe2, 0x79, 0x8e, 0x15, 0x23, 0xb8, 0xc8, 0x53, 0x65, 0xfe, 0x9, 0x92, 0xa4, 0x3f, 0xd1, 0x4a, 0x7c, 0xe7, 0x10, 0x8b, 0xbd, 0x26, 0xfa, 0x61, 0x57, 0xcc, 0x3b, 0xa0, 0x96, 0xd, 0xe3, 0x78, 0x4e, 0xd5, 0x22, 0xb9, 0x8f, 0x14, 0xac, 0x37, 0x1, 0x9a, 0x6d, 0xf6, 0xc0, 0x5b, 0xb5, 0x2e, 0x18, 0x83, 0x74, 0xef, 0xd9, 0x42, 0x9e, 0x5, 0x33, 0xa8, 0x5f, 0xc4, 0xf2, 0x69, 0x87, 0x1c, 0x2a, 0xb1, 0x46, 0xdd, 0xeb, 0x70, 0xb, 0x90, 0xa6, 0x3d, 0xca, 0x51, 0x67, 0xfc, 0x12, 0x89, 0xbf, 0x24, 0xd3, 0x48, 0x7e, 0xe5, 0x39, 0xa2, 0x94, 0xf, 0xf8, 0x63, 0x55, 0xce, 0x20, 0xbb, 0x8d, 0x16, 0xe1, 0x7a, 0x4c, 0xd7, 0x6f, 0xf4, 0xc2, 0x59, 0xae, 0x35, 0x3, 0x98, 0x76, 0xed, 0xdb, 0x40, 0xb7, 0x2c, 0x1a, 0x81, 0x5d, 0xc6, 0xf0, 0x6b, 0x9c, 0x7, 0x31, 0xaa, 0x44, 0xdf, 0xe9, 0x72, 0x85, 0x1e, 0x28, 0xb3, 0xc3, 0x58, 0x6e, 0xf5, 0x2, 0x99, 0xaf, 0x34, 0xda, 0x41, 0x77, 0xec, 0x1b, 0x80, 0xb6, 0x2d, 0xf1, 0x6a, 0x5c, 0xc7, 0x30, 0xab, 0x9d, 0x6, 0xe8, 0x73, 0x45, 0xde, 0x29, 0xb2, 0x84, 0x1f, 0xa7, 0x3c, 0xa, 0x91, 0x66, 0xfd, 0xcb, 0x50, 0xbe, 0x25, 0x13, 0x88, 0x7f, 0xe4, 0xd2, 0x49, 0x95, 0xe, 0x38, 0xa3, 0x54, 0xcf, 0xf9, 0x62, 0x8c, 0x17, 0x21, 0xba, 0x4d, 0xd6, 0xe0, 0x7b};
uint32_t crcbit (uint8_t * inputptr, int32_t octetlen, uint32_t poly)
*********************************************************/
unsigned int crcbit (unsigned char * inputptr,
int octetlen,
unsigned int poly)
{
uint32_t i;
uint32_t crc = 0;
uint32_t c;
unsigned int i, crc = 0, c;
while (octetlen-- > 0)
{
c = (*inputptr++) << 24;
while (octetlen-- > 0) {
c = (*inputptr++) << 24;
for (i = 8; i != 0; i--)
{
if ( (1 << 31) & (c ^ crc) )
{
crc = (crc << 1) ^ poly;
}
else
{
crc <<= 1;
}
for (i = 8; i != 0; i--) {
if ((1 << 31) & (c ^ crc))
crc = (crc << 1) ^ poly;
else
crc <<= 1;
c <<= 1;
}
c <<= 1;
}
}
return crc;
return crc;
}
// CRC table initialization
/*********************************************************
crc table initialization
*********************************************************/
static unsigned int crc24aTable[256];
static unsigned int crc24bTable[256];
static unsigned int crc24cTable[256];
static unsigned short crc16Table[256];
static unsigned short crc12Table[256];
static unsigned char crc8Table[256];
/*
void crcTableInit (void)
{
uint8_t c = 0;
unsigned char c = 0;
do
{
crc24aTable[c] = crcbit (&c, 1, poly24a);
crc24bTable[c] = crcbit (&c, 1, poly24b);
crc16Table [c] = (uint16_t) (crcbit (&c, 1, poly16) >> 16);
crc12Table [c] = (uint16_t) (crcbit (&c, 1, poly12) >> 16);
crc8Table [c] = (uint8_t) (crcbit (&c, 1, poly8 ) >> 24);
}
while (++c);
do {
crc24aTable[c] = crcbit (&c, 1, poly24a);
crc24bTable[c] = crcbit (&c, 1, poly24b);
crc24cTable[c] = crcbit (&c, 1, poly24c);
crc16Table[c] = (unsigned short) (crcbit (&c, 1, poly16) >> 16);
crc12Table[c] = (unsigned short) (crcbit (&c, 1, poly12) >> 16);
crc8Table[c] = (unsigned char) (crcbit (&c, 1, poly8) >> 24);
} while (++c);
}
*/
// Byte by byte implementations, assuming initial byte is 0 padded (in MSB) if necessary
uint32_t crc24a (uint8_t * inptr, uint32_t bitlen)
//Generic version
void crcTable256Init (uint32_t poly, uint32_t* crc256Table)
{
int32_t octetlen = bitlen / 8;
int32_t resbit = (bitlen % 8);
uint32_t crc = 0;
unsigned char c = 0;
while (octetlen-- > 0)
{
crc = (crc << 8) ^ crc24aTable[(*inptr++) ^ (crc >> 24)];
}
do {
crc256Table[c] = crcbit(&c, 1, poly);
} while (++c);
if (resbit > 0)
{
crc = (crc << resbit) ^ crc24aTable[((*inptr) >> (8 - resbit)) ^ (crc >> (32 - resbit))];
}
return crc;
}
uint32_t crc24b (uint8_t * inptr, uint32_t bitlen)
/*********************************************************
Byte by byte implementations,
assuming initial byte is 0 padded (in MSB) if necessary
*********************************************************/
unsigned int crc24a (unsigned char * inptr,
int bitlen)
{
int32_t octetlen = bitlen / 8;
int32_t resbit = (bitlen % 8);
uint32_t crc = 0;
while (octetlen-- > 0)
{
crc = (crc << 8) ^ crc24bTable[(*inptr++) ^ (crc >> 24)];
}
int octetlen, resbit;
unsigned int crc = 0;
octetlen = bitlen / 8; /* Change in octets */
resbit = (bitlen % 8);
if (resbit > 0)
{
crc = (crc << resbit) ^ crc24bTable[((*inptr) >> (8 - resbit)) ^ (crc >> (32 - resbit))];
}
while (octetlen-- > 0) {
// printf("crc24a: in %x => crc %x\n",crc,*inptr);
crc = (crc << 8) ^ crc24aTable[(*inptr++) ^ (crc >> 24)];
}
return crc;
if (resbit > 0)
crc = (crc << resbit) ^ crc24aTable[((*inptr) >> (8 - resbit)) ^ (crc >> (32 - resbit))];
return crc;
}
uint32_t crc16 (uint8_t * inptr, uint32_t bitlen)
unsigned int crc24b (unsigned char * inptr,
int bitlen)
{
int32_t octetlen = bitlen / 8;
int32_t resbit = (bitlen % 8);
uint32_t crc = 0;
int octetlen, resbit;
unsigned int crc = 0;
octetlen = bitlen / 8; /* Change in octets */
resbit = (bitlen % 8);
while (octetlen-- > 0)
{
crc = (crc << 8) ^ (crc16Table[(*inptr++) ^ (crc >> 24)] << 16);
}
while (octetlen-- > 0) {
// printf("crc24b: in %x => crc %x (%x)\n",crc,*inptr,crc24bTable[(*inptr) ^ (crc >> 24)]);
crc = (crc << 8) ^ crc24bTable[(*inptr++) ^ (crc >> 24)];
}
if (resbit > 0)
{
crc = (crc << resbit) ^ (crc16Table[((*inptr) >> (8 - resbit)) ^ (crc >> (32 - resbit))] << 16);
}
if (resbit > 0)
crc = (crc << resbit) ^ crc24bTable[((*inptr) >> (8 - resbit)) ^ (crc >> (32 - resbit))];
return crc;
return crc;
}
uint32_t crc12 (uint8_t * inptr, uint32_t bitlen)
unsigned int crc24c (unsigned char * inptr,
int bitlen)
{
int32_t octetlen = bitlen / 8;
int32_t resbit = (bitlen % 8);
uint32_t crc = 0;
int octetlen, resbit;
unsigned int crc = 0;
octetlen = bitlen / 8; /* Change in octets */
resbit = (bitlen % 8);
while (octetlen-- > 0)
{
crc = (crc << 8) ^ (crc12Table[(*inptr++) ^ (crc >> 24)] << 16);
}
while (octetlen-- > 0) {
/*#ifdef DEBUG_CRC24C
printf("crc24c: in %x => crc %x (%x)\n",crc,*inptr,crc24cTable[(*inptr) ^ (crc >> 24)]);
#endif*/
crc = (crc << 8) ^ crc24cTable[(*inptr++) ^ (crc >> 24)];
}
if (resbit > 0)
{
crc = (crc << resbit) ^ (crc12Table[((*inptr) >> (8 - resbit)) ^ (crc >> (32 - resbit))] << 16);
}
if (resbit > 0)
crc = (crc << resbit) ^ crc24cTable[((*inptr) >> (8 - resbit)) ^ (crc >> (32 - resbit))];
return crc;
return crc;
}
uint32_t crc8 (uint8_t * inptr, uint32_t bitlen)
unsigned int
crc16 (unsigned char * inptr, int bitlen)
{
int32_t octetlen = bitlen / 8;
int32_t resbit = (bitlen % 8);
uint32_t crc = 0;
int octetlen, resbit;
unsigned int crc = 0;
octetlen = bitlen / 8; /* Change in octets */
resbit = (bitlen % 8);
while (octetlen-- > 0)
{
crc = crc8Table[(*inptr++) ^ (crc >> 24)] << 24;
}
while (octetlen-- > 0) {
if (resbit > 0)
{
crc = (crc << resbit) ^ (crc8Table[((*inptr) >> (8 - resbit)) ^ (crc >> (32 - resbit))] << 24);
}
crc = (crc << 8) ^ (crc16Table[(*inptr++) ^ (crc >> 24)] << 16);
}
return crc;
if (resbit > 0)
crc = (crc << resbit) ^ (crc16Table[((*inptr) >> (8 - resbit)) ^ (crc >> (32 - resbit))] << 16);
return crc;
}
unsigned int
crc12 (unsigned char * inptr, int bitlen)
{
int octetlen, resbit;
unsigned int crc = 0;
octetlen = bitlen / 8; /* Change in octets */
resbit = (bitlen % 8);
while (octetlen-- > 0) {
crc = (crc << 8) ^ (crc12Table[(*inptr++) ^ (crc >> 24)] << 16);
}
if (resbit > 0)
crc = (crc << resbit) ^ (crc12Table[((*inptr) >> (8 - resbit)) ^ (crc >> (32 - resbit))] << 16);
return crc;
}
unsigned int
crc8 (unsigned char * inptr, int bitlen)
{
int octetlen, resbit;
unsigned int crc = 0;
octetlen = bitlen / 8; /* Change in octets */
resbit = (bitlen % 8);
while (octetlen-- > 0) {
crc = crc8Table[(*inptr++) ^ (crc >> 24)] << 24;
}
if (resbit > 0)
crc = (crc << resbit) ^ (crc8Table[((*inptr) >> (8 - resbit)) ^ (crc >> (32 - resbit))] << 24);
return crc;
}
//Generic version
unsigned int crcPayload(unsigned char * inptr, int bitlen, uint32_t* crc256Table)
{
int octetlen, resbit;
unsigned int crc = 0;
octetlen = bitlen/8; // Change in bytes
resbit = (bitlen % 8);
while (octetlen-- > 0)
{
crc = (crc << 8) ^ crc256Table[(*inptr++) ^ (crc >> 24)];
}
if (resbit > 0)
{
crc = (crc << resbit) ^ crc256Table[((*inptr) >> (8 - resbit)) ^ (crc >> (32 - resbit))];
}
return crc;
}
#ifdef DEBUG_CRC
// Test code
/*******************************************************************/
/**
Test code
********************************************************************/
#include <stdio.h>
main()
{
unsigned char test[] = "Thebigredfox";
crcTableInit();
printf("%x\n", crcbit(test, sizeof(test) - 1, poly24));
printf("%x\n", crc24 (test, (sizeof(test) - 1)*8));
printf("%x\n", crcbit(test, sizeof(test) - 1, poly8));
printf("%x\n", crc8 (test, (sizeof(test) - 1)*8));
unsigned char test[] = "Thebigredfox";
crcTableInit();
printf("%x\n", crcbit(test, sizeof(test) - 1, poly24));
printf("%x\n", crc24(test, (sizeof(test) - 1)*8));
printf("%x\n", crcbit(test, sizeof(test) - 1, poly8));
printf("%x\n", crc8(test, (sizeof(test) - 1)*8));
}
#endif
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%
% Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
% contributor license agreements. See the NOTICE file distributed with
% this work for additional information regarding copyright ownership.
% The OpenAirInterface Software Alliance licenses this file to You under
% the OAI Public License, Version 1.1 (the "License"); you may not use this file
% except in compliance with the License.
% You may obtain a copy of the License at
%
% http://www.openairinterface.org/?page_id=698
%
% Unless required by applicable law or agreed to in writing, software
% distributed under the License is distributed on an "AS IS" BASIS,
% WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
% See the License for the specific language governing permissions and
% limitations under the License.
%-------------------------------------------------------------------------------
% For more information about the OpenAirInterface (OAI) Software Alliance:
% contact@openairinterface.org
%
\documentclass{article}
\usepackage[a4paper, total={6in, 8in}]{geometry}
\usepackage{amsmath}
\usepackage{amsfonts}
\usepackage{amssymb}
\usepackage{booktabs}
\usepackage{url}
\usepackage{tcolorbox}
\usepackage{tikz}
\usetikzlibrary{arrows,decorations,shapes,backgrounds,patterns}
\usepackage{pgfplots}
\pgfplotsset{compat=newest}
\definecolor{green}{RGB}{32,127,43}
\usetikzlibrary{calc}
\usepackage{listings}
\lstdefinestyle{customc}{
belowcaptionskip=1\baselineskip,
breaklines=true,
frame=L,
xleftmargin=\parindent,
language=C,
showstringspaces=false,
basicstyle=\footnotesize\ttfamily,
keywordstyle=\bfseries\color{green!40!black},
commentstyle=\itshape\color{purple!40!black},
identifierstyle=\color{blue},
stringstyle=\color{orange},
}
\lstset{escapechar=@,style=customc}
\title{NR LDPC Decoder}
\author{Sebastian Wagner (TCL)}
\date{\today}
\def\0{\mathbf{0}}
\def\b{\mathbf{b}}
\def\Bbb{\mathbb{B}}
\def\Bcal{\mathcal{B}}
\def\c{\mathbf{c}}
\def\C{\mathbf{C}}
\def\Cbb{\mathbb{C}}
\def\Ccal{\mathcal{C}}
\def\eqdef{\triangleq}
\def\g{\mathbf{g}}
\def\G{\mathbf{G}}
\def\Gcal{\mathcal{G}}
\def\h{\mathbf{h}}
\def\H{\mathbf{H}}
\def\Hbg{\mathbf{H}_\mathrm{BG}}
\def\Hbgo{\mathbf{H}_\mathrm{BG1}}
\def\Hbgt{\mathbf{H}_\mathrm{BG2}}
\def\I{\mathbf{I}}
\def\Kb{{K_b}}
\def\m{\mathbf{m}}
\def\Mb{{M_b}}
\def\Nb{{N_b}}
\def\Nbb{\mathbb{N}}
\def\n{\mathbf{n}}
\def\nr{{n_{\rm r}}}
\def\nt{{n_{\rm t}}}
\def\s{\mathbf{s}}
\def\SNR{\mathsf{SNR}}
\def\y{\mathbf{y}}
\def\z{\mathbf{z}}
\def\Z{\mathbf{Z}}
\def\Zc{{Z_c}}
\def\herm{\mathsf{H}}
\def\trans{\mathsf{T}}
\def\EE{\mathsf{E}}
\newcommand{\sgn}{\operatorname{sgn}}
\begin{document}
\maketitle
\begin{tikzpicture}[remember picture,overlay]
\node[anchor=north west,inner sep=0pt] at (current page.north west)
{\includegraphics[scale=0.5]{logo.png}};
\end{tikzpicture}
\begin{center}Currently Supported:\end{center}
\tcbox[center]{
\begin{tabular}{lll}
\toprule
\textbf{BG} & \textbf{Lifting Size Z} & \textbf{Code Rate R} \\
\midrule
1 & all & 1/3, 2/3, 8/9 \\
2 & all & 1/5, 1/3, 2/3 \\
\bottomrule
\end{tabular}
}
\tableofcontents
\newpage
\section{Introduction}
\label{sec:introduction}
Low Density Parity Check (LDPC) codes have been developed by Gallager in 1963 \cite{gallager1962low}. They are linear error correcting codes that are capacity-achieving for large block length and are completely described by their Parity Check Matrix (PCM) $\H^{M\times N}$. The PCM $\H$ defines $M$ constraints on the codeword $\c$ of length $N$ such that
\begin{equation}
\label{eq:29}
\H\c = \0.
\end{equation}
The number of information bits $B$ that can be encoded with $\H$ is given by $B=N-M$. Hence the code rate $R$ of $\H$ reads
\begin{equation}
\label{eq:37}
R = \frac{B}{N} = 1-\frac{M}{N}.
\end{equation}
\subsection{LDPC in NR}
\label{sec:ldpc-nr}
NR uses quasi-cyclic (QC) Protograph LDPC codes, i.e. a smaller graph, called Base Graph (BG), is defined and utilized to construct the larger PCM. This has the advantage that the large PCM does not have to be stored in memory and allows for a more efficient implementation while maintaining good decoding properties.
Two BGs $\Hbg\in\Nbb^{\Mb\times \Nb}$ are defined in NR:
\begin{enumerate}
\item $\Hbgo\in\Nbb^{46\times 68}$
\item $\Hbgt\in\Nbb^{42\times 52}$
\end{enumerate}
where $\Nbb$ is the set of integers. For instance the first 3 rows and 13 columns of BG2 are given by
\setcounter{MaxMatrixCols}{30}
\begin{equation*}
\label{eq:33}
\Hbgt =
\begin{bmatrix}
9 & 117 & 204 & 26 & \emptyset & \emptyset & 189 & \emptyset & \emptyset & 205 & 0 & 0 & \emptyset & \emptyset \\
127 & \emptyset & \emptyset & 166 & 253 & 125 & 226 & 156 & 224 & 252 & \emptyset & 0 & 0 & \emptyset \\
81 & 114 & \emptyset & 44 & 52 & \emptyset & \emptyset & \emptyset & 240 & \emptyset & 1 & \emptyset & 0 & 0
\end{bmatrix}.
\end{equation*}
To obtain the PCM $\H$ from the BG $\Hbg$, each element $\Hbg(i,j)$ in the BG is replaced by a lifting matrix of size $\Zc\times \Zc$ according to
\begin{equation}
\label{eq:35}
\Hbg(i,j) =
\begin{cases}
\0 & \textrm{if}~ \Hbg(i,j)=\emptyset \\
\I_{P_{ij}} & \textrm{otherwise}
\end{cases}
\end{equation}
where $\I_{P_{ij}}$ is the identity matrix circularly shifted to the right by $P_{ij} = \Hbg(i,j)\mod \Zc$. Hence, the resulting PCM $\H$ will be of size $\Mb\Zc\times\Nb\Zc$.
The lifting size $\Zc$ depends on the number of bits to encode. To limit the complexity, a discrete set $\mathcal{Z}$ of possible values of $\Zc$ has been defined in \cite{3gpp2017_38212} and the optimal value $\Zc$ is calculated according to
\begin{equation}
\label{eq:36}
\Zc = \min_{\Z\in\mathcal{Z}}\left[Z\geq\frac{B}{\Nb}\right].
\end{equation}
The base rate of the two BGs is $1/3$ and $1/5$ for BG1 and BG2, respectively. That is, BG1 encodes $K=22\Zc$ bits and BG2 encodes $K=10\Zc$ bits. Note that the first 2 columns of BG 1 and 2 are always punctured, that is after encoding, the first $2\Zc$ bits are discarded and not transmitted.
For instance, consider $B=500$ information bits to encode using BG2, \eqref{eq:36} yields $\Zc=64$ hence $K=640$. Since $K>B$, $K-B=140$ filler bits are appended to the information bits. The PCM $\Hbgt$ is of size $2688\times 3328$ and the $640$ bits $\b$ are encoded according to \eqref{eq:29} at a rate $R \approx 0.192$. To achieve the higher base rate of $0.2$, the first $128$ are punctured, i.e. instead of transmitting all $3328$ bits, only $3200$ are transmitted resulting in the desired rate $R=640/3200=0.2$.
\subsection{LDPC Decoding}
\label{sec:ldpc-decoding}
The decoding of codeword $\c$ can be achieved via the classical message passing algorithm. This algorithm can be illustrated best using the Tanner graph of the PCM. The rows of the PCM are called check nodes (CN) since they represent the parity check equations. The parity check equation of each of these check nodes involves various bits in the codeword. Similarly, every column of the PCM corresponds to a bit and each bit is involved in several parity check equations. In the Tanner graph representation, the bits are called bit nodes (BN). Let's go back to the previous example of BG2 and assume $\Zc=2$, hence the first 3 rows and 13 columns of BG2 $\Hbgt$ read
\begin{equation*}
\label{eq:36}
\Hbgt =
\begin{bmatrix}
1 & 1 & 0 & 0 & \emptyset & \emptyset & 1 & \emptyset & \emptyset & 1 & 0 & 0 & \emptyset & \emptyset \\
1 & \emptyset & \emptyset & 0 & 1 & 1 & 0 & 0 & 0 & 0 & \emptyset & 0 & 0 & \emptyset \\
1 & 0 & \emptyset & 0 & 0 & \emptyset & \emptyset & \emptyset & 0 & \emptyset & 1 & \emptyset & 0 & 0
\end{bmatrix}.
\end{equation*}
Replacing the elements according to \eqref{eq:35}, we obtain the first 6 rows and 26 columns of the PCM as
\begin{equation*}
\label{eq:39}
\H =
\begin{bmatrix}
0 & 1 & 0 & 1 & 1 & 0 & 1 & 0 & 0 & 0 & 0 & 0 & 0 & 1 & 0 & 0 & 0 & 0 & 0 & 1 & 1 & 0 & 1 & 0 & 0 & 0 & 0 & 0\\
1 & 0 & 1 & 0 & 0 & 1 & 0 & 1 & 0 & 0 & 0 & 0 & 1 & 0 & 0 & 0 & 0 & 0 & 1 & 0 & 0 & 1 & 0 & 1 & 0 & 0 & 0 & 0\\
0 & 1 & 0 & 0 & 0 & 0 & 1 & 0 & 0 & 1 & 0 & 1 & 1 & 0 & 1 & 0 & 1 & 0 & 1 & 0 & 0 & 0 & 1 & 0 & 1 & 0 & 0 & 0\\
1 & 0 & 0 & 0 & 0 & 0 & 0 & 1 & 1 & 0 & 1 & 0 & 0 & 1 & 0 & 1 & 0 & 1 & 0 & 1 & 0 & 0 & 0 & 1 & 0 & 1 & 0 & 0\\
0 & 1 & 1 & 0 & 0 & 0 & 1 & 0 & 1 & 0 & 0 & 0 & 0 & 0 & 0 & 0 & 1 & 0 & 0 & 0 & 0 & 1 & 0 & 0 & 1 & 0 & 1 & 0\\
1 & 0 & 0 & 1 & 0 & 0 & 0 & 1 & 0 & 1 & 0 & 0 & 0 & 0 & 0 & 0 & 0 & 1 & 0 & 0 & 1 & 0 & 0 & 0 & 0 & 1 & 0 & 1
\end{bmatrix}.
\end{equation*}
The Tanner graph of the first 8 BNs is shown in Figure \ref{fig:tannergraph}.
\begin{figure}[ht]
\label{fig:tannergraph}
\centering
\def\ww{0.3cm}
\def\hh{0.3cm}
\tikzstyle{cnode}=[fill=white,rectangle,draw=black,thick,inner sep=2pt, minimum height=\hh,minimum width=\ww, rounded corners=1pt,text width=\ww]
\tikzstyle{vnode}=[fill=white,circle,draw=black,thick,inner sep=2pt, minimum height=\hh,minimum width=\ww, rounded corners=1pt,text width=\ww]
\tikzstyle{connector}=[<->,>=latex',semithick]
\begin{tikzpicture}
\tikzstyle{every node}=[node distance=1.5cm,text centered]
% Check nodes
\node[cnode, label=above:$v_0$] (v0) {};
\node[cnode, label=above:$v_1$, right of=v0] (v1) {};
\node[cnode, label=above:$v_2$, right of=v1] (v2) {};
% Variable nodes
\node[vnode, label=below:$c_3$, below of=v1, node distance=1.5cm] (c3) {};
\node[vnode, label=below:$c_2$, left of=c3, node distance=1.5cm] (c2) {};
\node[vnode, label=below:$c_1$, left of=c2, node distance=1.5cm] (c1) {};
\node[vnode, label=below:$c_0$, left of=c1, node distance=1.5cm] (c0) {};
\node[vnode, label=below:$c_4$, right of=c3, node distance=1.5cm] (c4) {};
\node[vnode, label=below:$c_5$, right of=c4, node distance=1.5cm] (c5) {};
\node[vnode, label=below:$c_6$, right of=c5, node distance=1.5cm] (c6) {};
% Draw edges
\draw (c0) edge[connector] (v1);
\draw (c1) edge[connector] (v0);
\draw (c1) edge[connector] (v2);
\draw (c2) edge[connector] (v1);
\draw (c3) edge[connector] (v0);
\draw (c4) edge[connector] (v0);
\draw (c4) edge[connector] (v2);
\draw (c5) edge[connector] (v1);
\draw (c6) edge[connector] (v0);
\draw (c6) edge[connector] (v2);
\end{tikzpicture}
\caption{Tanner graph for first 7 bits nodes and 3 check nodes from \eqref{eq:39}.}
\end{figure}
The message passing algorithm is an iterative algorithm where probabilities of the bits (being either 0 or 1) are exchanged between the BNs and CNs. After sufficient iterations, the probabilities will have either converged to either 0 or 1 and the parity check equations will be satisfied, at this point, the codeword has been decoded correctly.
\newpage
\section{LDPC Decoder Implementation}
\label{sec:ldpc-implementation}
The implementation on a general purpose processor (GPP) has to take advantage of potential instruction extension of the processor architecture. We focus on the Intel x86 instruction set architecture (ISA) and its advanced vector extension (AVX). In particular, we utilize AVX2 with its 256-bit single instruction multiple data (SIMD) format. In order to utilize AVX2 to speed up the processing at the CNs and BNs, the corresponding data has to be ordered/aligned in a specific way. The processing flow of the LDPC decoder is depicted in \ref{fig:ldpc_decoder_flow}.
\begin{figure}[ht]
\label{fig:ldpc_decoder_flow}
\centering
\def\ww{0.3cm}
\def\hh{0.3cm}
\tikzstyle{func}=[,draw=none]
\tikzstyle{connector}=[->,>=latex',semithick]
\begin{tikzpicture}
\tikzstyle{every node}=[node distance=2.5cm,text centered]
% Check nodes
% First iteration
\node[func] (llr2llrProcBuf) {\texttt{llr2llrProcBuf}};
\node[func, above of=llr2llrProcBuf] (llr2CnProcBuf) {\texttt{llr2CnProcBuf}};
\node[func, above right of=llr2CnProcBuf] (cnProc1) {\texttt{cnProc}};
\node[func, below right of=cnProc1] (cn2bnProcBuf1) {\texttt{cn2bnProcBuf}};
\node[func, below of=cn2bnProcBuf1] (bnProcPc1) {\texttt{bnProcPc}};
% Iterations
\node[func, right of=cnProc1, node distance=7cm] (cnProc) {\texttt{cnProc}};
\node[func, below right of=cnProc] (cn2bnProcBuf) {\texttt{cn2bnProcBuf}};
\node[func, below of=cn2bnProcBuf] (bnProcPc) {\texttt{bnProcPc}};
\node[func, below left of=cnProc] (bn2cnProcBuf) {\texttt{bn2cnProcBuf}};
\node[func, below of=bn2cnProcBuf] (bnProc) {\texttt{bnProc}};
% Post processing
\node[func, below of=bnProcPc] (llrRes2llrOut) {\texttt{llrRes2llrOut}};
\node[func, below of=llrRes2llrOut, node distance=1cm] (llr2bit) {\texttt{llr2bit}};
% Draw edges
\draw (llr2llrProcBuf) edge[connector] (llr2CnProcBuf);
\draw (llr2CnProcBuf) edge[connector] (cnProc1);
\draw (cnProc1) edge[connector] (cn2bnProcBuf1);
\draw (cn2bnProcBuf1) edge[connector] (bnProcPc1);
\draw (bnProcPc) edge[connector] (bnProc);
\draw (bnProc) edge[connector] (bn2cnProcBuf);
\draw (bn2cnProcBuf) edge[connector] (cnProc);
\draw (cnProc) edge[connector] (cn2bnProcBuf);
\draw (cn2bnProcBuf) edge[connector] (bnProcPc);
\draw (bnProcPc1) edge[connector] (bnProc);
\draw (bnProcPc) edge[connector] node[left] {iterations done} (llrRes2llrOut);
\draw (llrRes2llrOut) edge[connector] (llr2bit);
% Boxes
\node[inner sep=0pt,above right of=cn2bnProcBuf1, node distance = 2.5cm] (ref) {};
\draw[fill=black,opacity=.2, rounded corners] (llr2llrProcBuf.south west) rectangle ($(ref) + (-.5cm,.5cm)$);
\draw[fill=black,opacity=.2, rounded corners] ($(ref) + (.5cm,.5cm)$) rectangle ($(bnProcPc.south east) + (.4cm,0)$);
\node[func, above of=cnProc1, node distance=.8cm] (iter1) {\textbf{First Iteration}};
\node[func, above of=cnProc , node distance=.8cm] (iterX) {\textbf{Subsequent Iterations}};
\end{tikzpicture}
\caption{LDPC Decoder processing flow.}
\end{figure}
The functions involved are described in more detail in table \ref{tab:sum_func}.
\begin{table}[ht]
\centering
\begin{tabular}{ll}
\toprule
\textbf{Function} & \textbf{Description} \\
\midrule
\texttt{llr2llrProcBuf} & Copies input LLRs to LLR processing buffer \\
\texttt{llr2CnProcBuf} & Copies input LLRs to CN processing buffer \\
\texttt{cnProc} & Performs CN signal processing \\
\texttt{cn2bnProcBuf} & Copies the CN results to the BN processing buffer \\
\texttt{bnProcPc} & Performs BN processing for parity check and/or hard-decision \\
\texttt{bnProc} & Utilizes the results of \texttt{bnProcPc} to compute LLRs for CN processing \\
\texttt{bn2cnProcBuf} & Copies the BN results to the CN processing buffer \\
\texttt{llrRes2llrOut} & Copies the results of \texttt{bnProcPc} to output LLRs \\
\texttt{llr2bit} & Performs hard-decision on the output LLRs \\
\bottomrule
\end{tabular}
\caption{Summary of the LDPC decoder functions.}
\label{tab:sum_func}
\end{table}
The input LLRs are assumed to be 8-bit and aligned on 32 bytes. CN processing is carried out in 8-bit whereas BN processing is done in 16 bit. Subsequently, the processing tasks at the CNs and BNs are explained in more detail.
\newpage
\subsection{Check Node Processing}
\label{sec:check-node-proc}
Denote $q_{ij}$ the value from BN $j$ to CN $i$ and let $\Bcal_i$ be the set of connected BNs to the $i$th CN. Then, using the min-sum approximation, CN $i$ has to carry out the following operation for each connected BN.
\begin{equation}
\label{eq:40}
r_{ji} = \prod_{j'\in\Bcal_i\setminus j}\sgn q_{ij'}\min_{j'\in\Bcal_i\setminus j} |q_{ij'}|
\end{equation}
where $r_{ji}$ is the value returned to BN $j$ from CN $i$. There are $\Mb = \{46,42\}$ CNs in BG 1 and BG 2, respectively. Each of these CNs is connected to only a small number of BNs. The number of connected BNs to CN $i$ is $|\Bcal_i|$. In BG1 and BG2, $|\Bcal_i|=\{3,4,5,6,7,8,9,10,19\}$ and $|\Bcal_i|=\{3,4,5,6,8,10\}$, respectively. The following tables show the number of CNs $M_{|\Bcal_i|}$ that are connected to the same number of BNs.
\begin{table}[ht]
\centering
\begin{tabular}{llllllllll}
\toprule
$|\Bcal_i|$ & 3 & 4 & 5 & 6 & 7 & 8 & 9 & 10 & 19 \\
\midrule
$M_{|\Bcal_i|}^\mathrm{BG1}$ & 1 & 5 &18 & 8 & 5 & 2 & 2 & 1 & 4 \\
$M_{|\Bcal_i|}^\mathrm{BG2}$ & 6 & 20 & 9 & 3 & 0 & 2 & 0 & 2 & 0 \\
\bottomrule
\end{tabular}
\caption{Ceck node groups for BG1 and BG2.}
\label{tab:checkNodeGroups}
\end{table}
It can be observed that each CN is at least connected to 3 BNs and there are 9 groups and 5 groups in BG1 and BG2, respectively. Denote the set of CN groups as $\Gcal$ and $M_k$ the number of CNs in group $k\in\Gcal$, e.g. for BG2 $M_4=20\Zc$. Each CN group will be processed separately. The CN processing buffer $p_C^k$ of group $k$ is defined as
\begin{equation}
\label{eq:44}
p_C^k = \{\underbrace{q_{11}q_{21}\dots q_{M_k 1}}_{\text 1. BN},\underbrace{q_{12}q_{22}\dots q_{M_k 2}}_{\text 2. BN},\dots,\underbrace{q_{12}q_{22}\dots q_{M_k k}}_{\text last BN}\}
\end{equation}
Hence, $|p_C^k| = kM_k$, e.g, $\Zc=128$, $|p_C^4| = 4\cdot 20\cdot 128 = 10240$.
\begin{lstlisting}[frame=single,caption={Example of CN processing for group 3 from \texttt{cnProc}.},label=code_cnproc] % Start your code-block
const uint8_t lut_idxCnProcG3[3][2] = {{72,144}, {0,144}, {0,72}};
// =====================================================================
// Process group with 3 BNs
// Number of groups of 32 CNs for parallel processing
M = (lut_numCnInCnGroups[0]*Z)>>5;
// Set the offset to each bit within a group in terms of 32 Byte
bitOffsetInGroup = (lut_numCnInCnGroups_BG2_R15[0]*NR_LDPC_ZMAX)>>5;
// Set pointers to start of group 3
p_cnProcBuf = (__m256i*) &cnProcBuf [lut_startAddrCnGroups[0]];
p_cnProcBufRes = (__m256i*) &cnProcBufRes[lut_startAddrCnGroups[0]];
// Loop over every BN
for (j=0; j<3; j++)
{
// Set of results pointer to correct BN address
p_cnProcBufResBit = p_cnProcBufRes + (j*bitOffsetInGroup);
// Loop over CNs
for (i=0; i<M; i++)
{
// Abs and sign of 32 CNs (first BN)
ymm0 = p_cnProcBuf[lut_idxCnProcG3[j][0] + i];
sgn = _mm256_sign_epi8(*p_ones, ymm0);
min = _mm256_abs_epi8(ymm0);
// 32 CNs of second BN
ymm0 = p_cnProcBuf[lut_idxCnProcG3[j][1] + i];
min = _mm256_min_epu8(min, _mm256_abs_epi8(ymm0));
sgn = _mm256_sign_epi8(sgn, ymm0);
// Store result
min = _mm256_min_epu8(min, *p_maxLLR); // 128 in epi8 is -127
*p_cnProcBufResBit = _mm256_sign_epi8(min, sgn);
p_cnProcBufResBit++;
}
}
}
\end{lstlisting}
Once all results of the check node processing $r_{ji}$ have been calculated, they are copied to the bit node processing buffer.
\subsection{Bit Node Processing}
\label{sec:bit-node-processing}
Denote $r_{ji}$ the value from CN $i$ to BN $j$ and let $\Ccal_j$ be the set of connected CNs to the $j$th BN. Each BN $j$ has to carry out the following operation for every connected CN $i\in\Ccal_j$.
\begin{equation}
\label{eq:46}
q_{ij} = \Lambda_j + \sum_{i'\in\Ccal_j\setminus i}r_{ji'}
\end{equation}
There are $\Nb = \{68,52\}$ BNs in BG 1 and BG 2, respectively. Each of these BNs is connected to only a small number of CNs. The number of connected CNs to BN $j$ is $|\Ccal_j|$. In BG1 and BG2, $|\Ccal_j|=\{1,4,7,8,9,10,11,12,28,30\}$ and $|\Ccal_j|=\{1,5,6,7,8,9,10,12,13,14,16,22,23\}$, respectively. The following tables show the number of BNs $K_{|\Ccal_j|}$ that are connected to the same number of CNs.
\begin{table}[ht]
\centering
\begin{tabular}{lllllllllllllllllll}
\toprule
$|\Ccal_j|$ & 1&4&5&6&7&8&9&10&11&12&13 & 14 & 15 & 16 & 22 & 23 &28&30 \\
\midrule
$K_{|\Ccal_j|}^\mathrm{BG1}$ & 42 & 1 & 1 & 2 & 4 & 3 & 1 & 4 & 3 & 4 & 1 & 0 & 0 & 0 & 0 & 0 & 1 & 1 \\
$K_{|\Ccal_j|}^\mathrm{BG2}$ & 38 & 0 & 2 & 1 & 1 & 1 & 2 & 1 & 0 & 1 & 1 & 1 & 0 & 1 & 1 & 1 & 0 & 0\\
\bottomrule
\end{tabular}
\caption{Bit node groups for BG1 and BG2 for base rates 1/3 and 1/5, respectively.}
\label{tab:bitNodeGroups}
\end{table}
The BNs that are connected to a single CN do not need to be considered in the BN processing since \eqref{eq:46} yields $q_{ij} = \Lambda_j$. It can be observed that the grouping is less compact, i.e. there are many groups with only a small number of elements.
Denote the set of BN groups as $\Bcal$ and $K_k$ the number of BNs in group $k\in\Bcal$, e.g. for BG2 $K_5=2\Zc$. Each BN group will be processed separately. The BN processing buffer $p_B^k$ of group $k$ is defined as
\begin{equation}
\label{eq:47}
p_B^k = \{\underbrace{r_{11}r_{21}\dots r_{K_k 1}}_{\text 1. CN},\underbrace{r_{12}r_{22}\dots r_{K_k 2}}_{\text 2. CN},\dots,\underbrace{r_{12}r_{22}\dots r_{K_k k}}_{\text last CN}\}
\end{equation}
Hence, $|p_B^k| = kK_k$, e.g, $\Zc=128$, $|p_B^5| = 5\cdot 2\cdot 128 = 1024$.
Depending on the code rate, some parity bits are not being transmitted. For instance, for BG2 with code rate $R = 1/3$ the last $20\Zc$ bits are discarded. Therefore, the last 20 columns or the last $20\Zc$ parity check equation are not required for decoding. This means that the BN groups shown in table \ref{tab:bitNodeGroups} are depending on the rate.
\begin{lstlisting}[frame=single,caption={Example of BN processing for group 3 from \texttt{bnProcPc}.},label=code_bnproc] % Start your code-block
// If elements in group move to next address
idxBnGroup++;
// Number of groups of 32 BNs for parallel processing
M = (lut_numBnInBnGroups[2]*Z)>>5;
// Set the offset to each CN within a group in terms of 16 Byte
cnOffsetInGroup = (lut_numBnInBnGroups[2]*NR_LDPC_ZMAX)>>4;
// Set pointers to start of group 3
p_bnProcBuf = (__m128i*) &bnProcBuf [lut_startAddrBnGroups [idxBnGroup]];
p_llrProcBuf = (__m128i*) &llrProcBuf [lut_startAddrBnGroupsLlr[idxBnGroup]];
p_llrRes = (__m256i*) &llrRes [lut_startAddrBnGroupsLlr[idxBnGroup]];
// Loop over BNs
for (i=0,j=0; i<M; i++,j+=2)
{
// First 16 LLRs of first CN
ymmRes0 = _mm256_cvtepi8_epi16(p_bnProcBuf[j]);
ymmRes1 = _mm256_cvtepi8_epi16(p_bnProcBuf[j+1]);
// Loop over CNs
for (k=1; k<3; k++)
{
ymm0 = _mm256_cvtepi8_epi16(p_bnProcBuf[k*cnOffsetInGroup + j]);
ymmRes0 = _mm256_adds_epi16(ymmRes0, ymm0);
ymm1 = _mm256_cvtepi8_epi16(p_bnProcBuf[k*cnOffsetInGroup + j+1]);
ymmRes1 = _mm256_adds_epi16(ymmRes1, ymm1);
}
// Add LLR from receiver input
ymm0 = _mm256_cvtepi8_epi16(p_llrProcBuf[j]);
ymmRes0 = _mm256_adds_epi16(ymmRes0, ymm0);
ymm1 = _mm256_cvtepi8_epi16(p_llrProcBuf[j+1]);
ymmRes1 = _mm256_adds_epi16(ymmRes1, ymm1);
// Pack results back to epi8
ymm0 = _mm256_packs_epi16(ymmRes0, ymmRes1);
// ymm0 = [ymmRes1[255:128] ymmRes0[255:128] ymmRes1[127:0] ymmRes0[127:0]]
// p_llrRes = [ymmRes1[255:128] ymmRes1[127:0] ymmRes0[255:128] ymmRes0[127:0]]
*p_llrRes = _mm256_permute4x64_epi64(ymm0, 0xD8);
// Next result
p_llrRes++;
}
}
\end{lstlisting}
The sum of the LLRs is carried out in 16 bit for accuracy and is then saturated to 8 bit for CN processing. Saturation after each addition results in significant loss of sensitivity for low code rates.
\subsection{Mapping to the Processing Buffers}
\label{sec:mapp-cn-proc}
For efficient processing with the AVX instructions, the data is required to be aligned in a certain manner. That is the reason why processing buffers have been introduced. The drawback is that the results of the processing need to copied every time to the processing buffer of the next task. However, the speed up in computation with AVX more than makes up for the time wasted in copying data. The copying is implemented using look-up tables (LUTs) which are described in table \ref{tab:sum_lut}.
\begin{table}[ht]
\centering
\begin{tabular}{ll}
\toprule
\textbf{LUT} & \textbf{Description} \\
\midrule
\texttt{lut\_llr2llrProcBuf\_BGX\_ZX\_RX} & Indices for function \texttt{llr2llrProcBuf} \\
\texttt{lut\_llr2CnProcBuf\_BGX\_ZX\_RX} & Indices for function \texttt{llr2CnProcBuf} \\
\texttt{lut\_cn2bnProcBuf\_BGX\_ZX\_RX} & Indices for functions \texttt{cn2bnProcBuf} and \texttt{bn2cnProcBuf} \\
\bottomrule
\end{tabular}
\caption{Summary of the LUTs.}
\label{tab:sum_lut}
\end{table}
These LUTs are depending on the BG, the lifting size and the code rate. Assuming 5 rates for BG2 and 7 rates for BG1, the total number of LUTs is 617.
\newpage
\section{Performance Results}
\label{sec:performance-results}
In this section, the performance in terms of BLER and decoding latency of the current LDPC decoder implementation is verified.
\subsection{BLER Performance}
\label{sec:bler-performance}
In all simulations, we assume AWGN, QPSK modulation and 8-bit input LLRs. The results are averaged over at least $10\,000$ channel realizations.
The first set of simulations in Figure \ref{fig:bler-bg2-15} compares the current LDPC decoder implementation to the reference implementation developed by Kien. This reference implementation is called \textit{LDPC Ref} and uses the min-sum algorithm with 2 layers and 16 bit for processing. Out current optimized decoder implementation is referred to as \textit{LDPC Opt}. Moreover, reference results provided by Huawei are also shown.
\begin{figure}[ht]
\centering
\begin{tikzpicture}
\tikzstyle{every pin}=[fill=white,draw=black]
\pgfplotsset{every axis legend/.append style={
cells={anchor=west}, at={(1.05,1)}, anchor=north west}}
% \pgfplotsset{every axis plot/.append style={smooth}}
\pgfplotsset{every axis/.append style={line width=0.5pt}}
\pgfplotsset{every axis/.append style={mark options=solid, mark size=2.5pt}}
\begin{semilogyaxis}[title={}, xlabel={$\SNR$ [dB]}, ylabel={BLER},
grid={both}, xmin=-4, xmax=2, xtick={-4,-3.5,...,2}, ymin=0,
ymax=1,ytickten={-5,-4,-3,-2,-1,0},legend columns=1]
% HUAWEI merged BG2 2017-06-15
\addplot[black, solid] plot coordinates { (-3.91839,0.01) (-3.5567,0.0001) };
% Kien's 2-layer 16bit code
\addplot[red, solid, mark=o] plot coordinates { (-2.750000,0.915500) (-2.500000,0.576000) (-2.250000,0.165000) (-2.000000,0.017100) (-1.750000,0.000600) (-1.500000,0.000000) (-1.250000,0.000000) (-1.000000,0.000000)};
% LDPC opt with 16bit BN processing
\addplot[blue, solid, mark=square] plot coordinates { (-2.750000,0.998600) (-2.500000,0.953600) (-2.250000,0.718800) (-2.000000,0.299300) (-1.750000,0.053700) (-1.500000,0.005100) (-1.250000,0.000500) (-1.000000,0.000100)};
% Matlab
\addplot[green, solid, mark=triangle] plot coordinates {(-2.750000,0.318200) (-2.500000,0.135900) (-2.250000,0.102000) (-2.000000,0.092300) (-1.750000,0.079200) (-1.500000,0.063100) (-1.250000,0.041400) (-1.000000,0.029600) (-0.750000,0.017500) (-0.500000,0.011800) (-0.250000,0.006100) (0.000000,0.004100) (0.250000,0.002800) (0.500000,0.000800) (0.750000,0.000300) (1.000000,0.000400) };
% \addplot[blue, solid, mark=triangle] plot coordinates {(-2.750000,0.997600) (-2.500000,0.961600) (-2.250000,0.815200) (-2.000000,0.628800) (-1.750000,0.586200) (-1.500000,0.572800) (-1.250000,0.507600) (-1.000000,0.376700) (-0.750000,0.262000) (-0.500000,0.157100) (-0.250000,0.087100) (0.000000,0.045400) (0.250000,0.021000) (0.500000,0.010000) (0.750000,0.004400) (1.000000,0.002600) (1.250000,0.000700) (1.500000,0.000500) (1.750000,0.000000) (2.000000,0.000000) (2.250000,0.000000) (2.500000,0.000000) (2.750000,0.000000) (3.000000,0.000000)};
% 20 iterations
\addplot[red, solid, mark=o] plot coordinates { (-2.750000,0.330300) (-2.500000,0.067800) (-2.250000,0.006000) (-2.000000,0.000100) (-1.750000,0.000000) (-1.500000,0.000000) (-1.250000,0.000000) (-1.000000,0.000000)};
\addplot[blue, solid, mark=square] plot coordinates {(-2.750000,0.341300) (-2.500000,0.065100) (-2.250000,0.004100) (-2.000000,0.000200) (-1.750000,0.000100) (-1.500000,0.000000) (-1.250000,0.000000) (-1.000000,0.000000)};
% 5 iterations
\addplot[red, solid, mark=o] plot coordinates {(-1.250000,0.781300) (-1.000000,0.421000) (-0.750000,0.140400) (-0.500000,0.028900) (-0.250000,0.003300) (0.000000,0.000300) (0.250000,0.000000) (0.500000,0.000000)};
\addplot[blue, solid, mark=square] plot coordinates {(-0.250000,0.705000) (0.000000,0.406200) (0.250000,0.181300) (0.500000,0.061600) (0.750000,0.015900) (1.000000,0.004900) (1.250000,0.000900) (1.500000,0.000200)};
\addplot[green, solid, mark=triangle] plot coordinates {(-1.000000,0.778900) (-0.500000,0.226400) (0.000000,0.027400) (0.500000,0.002600) (1.000000,0.000300) };
% 30 iterations
% \addplot[blue, dashed, mark=square] plot coordinates {(-3.000000,0.623800) (-2.750000,0.224100) (-2.500000,0.031600) (-2.250000,0.001100) (-2.000000,0.000000)};
\draw (axis cs:-3.3,0.1) node[fill=white,draw=black] (pint0) {20 iter};
\draw (axis cs:-2.3,0.01) node[draw,black,thick,ellipse,minimum height=0.3cm] (ell0) {}; \draw[black,thick] (pint0) -- (ell0);
\draw (axis cs:0,0.0001) node[fill=white,draw=black] (pint1) {10 iter};
\draw (axis cs:-1.6,0.002) node[draw,black,thick,ellipse,minimum width=0.8cm] (ell1) {}; \draw[black,thick] (pint1) -- (ell1);
\draw (axis cs:1.3,0.2) node[fill=white,draw=black] (pint2) {5 iter};
\draw (axis cs:0.3,0.01) node[draw,black,thick,ellipse,minimum width=2cm] (ell2) {}; \draw[black,thick] (pint2) -- (ell2);
\legend{ {Huawei 2017-06-15}\\
{LDPC Ref}\\
{LDPC Opt}\\
{MATLAB 5Glib}\\};
\end{semilogyaxis}
\end{tikzpicture}
\caption{BLER vs. SNR, BG2, Rate=1/5, \{5,10,20\} Iterations, B=1280.}
\label{fig:bler-bg2-15}
\end{figure}
From Figure \ref{fig:bler-bg2-15} it can be observed that the reference decoder outperforms the current implementation significantly for low to medium number of iterations. The reason is the implementation of 2 layers in the reference decoder, which results in faster convergence for punctured codes and hence requires less iterations to achieve a given BLER target. Note that there is a large performance loss of nearly 6 dB at BLER $10^{-2}$ between the Huawei reference and the current optimized decoder implementation with 5 iterations.
Moreover, there is a gap of about 1.5 dB between the results provided by Huawei and the current decoder with 20 iterations. The reason is the min-sum approximation algorithm used in both the reference decoder and the current implementation. The gap can be closed by using a tighter approximation like the min-sum with normalization or the lambda-min approach. Moreover, the gap closes for higher code rates which can be observed from Figure \ref{fig:bler-bg2-r23}. The gap is only about 0.6 dB for 50 iterations.
Concerning the LDPC decoder provided by MATLAB, the performance appears to be rather inconsistent. For 5 iterations, the MATLAB decoder outperforms the optimized decoder most likely due to a tighter approximation used in the check node processing. However, it is inferior to the reference algorithm which suggests that the MATLAB decoder is not optimized for punctured LDPC codes, i.e. no layered processing. For 50 iterations the MATLAB LDPC decoder shows a strange behavior, the slope of the BLER curve is not as expected. This suggests that there might be some internal decoder problems with the NR base graph 2.
\begin{figure}[ht]
\centering
\begin{tikzpicture}
\tikzstyle{every pin}=[fill=white,draw=black]
\pgfplotsset{every axis legend/.append style={
cells={anchor=west}, at={(1.05,1)}, anchor=north west}}
% \pgfplotsset{every axis plot/.append style={smooth}}
\pgfplotsset{every axis/.append style={line width=0.5pt}}
\pgfplotsset{every axis/.append style={mark options=solid, mark size=2.5pt}}
\begin{semilogyaxis}[title={}, xlabel={$\SNR$ [dB]}, ylabel={BLER},
grid={both}, xmin=3, xmax=5.5, xtick={3,3.5,...,5.5}, ymin=0,
ymax=1,ytickten={-5,-4,-3,-2,-1,0},legend columns=1]
% Kien's 2-layer 16bit code
%\addplot[red, solid] plot coordinates { (-2.750000,0.915500) (-2.500000,0.576000) (-2.250000,0.165000) (-2.000000,0.017100) (-1.750000,0.000600) (-1.500000,0.000000) (-1.250000,0.000000) (-1.000000,0.000000)};
% Huawei
\addplot[black, solid] plot coordinates { (3.28392,0.01) (3.73319,0.0001) };
% LDPC opt with 16bit BN processing
\addplot[blue, solid, mark=square] plot coordinates {(4.000000,0.487500) (4.250000,0.163400) (4.500000,0.029800) (4.750000,0.002700) (5.000000,0.000100)};
%\addplot[blue, dashed, mark=triangle] plot coordinates {(4.000000,0.487500) (4.250000,0.163700) (4.500000,0.030000) (4.750000,0.002900) (5.000000,0.000100)};
\addplot[blue, dashed, mark=square] plot coordinates {(3.000000,0.911600) (3.250000,0.614100) (3.500000,0.230100) (3.750000,0.036900) (4.000000,0.001100) (4.250000,0.000000) (4.500000,0.000000)};
\legend{ {Huawei 2017-06-15}\\
{LDPC Opt 5 iter}\\
{LDPC Opt 50 iter}\\};
\end{semilogyaxis}
\end{tikzpicture}
\caption{BLER vs. SNR, BG2, Rate=2/3, \{5,50\} Iterations, B=1280.}
\label{fig:bler-bg2-r23}
\end{figure}
Figure \ref{fig:bler-bg1-r89} shows the performance of BG1 with largest block size of $B=8448$ and highest code rate $R=8/9$.
\begin{figure}[ht]
\centering
\begin{tikzpicture}
\tikzstyle{every pin}=[fill=white,draw=black]
\pgfplotsset{every axis legend/.append style={
cells={anchor=west}, at={(1.05,1)}, anchor=north west}}
% \pgfplotsset{every axis plot/.append style={smooth}}
\pgfplotsset{every axis/.append style={line width=0.5pt}}
\pgfplotsset{every axis/.append style={mark options=solid, mark size=2.5pt}}
\begin{semilogyaxis}[title={}, xlabel={$\SNR$ [dB]}, ylabel={BLER},
grid={both}, xmin=6, xmax=11, xtick={6,6.5,...,11}, ymin=0,
ymax=1,ytickten={-5,-4,-3,-2,-1,0},legend columns=1]
% Huawei
\addplot[black, solid] plot coordinates { (6.118717,0.01) (6.291449,0.0001) };
% LDPC opt 5 iter
\addplot[blue, solid, mark=square] plot coordinates {(8.500000,0.350000) (8.750000,0.155100) (9.000000,0.062400) (9.250000,0.023000) (9.500000,0.008700) (9.750000,0.003500) (10.000000,0.000900) (10.250000,0.000300) };
% LDPC opt 50 iter
\addplot[blue, dashed, mark=square] plot coordinates {(6.000000,0.705333) (6.100000,0.353367) (6.200000,0.102100) (6.300000,0.015133) (6.400000,0.000967) (6.500000,0.000000)};
\legend{ {Huawei}\\
{LDPC Opt 5 iter}\\
{LDPC Opt 50 iter}\\};
\end{semilogyaxis}
\end{tikzpicture}
\caption{BLER vs. SNR, BG1, Rate=8/9 \{5,50\} Iterations, B=8448.}
\label{fig:bler-bg1-r89}
\end{figure}
From \ref{fig:bler-bg1-r89} it can be observed that the performance gap is only about 0.2 dB if 50 iterations are used. However, for 5 iterations there is still a significant performance loss of about 3.4 dB at BLER $10^{-2}$.
\newpage
\subsection{Decoding Latency}
\label{sec:decoding-time}
This section provides results in terms of decoding latency. That is, the time it takes the decoder to to finish decoding for a given number of iterations. To measure the run time of the decoder we use the OAI tool \texttt{time\_meas.h}. The clock frequency is about 2.9 GHZ, decoder is run on a single core and the results are averaged over $10\,000$ blocks.
The results in Table \ref{tab:lat-bg2-r15} show the impact of the number of iterations on the decoding latency. It can be observed that the latency roughly doubles if the number of iterations are doubled.
\begin{table}[ht]
\centering
\begin{tabular}{lrrr}
\toprule
\textbf{Function} & \textbf{Time [$\mu s$] (5 it)} & \textbf{Time [$\mu s$] (10 it)} & \textbf{Time [$\mu s$] (20 it)}\\
\midrule
\texttt{llr2llrProcBuf} & 1.1 & 1.1 & 1.1 \\
\texttt{llr2CnProcBuf} & 12.4 & 12.0 & 12.0 \\
\texttt{cnProc} & 11.7 & 22.1 & 43.5 \\
\texttt{bnProcPc} & 6.6 & 12.1 & 23.8 \\
\texttt{bnProc} & 4.2 & 8.1 & 16.2 \\
\texttt{cn2bnProcBuf} & 61.3 & 118.3 & 234.9 \\
\texttt{bn2cnProcBuf} & 38.1 & 82.5 & 172.3 \\
\texttt{llrRes2llrOut} & 3.5 & 3.4 & 3.4 \\
\texttt{llr2bit} & 0.2 & 0.1 & 0.1 \\
\midrule
\textbf{Total} & \textbf{139.4} & \textbf{260.3} & \textbf{508.4} \\
\bottomrule
\end{tabular}
\caption{BG2, Z=128, R=1/5, B=1280, LDPC Opt}
\label{tab:lat-bg2-r15}
\end{table}
Table \ref{tab:lat-bg2-i5} shows the impact of the code rate on the latency for a given block size and 5 iterations. It can be observed that the performance gain from code rate 1/3 to 2/3 is about a factor 2.
\begin{table}[ht]
\centering
\begin{tabular}{lrrr}
\toprule
\textbf{Function} & \textbf{Time [$\mu s$] (R=1/5)} & \textbf{Time [$\mu s$] (R=1/3)} & \textbf{Time [$\mu s$] (R=2/3)}\\
\midrule
\texttt{llr2llrProcBuf} & 3.2 & 2.9 & 2.6 \\
\texttt{llr2CnProcBuf} & 36.5 & 25.4 & 14.8 \\
\texttt{cnProc} & 33.6 & 25.2 & 13.3 \\
\texttt{bnProcPc} & 17.6 & 10.2 & 4.5 \\
\texttt{bnProc} & 8.5 & 5.4 & 2.5 \\
\texttt{cn2bnProcBuf} & 175.3 & 110.6 & 50.7 \\
\texttt{bn2cnProcBuf} & 106.6 & 71.2 & 36.1 \\
\texttt{llrRes2llrOut} & 10.2 & 6.3 & 3.3 \\
\texttt{llr2bit} & 0.4 & 0.2 & 0.1 \\
\midrule
\textbf{Total} & \textbf{392.4} & \textbf{258.0} & \textbf{128.2} \\
\bottomrule
\end{tabular}
\caption{BG2, Z=384, B=3840, LDPC Opt, 5 iterations}
\label{tab:lat-bg2-i5}
\end{table}
Table \ref{tab:lat-bg1-i5} shows the results for BG1, larges block size and different code rates. The latency difference betwee code rate 1/3 and code rate 2/3 is less than half because upper left corner of the PCM is more dense than the rest of the PCM.
\begin{table}[ht]
\centering
\begin{tabular}{lrrr}
\toprule
\textbf{Function} & \textbf{Time [$\mu s$] (R=1/3)} & \textbf{Time [$\mu s$] (R=2/3)} & \textbf{Time [$\mu s$] (R=8/9)}\\
\midrule
\texttt{llr2llrProcBuf} & 5.5 & 4.9 & 4.6 \\
\texttt{llr2CnProcBuf} & 60.6 & 34.1 & 24.4 \\
\texttt{cnProc} & 102.0 & 74.1 & 56.0 \\
\texttt{bnProcPc} & 26.0 & 11.0 & 6.4 \\
\texttt{bnProc} & 15.7 & 7.4 & 4.5 \\
\texttt{cn2bnProcBuf} & 291.0 & 140.8 & 83.1 \\
\texttt{bn2cnProcBuf} & 193.6 & 100.5 & 63.0 \\
\texttt{llrRes2llrOut} & 13.3 & 6.9 & 5.2 \\
\texttt{llr2bit} & 0.4 & 0.2 & 0.2 \\
\midrule
\textbf{Total} & \textbf{708.9} & \textbf{380.6} & \textbf{248.1}\\
\bottomrule
\end{tabular}
\caption{BG1, Z=384, B=8448, LDPC Opt, 5 iterations}
\label{tab:lat-bg1-i5}
\end{table}
From the above results it can be observed that the data transfer between CNs and BNs takes up a significant amount of the run time. However, the performance gain due to AVX instructions in both CN and BN processing is significantly larger than the penalty incurred by the data transfers.
\section{Parity Check and early stopping Criteria}
It is often unnecessary to carry out the maximum number of iterations. After each iteration a parity check \eqref{eq:29} can be computed and if a valid code word is found the decoder can stop. This functionality has been implemented and the additional overhead is reasonable. The PC is carried out in the CN processing buffer and the calculation complexity itself is negligible. However, for the processing it is necessary to move the BN results to the CN buffer which takes time, the overall overhead is at most $10\%$ compared to an algorithm without early stopping criteria with the same number of iterations. The PC has to be activated via the define \texttt{NR\_LDPC\_ENABLE\_PARITY\_CHECK}.
\section{Conclusion}
\label{sec:conclusion}
The results in the previous sections show that the current optimized LDPC implementation full-fills the requirements in terms of decoding latency for low to medium number of iterations at the expanse of a significant loss in BLER performance. To improve BLER performance, it is recommended to implement a layered algorithm and a min-sum algorithm with normalization. Further improvements upon the current implementation are detailed in the next section.
\newpage
\section{Future Work}
\label{sec:future-work}
The improvements upon the current LDPC decoder implementation can be divided into two categories:
\begin{enumerate}
\item Improved BLER performance
\item Reduced decoding latency
\end{enumerate}
\subsection{Improved BLER Performance}
\label{sec:impr-bler-perf}
The BLER performance can be improved by using a tighter approximation than the min-sum approximation. For instance, the min-sum algorithm can be improved by adding a correction factor in the CN processing . The min-sum approximation in \eqref{eq:40} is modified as
\begin{equation}
\label{eq:50}
r_{ji} = \prod_{j'\in\Bcal_i\setminus j}\sgn q_{ij'}\min_{j'\in\Bcal_i\setminus j} |q_{ij'}| + w(q_{ij'})
\end{equation}
The correction term $w(q_{ij'})$ is defined as
\begin{equation}
\label{eq:51}
w(q_{ij'}) =
\begin{cases}
c & \textrm{if}~ \\
-c & \textrm{if}~ \\
0 & \textrm{otherwise}
\end{cases}
\end{equation}
where the constant $c$ is of order $0.5$ typically.
\subsection{Reduced Decoding Latency}
\label{sec:reduc-decod-latency}
The following improvements will reduce the decoding latency:
\begin{itemize}
\item Adapt to AVX512
\item Implement 2/3-layers for faster convergence
\end{itemize}
\paragraph{AVX512:}
The computations in the CN and BN processing can be further accelerated by using AVX512 instructions. This improvement will speed-up the CN and BN processing by a approximately a factor of 2.
\paragraph{Layered processing:}
The LDPC code in NR always punctures the first 2 columns of the base graph. Hence, the decoder inserts LLRs with value 0 at their place and needs to retrieve those bits during the decoding process. Instead of computing all the parity equations and then passing the results to the BN processing, it is beneficial to first compute parity equations where at most one punctured BN is connected to that CN. If two punctured BNs are connected than according to \eqref{eq:40}, the result will be again 0. Thus in a first sub-iteration those parity equation are computed and the results are send to BN processing which calculates the results using only those rows in the PCM. In the second sub-iteration the remaining check equation are used.
The convergence of this layered approach is much fast since the bit can be retrieved more quickly while the decoding complexity remains the same. Therefore, for a fixed number of iterations the layered algorithm will have a significantly better performance.
\newpage
\bibliographystyle{IEEEtran}
\bibliography{./references}
\end{document}
%%% Local Variables:
%%% mode: latex
%%% TeX-master: t
%%% End:
openair1/PHY/CODING/nrLDPC_decoder/doc/nrLDPC/references.bib
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%
% Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
% contributor license agreements. See the NOTICE file distributed with
% this work for additional information regarding copyright ownership.
% The OpenAirInterface Software Alliance licenses this file to You under
% the OAI Public License, Version 1.1 (the "License"); you may not use this file
% except in compliance with the License.
% You may obtain a copy of the License at
%
% http://www.openairinterface.org/?page_id=698
%
% Unless required by applicable law or agreed to in writing, software
% distributed under the License is distributed on an "AS IS" BASIS,
% WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
% See the License for the specific language governing permissions and
% limitations under the License.
%-------------------------------------------------------------------------------
% For more information about the OpenAirInterface (OAI) Software Alliance:
% contact@openairinterface.org
%
@online{3gpp5gTimeline,
author = {3GPP},
title = {{3GPP 5G Timeline}},
year = 2016,
urldate = {2017-06-14},
url = {http://www.3gpp.org/images/articleimages/5g_timeline.jpg}
}
@techreport{3gppTR38913,
author = "{Technical Specification Group Radio Access Network}",
title = "{Study on Scenarios and Requirements for Next Generation Access Technologies}",
institution = "{3GPP TR 38.913 V14.2.0}",
month = mar,
year = 2017,
};
@techreport{iturM2038,
author = "{ITU-R}",
title = "{IMT Vision -- Framework and overall objectives of the future development of IMT for 2020 and beyond}",
institution = "{Radiocommunication Sector of ITU}",
month = sep,
year = 2015,
};
@techreport{3gpp2014seb,
author = "{Samsung, Nokia Networks}",
title = "{New SID Proposal: Study on Elevation Beamforming/Full-Dimension (FD) MIMO for LTE}",
institution = "3GPP",
month = sep,
year = 2014,
};
@techreport{3gpp2015fdm,
author = "{Technical Specification Group Radio Access Network}",
title = "{Study on elevation beamforming / Full-Dimension (FD) Multiple Input Multiple Output (MIMO) for LTE}",
institution = "3GPP TR 36.897 V13.0.0",
month = jun,
year = 2015,
};
@techreport{3gpp2008tsg,
author = "{Technical Specification Group Radio Access Network;
Evolved Universal Terrestrial Radio Access (E-UTRA)}",
title = "{Further advancements for E-UTRA physical layer aspects (Release 9)}",
institution = "{3GPP TR 36.814 V9.0.0}",
month = mar,
year = 2010,
};
@techreport{3gpp2011uer,
author = "{Technical Specification Group Radio Access Network;
Evolved Universal Terrestrial Radio Access (E-UTRA)}",
title = "{User Equipment (UE) Radio Transmission and Reception}",
institution = "{3GPP TR 36.101 V10.3.0}",
month = jun,
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};
@techreport{3gpp2009_36211,
author = "{3rd Generation Partnership Project}",
title = "{Physical Channels and Modulation (Release 8)}",
institution = "{3GPP TS 36.211 V8.6.0}",
month = mar,
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};
@techreport{3gpp2017_38212,
author = "{3rd Generation Partnership Project}",
title = "{Multiplexing and channel coding (Release 15)}",
institution = "{3GPP TS 38.212 V15.0.1}",
month = mar,
year = 2018,
};
@article{gallager1962low,
title={Low-density parity-check codes},
author={Gallager, Robert},
journal={IRE Transactions on information theory},
volume={8},
number={1},
pages={21--28},
year={1962},
publisher={IEEE}
}
openair1/PHY/CODING/nrLDPC_decoder/doc/nrLDPC_doxyCfg
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/*
* Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership.
* The OpenAirInterface Software Alliance licenses this file to You under
* the OAI Public License, Version 1.1 (the "License"); you may not use this file
* except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.openairinterface.org/?page_id=698
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*-------------------------------------------------------------------------------
* For more information about the OpenAirInterface (OAI) Software Alliance:
* contact@openairinterface.org
*/
/*!\file nrLDPC_decoder.c
* \brief Defines the LDPC decoder
* \author Sebastian Wagner (TCL Communications) Email: <mailto:sebastian.wagner@tcl.com>
* \date 27-03-2018
* \version 1.0
* \note
* \warning
*/
#include <stdint.h>
#include <immintrin.h>
#include "nrLDPC_defs.h"
#include "nrLDPC_types.h"
#include "nrLDPC_init.h"
#include "nrLDPC_mPass.h"
#include "nrLDPC_cnProc.h"
#include "nrLDPC_bnProc.h"
#ifdef NR_LDPC_DEBUG_MODE
#include "nrLDPC_tools/nrLDPC_debug.h"
#endif
static inline uint32_t nrLDPC_decoder_core(int8_t* p_llr, int8_t* p_out, uint32_t numLLR, t_nrLDPC_lut* p_lut, t_nrLDPC_dec_params* p_decParams, t_nrLDPC_time_stats* p_profiler);
int32_t nrLDPC_decoder(t_nrLDPC_dec_params* p_decParams, int8_t* p_llr, int8_t* p_out, t_nrLDPC_time_stats* p_profiler)
{
uint32_t numLLR;
uint32_t numIter = 0;
t_nrLDPC_lut lut;
t_nrLDPC_lut* p_lut = &lut;
// Initialize decoder core(s) with correct LUTs
numLLR = nrLDPC_init(p_decParams, p_lut);
// Launch LDPC decoder core for one segment
numIter = nrLDPC_decoder_core(p_llr, p_out, numLLR, p_lut, p_decParams, p_profiler);
return numIter;
}
/**
\brief Performs LDPC decoding of one code block
\param p_llr Input LLRs
\param p_out Output vector
\param numLLR Number of LLRs
\param p_lut Pointer to decoder LUTs
\param p_decParams LDPC decoder parameters
\param p_profiler LDPC profiler statistics
*/
static inline uint32_t nrLDPC_decoder_core(int8_t* p_llr, int8_t* p_out, uint32_t numLLR, t_nrLDPC_lut* p_lut, t_nrLDPC_dec_params* p_decParams, t_nrLDPC_time_stats* p_profiler)
{
uint16_t Z = p_decParams->Z;
uint8_t BG = p_decParams->BG;
uint8_t numMaxIter = p_decParams->numMaxIter;
e_nrLDPC_outMode outMode = p_decParams->outMode;
// Minimum number of iterations is 1
// 0 iterations means hard-decision on input LLRs
uint32_t i = 1;
// Initialize with parity check fail != 0
int32_t pcRes = 1;
int8_t* p_llrOut;
if (outMode == nrLDPC_outMode_LLRINT8)
{
p_llrOut = p_out;
}
else
{
// Use LLR processing buffer as temporary output buffer
p_llrOut = (int8_t*) llrProcBuf;
}
// Initialization
#ifdef NR_LDPC_PROFILER_DETAIL
start_meas(&p_profiler->llr2llrProcBuf);
#endif
nrLDPC_llr2llrProcBuf(p_lut, p_llr, Z, BG);
#ifdef NR_LDPC_PROFILER_DETAIL
stop_meas(&p_profiler->llr2llrProcBuf);
#endif
#ifdef NR_LDPC_DEBUG_MODE
nrLDPC_debug_initBuffer2File(nrLDPC_buffers_LLR_PROC);
nrLDPC_debug_writeBuffer2File(nrLDPC_buffers_LLR_PROC);
#endif
#ifdef NR_LDPC_PROFILER_DETAIL
start_meas(&p_profiler->llr2CnProcBuf);
#endif
nrLDPC_llr2CnProcBuf(p_lut, p_llr, numLLR, Z, BG);
#ifdef NR_LDPC_PROFILER_DETAIL
stop_meas(&p_profiler->llr2CnProcBuf);
#endif
#ifdef NR_LDPC_DEBUG_MODE
nrLDPC_debug_initBuffer2File(nrLDPC_buffers_CN_PROC);
nrLDPC_debug_writeBuffer2File(nrLDPC_buffers_CN_PROC);
#endif
// First iteration
// CN processing
#ifdef NR_LDPC_PROFILER_DETAIL
start_meas(&p_profiler->cnProc);
#endif
if (BG == 1)
{
nrLDPC_cnProc_BG1(p_lut, Z);
}
else
{
nrLDPC_cnProc_BG2(p_lut, Z);
}
#ifdef NR_LDPC_PROFILER_DETAIL
stop_meas(&p_profiler->cnProc);
#endif
#ifdef NR_LDPC_DEBUG_MODE
nrLDPC_debug_initBuffer2File(nrLDPC_buffers_CN_PROC_RES);
nrLDPC_debug_writeBuffer2File(nrLDPC_buffers_CN_PROC_RES);
#endif
#ifdef NR_LDPC_PROFILER_DETAIL
start_meas(&p_profiler->cn2bnProcBuf);
#endif
if (BG == 1)
{
nrLDPC_cn2bnProcBuf_BG1(p_lut, Z);
}
else
{
nrLDPC_cn2bnProcBuf(p_lut, Z);
}
#ifdef NR_LDPC_PROFILER_DETAIL
stop_meas(&p_profiler->cn2bnProcBuf);
#endif
#ifdef NR_LDPC_DEBUG_MODE
nrLDPC_debug_initBuffer2File(nrLDPC_buffers_BN_PROC);
nrLDPC_debug_writeBuffer2File(nrLDPC_buffers_BN_PROC);
#endif
// BN processing
#ifdef NR_LDPC_PROFILER_DETAIL
start_meas(&p_profiler->bnProcPc);
#endif
nrLDPC_bnProcPc(p_lut, Z);
#ifdef NR_LDPC_PROFILER_DETAIL
stop_meas(&p_profiler->bnProcPc);
#endif
#ifdef NR_LDPC_DEBUG_MODE
nrLDPC_debug_initBuffer2File(nrLDPC_buffers_LLR_RES);
nrLDPC_debug_writeBuffer2File(nrLDPC_buffers_LLR_RES);
#endif
#ifdef NR_LDPC_PROFILER_DETAIL
start_meas(&p_profiler->bnProc);
#endif
nrLDPC_bnProc(p_lut, Z);
#ifdef NR_LDPC_PROFILER_DETAIL
stop_meas(&p_profiler->bnProc);
#endif
#ifdef NR_LDPC_DEBUG_MODE
nrLDPC_debug_initBuffer2File(nrLDPC_buffers_BN_PROC_RES);
nrLDPC_debug_writeBuffer2File(nrLDPC_buffers_BN_PROC_RES);
#endif
// BN results to CN processing buffer
#ifdef NR_LDPC_PROFILER_DETAIL
start_meas(&p_profiler->bn2cnProcBuf);
#endif
if (BG == 1)
{
nrLDPC_bn2cnProcBuf_BG1(p_lut, Z);
}
else
{
nrLDPC_bn2cnProcBuf(p_lut, Z);
}
#ifdef NR_LDPC_PROFILER_DETAIL
stop_meas(&p_profiler->bn2cnProcBuf);
#endif
#ifdef NR_LDPC_DEBUG_MODE
nrLDPC_debug_writeBuffer2File(nrLDPC_buffers_CN_PROC);
#endif
// Parity Check not necessary here since it will fail
// because first 2 cols/BNs in BG are punctured and cannot be
// estimated after only one iteration
// First iteration finished
while ( (i < (numMaxIter-1)) && (pcRes != 0) )
{
// Increase iteration counter
i++;
// CN processing
#ifdef NR_LDPC_PROFILER_DETAIL
start_meas(&p_profiler->cnProc);
#endif
if (BG == 1)
{
nrLDPC_cnProc_BG1(p_lut, Z);
}
else
{
nrLDPC_cnProc_BG2(p_lut, Z);
}
#ifdef NR_LDPC_PROFILER_DETAIL
stop_meas(&p_profiler->cnProc);
#endif
#ifdef NR_LDPC_DEBUG_MODE
nrLDPC_debug_writeBuffer2File(nrLDPC_buffers_CN_PROC_RES);
#endif
// Send CN results back to BNs
#ifdef NR_LDPC_PROFILER_DETAIL
start_meas(&p_profiler->cn2bnProcBuf);
#endif
if (BG == 1)
{
nrLDPC_cn2bnProcBuf_BG1(p_lut, Z);
}
else
{
nrLDPC_cn2bnProcBuf(p_lut, Z);
}
#ifdef NR_LDPC_PROFILER_DETAIL
stop_meas(&p_profiler->cn2bnProcBuf);
#endif
#ifdef NR_LDPC_DEBUG_MODE
nrLDPC_debug_writeBuffer2File(nrLDPC_buffers_BN_PROC);
#endif
// BN Processing
#ifdef NR_LDPC_PROFILER_DETAIL
start_meas(&p_profiler->bnProcPc);
#endif
nrLDPC_bnProcPc(p_lut, Z);
#ifdef NR_LDPC_PROFILER_DETAIL
stop_meas(&p_profiler->bnProcPc);
#endif
#ifdef NR_LDPC_DEBUG_MODE
nrLDPC_debug_writeBuffer2File(nrLDPC_buffers_LLR_RES);
#endif
#ifdef NR_LDPC_PROFILER_DETAIL
start_meas(&p_profiler->bnProc);
#endif
nrLDPC_bnProc(p_lut, Z);
#ifdef NR_LDPC_PROFILER_DETAIL
stop_meas(&p_profiler->bnProc);
#endif
#ifdef NR_LDPC_DEBUG_MODE
nrLDPC_debug_writeBuffer2File(nrLDPC_buffers_BN_PROC_RES);
#endif
// BN results to CN processing buffer
#ifdef NR_LDPC_PROFILER_DETAIL
start_meas(&p_profiler->bn2cnProcBuf);
#endif
if (BG == 1)
{
nrLDPC_bn2cnProcBuf_BG1(p_lut, Z);
}
else
{
nrLDPC_bn2cnProcBuf(p_lut, Z);
}
#ifdef NR_LDPC_PROFILER_DETAIL
stop_meas(&p_profiler->bn2cnProcBuf);
#endif
#ifdef NR_LDPC_DEBUG_MODE
nrLDPC_debug_writeBuffer2File(nrLDPC_buffers_CN_PROC);
#endif
// Parity Check
#ifdef NR_LDPC_ENABLE_PARITY_CHECK
#ifdef NR_LDPC_PROFILER_DETAIL
start_meas(&p_profiler->cnProcPc);
#endif
if (BG == 1)
{
pcRes = nrLDPC_cnProcPc_BG1(p_lut, Z);
}
else
{
pcRes = nrLDPC_cnProcPc_BG2(p_lut, Z);
}
#ifdef NR_LDPC_PROFILER_DETAIL
stop_meas(&p_profiler->cnProcPc);
#endif
#endif
}
// Last iteration
if ( (i < numMaxIter) && (pcRes != 0) )
{
// Increase iteration counter
i++;
// CN processing
#ifdef NR_LDPC_PROFILER_DETAIL
start_meas(&p_profiler->cnProc);
#endif
if (BG == 1)
{
nrLDPC_cnProc_BG1(p_lut, Z);
}
else
{
nrLDPC_cnProc_BG2(p_lut, Z);
}
#ifdef NR_LDPC_PROFILER_DETAIL
stop_meas(&p_profiler->cnProc);
#endif
#ifdef NR_LDPC_DEBUG_MODE
nrLDPC_debug_writeBuffer2File(nrLDPC_buffers_CN_PROC_RES);
#endif
// Send CN results back to BNs
#ifdef NR_LDPC_PROFILER_DETAIL
start_meas(&p_profiler->cn2bnProcBuf);
#endif
if (BG == 1)
{
nrLDPC_cn2bnProcBuf_BG1(p_lut, Z);
}
else
{
nrLDPC_cn2bnProcBuf(p_lut, Z);
}
#ifdef NR_LDPC_PROFILER_DETAIL
stop_meas(&p_profiler->cn2bnProcBuf);
#endif
#ifdef NR_LDPC_DEBUG_MODE
nrLDPC_debug_writeBuffer2File(nrLDPC_buffers_BN_PROC);
#endif
// BN Processing
#ifdef NR_LDPC_PROFILER_DETAIL
start_meas(&p_profiler->bnProcPc);
#endif
nrLDPC_bnProcPc(p_lut, Z);
#ifdef NR_LDPC_PROFILER_DETAIL
stop_meas(&p_profiler->bnProcPc);
#endif
#ifdef NR_LDPC_DEBUG_MODE
nrLDPC_debug_writeBuffer2File(nrLDPC_buffers_LLR_RES);
#endif
// If parity check not enabled, no need to send the BN proc results
// back to CNs
#ifdef NR_LDPC_ENABLE_PARITY_CHECK
#ifdef NR_LDPC_PROFILER_DETAIL
start_meas(&p_profiler->bnProc);
#endif
nrLDPC_bnProc(p_lut, Z);
#ifdef NR_LDPC_PROFILER_DETAIL
stop_meas(&p_profiler->bnProc);
#endif
#ifdef NR_LDPC_DEBUG_MODE
nrLDPC_debug_writeBuffer2File(nrLDPC_buffers_BN_PROC_RES);
#endif
// BN results to CN processing buffer
#ifdef NR_LDPC_PROFILER_DETAIL
start_meas(&p_profiler->bn2cnProcBuf);
#endif
if (BG == 1)
{
nrLDPC_bn2cnProcBuf_BG1(p_lut, Z);
}
else
{
nrLDPC_bn2cnProcBuf(p_lut, Z);
}
#ifdef NR_LDPC_PROFILER_DETAIL
stop_meas(&p_profiler->bn2cnProcBuf);
#endif
#ifdef NR_LDPC_DEBUG_MODE
nrLDPC_debug_writeBuffer2File(nrLDPC_buffers_CN_PROC);
#endif
// Parity Check
#ifdef NR_LDPC_PROFILER_DETAIL
start_meas(&p_profiler->cnProcPc);
#endif
if (BG == 1)
{
pcRes = nrLDPC_cnProcPc_BG1(p_lut, Z);
}
else
{
pcRes = nrLDPC_cnProcPc_BG2(p_lut, Z);
}
#ifdef NR_LDPC_PROFILER_DETAIL
stop_meas(&p_profiler->cnProcPc);
#endif
#endif
}
// If maximum number of iterations reached an PC still fails increase number of iterations
// Thus, i > numMaxIter indicates that PC has failed
if (pcRes != 0)
{
i++;
}
// Assign results from processing buffer to output
#ifdef NR_LDPC_PROFILER_DETAIL
start_meas(&p_profiler->llrRes2llrOut);
#endif
nrLDPC_llrRes2llrOut(p_lut, p_llrOut, numLLR);
#ifdef NR_LDPC_PROFILER_DETAIL
stop_meas(&p_profiler->llrRes2llrOut);
#endif
// Hard-decision
#ifdef NR_LDPC_PROFILER_DETAIL
start_meas(&p_profiler->llr2bit);
#endif
if (outMode == nrLDPC_outMode_BIT)
{
nrLDPC_llr2bitPacked(p_out, p_llrOut, numLLR);
}
else if (outMode == nrLDPC_outMode_BITINT8)
{
nrLDPC_llr2bit(p_out, p_llrOut, numLLR);
}
#ifdef NR_LDPC_PROFILER_DETAIL
stop_meas(&p_profiler->llr2bit);
#endif
return i;
}
openair1/PHY/CODING/nrLDPC_decoder/nrLDPC_decoder.h
+45
View File
@@ -0,0 +1,45 @@
/*
* Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership.
* The OpenAirInterface Software Alliance licenses this file to You under
* the OAI Public License, Version 1.1 (the "License"); you may not use this file
* except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.openairinterface.org/?page_id=698
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*-------------------------------------------------------------------------------
* For more information about the OpenAirInterface (OAI) Software Alliance:
* contact@openairinterface.org
*/
/*!\file nrLDPC_decoder.h
* \brief Defines the LDPC decoder core prototypes
* \author Sebastian Wagner (TCL Communications) Email: <mailto:sebastian.wagner@tcl.com>
* \date 27-03-2018
* \version 1.0
* \note
* \warning
*/
#ifndef __NR_LDPC_DECODER__H__
#define __NR_LDPC_DECODER__H__
#include "nrLDPC_types.h"
/**
\brief LDPC decoder
\param p_decParams LDPC decoder parameters
\param p_llr Input LLRs
\param p_llrOut Output vector
\param p_profiler LDPC profiler statistics
*/
int32_t nrLDPC_decoder(t_nrLDPC_dec_params* p_decParams, int8_t* p_llr, int8_t* p_llrOut, t_nrLDPC_time_stats* p_profiler);
#endif
openair1/PHY/CODING/nrLDPC_decoder/nrLDPC_defs.h
+217
View File
@@ -0,0 +1,217 @@
/*
* Licensed to the OpenAirInterface (OAI) Software Alliance under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership.
* The OpenAirInterface Software Alliance licenses this file to You under
* the OAI Public License, Version 1.1 (the "License"); you may not use this file
* except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.openairinterface.org/?page_id=698
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*-------------------------------------------------------------------------------
* For more information about the OpenAirInterface (OAI) Software Alliance:
* contact@openairinterface.org
*/
/*!\file nrLDPC_defs.h
* \brief Defines all constants and buffers for the LDPC decoder
* \author Sebastian Wagner (TCL Communications) Email: <mailto:sebastian.wagner@tcl.com>
* \date 27-03-2018
* \version 1.0
* \note
* \warning
*/
#ifndef __NR_LDPC_DEFS__H__
#define __NR_LDPC_DEFS__H__
// ==============================================================================
// DEFINES
/** Maximum lifting size */
#define NR_LDPC_ZMAX 384
/** Number of columns in BG1 */
#define NR_LDPC_NCOL_BG1 68
/** Number of rows in BG1 */
#define NR_LDPC_NROW_BG1 46
/** Number of edges/entries in BG1 */
#define NR_LDPC_NUM_EDGE_BG1 316
/** Number of check node (CN) groups in BG1
A CN group is defined by its number of connected bit nodes. */
#define NR_LDPC_NUM_CN_GROUPS_BG1 9
/** First column in BG1 that is connected to only a single CN */
#define NR_LDPC_START_COL_PARITY_BG1 26
/** Number of columns in BG1 for rate 1/3 = 22/(68-2) */
#define NR_LDPC_NCOL_BG1_R13 NR_LDPC_NCOL_BG1
/** Number of columns in BG1 for rate 2/3 = 22/(35-2) */
#define NR_LDPC_NCOL_BG1_R23 35
/** Number of columns in BG1 for rate 8/9 ~ 22/(27-2) */
#define NR_LDPC_NCOL_BG1_R89 27
/** Number of bit node (BN) groups in BG1 for rate 1/3
A BN group is defined by its number of connected CNs. */
#define NR_LDPC_NUM_BN_GROUPS_BG1_R13 30
/** Number of bit node (BN) groups in BG1 for rate 2/3 */
#define NR_LDPC_NUM_BN_GROUPS_BG1_R23 8
/** Number of bit node (BN) groups in BG1 for rate 8/9 */
#define NR_LDPC_NUM_BN_GROUPS_BG1_R89 5
/** Number of columns in BG2 */
#define NR_LDPC_NCOL_BG2 52
/** Number of rows in BG2 */
#define NR_LDPC_NROW_BG2 42
/** Number of edges/entries in BG2 */
#define NR_LDPC_NUM_EDGE_BG2 197
/** Number of check node (CN) groups in BG2
A CN group is defined by its number of connected bit nodes. */
#define NR_LDPC_NUM_CN_GROUPS_BG2 6
/** First column in BG2 that is connected to only a single CN */
#define NR_LDPC_START_COL_PARITY_BG2 14
/** Number of columns in BG2 for rate 1/5 = 10/(52-2) */
#define NR_LDPC_NCOL_BG2_R15 NR_LDPC_NCOL_BG2
/** Number of columns in BG2 for rate 1/3 = 10/(32-2) */
#define NR_LDPC_NCOL_BG2_R13 32
/** Number of columns in BG2 for rate 2/3 = 10/(17-2) */
#define NR_LDPC_NCOL_BG2_R23 17
/** Number of bit node (BN) groups in BG2 for rate 1/5
A BN group is defined by its number of connected CNs. */
#define NR_LDPC_NUM_BN_GROUPS_BG2_R15 23
/** Number of bit node (BN) groups in BG2 for rate 1/3 */
#define NR_LDPC_NUM_BN_GROUPS_BG2_R13 10
/** Number of bit node (BN) groups in BG2 for rate 2/3 */
#define NR_LDPC_NUM_BN_GROUPS_BG2_R23 6
/** Worst case size of the CN processing buffer */
#define NR_LDPC_SIZE_CN_PROC_BUF NR_LDPC_NUM_EDGE_BG1*NR_LDPC_ZMAX
/** Worst case size of the BN processing buffer */
#define NR_LDPC_SIZE_BN_PROC_BUF NR_LDPC_NUM_EDGE_BG1*NR_LDPC_ZMAX
/** Maximum number of possible input LLR = NR_LDPC_NCOL_BG1*NR_LDPC_ZMAX */
#define NR_LDPC_MAX_NUM_LLR 26112
// ==============================================================================
// GLOBAL VARIABLES
// Aligned on 32 bytes = 256 bits for AVX2
/** CN processing buffer */
static int8_t cnProcBuf [NR_LDPC_SIZE_CN_PROC_BUF] __attribute__ ((aligned(32)));
/** Buffer for CN processing results */
static int8_t cnProcBufRes[NR_LDPC_SIZE_CN_PROC_BUF] __attribute__ ((aligned(32)));
/** BN processing buffer */
static int8_t bnProcBuf [NR_LDPC_SIZE_BN_PROC_BUF] __attribute__ ((aligned(32)));
/** Buffer for BN processing results */
static int8_t bnProcBufRes[NR_LDPC_SIZE_BN_PROC_BUF] __attribute__ ((aligned(32)));
/** Buffer for LLR results */
static int8_t llrRes [NR_LDPC_MAX_NUM_LLR] __attribute__ ((aligned(32)));
/** LLR processing buffer */
static int8_t llrProcBuf[NR_LDPC_MAX_NUM_LLR] __attribute__ ((aligned(32)));
/** Start addresses for the cnProcBuf for each CN group in BG1*/
static const uint32_t lut_startAddrCnGroups_BG1[NR_LDPC_NUM_CN_GROUPS_BG1] = {0, 1152, 8832, 43392, 61824, 75264, 81408, 88320, 92160};
/** Start addresses for the cnProcBuf for each CN group in BG2*/
static const uint32_t lut_startAddrCnGroups_BG2[NR_LDPC_NUM_CN_GROUPS_BG2] = {0, 6912, 37632, 54912, 61824, 67968};
/** Number of BNs of CN group for BG1.
E.g. 10 means that there is a CN group where every CN is connected to 10 BNs */
static const uint8_t lut_numBnInCnGroups_BG1_R13[NR_LDPC_NUM_CN_GROUPS_BG1] = {3, 4, 5, 6, 7, 8, 9, 10, 19};
/** Number of rows/CNs in every CN group for rate = 1/3 BG1, e.g. 5 rows of CNs connected to 4 BNs */
static const uint8_t lut_numCnInCnGroups_BG1_R13[NR_LDPC_NUM_CN_GROUPS_BG1] = {1, 5, 18, 8, 5, 2, 2, 1, 4};
/** Number of rows/CNs in every CN group for rate = 2/3 BG1, e.g. 3 rows of CNs connected to 7 BNs */
static const uint8_t lut_numCnInCnGroups_BG1_R23[NR_LDPC_NUM_CN_GROUPS_BG1] = {1, 0, 0, 0, 3, 2, 2, 1, 4};
/** Number of rows/CNs in every CN group for rate = 8/9 BG1, e.g. 4 rows of CNs connected to 19 BNs */
static const uint8_t lut_numCnInCnGroups_BG1_R89[NR_LDPC_NUM_CN_GROUPS_BG1] = {1, 0, 0, 0, 0, 0, 0, 0, 4};
/** Number of connected BNs for every column in BG1 rate = 1/3, e.g. in first column all BNs are connected to 30 CNs */
static const uint8_t lut_numEdgesPerBn_BG1_R13[NR_LDPC_START_COL_PARITY_BG1] = {30, 28, 7, 11, 9, 4, 8, 12, 8, 7, 12, 10, 12, 11, 10, 7, 10, 10, 13, 7, 8, 11, 12, 5, 6, 6};
/** Number of connected BNs for every column in BG1 rate = 2/3, e.g. in first column all BNs are connected to 12 CNs */
static const uint8_t lut_numEdgesPerBn_BG1_R23[NR_LDPC_START_COL_PARITY_BG1] = {12, 11, 4, 5, 5, 3, 4, 5, 5, 3, 6, 6, 6, 6, 5, 3, 6, 5, 6, 4, 5, 6, 6, 3, 3, 2};
/** Number of connected BNs for every column in BG1 rate = 8/9, e.g. in first column all BNs are connected to 5 CNs */
static const uint8_t lut_numEdgesPerBn_BG1_R89[NR_LDPC_START_COL_PARITY_BG1] = {5, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2};
/** Number of BNs of CN group for BG2.
E.g. 3 means that there is a CN group where every CN is connected to 3 BNs */
static const uint8_t lut_numBnInCnGroups_BG2_R15[NR_LDPC_NUM_CN_GROUPS_BG2] = {3, 4, 5, 6, 8, 10};
/** Number of rows/CNs in every CN group for rate = 1/5 BG2, e.g. 6 rows of CNs connected to 3 BNs */
static const uint8_t lut_numCnInCnGroups_BG2_R15[NR_LDPC_NUM_CN_GROUPS_BG2] = {6, 20, 9, 3, 2, 2};
/** Number of rows/CNs in every CN group for rate = 1/3 BG2, e.g. 8 rows of CNs connected to 4 BNs */
static const uint8_t lut_numCnInCnGroups_BG2_R13[NR_LDPC_NUM_CN_GROUPS_BG2] = {0, 8, 7, 3, 2, 2};
/** Number of rows/CNs in every CN group for rate = 2/3 BG2, e.g. 1 row of CNs connected to 4 BNs */
static const uint8_t lut_numCnInCnGroups_BG2_R23[NR_LDPC_NUM_CN_GROUPS_BG2] = {0, 1, 0, 2, 2, 2};
/** Number of connected BNs for every column in BG2 rate = 1/5, e.g. in first column all BNs are connected to 22 CNs */
static const uint8_t lut_numEdgesPerBn_BG2_R15[NR_LDPC_START_COL_PARITY_BG2] = {22, 23, 10, 5, 5, 14, 7, 13, 6, 8, 9, 16, 9, 12};
/** Number of connected BNs for every column in BG2 rate = 1/3, e.g. in first column all BNs are connected to 14 CNs */
static const uint8_t lut_numEdgesPerBn_BG2_R13[NR_LDPC_START_COL_PARITY_BG2] = {14, 16, 2, 4, 4, 6, 6, 8, 6, 6, 6, 13, 5, 7};
/** Number of connected BNs for every column in BG2 rate = 2/3, e.g. in first column all BNs are connected to 6 CNs */
static const uint8_t lut_numEdgesPerBn_BG2_R23[NR_LDPC_START_COL_PARITY_BG2] = { 6, 5, 2, 3, 3, 4, 3, 4, 3, 4, 3, 5, 2, 2};
// Number of groups for bit node processing
/** Number of connected CNs for every column/BN in BG1 for rate = 1/3, Worst case is BG1 with up to 30 CNs connected to one BN
E.g. 42 parity BNs connected to single CN */
// BG1: 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30
static const uint8_t lut_numBnInBnGroups_BG1_R13[NR_LDPC_NUM_BN_GROUPS_BG1_R13] = {42, 0, 0, 1, 1, 2, 4, 3, 1, 4, 3, 4, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1};
/** Number of connected CNs for every column/BN in BG1 for rate = 2/3 */
static const uint8_t lut_numBnInBnGroups_BG1_R23[NR_LDPC_NUM_BN_GROUPS_BG1_R13] = { 9, 1, 5, 3, 7, 8, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};
/** Number of connected CNs for every column/BN in BG1 for rate = 8/9 */
static const uint8_t lut_numBnInBnGroups_BG1_R89[NR_LDPC_NUM_BN_GROUPS_BG1_R13] = { 1, 3,21, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};
/** Number of connected CNs for every column/BN in BG2 for rate = 1/5, Worst case is BG1 with up to 30 CNs connected to one BN
E.g. 38 parity BNs connected to single CN */
// BG2: 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30
static const uint8_t lut_numBnInBnGroups_BG2_R15[NR_LDPC_NUM_BN_GROUPS_BG1_R13] = {38, 0, 0, 0, 2, 1, 1, 1, 2, 1, 0, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0};
/** Number of connected CNs for every column/BN in BG2 for rate = 1/3 */
static const uint8_t lut_numBnInBnGroups_BG2_R13[NR_LDPC_NUM_BN_GROUPS_BG1_R13] = {18, 1, 0, 2, 1, 5, 1, 1, 0, 0, 0, 0, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};
/** Number of connected CNs for every column/BN in BG2 for rate = 2/3 */
static const uint8_t lut_numBnInBnGroups_BG2_R23[NR_LDPC_NUM_BN_GROUPS_BG1_R13] = { 3, 3, 5, 3, 2, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};
// Start addresses for the bnProcBuf for each BN group
// BG1
/** Start address for every BN group within the BN processing buffer for BG1 rate = 1/3 */
static const uint32_t lut_startAddrBnGroups_BG1_R13[NR_LDPC_NUM_BN_GROUPS_BG1_R13] = {0, 16128, 17664, 19584, 24192, 34944, 44160, 47616, 62976, 75648, 94080, 99072, 109824};
/** Start address for every BN group within the BN processing buffer for BG1 rate = 2/3 */
static const uint32_t lut_startAddrBnGroups_BG1_R23[NR_LDPC_NUM_BN_GROUPS_BG1_R23] = {0, 3456, 4224, 9984, 14592, 28032, 46464, 50688};
/** Start address for every BN group within the BN processing buffer for BG1 rate = 8/9 */
static const uint32_t lut_startAddrBnGroups_BG1_R89[NR_LDPC_NUM_BN_GROUPS_BG1_R89] = {0, 384, 2688, 26880, 28416};
/** Start address for every BN group within the LLR processing buffer for BG1 rate = 1/3 */
static const uint16_t lut_startAddrBnGroupsLlr_BG1_R13[NR_LDPC_NUM_BN_GROUPS_BG1_R13] = {0, 16128, 16512, 16896, 17664, 19200, 20352, 20736, 22272, 23424, 24960, 25344, 25728};
/** Start address for every BN group within the LLR processing buffer for BG1 rate = 2/3 */
static const uint16_t lut_startAddrBnGroupsLlr_BG1_R23[NR_LDPC_NUM_BN_GROUPS_BG1_R23] = {0, 3456, 3840, 5760, 6912, 9600, 12672, 13056};
/** Start address for every BN group within the LLR processing buffer for BG1 rate = 8/9 */
static const uint16_t lut_startAddrBnGroupsLlr_BG1_R89[NR_LDPC_NUM_BN_GROUPS_BG1_R89] = {0, 384, 1536, 9600, 9984};
// BG2
/** Start address for every BN group within the BN processing buffer for BG2 rate = 1/5 */
static const uint32_t lut_startAddrBnGroups_BG2_R15[NR_LDPC_NUM_BN_GROUPS_BG2_R15] = {0, 14592, 18432, 20736, 23424, 26496, 33408, 37248, 41856, 46848, 52224, 58368, 66816};
/** Start address for every BN group within the BN processing buffer for BG2 rate = 1/3 */
static const uint32_t lut_startAddrBnGroups_BG2_R13[NR_LDPC_NUM_BN_GROUPS_BG2_R13] = {0, 6912, 7680, 10752, 12672, 24192, 26880, 29952, 34944, 40320};
/** Start address for every BN group within the BN processing buffer for BG2 rate = 2/3 */
static const uint32_t lut_startAddrBnGroups_BG2_R23[NR_LDPC_NUM_BN_GROUPS_BG2_R23] = {0, 1152, 3456, 9216, 13824, 17664};
/** Start address for every BN group within the LLR processing buffer for BG2 rate = 1/5 */
static const uint16_t lut_startAddrBnGroupsLlr_BG2_R15[NR_LDPC_NUM_BN_GROUPS_BG2_R15] = {0, 14592, 15360, 15744, 16128, 16512, 17280, 17664, 18048, 18432, 18816, 19200, 19584};
/** Start address for every BN group within the LLR processing buffer for BG2 rate = 1/3 */
static const uint16_t lut_startAddrBnGroupsLlr_BG2_R13[NR_LDPC_NUM_BN_GROUPS_BG2_R13] = {0, 6912, 7296, 8064, 8448, 10368, 10752, 11136, 11520, 11904};
/** Start address for every BN group within the LLR processing buffer for BG2 rate = 2/3 */
static const uint16_t lut_startAddrBnGroupsLlr_BG2_R23[NR_LDPC_NUM_BN_GROUPS_BG2_R23] = {0, 1152, 2304, 4224, 5376, 6144};
/** Vector of 32 '1' in int8 for application with AVX2 */
static const int8_t ones256_epi8[32] __attribute__ ((aligned(32))) = {1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1};
/** Vector of 32 '0' in int8 for application with AVX2 */
static const int8_t zeros256_epi8[32] __attribute__ ((aligned(32))) = {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0};
/** Vector of 32 '127' in int8 for application with AVX2 */
static const int8_t maxLLR256_epi8[32] __attribute__ ((aligned(32))) = {127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127,127};
#endif
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