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Merge remote-tracking branch 'origin/develop' into develop-CSI

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# Conflicts:
#	openair1/PHY/defs_nr_common.h
#	openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c
#	openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c
#	openair2/RRC/NR/MESSAGES/asn1_msg.c
#	openair2/RRC/NR/rrc_gNB_reconfig.c
#	targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.162PRB.2x2.usrpn300.conf
This commit is contained in:
Roberto Louro Magueta
2022-05-17 19:13:38 +01:00
parent 5c754f2300 5bf454c78b
commit 8ac68929bc
102 changed files with 5666 additions and 2274 deletions
Download Patch File Download Diff File Expand all files Collapse all files
ci-scripts/Jenkinsfile-trig-nsa
+15
View File
@@ -113,6 +113,21 @@ pipeline {
GitPostArgs += jobName + ' ' + build_url + ' ' + build_id + ' ' + jobResult + ' '
echo GitPostArgs
//calling SA-AmariS
jobName = "RAN-SA-AmariS-CN5G"
jobStatus = build job: jobName, wait : true, propagate : false, parameters: [
string(name: 'eNB_MR', value: String.valueOf(MR)),
string(name: 'eNB_Branch', value: String.valueOf(SRC_BRANCH)),
string(name: 'eNB_CommitID', value: String.valueOf(COMMIT_ID)),
string(name: 'eNB_TargetBranch', value: String.valueOf(TARGET_BRANCH)),
booleanParam(name: 'eNB_mergeRequest', value: Boolean.valueOf(ALLOW_MERGE))
]
jobResult = jobStatus.getResult()
build_url = jobStatus.getAbsoluteUrl()
build_id = jobStatus.getNumber().toString()
GitPostArgs += jobName + ' ' + build_url + ' ' + build_id + ' ' + jobResult + ' '
echo GitPostArgs
//calling OAIUE N310-X300
jobName = "RAN-SA-OAIUE-N310-X300-CN5G"
jobStatus = build job: jobName, wait : true, propagate : false, parameters: [
ci-scripts/cls_physim.py
+2 -2
View File
@@ -168,7 +168,7 @@ class PhySim:
mySSH.close()
#check build status and update HTML object
lHTML = html.HTMLManagement()
lHTML = cls_oai_html.HTMLManagement()
lHTML=self.__CheckBuild_PhySim(htmlObj,constObj)
return lHTML
@@ -186,6 +186,6 @@ class PhySim:
mySSH.command(self.__workSpacePath+'ran_build/build/ldpctest ' + self.runargs + ' >> '+self.__runLogFile, '\$', 30)
mySSH.close()
#return updated HTML to main
lHTML = html.HTMLManagement()
lHTML = cls_oai_html.HTMLManagement()
lHTML=self.__CheckResults_PhySim(htmlObj,constObj,testcase_id)
return lHTML
ci-scripts/conf_files/gNB_SA_n78_106PRB.2x2_usrpn310.conf
+1 -1
View File
@@ -38,7 +38,7 @@ gNBs =
////////// Physical parameters:
ssb_SubcarrierOffset = 0;
pdsch_AntennaPorts_N1 = 2;
pdsch_AntennaPorts_XP = 2;
pusch_AntennaPorts = 2;
pdcch_ConfigSIB1 = (
ci-scripts/conf_files/gNB_SA_n78_133PRB.2x2_usrpn310.conf
+1 -1
View File
@@ -39,7 +39,7 @@ gNBs =
////////// Physical parameters:
ssb_SubcarrierOffset = 0;
pdsch_AntennaPorts_N1 = 2;
pdsch_AntennaPorts_XP = 2;
pusch_AntennaPorts = 2;
pdcch_ConfigSIB1 = (
ci-scripts/conf_files/gnb.band78.nsa_2x2.106PRB.usrpn310.conf
+1 -1
View File
@@ -20,7 +20,7 @@ gNBs =
////////// Physical parameters:
ssb_SubcarrierOffset = 31; //0;
pdsch_AntennaPorts_N1 = 2;
pdsch_AntennaPorts_XP = 2;
pusch_AntennaPorts = 2;
ul_prbblacklist = "51,52,53,54"
ci-scripts/conf_files/gnb.band78.sa.fr1.106PRB.2x2.usrpn310.conf
+1 -1
View File
@@ -38,7 +38,7 @@ gNBs =
////////// Physical parameters:
ssb_SubcarrierOffset = 0;
pdsch_AntennaPorts_N1 = 2;
pdsch_AntennaPorts_XP = 2;
pusch_AntennaPorts = 2;
ul_prbblacklist = "51,52,53,54"
do_SRS = 1;
ci-scripts/conf_files/gnb.band78.sa.fr1.162PRB.2x2.usrpn310.conf
+1 -1
View File
@@ -38,7 +38,7 @@ gNBs =
////////// Physical parameters:
ssb_SubcarrierOffset = 0;
pdsch_AntennaPorts_N1 = 2;
pdsch_AntennaPorts_XP = 2;
pusch_AntennaPorts = 2;
#pusch_TargetSNRx10 = 200;
#pucch_TargetSNRx10 = 200;
ci-scripts/datalog_rt_stats.default.yaml
+2 -1
View File
@@ -15,7 +15,8 @@ Ref :
DLSCH encoding : 230.0
L1 Rx processing : 175.0
PUSCH inner-receiver : 100.0
PUSCH decoding : 180.0
#PUSCH decoding : 180.0
PUSCH decoding : 240.0
DL & UL scheduling timing stats : 37.0
UL Indication : 38.0
Threshold :
ci-scripts/ran.py
+13 -11
View File
@@ -383,17 +383,19 @@ class RANManagement():
# If tracer options is on, running tshark on EPC side and capture traffic b/ EPC and eNB
localEpcIpAddr = EPC.IPAddress
localEpcUserName = EPC.UserName
localEpcPassword = EPC.Password
mySSH.open(localEpcIpAddr, localEpcUserName, localEpcPassword)
eth_interface = 'any'
fltr = 'sctp'
logging.debug('\u001B[1m Launching tshark on interface ' + eth_interface + ' with filter "' + fltr + '"\u001B[0m')
self.epcPcapFile = 'enb_' + self.testCase_id + '_s1log.pcap'
mySSH.command('echo ' + localEpcPassword + ' | sudo -S rm -f /tmp/' + self.epcPcapFile , '\$', 5)
mySSH.command('echo $USER; nohup sudo tshark -f "host ' + lIpAddr +'" -i ' + eth_interface + ' -f "' + fltr + '" -w /tmp/' + self.epcPcapFile + ' > /tmp/tshark.log 2>&1 &', localEpcUserName, 5)
mySSH.close()
if EPC.IPAddress != "none":
localEpcIpAddr = EPC.IPAddress
localEpcUserName = EPC.UserName
localEpcPassword = EPC.Password
mySSH.open(localEpcIpAddr, localEpcUserName, localEpcPassword)
eth_interface = 'any'
fltr = 'sctp'
logging.debug('\u001B[1m Launching tshark on interface ' + eth_interface + ' with filter "' + fltr + '"\u001B[0m')
self.epcPcapFile = 'enb_' + self.testCase_id + '_s1log.pcap'
mySSH.command('echo ' + localEpcPassword + ' | sudo -S rm -f /tmp/' + self.epcPcapFile , '\$', 5)
mySSH.command('echo $USER; nohup sudo tshark -f "host ' + lIpAddr +'" -i ' + eth_interface + ' -f "' + fltr + '" -w /tmp/' + self.epcPcapFile + ' > /tmp/tshark.log 2>&1 &', localEpcUserName, 5)
mySSH.close()
mySSH.open(lIpAddr, lUserName, lPassWord)
mySSH.command('cd ' + lSourcePath, '\$', 5)
# Initialize_eNB_args usually start with -O and followed by the location in repository
ci-scripts/ran_dashboard/Hdashboard.py
+3 -3
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@@ -528,15 +528,15 @@ class Dashboard:
editable_mr = project.mergerequests.get(int(mr))
mr_notes = editable_mr.notes.list(all=True)
body = '<a href="https://oaitestdashboard.s3.eu-west-1.amazonaws.com/MR'+mr+'/index.html">Consolidated Test Results</a><br>'+\
'Tested CommitID: ' + commit + '<br>'
body = '[Consolidated Test Results](https://oaitestdashboard.s3.eu-west-1.amazonaws.com/MR'+mr+'/index.html)\\\n'
body += 'Tested CommitID: ' + commit + '\\\n'
for i in range(0,n_tests):
jobname = args[4*i]
buildurl = args[4*i+1]
buildid = args[4*i+2]
status = args[4*i+3]
body += jobname+', status is <b>'+status+'</b>, (<a href="'+buildurl+'">'+buildid+'</a>)<br>'
body += jobname+': **'+status+'** ([' + buildid + '](' + buildurl + '))\\\n'
#create new note
mr_note = editable_mr.notes.create({
ci-scripts/xml_files/gnb_phytest_usrp_run.xml
+2 -2
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@@ -24,7 +24,7 @@
<htmlTabRef>gNB-PHY-Test</htmlTabRef>
<htmlTabName>Run-gNB-PHY-Test</htmlTabName>
<htmlTabIcon>tasks</htmlTabIcon>
<repeatCount>3</repeatCount>
<repeatCount>1</repeatCount>
<TestCaseRequestedList>
090101 000001 090109
</TestCaseRequestedList>
@@ -33,7 +33,7 @@
<testCase id="090101">
<class>Initialize_eNB</class>
<desc>Initialize gNB USRP</desc>
<Initialize_eNB_args>-O ci-scripts/conf_files/gnb.band78.tm1.106PRB.usrpn300.conf --phy-test -q -U 787200 -T 106 -t 28 -D 130175 -m 28 -M 106 --log_config.global_log_options level,nocolor,time</Initialize_eNB_args>
<Initialize_eNB_args>-O ci-scripts/conf_files/gnb.band78.tm1.106PRB.usrpn300.conf --phy-test -q -U 787200 -T 106 -t 28 -D 130175 -m 28 -M 106 --usrp-tx-thread-config 1 --log_config.global_log_options level,nocolor,time</Initialize_eNB_args>
<air_interface>NR</air_interface>
<USRP_IPAddress>192.168.20.2</USRP_IPAddress>
</testCase>
cmake_targets/CMakeLists.txt
+3
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@@ -2843,6 +2843,7 @@ target_link_libraries(ldpctest
add_executable(nr_dlschsim
${OPENAIR1_DIR}/SIMULATION/NR_PHY/dlschsim.c
${OPENAIR_DIR}/common/utils/nr/nr_common.c
${OPENAIR_DIR}/executables/softmodem-common.c
${T_SOURCE}
${SHLIB_LOADER_SOURCES}
)
@@ -2866,6 +2867,7 @@ target_link_libraries(nr_pbchsim
add_executable(nr_pucchsim
${OPENAIR1_DIR}/SIMULATION/NR_PHY/pucchsim.c
${OPENAIR_DIR}/common/utils/nr/nr_common.c
${OPENAIR_DIR}/executables/softmodem-common.c
${T_SOURCE}
${SHLIB_LOADER_SOURCES}
)
@@ -2910,6 +2912,7 @@ target_link_libraries(nr_prachsim
add_executable(nr_ulschsim
${OPENAIR1_DIR}/SIMULATION/NR_PHY/ulschsim.c
${OPENAIR_DIR}/common/utils/nr/nr_common.c
${OPENAIR_DIR}/executables/softmodem-common.c
${PHY_INTERFACE_DIR}/queue_t.c
${T_SOURCE}
${SHLIB_LOADER_SOURCES}
cmake_targets/autotests/test_case_list.xml
+15 -9
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@@ -1184,9 +1184,10 @@
<testCase id="015108">
<class>execution</class>
<desc>nr_ulschsim Test cases. (Test1: 106 PRB),
(Test2: 217 PRB),
(Test3: 273 PRB)</desc>
<desc>nr_ulschsim Test cases. (Test1: 106 PRBs),
(Test2: 217 PRBs),
(Test3: 273 PRBs)
(Test4: 106 PRBs 4-layer MIMO)</desc>
<pre_compile_prog></pre_compile_prog>
<compile_prog>$OPENAIR_DIR/cmake_targets/build_oai</compile_prog>
<compile_prog_args> --phy_simulators -c </compile_prog_args>
@@ -1195,8 +1196,9 @@
<main_exec> $OPENAIR_DIR/targets/bin/nr_ulschsim.Rel15</main_exec>
<main_exec_args>-R 106 -m9 -s13 -n100
-R 217 -m15 -s15 -n100
-R 273 -m19 -s20 -n100</main_exec_args>
<tags>nr_ulschsim.test1 nr_ulschsim.test2 nr_ulschsim.test3</tags>
-R 273 -m19 -s20 -n100
-R 106 -m9 -s13 -n100 -y4 -z4 -W4</main_exec_args>
<tags>nr_ulschsim.test1 nr_ulschsim.test2 nr_ulschsim.test3 nr_ulschsim.test4</tags>
<search_expr_true>PUSCH test OK</search_expr_true>
<search_expr_false>segmentation fault|assertion|exiting|fatal</search_expr_false>
<nruns>3</nruns>
@@ -1304,7 +1306,9 @@
(Test12: SC-FDMA, 216 PRBs),
(Test13: SC-FDMA, 273 PRBs),
(Test14: SC-FDMA, 3 DMRS),
(Test15: MCS 16 50 PRBs 2 RX_Antenna)</desc>
(Test15: MCS 19 50 PRBs 2 RX_Antenna)
(Test16: MCS 9 106 PRBs MIMO 2 layers)
(Test17: MCS 9 106 PRBs MIMO 4 layers)</desc>
<pre_compile_prog></pre_compile_prog>
<compile_prog>$OPENAIR_DIR/cmake_targets/build_oai</compile_prog>
<compile_prog_args> --phy_simulators -c </compile_prog_args>
@@ -1320,14 +1324,16 @@
-n100 -s5 -T 2 1 2 -U 2 0 2
-n100 -s5 -T 2 2 2 -U 2 1 2
-n100 -s5 -a4 -b8 -T 2 1 2 -U 2 1 3
-n100 -s5 -Z
-n100 -Z -s5
-n100 -s5 -Z -r75
-n50 -s5 -Z -r216 -R217
-n50 -s5 -Z -r270 -R273
-n100 -s5 -Z -U 2 0 2
-n100 -m16 -s10 -z2</main_exec_args>
-n100 -m19 -s10 -S15 -z2
-n100 -m9 -r106 -s10 -W2 -y2 -z2
-n100 -m9 -r106 -s20 -W4 -y4 -z4</main_exec_args>
<tags>nr_ulsim.test1 nr_ulsim.test2 nr_ulsim.test3 nr_ulsim.test4 nr_ulsim.test5 nr_ulsim.test6 nr_ulsim.test7 nr_ulsim.test8 nr_ulsim.test9 nr_ulsim.test10 nr_ulsim.test11 nr_ulsim.test12 nr_ulsim.test13 nr_ulsim.test14 nr_ulsim.test15</tags>
<tags>nr_ulsim.test1 nr_ulsim.test2 nr_ulsim.test3 nr_ulsim.test4 nr_ulsim.test5 nr_ulsim.test6 nr_ulsim.test7 nr_ulsim.test8 nr_ulsim.test9 nr_ulsim.test10 nr_ulsim.test11 nr_ulsim.test12 nr_ulsim.test13 nr_ulsim.test14 nr_ulsim.test15 nr_ulsim.test16 nr_ulsim.test17</tags>
<search_expr_true>PUSCH test OK</search_expr_true>
<search_expr_false>segmentation fault|assertion|exiting|fatal</search_expr_false>
<nruns>3</nruns>
common/utils/ocp_itti/intertask_interface.cpp
+1
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@@ -450,6 +450,7 @@ extern "C" {
void itti_wait_tasks_end(void) {
shutting_down = false;
signal(SIGTERM, catch_sigterm);
//signal(SIGINT, catch_sigterm);
while (! shutting_down)
{
sleep(24 * 3600);
doc/FEATURE_SET.md
+5
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@@ -332,6 +332,9 @@ The following features are valid for the gNB and the 5G-NR UE.
- evalution of RSRP report
- evaluation of CQI report
- MAC scheduling of SR reception
- Bandwidth part (BWP) operation
- Handle multiple dedicated BWPs
- BWP switching through RRCReconfiguration method
**gNB RLC**
- Send/Receive operations according to 38.322 Rel.16
@@ -493,6 +496,8 @@ The following features are valid for the gNB and the 5G-NR UE.
- Configuration of fapi PDU according to DCI
* Scheduler procedures for SRS transmission
- Periodic SRS transmission
* Bandwidth part (BWP) operation
- Operation in configured dedicated BWP through RRCSetup or RRCReconfiguration
**UE RLC**
doc/RUNMODEM.md
+17
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@@ -207,7 +207,24 @@ UE on machine 2:
`sudo ./nr-uesoftmodem --if_freq 2169080000 --if_freq_off -400000000`
# MIMO configuration
<table style="border-collapse: collapse; border: none;">
<tr style="border-collapse: collapse; border: none;">
<td style="border-collapse: collapse; border: none;">
<img src="./images/mimo_antenna_ports.png" alt="" border=3 height=100 width=300>
</img>
</td>
</tr>
</table>
This image shows an example of gNB 5G MIMO logical antenna port configuration. It has to be noted that logical antenna ports might not directly correspond to physical antenna ports and each logical antenna port might consist of a sub-array of antennas.
The basic element is a dual-polarized antenna, therefore the minimal DL MIMO setup with two logical antenna ports would consist of two cross-polarized antenna elements. In a single panel configuration, as the one in the picture, this element can be repeated vertiacally and/or horizontally to form an equi-spaced 1D or 2D array. The values N1 and N2 represent the number of antenna ports in the two dimensions and the supported configurations are specified in Section 5.2.2.2.1 of TS 38.214.
The DL logical antenna port configuration can be selected through configuration file. `pdsch_AntennaPorts_N1` can be used to set N1 parameter, `pdsch_AntennaPorts_N2` to set N2 and `pdsch_AntennaPorts_XP` to set the cross-polarization configuration (1 for single pol, 2 for cross-pol). To be noted that if XP is 1 but N1 and/or N2 are larger than 1, this would result in a non-standard configuration and the PMI selected would be the identity matrix regardless of CSI report. The default value for each of these parameters is 1.
# Additional links
[Selecting an alternative ldpc implementation at run time](../openair1/PHY/CODING/DOC/LDPCImplementation.md)
doc/RUN_NR_multiple_BWPs.md
+51
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@@ -0,0 +1,51 @@
# Procedure to add dedicated Bandwidth part (BWP)
## Contributed by 5G Testbed IISc
### Developers: Abhijith A, Shruthi S
# Terminology #
## Bandwidth part (BWP) ##
Bandwidth Part (BWP) is a set of contiguous Resource Blocks in the resource grid.
Parameters of a BWP are communicated to UE using RRC parameters: BWP-Downlink and BWP-Uplink.
A UE can be configured with a set of 4 BWPs in uplink (UL) and downlink (DL) direction (3GPP TS 38.331 Annex B.2 Description of BWP configuration options). But only 1 BWP can be active in UL and DL direction at a given time.
# Procedure to run multiple dedicated BWPs #
A maximum of 4 dedicated BWPs can be configured for a UE.
To configure multiple BWPs, add the following parameters to the gNB configuration file under "servingCellConfigDedicated":
## Setup of the Configuration files ##
```
firstActiveDownlinkBWP-Id = 1; #BWP-Id
defaultDownlinkBWP-Id = 1; #BWP-Id
firstActiveUplinkBWP-Id = 1; #BWP-Id
```
Each dedicated BWP must have:
```
# BWP 1 Configuration
dl_bwp-Id_1 = 1;
dl_bwp1_locationAndBandwidth = 28875; // RBstart=0, L=106 (40 MHz BW)
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
dl_bwp1_subcarrierSpacing = 1;
```
Find these parameters in this configuration file: "targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.106PRB.usrpb210.conf"
# Testing gNB and UE in RF simulator
## gNB command:
```
sudo ./nr-softmodem -O ../../../targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.106PRB.usrpb210.conf --gNBs.[0].min_rxtxtime 6 --rfsim --sa
```
## UE command:
```
sudo RFSIMULATOR=127.0.0.1 ./nr-uesoftmodem -r 106 --numerology 1 --band 78 -C 3619200000 --nokrnmod --rfsim --sa --uicc0.imsi 208990000000001
```
doc/UL_MIMO.txt
+31
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@@ -0,0 +1,31 @@
# how to build phy sim
cd cmake_targets/
sudo ./build_oai --phy_simulators -c
cd phy_simulators/build/
# ULSCH sim
# bit level validation
# PUSCH encoding and decoding for 4 layers 2 CMD without data
sudo ./nr_ulschsim -R 106 -m9 -s13 -n100 -y4 -z4 -W4
# UL sim
# Uplink chain validation
# PUSCH on UE side and gNB side,whole chain for PUSCH
# No channel model on data domain signal
# No cross-path connection
# PMI = 0 is only unitary prcoding matrix
sudo ./nr_ulsim -n100 -m9 -r106 -s13 -W4 -y4 -z4
# How to build rfsim
sudo ./build_oai -c --gNB --nrUE -w SIMU
# How to run with rfsim
# 4x4 RANK 4
sudo ./nr-softmodem -O ../../../targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.106PRB.usrpb210.4layer.conf --rfsim --phy-test --l 2 --L 4
sudo ./nr-uesoftmodem --rfsim --phy-test --ue-nb-ant-rx 4 --ue-nb-ant-tx 4
# 4x4 RANK 2
sudo ./nr-softmodem -O ../../../targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.106PRB.usrpb210.4layer.conf --rfsim --phy-test --l 2 --L 2
sudo ./nr-uesoftmodem --rfsim --phy-test --ue-nb-ant-rx 4 --ue-nb-ant-tx 4
doc/images/mimo_antenna_ports.png
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executables/nr-softmodem-common.h
+1
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@@ -66,6 +66,7 @@
#define CONFIG_HLP_ITTIL "Generate ITTI analyzser logs (similar to wireshark logs but with more details)\n"
#define CONFIG_HLP_DLMCS_PHYTEST "Set the downlink MCS for PHYTEST mode\n"
#define CONFIG_HLP_DLNL_PHYTEST "Set the downlink nrOfLayers for PHYTEST mode\n"
#define CONFIG_HLP_ULNL_PHYTEST "Set the uplink nrOfLayers for PHYTEST mode\n"
#define CONFIG_HLP_STMON "Enable processing timing measurement of lte softmodem on per subframe basis \n"
#define CONFIG_HLP_MSLOTS "Skip the missed slots/subframes \n"
#define CONFIG_HLP_ULMCS_PHYTEST "Set the uplink MCS for PHYTEST mode\n"
executables/nr-softmodem.c
+1 -1
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@@ -839,10 +839,10 @@ int main( int argc, char **argv ) {
}
for (int inst = 0; inst < NB_RU; inst++) {
kill_NR_RU_proc(inst);
nr_phy_free_RU(RC.ru[inst]);
}
free_lte_top();
pthread_cond_destroy(&sync_cond);
pthread_mutex_destroy(&sync_mutex);
pthread_cond_destroy(&nfapi_sync_cond);
executables/nr-softmodem.h
+2
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@@ -22,6 +22,7 @@
{"E" , CONFIG_HLP_TQFS, PARAMFLAG_BOOL, i8ptr:&threequarter_fs, defintval:0, TYPE_INT8, 0}, \
{"m" , CONFIG_HLP_DLMCS_PHYTEST,0, uptr:&target_dl_mcs, defintval:0, TYPE_UINT, 0}, \
{"l" , CONFIG_HLP_DLNL_PHYTEST,0, uptr:&target_dl_Nl, defintval:0, TYPE_UINT, 0}, \
{"L" , CONFIG_HLP_ULNL_PHYTEST,0, uptr:&target_ul_Nl, defintval:0, TYPE_UINT, 0}, \
{"t" , CONFIG_HLP_ULMCS_PHYTEST,0, uptr:&target_ul_mcs, defintval:0, TYPE_UINT, 0}, \
{"M" , CONFIG_HLP_DLBW_PHYTEST,0, uptr:&target_dl_bw, defintval:0, TYPE_UINT, 0}, \
{"T" , CONFIG_HLP_ULBW_PHYTEST,0, uptr:&target_ul_bw, defintval:0, TYPE_UINT, 0}, \
@@ -36,6 +37,7 @@
extern threads_t threads;
extern uint32_t target_dl_mcs;
extern uint32_t target_dl_Nl;
extern uint32_t target_ul_Nl;
extern uint32_t target_ul_mcs;
extern uint32_t target_dl_bw;
extern uint32_t target_ul_bw;
executables/nr-ue.c
+3 -2
View File
@@ -613,7 +613,7 @@ void processSlotTX(void *arg) {
int tx_slot_type = nr_ue_slot_select(cfg, proc->frame_tx, proc->nr_slot_tx);
uint8_t gNB_id = 0;
LOG_D(PHY,"%d.%d => slot type %d\n",proc->frame_tx,proc->nr_slot_tx,tx_slot_type);
LOG_D(PHY,"processSlotTX %d.%d => slot type %d\n",proc->frame_tx,proc->nr_slot_tx,tx_slot_type);
if (tx_slot_type == NR_UPLINK_SLOT || tx_slot_type == NR_MIXED_SLOT){
// trigger L2 to run ue_scheduler thru IF module
@@ -713,7 +713,8 @@ void processSlotRX(void *arg) {
LOG_D(PHY, "Sending Uplink data \n");
nr_ue_pusch_common_procedures(UE,
proc->nr_slot_tx,
&UE->frame_parms,1);
&UE->frame_parms,
UE->frame_parms.nb_antennas_tx);
}
if (UE->UE_mode[gNB_id] > NOT_SYNCHED && UE->UE_mode[gNB_id] < PUSCH) {
nfapi/open-nFAPI/nfapi/public_inc/fapi_nr_ue_constants.h
+2 -1
View File
@@ -10,7 +10,8 @@
#define FAPI_NR_MAX_RA_OCCASION_PER_CSIRS 64
// Constants Defined in 38.213
#define FAPI_NR_MAX_CORESET_PER_BWP 3
#define FAPI_NR_MAX_SS 10
#define FAPI_NR_MAX_SS_PER_BWP 10
#define FAPI_NR_MAX_SS FAPI_NR_MAX_SS_PER_BWP*NR_MAX_NUM_BWP
/// RX_IND
nfapi/open-nFAPI/nfapi/public_inc/fapi_nr_ue_interface.h
+1
View File
@@ -308,6 +308,7 @@ typedef struct
uint8_t transform_precoding;
uint16_t data_scrambling_id;
uint8_t nrOfLayers;
uint8_t Tpmi;
//DMRS
uint16_t ul_dmrs_symb_pos;
uint8_t dmrs_config_type;
openair1/PHY/INIT/nr_init.c
+25 -7
View File
@@ -136,7 +136,7 @@ int init_codebook_gNB(PHY_VARS_gNB *gNB) {
}
}
int max_mimo_layers =(CSI_RS_antenna_ports<NR_MAX_NB_LAYERS) ? CSI_RS_antenna_ports : NR_MAX_NB_LAYERS;
int max_mimo_layers = (CSI_RS_antenna_ports<NR_MAX_NB_LAYERS) ? CSI_RS_antenna_ports : NR_MAX_NB_LAYERS;
gNB->nr_mimo_precoding_matrix = (int32_t ***)malloc16(max_mimo_layers* sizeof(int32_t **));
int32_t ***mat = gNB->nr_mimo_precoding_matrix;
@@ -236,7 +236,7 @@ int init_codebook_gNB(PHY_VARS_gNB *gNB) {
if((llb != ll) || (mmb != mm) || ((N1 == 1) && (N2 == 1))){
pmiq += 1;
mat[1][pmiq] = (int32_t *)malloc16((2*N1*N2)*(2)*sizeof(int32_t));
LOG_I(PHY, "layer 2 Codebook pmiq = %d\n",pmiq);
LOG_D(PHY, "layer 2 Codebook pmiq = %d\n",pmiq);
for(int j_col=0; j_col<2; j_col++) {
if (j_col==0) {
llc = llb;
@@ -320,7 +320,7 @@ int init_codebook_gNB(PHY_VARS_gNB *gNB) {
if((llb != ll) || (mmb != mm)){
pmiq += 1;
mat[2][pmiq] = (int32_t *)malloc16((2*N1*N2)*(3)*sizeof(int32_t));
LOG_I(PHY, "layer 3 Codebook pmiq = %d\n",pmiq);
LOG_D(PHY, "layer 3 Codebook pmiq = %d\n",pmiq);
for(int j_col=0; j_col<3; j_col++) {
if (j_col==0) {
llc = llb;
@@ -411,7 +411,7 @@ int init_codebook_gNB(PHY_VARS_gNB *gNB) {
if((llb != ll) || (mmb != mm)){
pmiq += 1;
mat[3][pmiq] = (int32_t *)malloc16((2*N1*N2)*4*sizeof(int32_t));
LOG_I(PHY, "layer 4 pmiq = %d\n",pmiq);
LOG_D(PHY, "layer 4 pmiq = %d\n",pmiq);
for(int j_col=0; j_col<4; j_col++) {
if (j_col==0) {
llc = llb;
@@ -685,11 +685,19 @@ int phy_init_nr_gNB(PHY_VARS_gNB *gNB,
pusch_vars[ULSCH_id]->ul_ch_magb0 = (int32_t **)malloc16(n_buf*sizeof(int32_t *) );
pusch_vars[ULSCH_id]->ul_ch_mag = (int32_t **)malloc16(n_buf*sizeof(int32_t *) );
pusch_vars[ULSCH_id]->ul_ch_magb = (int32_t **)malloc16(n_buf*sizeof(int32_t *) );
pusch_vars[ULSCH_id]->rho = (int32_t **)malloc16_clear(n_buf*sizeof(int32_t*) );
pusch_vars[ULSCH_id]->rho = (int32_t ***)malloc16_clear(Prx*sizeof(int32_t**) );
pusch_vars[ULSCH_id]->llr_layers = (int16_t **)malloc16(max_ul_mimo_layers*sizeof(int32_t *) );
for (i=0; i<Prx; i++) {
pusch_vars[ULSCH_id]->rxdataF_ext[i] = (int32_t *)malloc16_clear( sizeof(int32_t)*N_RB_UL*12*fp->symbols_per_slot );
pusch_vars[ULSCH_id]->rxdataF_ext2[i] = (int32_t *)malloc16_clear( sizeof(int32_t)*N_RB_UL*12*fp->symbols_per_slot );
pusch_vars[ULSCH_id]->rho[i] = (int32_t **)malloc16_clear(NR_MAX_NB_LAYERS*NR_MAX_NB_LAYERS*sizeof(int32_t*));
for (int j=0; j< max_ul_mimo_layers; j++) {
for (int k=0; k<max_ul_mimo_layers; k++) {
pusch_vars[ULSCH_id]->rho[i][j*max_ul_mimo_layers+k]=(int32_t *)malloc16_clear( sizeof(int32_t) * fp->N_RB_UL*12*7*2 );
}
}
}
for (i=0; i<n_buf; i++) {
pusch_vars[ULSCH_id]->ul_ch_estimates[i] = (int32_t *)malloc16_clear( sizeof(int32_t)*fp->ofdm_symbol_size*2*fp->symbols_per_slot );
@@ -703,7 +711,10 @@ int phy_init_nr_gNB(PHY_VARS_gNB *gNB,
pusch_vars[ULSCH_id]->ul_ch_magb0[i] = (int32_t *)malloc16_clear( fp->symbols_per_slot*sizeof(int32_t)*N_RB_UL*12 );
pusch_vars[ULSCH_id]->ul_ch_mag[i] = (int32_t *)malloc16_clear( fp->symbols_per_slot*sizeof(int32_t)*N_RB_UL*12 );
pusch_vars[ULSCH_id]->ul_ch_magb[i] = (int32_t *)malloc16_clear( fp->symbols_per_slot*sizeof(int32_t)*N_RB_UL*12 );
pusch_vars[ULSCH_id]->rho[i] = (int32_t *)malloc16_clear( sizeof(int32_t)*(fp->N_RB_UL*12*7*2) );
}
for (i=0; i< max_ul_mimo_layers; i++) {
pusch_vars[ULSCH_id]->llr_layers[i] = (int16_t *)malloc16_clear( (8*((3*8*6144)+12))*sizeof(int16_t) ); // [hna] 6144 is LTE and (8*((3*8*6144)+12)) is not clear
}
pusch_vars[ULSCH_id]->llr = (int16_t *)malloc16_clear( (8*((3*8*6144)+12))*sizeof(int16_t) ); // [hna] 6144 is LTE and (8*((3*8*6144)+12)) is not clear
pusch_vars[ULSCH_id]->ul_valid_re_per_slot = (int16_t *)malloc16_clear( sizeof(int16_t)*fp->symbols_per_slot);
@@ -821,9 +832,16 @@ void phy_free_nr_gNB(PHY_VARS_gNB *gNB)
NR_gNB_PUSCH** pusch_vars = gNB->pusch_vars;
for (int ULSCH_id=0; ULSCH_id<gNB->number_of_nr_ulsch_max; ULSCH_id++) {
for (int i=0; i< max_ul_mimo_layers; i++)
free_and_zero(pusch_vars[ULSCH_id]->llr_layers[i]);
for (int i = 0; i < Prx; i++) {
free_and_zero(pusch_vars[ULSCH_id]->rxdataF_ext[i]);
free_and_zero(pusch_vars[ULSCH_id]->rxdataF_ext2[i]);
for (int j=0; j< max_ul_mimo_layers; j++) {
for (int k=0; k<max_ul_mimo_layers; k++)
free_and_zero(pusch_vars[ULSCH_id]->rho[i][j*max_ul_mimo_layers+k]);
}
free_and_zero(pusch_vars[ULSCH_id]->rho[i]);
}
for (int i = 0; i < n_buf; i++) {
free_and_zero(pusch_vars[ULSCH_id]->ul_ch_estimates[i]);
@@ -837,8 +855,8 @@ void phy_free_nr_gNB(PHY_VARS_gNB *gNB)
free_and_zero(pusch_vars[ULSCH_id]->ul_ch_magb0[i]);
free_and_zero(pusch_vars[ULSCH_id]->ul_ch_mag[i]);
free_and_zero(pusch_vars[ULSCH_id]->ul_ch_magb[i]);
free_and_zero(pusch_vars[ULSCH_id]->rho[i]);
}
free_and_zero(pusch_vars[ULSCH_id]->llr_layers);
free_and_zero(pusch_vars[ULSCH_id]->rxdataF_ext);
free_and_zero(pusch_vars[ULSCH_id]->rxdataF_ext2);
free_and_zero(pusch_vars[ULSCH_id]->ul_ch_estimates);
openair1/PHY/INIT/nr_init_ru.c
+3 -4
View File
@@ -41,7 +41,7 @@ int nr_phy_init_RU(RU_t *ru) {
int p;
int re;
LOG_I(PHY,"Initializing RU signal buffers (if_south %s) nb_tx %d\n",ru_if_types[ru->if_south],ru->nb_tx);
LOG_I(PHY,"Initializing RU signal buffers (if_south %s) nb_tx %d, nb_rx %d\n",ru_if_types[ru->if_south],ru->nb_tx, ru->nb_rx);
nfapi_nr_config_request_scf_t *cfg;
ru->nb_log_antennas=0;
@@ -206,12 +206,11 @@ void nr_phy_free_RU(RU_t *ru)
free_and_zero(ru->prach_rxsigF[j][i]);
free_and_zero(ru->prach_rxsigF[j]);
}
if (ru->do_precoding == 1) {
for (i = 0; i < ru->num_gNB; i++) {
for (p = 0; p < ru->nb_log_antennas; p++) {
for (j=0; j<ru->nb_tx; j++) free_and_zero(ru->beam_weights[i][p][j]);
free_and_zero(ru->beam_weights[i][p]);
for (j=0; j<ru->nb_tx; j++) free_and_zero(ru->beam_weights[i][p][j]);
free_and_zero(ru->beam_weights[i][p]);
}
}
for(i=0; i< ru->nb_tx; ++i)
openair1/PHY/INIT/nr_init_ue.c
+2 -2
View File
@@ -563,7 +563,7 @@ void term_nr_ue_transport(PHY_VARS_NR_UE *ue)
for (int k = 0; k < RX_NB_TH_MAX; k++) {
free_nr_ue_dlsch(&ue->dlsch[k][i][j], N_RB_DL);
if (j==0)
free_nr_ue_ulsch(&ue->ulsch[k][i], N_RB_DL);
free_nr_ue_ulsch(&ue->ulsch[k][i], N_RB_DL, &ue->frame_parms);
}
}
@@ -584,7 +584,7 @@ void init_nr_ue_transport(PHY_VARS_NR_UE *ue) {
AssertFatal((ue->dlsch[k][i][j] = new_nr_ue_dlsch(1,NR_MAX_DLSCH_HARQ_PROCESSES,NSOFT,MAX_LDPC_ITERATIONS,ue->frame_parms.N_RB_DL))!=NULL,"Can't get ue dlsch structures\n");
LOG_D(PHY,"dlsch[%d][%d][%d] => %p\n",k,i,j,ue->dlsch[k][i][j]);
if (j==0) {
AssertFatal((ue->ulsch[k][i] = new_nr_ue_ulsch(ue->frame_parms.N_RB_UL, NR_MAX_ULSCH_HARQ_PROCESSES))!=NULL,"Can't get ue ulsch structures\n");
AssertFatal((ue->ulsch[k][i] = new_nr_ue_ulsch(ue->frame_parms.N_RB_UL, NR_MAX_ULSCH_HARQ_PROCESSES,&ue->frame_parms))!=NULL,"Can't get ue ulsch structures\n");
LOG_D(PHY,"ulsch[%d][%d] => %p\n",k,i,ue->ulsch[k][i]);
}
}
openair1/PHY/NR_ESTIMATION/nr_ul_channel_estimation.c
+68 -211
View File
@@ -86,7 +86,7 @@ int nr_pusch_channel_estimation(PHY_VARS_gNB *gNB,
int pilot[3280] __attribute__((aligned(16)));
unsigned char aarx;
unsigned short k;
unsigned short k0;
unsigned int pilot_cnt,re_cnt;
int16_t ch[2],ch_r[2],ch_l[2],*pil,*rxF,*ul_ch;
int16_t *fl,*fm,*fr,*fml,*fmr,*fmm,*fdcl,*fdcr,*fdclh,*fdcrh;
@@ -112,18 +112,18 @@ int nr_pusch_channel_estimation(PHY_VARS_gNB *gNB,
symbol_offset = gNB->frame_parms.ofdm_symbol_size*symbol;
k = bwp_start_subcarrier;
k0 = bwp_start_subcarrier;
int re_offset;
uint16_t nb_rb_pusch = pusch_pdu->rb_size;
LOG_D(PHY, "In %s: ch_offset %d, soffset %d, symbol_offset %d OFDM size %d, Ns = %d, k = %d symbol %d\n",
LOG_D(PHY, "In %s: ch_offset %d, soffset %d, symbol_offset %d, OFDM size %d, Ns = %d, k0 = %d, symbol %d\n",
__FUNCTION__,
ch_offset, soffset,
symbol_offset,
gNB->frame_parms.ofdm_symbol_size,
Ns,
k,
k0,
symbol);
switch (nushift) {
@@ -146,7 +146,7 @@ int nr_pusch_channel_estimation(PHY_VARS_gNB *gNB,
fr = filt8_r1;
fmm = filt8_mm1;
fml = filt8_ml1;
fmr = filt8_m1;
fmr = filt8_mm1;
fdcl = filt8_dcl1;
fdcr = filt8_dcr1;
fdclh = filt8_dcl1_h;
@@ -169,10 +169,8 @@ int nr_pusch_channel_estimation(PHY_VARS_gNB *gNB,
gNB->pusch_gold_init[pusch_pdu->scid] = pusch_pdu->ul_dmrs_scrambling_id;
nr_gold_pusch(gNB, pusch_pdu->scid, pusch_pdu->ul_dmrs_scrambling_id);
}
// transform precoding = 1 means disabled
if (pusch_pdu->transform_precoding == 1) {
nr_pusch_dmrs_rx(gNB, Ns, gNB->nr_gold_pusch_dmrs[pusch_pdu->scid][Ns][symbol], &pilot[0], 1000, 0, nb_rb_pusch,
if (pusch_pdu->transform_precoding == transformPrecoder_disabled) {
nr_pusch_dmrs_rx(gNB, Ns, gNB->nr_gold_pusch_dmrs[pusch_pdu->scid][Ns][symbol], &pilot[0], (1000+p), 0, nb_rb_pusch,
(pusch_pdu->bwp_start + pusch_pdu->rb_start)*NR_NB_SC_PER_RB, pusch_pdu->dmrs_config_type);
}
else { // if transform precoding or SC-FDMA is enabled in Uplink
@@ -208,214 +206,82 @@ int nr_pusch_channel_estimation(PHY_VARS_gNB *gNB,
}
#endif
uint8_t b_shift = pusch_pdu->nrOfLayers == 1;
for (aarx=0; aarx<gNB->frame_parms.nb_antennas_rx; aarx++) {
re_offset = k; /* Initializing the Resource element offset for each Rx antenna */
pil = (int16_t *)&pilot[0];
rxF = (int16_t *)&rxdataF[aarx][(soffset+symbol_offset+k+nushift)];
rxF = (int16_t *)&rxdataF[aarx][(soffset + symbol_offset + k0 + nushift)];
ul_ch = (int16_t *)&ul_ch_estimates[p*gNB->frame_parms.nb_antennas_rx+aarx][ch_offset];
re_offset = k;
re_offset = k0;
memset(ul_ch,0,4*(gNB->frame_parms.ofdm_symbol_size));
#ifdef DEBUG_PUSCH
LOG_I(PHY, "In %s symbol_offset %d, nushift %d\n", __FUNCTION__, symbol_offset, nushift);
LOG_I(PHY, "In %s ch est pilot addr %p, N_RB_UL %d\n", __FUNCTION__, &pilot[0], gNB->frame_parms.N_RB_UL);
LOG_I(PHY, "In %s bwp_start_subcarrier %d, k %d, first_carrier %d, nb_rb_pusch %d\n", __FUNCTION__, bwp_start_subcarrier, k, gNB->frame_parms.first_carrier_offset, nb_rb_pusch);
LOG_I(PHY, "In %s bwp_start_subcarrier %d, k0 %d, first_carrier %d, nb_rb_pusch %d\n", __FUNCTION__, bwp_start_subcarrier, k0, gNB->frame_parms.first_carrier_offset, nb_rb_pusch);
LOG_I(PHY, "In %s rxF addr %p p %d\n", __FUNCTION__, rxF, p);
LOG_I(PHY, "In %s ul_ch addr %p nushift %d\n", __FUNCTION__, ul_ch, nushift);
#endif
//if ((gNB->frame_parms.N_RB_UL&1)==0) {
if (pusch_pdu->dmrs_config_type == pusch_dmrs_type1 && gNB->prb_interpolation == 0){
if (pusch_pdu->dmrs_config_type == pusch_dmrs_type1 && gNB->prb_interpolation == 0) {
LOG_D(PHY,"PUSCH estimation DMRS type 1, Freq-domain interpolation");
// Treat first 2 pilots specially (left edge)
ch[0] = (int16_t)(((int32_t)pil[0]*rxF[0] - (int32_t)pil[1]*rxF[1])>>15);
ch[1] = (int16_t)(((int32_t)pil[0]*rxF[1] + (int32_t)pil[1]*rxF[0])>>15);
// For configuration type 1: k = 4*n + 2*k' + delta,
// where k' is 0 or 1, and delta is in Table 6.4.1.1.3-1 from TS 38.211
pilot_cnt = 0;
int delta = nr_pusch_dmrs_delta(pusch_dmrs_type1, p);
for (int n = 0; n < 3*nb_rb_pusch; n++) {
// LS estimation
ch[0] = 0;
ch[1] = 0;
for (int k_line = 0; k_line <= 1; k_line++) {
re_offset = (k0 + (n << 2) + (k_line << 1) + delta) % gNB->frame_parms.ofdm_symbol_size;
rxF = (int16_t *) &rxdataF[aarx][(soffset + symbol_offset + re_offset)];
ch[0] += (int16_t) (((int32_t) pil[0] * rxF[0] - (int32_t) pil[1] * rxF[1]) >> (15+b_shift));
ch[1] += (int16_t) (((int32_t) pil[0] * rxF[1] + (int32_t) pil[1] * rxF[0]) >> (15+b_shift));
pil += 2;
}
// Channel interpolation
for (int k_line = 0; k_line <= 1; k_line++) {
#ifdef DEBUG_PUSCH
LOG_I(PHY, "In %s ch 0 %d\n", __FUNCTION__, ((int32_t)pil[0]*rxF[0] - (int32_t)pil[1]*rxF[1]));
LOG_I(PHY, "In %s pilot 0 : rxF - > (%d,%d) (%d) ch -> (%d,%d) (%d), pil -> (%d,%d) \n",
__FUNCTION__,
rxF[0],
rxF[1],
dBc(rxF[0],rxF[1]),
ch[0],
ch[1],
dBc(ch[0],ch[1]),
pil[0],
pil[1]);
LOG_I(PHY, "In %s data 0 : rxF - > (%d,%d) (%d)\n", __FUNCTION__, rxF[2], rxF[3], dBc(rxF[2],rxF[3]));
re_offset = (k0 + (n << 2) + (k_line << 1)) % gNB->frame_parms.ofdm_symbol_size;
rxF = (int16_t *) &rxdataF[aarx][(soffset + symbol_offset + re_offset)];
printf("pilot %4u: pil -> (%6d,%6d), rxF -> (%4d,%4d), ch -> (%4d,%4d)\n",
pilot_cnt, pil[0], pil[1], rxF[0], rxF[1], ch[0], ch[1]);
//printf("data %4u: rxF -> (%4d,%4d) (%2d)\n",pilot_cnt, rxF[2], rxF[3], dBc(rxF[2], rxF[3]));
#endif
multadd_real_vector_complex_scalar(fl,
ch,
ul_ch,
8);
pil += 2;
re_offset = (re_offset+2) % gNB->frame_parms.ofdm_symbol_size;
rxF = (int16_t *)&rxdataF[aarx][(soffset+symbol_offset+nushift+re_offset)];
//for (int i= 0; i<8; i++)
//printf("ul_ch addr %p %d\n", ul_ch+i, *(ul_ch+i));
ch[0] = (int16_t)(((int32_t)pil[0]*rxF[0] - (int32_t)pil[1]*rxF[1])>>15);
ch[1] = (int16_t)(((int32_t)pil[0]*rxF[1] + (int32_t)pil[1]*rxF[0])>>15);
#ifdef DEBUG_PUSCH
LOG_I(PHY, "In %s pilot 1 : rxF - > (%d,%d) (%d) ch -> (%d,%d) (%d), pil -> (%d,%d) \n",
__FUNCTION__,
rxF[0],
rxF[1],
dBc(rxF[0],rxF[1]),
ch[0],
ch[1],
dBc(ch[0],ch[1]),
pil[0],
pil[1]);
LOG_I(PHY, "In %s data 1 : rxF - > (%d,%d) (%d)\n",
__FUNCTION__,
rxF[2],
rxF[3],
dBc(rxF[2],rxF[3]));
#endif
multadd_real_vector_complex_scalar(fml,
ch,
ul_ch,
8);
pil += 2;
re_offset = (re_offset+2) % gNB->frame_parms.ofdm_symbol_size;
rxF = (int16_t *)&rxdataF[aarx][(soffset+symbol_offset+nushift+re_offset)];
//printf("ul_ch addr %p\n",ul_ch);
ch[0] = (int16_t)(((int32_t)pil[0]*rxF[0] - (int32_t)pil[1]*rxF[1])>>15);
ch[1] = (int16_t)(((int32_t)pil[0]*rxF[1] + (int32_t)pil[1]*rxF[0])>>15);
#ifdef DEBUG_PUSCH
LOG_I(PHY, "In %s pilot 2 : rxF - > (%d,%d) (%d) ch -> (%d,%d) (%d), pil -> (%d,%d) \n",
__FUNCTION__,
rxF[0],
rxF[1],
dBc(rxF[0],rxF[1]),
ch[0],
ch[1],
dBc(ch[0],ch[1]),
pil[0],
pil[1]);
LOG_I(PHY, "In %s data 2 : rxF - > (%d,%d) (%d)\n",
__FUNCTION__,
rxF[2],
rxF[3],
dBc(rxF[2],rxF[3]));
#endif
multadd_real_vector_complex_scalar(fmm,
ch,
ul_ch,
8);
//for (int i= 0; i<16; i++)
//printf("ul_ch addr %p %d\n", ul_ch+i, *(ul_ch+i));
pil += 2;
re_offset = (re_offset+2) % gNB->frame_parms.ofdm_symbol_size;
rxF = (int16_t *)&rxdataF[aarx][(soffset+symbol_offset+nushift+re_offset)];
ul_ch+=8;
for (pilot_cnt=3; pilot_cnt<(6*nb_rb_pusch-3); pilot_cnt += 2) {
ch[0] = (int16_t)(((int32_t)pil[0]*rxF[0] - (int32_t)pil[1]*rxF[1])>>15);
ch[1] = (int16_t)(((int32_t)pil[0]*rxF[1] + (int32_t)pil[1]*rxF[0])>>15);
#ifdef DEBUG_PUSCH
printf("pilot %u : rxF - > (%d,%d) (%d) ch -> (%d,%d) (%d), pil -> (%d,%d) \n",pilot_cnt,rxF[0],rxF[1],dBc(rxF[0],rxF[1]),ch[0],ch[1],dBc(ch[0],ch[1]),pil[0],pil[1]);
printf("data %u : rxF - > (%d,%d) (%d)\n",pilot_cnt,rxF[2],rxF[3],dBc(rxF[2],rxF[3]));
#endif
multadd_real_vector_complex_scalar(fml,
ch,
ul_ch,
8);
pil += 2;
re_offset = (re_offset+2) % gNB->frame_parms.ofdm_symbol_size;
rxF = (int16_t *)&rxdataF[aarx][(soffset+symbol_offset+nushift+re_offset)];
//printf("ul_ch addr %p\n",ul_ch);
ch[0] = (int16_t)(((int32_t)pil[0]*rxF[0] - (int32_t)pil[1]*rxF[1])>>15);
ch[1] = (int16_t)(((int32_t)pil[0]*rxF[1] + (int32_t)pil[1]*rxF[0])>>15);
#ifdef DEBUG_PUSCH
printf("pilot %u : rxF - > (%d,%d) (%d) ch -> (%d,%d) (%d), pil -> (%d,%d) \n",pilot_cnt+1,rxF[0],rxF[1],dBc(rxF[0],rxF[1]),ch[0],ch[1],dBc(ch[0],ch[1]),pil[0],pil[1]);
printf("data %u : rxF - > (%d,%d) (%d)\n",pilot_cnt+1,rxF[2],rxF[3],dBc(rxF[2],rxF[3]));
#endif
multadd_real_vector_complex_scalar(fmm,
ch,
ul_ch,
8);
//for (int i= 0; i<16; i++)
//printf("ul_ch addr %p %d\n", ul_ch+i, *(ul_ch+i));
pil += 2;
re_offset = (re_offset+2) % gNB->frame_parms.ofdm_symbol_size;
rxF = (int16_t *)&rxdataF[aarx][soffset+(symbol_offset+nushift+re_offset)];
ul_ch+=8;
if (pilot_cnt == 0) {
multadd_real_vector_complex_scalar(fl, ch, ul_ch, 8);
} else if (pilot_cnt == 1) {
multadd_real_vector_complex_scalar(fml, ch, ul_ch, 8);
} else if (pilot_cnt == (6*nb_rb_pusch-2)) {
multadd_real_vector_complex_scalar(fmr, ch, ul_ch, 8);
ul_ch+=8;
} else if (pilot_cnt == (6*nb_rb_pusch-1)) {
multadd_real_vector_complex_scalar(fr, ch, ul_ch, 8);
} else if (pilot_cnt%2 == 0) {
multadd_real_vector_complex_scalar(fmm, ch, ul_ch, 8);
ul_ch+=8;
} else {
multadd_real_vector_complex_scalar(fm, ch, ul_ch, 8);
}
pilot_cnt++;
}
}
// Treat first 2 pilots specially (right edge)
ch[0] = (int16_t)(((int32_t)pil[0]*rxF[0] - (int32_t)pil[1]*rxF[1])>>15);
ch[1] = (int16_t)(((int32_t)pil[0]*rxF[1] + (int32_t)pil[1]*rxF[0])>>15);
#ifdef DEBUG_PUSCH
printf("pilot %u : rxF - > (%d,%d) (%d) ch -> (%d,%d) (%d), pil -> (%d,%d) \n",pilot_cnt,rxF[0],rxF[1],dBc(rxF[0],rxF[1]),ch[0],ch[1],dBc(ch[0],ch[1]),pil[0],pil[1]);
printf("data %u : rxF - > (%d,%d) (%d)\n",pilot_cnt,rxF[2],rxF[3],dBc(rxF[2],rxF[3]));
#endif
multadd_real_vector_complex_scalar(fm,
ch,
ul_ch,
8);
//for (int i= 0; i<8; i++)
//printf("ul_ch addr %p %d\n", ul_ch+i, *(ul_ch+i));
pil += 2;
re_offset = (re_offset+2) % gNB->frame_parms.ofdm_symbol_size;
rxF = (int16_t *)&rxdataF[aarx][soffset+(symbol_offset+nushift+re_offset)];
ch[0] = (int16_t)(((int32_t)pil[0]*rxF[0] - (int32_t)pil[1]*rxF[1])>>15);
ch[1] = (int16_t)(((int32_t)pil[0]*rxF[1] + (int32_t)pil[1]*rxF[0])>>15);
#ifdef DEBUG_PUSCH
printf("ch 0 %d\n",((int32_t)pil[0]*rxF[0] - (int32_t)pil[1]*rxF[1]));
printf("pilot %u : rxF - > (%d,%d) (%d) ch -> (%d,%d) (%d), pil -> (%d,%d) \n",pilot_cnt+1,rxF[0],rxF[1],dBc(rxF[0],rxF[1]),ch[0],ch[1],dBc(ch[0],ch[1]),pil[0],pil[1]);
printf("data %u : rxF - > (%d,%d) (%d)\n",pilot_cnt+1,rxF[2],rxF[3],dBc(rxF[2],rxF[3]));
#endif
multadd_real_vector_complex_scalar(fmr,
ch,
ul_ch,
8);
pil += 2;
re_offset = (re_offset+2) % gNB->frame_parms.ofdm_symbol_size;
rxF = (int16_t *)&rxdataF[aarx][soffset+(symbol_offset+nushift+re_offset)];
ul_ch+=8;
ch[0] = (int16_t)(((int32_t)pil[0]*rxF[0] - (int32_t)pil[1]*rxF[1])>>15);
ch[1] = (int16_t)(((int32_t)pil[0]*rxF[1] + (int32_t)pil[1]*rxF[0])>>15);
#ifdef DEBUG_PUSCH
printf("pilot %u: rxF - > (%d,%d) (%d) ch -> (%d,%d) (%d), pil -> (%d,%d) \n",pilot_cnt+2,rxF[0],rxF[1],dBc(rxF[0],rxF[1]),ch[0],ch[1],dBc(ch[0],ch[1]),pil[0],pil[1]);
printf("data %u : rxF - > (%d,%d) (%d)\n",pilot_cnt+2,rxF[2],rxF[3],dBc(rxF[2],rxF[3]));
#endif
multadd_real_vector_complex_scalar(fr,
ch,
ul_ch,
8);
// check if PRB crosses DC and improve estimates around DC
if ((bwp_start_subcarrier < gNB->frame_parms.ofdm_symbol_size) && (bwp_start_subcarrier+nb_rb_pusch*12 >= gNB->frame_parms.ofdm_symbol_size)) {
ul_ch = (int16_t *)&ul_ch_estimates[p*gNB->frame_parms.nb_antennas_rx+aarx][ch_offset];
uint16_t idxDC = 2*(gNB->frame_parms.ofdm_symbol_size - bwp_start_subcarrier);
uint16_t idxPil = idxDC/2;
re_offset = k;
re_offset = k0;
pil = (int16_t *)&pilot[0];
pil += (idxPil-2);
ul_ch += (idxDC-4);
@@ -428,10 +294,7 @@ int nr_pusch_channel_estimation(PHY_VARS_gNB *gNB,
// for proper allignment of SIMD vectors
if((gNB->frame_parms.N_RB_UL&1)==0) {
multadd_real_vector_complex_scalar(fdcl,
ch,
ul_ch-4,
8);
multadd_real_vector_complex_scalar(fdcl, ch, ul_ch-4, 8);
pil += 4;
re_offset = (re_offset+4) % gNB->frame_parms.ofdm_symbol_size;
@@ -439,16 +302,11 @@ int nr_pusch_channel_estimation(PHY_VARS_gNB *gNB,
ch[0] = (int16_t)(((int32_t)pil[0]*rxF[0] - (int32_t)pil[1]*rxF[1])>>15);
ch[1] = (int16_t)(((int32_t)pil[0]*rxF[1] + (int32_t)pil[1]*rxF[0])>>15);
multadd_real_vector_complex_scalar(fdcr,
ch,
ul_ch-4,
8);
}
else {
multadd_real_vector_complex_scalar(fdclh,
ch,
ul_ch,
8);
multadd_real_vector_complex_scalar(fdcr, ch, ul_ch-4, 8);
} else {
multadd_real_vector_complex_scalar(fdclh, ch, ul_ch, 8);
pil += 4;
re_offset = (re_offset+4) % gNB->frame_parms.ofdm_symbol_size;
@@ -456,19 +314,18 @@ int nr_pusch_channel_estimation(PHY_VARS_gNB *gNB,
ch[0] = (int16_t)(((int32_t)pil[0]*rxF[0] - (int32_t)pil[1]*rxF[1])>>15);
ch[1] = (int16_t)(((int32_t)pil[0]*rxF[1] + (int32_t)pil[1]*rxF[0])>>15);
multadd_real_vector_complex_scalar(fdcrh,
ch,
ul_ch,
8);
multadd_real_vector_complex_scalar(fdcrh, ch, ul_ch, 8);
}
}
#ifdef DEBUG_PUSCH
ul_ch = (int16_t *)&ul_ch_estimates[p*gNB->frame_parms.nb_antennas_rx+aarx][ch_offset];
for(uint16_t idxP=0; idxP<ceil((float)nb_rb_pusch*12/8); idxP++) {
printf("(%3d)\t",idxP);
for(uint8_t idxI=0; idxI<16; idxI += 2) {
printf("%d\t%d\t",ul_ch[idxP*16+idxI],ul_ch[idxP*16+idxI+1]);
}
printf("%d\n",idxP);
printf("\n");
}
#endif
}
openair1/PHY/NR_REFSIG/nr_dmrs_rx.c
+10 -1
View File
@@ -39,9 +39,11 @@
#include "nr_refsig.h"
#include "PHY/defs_gNB.h"
/*Table 7.4.1.1.2-1/2 from 38.211 */
// Table 6.4.1.1.3-1/2 from TS 38.211
int delta1[8] = {0, 0, 1, 1, 0, 0, 1, 1};
int wf1[8][2] = {{1,1},{1,-1},{1,1},{1,-1},{1,1},{1,-1},{1,1},{1,-1}};
int wt1[8][2] = {{1,1},{1,1},{1,1},{1,1},{1,-1},{1,-1},{1,-1},{1,-1}};
int delta2[12] = {0, 0, 2, 2, 4, 4, 0, 0, 2, 2, 4, 4};
int wf2[12][2] = {{1,1},{1,-1},{1,1},{1,-1},{1,1},{1,-1},{1,1},{1,-1},{1,1},{1,-1},{1,1},{1,-1}};
int wt2[12][2] = {{1,1},{1,1},{1,1},{1,1},{1,1},{1,1},{1,-1},{1,-1},{1,-1},{1,-1},{1,-1},{1,-1}};
@@ -49,6 +51,13 @@ int wt2[12][2] = {{1,1},{1,1},{1,1},{1,1},{1,1},{1,1},{1,-1},{1,-1},{1,-1},{1,-1
short nr_rx_mod_table[14] = {0,0,23170,-23170,-23170,23170,23170,-23170,23170,23170,-23170,-23170,-23170,23170};
short nr_rx_nmod_table[14] = {0,0,-23170,23170,23170,-23170,-23170,23170,-23170,-23170,23170,23170,23170,-23170};
int nr_pusch_dmrs_delta(uint8_t dmrs_config_type, unsigned short p) {
if (dmrs_config_type == pusch_dmrs_type1) {
return delta1[p];
} else {
return delta2[p];
}
}
int nr_pusch_dmrs_rx(PHY_VARS_gNB *gNB,
unsigned int Ns,
openair1/PHY/NR_REFSIG/nr_refsig.h
+2
View File
@@ -42,6 +42,8 @@ void nr_init_csi_rs(NR_DL_FRAME_PARMS *fp, uint32_t ***csi_rs, uint32_t Nid);
void nr_gold_pusch(PHY_VARS_gNB* gNB, int nscid, uint32_t nid);
int nr_pusch_dmrs_delta(uint8_t dmrs_config_type, unsigned short p);
int nr_pusch_dmrs_rx(PHY_VARS_gNB *gNB,
unsigned int Ns,
unsigned int *nr_gold_pusch,
openair1/PHY/NR_TRANSPORT/nr_scrambling.c
+1
View File
@@ -52,6 +52,7 @@ void nr_codeword_scrambling(uint8_t *in,
((uint16_t*)&in32)[0] = _mm_movemask_epi8(_mm_slli_epi16(in128[0],7));
((uint16_t*)&in32)[1] = _mm_movemask_epi8(_mm_slli_epi16(in128[1],7));
out[i]=(in32^s);
LOG_D(PHY,"in[%d] %x => %x\n",i,in32,out[i]);
s=lte_gold_generic(&x1, &x2, 0);
}
//#elsif defined(__arm__) || defined(__aarch64)
openair1/PHY/NR_TRANSPORT/nr_transport_proto.h
+16 -14
View File
@@ -136,21 +136,22 @@ int nr_rx_pusch(PHY_VARS_gNB *gNB,
@param nb_rb_pusch The number of RBs allocated (used for Resource Allocation Type 1 in NR)
@param frame_parms, Pointer to frame descriptor structure
*/
void nr_ulsch_extract_rbs_single(int32_t **rxdataF,
NR_gNB_PUSCH *pusch_vars,
int slot,
unsigned char symbol,
uint8_t is_dmrs_symbol,
nfapi_nr_pusch_pdu_t *pusch_pdu,
NR_DL_FRAME_PARMS *frame_parms);
void nr_ulsch_extract_rbs(int32_t **rxdataF,
NR_gNB_PUSCH *pusch_vars,
int slot,
unsigned char symbol,
uint8_t is_dmrs_symbol,
nfapi_nr_pusch_pdu_t *pusch_pdu,
NR_DL_FRAME_PARMS *frame_parms);
void nr_ulsch_scale_channel(int32_t **ul_ch_estimates_ext,
NR_DL_FRAME_PARMS *frame_parms,
NR_gNB_ULSCH_t *ulsch_gNB,
uint8_t symbol,
uint8_t start_symbol,
uint16_t nb_rb,
pusch_dmrs_type_t pusch_dmrs_type);
uint8_t symbol,
uint8_t is_dmrs_symbol,
uint32_t len,
uint8_t nrOfLayers,
uint16_t nb_rb);
/** \brief This function computes the average channel level over all allocated RBs and antennas (TX/RX) in order to compute output shift for compensated signal
@param ul_ch_estimates_ext Channel estimates in allocated RBs
@@ -184,9 +185,10 @@ void nr_ulsch_channel_compensation(int **rxdataF_ext,
int **ul_ch_mag,
int **ul_ch_magb,
int **rxdataF_comp,
int **rho,
int ***rho,
NR_DL_FRAME_PARMS *frame_parms,
unsigned char symbol,
int length,
uint8_t is_dmrs_symbol,
unsigned char mod_order,
uint8_t nrOfLayers,
@@ -254,8 +256,8 @@ void nr_ulsch_64qam_llr(int32_t *rxdataF_comp,
@param mod_order modulation order
*/
void nr_ulsch_compute_llr(int32_t *rxdataF_comp,
int32_t **ul_ch_mag,
int32_t **ul_ch_magb,
int32_t *ul_ch_mag,
int32_t *ul_ch_magb,
int16_t *ulsch_llr,
uint32_t nb_rb,
uint32_t nb_re,
openair1/PHY/NR_TRANSPORT/nr_ulsch.c
+27
View File
@@ -85,6 +85,33 @@ void nr_ulsch_unscrambling(int16_t* llr, uint32_t size, uint32_t Nid, uint32_t n
nr_codeword_unscrambling(llr, size, 0, Nid, n_RNTI);
}
void nr_ulsch_layer_demapping(int16_t *llr_cw,
uint8_t Nl,
uint8_t mod_order,
uint32_t length,
int16_t **llr_layers)
{
switch (Nl) {
case 1:
memcpy((void*)llr_cw, (void*)llr_layers[0], (length)*sizeof(int16_t));
break;
case 2:
case 3:
case 4:
for (int i=0; i<(length/Nl/mod_order); i++) {
for (int l=0; l<Nl; l++) {
for (int m=0; m<mod_order; m++) {
llr_cw[i*Nl*mod_order+l*mod_order+m] = llr_layers[l][i*mod_order+m];
}
}
}
break;
default:
AssertFatal(0, "Not supported number of layers %d\n", Nl);
}
}
void dump_pusch_stats(FILE *fd,PHY_VARS_gNB *gNB) {
for (int i=0;i<gNB->number_of_nr_ulsch_max;i++) {
openair1/PHY/NR_TRANSPORT/nr_ulsch.h
+6
View File
@@ -71,6 +71,12 @@ uint32_t nr_ulsch_decoding(PHY_VARS_gNB *phy_vars_gNB,
void nr_ulsch_unscrambling(int16_t* llr, uint32_t size, uint32_t Nid, uint32_t n_RNTI);
void nr_ulsch_layer_demapping(int16_t *llr_cw,
uint8_t Nl,
uint8_t mod_order,
uint32_t length,
int16_t **llr_layers);
void nr_ulsch_procedures(PHY_VARS_gNB *gNB,
int frame_rx,
int slot_rx,
openair1/PHY/NR_TRANSPORT/nr_ulsch_decoding.c
+19 -25
View File
@@ -57,8 +57,7 @@
void free_gNB_ulsch(NR_gNB_ULSCH_t **ulschptr, uint16_t N_RB_UL)
{
int i,r;
uint16_t a_segments = MAX_NUM_NR_ULSCH_SEGMENTS; //number of segments to be allocated
uint16_t a_segments = MAX_NUM_NR_ULSCH_SEGMENTS_PER_LAYER*NR_MAX_NB_LAYERS; //number of segments to be allocated
NR_gNB_ULSCH_t *ulsch = *ulschptr;
if (N_RB_UL != 273) {
@@ -66,17 +65,18 @@ void free_gNB_ulsch(NR_gNB_ULSCH_t **ulschptr, uint16_t N_RB_UL)
a_segments = a_segments/273 +1;
}
for (i=0; i<NR_MAX_ULSCH_HARQ_PROCESSES; i++) {
for (int i=0; i<NR_MAX_ULSCH_HARQ_PROCESSES; i++) {
if (ulsch->harq_processes[i]) {
if (ulsch->harq_processes[i]->b) {
free_and_zero(ulsch->harq_processes[i]->b);
ulsch->harq_processes[i]->b = NULL;
}
for (r=0; r<a_segments; r++) {
for (int r=0; r<a_segments; r++) {
free_and_zero(ulsch->harq_processes[i]->c[r]);
free_and_zero(ulsch->harq_processes[i]->d[r]);
free_and_zero(ulsch->harq_processes[i]->w[r]);
}
free_and_zero(ulsch->harq_processes[i]->c);
free_and_zero(ulsch->harq_processes[i]->d);
free_and_zero(ulsch->harq_processes[i]);
ulsch->harq_processes[i] = NULL;
}
@@ -90,7 +90,7 @@ NR_gNB_ULSCH_t *new_gNB_ulsch(uint8_t max_ldpc_iterations, uint16_t N_RB_UL)
NR_gNB_ULSCH_t *ulsch;
uint8_t i,r;
uint16_t a_segments = MAX_NUM_NR_ULSCH_SEGMENTS; //number of segments to be allocated
uint16_t a_segments = MAX_NUM_NR_ULSCH_SEGMENTS_PER_LAYER*NR_MAX_NB_LAYERS; //number of segments to be allocated
if (N_RB_UL != 273) {
a_segments = a_segments*N_RB_UL;
@@ -107,10 +107,11 @@ NR_gNB_ULSCH_t *new_gNB_ulsch(uint8_t max_ldpc_iterations, uint16_t N_RB_UL)
ulsch->harq_processes[i] = (NR_UL_gNB_HARQ_t *)malloc16_clear(sizeof(NR_UL_gNB_HARQ_t));
ulsch->harq_processes[i]->b = (uint8_t*)malloc16_clear(ulsch_bytes);
ulsch->harq_processes[i]->c = (uint8_t**)malloc16_clear(a_segments*sizeof(uint8_t *));
ulsch->harq_processes[i]->d = (int16_t**)malloc16_clear(a_segments*sizeof(int16_t *));
for (r=0; r<a_segments; r++) {
ulsch->harq_processes[i]->c[r] = (uint8_t*)malloc16_clear(8448*sizeof(uint8_t));
ulsch->harq_processes[i]->d[r] = (int16_t*)malloc16_clear((68*384)*sizeof(int16_t));
ulsch->harq_processes[i]->w[r] = (int16_t*)malloc16_clear((3*(6144+64))*sizeof(int16_t));
}
}
@@ -168,8 +169,6 @@ void clean_gNB_ulsch(NR_gNB_ULSCH_t *ulsch)
ulsch->harq_processes[i]->C=0;
/// Pointers to code blocks after LDPC coding (38.212 V15.4.0 section 5.3.2)
//int16_t *d[MAX_NUM_NR_ULSCH_SEGMENTS];
/// LDPC processing buffer
//t_nrLDPC_procBuf* p_nrLDPC_procBuf[MAX_NUM_NR_ULSCH_SEGMENTS];
ulsch->harq_processes[i]->Z=0;
/// code blocks after bit selection in rate matching for LDPC code (38.212 V15.4.0 section 5.4.2.1)
//int16_t e[MAX_NUM_NR_ULSCH_SEGMENTS][3*8448];
@@ -259,9 +258,12 @@ void nr_processULSegment(void* arg) {
//////////////////////////// ulsch_llr =====> ulsch_harq->e //////////////////////////////
/// code blocks after bit selection in rate matching for LDPC code (38.212 V15.4.0 section 5.4.2.1)
int16_t harq_e[3*8448];
nr_deinterleaving_ldpc(E,
Qm,
ulsch_harq->e[r],
harq_e,
ulsch_llr+r_offset);
//for (int i =0; i<16; i++)
@@ -270,16 +272,7 @@ void nr_processULSegment(void* arg) {
stop_meas(&phy_vars_gNB->ulsch_deinterleaving_stats);
/*LOG_D(PHY,"HARQ_PID %d Rate Matching Segment %d (coded bits %d,unpunctured/repeated bits %d, TBS %d, mod_order %d, nb_rb %d, Nl %d, rv %d, round %d)...\n",
harq_pid,r, G,
Kr*3,
ulsch_harq->TBS,
Qm,
nb_rb,
n_layers,
pusch_pdu->pusch_data.rv_index,
ulsch_harq->round);*/
//////////////////////////////////////////////////////////////////////////////////////////
//////////////////////////////////////////////////////////////////////////////////////////
//////////////////////////////////////////////////////////////////////////////////////////
@@ -294,7 +287,7 @@ void nr_processULSegment(void* arg) {
p_decoderParms->BG,
p_decoderParms->Z,
ulsch_harq->d[r],
ulsch_harq->e[r],
harq_e,
ulsch_harq->C,
rv_index,
ulsch_harq->new_rx,
@@ -357,13 +350,13 @@ void nr_processULSegment(void* arg) {
if (check_crc((uint8_t*)llrProcBuf,length_dec,ulsch_harq->F,crc_type)) {
#ifdef PRINT_CRC_CHECK
LOG_I(PHY, "Segment %d CRC OK, iterations %d/%d\n",r,no_iteration_ldpc,max_ldpc_iterations);
LOG_I(PHY,"Segment %d CRC OK, iterations %d/%d\n",r,no_iteration_ldpc,max_ldpc_iterations);
#endif
rdata->decodeIterations = no_iteration_ldpc;
if (rdata->decodeIterations > p_decoderParms->numMaxIter) rdata->decodeIterations--;
} else {
#ifdef PRINT_CRC_CHECK
LOG_I(PHY, "CRC NOK\n");
LOG_I(PHY,"CRC NOK\n");
#endif
rdata->decodeIterations = max_ldpc_iterations + 1;
}
@@ -449,7 +442,8 @@ uint32_t nr_ulsch_decoding(PHY_VARS_gNB *phy_vars_gNB,
A = (harq_process->TBS)<<3;
LOG_D(NR_PHY, "ULSCH Decoding, harq_pid %d TBS %d G %d mcs %d Nl %d nb_rb %d, Qm %d, n_layers %d, Coderate %d\n", harq_pid, A, G, mcs, n_layers, nb_rb, Qm, n_layers, R);
LOG_D(PHY,"ULSCH Decoding, harq_pid %d TBS %d G %d mcs %d Nl %d nb_rb %d, Qm %d, Coderate %d RV %d round %d\n",
harq_pid, A, G, mcs, n_layers, nb_rb, Qm, R, pusch_pdu->pusch_data.rv_index, harq_process->round);
if (R<1024)
Coderate = (float) R /(float) 1024;
@@ -543,7 +537,7 @@ uint32_t nr_ulsch_decoding(PHY_VARS_gNB *phy_vars_gNB,
r_offset = 0;
uint16_t a_segments = MAX_NUM_NR_ULSCH_SEGMENTS; //number of segments to be allocated
uint16_t a_segments = MAX_NUM_NR_ULSCH_SEGMENTS_PER_LAYER*n_layers; //number of segments to be allocated
if (nb_rb != 273) {
a_segments = a_segments*nb_rb;
openair1/PHY/NR_TRANSPORT/nr_ulsch_demodulation.c
+1033 -282
View File
File diff suppressed because it is too large Load Diff
openair1/PHY/NR_TRANSPORT/nr_ulsch_llr_computation.c
+14 -14
View File
@@ -64,7 +64,7 @@ void nr_ulsch_qpsk_llr(int32_t *rxdataF_comp,
//----------------------------------------------------------------------------------------------
void nr_ulsch_16qam_llr(int32_t *rxdataF_comp,
int32_t **ul_ch_mag,
int32_t *ul_ch_mag,
int16_t *ulsch_llr,
uint32_t nb_rb,
uint32_t nb_re,
@@ -110,12 +110,12 @@ void nr_ulsch_16qam_llr(int32_t *rxdataF_comp,
#if defined(__x86_64__) || defined(__i386__)
#ifdef __AVX2__
ch_mag = (__m256i*)&ul_ch_mag[0][(symbol*(off+(nb_rb*12)))];
ch_mag = (__m256i*)&ul_ch_mag[(symbol*(off+(nb_rb*12)))];
#else
ch_mag = (__m128i*)&ul_ch_mag[0][(symbol*(off+(nb_rb*12)))];
ch_mag = (__m128i*)&ul_ch_mag[(symbol*(off+(nb_rb*12)))];
#endif
#elif defined(__arm__)
ch_mag = (int16x8_t*)&ul_ch_mag[0][(symbol*nb_rb*12)];
ch_mag = (int16x8_t*)&ul_ch_mag[(symbol*nb_rb*12)];
#endif
#ifdef __AVX2__
@@ -231,8 +231,8 @@ void nr_ulsch_16qam_llr(int32_t *rxdataF_comp,
//----------------------------------------------------------------------------------------------
void nr_ulsch_64qam_llr(int32_t *rxdataF_comp,
int32_t **ul_ch_mag,
int32_t **ul_ch_magb,
int32_t *ul_ch_mag,
int32_t *ul_ch_magb,
int16_t *ulsch_llr,
uint32_t nb_rb,
uint32_t nb_re,
@@ -265,15 +265,15 @@ void nr_ulsch_64qam_llr(int32_t *rxdataF_comp,
#if defined(__x86_64__) || defined(__i386__)
#ifdef __AVX2__
ch_mag = (__m256i*)&ul_ch_mag[0][(symbol*(off+(nb_rb*12)))];
ch_magb = (__m256i*)&ul_ch_magb[0][(symbol*(off+(nb_rb*12)))];
ch_mag = (__m256i*)&ul_ch_mag[(symbol*(off+(nb_rb*12)))];
ch_magb = (__m256i*)&ul_ch_magb[(symbol*(off+(nb_rb*12)))];
#else
ch_mag = (__m128i*)&ul_ch_mag[0][(symbol*nb_rb*12)];
ch_magb = (__m128i*)&ul_ch_magb[0][(symbol*nb_rb*12)];
ch_mag = (__m128i*)&ul_ch_mag[(symbol*nb_rb*12)];
ch_magb = (__m128i*)&ul_ch_magb[(symbol*nb_rb*12)];
#endif
#elif defined(__arm__)
ch_mag = (int16x8_t*)&ul_ch_mag[0][(symbol*nb_rb*12)];
ch_magb = (int16x8_t*)&ul_ch_magb[0][(symbol*nb_rb*12)];
ch_mag = (int16x8_t*)&ul_ch_mag[(symbol*nb_rb*12)];
ch_magb = (int16x8_t*)&ul_ch_magb[(symbol*nb_rb*12)];
#endif
#ifdef __AVX2__
@@ -471,8 +471,8 @@ void nr_ulsch_64qam_llr(int32_t *rxdataF_comp,
void nr_ulsch_compute_llr(int32_t *rxdataF_comp,
int32_t **ul_ch_mag,
int32_t **ul_ch_magb,
int32_t *ul_ch_mag,
int32_t *ul_ch_magb,
int16_t *ulsch_llr,
uint32_t nb_rb,
uint32_t nb_re,
openair1/PHY/NR_UE_ESTIMATION/filt16a_32.c
+3 -3
View File
@@ -148,7 +148,7 @@ short filt8_dcr0_h[8]= {
0,4096,8192,12288,16384,0,0,0};
short filt8_l1[8] = {
24576,16384,0,0,0,0,0,0};
24576,16384,8192,0,0,0,0,0};
short filt8_ml1[8] = {
-8192,0,8192,16384,8192,0,0,0};
@@ -163,10 +163,10 @@ short filt8_mm1[8]= {
0,0,0,0,8192,16384,8192,0};
short filt8_dcl1[8]= {
0,0,0,16384,12288,8192,4096,0};
0,0,16384,12288,8192,4096,0,0};
short filt8_dcr1[8]= {
0,0,0,0,4096,8192,12288,16384};
0,0,0,4096,8192,12288,16384,0};
short filt8_dcl1_h[8]= {
0,16384,12288,8192,4096,0,0,0};
openair1/PHY/NR_UE_TRANSPORT/nr_transport_proto_ue.h
+4 -2
View File
@@ -63,10 +63,12 @@ void free_nr_ue_dlsch(NR_UE_DLSCH_t **dlsch, uint16_t N_RB_DL);
*/
NR_UE_DLSCH_t *new_nr_ue_dlsch(uint8_t Kmimo,uint8_t Mdlharq,uint32_t Nsoft,uint8_t max_turbo_iterations,uint16_t N_RB_DL);
void free_nr_ue_ulsch(NR_UE_ULSCH_t **ulschptr,
uint16_t N_RB_UL,
NR_DL_FRAME_PARMS* frame_parms);
void free_nr_ue_ulsch(NR_UE_ULSCH_t **ulsch, uint16_t N_RB_UL);
NR_UE_ULSCH_t *new_nr_ue_ulsch(uint16_t N_RB_UL, int number_of_harq_pids);
NR_UE_ULSCH_t *new_nr_ue_ulsch(uint16_t N_RB_UL, int number_of_harq_pids, NR_DL_FRAME_PARMS* frame_parms);
/** \brief This function computes the LLRs for ML (max-logsum approximation) dual-stream QPSK/QPSK reception.
@param stream0_in Input from channel compensated (MR combined) stream 0
openair1/PHY/NR_UE_TRANSPORT/nr_transport_ue.h
+2 -2
View File
@@ -84,9 +84,9 @@ typedef struct {
/// Pointer to the payload + CRC
uint8_t *b;
/// Pointers to transport block segments
uint8_t *c[MAX_NUM_NR_ULSCH_SEGMENTS];
uint8_t **c;
/// LDPC-code outputs
uint8_t *d[MAX_NUM_NR_ULSCH_SEGMENTS];
uint8_t **d;
/// LDPC-code outputs (TS 36.212 V15.4.0, Sec 5.3.2 p. 17)
uint8_t *e;
/// Rate matching (Interleaving) outputs (TS 36.212 V15.4.0, Sec 5.4.2.2 p. 30)
openair1/PHY/NR_UE_TRANSPORT/nr_ulsch_coding.c
+31 -18
View File
@@ -43,10 +43,10 @@
//#define DEBUG_ULSCH_CODING
void free_nr_ue_ulsch(NR_UE_ULSCH_t **ulschptr, uint16_t N_RB_UL)
void free_nr_ue_ulsch(NR_UE_ULSCH_t **ulschptr,
uint16_t N_RB_UL,
NR_DL_FRAME_PARMS* frame_parms) {
{
int i, r;
NR_UE_ULSCH_t *ulsch = *ulschptr;
if (ulsch) {
@@ -54,15 +54,15 @@ void free_nr_ue_ulsch(NR_UE_ULSCH_t **ulschptr, uint16_t N_RB_UL)
printf("Freeing ulsch %p\n",ulsch);
#endif
uint16_t a_segments = MAX_NUM_NR_ULSCH_SEGMENTS; //number of segments to be allocated
int max_layers = (frame_parms->nb_antennas_tx<NR_MAX_NB_LAYERS) ? frame_parms->nb_antennas_tx : NR_MAX_NB_LAYERS;
uint16_t a_segments = MAX_NUM_NR_ULSCH_SEGMENTS_PER_LAYER*max_layers; //number of segments to be allocated
if (N_RB_UL != 273) {
a_segments = a_segments*N_RB_UL;
a_segments = a_segments/273 +1;
}
if (N_RB_UL != 273) {
a_segments = a_segments*N_RB_UL;
a_segments = a_segments/273 +1;
}
for (i=0; i<NR_MAX_ULSCH_HARQ_PROCESSES; i++) {
for (int i=0; i<NR_MAX_ULSCH_HARQ_PROCESSES; i++) {
if (ulsch->harq_processes[i]) {
if (ulsch->harq_processes[i]->a) {
@@ -81,7 +81,7 @@ void free_nr_ue_ulsch(NR_UE_ULSCH_t **ulschptr, uint16_t N_RB_UL)
free16(ulsch->harq_processes[i]->f,14*N_RB_UL*12*8);
ulsch->harq_processes[i]->f = NULL;
}
for (r=0; r<a_segments; r++) {
for (int r=0; r<a_segments; r++) {
if (ulsch->harq_processes[i]->c[r]) {
free16(ulsch->harq_processes[i]->c[r],((r==0)?8:0) + 3+768);
ulsch->harq_processes[i]->c[r] = NULL;
@@ -94,6 +94,15 @@ void free_nr_ue_ulsch(NR_UE_ULSCH_t **ulschptr, uint16_t N_RB_UL)
}
if (ulsch->harq_processes[i]->c) {
free16(ulsch->harq_processes[i]->c,a_segments);
ulsch->harq_processes[i]->c = NULL;
}
if (ulsch->harq_processes[i]->d) {
free16(ulsch->harq_processes[i]->d,a_segments);
ulsch->harq_processes[i]->d = NULL;
}
free16(ulsch->harq_processes[i],sizeof(NR_UL_UE_HARQ_t));
ulsch->harq_processes[i] = NULL;
}
@@ -101,13 +110,13 @@ void free_nr_ue_ulsch(NR_UE_ULSCH_t **ulschptr, uint16_t N_RB_UL)
free16(ulsch,sizeof(NR_UE_ULSCH_t));
*ulschptr = NULL;
}
}
NR_UE_ULSCH_t *new_nr_ue_ulsch(uint16_t N_RB_UL, int number_of_harq_pids)
{
uint16_t a_segments = MAX_NUM_NR_ULSCH_SEGMENTS; //number of segments to be allocated
NR_UE_ULSCH_t *new_nr_ue_ulsch(uint16_t N_RB_UL, int number_of_harq_pids, NR_DL_FRAME_PARMS* frame_parms) {
int max_layers = (frame_parms->nb_antennas_tx<NR_MAX_NB_LAYERS) ? frame_parms->nb_antennas_tx : NR_MAX_NB_LAYERS;
uint16_t a_segments = MAX_NUM_NR_ULSCH_SEGMENTS_PER_LAYER*max_layers; //number of segments to be allocated
if (N_RB_UL != 273) {
a_segments = a_segments*N_RB_UL;
@@ -140,6 +149,8 @@ NR_UE_ULSCH_t *new_nr_ue_ulsch(uint16_t N_RB_UL, int number_of_harq_pids)
DevAssert(ulsch->harq_processes[i]->b);
bzero(ulsch->harq_processes[i]->b,ulsch_bytes);
ulsch->harq_processes[i]->c = malloc16(a_segments*sizeof(uint8_t *));
ulsch->harq_processes[i]->d = malloc16(a_segments*sizeof(uint16_t *));
for (int r = 0; r < a_segments; r++) {
// account for filler in first segment and CRCs for multiple segment case
ulsch->harq_processes[i]->c[r] = malloc16(8448);
@@ -216,6 +227,8 @@ int nr_ulsch_encoding(PHY_VARS_NR_UE *ue,
printf("\n");
*/
int max_payload_bytes = MAX_NUM_NR_ULSCH_SEGMENTS_PER_LAYER*harq_process->pusch_pdu.nrOfLayers*1056;
if (A > 3824) {
// Add 24-bit crc (polynomial A) to payload
crc = crc24a(harq_process->a,A)>>8;
@@ -227,7 +240,7 @@ int nr_ulsch_encoding(PHY_VARS_NR_UE *ue,
harq_process->B = A+24;
AssertFatal((A/8)+4 <= MAX_NR_ULSCH_PAYLOAD_BYTES,"A %d is too big (A/8+4 = %d > %d)\n",A,(A/8)+4,MAX_NR_ULSCH_PAYLOAD_BYTES);
AssertFatal((A/8)+4 <= max_payload_bytes,"A %d is too big (A/8+4 = %d > %d)\n",A,(A/8)+4,max_payload_bytes);
memcpy(harq_process->b,harq_process->a,(A/8)+4);
}
@@ -241,7 +254,7 @@ int nr_ulsch_encoding(PHY_VARS_NR_UE *ue,
harq_process->B = A+16;
AssertFatal((A/8)+3 <= MAX_NR_ULSCH_PAYLOAD_BYTES,"A %d is too big (A/8+3 = %d > %d)\n",A,(A/8)+3,MAX_NR_ULSCH_PAYLOAD_BYTES);
AssertFatal((A/8)+3 <= max_payload_bytes,"A %d is too big (A/8+3 = %d > %d)\n",A,(A/8)+3,max_payload_bytes);
memcpy(harq_process->b,harq_process->a,(A/8)+3); // using 3 bytes to mimic the case of 24 bit crc
}
@@ -301,7 +314,7 @@ int nr_ulsch_encoding(PHY_VARS_NR_UE *ue,
printf("start ldpc encoder segment %d/%d\n",r,harq_process->C);
printf("input %d %d %d %d %d \n", harq_process->c[r][0], harq_process->c[r][1], harq_process->c[r][2],harq_process->c[r][3], harq_process->c[r][4]);
for (int cnt =0 ; cnt < 22*(*pz)/8; cnt ++){
printf("%d ", harq_process->c[r][cnt]);
printf("%d ", harq_process->c[r][cnt]);
}
printf("\n");
openair1/PHY/NR_UE_TRANSPORT/nr_ulsch_ue.c
+144 -69
View File
@@ -38,6 +38,7 @@
#include "PHY/MODULATION/nr_modulation.h"
#include "PHY/MODULATION/modulation_common.h"
#include "common/utils/assertions.h"
#include "common/utils/nr/nr_common.h"
#include "common/utils/LOG/vcd_signal_dumper.h"
#include "PHY/NR_TRANSPORT/nr_transport_common_proto.h"
#include "PHY/NR_TRANSPORT/nr_sch_dmrs.h"
@@ -114,15 +115,14 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
LOG_D(PHY,"nr_ue_ulsch_procedures hard_id %d %d.%d\n",harq_pid,frame,slot);
uint32_t available_bits;
int32_t **txdataF;
int8_t Wf[2], Wt[2];
int l_prime[2], delta;
uint8_t nb_dmrs_re_per_rb;
int ap, i;
int i;
int sample_offsetF, N_RE_prime;
NR_DL_FRAME_PARMS *frame_parms = &UE->frame_parms;
int32_t **txdataF = UE->common_vars.txdataF;
int N_PRB_oh = 0; // higher layer (RRC) parameter xOverhead in PUSCH-ServingCellConfig
uint16_t number_dmrs_symbols = 0;
@@ -155,9 +155,8 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
nb_dmrs_re_per_rb = ((dmrs_type == pusch_dmrs_type1) ? 6:4)*cdm_grps_no_data;
LOG_D(PHY,"ulsch %x : start_rb %d bwp_start %d start_sc %d start_symbol %d num_symbols %d cdmgrpsnodata %d num_dmrs %d dmrs_re_per_rb %d\n",
rnti,start_rb,pusch_pdu->bwp_start,start_sc,start_symbol,number_of_symbols,cdm_grps_no_data,number_dmrs_symbols,nb_dmrs_re_per_rb);
LOG_D(PHY,"ulsch TX %x : start_rb %d nb_rb %d mod_order %d Nl %d Tpmi %d bwp_start %d start_sc %d start_symbol %d num_symbols %d cdmgrpsnodata %d num_dmrs %d dmrs_re_per_rb %d\n",
rnti,start_rb,nb_rb,mod_order,Nl,pusch_pdu->Tpmi,pusch_pdu->bwp_start,start_sc,start_symbol,number_of_symbols,cdm_grps_no_data,number_dmrs_symbols,nb_dmrs_re_per_rb);
// TbD num_of_mod_symbols is set but never used
N_RE_prime = NR_NB_SC_PER_RB*number_of_symbols - nb_dmrs_re_per_rb*number_dmrs_symbols - N_PRB_oh;
harq_process_ul_ue->num_of_mod_symbols = N_RE_prime*nb_rb;
@@ -184,7 +183,7 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
/////////////////////////ULSCH scrambling/////////////////////////
///////////
available_bits = G;
uint32_t available_bits = G;
uint32_t scrambled_output[(available_bits>>5)+1];
memset(scrambled_output, 0, ((available_bits>>5)+1)*sizeof(uint32_t));
@@ -201,7 +200,7 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
/////////////////////////ULSCH modulation/////////////////////////
///////////
int max_num_re = number_of_symbols*nb_rb*NR_NB_SC_PER_RB;
int max_num_re = Nl*number_of_symbols*nb_rb*NR_NB_SC_PER_RB;
int32_t d_mod[max_num_re] __attribute__ ((aligned(16)));
nr_modulation(scrambled_output, // assume one codeword for the moment
@@ -209,7 +208,6 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
mod_order,
(int16_t *)d_mod);
///////////
////////////////////////////////////////////////////////////////////////
@@ -284,8 +282,7 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
/// Transform-coded "y"-sequences (for definition see 38-211 V15.3.0 2018-09, subsection 6.3.1.4)
int32_t y[max_num_re] __attribute__ ((aligned(16)));
// if transform precoding is enbaled (value 0)
if (pusch_pdu->transform_precoding == 0) {
if (pusch_pdu->transform_precoding == transformPrecoder_enabled) {
uint32_t nb_re_pusch=nb_rb * NR_NB_SC_PER_RB;
uint32_t y_offset = 0;
@@ -315,20 +312,20 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
LOG_D(PHY,"Transform precoding being done on data- symbol: %d, nb_re_pusch: %d, y_offset: %d\n", l, nb_re_pusch, y_offset);
#ifdef DEBUG_PUSCH_MAPPING
printf("NR_ULSCH_UE: y_offset %d\t nb_re_pusch %d \t Symbol %d \t nb_rb %d \n",
y_offset, nb_re_pusch, l, nb_rb);
printf("NR_ULSCH_UE: y_offset %d\t nb_re_pusch %d \t Symbol %d \t nb_rb %d \n",
y_offset, nb_re_pusch, l, nb_rb);
#endif
}
#ifdef DEBUG_DFT_IDFT
int32_t debug_symbols[max_num_re] __attribute__ ((aligned(16)));
int32_t debug_symbols[MAX_NUM_NR_RE] __attribute__ ((aligned(16)));
int offset = 0;
printf("NR_ULSCH_UE: available_bits: %d, mod_order: %d", available_bits,mod_order);
for (int ll = 0; ll < (available_bits/mod_order); ll++) {
debug_symbols[ll] = y[ll];
debug_symbols[ll] = ulsch_ue->y[ll];
}
printf("NR_ULSCH_UE: numSym: %d, num_dmrs_sym: %d", number_of_symbols,number_dmrs_symbols);
for (int ll = 0; ll < (number_of_symbols-number_dmrs_symbols); ll++) {
nr_idft(&debug_symbols[offset], nb_re_pusch);
@@ -341,32 +338,33 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
#endif
}
else
memcpy(y, tx_layers[0], (available_bits/mod_order)*sizeof(int32_t));
for (int nl = 0; nl < Nl; nl++)
free_and_zero(tx_layers[nl]);
free_and_zero(tx_layers);
///////////
////////////////////////////////////////////////////////////////////////
/////////////////////////ULSCH RE mapping/////////////////////////
///////////
txdataF = UE->common_vars.txdataF;
for (ap=0; ap< Nl; ap++) {
int encoded_length = frame_parms->N_RB_UL*14*NR_NB_SC_PER_RB*mod_order*Nl;
int16_t **tx_precoding = (int16_t **)malloc16_clear(Nl*sizeof(int16_t *));
for (int nl=0; nl<Nl; nl++)
tx_precoding[nl] = (int16_t *)malloc16_clear((encoded_length<<1)*sizeof(int16_t));
for (int nl=0; nl < Nl; nl++) {
uint8_t k_prime = 0;
uint16_t m = 0;
#ifdef DEBUG_PUSCH_MAPPING
printf("NR_ULSCH_UE: Value of CELL ID %d /t, u %d \n", frame_parms->Nid_cell, u);
#endif
// DMRS params for this ap
get_Wt(Wt, ap, dmrs_type);
get_Wf(Wf, ap, dmrs_type);
delta = get_delta(ap, dmrs_type);
int dmrs_port = get_dmrs_port(nl,pusch_pdu->dmrs_ports);
// DMRS params for this dmrs port
get_Wt(Wt, dmrs_port, dmrs_type);
get_Wf(Wf, dmrs_port, dmrs_type);
delta = get_delta(dmrs_port, dmrs_type);
for (int l=start_symbol; l<start_symbol+number_of_symbols; l++) {
@@ -379,8 +377,7 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
if ((ul_dmrs_symb_pos >> l) & 0x01) {
is_dmrs_sym = 1;
// transform precoding disabled (value 1)
if (pusch_pdu->transform_precoding == 1){
if (pusch_pdu->transform_precoding == transformPrecoder_disabled){
if (dmrs_type == pusch_dmrs_type1)
dmrs_idx = (pusch_pdu->bwp_start + start_rb)*6;
@@ -396,7 +393,7 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
}
} else if (pusch_pdu->pdu_bit_map & PUSCH_PDU_BITMAP_PUSCH_PTRS) {
AssertFatal(pusch_pdu->transform_precoding == 1, "PTRS NOT SUPPORTED IF TRANSFORM PRECODING IS ENABLED\n");
AssertFatal(pusch_pdu->transform_precoding == transformPrecoder_disabled, "PTRS NOT SUPPORTED IF TRANSFORM PRECODING IS ENABLED\n");
if(is_ptrs_symbol(l, ulsch_ue->ptrs_symbols)) {
is_ptrs_sym = 1;
@@ -405,7 +402,6 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
}
for (i=0; i< nb_rb*NR_NB_SC_PER_RB; i++) {
uint8_t is_dmrs = 0;
uint8_t is_ptrs = 0;
@@ -417,7 +413,7 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
} else if (is_ptrs_sym) {
is_ptrs = is_ptrs_subcarrier(k,
rnti,
ap,
nl,
dmrs_type,
K_ptrs,
nb_rb,
@@ -428,67 +424,146 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
if (is_dmrs == 1) {
// if transform precoding is enabled
if (pusch_pdu->transform_precoding == 0) {
((int16_t*)txdataF[ap])[(sample_offsetF)<<1] = (Wt[l_prime[0]]*Wf[k_prime]*AMP*dmrs_seq[2*dmrs_idx]) >> 15;
((int16_t*)txdataF[ap])[((sample_offsetF)<<1) + 1] = (Wt[l_prime[0]]*Wf[k_prime]*AMP*dmrs_seq[(2*dmrs_idx) + 1]) >> 15;
if (pusch_pdu->transform_precoding == transformPrecoder_enabled) {
((int16_t*)tx_precoding[nl])[(sample_offsetF)<<1] = (Wt[l_prime[0]]*Wf[k_prime]*AMP*dmrs_seq[2*dmrs_idx]) >> 15;
((int16_t*)tx_precoding[nl])[((sample_offsetF)<<1) + 1] = (Wt[l_prime[0]]*Wf[k_prime]*AMP*dmrs_seq[(2*dmrs_idx) + 1]) >> 15;
} else {
((int16_t*)txdataF[ap])[(sample_offsetF)<<1] = (Wt[l_prime[0]]*Wf[k_prime]*AMP*mod_dmrs[dmrs_idx<<1]) >> 15;
((int16_t*)txdataF[ap])[((sample_offsetF)<<1) + 1] = (Wt[l_prime[0]]*Wf[k_prime]*AMP*mod_dmrs[(dmrs_idx<<1) + 1]) >> 15;
((int16_t*)tx_precoding[nl])[(sample_offsetF)<<1] = (Wt[l_prime[0]]*Wf[k_prime]*AMP*mod_dmrs[dmrs_idx<<1]) >> 15;
((int16_t*)tx_precoding[nl])[((sample_offsetF)<<1) + 1] = (Wt[l_prime[0]]*Wf[k_prime]*AMP*mod_dmrs[(dmrs_idx<<1) + 1]) >> 15;
}
#ifdef DEBUG_PUSCH_MAPPING
printf("dmrs_idx %d\t l %d \t k %d \t k_prime %d \t n %d \t dmrs: %d %d\n",
dmrs_idx, l, k, k_prime, n, ((int16_t*)txdataF[ap])[(sample_offsetF)<<1],
((int16_t*)txdataF[ap])[((sample_offsetF)<<1) + 1]);
printf("DMRS: Layer: %d\t, dmrs_idx %d\t l %d \t k %d \t k_prime %d \t n %d \t dmrs: %d %d\n",
nl, dmrs_idx, l, k, k_prime, n, ((int16_t*)tx_precoding[nl])[(sample_offsetF)<<1],
((int16_t*)tx_precoding[nl])[((sample_offsetF)<<1) + 1]);
#endif
dmrs_idx++;
k_prime++;
k_prime&=1;
n+=(k_prime)?0:1;
} else if (is_ptrs == 1) {
((int16_t*)txdataF[ap])[(sample_offsetF)<<1] = (beta_ptrs*AMP*mod_ptrs[ptrs_idx<<1]) >> 15;
((int16_t*)txdataF[ap])[((sample_offsetF)<<1) + 1] = (beta_ptrs*AMP*mod_ptrs[(ptrs_idx<<1) + 1]) >> 15;
((int16_t*)tx_precoding[nl])[(sample_offsetF)<<1] = (beta_ptrs*AMP*mod_ptrs[ptrs_idx<<1]) >> 15;
((int16_t*)tx_precoding[nl])[((sample_offsetF)<<1) + 1] = (beta_ptrs*AMP*mod_ptrs[(ptrs_idx<<1) + 1]) >> 15;
ptrs_idx++;
} else if (!is_dmrs_sym || allowed_xlsch_re_in_dmrs_symbol(k, start_sc, frame_parms->ofdm_symbol_size, cdm_grps_no_data, dmrs_type)) {
((int16_t*)txdataF[ap])[(sample_offsetF)<<1] = ((int16_t *) y)[m<<1];
((int16_t*)txdataF[ap])[((sample_offsetF)<<1) + 1] = ((int16_t *) y)[(m<<1) + 1];
if (pusch_pdu->transform_precoding == transformPrecoder_disabled) {
((int16_t*)tx_precoding[nl])[(sample_offsetF)<<1] = ((int16_t *)tx_layers[nl])[m<<1];
((int16_t*)tx_precoding[nl])[((sample_offsetF)<<1) + 1] = ((int16_t *)tx_layers[nl])[(m<<1) + 1];
}
else {
((int16_t*)tx_precoding[nl])[(sample_offsetF)<<1] = ((int16_t *) y)[m<<1];
((int16_t*)tx_precoding[nl])[((sample_offsetF)<<1) + 1] = ((int16_t *) y)[(m<<1) + 1];
}
#ifdef DEBUG_PUSCH_MAPPING
printf("m %d\t l %d \t k %d \t txdataF: %d %d\n",
m, l, k, ((int16_t*)txdataF[ap])[(sample_offsetF)<<1],
((int16_t*)txdataF[ap])[((sample_offsetF)<<1) + 1]);
printf("DATA: layer %d\t m %d\t l %d \t k %d \t tx_precoding: %d %d\n",
nl, m, l, k, ((int16_t*)tx_precoding[nl])[(sample_offsetF)<<1],
((int16_t*)tx_precoding[nl])[((sample_offsetF)<<1) + 1]);
#endif
m++;
} else {
((int16_t*)txdataF[ap])[(sample_offsetF)<<1] = 0;
((int16_t*)txdataF[ap])[((sample_offsetF)<<1) + 1] = 0;
((int16_t*)tx_precoding[nl])[(sample_offsetF)<<1] = 0;
((int16_t*)tx_precoding[nl])[((sample_offsetF)<<1) + 1] = 0;
}
if (++k >= frame_parms->ofdm_symbol_size)
k -= frame_parms->ofdm_symbol_size;
}
}
}
} //for (i=0; i< nb_rb*NR_NB_SC_PER_RB; i++)
}//for (l=start_symbol; l<start_symbol+number_of_symbols; l++)
}//for (nl=0; nl < Nl; nl++)
/////////////////////////ULSCH precoding/////////////////////////
///////////
///Layer Precoding and Antenna port mapping
// tx_layers 0-3 are mapped on antenna ports
// The precoding info is supported by nfapi such as num_prgs, prg_size, prgs_list and pm_idx
// The same precoding matrix is applied on prg_size RBs, Thus
// pmi = prgs_list[rbidx/prg_size].pm_idx, rbidx =0,...,rbSize-1
// The Precoding matrix:
for (int ap=0; ap<frame_parms->nb_antennas_tx; ap++) {
for (int l=start_symbol; l<start_symbol+number_of_symbols; l++) {
uint16_t k = start_sc;
for (int rb=0; rb<nb_rb; rb++) {
//get pmi info
uint8_t pmi=pusch_pdu->Tpmi;
if (pmi == 0) {//unitary Precoding
if(ap< pusch_pdu->nrOfLayers)
memcpy((void*)&txdataF[ap][l*frame_parms->ofdm_symbol_size + k],
(void*)&tx_precoding[ap][2*(l*frame_parms->ofdm_symbol_size + k)],
NR_NB_SC_PER_RB*sizeof(int32_t));
else
memset((void*)&txdataF[ap][l*frame_parms->ofdm_symbol_size + k],
0,
NR_NB_SC_PER_RB*sizeof(int32_t));
k += NR_NB_SC_PER_RB;
if (k >= frame_parms->ofdm_symbol_size) {
k -= frame_parms->ofdm_symbol_size;
}
}
else {
//get the precoding matrix weights:
char *W_prec;
switch (frame_parms->nb_antennas_tx) {
case 1://1 antenna port
W_prec = nr_W_1l_2p[pmi][ap];
break;
case 2://2 antenna ports
if (pusch_pdu->nrOfLayers == 1)//1 layer
W_prec = nr_W_1l_2p[pmi][ap];
else//2 layers
W_prec = nr_W_2l_2p[pmi][ap];
break;
case 4://4 antenna ports
if (pusch_pdu->nrOfLayers == 1)//1 layer
W_prec = nr_W_1l_4p[pmi][ap];
else if (pusch_pdu->nrOfLayers == 2)//2 layers
W_prec = nr_W_2l_4p[pmi][ap];
else if (pusch_pdu->nrOfLayers == 3)//3 layers
W_prec = nr_W_3l_4p[pmi][ap];
else//4 layers
W_prec = nr_W_4l_4p[pmi][ap];
break;
default:
LOG_D(PHY,"Precoding 1,2, or 4 antenna ports are currently supported\n");
W_prec = nr_W_1l_2p[pmi][ap];
break;
}
for (int i=0; i<NR_NB_SC_PER_RB; i++) {
int32_t re_offset = l*frame_parms->ofdm_symbol_size + k;
int32_t precodatatx_F = nr_layer_precoder(tx_precoding, W_prec, pusch_pdu->nrOfLayers, re_offset);
((int16_t*)txdataF[ap])[(re_offset<<1)] = ((int16_t *) &precodatatx_F)[0];
((int16_t*)txdataF[ap])[(re_offset<<1) + 1] = ((int16_t *) &precodatatx_F)[1];
if (++k >= frame_parms->ofdm_symbol_size) {
k -= frame_parms->ofdm_symbol_size;
}
}
}
} //RB loop
} // symbol loop
}// port loop
NR_UL_UE_HARQ_t *harq_process_ulsch=NULL;
harq_process_ulsch = UE->ulsch[thread_id][gNB_id]->harq_processes[harq_pid];
harq_process_ulsch->status = SCH_IDLE;
for (int nl = 0; nl < Nl; nl++) {
free_and_zero(tx_layers[nl]);
free_and_zero(tx_precoding[nl]);
}
free_and_zero(tx_layers);
free_and_zero(tx_precoding);
///////////
////////////////////////////////////////////////////////////////////////
@@ -498,7 +573,7 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
uint8_t nr_ue_pusch_common_procedures(PHY_VARS_NR_UE *UE,
uint8_t slot,
NR_DL_FRAME_PARMS *frame_parms,
uint8_t Nl) {
uint8_t n_antenna_ports) {
int tx_offset, ap;
int32_t **txdata;
@@ -520,7 +595,7 @@ uint8_t nr_ue_pusch_common_procedures(PHY_VARS_NR_UE *UE,
txdataF = UE->common_vars.txdataF;
int symb_offset = (slot%frame_parms->slots_per_subframe)*frame_parms->symbols_per_slot;
for(ap = 0; ap < Nl; ap++) {
for(ap = 0; ap < n_antenna_ports; ap++) {
for (int s=0;s<NR_NUMBER_OF_SYMBOLS_PER_SLOT;s++){
LOG_D(PHY,"In %s: rotating txdataF symbol %d (%d) => (%d.%d)\n",
@@ -538,7 +613,7 @@ uint8_t nr_ue_pusch_common_procedures(PHY_VARS_NR_UE *UE,
}
}
for (ap = 0; ap < Nl; ap++) {
for (ap = 0; ap < n_antenna_ports; ap++) {
if (frame_parms->Ncp == 1) { // extended cyclic prefix
PHY_ofdm_mod(txdataF[ap],
&txdata[ap][tx_offset],
openair1/PHY/TOOLS/lte_ue_scope.c
+3 -3
View File
@@ -51,9 +51,9 @@ void reset_stats(FL_OBJECT *button, long arg) {
int i,j,k;
PHY_VARS_eNB *phy_vars_eNB = RC.eNB[0][0];
for (i=0; i<NUMBER_OF_DLSCH_MAX; i++) {
for (k=0; k<8; k++) { //harq_processes
for (j=0; j<phy_vars_eNB->dlsch[i][0]->Mlimit; j++) {
for (i=0; i<NUMBER_OF_UE_MAX; i++) {
for (k=0; k<NUMBER_OF_DLSCH_MAX; k++) { //harq_processes
for (j=0; j<phy_vars_eNB->dlsch[k][0]->Mlimit; j++) {
phy_vars_eNB->UE_stats[i].dlsch_NAK[k][j]=0;
phy_vars_eNB->UE_stats[i].dlsch_ACK[k][j]=0;
phy_vars_eNB->UE_stats[i].dlsch_trials[k][j]=0;
openair1/PHY/defs_gNB.h
+7 -7
View File
@@ -271,7 +271,7 @@ typedef struct {
/// The payload + CRC (24 bits) in bits (38.212 V15.4.0 section 5.1)
uint32_t B;
/// Pointers to code blocks after code block segmentation and CRC attachment (38.212 V15.4.0 section 5.2.2)
uint8_t *c[MAX_NUM_NR_ULSCH_SEGMENTS];
uint8_t **c;
/// Number of bits in each code block (38.212 V15.4.0 section 5.2.2)
uint32_t K;
/// Number of "Filler" bits added in the code block segmentation (38.212 V15.4.0 section 5.2.2)
@@ -279,11 +279,9 @@ typedef struct {
/// Number of code blocks after code block segmentation (38.212 V15.4.0 section 5.2.2)
uint32_t C;
/// Pointers to code blocks after LDPC coding (38.212 V15.4.0 section 5.3.2)
int16_t *d[MAX_NUM_NR_ULSCH_SEGMENTS];
int16_t **d;
/// LDPC lifting size (38.212 V15.4.0 table 5.3.2-1)
uint32_t Z;
/// code blocks after bit selection in rate matching for LDPC code (38.212 V15.4.0 section 5.4.2.1)
int16_t e[MAX_NUM_NR_ULSCH_SEGMENTS][3*8448];
/// Number of bits in each code block after rate matching for LDPC code (38.212 V15.4.0 section 5.4.2.1)
uint32_t E;
/// Number of segments processed so far
@@ -338,8 +336,6 @@ typedef struct {
int16_t q_RI[MAX_RI_PAYLOAD];
/// Temporary h sequence to flag PUSCH_x/PUSCH_y symbols which are not scrambled
uint8_t h[MAX_NUM_CHANNEL_BITS];
/// soft bits for each received segment ("w"-sequence)(for definition see 36-212 V8.6 2009-03, p.15)
int16_t *w[MAX_NUM_NR_ULSCH_SEGMENTS];
//////////////////////////////////////////////////////////////
} NR_UL_gNB_HARQ_t;
@@ -471,7 +467,7 @@ typedef struct {
/// \brief Cross-correlation of two UE signals.
/// - first index: rx antenna [0..nb_antennas_rx[
/// - second index: symbol [0..]
int32_t **rho;
int32_t ***rho;
/// \f$\log_2(\max|H_i|^2)\f$
int16_t log2_maxh;
/// \brief Magnitude of Uplink Channel first layer (16QAM level/First 64QAM level).
@@ -501,6 +497,10 @@ typedef struct {
/// \brief llr values.
/// - first index: ? [0..1179743] (hard coded)
int16_t *llr;
/// \brief llr values per layer.
/// - first index: ? [0..3] (hard coded)
/// - first index: ? [0..1179743] (hard coded)
int16_t **llr_layers;
/// DMRS symbol index, to be updated every DMRS symbol within a slot.
uint8_t dmrs_symbol;
// PTRS symbol index, to be updated every PTRS symbol within a slot.
openair1/PHY/defs_nr_common.h
+7 -3
View File
@@ -79,17 +79,21 @@
#define NR_MAX_CSET_DURATION 3
#define NR_MAX_NB_RBG 18
#define NR_MAX_NB_LAYERS 4 // 8
#define NR_MAX_NB_PORTS 32
#define NR_MAX_NB_HARQ_PROCESSES 16
#define NR_MAX_PDSCH_TBS 3824
#define NR_MAX_SIB_LENGTH 2976 // 3GPP TS 38.331 section 5.2.1 - The physical layer imposes a limit to the maximum size a SIB can take. The maximum SIB1 or SI message size is 2976 bits.
#define MAX_NUM_NR_DLSCH_SEGMENTS_PER_LAYER 34
#define MAX_NUM_NR_DLSCH_SEGMENTS_PER_LAYER 36
#define MAX_NUM_NR_ULSCH_SEGMENTS 34
#define MAX_NR_ULSCH_PAYLOAD_BYTES (MAX_NUM_NR_ULSCH_SEGMENTS*1056)
#define MAX_NUM_NR_ULSCH_SEGMENTS_PER_LAYER 34
#define MAX_NUM_NR_CHANNEL_BITS (4*14*273*12*8) // 14 symbols, 273 RB
#define MAX_NUM_NR_RE (4*14*273*12)
#define MAX_NUM_NR_SRS_SYMBOLS 4
openair1/SCHED_NR/nr_ru_procedures.c
+2 -1
View File
@@ -526,7 +526,8 @@ void nr_fep0(RU_t *ru, int first_half) {
end_symbol = NR_SYMBOLS_PER_SLOT;
}
LOG_D(PHY,"In fep0 for slot = %d, first_half = %d, start_symbol = %d, end_symbol = %d\n", proc->tti_rx, first_half, start_symbol, end_symbol);
LOG_D(PHY,"In fep0 for slot = %d, first_half = %d, start_symbol = %d, end_symbol = %d, nb_antennas_rx = %d,N_TA_offset = %d\n",
proc->tti_rx, first_half, start_symbol, end_symbol,fp->nb_antennas_rx,ru->N_TA_offset);
// printf("fep0: slot %d\n",slot);
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_RU_FEPRX+proc->tti_rx, 1);
openair1/SCHED_NR/phy_procedures_nr_gNB.c
+8
View File
@@ -346,6 +346,14 @@ void nr_ulsch_procedures(PHY_VARS_gNB *gNB, int frame_rx, int slot_rx, int ULSCH
number_dmrs_symbols, // number of dmrs symbols irrespective of single or double symbol dmrs
pusch_pdu->qam_mod_order,
pusch_pdu->nrOfLayers);
nr_ulsch_layer_demapping(gNB->pusch_vars[ULSCH_id]->llr,
pusch_pdu->nrOfLayers,
pusch_pdu->qam_mod_order,
G,
gNB->pusch_vars[ULSCH_id]->llr_layers);
//----------------------------------------------------------
//------------------- ULSCH unscrambling -------------------
//----------------------------------------------------------
openair1/SCHED_NR_UE/fapi_nr_ue_l1.c
+3 -1
View File
@@ -434,7 +434,7 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){
for (int i = 0; i < ul_config->number_pdus; ++i){
AssertFatal(ul_config->ul_config_list[i].pdu_type <= FAPI_NR_UL_CONFIG_TYPES,"pdu_type %d out of bounds\n",ul_config->ul_config_list[i].pdu_type);
LOG_D(PHY, "In %s: processing %s PDU of %d total UL PDUs (ul_config %p) \n", __FUNCTION__, ul_pdu_type[ul_config->ul_config_list[i].pdu_type - 1], ul_config->number_pdus, ul_config);
LOG_D(PHY, "In %s i %d: processing %s PDU of %d total UL PDUs (ul_config %p) \n", __FUNCTION__, i, ul_pdu_type[ul_config->ul_config_list[i].pdu_type - 1], ul_config->number_pdus, ul_config);
uint8_t pdu_type = ul_config->ul_config_list[i].pdu_type, current_harq_pid, gNB_id = 0;
/* PRACH */
@@ -459,6 +459,8 @@ int8_t nr_ue_scheduled_response(nr_scheduled_response_t *scheduled_response){
if (harq_process_ul_ue){
nfapi_nr_ue_pusch_pdu_t *pusch_pdu = &harq_process_ul_ue->pusch_pdu;
LOG_D(PHY, "In %s i %d: copy pusch_config_pdu nrOfLayers:%d, num_dmrs_cdm_grps_no_data:%d \n", __FUNCTION__, i, pusch_config_pdu->nrOfLayers,pusch_config_pdu->num_dmrs_cdm_grps_no_data);
memcpy(pusch_pdu, pusch_config_pdu, sizeof(nfapi_nr_ue_pusch_pdu_t));
openair1/SCHED_NR_UE/phy_procedures_nr_ue.c
+28 -20
View File
@@ -284,7 +284,8 @@ void phy_procedures_nrUE_TX(PHY_VARS_NR_UE *ue,
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_UE_TX,VCD_FUNCTION_IN);
memset(ue->common_vars.txdataF[0], 0, sizeof(int)*14*ue->frame_parms.ofdm_symbol_size);
for(int i=0; i< ue->frame_parms.nb_antennas_tx; ++i)
memset(ue->common_vars.txdataF[i], 0, sizeof(int)*14*ue->frame_parms.ofdm_symbol_size);
LOG_D(PHY,"****** start TX-Chain for AbsSubframe %d.%d ******\n", frame_tx, slot_tx);
@@ -918,21 +919,25 @@ bool nr_ue_dlsch_procedures(PHY_VARS_NR_UE *ue,
const double N_TA_max = Ta_max * bw_scaling * tc_factor;
NR_UE_MAC_INST_t *mac = get_mac_inst(0);
NR_BWP_Id_t dl_bwp = mac->DL_BWP_Id;
NR_BWP_Id_t ul_bwp = mac->UL_BWP_Id;
NR_PUSCH_TimeDomainResourceAllocationList_t *pusch_TimeDomainAllocationList = NULL;
if (mac->ULbwp[0] &&
mac->ULbwp[0]->bwp_Dedicated &&
mac->ULbwp[0]->bwp_Dedicated->pusch_Config &&
mac->ULbwp[0]->bwp_Dedicated->pusch_Config->choice.setup &&
mac->ULbwp[0]->bwp_Dedicated->pusch_Config->choice.setup->pusch_TimeDomainAllocationList) {
pusch_TimeDomainAllocationList = mac->ULbwp[0]->bwp_Dedicated->pusch_Config->choice.setup->pusch_TimeDomainAllocationList->choice.setup;
}
else if (mac->ULbwp[0] &&
mac->ULbwp[0]->bwp_Common &&
mac->ULbwp[0]->bwp_Common->pusch_ConfigCommon &&
mac->ULbwp[0]->bwp_Common->pusch_ConfigCommon->choice.setup &&
mac->ULbwp[0]->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList) {
pusch_TimeDomainAllocationList = mac->ULbwp[0]->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList;
if(ul_bwp){
if (mac->ULbwp[ul_bwp-1] &&
mac->ULbwp[ul_bwp-1]->bwp_Dedicated &&
mac->ULbwp[ul_bwp-1]->bwp_Dedicated->pusch_Config &&
mac->ULbwp[ul_bwp-1]->bwp_Dedicated->pusch_Config->choice.setup &&
mac->ULbwp[ul_bwp-1]->bwp_Dedicated->pusch_Config->choice.setup->pusch_TimeDomainAllocationList) {
pusch_TimeDomainAllocationList = mac->ULbwp[ul_bwp-1]->bwp_Dedicated->pusch_Config->choice.setup->pusch_TimeDomainAllocationList->choice.setup;
}
else if (mac->ULbwp[ul_bwp-1] &&
mac->ULbwp[ul_bwp-1]->bwp_Common &&
mac->ULbwp[ul_bwp-1]->bwp_Common->pusch_ConfigCommon &&
mac->ULbwp[ul_bwp-1]->bwp_Common->pusch_ConfigCommon->choice.setup &&
mac->ULbwp[ul_bwp-1]->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList) {
pusch_TimeDomainAllocationList = mac->ULbwp[ul_bwp-1]->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList;
}
}
else if (mac->scc_SIB &&
mac->scc_SIB->uplinkConfigCommon &&
@@ -943,12 +948,15 @@ bool nr_ue_dlsch_procedures(PHY_VARS_NR_UE *ue,
}
long mapping_type_ul = pusch_TimeDomainAllocationList ? pusch_TimeDomainAllocationList->list.array[0]->mappingType : NR_PUSCH_TimeDomainResourceAllocation__mappingType_typeA;
NR_PDSCH_Config_t *pdsch_Config = (mac->DLbwp[0] && mac->DLbwp[0]->bwp_Dedicated->pdsch_Config->choice.setup) ? mac->DLbwp[0]->bwp_Dedicated->pdsch_Config->choice.setup : NULL;
NR_PDSCH_Config_t *pdsch_Config = NULL;
NR_PDSCH_TimeDomainResourceAllocationList_t *pdsch_TimeDomainAllocationList = NULL;
if (mac->DLbwp[0] && mac->DLbwp[0]->bwp_Dedicated->pdsch_Config->choice.setup->pdsch_TimeDomainAllocationList)
pdsch_TimeDomainAllocationList = pdsch_Config->pdsch_TimeDomainAllocationList->choice.setup;
else if (mac->DLbwp[0] && mac->DLbwp[0]->bwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList)
pdsch_TimeDomainAllocationList = mac->DLbwp[0]->bwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList;
if(dl_bwp){
pdsch_Config = (mac->DLbwp[dl_bwp-1] && mac->DLbwp[dl_bwp-1]->bwp_Dedicated->pdsch_Config->choice.setup) ? mac->DLbwp[dl_bwp-1]->bwp_Dedicated->pdsch_Config->choice.setup : NULL;
if (mac->DLbwp[dl_bwp-1] && mac->DLbwp[dl_bwp-1]->bwp_Dedicated->pdsch_Config->choice.setup->pdsch_TimeDomainAllocationList)
pdsch_TimeDomainAllocationList = pdsch_Config->pdsch_TimeDomainAllocationList->choice.setup;
else if (mac->DLbwp[dl_bwp-1] && mac->DLbwp[dl_bwp-1]->bwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList)
pdsch_TimeDomainAllocationList = mac->DLbwp[dl_bwp-1]->bwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList;
}
else if (mac->scc_SIB && mac->scc_SIB->downlinkConfigCommon.initialDownlinkBWP.pdsch_ConfigCommon->choice.setup)
pdsch_TimeDomainAllocationList = mac->scc_SIB->downlinkConfigCommon.initialDownlinkBWP.pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList;
long mapping_type_dl = pdsch_TimeDomainAllocationList ? pdsch_TimeDomainAllocationList->list.array[0]->mappingType : NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeA;
@@ -1002,7 +1010,7 @@ bool nr_ue_dlsch_procedures(PHY_VARS_NR_UE *ue,
d_2_1 = 1;
/* d_2_2 */
const double d_2_2 = 0.0; // set to 0 because there is only 1 BWP: TODO this should corresponds to the switching time as defined in TS 38.133
const double d_2_2 = pusch_d_2_2_timing_capability_1[numerology][1];
/* N_t_1 time duration in msec of N_1 symbols corresponding to a PDSCH reception time
// N_t_2 time duration in msec of N_2 symbols corresponding to a PUSCH preparation time */
openair1/SCHED_NR_UE/phy_sch_processing_time.h
+33 -1
View File
@@ -106,4 +106,36 @@ float pusch_N_2_timing_capability_2[3][2] = {
{ 0, 5 },
{ 1, 5.5 },
{ 2, 11 },
};
};
/* TS 38.133 Table 8.6.2-1: BWP switch delay capability 1
// corresponding to the PUSCH preparation time d_2_2 [slots]
// where mu corresponds to the one of {mu_DL, mu_UL}
// resulting with the largest T_proc_2
// where mu_DL is the SCS with which the PDCCH
// carrying the DCI scheduling the PUSCH was transmitted
// mu_UL is the SCS of the UL channel with which PUSCH to be transmitted
*/
float pusch_d_2_2_timing_capability_1[4][2] = {
/* mu d_2_2 */
{ 0, 1 },
{ 1, 2 },
{ 2, 3 },
{ 3, 6 },
};
/* TS 38.133 Table 8.6.2-1: BWP switch delay capability 2
// corresponding to the PUSCH preparation time d_2_2 [slots]
// where mu corresponds to the one of {mu_DL, mu_UL}
// resulting with the largest T_proc_2
// where mu_DL is the SCS with which the PDCCH
// carrying the DCI scheduling the PUSCH was transmitted
// mu_UL is the SCS of the UL channel with which PUSCH to be transmitted
*/
float pusch_d_2_2_timing_capability_2[4][2] = {
/* mu d_2_2 */
{ 0, 3 },
{ 1, 5 },
{ 2, 9 },
{ 3, 18 },
};
openair1/SIMULATION/NR_PHY/dlschsim.c
+3
View File
@@ -48,13 +48,16 @@
#include "openair1/SIMULATION/NR_PHY/nr_unitary_defs.h"
#include "openair1/SIMULATION/NR_PHY/nr_dummy_functions.c"
//#define DEBUG_NR_DLSCHSIM
THREAD_STRUCT thread_struct;
PHY_VARS_gNB *gNB;
PHY_VARS_NR_UE *UE;
RAN_CONTEXT_t RC;
UE_nr_rxtx_proc_t proc;
int32_t uplink_frequency_offset[MAX_NUM_CCs][4];
uint64_t downlink_frequency[MAX_NUM_CCs][4];
double cpuf;
//uint8_t nfapi_mode = 0;
openair1/SIMULATION/NR_PHY/dlsim.c
+8 -10
View File
@@ -211,10 +211,9 @@ int nr_derive_key(int alg_type, uint8_t alg_id,
void config_common(int Mod_idP,
int ssb_SubcarrierOffset,
rrc_pdsch_AntennaPorts_t pdsch_AntennaPorts,
int pdsch_AntennaPorts,
int pusch_AntennaPorts,
NR_ServingCellConfigCommon_t *scc
);
NR_ServingCellConfigCommon_t *scc);
int generate_dlsch_header(unsigned char *mac_header,
unsigned char num_sdus,
@@ -293,7 +292,7 @@ void nr_dlsim_preprocessor(module_id_t module_id,
UE_info->CellGroup[0],
sched_ctrl->active_bwp,
NULL,
/* tda = */ 2,
/* tda = */ 0,
g_nrOfLayers,
sched_ctrl,
ps);
@@ -315,8 +314,7 @@ void nr_dlsim_preprocessor(module_id_t module_id,
ps->N_PRB_DMRS * ps->N_DMRS_SLOT,
0 /* N_PRB_oh, 0 for initialBWP */,
0 /* tb_scaling */,
ps->nrOfLayers)
>> 3;
ps->nrOfLayers) >> 3;
/* the simulator assumes the HARQ PID is equal to the slot number */
sched_pdsch->dl_harq_pid = slot;
@@ -652,12 +650,12 @@ int main(int argc, char **argv)
dmrs_arg[i] = atoi(argv[optind++]);
}
break;
case 'X':
strncpy(gNBthreads, optarg, sizeof(gNBthreads));
gNBthreads[sizeof(gNBthreads)-1]=0;
break;
default:
case 'h':
printf("%s -h(elp) -p(extended_prefix) -N cell_id -f output_filename -F input_filename -g channel_model -n n_frames -t Delayspread -s snr0 -S snr1 -x transmission_mode -y TXant -z RXant -i Intefrence0 -j Interference1 -A interpolation_file -C(alibration offset dB) -N CellId\n",
@@ -871,11 +869,11 @@ int main(int argc, char **argv)
fs = 61.44e6;
bw = 40e6;
}
else if (mu == 1 && N_RB_DL == 133) {
else if (mu == 1 && N_RB_DL == 133) {
fs = 61.44e6;
bw = 50e6;
}
else if (mu == 1 && N_RB_DL == 162) {
else if (mu == 1 && N_RB_DL == 162) {
fs = 61.44e6;
bw = 60e6;
}
openair1/SIMULATION/NR_PHY/nr_dummy_functions.c
+2
View File
@@ -21,6 +21,8 @@ nfapi_mode_t nfapi_mod;
nfapi_mode_t nfapi_getmode(void) {
return nfapi_mod;
}
void nfapi_setmode(nfapi_mode_t nfapi_mode) {}
int dummy_nr_ue_dl_indication(nr_downlink_indication_t *dl_info) { return(0); }
int dummy_nr_ue_ul_indication(nr_uplink_indication_t *ul_info) { return(0); }
void nr_fill_dl_indication(nr_downlink_indication_t *dl_ind,
openair1/SIMULATION/NR_PHY/pucchsim.c
+2 -1
View File
@@ -47,12 +47,13 @@
#include "openair1/SIMULATION/NR_PHY/nr_unitary_defs.h"
#include "openair1/SIMULATION/NR_PHY/nr_dummy_functions.c"
THREAD_STRUCT thread_struct;
PHY_VARS_gNB *gNB;
PHY_VARS_NR_UE *UE;
RAN_CONTEXT_t RC;
openair0_config_t openair0_cfg[MAX_CARDS];
int32_t uplink_frequency_offset[MAX_NUM_CCs][4];
uint64_t downlink_frequency[MAX_NUM_CCs][4];
double cpuf;
//uint8_t nfapi_mode = 0;
openair1/SIMULATION/NR_PHY/ulschsim.c
+30 -15
View File
@@ -50,10 +50,12 @@
//#define DEBUG_NR_ULSCHSIM
THREAD_STRUCT thread_struct;
PHY_VARS_gNB *gNB;
PHY_VARS_NR_UE *UE;
RAN_CONTEXT_t RC;
int32_t uplink_frequency_offset[MAX_NUM_CCs][4];
uint64_t downlink_frequency[MAX_NUM_CCs][4];
void init_downlink_harq_status(NR_DL_UE_HARQ_t *dl_harq) {}
@@ -137,6 +139,7 @@ int main(int argc, char **argv)
uint16_t nb_symb_sch = 12;
uint16_t nb_rb = 50;
uint8_t Imcs = 9;
uint8_t Nl = 1;
double DS_TDL = .03;
@@ -150,7 +153,7 @@ int main(int argc, char **argv)
randominit(0);
//while ((c = getopt(argc, argv, "df:hpg:i:j:n:l:m:r:s:S:y:z:M:N:F:R:P:")) != -1) {
while ((c = getopt(argc, argv, "hg:n:s:S:py:z:M:N:R:F:m:l:r:")) != -1) {
while ((c = getopt(argc, argv, "hg:n:s:S:py:z:M:N:R:F:m:l:r:W:")) != -1) {
switch (c) {
/*case 'f':
write_output_file = 1;
@@ -251,7 +254,7 @@ int main(int argc, char **argv)
case 'y':
n_tx = atoi(optarg);
if ((n_tx == 0) || (n_tx > 2)) {
if ((n_tx == 0) || (n_tx > 4)) {
printf("Unsupported number of TX antennas %d. Exiting.\n", n_tx);
exit(-1);
}
@@ -261,7 +264,7 @@ int main(int argc, char **argv)
case 'z':
n_rx = atoi(optarg);
if ((n_rx == 0) || (n_rx > 2)) {
if ((n_rx == 0) || (n_rx > 4)) {
printf("Unsupported number of RX antennas %d. Exiting.\n", n_rx);
exit(-1);
}
@@ -299,6 +302,10 @@ int main(int argc, char **argv)
printf("Illegal PBCH phase (0-3) got %d\n", pbch_phase);
break;*/
case 'W':
Nl = atoi(optarg);
break;
case 'm':
Imcs = atoi(optarg);
#ifdef DEBUG_NR_ULSCHSIM
@@ -335,13 +342,14 @@ int main(int argc, char **argv)
printf("-z Number of RX antennas used in UE\n");
//printf("-i Relative strength of first intefering eNB (in dB) - cell_id mod 3 = 1\n");
//printf("-j Relative strength of second intefering eNB (in dB) - cell_id mod 3 = 2\n");
printf("-W number of layer\n");
printf("-M Multiple SSB positions in burst\n");
printf("-N Nid_cell\n");
printf("-R N_RB_UL\n");
printf("-F Input filename (.txt format) for RX conformance testing\n");
printf("-m\n");
printf("-l\n");
printf("-r\n");
printf("-m MCS\n");
printf("-l number of symbol\n");
printf("-r number of RB\n");
//printf("-O oversampling factor (1,2,4,8,16)\n");
//printf("-A Interpolation_filname Run with Abstraction to generate Scatter plot using interpolation polynomial in file\n");
//printf("-C Generate Calibration information for Abstraction (effective SNR adjustment to remove Pe bias w.r.t. AWGN)\n");
@@ -359,8 +367,8 @@ int main(int argc, char **argv)
snr1 = snr0 + 10;
gNB2UE = new_channel_desc_scm(n_tx,
n_rx,
channel_model,
n_rx,
channel_model,
61.44e6, //N_RB2sampling_rate(N_RB_DL),
40e6, //N_RB2channel_bandwidth(N_RB_DL),
DS_TDL,
@@ -383,8 +391,6 @@ int main(int argc, char **argv)
initTpool(tp_param, gNB->threadPool, true);
initNotifiedFIFO(gNB->respDecode);
frame_parms = &gNB->frame_parms; //to be initialized I suppose (maybe not necessary for PBCH)
frame_parms->nb_antennas_tx = n_tx;
frame_parms->nb_antennas_rx = n_rx;
frame_parms->N_RB_DL = N_RB_DL;
frame_parms->N_RB_UL = N_RB_UL;
frame_parms->Ncp = extended_prefix_flag ? EXTENDED : NORMAL;
@@ -392,6 +398,9 @@ int main(int argc, char **argv)
memcpy(&gNB->frame_parms, frame_parms, sizeof(NR_DL_FRAME_PARMS));
gNB->frame_parms.nb_antennas_tx = 1;
gNB->frame_parms.nb_antennas_rx = n_rx;
nr_phy_config_request_sim(gNB, N_RB_UL, N_RB_UL, mu, Nid_cell, SSB_positions);
phy_init_nr_gNB(gNB, 0, 1); //lowmem
@@ -400,6 +409,9 @@ int main(int argc, char **argv)
UE = malloc(sizeof(PHY_VARS_NR_UE));
memcpy(&UE->frame_parms, frame_parms, sizeof(NR_DL_FRAME_PARMS));
UE->frame_parms.nb_antennas_tx = n_tx;
UE->frame_parms.nb_antennas_rx = 1;
//phy_init_nr_top(frame_parms);
if (init_nr_ue_signal(UE, 1) != 0) {
printf("Error at UE NR initialisation.\n");
@@ -407,7 +419,7 @@ int main(int argc, char **argv)
}
for (sf = 0; sf < 2; sf++) {
UE->ulsch[sf][0] = new_nr_ue_ulsch(N_RB_UL, 8);
UE->ulsch[sf][0] = new_nr_ue_ulsch(N_RB_UL, 8, frame_parms);
if (!UE->ulsch[sf][0]) {
printf("Can't get ue ulsch structures.\n");
exit(-1);
@@ -421,8 +433,7 @@ int main(int argc, char **argv)
uint8_t length_dmrs = 1;
uint8_t N_PRB_oh;
uint16_t N_RE_prime,code_rate;
unsigned char mod_order;
uint8_t Nl = 1;
unsigned char mod_order;
uint8_t rvidx = 0;
uint8_t UE_id = 0;
@@ -432,9 +443,12 @@ int main(int argc, char **argv)
NR_UE_ULSCH_t *ulsch_ue = UE->ulsch[0][0];
if ((Nl==4)||(Nl==3))
nb_re_dmrs = nb_re_dmrs*2;
mod_order = nr_get_Qm_ul(Imcs, 0);
code_rate = nr_get_code_rate_ul(Imcs, 0);
available_bits = nr_get_G(nb_rb, nb_symb_sch, nb_re_dmrs, length_dmrs, mod_order, 1);
available_bits = nr_get_G(nb_rb, nb_symb_sch, nb_re_dmrs, length_dmrs, mod_order, Nl);
TBS = nr_compute_tbs(mod_order,code_rate, nb_rb, nb_symb_sch, nb_re_dmrs*length_dmrs, 0, 0, Nl);
printf("\nAvailable bits %u TBS %u mod_order %d\n", available_bits, TBS, mod_order);
@@ -610,7 +624,8 @@ int main(int argc, char **argv)
}
for (sf = 0; sf < 2; sf++)
free_nr_ue_ulsch(&UE->ulsch[sf][0], N_RB_UL);
free_nr_ue_ulsch(&UE->ulsch[sf][0], N_RB_UL, frame_parms);
term_nr_ue_signal(UE, 1);
free(UE);
openair1/SIMULATION/NR_PHY/ulsim.c
+242 -189
View File
@@ -303,7 +303,7 @@ int main(int argc, char **argv)
int gNB_id = 0;
int ap;
int tx_offset;
int32_t txlev=0;
int32_t txlev_sum = 0, atxlev[4];
int start_rb = 0;
int UE_id =0; // [hna] only works for UE_id = 0 because NUMBER_OF_NR_UE_MAX is set to 1 (phy_init_nr_gNB causes segmentation fault)
float target_error_rate = 0.01;
@@ -328,7 +328,7 @@ int main(int argc, char **argv)
uint16_t ptrsSymbPerSlot = 0;
uint16_t ptrsRePerSymb = 0;
uint8_t transform_precoding = 1; // 0 - ENABLE, 1 - DISABLE
uint8_t transform_precoding = transformPrecoder_disabled; // 0 - ENABLE, 1 - DISABLE
uint8_t num_dmrs_cdm_grps_no_data = 1;
uint8_t mcs_table = 0;
@@ -350,7 +350,7 @@ int main(int argc, char **argv)
/* initialize the sin-cos table */
InitSinLUT();
while ((c = getopt(argc, argv, "a:b:c:d:ef:g:h:ikl:m:n:p:r:s:u:w:y:z:F:G:H:M:N:PR:S:T:U:L:Z")) != -1) {
while ((c = getopt(argc, argv, "a:b:c:d:ef:g:h:i:kl:m:n:p:r:s:u:w:y:z:F:G:H:M:N:PR:S:T:U:L:Z:W:")) != -1) {
printf("handling optarg %c\n",c);
switch (c) {
@@ -384,8 +384,8 @@ int main(int argc, char **argv)
scg_fd = fopen(optarg, "r");
if (scg_fd == NULL) {
printf("Error opening %s\n", optarg);
exit(-1);
printf("Error opening %s\n", optarg);
exit(-1);
}
break;
@@ -458,7 +458,11 @@ int main(int argc, char **argv)
case 'm':
Imcs = atoi(optarg);
break;
case 'W':
precod_nbr_layers = atoi(optarg);
break;
case 'n':
n_trials = atoi(optarg);
break;
@@ -505,32 +509,26 @@ int main(int argc, char **argv)
case 'y':
n_tx = atoi(optarg);
if ((n_tx == 0) || (n_tx > 2)) {
printf("Unsupported number of tx antennas %d\n", n_tx);
exit(-1);
if ((n_tx == 0) || (n_tx > 4)) {
printf("Unsupported number of tx antennas %d\n", n_tx);
exit(-1);
}
break;
case 'z':
n_rx = atoi(optarg);
if ((n_rx == 0) || (n_rx > 8)) {
printf("Unsupported number of rx antennas %d\n", n_rx);
exit(-1);
printf("Unsupported number of rx antennas %d\n", n_rx);
exit(-1);
}
break;
case 'F':
input_fd = fopen(optarg, "r");
if (input_fd == NULL) {
printf("Problem with filename %s\n", optarg);
exit(-1);
printf("Problem with filename %s\n", optarg);
exit(-1);
}
break;
case 'G':
@@ -588,13 +586,10 @@ int main(int argc, char **argv)
break;
case 'Z':
transform_precoding = 0; // enabled
transform_precoding = transformPrecoder_enabled;
num_dmrs_cdm_grps_no_data = 2;
mcs_table = 3;
printf("NOTE: TRANSFORM PRECODING (SC-FDMA) is ENABLED in UPLINK (0 - ENABLE, 1 - DISABLE) : %d \n", transform_precoding);
printf("NOTE: TRANSFORM PRECODING (SC-FDMA) is ENABLED in UPLINK (0 - ENABLE, 1 - DISABLE) : %d \n", transform_precoding);
break;
default:
@@ -615,8 +610,8 @@ int main(int argc, char **argv)
printf("-u Set the numerology\n");
printf("-w Start PRB for PUSCH\n");
//printf("-x Transmission mode (1,2,6 for the moment)\n");
printf("-y Number of TX antennas used in eNB\n");
printf("-z Number of RX antennas used in UE\n");
printf("-y Number of TX antennas used at UE\n");
printf("-z Number of RX antennas used at gNB\n");
printf("-A Interpolation_filname Run with Abstraction to generate Scatter plot using interpolation polynomial in file\n");
//printf("-C Generate Calibration information for Abstraction (effective SNR adjustment to remove Pe bias w.r.t. AWGN)\n");
printf("-F Input filename (.txt format) for RX conformance testing\n");
@@ -633,6 +628,7 @@ int main(int argc, char **argv)
printf("-U Change DMRS Config, arguments list DMRS TYPE{0=A,1=B} DMRS AddPos{0:3}, e.g. -U 2 0 2 \n");
printf("-Q If -F used, read parameters from file\n");
printf("-Z If -Z is used, SC-FDMA or transform precoding is enabled in Uplink \n");
printf("-W Num of layer for PUSCH\n");
exit(-1);
break;
@@ -739,7 +735,8 @@ int main(int argc, char **argv)
// TODO do a UECAP for phy-sim
const gNB_RrcConfigurationReq conf = {
.pdsch_AntennaPorts = { .N1 = n_tx, .N2 = 1, .XP = 1 },
.pdsch_AntennaPorts = { .N1 = 1, .N2 = 1, .XP = 1 },
.pusch_AntennaPorts = n_rx,
.minRXTXTIME = 0,
.do_CSIRS = 0,
.do_SRS = 0,
@@ -752,17 +749,18 @@ int main(int argc, char **argv)
/* RRC parameter validation for secondaryCellGroup */
fix_scd(scd);
AssertFatal((gNB->if_inst = NR_IF_Module_init(0))!=NULL,"Cannot register interface");
AssertFatal((gNB->if_inst = NR_IF_Module_init(0))!=NULL,"Cannot register interface");
gNB->if_inst->NR_PHY_config_req = nr_phy_config_request;
gNB->if_inst->NR_PHY_config_req = nr_phy_config_request;
// common configuration
rrc_mac_config_req_gNB(0,0, conf.pdsch_AntennaPorts, n_rx, 0, 6, scc, &rrc.carrier.mib, rrc.carrier.siblock1, 0, 0, NULL);
// UE dedicated configuration
rrc_mac_config_req_gNB(0,0, conf.pdsch_AntennaPorts, n_rx, 0, 6, scc, &rrc.carrier.mib, rrc.carrier.siblock1, 1, secondaryCellGroup->spCellConfig->reconfigurationWithSync->newUE_Identity,secondaryCellGroup);
frame_parms->nb_antennas_tx = n_tx;
rrc_mac_config_req_gNB(0,0, conf.pdsch_AntennaPorts, n_rx, 0, 6, scc, &rrc.carrier.mib, rrc.carrier.siblock1, 1,
secondaryCellGroup->spCellConfig->reconfigurationWithSync->newUE_Identity, secondaryCellGroup);
frame_parms->nb_antennas_tx = 1;
frame_parms->nb_antennas_rx = n_rx;
nfapi_nr_config_request_scf_t *cfg = &gNB->gNB_config;
cfg->carrier_config.num_tx_ant.value = n_tx;
cfg->carrier_config.num_tx_ant.value = 1;
cfg->carrier_config.num_rx_ant.value = n_rx;
// nr_phy_config_request_sim(gNB,N_RB_DL,N_RB_DL,mu,0,0x01);
phy_init_nr_gNB(gNB,0,1);
@@ -779,6 +777,8 @@ int main(int argc, char **argv)
PHY_vars_UE_g[0] = malloc(sizeof(PHY_VARS_NR_UE*));
PHY_vars_UE_g[0][0] = UE;
memcpy(&UE->frame_parms, frame_parms, sizeof(NR_DL_FRAME_PARMS));
UE->frame_parms.nb_antennas_tx = n_tx;
UE->frame_parms.nb_antennas_rx = 1;
if (init_nr_ue_signal(UE, 1) != 0) {
printf("Error at UE NR initialisation\n");
@@ -831,7 +831,7 @@ int main(int argc, char **argv)
unsigned char *estimated_output_bit;
unsigned char *test_input_bit;
uint32_t errors_decoding = 0;
uint32_t errors_decoding = 0;
test_input_bit = (unsigned char *) malloc16(sizeof(unsigned char) * 16 * 68 * 384);
@@ -864,21 +864,14 @@ int main(int argc, char **argv)
/* validate parameters othwerwise default values are used */
/* -U flag can be used to set DMRS parameters*/
if(modify_dmrs)
{
if(modify_dmrs) {
if(dmrs_arg[0] == 0)
{
mapping_type = typeA;
}
else if (dmrs_arg[0] == 1)
{
mapping_type = typeB;
}
/* Additional DMRS positions */
if(dmrs_arg[1] >= 0 && dmrs_arg[1] <=3 )
{
add_pos = dmrs_arg[1];
}
}
printf("NOTE: DMRS config is modified with Mapping Type %d , Additional Position %d \n", mapping_type, add_pos );
@@ -888,22 +881,24 @@ int main(int argc, char **argv)
printf("num dmrs sym %d\n",number_dmrs_symbols);
uint8_t nb_re_dmrs = (dmrs_config_type == pusch_dmrs_type1) ? 6 : 4;
// if transform precoding is enabled
if (transform_precoding == 0) {
if ((UE->frame_parms.nb_antennas_tx==4)&&(precod_nbr_layers==4))
num_dmrs_cdm_grps_no_data = 2;
if (transform_precoding == transformPrecoder_enabled) {
AssertFatal(enable_ptrs == 0, "PTRS NOT SUPPORTED IF TRANSFORM PRECODING IS ENABLED\n");
int8_t index = get_index_for_dmrs_lowpapr_seq((NR_NB_SC_PER_RB/2) * nb_rb);
AssertFatal(index >= 0, "Num RBs not configured according to 3GPP 38.211 section 6.3.1.4. For PUSCH with transform precoding, num RBs cannot be multiple of any other primenumber other than 2,3,5\n");
AssertFatal(index >= 0, "Num RBs not configured according to 3GPP 38.211 section 6.3.1.4. For PUSCH with transform precoding, num RBs cannot be multiple of any other primenumber other than 2,3,5\n");
dmrs_config_type = pusch_dmrs_type1;
printf("[ULSIM]: TRANSFORM PRECODING ENABLED. Num RBs: %d, index for DMRS_SEQ: %d\n", nb_rb, index);
}
nb_re_dmrs = nb_re_dmrs * num_dmrs_cdm_grps_no_data;
nb_re_dmrs = nb_re_dmrs * num_dmrs_cdm_grps_no_data;
unsigned int available_bits = nr_get_G(nb_rb, nb_symb_sch, nb_re_dmrs, number_dmrs_symbols, mod_order, 1);
unsigned int available_bits = nr_get_G(nb_rb, nb_symb_sch, nb_re_dmrs, number_dmrs_symbols, mod_order, precod_nbr_layers);
unsigned int TBS = nr_compute_tbs(mod_order, code_rate, nb_rb, nb_symb_sch, nb_re_dmrs * number_dmrs_symbols, 0, 0, precod_nbr_layers);
@@ -928,17 +923,12 @@ int main(int argc, char **argv)
double ts = 1.0/(frame_parms->subcarrier_spacing * frame_parms->ofdm_symbol_size);
/* -T option enable PTRS */
if(enable_ptrs)
{
if(enable_ptrs) {
/* validate parameters othwerwise default values are used */
if(ptrs_arg[0] == 0 || ptrs_arg[0] == 1 || ptrs_arg[0] == 2 )
{
ptrs_time_density = ptrs_arg[0];
}
if(ptrs_arg[1] == 2 || ptrs_arg[1] == 4 )
{
ptrs_freq_density = ptrs_arg[1];
}
pdu_bit_map |= PUSCH_PDU_BITMAP_PUSCH_PTRS;
printf("NOTE: PTRS Enabled with L %d, K %d \n", ptrs_time_density, ptrs_freq_density );
}
@@ -1054,7 +1044,7 @@ int main(int argc, char **argv)
uint8_t round = 0;
crc_status = 1;
errors_decoding = 0;
errors_decoding = 0;
memset((void*)roundStats,0,50*sizeof(roundStats[0]));
while (round<max_rounds && crc_status) {
round_trials[round][snrRun]++;
@@ -1101,12 +1091,12 @@ int main(int argc, char **argv)
pusch_pdu->qam_mod_order = mod_order;
pusch_pdu->transform_precoding = transform_precoding;
pusch_pdu->data_scrambling_id = *scc->physCellId;
pusch_pdu->nrOfLayers = 1;
pusch_pdu->nrOfLayers = precod_nbr_layers;
pusch_pdu->ul_dmrs_symb_pos = l_prime_mask;
pusch_pdu->dmrs_config_type = dmrs_config_type;
pusch_pdu->ul_dmrs_scrambling_id = *scc->physCellId;
pusch_pdu->scid = 0;
pusch_pdu->dmrs_ports = 1;
pusch_pdu->dmrs_ports = ((1<<precod_nbr_layers)-1);
pusch_pdu->num_dmrs_cdm_grps_no_data = num_dmrs_cdm_grps_no_data;
pusch_pdu->resource_alloc = 1;
pusch_pdu->rb_start = start_rb;
@@ -1126,7 +1116,7 @@ int main(int argc, char **argv)
pusch_pdu->pusch_ptrs.ptrs_ports_list[0].ptrs_re_offset = 0;
// if transform precoding is enabled
if (transform_precoding == 0) {
if (transform_precoding == transformPrecoder_enabled) {
pusch_pdu->dfts_ofdm.low_papr_group_number = *scc->physCellId % 30; // U as defined in 38.211 section 6.4.1.1.1.2
pusch_pdu->dfts_ofdm.low_papr_sequence_number = 0; // V as defined in 38.211 section 6.4.1.1.1.2
@@ -1173,6 +1163,7 @@ int main(int argc, char **argv)
ul_config.ul_config_list[0].pusch_config_pdu.mcs_table = mcs_table;
ul_config.ul_config_list[0].pusch_config_pdu.num_dmrs_cdm_grps_no_data = num_dmrs_cdm_grps_no_data;
ul_config.ul_config_list[0].pusch_config_pdu.nrOfLayers = precod_nbr_layers;
ul_config.ul_config_list[0].pusch_config_pdu.dmrs_ports = ((1<<precod_nbr_layers)-1);
ul_config.ul_config_list[0].pusch_config_pdu.absolute_delta_PUSCH = 0;
ul_config.ul_config_list[0].pusch_config_pdu.pusch_data.tb_size = TBS/8;
@@ -1182,13 +1173,13 @@ int main(int argc, char **argv)
ul_config.ul_config_list[0].pusch_config_pdu.pusch_ptrs.ptrs_time_density = ptrs_time_density;
ul_config.ul_config_list[0].pusch_config_pdu.pusch_ptrs.ptrs_freq_density = ptrs_freq_density;
ul_config.ul_config_list[0].pusch_config_pdu.pusch_ptrs.ptrs_ports_list = (nfapi_nr_ue_ptrs_ports_t *) malloc(2*sizeof(nfapi_nr_ue_ptrs_ports_t));
ul_config.ul_config_list[0].pusch_config_pdu.pusch_ptrs.ptrs_ports_list = (nfapi_nr_ue_ptrs_ports_t *) malloc(2*sizeof(nfapi_nr_ue_ptrs_ports_t));
ul_config.ul_config_list[0].pusch_config_pdu.pusch_ptrs.ptrs_ports_list[0].ptrs_re_offset = 0;
ul_config.ul_config_list[0].pusch_config_pdu.transform_precoding = transform_precoding;
// if transform precoding is enabled
if (transform_precoding == 0) {
if (transform_precoding == transformPrecoder_enabled) {
ul_config.ul_config_list[0].pusch_config_pdu.dfts_ofdm.low_papr_group_number = *scc->physCellId % 30;// U as defined in 38.211 section 6.4.1.1.1.2
ul_config.ul_config_list[0].pusch_config_pdu.dfts_ofdm.low_papr_sequence_number = 0;// V as defined in 38.211 section 6.4.1.1.1.2
@@ -1216,43 +1207,83 @@ int main(int argc, char **argv)
LOG_D(PHY, "Sending Uplink data \n");
nr_ue_pusch_common_procedures(UE,
slot,
&UE->frame_parms,1);
&UE->frame_parms,
UE->frame_parms.nb_antennas_tx);
if (n_trials==1) {
LOG_M("txsig0.m","txs0", UE->common_vars.txdata[0],frame_parms->samples_per_subframe*10,1,1);
LOG_M("txsig0.m","txs0", &UE->common_vars.txdata[0][slot_offset],slot_length,1,1);
LOG_M("txsig0F.m","txs0F", UE->common_vars.txdataF[0],frame_parms->ofdm_symbol_size*14,1,1);
if (precod_nbr_layers > 1) {
LOG_M("txsig1.m","txs1", &UE->common_vars.txdata[1][slot_offset],slot_length,1,1);
LOG_M("txsig1F.m","txs1F", UE->common_vars.txdataF[1],frame_parms->ofdm_symbol_size*14,1,1);
if (precod_nbr_layers==4) {
LOG_M("txsig2.m","txs2", &UE->common_vars.txdata[2][slot_offset],slot_length,1,1);
LOG_M("txsig3.m","txs3", &UE->common_vars.txdata[3][slot_offset],slot_length,1,1);
LOG_M("txsig2F.m","txs2F", UE->common_vars.txdataF[2],frame_parms->ofdm_symbol_size*14,1,1);
LOG_M("txsig3F.m","txs3F", UE->common_vars.txdataF[3],frame_parms->ofdm_symbol_size*14,1,1);
}
}
}
///////////
////////////////////////////////////////////////////
tx_offset = frame_parms->get_samples_slot_timestamp(slot,frame_parms,0);
txlev = signal_energy(&UE->common_vars.txdata[0][tx_offset + 5*frame_parms->ofdm_symbol_size + 4*frame_parms->nb_prefix_samples + frame_parms->nb_prefix_samples0],
txlev_sum = 0;
for (int aa=0; aa<UE->frame_parms.nb_antennas_tx; aa++) {
atxlev[aa] = signal_energy(&UE->common_vars.txdata[aa][tx_offset + 5*frame_parms->ofdm_symbol_size + 4*frame_parms->nb_prefix_samples + frame_parms->nb_prefix_samples0],
frame_parms->ofdm_symbol_size + frame_parms->nb_prefix_samples);
}
else n_trials = 1;
if (input_fd == NULL ) {
txlev_sum += atxlev[aa];
sigma_dB = 10 * log10((double)txlev * ((double)frame_parms->ofdm_symbol_size/(12*nb_rb))) - SNR;;
if (n_trials==1) printf("txlev[%d] = %d (%f dB) txlev_sum %d\n",aa,atxlev[aa],10*log10((double)atxlev[aa]),txlev_sum);
}
}
else
n_trials = 1;
if (input_fd == NULL) {
// Justification of division by precod_nbr_layers:
// When the channel is the identity matrix, the results in terms of SNR should be almost equal for 2x2 and 4x4.
sigma_dB = 10 * log10((double)txlev_sum/precod_nbr_layers * ((double)frame_parms->ofdm_symbol_size/(12*nb_rb))) - SNR;;
sigma = pow(10,sigma_dB/10);
if(n_trials==1) printf("sigma %f (%f dB), txlev %f (factor %f)\n",sigma,sigma_dB,10*log10((double)txlev),(double)(double)
frame_parms->ofdm_symbol_size/(12*nb_rb));
if(n_trials==1) printf("sigma %f (%f dB), txlev_sum %f (factor %f)\n",sigma,sigma_dB,10*log10((double)txlev_sum),(double)(double)
frame_parms->ofdm_symbol_size/(12*nb_rb));
for (i=0; i<slot_length; i++) {
for (int aa=0; aa<frame_parms->nb_antennas_tx; aa++) {
for (int aa=0; aa<UE->frame_parms.nb_antennas_tx; aa++) {
s_re[aa][i] = ((double)(((short *)&UE->common_vars.txdata[aa][slot_offset]))[(i<<1)]);
s_im[aa][i] = ((double)(((short *)&UE->common_vars.txdata[aa][slot_offset]))[(i<<1)+1]);
}
}
if (UE2gNB->max_Doppler == 0) {
multipath_channel(UE2gNB, s_re, s_im, r_re, r_im, slot_length, 0, (n_trials==1)?1:0);
// The multipath_channel() function calculates a channel matrix with only 1's. So the channel rank is 1, and we
// cannot use multi-layer. To solve this issue, for now we use the H_awgn_mimo matrix for multi-layer.
if (precod_nbr_layers == 1) {
if (UE2gNB->max_Doppler == 0) {
multipath_channel(UE2gNB, s_re, s_im, r_re, r_im, slot_length, 0, (n_trials==1)?1:0);
} else {
multipath_tv_channel(UE2gNB, s_re, s_im, r_re, r_im, 2*slot_length, 0);
}
} else {
multipath_tv_channel(UE2gNB, s_re, s_im, r_re, r_im, 2*slot_length, 0);
double H_awgn_mimo[4][4] ={{1.0, 0.2, 0.1, 0.05}, //rx 0
{0.2, 1.0, 0.2, 0.1}, //rx 1
{0.1, 0.2, 1.0, 0.2}, //rx 2
{0.05, 0.1, 0.2, 1.0}}; //rx 3
for (i=0; i<slot_length; i++) {
for (ap = 0; ap < frame_parms->nb_antennas_rx; ap++) {
// sum up signals from different Tx antennas
r_re[ap][i] = 0;
r_im[ap][i] = 0;
for (int aa=0; aa<n_tx; aa++) {
r_re[ap][i] += s_re[aa][i]*H_awgn_mimo[ap][aa];
r_im[ap][i] += s_im[aa][i]*H_awgn_mimo[ap][aa];
}
}
}
}
for (i=0; i<slot_length; i++) {
for (ap=0; ap<frame_parms->nb_antennas_rx; ap++) {
((int16_t*) &gNB->common_vars.rxdata[ap][slot_offset])[(2*i) + (delay*2)] = (int16_t)((r_re[ap][i]) + (sqrt(sigma/2)*gaussdouble(0.0,1.0))); // convert to fixed point
@@ -1276,7 +1307,7 @@ int main(int argc, char **argv)
pusch_pdu->ul_dmrs_symb_pos);
ptrsSymbPerSlot = get_ptrs_symbols_in_slot(ptrsSymPos, pusch_pdu->start_symbol_index, pusch_pdu->nr_of_symbols);
ptrsRePerSymb = ((pusch_pdu->rb_size + ptrs_freq_density - 1)/ptrs_freq_density);
printf("[ULSIM] PTRS Symbols in a slot: %2u, RE per Symbol: %3u, RE in a slot %4d\n", ptrsSymbPerSlot,ptrsRePerSymb, ptrsSymbPerSlot*ptrsRePerSymb );
LOG_D(PHY,"[ULSIM] PTRS Symbols in a slot: %2u, RE per Symbol: %3u, RE in a slot %4d\n", ptrsSymbPerSlot,ptrsRePerSymb, ptrsSymbPerSlot*ptrsRePerSymb );
}
////////////////////////////////////////////////////////////
@@ -1286,130 +1317,152 @@ int main(int argc, char **argv)
gNB->UL_INFO.rx_ind.number_of_pdus = 0;
gNB->UL_INFO.crc_ind.number_crcs = 0;
phy_procedures_gNB_common_RX(gNB, frame, slot);
phy_procedures_gNB_common_RX(gNB, frame, slot);
ul_proc_error = phy_procedures_gNB_uespec_RX(gNB, frame, slot);
ul_proc_error = phy_procedures_gNB_uespec_RX(gNB, frame, slot);
if (n_trials==1 && round==0) {
LOG_M("rxsig0.m","rx0",&gNB->common_vars.rxdata[0][slot_offset],slot_length,1,1);
LOG_M("rxsigF0.m","rxsF0",gNB->common_vars.rxdataF[0]+start_symbol*frame_parms->ofdm_symbol_size,nb_symb_sch*frame_parms->ofdm_symbol_size,1,1);
}
if (n_trials == 1 && round==0) {
#ifdef __AVX2__
__attribute__((unused))
int off = ((nb_rb&1) == 1)? 4:0;
#else
__attribute__((unused))
int off = 0;
#endif
LOG_M("rxsigF0_ext.m","rxsF0_ext",
&gNB->pusch_vars[0]->rxdataF_ext[0][start_symbol*NR_NB_SC_PER_RB * pusch_pdu->rb_size],nb_symb_sch*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size)),1,1);
LOG_M("chestF0.m","chF0",
&gNB->pusch_vars[0]->ul_ch_estimates[0][start_symbol*frame_parms->ofdm_symbol_size],frame_parms->ofdm_symbol_size,1,1);
LOG_M("chestT0.m","chT0",
&gNB->pusch_vars[0]->ul_ch_estimates_time[0][0],frame_parms->ofdm_symbol_size,1,1);
LOG_M("chestF0_ext.m","chF0_ext",
&gNB->pusch_vars[0]->ul_ch_estimates_ext[0][(start_symbol+1)*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size))],
(nb_symb_sch-1)*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size)),1,1);
LOG_M("rxsigF0_comp.m","rxsF0_comp",
&gNB->pusch_vars[0]->rxdataF_comp[0][start_symbol*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size))],nb_symb_sch*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size)),1,1);
LOG_M("chmagF0.m","chmF0",
&gNB->pusch_vars[0]->ul_ch_mag[0][start_symbol*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size))],nb_symb_sch*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size)),1,1);
LOG_M("chmagbF0.m","chmbF0",
&gNB->pusch_vars[0]->ul_ch_magb[0][start_symbol*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size))],nb_symb_sch*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size)),1,1);
if (n_rx == 2) {
LOG_MM("rxsigF0_comp.m","rxsF1_comp",
&gNB->pusch_vars[0]->rxdataF_comp[1][start_symbol*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size))],nb_symb_sch*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size)),1,1);
LOG_MM("rxsigF0_ext.m","rxsF1_ext",
&gNB->pusch_vars[0]->rxdataF_ext[1][start_symbol*NR_NB_SC_PER_RB * pusch_pdu->rb_size],nb_symb_sch*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size)),1,1);
LOG_MM("chestF0_ext.m","chF1_ext",
&gNB->pusch_vars[0]->ul_ch_estimates_ext[1][(start_symbol+1)*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size))],
(nb_symb_sch-1)*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size)),1,1);
LOG_MM("chmagF0.m","chmF1",
&gNB->pusch_vars[0]->ul_ch_mag[1][start_symbol*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size))],nb_symb_sch*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size)),1,1);
LOG_MM("chmagbF0.m","chmbF1",
&gNB->pusch_vars[0]->ul_ch_magb[1][start_symbol*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size))],nb_symb_sch*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size)),1,1);
} else if (n_rx == 4) {
LOG_MM("rxsigF0_comp.m","rxsF1_comp",
&gNB->pusch_vars[0]->rxdataF_comp[1][start_symbol*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size))],nb_symb_sch*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size)),1,1);
LOG_MM("rxsigF0_comp.m","rxsF2_comp",
&gNB->pusch_vars[0]->rxdataF_comp[2][start_symbol*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size))],nb_symb_sch*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size)),1,1);
LOG_MM("rxsigF0_comp.m","rxsF3_comp",
&gNB->pusch_vars[0]->rxdataF_comp[3][start_symbol*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size))],nb_symb_sch*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size)),1,1);
LOG_MM("rxsigF0_ext.m","rxsF1_ext",
&gNB->pusch_vars[0]->rxdataF_ext[1][start_symbol*NR_NB_SC_PER_RB * pusch_pdu->rb_size],nb_symb_sch*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size)),1,1);
LOG_MM("rxsigF0_ext.m","rxsF2_ext",
&gNB->pusch_vars[0]->rxdataF_ext[2][start_symbol*NR_NB_SC_PER_RB * pusch_pdu->rb_size],nb_symb_sch*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size)),1,1);
LOG_MM("rxsigF0_ext.m","rxsF3_ext",
&gNB->pusch_vars[0]->rxdataF_ext[3][start_symbol*NR_NB_SC_PER_RB * pusch_pdu->rb_size],nb_symb_sch*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size)),1,1);
LOG_MM("chestF0_ext.m","chF1_ext",
&gNB->pusch_vars[0]->ul_ch_estimates_ext[1][(start_symbol+1)*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size))],
(nb_symb_sch-1)*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size)),1,1);
LOG_MM("chestF0_ext.m","chF2_ext",
&gNB->pusch_vars[0]->ul_ch_estimates_ext[2][(start_symbol+1)*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size))],
(nb_symb_sch-1)*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size)),1,1);
LOG_MM("chestF0_ext.m","chF3_ext",
&gNB->pusch_vars[0]->ul_ch_estimates_ext[3][(start_symbol+1)*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size))],
(nb_symb_sch-1)*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size)),1,1);
LOG_MM("chmagF0.m","chmF1",
&gNB->pusch_vars[0]->ul_ch_mag[1][start_symbol*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size))],nb_symb_sch*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size)),1,1);
LOG_MM("chmagF0.m","chmF2",
&gNB->pusch_vars[0]->ul_ch_mag[2][start_symbol*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size))],nb_symb_sch*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size)),1,1);
LOG_MM("chmagF0.m","chmF3",
&gNB->pusch_vars[0]->ul_ch_mag[3][start_symbol*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size))],nb_symb_sch*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size)),1,1);
LOG_MM("chmagbF0.m","chmbF1",
&gNB->pusch_vars[0]->ul_ch_magb[1][start_symbol*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size))],nb_symb_sch*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size)),1,1);
LOG_MM("chmagbF0.m","chmbF2",
&gNB->pusch_vars[0]->ul_ch_magb[2][start_symbol*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size))],nb_symb_sch*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size)),1,1);
LOG_MM("chmagbF0.m","chmbF3",
&gNB->pusch_vars[0]->ul_ch_magb[3][start_symbol*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size))],nb_symb_sch*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size)),1,1);
if (n_trials==1 && round==0) {
LOG_M("rxsig0.m","rx0",&gNB->common_vars.rxdata[0][slot_offset],slot_length,1,1);
LOG_M("rxsigF0.m","rxsF0",gNB->common_vars.rxdataF[0],14*frame_parms->ofdm_symbol_size,1,1);
if (precod_nbr_layers > 1) {
LOG_M("rxsig1.m","rx1",&gNB->common_vars.rxdata[1][slot_offset],slot_length,1,1);
LOG_M("rxsigF1.m","rxsF1",gNB->common_vars.rxdataF[1],14*frame_parms->ofdm_symbol_size,1,1);
if (precod_nbr_layers==4) {
LOG_M("rxsig2.m","rx2",&gNB->common_vars.rxdata[2][slot_offset],slot_length,1,1);
LOG_M("rxsig3.m","rx3",&gNB->common_vars.rxdata[3][slot_offset],slot_length,1,1);
LOG_M("rxsigF2.m","rxsF2",gNB->common_vars.rxdataF[2],14*frame_parms->ofdm_symbol_size,1,1);
LOG_M("rxsigF3.m","rxsF3",gNB->common_vars.rxdataF[3],14*frame_parms->ofdm_symbol_size,1,1);
}
}
}
LOG_M("rxsigF0_llr.m","rxsF0_llr",
&gNB->pusch_vars[0]->llr[0],(nb_symb_sch-1)*NR_NB_SC_PER_RB * pusch_pdu->rb_size * mod_order,1,0);
}
////////////////////////////////////////////////////////////
if ((gNB->ulsch[0]->last_iteration_cnt >=
gNB->ulsch[0]->max_ldpc_iterations+1) || ul_proc_error == 1) {
error_flag = 1;
n_errors[round][snrRun]++;
crc_status = 1;
} else {
crc_status = 0;
}
if(n_trials==1) printf("end of round %d rv_index %d\n",round, rv_index);
if (n_trials == 1 && round==0) {
#ifdef __AVX2__
__attribute__((unused))
int off = ((nb_rb&1) == 1)? 4:0;
#else
__attribute__((unused))
int off = 0;
#endif
//----------------------------------------------------------
//----------------- count and print errors -----------------
//----------------------------------------------------------
LOG_M("rxsigF0_ext.m","rxsF0_ext",
&gNB->pusch_vars[0]->rxdataF_ext[0][start_symbol*NR_NB_SC_PER_RB * pusch_pdu->rb_size],nb_symb_sch*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size)),1,1);
LOG_M("chestF0.m","chF0",
&gNB->pusch_vars[0]->ul_ch_estimates[0][start_symbol*frame_parms->ofdm_symbol_size],frame_parms->ofdm_symbol_size,1,1);
LOG_M("chestT0.m","chT0",
&gNB->pusch_vars[0]->ul_ch_estimates_time[0][0],frame_parms->ofdm_symbol_size,1,1);
LOG_M("chestF0_ext.m","chF0_ext",
&gNB->pusch_vars[0]->ul_ch_estimates_ext[0][(start_symbol+1)*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size))],
(nb_symb_sch-1)*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size)),1,1);
LOG_M("rxsigF0_comp.m","rxsF0_comp",
&gNB->pusch_vars[0]->rxdataF_comp[0][start_symbol*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size))],nb_symb_sch*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size)),1,1);
LOG_M("chmagF0.m","chmF0",
&gNB->pusch_vars[0]->ul_ch_mag[0][start_symbol*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size))],nb_symb_sch*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size)),1,1);
LOG_M("chmagbF0.m","chmbF0",
&gNB->pusch_vars[0]->ul_ch_magb[0][start_symbol*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size))],nb_symb_sch*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size)),1,1);
LOG_M("rxsigF0_llrlayers0.m","rxsF0_llrlayers0",
&gNB->pusch_vars[0]->llr_layers[0][0],(nb_symb_sch-1)*NR_NB_SC_PER_RB * pusch_pdu->rb_size * mod_order,1,0);
if (precod_nbr_layers==2) {
LOG_M("rxsigF1_ext.m","rxsF1_ext",
&gNB->pusch_vars[0]->rxdataF_ext[1][start_symbol*NR_NB_SC_PER_RB * pusch_pdu->rb_size],nb_symb_sch*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size)),1,1);
LOG_M("chestF3.m","chF3",
&gNB->pusch_vars[0]->ul_ch_estimates[3][start_symbol*frame_parms->ofdm_symbol_size],frame_parms->ofdm_symbol_size,1,1);
LOG_M("chestF3_ext.m","chF3_ext",
&gNB->pusch_vars[0]->ul_ch_estimates_ext[3][(start_symbol+1)*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size))],
(nb_symb_sch-1)*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size)),1,1);
LOG_M("rxsigF2_comp.m","rxsF2_comp",
&gNB->pusch_vars[0]->rxdataF_comp[2][start_symbol*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size))],nb_symb_sch*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size)),1,1);
LOG_M("rxsigF0_llrlayers1.m","rxsF0_llrlayers1",
&gNB->pusch_vars[0]->llr_layers[1][0],(nb_symb_sch-1)*NR_NB_SC_PER_RB * pusch_pdu->rb_size * mod_order,1,0);
if ((pusch_pdu->pdu_bit_map & PUSCH_PDU_BITMAP_PUSCH_PTRS) && (SNR==snr0) && (trial==0) && (round==0)) {
ptrs_symbols = 0;
for (int i = pusch_pdu->start_symbol_index; i < pusch_pdu->start_symbol_index + pusch_pdu->nr_of_symbols; i++){
ptrs_symbols += ((gNB->pusch_vars[UE_id]->ptrs_symbols) >> i) & 1;
}
/* 2*5*(50/2), for RB = 50,K = 2 for 5 OFDM PTRS symbols */
available_bits -= 2 * ptrs_symbols * ((nb_rb + ptrs_freq_density - 1) /ptrs_freq_density);
printf("[ULSIM][PTRS] Available bits are: %5u, removed PTRS bits are: %5d \n",available_bits, (ptrsSymbPerSlot * ptrsRePerSymb * 2) );
}
for (i = 0; i < available_bits; i++) {
if(((ulsch_ue->harq_processes[harq_pid]->f[i] == 0) && (gNB->pusch_vars[UE_id]->llr[i] <= 0)) ||
((ulsch_ue->harq_processes[harq_pid]->f[i] == 1) && (gNB->pusch_vars[UE_id]->llr[i] >= 0)))
{
/*if(errors_scrambling == 0)
printf("\x1B[34m" "[frame %d][trial %d]\t1st bit in error in unscrambling = %d\n" "\x1B[0m", frame, trial, i);*/
errors_scrambling[round][snrRun]++;
}
}
round++;
if (precod_nbr_layers==4) {
LOG_M("rxsigF1_ext.m","rxsF1_ext",
&gNB->pusch_vars[0]->rxdataF_ext[1][start_symbol*NR_NB_SC_PER_RB * pusch_pdu->rb_size],nb_symb_sch*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size)),1,1);
LOG_M("rxsigF2_ext.m","rxsF2_ext",
&gNB->pusch_vars[0]->rxdataF_ext[2][start_symbol*NR_NB_SC_PER_RB * pusch_pdu->rb_size],nb_symb_sch*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size)),1,1);
LOG_M("rxsigF3_ext.m","rxsF3_ext",
&gNB->pusch_vars[0]->rxdataF_ext[3][start_symbol*NR_NB_SC_PER_RB * pusch_pdu->rb_size],nb_symb_sch*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size)),1,1);
LOG_M("chestF5.m","chF5",
&gNB->pusch_vars[0]->ul_ch_estimates[5][start_symbol*frame_parms->ofdm_symbol_size],frame_parms->ofdm_symbol_size,1,1);
LOG_M("chestF10.m","chF10",
&gNB->pusch_vars[0]->ul_ch_estimates[10][start_symbol*frame_parms->ofdm_symbol_size],frame_parms->ofdm_symbol_size,1,1);
LOG_M("chestF15.m","chF15",
&gNB->pusch_vars[0]->ul_ch_estimates[15][start_symbol*frame_parms->ofdm_symbol_size],frame_parms->ofdm_symbol_size,1,1);
LOG_M("chestF5_ext.m","chF5_ext",
&gNB->pusch_vars[0]->ul_ch_estimates_ext[5][(start_symbol+1)*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size))],
(nb_symb_sch-1)*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size)),1,1);
LOG_M("chestF10_ext.m","chF10_ext",
&gNB->pusch_vars[0]->ul_ch_estimates_ext[10][(start_symbol+1)*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size))],
(nb_symb_sch-1)*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size)),1,1);
LOG_M("chestF15_ext.m","chF15_ext",
&gNB->pusch_vars[0]->ul_ch_estimates_ext[15][(start_symbol+1)*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size))],
(nb_symb_sch-1)*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size)),1,1);
LOG_M("rxsigF4_comp.m","rxsF4_comp",
&gNB->pusch_vars[0]->rxdataF_comp[4][start_symbol*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size))],nb_symb_sch*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size)),1,1);
LOG_M("rxsigF8_comp.m","rxsF8_comp",
&gNB->pusch_vars[0]->rxdataF_comp[8][start_symbol*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size))],nb_symb_sch*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size)),1,1);
LOG_M("rxsigF12_comp.m","rxsF12_comp",
&gNB->pusch_vars[0]->rxdataF_comp[12][start_symbol*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size))],nb_symb_sch*(off+(NR_NB_SC_PER_RB * pusch_pdu->rb_size)),1,1);
LOG_M("rxsigF0_llrlayers1.m","rxsF0_llrlayers1",
&gNB->pusch_vars[0]->llr_layers[1][0],(nb_symb_sch-1)*NR_NB_SC_PER_RB * pusch_pdu->rb_size * mod_order,1,0);
LOG_M("rxsigF0_llrlayers2.m","rxsF0_llrlayers2",
&gNB->pusch_vars[0]->llr_layers[2][0],(nb_symb_sch-1)*NR_NB_SC_PER_RB * pusch_pdu->rb_size * mod_order,1,0);
LOG_M("rxsigF0_llrlayers3.m","rxsF0_llrlayers3",
&gNB->pusch_vars[0]->llr_layers[3][0],(nb_symb_sch-1)*NR_NB_SC_PER_RB * pusch_pdu->rb_size * mod_order,1,0);
}
LOG_M("rxsigF0_llr.m","rxsF0_llr",
&gNB->pusch_vars[0]->llr[0],precod_nbr_layers*(nb_symb_sch-1)*NR_NB_SC_PER_RB * pusch_pdu->rb_size * mod_order,1,0);
}
////////////////////////////////////////////////////////////
if ((gNB->ulsch[0]->last_iteration_cnt >=
gNB->ulsch[0]->max_ldpc_iterations+1) || ul_proc_error == 1) {
error_flag = 1;
n_errors[round][snrRun]++;
crc_status = 1;
} else
crc_status = 0;
if(n_trials==1) printf("end of round %d rv_index %d\n",round, rv_index);
//----------------------------------------------------------
//----------------- count and print errors -----------------
//----------------------------------------------------------
if ((pusch_pdu->pdu_bit_map & PUSCH_PDU_BITMAP_PUSCH_PTRS) && (SNR==snr0) && (trial==0) && (round==0)) {
ptrs_symbols = 0;
for (int i = pusch_pdu->start_symbol_index; i < pusch_pdu->start_symbol_index + pusch_pdu->nr_of_symbols; i++)
ptrs_symbols += ((gNB->pusch_vars[UE_id]->ptrs_symbols) >> i) & 1;
/* 2*5*(50/2), for RB = 50,K = 2 for 5 OFDM PTRS symbols */
available_bits -= 2 * ptrs_symbols * ((nb_rb + ptrs_freq_density - 1) /ptrs_freq_density);
printf("[ULSIM][PTRS] Available bits are: %5u, removed PTRS bits are: %5d \n",available_bits, (ptrsSymbPerSlot * ptrsRePerSymb * 2) );
}
for (i = 0; i < available_bits; i++) {
if(((ulsch_ue->harq_processes[harq_pid]->f[i] == 0) && (gNB->pusch_vars[UE_id]->llr[i] <= 0)) ||
((ulsch_ue->harq_processes[harq_pid]->f[i] == 1) && (gNB->pusch_vars[UE_id]->llr[i] >= 0))) {
/*if(errors_scrambling == 0)
printf("\x1B[34m" "[frame %d][trial %d]\t1st bit in error in unscrambling = %d\n" "\x1B[0m", frame, trial, i);*/
errors_scrambling[round][snrRun]++;
}
}
round++;
} // round
openair2/COMMON/f1ap_messages_types.h
+4 -2
View File
@@ -60,7 +60,9 @@
#define F1AP_MAX_NB_CELLS 2
#define F1AP_MAX_NO_OF_TNL_ASSOCIATIONS 32
#define F1AP_MAX_NO_UE_ID 1024
#define F1AP_MAX_NO_UE_ID 1024
#define F1AP_MAX_DU2CU_RRC_LENGTH 1024
typedef struct f1ap_net_ip_address_s {
unsigned ipv4:1;
unsigned ipv6:1;
@@ -307,7 +309,7 @@ typedef struct f1ap_initial_ul_rrc_message_s {
uint16_t crnti;
uint8_t *rrc_container;
int rrc_container_length;
char du2cu_rrc_container[200];
char du2cu_rrc_container[F1AP_MAX_DU2CU_RRC_LENGTH];
int du2cu_rrc_container_length;
} f1ap_initial_ul_rrc_message_t;
openair2/COMMON/mac_messages_types.h
+1 -1
View File
@@ -58,7 +58,7 @@
// Some constants from "LAYER2/MAC/defs.h"
#define BCCH_SDU_SIZE (512)
#define BCCH_SDU_MBMS_SIZE (512)
#define CCCH_SDU_SIZE (512)
#define CCCH_SDU_SIZE (1024)
#define MCCH_SDU_SIZE (512)
#define PCCH_SDU_SIZE (512)
openair2/GNB_APP/RRC_nr_paramsvalues.h
+56 -5
View File
@@ -132,6 +132,34 @@
#define GNB_CONFIG_STRING_ULPTRSMAXPORTS_0 "ul_ptrsMaxPorts_0"
#define GNB_CONFIG_STRING_ULPTRSPOWER_0 "ul_ptrsPower_0"
#define GNB_CONFIG_STRING_DLBWP1_ID "dl_bwp-Id_1"
#define GNB_CONFIG_STRING_DLBWP2_ID "dl_bwp-Id_2"
#define GNB_CONFIG_STRING_DLBWP3_ID "dl_bwp-Id_3"
#define GNB_CONFIG_STRING_DLBWP4_ID "dl_bwp-Id_4"
#define GNB_CONFIG_STRING_LOCATIONANDBANDWIDTH_DLBWP1 "dl_bwp1_locationAndBandwidth"
#define GNB_CONFIG_STRING_LOCATIONANDBANDWIDTH_DLBWP2 "dl_bwp2_locationAndBandwidth"
#define GNB_CONFIG_STRING_LOCATIONANDBANDWIDTH_DLBWP3 "dl_bwp3_locationAndBandwidth"
#define GNB_CONFIG_STRING_LOCATIONANDBANDWIDTH_DLBWP4 "dl_bwp4_locationAndBandwidth"
#define GNB_CONFIG_STRING_SCS_DLBWP1 "dl_bwp1_subcarrierSpacing"
#define GNB_CONFIG_STRING_SCS_DLBWP2 "dl_bwp2_subcarrierSpacing"
#define GNB_CONFIG_STRING_SCS_DLBWP3 "dl_bwp3_subcarrierSpacing"
#define GNB_CONFIG_STRING_SCS_DLBWP4 "dl_bwp4_subcarrierSpacing"
#define GNB_CONFIG_STRING_FIRSTACTIVEDLBWP_ID "firstActiveDownlinkBWP-Id"
#define GNB_CONFIG_STRING_DEFAULTDLBWP_ID "defaultDownlinkBWP-Id"
#define GNB_CONFIG_STRING_ULBWP1_ID "ul_bwp-Id_1"
#define GNB_CONFIG_STRING_ULBWP2_ID "ul_bwp-Id_2"
#define GNB_CONFIG_STRING_ULBWP3_ID "ul_bwp-Id_3"
#define GNB_CONFIG_STRING_ULBWP4_ID "ul_bwp-Id_4"
#define GNB_CONFIG_STRING_LOCATIONANDBANDWIDTH_ULBWP1 "ul_bwp1_locationAndBandwidth"
#define GNB_CONFIG_STRING_LOCATIONANDBANDWIDTH_ULBWP2 "ul_bwp2_locationAndBandwidth"
#define GNB_CONFIG_STRING_LOCATIONANDBANDWIDTH_ULBWP3 "ul_bwp3_locationAndBandwidth"
#define GNB_CONFIG_STRING_LOCATIONANDBANDWIDTH_ULBWP4 "ul_bwp4_locationAndBandwidth"
#define GNB_CONFIG_STRING_SCS_ULBWP1 "ul_bwp1_subcarrierSpacing"
#define GNB_CONFIG_STRING_SCS_ULBWP2 "ul_bwp2_subcarrierSpacing"
#define GNB_CONFIG_STRING_SCS_ULBWP3 "ul_bwp3_subcarrierSpacing"
#define GNB_CONFIG_STRING_SCS_ULBWP4 "ul_bwp4_subcarrierSpacing"
#define GNB_CONFIG_STRING_FIRSTACTIVEULBWP_ID "firstActiveUplinkBWP-Id"
/*--------------------------------------------------------------------------------------------------------------------*/
/* pdcch_ConfigSIB1 parameters */
/*--------------------------------------------------------------------------------------------------------------------*/
@@ -240,10 +268,33 @@
{GNB_CONFIG_STRING_ULPTRSTIMEDENSITY2_0,NULL,0,i64ptr:scd->uplinkConfig->uplinkBWP_ToAddModList->list.array[0]->bwp_Dedicated->pusch_Config->choice.setup->dmrs_UplinkForPUSCH_MappingTypeB->choice.setup->phaseTrackingRS->choice.setup->transformPrecoderDisabled->timeDensity->list.array[2],defint64val:-1,TYPE_INT64,0}, \
{GNB_CONFIG_STRING_ULPTRSREOFFSET_0,NULL,0,i64ptr:scd->uplinkConfig->uplinkBWP_ToAddModList->list.array[0]->bwp_Dedicated->pusch_Config->choice.setup->dmrs_UplinkForPUSCH_MappingTypeB->choice.setup->phaseTrackingRS->choice.setup->transformPrecoderDisabled->resourceElementOffset,defint64val:-1,TYPE_INT64,0}, \
{GNB_CONFIG_STRING_ULPTRSMAXPORTS_0,NULL,0,i64ptr:&scd->uplinkConfig->uplinkBWP_ToAddModList->list.array[0]->bwp_Dedicated->pusch_Config->choice.setup->dmrs_UplinkForPUSCH_MappingTypeB->choice.setup->phaseTrackingRS->choice.setup->transformPrecoderDisabled->maxNrofPorts,defint64val:0,TYPE_INT64,0}, \
{GNB_CONFIG_STRING_ULPTRSPOWER_0,NULL,0,i64ptr:&scd->uplinkConfig->uplinkBWP_ToAddModList->list.array[0]->bwp_Dedicated->pusch_Config->choice.setup->dmrs_UplinkForPUSCH_MappingTypeB->choice.setup->phaseTrackingRS->choice.setup->transformPrecoderDisabled->ptrs_Power,defint64val:0,TYPE_INT64,0}}
{GNB_CONFIG_STRING_ULPTRSPOWER_0,NULL,0,i64ptr:&scd->uplinkConfig->uplinkBWP_ToAddModList->list.array[0]->bwp_Dedicated->pusch_Config->choice.setup->dmrs_UplinkForPUSCH_MappingTypeB->choice.setup->phaseTrackingRS->choice.setup->transformPrecoderDisabled->ptrs_Power,defint64val:0,TYPE_INT64,0}, \
{GNB_CONFIG_STRING_FIRSTACTIVEDLBWP_ID,NULL,0,i64ptr:scd->firstActiveDownlinkBWP_Id,defint64val:1,TYPE_INT64,0}, \
{GNB_CONFIG_STRING_FIRSTACTIVEULBWP_ID,NULL,0,i64ptr:scd->uplinkConfig->firstActiveUplinkBWP_Id,defint64val:1,TYPE_INT64,0}, \
{GNB_CONFIG_STRING_DLBWP1_ID,NULL,0,i64ptr:&scd->downlinkBWP_ToAddModList->list.array[0]->bwp_Id,defint64val:1,TYPE_INT64,0}, \
{GNB_CONFIG_STRING_DLBWP2_ID,NULL,0,i64ptr:&scd->downlinkBWP_ToAddModList->list.array[1]->bwp_Id,defint64val:2,TYPE_INT64,0}, \
{GNB_CONFIG_STRING_DLBWP3_ID,NULL,0,i64ptr:&scd->downlinkBWP_ToAddModList->list.array[2]->bwp_Id,defint64val:3,TYPE_INT64,0}, \
{GNB_CONFIG_STRING_DLBWP4_ID,NULL,0,i64ptr:&scd->downlinkBWP_ToAddModList->list.array[3]->bwp_Id,defint64val:4,TYPE_INT64,0}, \
{GNB_CONFIG_STRING_SCS_DLBWP1,NULL,0,i64ptr:&scd->downlinkBWP_ToAddModList->list.array[0]->bwp_Common->genericParameters.subcarrierSpacing,defint64val:1,TYPE_INT64,0}, \
{GNB_CONFIG_STRING_SCS_DLBWP2,NULL,0,i64ptr:&scd->downlinkBWP_ToAddModList->list.array[1]->bwp_Common->genericParameters.subcarrierSpacing,defint64val:1,TYPE_INT64,0}, \
{GNB_CONFIG_STRING_SCS_DLBWP3,NULL,0,i64ptr:&scd->downlinkBWP_ToAddModList->list.array[2]->bwp_Common->genericParameters.subcarrierSpacing,defint64val:1,TYPE_INT64,0}, \
{GNB_CONFIG_STRING_SCS_DLBWP4,NULL,0,i64ptr:&scd->downlinkBWP_ToAddModList->list.array[3]->bwp_Common->genericParameters.subcarrierSpacing,defint64val:1,TYPE_INT64,0}, \
{GNB_CONFIG_STRING_LOCATIONANDBANDWIDTH_DLBWP1,NULL,0,i64ptr:&scd->downlinkBWP_ToAddModList->list.array[0]->bwp_Common->genericParameters.locationAndBandwidth,defint64val:0,TYPE_INT64,0}, \
{GNB_CONFIG_STRING_LOCATIONANDBANDWIDTH_DLBWP2,NULL,0,i64ptr:&scd->downlinkBWP_ToAddModList->list.array[1]->bwp_Common->genericParameters.locationAndBandwidth,defint64val:0,TYPE_INT64,0}, \
{GNB_CONFIG_STRING_LOCATIONANDBANDWIDTH_DLBWP3,NULL,0,i64ptr:&scd->downlinkBWP_ToAddModList->list.array[2]->bwp_Common->genericParameters.locationAndBandwidth,defint64val:0,TYPE_INT64,0}, \
{GNB_CONFIG_STRING_LOCATIONANDBANDWIDTH_DLBWP4,NULL,0,i64ptr:&scd->downlinkBWP_ToAddModList->list.array[3]->bwp_Common->genericParameters.locationAndBandwidth,defint64val:0,TYPE_INT64,0}, \
{GNB_CONFIG_STRING_ULBWP1_ID,NULL,0,i64ptr:&scd->uplinkConfig->uplinkBWP_ToAddModList->list.array[0]->bwp_Id,defint64val:1,TYPE_INT64,0}, \
{GNB_CONFIG_STRING_ULBWP2_ID,NULL,0,i64ptr:&scd->uplinkConfig->uplinkBWP_ToAddModList->list.array[1]->bwp_Id,defint64val:2,TYPE_INT64,0}, \
{GNB_CONFIG_STRING_ULBWP3_ID,NULL,0,i64ptr:&scd->uplinkConfig->uplinkBWP_ToAddModList->list.array[2]->bwp_Id,defint64val:3,TYPE_INT64,0}, \
{GNB_CONFIG_STRING_ULBWP4_ID,NULL,0,i64ptr:&scd->uplinkConfig->uplinkBWP_ToAddModList->list.array[3]->bwp_Id,defint64val:4,TYPE_INT64,0}, \
{GNB_CONFIG_STRING_SCS_ULBWP1,NULL,0,i64ptr:&scd->uplinkConfig->uplinkBWP_ToAddModList->list.array[0]->bwp_Common->genericParameters.subcarrierSpacing,defint64val:1,TYPE_INT64,0}, \
{GNB_CONFIG_STRING_SCS_ULBWP2,NULL,0,i64ptr:&scd->uplinkConfig->uplinkBWP_ToAddModList->list.array[1]->bwp_Common->genericParameters.subcarrierSpacing,defint64val:1,TYPE_INT64,0}, \
{GNB_CONFIG_STRING_SCS_ULBWP3,NULL,0,i64ptr:&scd->uplinkConfig->uplinkBWP_ToAddModList->list.array[2]->bwp_Common->genericParameters.subcarrierSpacing,defint64val:1,TYPE_INT64,0}, \
{GNB_CONFIG_STRING_SCS_ULBWP4,NULL,0,i64ptr:&scd->uplinkConfig->uplinkBWP_ToAddModList->list.array[3]->bwp_Common->genericParameters.subcarrierSpacing,defint64val:1,TYPE_INT64,0}, \
{GNB_CONFIG_STRING_LOCATIONANDBANDWIDTH_ULBWP1,NULL,0,i64ptr:&scd->uplinkConfig->uplinkBWP_ToAddModList->list.array[0]->bwp_Common->genericParameters.locationAndBandwidth,defint64val:0,TYPE_INT64,0}, \
{GNB_CONFIG_STRING_LOCATIONANDBANDWIDTH_ULBWP2,NULL,0,i64ptr:&scd->uplinkConfig->uplinkBWP_ToAddModList->list.array[1]->bwp_Common->genericParameters.locationAndBandwidth,defint64val:0,TYPE_INT64,0}, \
{GNB_CONFIG_STRING_LOCATIONANDBANDWIDTH_ULBWP3,NULL,0,i64ptr:&scd->uplinkConfig->uplinkBWP_ToAddModList->list.array[2]->bwp_Common->genericParameters.locationAndBandwidth,defint64val:0,TYPE_INT64,0}, \
{GNB_CONFIG_STRING_LOCATIONANDBANDWIDTH_ULBWP4,NULL,0,i64ptr:&scd->uplinkConfig->uplinkBWP_ToAddModList->list.array[3]->bwp_Common->genericParameters.locationAndBandwidth,defint64val:0,TYPE_INT64,0}, \
{GNB_CONFIG_STRING_DEFAULTDLBWP_ID,NULL,0,i64ptr:scd->defaultDownlinkBWP_Id,defint64val:0,TYPE_INT64,0}}
#endif
openair2/GNB_APP/gnb_config.c
+200 -147
View File
@@ -343,8 +343,10 @@ void fix_scc(NR_ServingCellConfigCommon_t *scc,uint64_t ssbmap) {
if (*scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->msg3_transformPrecoder!=0)
scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->msg3_transformPrecoder = NULL;
// prepare DL Allocation lists
nr_rrc_config_dl_tda(scc);
// Prepare PDSCH-TimeDomainResourceAllocation list
nr_rrc_config_dl_tda(scc,
scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList,
scc->downlinkConfigCommon->frequencyInfoDL->scs_SpecificCarrierList.list.array[0]->carrierBandwidth);
frame_type_t frame_type = get_frame_type((int)*scc->downlinkConfigCommon->frequencyInfoDL->frequencyBandList.list.array[0], *scc->ssbSubcarrierSpacing);
if (frame_type == FDD) {
@@ -371,157 +373,204 @@ void fix_scc(NR_ServingCellConfigCommon_t *scc,uint64_t ssbmap) {
/* Function to allocate dedicated serving cell config strutures */
void prepare_scd(NR_ServingCellConfig_t *scd) {
// Allocate downlink structures
scd->downlinkBWP_ToAddModList = CALLOC(1, sizeof(*scd->downlinkBWP_ToAddModList));
// Downlink bandwidth part
NR_BWP_Downlink_t *bwp = calloc(1, sizeof(*bwp));
bwp->bwp_Id = 1;
// Allocate downlink dedicated bandwidth part and PDSCH structures
bwp->bwp_Dedicated = calloc(1, sizeof(*bwp->bwp_Dedicated));
bwp->bwp_Dedicated->pdsch_Config = calloc(1, sizeof(*bwp->bwp_Dedicated->pdsch_Config));
bwp->bwp_Dedicated->pdsch_Config->present = NR_SetupRelease_PDSCH_Config_PR_setup;
bwp->bwp_Dedicated->pdsch_Config->choice.setup = calloc(1, sizeof(*bwp->bwp_Dedicated->pdsch_Config->choice.setup));
bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA = calloc(1, sizeof(*bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA));
bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->present = NR_SetupRelease_DMRS_DownlinkConfig_PR_setup;
// Allocate DL DMRS and PTRS configuration
bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup = calloc(1, sizeof(*bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup));
NR_DMRS_DownlinkConfig_t *NR_DMRS_DownlinkCfg = bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup;
NR_DMRS_DownlinkCfg->phaseTrackingRS=CALLOC(1, sizeof(*NR_DMRS_DownlinkCfg->phaseTrackingRS));
NR_DMRS_DownlinkCfg->phaseTrackingRS->present = NR_SetupRelease_PTRS_DownlinkConfig_PR_setup;
NR_DMRS_DownlinkCfg->phaseTrackingRS->choice.setup = CALLOC(1, sizeof(*NR_DMRS_DownlinkCfg->phaseTrackingRS->choice.setup));
NR_PTRS_DownlinkConfig_t *NR_PTRS_DownlinkCfg = NR_DMRS_DownlinkCfg->phaseTrackingRS->choice.setup;
NR_PTRS_DownlinkCfg->frequencyDensity = CALLOC(1, sizeof(*NR_PTRS_DownlinkCfg->frequencyDensity));
long *dl_rbs = CALLOC(2, sizeof(long));
for (int i=0;i<2;i++) {
ASN_SEQUENCE_ADD(&NR_PTRS_DownlinkCfg->frequencyDensity->list, &dl_rbs[i]);
}
NR_PTRS_DownlinkCfg->timeDensity = CALLOC(1, sizeof(*NR_PTRS_DownlinkCfg->timeDensity));
long *dl_mcs = CALLOC(3, sizeof(long));
for (int i=0;i<3;i++) {
ASN_SEQUENCE_ADD(&NR_PTRS_DownlinkCfg->timeDensity->list, &dl_mcs[i]);
}
NR_PTRS_DownlinkCfg->epre_Ratio = CALLOC(1, sizeof(*NR_PTRS_DownlinkCfg->epre_Ratio));
NR_PTRS_DownlinkCfg->resourceElementOffset = CALLOC(1, sizeof(*NR_PTRS_DownlinkCfg->resourceElementOffset));
*NR_PTRS_DownlinkCfg->resourceElementOffset = 0;
ASN_SEQUENCE_ADD(&scd->downlinkBWP_ToAddModList->list,bwp);
// Allocate uplink structures
scd->uplinkConfig = CALLOC(1, sizeof(*scd->uplinkConfig));
scd->uplinkConfig->uplinkBWP_ToAddModList = CALLOC(1, sizeof(*scd->uplinkConfig->uplinkBWP_ToAddModList));
scd->bwp_InactivityTimer = CALLOC(1, sizeof(*scd->bwp_InactivityTimer));
scd->uplinkConfig->firstActiveUplinkBWP_Id = CALLOC(1, sizeof(*scd->uplinkConfig->firstActiveUplinkBWP_Id));
scd->firstActiveDownlinkBWP_Id = CALLOC(1, sizeof(*scd->firstActiveDownlinkBWP_Id));
*scd->firstActiveDownlinkBWP_Id = 1;
*scd->uplinkConfig->firstActiveUplinkBWP_Id = 1;
scd->defaultDownlinkBWP_Id = CALLOC(1, sizeof(*scd->defaultDownlinkBWP_Id));
*scd->defaultDownlinkBWP_Id = 0;
NR_PUSCH_Config_t *pusch_Config = CALLOC(1, sizeof(*pusch_Config));
for (int j = 0; j < NR_MAX_NUM_BWP; j++) {
// Allocate UL DMRS and PTRS structures
pusch_Config->dmrs_UplinkForPUSCH_MappingTypeB = CALLOC(1, sizeof(*pusch_Config->dmrs_UplinkForPUSCH_MappingTypeB));
pusch_Config->dmrs_UplinkForPUSCH_MappingTypeB->present = NR_SetupRelease_DMRS_UplinkConfig_PR_setup;
pusch_Config->dmrs_UplinkForPUSCH_MappingTypeB->choice.setup = CALLOC(1, sizeof(*pusch_Config->dmrs_UplinkForPUSCH_MappingTypeB->choice.setup));
NR_DMRS_UplinkConfig_t *NR_DMRS_UplinkConfig = pusch_Config->dmrs_UplinkForPUSCH_MappingTypeB->choice.setup;
NR_DMRS_UplinkConfig->phaseTrackingRS = CALLOC(1, sizeof(*NR_DMRS_UplinkConfig->phaseTrackingRS));
NR_DMRS_UplinkConfig->phaseTrackingRS->present = NR_SetupRelease_PTRS_UplinkConfig_PR_setup;
NR_DMRS_UplinkConfig->phaseTrackingRS->choice.setup = CALLOC(1, sizeof(*NR_DMRS_UplinkConfig->phaseTrackingRS->choice.setup));
NR_PTRS_UplinkConfig_t *NR_PTRS_UplinkConfig = NR_DMRS_UplinkConfig->phaseTrackingRS->choice.setup;
NR_PTRS_UplinkConfig->transformPrecoderDisabled = CALLOC(1, sizeof(*NR_PTRS_UplinkConfig->transformPrecoderDisabled));
NR_PTRS_UplinkConfig->transformPrecoderDisabled->frequencyDensity = CALLOC(1, sizeof(*NR_PTRS_UplinkConfig->transformPrecoderDisabled->frequencyDensity));
long *n_rbs = CALLOC(2, sizeof(long));
for (int i=0;i<2;i++) {
ASN_SEQUENCE_ADD(&NR_PTRS_UplinkConfig->transformPrecoderDisabled->frequencyDensity->list, &n_rbs[i]);
// Downlink bandwidth part
NR_BWP_Downlink_t *bwp = calloc(1, sizeof(*bwp));
bwp->bwp_Id = j+1;
// Allocate downlink dedicated bandwidth part and PDSCH structures
bwp->bwp_Common = calloc(1, sizeof(*bwp->bwp_Common));
bwp->bwp_Common->pdcch_ConfigCommon = calloc(1, sizeof(*bwp->bwp_Common->pdcch_ConfigCommon));
bwp->bwp_Common->pdsch_ConfigCommon = calloc(1, sizeof(*bwp->bwp_Common->pdsch_ConfigCommon));
bwp->bwp_Dedicated = calloc(1, sizeof(*bwp->bwp_Dedicated));
bwp->bwp_Dedicated->pdsch_Config = calloc(1, sizeof(*bwp->bwp_Dedicated->pdsch_Config));
bwp->bwp_Dedicated->pdsch_Config->present = NR_SetupRelease_PDSCH_Config_PR_setup;
bwp->bwp_Dedicated->pdsch_Config->choice.setup = calloc(1, sizeof(*bwp->bwp_Dedicated->pdsch_Config->choice.setup));
bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA = calloc(1, sizeof(*bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA));
bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->present = NR_SetupRelease_DMRS_DownlinkConfig_PR_setup;
// Allocate DL DMRS and PTRS configuration
bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup = calloc(1, sizeof(*bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup));
NR_DMRS_DownlinkConfig_t *NR_DMRS_DownlinkCfg = bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup;
NR_DMRS_DownlinkCfg->phaseTrackingRS=CALLOC(1, sizeof(*NR_DMRS_DownlinkCfg->phaseTrackingRS));
NR_DMRS_DownlinkCfg->phaseTrackingRS->present = NR_SetupRelease_PTRS_DownlinkConfig_PR_setup;
NR_DMRS_DownlinkCfg->phaseTrackingRS->choice.setup = CALLOC(1, sizeof(*NR_DMRS_DownlinkCfg->phaseTrackingRS->choice.setup));
NR_PTRS_DownlinkConfig_t *NR_PTRS_DownlinkCfg = NR_DMRS_DownlinkCfg->phaseTrackingRS->choice.setup;
NR_PTRS_DownlinkCfg->frequencyDensity = CALLOC(1, sizeof(*NR_PTRS_DownlinkCfg->frequencyDensity));
long *dl_rbs = CALLOC(2, sizeof(long));
for (int i=0;i<2;i++) {
ASN_SEQUENCE_ADD(&NR_PTRS_DownlinkCfg->frequencyDensity->list, &dl_rbs[i]);
}
NR_PTRS_DownlinkCfg->timeDensity = CALLOC(1, sizeof(*NR_PTRS_DownlinkCfg->timeDensity));
long *dl_mcs = CALLOC(3, sizeof(long));
for (int i=0;i<3;i++) {
ASN_SEQUENCE_ADD(&NR_PTRS_DownlinkCfg->timeDensity->list, &dl_mcs[i]);
}
NR_PTRS_DownlinkCfg->epre_Ratio = CALLOC(1, sizeof(*NR_PTRS_DownlinkCfg->epre_Ratio));
NR_PTRS_DownlinkCfg->resourceElementOffset = CALLOC(1, sizeof(*NR_PTRS_DownlinkCfg->resourceElementOffset));
*NR_PTRS_DownlinkCfg->resourceElementOffset = 0;
ASN_SEQUENCE_ADD(&scd->downlinkBWP_ToAddModList->list,bwp);
// Allocate uplink structures
NR_PUSCH_Config_t *pusch_Config = CALLOC(1, sizeof(*pusch_Config));
// Allocate UL DMRS and PTRS structures
pusch_Config->dmrs_UplinkForPUSCH_MappingTypeB = CALLOC(1, sizeof(*pusch_Config->dmrs_UplinkForPUSCH_MappingTypeB));
pusch_Config->dmrs_UplinkForPUSCH_MappingTypeB->present = NR_SetupRelease_DMRS_UplinkConfig_PR_setup;
pusch_Config->dmrs_UplinkForPUSCH_MappingTypeB->choice.setup = CALLOC(1, sizeof(*pusch_Config->dmrs_UplinkForPUSCH_MappingTypeB->choice.setup));
NR_DMRS_UplinkConfig_t *NR_DMRS_UplinkConfig = pusch_Config->dmrs_UplinkForPUSCH_MappingTypeB->choice.setup;
NR_DMRS_UplinkConfig->phaseTrackingRS = CALLOC(1, sizeof(*NR_DMRS_UplinkConfig->phaseTrackingRS));
NR_DMRS_UplinkConfig->phaseTrackingRS->present = NR_SetupRelease_PTRS_UplinkConfig_PR_setup;
NR_DMRS_UplinkConfig->phaseTrackingRS->choice.setup = CALLOC(1, sizeof(*NR_DMRS_UplinkConfig->phaseTrackingRS->choice.setup));
NR_PTRS_UplinkConfig_t *NR_PTRS_UplinkConfig = NR_DMRS_UplinkConfig->phaseTrackingRS->choice.setup;
NR_PTRS_UplinkConfig->transformPrecoderDisabled = CALLOC(1, sizeof(*NR_PTRS_UplinkConfig->transformPrecoderDisabled));
NR_PTRS_UplinkConfig->transformPrecoderDisabled->frequencyDensity = CALLOC(1, sizeof(*NR_PTRS_UplinkConfig->transformPrecoderDisabled->frequencyDensity));
long *n_rbs = CALLOC(2, sizeof(long));
for (int i=0;i<2;i++) {
ASN_SEQUENCE_ADD(&NR_PTRS_UplinkConfig->transformPrecoderDisabled->frequencyDensity->list, &n_rbs[i]);
}
NR_PTRS_UplinkConfig->transformPrecoderDisabled->timeDensity = CALLOC(1, sizeof(*NR_PTRS_UplinkConfig->transformPrecoderDisabled->timeDensity));
long *ptrs_mcs = CALLOC(3, sizeof(long));
for (int i = 0; i < 3; i++) {
ASN_SEQUENCE_ADD(&NR_PTRS_UplinkConfig->transformPrecoderDisabled->timeDensity->list, &ptrs_mcs[i]);
}
NR_PTRS_UplinkConfig->transformPrecoderDisabled->resourceElementOffset = CALLOC(1, sizeof(*NR_PTRS_UplinkConfig->transformPrecoderDisabled->resourceElementOffset));
*NR_PTRS_UplinkConfig->transformPrecoderDisabled->resourceElementOffset = 0;
// UL bandwidth part
NR_BWP_Uplink_t *ubwp = CALLOC(1, sizeof(*ubwp));
ubwp->bwp_Id = j+1;
ubwp->bwp_Common = CALLOC(1, sizeof(*ubwp->bwp_Common));
ubwp->bwp_Dedicated = CALLOC(1, sizeof(*ubwp->bwp_Dedicated));
ubwp->bwp_Dedicated->pusch_Config = CALLOC(1, sizeof(*ubwp->bwp_Dedicated->pusch_Config));
ubwp->bwp_Dedicated->pusch_Config->present = NR_SetupRelease_PUSCH_Config_PR_setup;
ubwp->bwp_Dedicated->pusch_Config->choice.setup = pusch_Config;
ASN_SEQUENCE_ADD(&scd->uplinkConfig->uplinkBWP_ToAddModList->list,ubwp);
}
NR_PTRS_UplinkConfig->transformPrecoderDisabled->timeDensity = CALLOC(1, sizeof(*NR_PTRS_UplinkConfig->transformPrecoderDisabled->timeDensity));
long *ptrs_mcs = CALLOC(3, sizeof(long));
for (int i = 0; i < 3; i++) {
ASN_SEQUENCE_ADD(&NR_PTRS_UplinkConfig->transformPrecoderDisabled->timeDensity->list, &ptrs_mcs[i]);
}
NR_PTRS_UplinkConfig->transformPrecoderDisabled->resourceElementOffset = CALLOC(1, sizeof(*NR_PTRS_UplinkConfig->transformPrecoderDisabled->resourceElementOffset));
*NR_PTRS_UplinkConfig->transformPrecoderDisabled->resourceElementOffset = 0;
// UL bandwidth part
NR_BWP_Uplink_t *ubwp = CALLOC(1, sizeof(*ubwp));
ubwp->bwp_Id = 1;
ubwp->bwp_Dedicated = CALLOC(1, sizeof(*ubwp->bwp_Dedicated));
ubwp->bwp_Dedicated->pusch_Config = CALLOC(1, sizeof(*ubwp->bwp_Dedicated->pusch_Config));
ubwp->bwp_Dedicated->pusch_Config->present = NR_SetupRelease_PUSCH_Config_PR_setup;
ubwp->bwp_Dedicated->pusch_Config->choice.setup = pusch_Config;
ASN_SEQUENCE_ADD(&scd->uplinkConfig->uplinkBWP_ToAddModList->list,ubwp);
}
/* This function checks dedicated serving cell configuration and performs fixes as needed */
/* This function checks dedicated serving cell configuration and performs fixes as needed */
void fix_scd(NR_ServingCellConfig_t *scd) {
// Remove unused BWPs
int b = 0;
while (b<scd->downlinkBWP_ToAddModList->list.count) {
if (scd->downlinkBWP_ToAddModList->list.array[b]->bwp_Common->genericParameters.locationAndBandwidth == 0) {
asn_sequence_del(&scd->downlinkBWP_ToAddModList->list,b,1);
} else {
b++;
}
}
b = 0;
while (b<scd->uplinkConfig->uplinkBWP_ToAddModList->list.count) {
if (scd->uplinkConfig->uplinkBWP_ToAddModList->list.array[b]->bwp_Common->genericParameters.locationAndBandwidth == 0) {
asn_sequence_del(&scd->uplinkConfig->uplinkBWP_ToAddModList->list,b,1);
} else {
b++;
}
}
// Check for DL PTRS parameters validity
if (scd->downlinkBWP_ToAddModList->list.array[0]->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->phaseTrackingRS) {
// If any of the frequencyDensity values are not set or are out of bounds, PTRS is assumed to be not present
for (int i = scd->downlinkBWP_ToAddModList->list.array[0]->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->phaseTrackingRS->choice.setup->frequencyDensity->list.count-1; i >= 0; i--) {
if ((*scd->downlinkBWP_ToAddModList->list.array[0]->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->phaseTrackingRS->choice.setup->frequencyDensity->list.array[i] < 1)
|| (*scd->downlinkBWP_ToAddModList->list.array[0]->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->phaseTrackingRS->choice.setup->frequencyDensity->list.array[i] > 276)) {
LOG_I(NR_RRC, "DL PTRS frequencyDensity %d not set. Assuming PTRS not present! \n", i);
free(scd->downlinkBWP_ToAddModList->list.array[0]->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->phaseTrackingRS);
scd->downlinkBWP_ToAddModList->list.array[0]->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->phaseTrackingRS = NULL;
break;
}
}
}
if (scd->downlinkBWP_ToAddModList->list.array[0]->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->phaseTrackingRS) {
// If any of the timeDensity values are not set or are out of bounds, PTRS is assumed to be not present
for (int i = scd->downlinkBWP_ToAddModList->list.array[0]->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->phaseTrackingRS->choice.setup->timeDensity->list.count-1; i >= 0; i--) {
if ((*scd->downlinkBWP_ToAddModList->list.array[0]->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->phaseTrackingRS->choice.setup->timeDensity->list.array[i] < 0)
|| (*scd->downlinkBWP_ToAddModList->list.array[0]->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->phaseTrackingRS->choice.setup->timeDensity->list.array[i] > 29)) {
LOG_I(RRC, "DL PTRS timeDensity %d not set. Assuming PTRS not present! \n", i);
free(scd->downlinkBWP_ToAddModList->list.array[0]->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->phaseTrackingRS);
scd->downlinkBWP_ToAddModList->list.array[0]->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->phaseTrackingRS = NULL;
break;
}
}
}
if (scd->downlinkBWP_ToAddModList->list.array[0]->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->phaseTrackingRS) {
if (*scd->downlinkBWP_ToAddModList->list.array[0]->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->phaseTrackingRS->choice.setup->resourceElementOffset > 2) {
LOG_I(RRC, "Freeing DL PTRS resourceElementOffset \n");
free(scd->downlinkBWP_ToAddModList->list.array[0]->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->phaseTrackingRS->choice.setup->resourceElementOffset);
scd->downlinkBWP_ToAddModList->list.array[0]->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->phaseTrackingRS->choice.setup->resourceElementOffset = NULL;
}
if (*scd->downlinkBWP_ToAddModList->list.array[0]->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->phaseTrackingRS->choice.setup->epre_Ratio > 1) {
LOG_I(RRC, "Freeing DL PTRS epre_Ratio \n");
free(scd->downlinkBWP_ToAddModList->list.array[0]->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->phaseTrackingRS->choice.setup->epre_Ratio);
scd->downlinkBWP_ToAddModList->list.array[0]->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->phaseTrackingRS->choice.setup->epre_Ratio = NULL;
}
}
for (int bwp_i = 0 ; bwp_i<scd->downlinkBWP_ToAddModList->list.count; bwp_i++) {
if (scd->uplinkConfig->uplinkBWP_ToAddModList->list.array[0]->bwp_Dedicated->pusch_Config->choice.setup->dmrs_UplinkForPUSCH_MappingTypeB->choice.setup->phaseTrackingRS) {
// If any of the frequencyDensity values are not set or are out of bounds, PTRS is assumed to be not present
for (int i = scd->uplinkConfig->uplinkBWP_ToAddModList->list.array[0]->bwp_Dedicated->pusch_Config->choice.setup->dmrs_UplinkForPUSCH_MappingTypeB->choice.setup->phaseTrackingRS->choice.setup->transformPrecoderDisabled->frequencyDensity->list.count-1; i >= 0; i--) {
if ((*scd->uplinkConfig->uplinkBWP_ToAddModList->list.array[0]->bwp_Dedicated->pusch_Config->choice.setup->dmrs_UplinkForPUSCH_MappingTypeB->choice.setup->phaseTrackingRS->choice.setup->transformPrecoderDisabled->frequencyDensity->list.array[i] < 1)
|| (*scd->uplinkConfig->uplinkBWP_ToAddModList->list.array[0]->bwp_Dedicated->pusch_Config->choice.setup->dmrs_UplinkForPUSCH_MappingTypeB->choice.setup->phaseTrackingRS->choice.setup->transformPrecoderDisabled->frequencyDensity->list.array[i] > 276)) {
LOG_I(RRC, "UL PTRS frequencyDensity %d not set. Assuming PTRS not present! \n", i);
free(scd->uplinkConfig->uplinkBWP_ToAddModList->list.array[0]->bwp_Dedicated->pusch_Config->choice.setup->dmrs_UplinkForPUSCH_MappingTypeB->choice.setup->phaseTrackingRS);
scd->uplinkConfig->uplinkBWP_ToAddModList->list.array[0]->bwp_Dedicated->pusch_Config->choice.setup->dmrs_UplinkForPUSCH_MappingTypeB->choice.setup->phaseTrackingRS = NULL;
break;
NR_DMRS_DownlinkConfig_t *dmrs_dl_config = scd->downlinkBWP_ToAddModList->list.array[bwp_i]->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup;
if (dmrs_dl_config->phaseTrackingRS) {
// If any of the frequencyDensity values are not set or are out of bounds, PTRS is assumed to be not present
for (int i = dmrs_dl_config->phaseTrackingRS->choice.setup->frequencyDensity->list.count - 1; i >= 0; i--) {
if ((*dmrs_dl_config->phaseTrackingRS->choice.setup->frequencyDensity->list.array[i] < 1)
|| (*dmrs_dl_config->phaseTrackingRS->choice.setup->frequencyDensity->list.array[i] > 276)) {
LOG_I(GNB_APP, "DL PTRS frequencyDensity %d not set. Assuming PTRS not present! \n", i);
free(dmrs_dl_config->phaseTrackingRS);
dmrs_dl_config->phaseTrackingRS = NULL;
break;
}
}
}
if (dmrs_dl_config->phaseTrackingRS) {
// If any of the timeDensity values are not set or are out of bounds, PTRS is assumed to be not present
for (int i = dmrs_dl_config->phaseTrackingRS->choice.setup->timeDensity->list.count - 1; i >= 0; i--) {
if ((*dmrs_dl_config->phaseTrackingRS->choice.setup->timeDensity->list.array[i] < 0)
|| (*dmrs_dl_config->phaseTrackingRS->choice.setup->timeDensity->list.array[i] > 29)) {
LOG_I(GNB_APP, "DL PTRS timeDensity %d not set. Assuming PTRS not present! \n", i);
free(dmrs_dl_config->phaseTrackingRS);
dmrs_dl_config->phaseTrackingRS = NULL;
break;
}
}
}
if (dmrs_dl_config->phaseTrackingRS) {
if (*dmrs_dl_config->phaseTrackingRS->choice.setup->resourceElementOffset > 2) {
LOG_I(GNB_APP, "Freeing DL PTRS resourceElementOffset \n");
free(dmrs_dl_config->phaseTrackingRS->choice.setup->resourceElementOffset);
dmrs_dl_config->phaseTrackingRS->choice.setup->resourceElementOffset = NULL;
}
if (*dmrs_dl_config->phaseTrackingRS->choice.setup->epre_Ratio > 1) {
LOG_I(GNB_APP, "Freeing DL PTRS epre_Ratio \n");
free(dmrs_dl_config->phaseTrackingRS->choice.setup->epre_Ratio);
dmrs_dl_config->phaseTrackingRS->choice.setup->epre_Ratio = NULL;
}
}
}
if (scd->uplinkConfig->uplinkBWP_ToAddModList->list.array[0]->bwp_Dedicated->pusch_Config->choice.setup->dmrs_UplinkForPUSCH_MappingTypeB->choice.setup->phaseTrackingRS) {
// If any of the timeDensity values are not set or are out of bounds, PTRS is assumed to be not present
for (int i = scd->uplinkConfig->uplinkBWP_ToAddModList->list.array[0]->bwp_Dedicated->pusch_Config->choice.setup->dmrs_UplinkForPUSCH_MappingTypeB->choice.setup->phaseTrackingRS->choice.setup->transformPrecoderDisabled->timeDensity->list.count-1; i >= 0; i--) {
if ((*scd->uplinkConfig->uplinkBWP_ToAddModList->list.array[0]->bwp_Dedicated->pusch_Config->choice.setup->dmrs_UplinkForPUSCH_MappingTypeB->choice.setup->phaseTrackingRS->choice.setup->transformPrecoderDisabled->timeDensity->list.array[i] < 0)
|| (*scd->uplinkConfig->uplinkBWP_ToAddModList->list.array[0]->bwp_Dedicated->pusch_Config->choice.setup->dmrs_UplinkForPUSCH_MappingTypeB->choice.setup->phaseTrackingRS->choice.setup->transformPrecoderDisabled->timeDensity->list.array[i] > 29)) {
LOG_I(RRC, "UL PTRS timeDensity %d not set. Assuming PTRS not present! \n", i);
free(scd->uplinkConfig->uplinkBWP_ToAddModList->list.array[0]->bwp_Dedicated->pusch_Config->choice.setup->dmrs_UplinkForPUSCH_MappingTypeB->choice.setup->phaseTrackingRS);
scd->uplinkConfig->uplinkBWP_ToAddModList->list.array[0]->bwp_Dedicated->pusch_Config->choice.setup->dmrs_UplinkForPUSCH_MappingTypeB->choice.setup->phaseTrackingRS = NULL;
break;
// Check for UL PTRS parameters validity
for (int bwp_i = 0 ; bwp_i<scd->uplinkConfig->uplinkBWP_ToAddModList->list.count; bwp_i++) {
NR_DMRS_UplinkConfig_t *dmrs_ul_config = scd->uplinkConfig->uplinkBWP_ToAddModList->list.array[bwp_i]->bwp_Dedicated->pusch_Config->choice.setup->dmrs_UplinkForPUSCH_MappingTypeB->choice.setup;
if (dmrs_ul_config->phaseTrackingRS) {
// If any of the frequencyDensity values are not set or are out of bounds, PTRS is assumed to be not present
for (int i = dmrs_ul_config->phaseTrackingRS->choice.setup->transformPrecoderDisabled->frequencyDensity->list.count-1; i >= 0; i--) {
if ((*dmrs_ul_config->phaseTrackingRS->choice.setup->transformPrecoderDisabled->frequencyDensity->list.array[i] < 1)
|| (*dmrs_ul_config->phaseTrackingRS->choice.setup->transformPrecoderDisabled->frequencyDensity->list.array[i] > 276)) {
LOG_I(GNB_APP, "UL PTRS frequencyDensity %d not set. Assuming PTRS not present! \n", i);
free(dmrs_ul_config->phaseTrackingRS);
dmrs_ul_config->phaseTrackingRS = NULL;
break;
}
}
}
}
if (scd->uplinkConfig->uplinkBWP_ToAddModList->list.array[0]->bwp_Dedicated->pusch_Config->choice.setup->dmrs_UplinkForPUSCH_MappingTypeB->choice.setup->phaseTrackingRS) {
// Check for UL PTRS parameters validity
if (*scd->uplinkConfig->uplinkBWP_ToAddModList->list.array[0]->bwp_Dedicated->pusch_Config->choice.setup->dmrs_UplinkForPUSCH_MappingTypeB->choice.setup->phaseTrackingRS->choice.setup->transformPrecoderDisabled->resourceElementOffset > 2) {
LOG_I(RRC, "Freeing UL PTRS resourceElementOffset \n");
free(scd->uplinkConfig->uplinkBWP_ToAddModList->list.array[0]->bwp_Dedicated->pusch_Config->choice.setup->dmrs_UplinkForPUSCH_MappingTypeB->choice.setup->phaseTrackingRS->choice.setup->transformPrecoderDisabled->resourceElementOffset);
scd->uplinkConfig->uplinkBWP_ToAddModList->list.array[0]->bwp_Dedicated->pusch_Config->choice.setup->dmrs_UplinkForPUSCH_MappingTypeB->choice.setup->phaseTrackingRS->choice.setup->transformPrecoderDisabled->resourceElementOffset = NULL;
if (dmrs_ul_config->phaseTrackingRS) {
// If any of the timeDensity values are not set or are out of bounds, PTRS is assumed to be not present
for (int i = dmrs_ul_config->phaseTrackingRS->choice.setup->transformPrecoderDisabled->timeDensity->list.count-1; i >= 0; i--) {
if ((*dmrs_ul_config->phaseTrackingRS->choice.setup->transformPrecoderDisabled->timeDensity->list.array[i] < 0)
|| (*dmrs_ul_config->phaseTrackingRS->choice.setup->transformPrecoderDisabled->timeDensity->list.array[i] > 29)) {
LOG_I(GNB_APP, "UL PTRS timeDensity %d not set. Assuming PTRS not present! \n", i);
free(dmrs_ul_config->phaseTrackingRS);
dmrs_ul_config->phaseTrackingRS = NULL;
break;
}
}
}
if (dmrs_ul_config->phaseTrackingRS) {
// Check for UL PTRS parameters validity
if (*dmrs_ul_config->phaseTrackingRS->choice.setup->transformPrecoderDisabled->resourceElementOffset > 2) {
LOG_I(GNB_APP, "Freeing UL PTRS resourceElementOffset \n");
free(dmrs_ul_config->phaseTrackingRS->choice.setup->transformPrecoderDisabled->resourceElementOffset);
dmrs_ul_config->phaseTrackingRS->choice.setup->transformPrecoderDisabled->resourceElementOffset = NULL;
}
}
}
}
@@ -984,8 +1033,8 @@ void RCconfig_NRRRC(MessageDef *msg_p, uint32_t i, gNB_RRC_INST *rrc) {
prepare_scd(scd);
paramdef_t SCDsParams[] = SCDPARAMS_DESC(scd);
paramlist_def_t SCDsParamList = {GNB_CONFIG_STRING_SERVINGCELLCONFIGDEDICATED, NULL, 0};
////////// Physical parameters
////////// Physical parameters
/* get global parameters, defined outside any section in the config file */
@@ -1062,13 +1111,17 @@ void RCconfig_NRRRC(MessageDef *msg_p, uint32_t i, gNB_RRC_INST *rrc) {
if (SCDsParamList.numelt > 0) {
sprintf(aprefix, "%s.[%i].%s.[%i]", GNB_CONFIG_STRING_GNB_LIST,0,GNB_CONFIG_STRING_SERVINGCELLCONFIGDEDICATED, 0);
config_get( SCDsParams,sizeof(SCDsParams)/sizeof(paramdef_t),aprefix);
LOG_I(RRC,"Read in ServingCellConfigDedicated UL (FreqDensity_0 %d, FreqDensity_1 %d, TimeDensity_0 %d, TimeDensity_1 %d, TimeDensity_2 %d, RE offset %d \n",
LOG_I(RRC,"Read in ServingCellConfigDedicated UL (FreqDensity_0 %d, FreqDensity_1 %d, TimeDensity_0 %d, TimeDensity_1 %d, TimeDensity_2 %d, RE offset %d, First_active_BWP_ID %d SCS %d, LocationandBW %d \n",
(int)*scd->uplinkConfig->uplinkBWP_ToAddModList->list.array[0]->bwp_Dedicated->pusch_Config->choice.setup->dmrs_UplinkForPUSCH_MappingTypeB->choice.setup->phaseTrackingRS->choice.setup->transformPrecoderDisabled->frequencyDensity->list.array[0],
(int)*scd->uplinkConfig->uplinkBWP_ToAddModList->list.array[0]->bwp_Dedicated->pusch_Config->choice.setup->dmrs_UplinkForPUSCH_MappingTypeB->choice.setup->phaseTrackingRS->choice.setup->transformPrecoderDisabled->frequencyDensity->list.array[1],
(int)*scd->uplinkConfig->uplinkBWP_ToAddModList->list.array[0]->bwp_Dedicated->pusch_Config->choice.setup->dmrs_UplinkForPUSCH_MappingTypeB->choice.setup->phaseTrackingRS->choice.setup->transformPrecoderDisabled->timeDensity->list.array[0],
(int)*scd->uplinkConfig->uplinkBWP_ToAddModList->list.array[0]->bwp_Dedicated->pusch_Config->choice.setup->dmrs_UplinkForPUSCH_MappingTypeB->choice.setup->phaseTrackingRS->choice.setup->transformPrecoderDisabled->timeDensity->list.array[1],
(int)*scd->uplinkConfig->uplinkBWP_ToAddModList->list.array[0]->bwp_Dedicated->pusch_Config->choice.setup->dmrs_UplinkForPUSCH_MappingTypeB->choice.setup->phaseTrackingRS->choice.setup->transformPrecoderDisabled->timeDensity->list.array[2],
(int)*scd->uplinkConfig->uplinkBWP_ToAddModList->list.array[0]->bwp_Dedicated->pusch_Config->choice.setup->dmrs_UplinkForPUSCH_MappingTypeB->choice.setup->phaseTrackingRS->choice.setup->transformPrecoderDisabled->resourceElementOffset);
(int)*scd->uplinkConfig->uplinkBWP_ToAddModList->list.array[0]->bwp_Dedicated->pusch_Config->choice.setup->dmrs_UplinkForPUSCH_MappingTypeB->choice.setup->phaseTrackingRS->choice.setup->transformPrecoderDisabled->resourceElementOffset,
(int)*scd->firstActiveDownlinkBWP_Id,
(int)scd->downlinkBWP_ToAddModList->list.array[0]->bwp_Common->genericParameters.subcarrierSpacing,
(int)scd->downlinkBWP_ToAddModList->list.array[0]->bwp_Common->genericParameters.locationAndBandwidth
);
}
fix_scd(scd);
@@ -1171,29 +1224,29 @@ void RCconfig_NRRRC(MessageDef *msg_p, uint32_t i, gNB_RRC_INST *rrc) {
}
LOG_I(GNB_APP,"SSB SCO %d\n",*GNBParamList.paramarray[i][GNB_SSB_SUBCARRIEROFFSET_IDX].iptr);
NRRRC_CONFIGURATION_REQ (msg_p).ssb_SubcarrierOffset = *GNBParamList.paramarray[i][GNB_SSB_SUBCARRIEROFFSET_IDX].iptr;
LOG_I(RRC,"pdsch_AntennaPorts N1 %d\n",*GNBParamList.paramarray[i][GNB_PDSCH_ANTENNAPORTS_N1_IDX].iptr);
LOG_I(GNB_APP,"pdsch_AntennaPorts N1 %d\n",*GNBParamList.paramarray[i][GNB_PDSCH_ANTENNAPORTS_N1_IDX].iptr);
NRRRC_CONFIGURATION_REQ (msg_p).pdsch_AntennaPorts.N1 = *GNBParamList.paramarray[i][GNB_PDSCH_ANTENNAPORTS_N1_IDX].iptr;
LOG_I(RRC,"pdsch_AntennaPorts N2 %d\n",*GNBParamList.paramarray[i][GNB_PDSCH_ANTENNAPORTS_N2_IDX].iptr);
LOG_I(GNB_APP,"pdsch_AntennaPorts N2 %d\n",*GNBParamList.paramarray[i][GNB_PDSCH_ANTENNAPORTS_N2_IDX].iptr);
NRRRC_CONFIGURATION_REQ (msg_p).pdsch_AntennaPorts.N2 = *GNBParamList.paramarray[i][GNB_PDSCH_ANTENNAPORTS_N2_IDX].iptr;
LOG_I(RRC,"pdsch_AntennaPorts XP %d\n",*GNBParamList.paramarray[i][GNB_PDSCH_ANTENNAPORTS_XP_IDX].iptr);
LOG_I(GNB_APP,"pdsch_AntennaPorts XP %d\n",*GNBParamList.paramarray[i][GNB_PDSCH_ANTENNAPORTS_XP_IDX].iptr);
NRRRC_CONFIGURATION_REQ (msg_p).pdsch_AntennaPorts.XP = *GNBParamList.paramarray[i][GNB_PDSCH_ANTENNAPORTS_XP_IDX].iptr;
LOG_I(RRC,"pusch_AntennaPorts %d\n",*GNBParamList.paramarray[i][GNB_PUSCH_ANTENNAPORTS_IDX].iptr);
LOG_I(GNB_APP,"pusch_AntennaPorts %d\n",*GNBParamList.paramarray[i][GNB_PUSCH_ANTENNAPORTS_IDX].iptr);
NRRRC_CONFIGURATION_REQ (msg_p).pusch_AntennaPorts = *GNBParamList.paramarray[i][GNB_PUSCH_ANTENNAPORTS_IDX].iptr;
LOG_I(GNB_APP,"minTXRXTIME %d\n",*GNBParamList.paramarray[i][GNB_MINRXTXTIME_IDX].iptr);
NRRRC_CONFIGURATION_REQ (msg_p).minRXTXTIME = *GNBParamList.paramarray[i][GNB_MINRXTXTIME_IDX].iptr;
LOG_I(RRC,"SIB1 TDA %d\n",*GNBParamList.paramarray[i][GNB_SIB1_TDA_IDX].iptr);
LOG_I(GNB_APP,"SIB1 TDA %d\n",*GNBParamList.paramarray[i][GNB_SIB1_TDA_IDX].iptr);
NRRRC_CONFIGURATION_REQ (msg_p).sib1_tda = *GNBParamList.paramarray[i][GNB_SIB1_TDA_IDX].iptr;
LOG_I(GNB_APP,"Do CSI-RS %d\n",*GNBParamList.paramarray[i][GNB_DO_CSIRS_IDX].iptr);
NRRRC_CONFIGURATION_REQ (msg_p).do_CSIRS = *GNBParamList.paramarray[i][GNB_DO_CSIRS_IDX].iptr;
LOG_I(RRC, "Do SRS %d\n",*GNBParamList.paramarray[i][GNB_DO_SRS_IDX].iptr);
LOG_I(GNB_APP, "Do SRS %d\n",*GNBParamList.paramarray[i][GNB_DO_SRS_IDX].iptr);
NRRRC_CONFIGURATION_REQ (msg_p).do_SRS = *GNBParamList.paramarray[i][GNB_DO_SRS_IDX].iptr;
NRRRC_CONFIGURATION_REQ (msg_p).force_256qam_off = *GNBParamList.paramarray[i][GNB_FORCE256QAMOFF_IDX].iptr;
LOG_I(RRC, "256 QAM: %s\n", NRRRC_CONFIGURATION_REQ (msg_p).force_256qam_off ? "force off" : "may be on");
LOG_I(GNB_APP, "256 QAM: %s\n", NRRRC_CONFIGURATION_REQ (msg_p).force_256qam_off ? "force off" : "may be on");
NRRRC_CONFIGURATION_REQ (msg_p).scc = scc;
NRRRC_CONFIGURATION_REQ (msg_p).scd = scd;
NRRRC_CONFIGURATION_REQ (msg_p).enable_sdap = *GNBParamList.paramarray[i][GNB_ENABLE_SDAP_IDX].iptr;
NRRRC_CONFIGURATION_REQ (msg_p).enable_sdap = *GNBParamList.paramarray[i][GNB_ENABLE_SDAP_IDX].iptr;
LOG_I(GNB_APP, "SDAP layer is %s\n", NRRRC_CONFIGURATION_REQ (msg_p).enable_sdap ? "enabled" : "disabled");
}//
}//End for (k=0; k <num_gnbs ; k++)
memcpy(&rrc->configuration, &NRRRC_CONFIGURATION_REQ(msg_p), sizeof(NRRRC_CONFIGURATION_REQ(msg_p)));
openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.c
+44 -11
View File
@@ -33,6 +33,7 @@
#include "LAYER2/NR_MAC_gNB/mac_proto.h"
#include "common/utils/nr/nr_common.h"
#include <limits.h>
#include <executables/softmodem-common.h>
#define reserved 0xffff
@@ -2590,6 +2591,30 @@ uint8_t get_transformPrecoding(const NR_BWP_UplinkCommon_t *initialUplinkBWP,
return -1;
}
uint8_t get_pusch_nb_antenna_ports(NR_PUSCH_Config_t *pusch_Config,
NR_SRS_Config_t *srs_config,
dci_field_t srs_resource_indicator) {
uint8_t n_antenna_port = 1;
if (get_softmodem_params()->phy_test == 1) {
// temporary hack to allow UL-MIMO in phy-test mode without SRS
n_antenna_port = *pusch_Config->maxRank;
}
else {
if(srs_config != NULL && srs_resource_indicator.nbits > 0) {
for(int rs = 0; rs < srs_config->srs_ResourceSetToAddModList->list.count; rs++) {
NR_SRS_ResourceSet_t *srs_resource_set = srs_config->srs_ResourceSetToAddModList->list.array[rs];
if(srs_resource_set->usage == NR_SRS_ResourceSet__usage_codebook) {
NR_SRS_Resource_t *srs_resource = srs_config->srs_ResourceToAddModList->list.array[srs_resource_indicator.val];
AssertFatal(srs_resource != NULL,"SRS resource indicated by DCI does not exist\n");
n_antenna_port = 1<<srs_resource->nrofSRS_Ports;
}
}
}
}
return n_antenna_port;
}
uint16_t nr_dci_size(const NR_BWP_DownlinkCommon_t *initialDownlinkBWP,
const NR_BWP_UplinkCommon_t *initialUplinkBWP,
const NR_CellGroupConfig_t *cg,
@@ -2598,23 +2623,23 @@ uint16_t nr_dci_size(const NR_BWP_DownlinkCommon_t *initialDownlinkBWP,
nr_rnti_type_t rnti_type,
uint16_t N_RB,
int bwp_id,
NR_ControlResourceSetId_t coreset_id,
uint16_t cset0_bwp_size) {
uint16_t size = 0;
uint16_t numRBG = 0;
long rbg_size_config;
int num_entries = 0;
int pusch_antenna_ports = 1; // TODO hardcoded number of antenna ports for pusch
const NR_BWP_DownlinkDedicated_t *bwpd = NULL;
const NR_BWP_UplinkDedicated_t *ubwpd = NULL;
const NR_BWP_DownlinkCommon_t *bwpc = NULL;
const NR_BWP_UplinkCommon_t *ubwpc = NULL;
const NR_PDSCH_Config_t *pdsch_Config = NULL;
const NR_PUSCH_Config_t *pusch_Config = NULL;
const NR_PUCCH_Config_t *pucch_Config = NULL;
const NR_PDCCH_Config_t *pdcch_Config = NULL;
const NR_SRS_Config_t *srs_config = NULL;
NR_PDSCH_Config_t *pdsch_Config = NULL;
NR_PUSCH_Config_t *pusch_Config = NULL;
NR_PUCCH_Config_t *pucch_Config = NULL;
NR_PDCCH_Config_t *pdcch_Config = NULL;
NR_SRS_Config_t *srs_config = NULL;
if(bwp_id > 0) {
AssertFatal(cg!=NULL,"Cellgroup is null and bwp_id!=0");
bwpd=cg->spCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList->list.array[bwp_id-1]->bwp_Dedicated;
@@ -2648,7 +2673,7 @@ uint16_t nr_dci_size(const NR_BWP_DownlinkCommon_t *initialDownlinkBWP,
/// fixed: Format identifier 1, Hop flag 1, MCS 5, NDI 1, RV 2, HARQ PID 4, PUSCH TPC 2 Time Domain assgnmt 4 --20
size += 20;
size += (uint8_t)ceil( log2( (N_RB*(N_RB+1))>>1 ) ); // Freq domain assignment -- hopping scenario to be updated
int dci_10_size = nr_dci_size(initialDownlinkBWP,initialUplinkBWP,cg,dci_pdu,NR_DL_DCI_FORMAT_1_0, rnti_type, N_RB, bwp_id, cset0_bwp_size);
int dci_10_size = nr_dci_size(initialDownlinkBWP,initialUplinkBWP,cg,dci_pdu,NR_DL_DCI_FORMAT_1_0, rnti_type, N_RB, bwp_id, coreset_id, cset0_bwp_size);
AssertFatal(dci_10_size >= size, "NR_UL_DCI_FORMAT_0_0 size is bigger than NR_DL_DCI_FORMAT_1_0! 3GPP TS 38.212 Section 7.3.1.0: DCI size alignment is not fully implemented");
size += dci_10_size - size; // Padding to match 1_0 size
// UL/SUL indicator assumed to be 0
@@ -2773,6 +2798,9 @@ uint16_t nr_dci_size(const NR_BWP_DownlinkCommon_t *initialDownlinkBWP,
LOG_D(NR_MAC,"dci_pdu->srs_resource_indicator.nbits %d\n",dci_pdu->srs_resource_indicator.nbits);
// Precoding info and number of layers
long transformPrecoder = get_transformPrecoding(initialUplinkBWP, pusch_Config, ubwpd, (uint8_t*)&format, rnti_type, 0);
uint8_t pusch_antenna_ports = get_pusch_nb_antenna_ports(pusch_Config, srs_config, dci_pdu->srs_resource_indicator);
dci_pdu->precoding_information.nbits=0;
if (pusch_Config &&
pusch_Config->txConfig != NULL){
@@ -2992,10 +3020,15 @@ uint16_t nr_dci_size(const NR_BWP_DownlinkCommon_t *initialDownlinkBWP,
size += dci_pdu->antenna_ports.nbits;
LOG_D(NR_MAC,"dci_pdu->antenna_ports.nbits %d\n",dci_pdu->antenna_ports.nbits);
// Tx Config Indication
long *isTciEnable = pdcch_Config->controlResourceSetToAddModList->list.array[0]->tci_PresentInDCI;
if (isTciEnable != NULL) {
dci_pdu->transmission_configuration_indication.nbits = 3;
size += dci_pdu->transmission_configuration_indication.nbits;
for (int i = 0; i < pdcch_Config->controlResourceSetToAddModList->list.count; i++) {
if (pdcch_Config->controlResourceSetToAddModList->list.array[i]->controlResourceSetId == coreset_id) {
long *isTciEnable = pdcch_Config->controlResourceSetToAddModList->list.array[i]->tci_PresentInDCI;
if (isTciEnable != NULL) {
dci_pdu->transmission_configuration_indication.nbits = 3;
size += dci_pdu->transmission_configuration_indication.nbits;
}
break;
}
}
// SRS request
if (cg->spCellConfig->spCellConfigDedicated->supplementaryUplink==NULL)
openair2/LAYER2/NR_MAC_COMMON/nr_mac_common.h
+5
View File
@@ -55,6 +55,7 @@ uint16_t nr_dci_size(const NR_BWP_DownlinkCommon_t *initialDLBWP,
nr_rnti_type_t rnti_type,
uint16_t N_RB,
int bwp_id,
NR_ControlResourceSetId_t coreset_id,
uint16_t cset0_bwp_size);
void find_aggregation_candidates(uint8_t *aggregation_level,
@@ -155,6 +156,10 @@ void get_info_from_tda_tables(int default_abc,
void fill_coresetZero(NR_ControlResourceSet_t *coreset0, NR_Type0_PDCCH_CSS_config_t *type0_PDCCH_CSS_config);
void fill_searchSpaceZero(NR_SearchSpace_t *ss0, NR_Type0_PDCCH_CSS_config_t *type0_PDCCH_CSS_config);
uint8_t get_pusch_nb_antenna_ports(NR_PUSCH_Config_t *pusch_Config,
NR_SRS_Config_t *srs_config,
dci_field_t srs_resource_indicator);
uint16_t compute_pucch_prb_size(uint8_t format,
uint8_t nr_prbs,
uint16_t O_tot,
openair2/LAYER2/NR_MAC_UE/config_ue.c
+65 -46
View File
@@ -434,19 +434,24 @@ void config_bwp_ue(NR_UE_MAC_INST_t *mac, uint16_t *bwp_ind, uint8_t *dci_format
NR_ServingCellConfig_t *scd = mac->cg->spCellConfig->spCellConfigDedicated;
if (bwp_ind && dci_format){
int n_ubwp = 0;
if (scd && scd->uplinkConfig &&
scd->uplinkConfig->uplinkBWP_ToAddModList)
n_ubwp = scd->uplinkConfig->uplinkBWP_ToAddModList->list.count;
if (bwp_ind && dci_format){
switch(*dci_format){
case NR_UL_DCI_FORMAT_0_1:
mac->UL_BWP_Id = *bwp_ind;
mac->UL_BWP_Id = n_ubwp < 4 ? *bwp_ind : *bwp_ind + 1;
break;
case NR_DL_DCI_FORMAT_1_1:
mac->DL_BWP_Id = *bwp_ind;
mac->DL_BWP_Id = n_ubwp < 4 ? *bwp_ind : *bwp_ind + 1;
break;
default:
LOG_E(MAC, "In %s: failed to configure BWP Id from DCI with format %d \n", __FUNCTION__, *dci_format);
}
// configure ss coreset after switching BWP
configure_ss_coreset(mac, scd, mac->DL_BWP_Id);
} else {
if (scd->firstActiveDownlinkBWP_Id)
@@ -474,82 +479,96 @@ void config_bwp_ue(NR_UE_MAC_INST_t *mac, uint16_t *bwp_ind, uint8_t *dci_format
*/
void config_control_ue(NR_UE_MAC_INST_t *mac){
uint8_t coreset_id = 1, ss_id;
NR_BWP_Id_t dl_bwp_id = mac->DL_BWP_Id;
NR_BWP_Id_t ul_bwp_id = mac->UL_BWP_Id;
int bwp_id;
NR_ServingCellConfig_t *scd = mac->cg->spCellConfig->spCellConfigDedicated;
if (dl_bwp_id==0) AssertFatal(mac->scc_SIB,"dl_bwp_id 0 (DL %d,UL %d) means mac->scc_SIB should exist here!\n",(int)mac->DL_BWP_Id,(int)mac->UL_BWP_Id);
NR_BWP_DownlinkCommon_t *bwp_Common = dl_bwp_id>0 ? scd->downlinkBWP_ToAddModList->list.array[dl_bwp_id - 1]->bwp_Common :
&mac->scc_SIB->downlinkConfigCommon.initialDownlinkBWP;
config_bwp_ue(mac, NULL, NULL);
NR_BWP_Id_t dl_bwp_id = mac->DL_BWP_Id;
if (dl_bwp_id > 0 ) {
AssertFatal(scd->downlinkBWP_ToAddModList != NULL, "downlinkBWP_ToAddModList is null\n");
AssertFatal(scd->downlinkBWP_ToAddModList->list.count == 1, "downlinkBWP_ToAddModList->list->count is %d\n", scd->downlinkBWP_ToAddModList->list.count);
// configure DLbwp
if (scd->downlinkBWP_ToAddModList) {
for (int i = 0; i < scd->downlinkBWP_ToAddModList->list.count; i++) {
bwp_id = scd->downlinkBWP_ToAddModList->list.array[i]->bwp_Id;
mac->DLbwp[bwp_id-1] = scd->downlinkBWP_ToAddModList->list.array[i];
}
}
// configure ULbwp
if (scd->uplinkConfig->uplinkBWP_ToAddModList) {
for (int i = 0; i < scd->uplinkConfig->uplinkBWP_ToAddModList->list.count; i++) {
bwp_id = scd->uplinkConfig->uplinkBWP_ToAddModList->list.array[i]->bwp_Id;
mac->ULbwp[bwp_id-1] = scd->uplinkConfig->uplinkBWP_ToAddModList->list.array[i];
}
}
configure_ss_coreset(mac, scd, dl_bwp_id);
}
void configure_ss_coreset(NR_UE_MAC_INST_t *mac,
NR_ServingCellConfig_t *scd,
NR_BWP_Id_t dl_bwp_id) {
NR_BWP_DownlinkCommon_t *bwp_Common = get_bwp_downlink_common(mac, dl_bwp_id);
AssertFatal(bwp_Common != NULL, "bwp_Common is null\n");
NR_SetupRelease_PDCCH_ConfigCommon_t *pdcch_ConfigCommon = bwp_Common->pdcch_ConfigCommon;
AssertFatal(pdcch_ConfigCommon != NULL, "pdcch_ConfigCommon is null\n");
// configuring eventual common coreset
NR_ControlResourceSet_t *coreset = pdcch_ConfigCommon->choice.setup->commonControlResourceSet;
if (coreset)
mac->coreset[dl_bwp_id][coreset->controlResourceSetId - 1] = coreset;
NR_BWP_DownlinkDedicated_t *dl_bwp_Dedicated = dl_bwp_id>0 ? scd->downlinkBWP_ToAddModList->list.array[dl_bwp_id - 1]->bwp_Dedicated:
scd->initialDownlinkBWP;
AssertFatal(dl_bwp_Dedicated != NULL, "dl_bwp_Dedicated is null\n");
config_bwp_ue(mac, NULL, NULL);
NR_SetupRelease_PDCCH_Config_t *pdcch_Config = dl_bwp_Dedicated->pdcch_Config;
AssertFatal(pdcch_Config != NULL, "pdcch_Config is null\n");
NR_SetupRelease_PDCCH_ConfigCommon_t *pdcch_ConfigCommon = bwp_Common->pdcch_ConfigCommon;
AssertFatal(pdcch_ConfigCommon != NULL, "pdcch_ConfigCommon is null\n");
AssertFatal(pdcch_ConfigCommon->choice.setup->ra_SearchSpace != NULL, "ra_SearchSpace must be available in DL BWP\n");
struct NR_PDCCH_ConfigCommon__commonSearchSpaceList *commonSearchSpaceList = pdcch_ConfigCommon->choice.setup->commonSearchSpaceList;
AssertFatal(commonSearchSpaceList != NULL, "commonSearchSpaceList is null\n");
AssertFatal(commonSearchSpaceList->list.count > 0, "PDCCH CSS list has 0 elements\n");
struct NR_PDCCH_Config__controlResourceSetToAddModList *controlResourceSetToAddModList = pdcch_Config->choice.setup->controlResourceSetToAddModList;
AssertFatal(controlResourceSetToAddModList != NULL, "controlResourceSetToAddModList is null\n");
AssertFatal(controlResourceSetToAddModList->list.count == 1, "controlResourceSetToAddModList->list.count=%d\n", controlResourceSetToAddModList->list.count);
AssertFatal(controlResourceSetToAddModList->list.array[0] != NULL, "coreset[0][0] is null\n");
// configuring dedicated coreset
// In case network reconfigures control resource set with the same ControlResourceSetId as used for commonControlResourceSet configured via PDCCH-ConfigCommon,
// the configuration from PDCCH-Config always takes precedence
for (int i=0; i<controlResourceSetToAddModList->list.count; i++) {
coreset = controlResourceSetToAddModList->list.array[i];
mac->coreset[dl_bwp_id][coreset->controlResourceSetId - 1] = coreset;
}
struct NR_PDCCH_Config__searchSpacesToAddModList *searchSpacesToAddModList = pdcch_Config->choice.setup->searchSpacesToAddModList;
AssertFatal(searchSpacesToAddModList != NULL, "searchSpacesToAddModList is null\n");
AssertFatal(searchSpacesToAddModList->list.count > 0, "list of UE specifically configured Search Spaces is empty\n");
AssertFatal(searchSpacesToAddModList->list.count < FAPI_NR_MAX_SS, "too many searchpaces per coreset %d\n", searchSpacesToAddModList->list.count);
struct NR_UplinkConfig__uplinkBWP_ToAddModList *uplinkBWP_ToAddModList = scd->uplinkConfig->uplinkBWP_ToAddModList;
if (ul_bwp_id > 0) {
AssertFatal(uplinkBWP_ToAddModList != NULL, "uplinkBWP_ToAddModList is null\n");
AssertFatal(uplinkBWP_ToAddModList->list.count == 1, "uplinkBWP_ToAddModList->list->count is %d\n", uplinkBWP_ToAddModList->list.count);
}
// check pdcch_Config, pdcch_ConfigCommon and DL BWP
mac->DLbwp[0] = dl_bwp_id>0?scd->downlinkBWP_ToAddModList->list.array[dl_bwp_id - 1]:NULL;
mac->coreset[dl_bwp_id][coreset_id - 1] = controlResourceSetToAddModList->list.array[0];
// Check dedicated UL BWP and pass to MAC
mac->ULbwp[0] = ul_bwp_id>0?uplinkBWP_ToAddModList->list.array[0]:NULL;
if (mac->ULbwp[0]) AssertFatal(mac->ULbwp[0]->bwp_Dedicated != NULL, "UL bwp_Dedicated is null\n");
AssertFatal(searchSpacesToAddModList->list.count < FAPI_NR_MAX_SS_PER_BWP, "too many searchpaces per coreset %d\n", searchSpacesToAddModList->list.count);
// check available Search Spaces in the searchSpacesToAddModList and pass to MAC
// note: the network configures at most 10 Search Spaces per BWP per cell (including UE-specific and common Search Spaces).
for (ss_id = 0; ss_id < searchSpacesToAddModList->list.count; ss_id++) {
for (int ss_id = 0; ss_id < searchSpacesToAddModList->list.count; ss_id++) {
NR_SearchSpace_t *ss = searchSpacesToAddModList->list.array[ss_id];
AssertFatal(ss->controlResourceSetId != NULL, "ss->controlResourceSetId is null\n");
AssertFatal(ss->searchSpaceType != NULL, "ss->searchSpaceType is null\n");
AssertFatal(*ss->controlResourceSetId == mac->coreset[dl_bwp_id][coreset_id - 1]->controlResourceSetId, "ss->controlResourceSetId is unknown\n");
AssertFatal(ss->monitoringSymbolsWithinSlot != NULL, "NR_SearchSpace->monitoringSymbolsWithinSlot is null\n");
AssertFatal(ss->monitoringSymbolsWithinSlot->buf != NULL, "NR_SearchSpace->monitoringSymbolsWithinSlot->buf is null\n");
mac->SSpace[dl_bwp_id][ss_id] = ss;
AssertFatal(ss->searchSpaceId <= FAPI_NR_MAX_SS, "Invalid searchSpaceId\n");
mac->SSpace[dl_bwp_id][ss->searchSpaceId - 1] = ss;
}
struct NR_PDCCH_ConfigCommon__commonSearchSpaceList *commonSearchSpaceList = pdcch_ConfigCommon->choice.setup->commonSearchSpaceList;
AssertFatal(commonSearchSpaceList != NULL, "commonSearchSpaceList is null\n");
AssertFatal(commonSearchSpaceList->list.count > 0, "PDCCH CSS list has 0 elements\n");
// Check available CSSs in the commonSearchSpaceList (list of additional common search spaces)
// note: commonSearchSpaceList SIZE(1..4)
for (int css_id = 0; css_id < commonSearchSpaceList->list.count; css_id++) {
NR_SearchSpace_t *css = commonSearchSpaceList->list.array[css_id];
AssertFatal(css->controlResourceSetId != NULL, "ss->controlResourceSetId is null\n");
AssertFatal(*css->controlResourceSetId == 0 || *css->controlResourceSetId == mac->coreset[dl_bwp_id][coreset_id - 1]->controlResourceSetId, "css->controlResourceSetId %ld is unknown, mac->coreset[%ld][%d]->controlResourceSetId %ld\n",*css->controlResourceSetId,dl_bwp_id,coreset_id-1,mac->coreset[dl_bwp_id][coreset_id - 1]->controlResourceSetId);
AssertFatal(css->searchSpaceType != NULL, "css->searchSpaceType is null\n");
AssertFatal(css->monitoringSymbolsWithinSlot != NULL, "css->monitoringSymbolsWithinSlot is null\n");
AssertFatal(css->monitoringSymbolsWithinSlot->buf != NULL, "css->monitoringSymbolsWithinSlot->buf is null\n");
mac->SSpace[dl_bwp_id][ss_id] = css;
ss_id++;
AssertFatal(css->searchSpaceId <= FAPI_NR_MAX_SS, "Invalid searchSpaceId\n");
mac->SSpace[dl_bwp_id][css->searchSpaceId - 1] = css;
}
}
openair2/LAYER2/NR_MAC_UE/mac_defs.h
+5 -5
View File
@@ -74,7 +74,7 @@
// ==========
#define NB_NR_UE_MAC_INST 1
#define MAX_NUM_BWP 2
#define MAX_NUM_BWP_UE 4
#define NUM_SLOT_FRAME 10
/*!\brief value for indicating BSR Timer is not running */
@@ -364,10 +364,10 @@ typedef struct {
NR_RNTI_Value_t *cs_RNTI;
NR_MIB_t *mib;
NR_BWP_Downlink_t *DLbwp[MAX_NUM_BWP];
NR_BWP_Uplink_t *ULbwp[MAX_NUM_BWP];
NR_ControlResourceSet_t *coreset[MAX_NUM_BWP][FAPI_NR_MAX_CORESET_PER_BWP];
NR_SearchSpace_t *SSpace[MAX_NUM_BWP][FAPI_NR_MAX_SS];
NR_BWP_Downlink_t *DLbwp[MAX_NUM_BWP_UE];
NR_BWP_Uplink_t *ULbwp[MAX_NUM_BWP_UE];
NR_ControlResourceSet_t *coreset[MAX_NUM_BWP_UE][FAPI_NR_MAX_CORESET_PER_BWP];
NR_SearchSpace_t *SSpace[MAX_NUM_BWP_UE][FAPI_NR_MAX_SS];
frame_type_t frame_type;
openair2/LAYER2/NR_MAC_UE/mac_proto.h
+6
View File
@@ -260,6 +260,8 @@ void get_bwp_info(NR_UE_MAC_INST_t *mac,
NR_BWP_UplinkDedicated_t **ubwpd,
NR_BWP_UplinkCommon_t **ubwpc);
NR_BWP_DownlinkCommon_t *get_bwp_downlink_common(NR_UE_MAC_INST_t *mac, NR_BWP_Id_t dl_bwp_id);
uint8_t nr_extract_dci_info(NR_UE_MAC_INST_t *mac,
uint8_t dci_format,
uint8_t dci_length,
@@ -452,6 +454,10 @@ void build_ssb_to_ro_map(NR_UE_MAC_INST_t *mac);
void config_bwp_ue(NR_UE_MAC_INST_t *mac, uint16_t *bwp_ind, uint8_t *dci_format);
void configure_ss_coreset(NR_UE_MAC_INST_t *mac,
NR_ServingCellConfig_t *scd,
NR_BWP_Id_t dl_bwp_id);
fapi_nr_ul_config_request_t *get_ul_config_request(NR_UE_MAC_INST_t *mac, int slot);
void fill_ul_config(fapi_nr_ul_config_request_t *ul_config, frame_t frame_tx, int slot_tx, uint8_t pdu_type);
openair2/LAYER2/NR_MAC_UE/nr_ra_procedures.c
+7 -5
View File
@@ -94,10 +94,12 @@ void init_RA(module_id_t mod_id,
}
}
if (ss_id < 0) {
ra_ss = mac->DLbwp[0]->bwp_Common->pdcch_ConfigCommon->choice.setup->ra_SearchSpace;
if (ra_ss) {
commonSearchSpaceList = mac->DLbwp[0]->bwp_Common->pdcch_ConfigCommon->choice.setup->commonSearchSpaceList;
ss_id = *mac->DLbwp[0]->bwp_Common->pdcch_ConfigCommon->choice.setup->ra_SearchSpace;
if (mac->DL_BWP_Id>0) {
ra_ss = mac->DLbwp[mac->DL_BWP_Id-1]->bwp_Common->pdcch_ConfigCommon->choice.setup->ra_SearchSpace;
if (ra_ss) {
commonSearchSpaceList = mac->DLbwp[mac->DL_BWP_Id-1]->bwp_Common->pdcch_ConfigCommon->choice.setup->commonSearchSpaceList;
ss_id = *mac->DLbwp[mac->DL_BWP_Id-1]->bwp_Common->pdcch_ConfigCommon->choice.setup->ra_SearchSpace;
}
}
}
}
@@ -743,7 +745,7 @@ uint8_t nr_ue_get_rach(NR_PRACH_RESOURCES_t *prach_resources,
} else if (get_softmodem_params()->nsa) {
uint8_t mac_sdus[MAX_NR_ULSCH_PAYLOAD_BYTES];
uint8_t mac_sdus[MAX_NUM_NR_ULSCH_SEGMENTS_PER_LAYER*1056];
uint16_t sdu_lengths[NB_RB_MAX] = {0};
int TBS_bytes = 848;
int mac_ce_len = 0;
openair2/LAYER2/NR_MAC_UE/nr_ue_dci_configuration.c
+24 -43
View File
@@ -80,7 +80,7 @@ void config_dci_pdu(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_dci_dl_pdu_rel15_t
AssertFatal(mac->scc == NULL || mac->scc_SIB == NULL, "both scc and scc_SIB cannot be non-null\n");
NR_BWP_Id_t bwp_id = mac->DL_BWP_Id;
NR_BWP_Id_t dl_bwp_id = mac->DL_BWP_Id;
NR_ServingCellConfigCommon_t *scc = mac->scc;
NR_ServingCellConfigCommonSIB_t *scc_SIB = mac->scc_SIB;
NR_BWP_DownlinkCommon_t *bwp_Common=NULL;
@@ -91,7 +91,7 @@ void config_dci_pdu(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_dci_dl_pdu_rel15_t
initialDownlinkBWP = scc!=NULL ? scc->downlinkConfigCommon->initialDownlinkBWP : &scc_SIB->downlinkConfigCommon.initialDownlinkBWP;
initialUplinkBWP = scc!=NULL ? scc->uplinkConfigCommon->initialUplinkBWP : &scc_SIB->uplinkConfigCommon->initialUplinkBWP;
}
bwp_Common = bwp_id>0 ? mac->DLbwp[bwp_id-1]->bwp_Common : NULL;
bwp_Common = dl_bwp_id>0 ? mac->DLbwp[dl_bwp_id-1]->bwp_Common : NULL;
NR_SearchSpace_t *ss;
NR_ControlResourceSet_t *coreset;
@@ -102,7 +102,7 @@ void config_dci_pdu(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_dci_dl_pdu_rel15_t
ss_id,mac->ra.ss->searchSpaceId);
}
else
ss = mac->SSpace[bwp_id][ss_id];
ss = mac->SSpace[dl_bwp_id][ss_id-1];
}
else
ss = mac->search_space_zero;
@@ -110,7 +110,7 @@ void config_dci_pdu(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_dci_dl_pdu_rel15_t
uint8_t coreset_id = *ss->controlResourceSetId;
if(coreset_id>0) {
coreset = mac->coreset[bwp_id][coreset_id - 1];
coreset = mac->coreset[dl_bwp_id][coreset_id - 1];
rel15->coreset.CoreSetType = NFAPI_NR_CSET_CONFIG_PDCCH_CONFIG;
} else {
coreset = mac->coreset0;
@@ -169,7 +169,7 @@ void config_dci_pdu(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_dci_dl_pdu_rel15_t
rel15->SubcarrierSpacing = bwp_Common->genericParameters.subcarrierSpacing;
}
for (int i = 0; i < rel15->num_dci_options; i++) {
rel15->dci_length_options[i] = nr_dci_size(initialDownlinkBWP,initialUplinkBWP, mac->cg, &mac->def_dci_pdu_rel15[rel15->dci_format_options[i]], rel15->dci_format_options[i], NR_RNTI_C, rel15->BWPSize, bwp_id, mac->type0_PDCCH_CSS_config.num_rbs);
rel15->dci_length_options[i] = nr_dci_size(initialDownlinkBWP,initialUplinkBWP, mac->cg, &mac->def_dci_pdu_rel15[rel15->dci_format_options[i]], rel15->dci_format_options[i], NR_RNTI_C, rel15->BWPSize, dl_bwp_id, coreset_id, mac->type0_PDCCH_CSS_config.num_rbs);
}
break;
case NR_RNTI_RA:
@@ -185,7 +185,7 @@ void config_dci_pdu(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_dci_dl_pdu_rel15_t
rel15->BWPStart = NRRIV2PRBOFFSET(bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
}
rel15->SubcarrierSpacing = initialDownlinkBWP->genericParameters.subcarrierSpacing;
rel15->dci_length_options[0] = nr_dci_size(initialDownlinkBWP,initialUplinkBWP, mac->cg, &mac->def_dci_pdu_rel15[rel15->dci_format_options[0]], rel15->dci_format_options[0], NR_RNTI_RA, rel15->BWPSize, bwp_id, mac->type0_PDCCH_CSS_config.num_rbs);
rel15->dci_length_options[0] = nr_dci_size(initialDownlinkBWP,initialUplinkBWP, mac->cg, &mac->def_dci_pdu_rel15[rel15->dci_format_options[0]], rel15->dci_format_options[0], NR_RNTI_RA, rel15->BWPSize, dl_bwp_id, coreset_id, mac->type0_PDCCH_CSS_config.num_rbs);
break;
case NR_RNTI_P:
break;
@@ -200,7 +200,7 @@ void config_dci_pdu(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_dci_dl_pdu_rel15_t
rel15->BWPStart = mac->type0_PDCCH_CSS_config.cset_start_rb;
rel15->SubcarrierSpacing = initialDownlinkBWP->genericParameters.subcarrierSpacing;
for (int i = 0; i < rel15->num_dci_options; i++) {
rel15->dci_length_options[i] = nr_dci_size(initialDownlinkBWP,initialUplinkBWP, mac->cg, &mac->def_dci_pdu_rel15[rel15->dci_format_options[i]], rel15->dci_format_options[i], NR_RNTI_TC, rel15->BWPSize, bwp_id, mac->type0_PDCCH_CSS_config.num_rbs);
rel15->dci_length_options[i] = nr_dci_size(initialDownlinkBWP,initialUplinkBWP, mac->cg, &mac->def_dci_pdu_rel15[rel15->dci_format_options[i]], rel15->dci_format_options[i], NR_RNTI_TC, rel15->BWPSize, dl_bwp_id, coreset_id, mac->type0_PDCCH_CSS_config.num_rbs);
}
break;
case NR_RNTI_SP_CSI:
@@ -223,7 +223,7 @@ void config_dci_pdu(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_dci_dl_pdu_rel15_t
rel15->SubcarrierSpacing = mac->mib->subCarrierSpacingCommon + 2;
for (int i = 0; i < rel15->num_dci_options; i++) {
rel15->dci_length_options[i] = nr_dci_size(initialDownlinkBWP,initialUplinkBWP, mac->cg, &mac->def_dci_pdu_rel15[rel15->dci_format_options[i]], rel15->dci_format_options[i], NR_RNTI_SI, rel15->BWPSize, 0, mac->type0_PDCCH_CSS_config.num_rbs);
rel15->dci_length_options[i] = nr_dci_size(initialDownlinkBWP,initialUplinkBWP, mac->cg, &mac->def_dci_pdu_rel15[rel15->dci_format_options[i]], rel15->dci_format_options[i], NR_RNTI_SI, rel15->BWPSize, 0, coreset_id, mac->type0_PDCCH_CSS_config.num_rbs);
}
break;
case NR_RNTI_SFI:
@@ -273,11 +273,17 @@ void ue_dci_configuration(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_request_t *dl
LOG_D(NR_MAC, "[DCI_CONFIG] ra_rnti %p (%x) crnti %p (%x) t_crnti %p (%x)\n", &ra->ra_rnti, ra->ra_rnti, &mac->crnti, mac->crnti, &ra->t_crnti, ra->t_crnti);
// loop over all available SS for CORESET ID 1
// loop over all available SS for bwp_id
if (bwpd) {
for (ss_id = 0; ss_id < FAPI_NR_MAX_SS && mac->SSpace[bwp_id][ss_id] != NULL; ss_id++){
for (ss_id = 1; ss_id <= FAPI_NR_MAX_SS; ss_id++){
if(mac->SSpace[bwp_id][ss_id-1]==NULL) {
continue;
}
LOG_D(NR_MAC, "[DCI_CONFIG] ss_id %d\n",ss_id);
NR_SearchSpace_t *ss = mac->SSpace[bwp_id][ss_id];
NR_SearchSpace_t *ss = mac->SSpace[bwp_id][ss_id-1];
AssertFatal(ss_id == ss->searchSpaceId,"SS IDs don't correspond\n");
fapi_nr_dl_config_dci_dl_pdu_rel15_t *rel15 = &dl_config->dl_config_list[dl_config->number_pdus].dci_config_pdu.dci_config_rel15;
NR_SetupRelease_PDCCH_ConfigCommon_t *pdcch_ConfigCommon = bwp_Common->pdcch_ConfigCommon;
struct NR_PhysicalCellGroupConfig *phy_cgc = mac->cg->physicalCellGroupConfig;
@@ -285,15 +291,6 @@ void ue_dci_configuration(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_request_t *dl
case NR_SearchSpace__searchSpaceType_PR_common:
// this is for CSSs, we use BWP common and pdcch_ConfigCommon
// Fetch configuration for searchSpaceZero
// note: The search space with the SearchSpaceId = 0 identifies the search space configured via PBCH (MIB) and in ServingCellConfigCommon (searchSpaceZero).
if (pdcch_ConfigCommon->choice.setup->searchSpaceZero){
if (pdcch_ConfigCommon->choice.setup->searchSpaceSIB1 == NULL){
pdcch_ConfigCommon->choice.setup->searchSpaceSIB1=calloc(1,sizeof(*pdcch_ConfigCommon->choice.setup->searchSpaceSIB1));
}
*pdcch_ConfigCommon->choice.setup->searchSpaceSIB1 = 0;
LOG_D(NR_MAC, "[DCI_CONFIG] Configure SearchSpace#0 of the initial BWP\n");
}
if (ss->searchSpaceType->choice.common->dci_Format0_0_AndFormat1_0){
// check available SS IDs
if (pdcch_ConfigCommon->choice.setup->ra_SearchSpace){
@@ -424,34 +421,18 @@ void ue_dci_configuration(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_request_t *dl
AssertFatal(1==0,"Handle DCI searching when CellGroup without dedicated BWP\n");
}
// Search space 0, CORESET ID 0
NR_SetupRelease_PDCCH_ConfigCommon_t *pdcch_ConfigCommon = bwp_Common->pdcch_ConfigCommon;
if (pdcch_ConfigCommon &&
pdcch_ConfigCommon->choice.setup->searchSpaceSIB1 &&
!get_softmodem_params()->nsa) {
NR_SearchSpace_t *ss0 = mac->search_space_zero;
fapi_nr_dl_config_dci_dl_pdu_rel15_t *rel15 = &dl_config->dl_config_list[dl_config->number_pdus].dci_config_pdu.dci_config_rel15;
if (ss0->searchSpaceId == *pdcch_ConfigCommon->choice.setup->searchSpaceSIB1){
if( (frame%2 == mac->type0_PDCCH_CSS_config.sfn_c) && (slot == mac->type0_PDCCH_CSS_config.n_0) ){
rel15->num_dci_options = 1;
rel15->dci_format_options[0] = NR_DL_DCI_FORMAT_1_0;
config_dci_pdu(mac, rel15, dl_config, NR_RNTI_SI, -1);
fill_dci_search_candidates(ss0, rel15);
}
}
}
else if (!get_softmodem_params()->nsa) { // use coreset0/ss0
if (!get_softmodem_params()->nsa) {
NR_SearchSpace_t *ss0 = mac->search_space_zero;
if(ss0) {
fapi_nr_dl_config_dci_dl_pdu_rel15_t *rel15 = &dl_config->dl_config_list[0].dci_config_pdu.dci_config_rel15;
fapi_nr_dl_config_dci_dl_pdu_rel15_t *rel15 = &dl_config->dl_config_list[dl_config->number_pdus].dci_config_pdu.dci_config_rel15;
rel15->num_dci_options = 1;
rel15->dci_format_options[0] = NR_DL_DCI_FORMAT_1_0;
config_dci_pdu(mac, rel15, dl_config, NR_RNTI_C , -1);
config_dci_pdu(mac,
rel15,
dl_config,
((frame%2==mac->type0_PDCCH_CSS_config.sfn_c)&&(slot==mac->type0_PDCCH_CSS_config.n_0)) ? NR_RNTI_SI : NR_RNTI_C,
-1);
fill_dci_search_candidates(ss0, rel15);
dl_config->number_pdus = 1;
}
}
}
openair2/LAYER2/NR_MAC_UE/nr_ue_procedures.c
+82 -64
View File
@@ -191,32 +191,27 @@ void get_bwp_info(NR_UE_MAC_INST_t *mac,
NR_BWP_UplinkDedicated_t **ubwpd,
NR_BWP_UplinkCommon_t **ubwpc) {
if (dl_bwp_id > 0) {
AssertFatal(mac->DLbwp[dl_bwp_id-1]!=NULL,"mac->DLbwp[%d] is null, shouldn't be\n",
(int)dl_bwp_id-1);
*bwpd = mac->DLbwp[dl_bwp_id-1]->bwp_Dedicated;
if (mac->DLbwp[dl_bwp_id-1]->bwp_Common) *bwpc = mac->DLbwp[dl_bwp_id-1]->bwp_Common;
else if (mac->scc_SIB) *bwpc = &mac->scc_SIB->downlinkConfigCommon.initialDownlinkBWP;
else if (mac->scc) *bwpc = mac->scc->downlinkConfigCommon->initialDownlinkBWP;
AssertFatal(*bwpc!=NULL,"bwpc shouldn't be null\n");
} else {
if (mac->cg &&
mac->cg->spCellConfig &&
mac->cg->spCellConfig->spCellConfigDedicated &&
mac->cg->spCellConfig->spCellConfigDedicated->initialDownlinkBWP)
*bwpd = mac->cg->spCellConfig->spCellConfigDedicated->initialDownlinkBWP;
if (mac->scc_SIB) *bwpc = &mac->scc_SIB->downlinkConfigCommon.initialDownlinkBWP;
else if (mac->scc) *bwpc = mac->scc->downlinkConfigCommon->initialDownlinkBWP;
AssertFatal(*bwpc!=NULL,"bwpc shouldn't be null\n");
}
if (dl_bwp_id > 0) {
AssertFatal(mac->DLbwp[dl_bwp_id-1]!=NULL,"mac->DLbwp[%d] is null, shouldn't be\n", (int)dl_bwp_id-1);
*bwpd = mac->DLbwp[dl_bwp_id-1]->bwp_Dedicated;
} else {
if (mac->cg &&
mac->cg->spCellConfig &&
mac->cg->spCellConfig->spCellConfigDedicated &&
mac->cg->spCellConfig->spCellConfigDedicated->initialDownlinkBWP)
*bwpd = mac->cg->spCellConfig->spCellConfigDedicated->initialDownlinkBWP;
}
*bwpc = get_bwp_downlink_common(mac, dl_bwp_id);
AssertFatal(*bwpc!=NULL,"bwpc shouldn't be null\n");
if (ul_bwp_id > 0) {
AssertFatal(mac->ULbwp[ul_bwp_id-1]!=NULL,"mac->ULbwp[%d] is null, shouldn't be\n",
ul_bwp_id-1);
*ubwpd = mac->ULbwp[ul_bwp_id-1]->bwp_Dedicated;
if (mac->ULbwp[ul_bwp_id-1]->bwp_Common) *ubwpc = mac->ULbwp[ul_bwp_id-1]->bwp_Common;
else if (mac->scc_SIB) *ubwpc = &mac->scc_SIB->uplinkConfigCommon->initialUplinkBWP;
else if (mac->scc) *ubwpc = mac->scc->uplinkConfigCommon->initialUplinkBWP;
else if (mac->scc_SIB) *ubwpc = &mac->scc_SIB->uplinkConfigCommon->initialUplinkBWP;
AssertFatal(*bwpc!=NULL,"bwpc shouldn't be null\n");
}
@@ -227,12 +222,24 @@ void get_bwp_info(NR_UE_MAC_INST_t *mac,
mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig &&
mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP)
*ubwpd = mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP;
if (mac->scc_SIB) *ubwpc = &mac->scc_SIB->uplinkConfigCommon->initialUplinkBWP;
else if (mac->scc) *ubwpc = mac->scc->uplinkConfigCommon->initialUplinkBWP;
if (mac->scc) *ubwpc = mac->scc->uplinkConfigCommon->initialUplinkBWP;
else if (mac->scc_SIB) *ubwpc = &mac->scc_SIB->uplinkConfigCommon->initialUplinkBWP;
AssertFatal(*ubwpc!=NULL,"ubwpc shouldn't be null\n");
}
}
NR_BWP_DownlinkCommon_t *get_bwp_downlink_common(NR_UE_MAC_INST_t *mac, NR_BWP_Id_t dl_bwp_id) {
NR_BWP_DownlinkCommon_t *bwp_Common = NULL;
if (dl_bwp_id > 0 && mac->cg->spCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList) {
bwp_Common = mac->cg->spCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList->list.array[dl_bwp_id-1]->bwp_Common;
} else if (mac->scc) {
bwp_Common = mac->scc->downlinkConfigCommon->initialDownlinkBWP;
} else if (mac->scc_SIB) {
bwp_Common = &mac->scc_SIB->downlinkConfigCommon.initialDownlinkBWP;
}
return bwp_Common;
}
NR_PDSCH_TimeDomainResourceAllocationList_t *choose_dl_tda_list(NR_PDSCH_Config_t *pdsch_Config,NR_PDSCH_ConfigCommon_t *pdsch_ConfigCommon) {
NR_PDSCH_TimeDomainResourceAllocationList_t *pdsch_TimeDomainAllocationList=NULL;
@@ -633,10 +640,13 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
RA_config_t *ra = &mac->ra;
fapi_nr_dl_config_request_t *dl_config = &mac->dl_config_request;
uint8_t is_Msg3 = 0;
NR_BWP_Id_t dl_bwp_id = mac->DL_BWP_Id;
NR_BWP_Id_t ul_bwp_id = mac->UL_BWP_Id;
int default_abc = 1;
uint16_t n_RB_DLBWP;
if (mac->DLbwp[0]) n_RB_DLBWP = NRRIV2BW(mac->DLbwp[0]->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
if (dl_bwp_id>0 && mac->DLbwp[dl_bwp_id-1]) n_RB_DLBWP = NRRIV2BW(mac->DLbwp[dl_bwp_id-1]->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
else if (mac->scc) n_RB_DLBWP = NRRIV2BW(mac->scc->uplinkConfigCommon->initialUplinkBWP->genericParameters.locationAndBandwidth,MAX_BWP_SIZE);
else if (mac->scc_SIB) n_RB_DLBWP = NRRIV2BW(mac->scc_SIB->uplinkConfigCommon->initialUplinkBWP.genericParameters.locationAndBandwidth,MAX_BWP_SIZE);
else n_RB_DLBWP = mac->type0_PDCCH_CSS_config.num_rbs;
@@ -806,7 +816,7 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
dl_config->dl_config_list[dl_config->number_pdus].dlsch_config_pdu.rnti = rnti;
fapi_nr_dl_config_dlsch_pdu_rel15_t *dlsch_config_pdu_1_0 = &dl_config->dl_config_list[dl_config->number_pdus].dlsch_config_pdu.dlsch_config_rel15;
NR_PDSCH_Config_t *pdsch_config= (mac->DLbwp[0]) ? mac->DLbwp[0]->bwp_Dedicated->pdsch_Config->choice.setup : NULL;
NR_PDSCH_Config_t *pdsch_config= (dl_bwp_id>0 && mac->DLbwp[dl_bwp_id-1]) ? mac->DLbwp[dl_bwp_id-1]->bwp_Dedicated->pdsch_Config->choice.setup : NULL;
int is_common=0;
if(rnti == SI_RNTI) {
NR_Type0_PDCCH_CSS_config_t type0_PDCCH_CSS_config = mac->type0_PDCCH_CSS_config;
@@ -833,14 +843,19 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
dlsch_config_pdu_1_0->BWPStart = NRRIV2PRBOFFSET(mac->scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
}
if (!get_softmodem_params()->sa) { // NSA mode is not using the Initial BWP
dlsch_config_pdu_1_0->BWPStart = NRRIV2PRBOFFSET(mac->DLbwp[0]->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
pdsch_config = mac->DLbwp[0]->bwp_Dedicated->pdsch_Config->choice.setup;
dlsch_config_pdu_1_0->BWPStart = NRRIV2PRBOFFSET(mac->DLbwp[dl_bwp_id-1]->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
pdsch_config = mac->DLbwp[dl_bwp_id-1]->bwp_Dedicated->pdsch_Config->choice.setup;
}
} else if (mac->DLbwp[0]) {
dlsch_config_pdu_1_0->BWPSize = NRRIV2BW(mac->DLbwp[0]->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
dlsch_config_pdu_1_0->BWPStart = NRRIV2PRBOFFSET(mac->DLbwp[0]->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
dlsch_config_pdu_1_0->SubcarrierSpacing = mac->DLbwp[0]->bwp_Common->genericParameters.subcarrierSpacing;
pdsch_config = mac->DLbwp[0]->bwp_Dedicated->pdsch_Config->choice.setup;
} else if (dl_bwp_id>0 && mac->DLbwp[dl_bwp_id-1]) {
dlsch_config_pdu_1_0->BWPSize = NRRIV2BW(mac->DLbwp[dl_bwp_id-1]->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
dlsch_config_pdu_1_0->BWPStart = NRRIV2PRBOFFSET(mac->DLbwp[dl_bwp_id-1]->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
dlsch_config_pdu_1_0->SubcarrierSpacing = mac->DLbwp[dl_bwp_id-1]->bwp_Common->genericParameters.subcarrierSpacing;
pdsch_config = mac->DLbwp[dl_bwp_id-1]->bwp_Dedicated->pdsch_Config->choice.setup;
} else if (mac->scc) {
dlsch_config_pdu_1_0->BWPSize = NRRIV2BW(mac->scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
dlsch_config_pdu_1_0->BWPStart = NRRIV2PRBOFFSET(mac->scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
dlsch_config_pdu_1_0->SubcarrierSpacing = mac->scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.subcarrierSpacing;
pdsch_config = NULL;
} else if (mac->scc_SIB) {
dlsch_config_pdu_1_0->BWPSize = NRRIV2BW(mac->scc_SIB->downlinkConfigCommon.initialDownlinkBWP.genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
dlsch_config_pdu_1_0->BWPStart = NRRIV2PRBOFFSET(mac->scc_SIB->downlinkConfigCommon.initialDownlinkBWP.genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
@@ -858,13 +873,14 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
NR_PDSCH_TimeDomainResourceAllocationList_t *pdsch_TimeDomainAllocationList = NULL;
if (mac->DLbwp[0] &&
mac->DLbwp[0]->bwp_Dedicated &&
mac->DLbwp[0]->bwp_Dedicated->pdsch_Config &&
mac->DLbwp[0]->bwp_Dedicated->pdsch_Config->choice.setup->pdsch_TimeDomainAllocationList)
pdsch_TimeDomainAllocationList = mac->DLbwp[0]->bwp_Dedicated->pdsch_Config->choice.setup->pdsch_TimeDomainAllocationList->choice.setup;
else if (mac->DLbwp[0] && mac->DLbwp[0]->bwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList)
pdsch_TimeDomainAllocationList = mac->DLbwp[0]->bwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList;
if (dl_bwp_id>0 &&
mac->DLbwp[dl_bwp_id-1] &&
mac->DLbwp[dl_bwp_id-1]->bwp_Dedicated &&
mac->DLbwp[dl_bwp_id-1]->bwp_Dedicated->pdsch_Config &&
mac->DLbwp[dl_bwp_id-1]->bwp_Dedicated->pdsch_Config->choice.setup->pdsch_TimeDomainAllocationList)
pdsch_TimeDomainAllocationList = mac->DLbwp[dl_bwp_id-1]->bwp_Dedicated->pdsch_Config->choice.setup->pdsch_TimeDomainAllocationList->choice.setup;
else if (dl_bwp_id>0 && mac->DLbwp[dl_bwp_id-1] && mac->DLbwp[dl_bwp_id-1]->bwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList)
pdsch_TimeDomainAllocationList = mac->DLbwp[dl_bwp_id-1]->bwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList;
else if (mac->scc_SIB && mac->scc_SIB->downlinkConfigCommon.initialDownlinkBWP.pdsch_ConfigCommon->choice.setup)
pdsch_TimeDomainAllocationList = mac->scc_SIB->downlinkConfigCommon.initialDownlinkBWP.pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList;
@@ -881,10 +897,10 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
mappingtype = pdsch_TimeDomainAllocationList->list.array[dci->time_domain_assignment.val]->mappingType;
struct NR_DMRS_DownlinkConfig *dl_dmrs_config = NULL;
if(mac->DLbwp[0])
if(dl_bwp_id>0 && mac->DLbwp[dl_bwp_id-1] != NULL)
dl_dmrs_config = (mappingtype == typeA) ?
mac->DLbwp[0]->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup :
mac->DLbwp[0]->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeB->choice.setup;
mac->DLbwp[dl_bwp_id-1]->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup :
mac->DLbwp[dl_bwp_id-1]->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeB->choice.setup;
dlsch_config_pdu_1_0->nscid = 0;
if(dl_dmrs_config && dl_dmrs_config->scramblingID0)
@@ -952,14 +968,14 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
if (dci->tpc == 3) dlsch_config_pdu_1_0->accumulated_delta_PUCCH = 3;
// Sanity check for pucch_resource_indicator value received to check for false DCI.
valid = 0;
if (mac->ULbwp[0] &&
mac->ULbwp[0]->bwp_Dedicated &&
mac->ULbwp[0]->bwp_Dedicated->pucch_Config &&
mac->ULbwp[0]->bwp_Dedicated->pucch_Config->choice.setup&&
mac->ULbwp[0]->bwp_Dedicated->pucch_Config->choice.setup->resourceSetToAddModList) {
pucch_res_set_cnt = mac->ULbwp[0]->bwp_Dedicated->pucch_Config->choice.setup->resourceSetToAddModList->list.count;
if (mac->ULbwp[ul_bwp_id-1] &&
mac->ULbwp[ul_bwp_id-1]->bwp_Dedicated &&
mac->ULbwp[ul_bwp_id-1]->bwp_Dedicated->pucch_Config &&
mac->ULbwp[ul_bwp_id-1]->bwp_Dedicated->pucch_Config->choice.setup&&
mac->ULbwp[ul_bwp_id-1]->bwp_Dedicated->pucch_Config->choice.setup->resourceSetToAddModList) {
pucch_res_set_cnt = mac->ULbwp[ul_bwp_id-1]->bwp_Dedicated->pucch_Config->choice.setup->resourceSetToAddModList->list.count;
for (int id = 0; id < pucch_res_set_cnt; id++) {
if (dci->pucch_resource_indicator < mac->ULbwp[0]->bwp_Dedicated->pucch_Config->choice.setup->resourceSetToAddModList->list.array[id]->resourceList.list.count) {
if (dci->pucch_resource_indicator < mac->ULbwp[ul_bwp_id-1]->bwp_Dedicated->pucch_Config->choice.setup->resourceSetToAddModList->list.array[id]->resourceList.list.count) {
valid = 1;
break;
}
@@ -1062,8 +1078,8 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
* 47 DMRS_SEQ_INI:
*/
if (dci->bwp_indicator.val > 1) {
LOG_W(NR_MAC,"[%d.%d] bwp_indicator %d > 1 Possibly due to false DCI. Ignoring DCI!\n", frame, slot,dci->bwp_indicator.val);
if (dci->bwp_indicator.val > NR_MAX_NUM_BWP) {
LOG_W(NR_MAC,"[%d.%d] bwp_indicator %d > NR_MAX_NUM_BWP Possibly due to false DCI. Ignoring DCI!\n", frame, slot,dci->bwp_indicator.val);
return -1;
}
config_bwp_ue(mac, &dci->bwp_indicator.val, &dci_format);
@@ -1290,8 +1306,8 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
/* dmrs symbol positions*/
dlsch_config_pdu_1_1->dlDmrsSymbPos = fill_dmrs_mask(pdsch_Config,
mac->scc? mac->scc->dmrs_TypeA_Position:mac->mib->dmrs_TypeA_Position,
dlsch_config_pdu_1_1->number_symbols,
mac->scc? mac->scc->dmrs_TypeA_Position:mac->mib->dmrs_TypeA_Position,
dlsch_config_pdu_1_1->number_symbols,
dlsch_config_pdu_1_1->start_symbol,
mappingtype,
dlsch_config_pdu_1_1->n_front_load_symb);
@@ -1460,7 +1476,7 @@ void nr_ue_configure_pucch(NR_UE_MAC_INST_t *mac,
NR_BWP_UplinkCommon_t *initialUplinkBWP;
if (mac->scc) initialUplinkBWP = mac->scc->uplinkConfigCommon->initialUplinkBWP;
else initialUplinkBWP = &mac->scc_SIB->uplinkConfigCommon->initialUplinkBWP;
NR_BWP_Uplink_t *ubwp = mac->ULbwp[0];
NR_BWP_Uplink_t *ubwp = mac->ULbwp[bwp_id-1];
if (mac->cg && ubwp &&
mac->cg->spCellConfig &&
mac->cg->spCellConfig->spCellConfigDedicated &&
@@ -2288,7 +2304,7 @@ bool trigger_periodic_scheduling_request(NR_UE_MAC_INST_t *mac,
NR_BWP_Id_t bwp_id = mac->UL_BWP_Id;
NR_PUCCH_Config_t *pucch_Config = NULL;
int scs;
NR_BWP_Uplink_t *ubwp = mac->ULbwp[0];
NR_BWP_Uplink_t *ubwp = mac->ULbwp[bwp_id-1];
NR_BWP_UplinkCommon_t *initialUplinkBWP;
if (mac->scc) initialUplinkBWP = mac->scc->uplinkConfigCommon->initialUplinkBWP;
else initialUplinkBWP = &mac->scc_SIB->uplinkConfigCommon->initialUplinkBWP;
@@ -2433,7 +2449,7 @@ uint8_t nr_get_csi_measurements(NR_UE_MAC_INST_t *mac,
csi_period_offset(csirep, NULL, &period, &offset);
int scs;
NR_BWP_Uplink_t *ubwp = mac->ULbwp[0];
NR_BWP_Uplink_t *ubwp = mac->ULbwp[bwp_id-1];
NR_BWP_UplinkCommon_t *initialUplinkBWP;
if (mac->scc) initialUplinkBWP = mac->scc->uplinkConfigCommon->initialUplinkBWP;
else initialUplinkBWP = &mac->scc_SIB->uplinkConfigCommon->initialUplinkBWP;
@@ -2657,14 +2673,14 @@ void nr_ue_send_sdu(nr_downlink_indication_t *dl_info, NR_UL_TIME_ALIGNMENT_t *u
int get_n_rb(NR_UE_MAC_INST_t *mac, int rnti_type){
int N_RB = 0, start_RB;
NR_BWP_Id_t dl_bwp_id = mac->DL_BWP_Id;
switch(rnti_type) {
case NR_RNTI_RA:
case NR_RNTI_TC:
case NR_RNTI_P: {
NR_BWP_Id_t dl_bwp_id = mac->DL_BWP_Id;
if (mac->DLbwp[dl_bwp_id-1]->bwp_Common->pdcch_ConfigCommon->choice.setup->controlResourceSetZero) {
uint8_t coreset_id = 0; // assuming controlResourceSetId is 0 for controlResourceSetZero
NR_ControlResourceSet_t *coreset = mac->coreset[dl_bwp_id-1][coreset_id];
NR_ControlResourceSet_t *coreset = mac->coreset[dl_bwp_id][coreset_id];
get_coreset_rballoc(coreset->frequencyDomainResources.buf,&N_RB,&start_RB);
} else {
N_RB = NRRIV2BW(mac->scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
@@ -2675,7 +2691,7 @@ int get_n_rb(NR_UE_MAC_INST_t *mac, int rnti_type){
N_RB = mac->type0_PDCCH_CSS_config.num_rbs;
break;
case NR_RNTI_C:
N_RB = NRRIV2BW(mac->DLbwp[0]->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
N_RB = NRRIV2BW(mac->DLbwp[dl_bwp_id-1]->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
break;
}
return N_RB;
@@ -2694,14 +2710,16 @@ uint8_t nr_extract_dci_info(NR_UE_MAC_INST_t *mac,
int fsize = 0;
int rnti_type = get_rnti_type(mac, rnti);
NR_BWP_Id_t dl_bwp_id = mac->DL_BWP_Id ;
NR_BWP_Id_t ul_bwp_id = mac->UL_BWP_Id ;
int N_RB_UL = 0;
if(mac->scc_SIB) {
N_RB_UL = NRRIV2BW(mac->scc_SIB->uplinkConfigCommon->initialUplinkBWP.genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
} else if(mac->ULbwp[0]) {
N_RB_UL = NRRIV2BW(mac->ULbwp[0]->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
if(ul_bwp_id > 0 && mac->ULbwp[ul_bwp_id-1]) {
N_RB_UL = NRRIV2BW(mac->ULbwp[ul_bwp_id - 1]->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
} else if(mac->scc) {
N_RB_UL = NRRIV2BW(mac->scc->uplinkConfigCommon->initialUplinkBWP->genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
} else if(mac->scc_SIB) {
N_RB_UL = NRRIV2BW(mac->scc_SIB->uplinkConfigCommon->initialUplinkBWP.genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
}
LOG_D(MAC,"nr_extract_dci_info : dci_pdu %lx, size %d\n",*dci_pdu,dci_size);
@@ -2765,7 +2783,7 @@ uint8_t nr_extract_dci_info(NR_UE_MAC_INST_t *mac,
#endif
// check BWP id
if (mac->DLbwp[0]) N_RB=NRRIV2BW(mac->DLbwp[0]->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
if (dl_bwp_id>0 && mac->DLbwp[dl_bwp_id-1]) N_RB=NRRIV2BW(mac->DLbwp[dl_bwp_id-1]->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
else N_RB=NRRIV2BW(mac->scc_SIB->downlinkConfigCommon.initialDownlinkBWP.genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
// Freq domain assignment (275rb >> fsize = 16)
@@ -2948,7 +2966,7 @@ uint8_t nr_extract_dci_info(NR_UE_MAC_INST_t *mac,
case NR_RNTI_TC:
// check BWP id
if (mac->DLbwp[0]) N_RB=NRRIV2BW(mac->DLbwp[0]->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
if (dl_bwp_id>0 && mac->DLbwp[dl_bwp_id-1]) N_RB=NRRIV2BW(mac->DLbwp[dl_bwp_id-1]->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
else N_RB=mac->type0_PDCCH_CSS_config.num_rbs;
@@ -3030,7 +3048,7 @@ uint8_t nr_extract_dci_info(NR_UE_MAC_INST_t *mac,
break;
case NR_UL_DCI_FORMAT_0_0:
if (mac->ULbwp[0]) N_RB_UL=NRRIV2BW(mac->ULbwp[0]->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
if (mac->ULbwp[ul_bwp_id-1]) N_RB_UL=NRRIV2BW(mac->ULbwp[ul_bwp_id-1]->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
else N_RB_UL=NRRIV2BW(mac->scc_SIB->uplinkConfigCommon->initialUplinkBWP.genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
switch(rnti_type)
openair2/LAYER2/NR_MAC_UE/nr_ue_scheduler.c
+107 -93
View File
@@ -44,6 +44,7 @@
/* MAC */
#include "NR_MAC_COMMON/nr_mac.h"
#include "NR_MAC_COMMON/nr_mac_common.h"
#include "NR_MAC_UE/mac_proto.h"
#include "NR_MAC_UE/mac_extern.h"
@@ -114,18 +115,20 @@ void fill_scheduled_response(nr_scheduled_response_t *scheduled_response,
*/
long get_k2(NR_UE_MAC_INST_t *mac, uint8_t time_domain_ind) {
long k2 = -1;
NR_BWP_Id_t ul_bwp_id = mac->UL_BWP_Id;
// Get K2 from RRC configuration
NR_PUSCH_Config_t *pusch_config=mac->ULbwp[0] ? mac->ULbwp[0]->bwp_Dedicated->pusch_Config->choice.setup : NULL;
NR_PUSCH_Config_t *pusch_config=mac->ULbwp[ul_bwp_id-1] ? mac->ULbwp[ul_bwp_id-1]->bwp_Dedicated->pusch_Config->choice.setup : NULL;
NR_PUSCH_TimeDomainResourceAllocationList_t *pusch_TimeDomainAllocationList = NULL;
if (pusch_config && pusch_config->pusch_TimeDomainAllocationList) {
pusch_TimeDomainAllocationList = pusch_config->pusch_TimeDomainAllocationList->choice.setup;
}
else if (mac->ULbwp[0] &&
mac->ULbwp[0]->bwp_Common&&
mac->ULbwp[0]->bwp_Common->pusch_ConfigCommon&&
mac->ULbwp[0]->bwp_Common->pusch_ConfigCommon->choice.setup &&
mac->ULbwp[0]->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList) {
pusch_TimeDomainAllocationList = mac->ULbwp[0]->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList;
else if (mac->ULbwp[ul_bwp_id-1] &&
mac->ULbwp[ul_bwp_id-1]->bwp_Common&&
mac->ULbwp[ul_bwp_id-1]->bwp_Common->pusch_ConfigCommon&&
mac->ULbwp[ul_bwp_id-1]->bwp_Common->pusch_ConfigCommon->choice.setup &&
mac->ULbwp[ul_bwp_id-1]->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList) {
pusch_TimeDomainAllocationList = mac->ULbwp[ul_bwp_id-1]->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList;
}
else if (mac->scc_SIB->uplinkConfigCommon->initialUplinkBWP.pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList)
pusch_TimeDomainAllocationList=mac->scc_SIB->uplinkConfigCommon->initialUplinkBWP.pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList;
@@ -154,6 +157,7 @@ long get_k2(NR_UE_MAC_INST_t *mac, uint8_t time_domain_ind) {
*/
fapi_nr_ul_config_request_t *get_ul_config_request(NR_UE_MAC_INST_t *mac, int slot)
{
NR_BWP_Id_t ul_bwp_id = mac->UL_BWP_Id;
NR_TDD_UL_DL_ConfigCommon_t *tdd_config = mac->scc==NULL ? mac->scc_SIB->tdd_UL_DL_ConfigurationCommon : mac->scc->tdd_UL_DL_ConfigurationCommon;
//Check if request to access ul_config is for a UL slot
@@ -165,8 +169,8 @@ fapi_nr_ul_config_request_t *get_ul_config_request(NR_UE_MAC_INST_t *mac, int sl
// Calculate the index of the UL slot in mac->ul_config_request list. This is
// based on the TDD pattern (slot configuration period) and number of UL+mixed
// slots in the period. TS 38.213 Sec 11.1
int mu = mac->ULbwp[0] ?
mac->ULbwp[0]->bwp_Common->genericParameters.subcarrierSpacing :
int mu = mac->ULbwp[ul_bwp_id-1] ?
mac->ULbwp[ul_bwp_id-1]->bwp_Common->genericParameters.subcarrierSpacing :
mac->scc_SIB->uplinkConfigCommon->initialUplinkBWP.genericParameters.subcarrierSpacing;
const int n = nr_slots_per_frame[mu];
const int num_slots_per_tdd = tdd_config ? (n >> (7 - tdd_config->pattern1.dl_UL_TransmissionPeriodicity)) : n;
@@ -188,17 +192,21 @@ fapi_nr_ul_config_request_t *get_ul_config_request(NR_UE_MAC_INST_t *mac, int sl
void ul_layers_config(NR_UE_MAC_INST_t * mac, nfapi_nr_ue_pusch_pdu_t *pusch_config_pdu, dci_pdu_rel15_t *dci) {
NR_ServingCellConfigCommon_t *scc = mac->scc;
NR_BWP_Id_t ul_bwp_id = mac->UL_BWP_Id;
NR_BWP_UplinkDedicated_t *ubwpd=NULL;
NR_SRS_Config_t *srs_config = NULL;
if (mac->cg &&
mac->cg->spCellConfig &&
mac->cg->spCellConfig->spCellConfigDedicated &&
mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig &&
mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP)
mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP) {
ubwpd = mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP;
srs_config = mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP->srs_Config->choice.setup;
}
NR_PUSCH_Config_t *pusch_Config = mac->ULbwp[0] ?
mac->ULbwp[0]->bwp_Dedicated->pusch_Config->choice.setup :
NR_PUSCH_Config_t *pusch_Config = mac->ULbwp[ul_bwp_id-1] ?
mac->ULbwp[ul_bwp_id-1]->bwp_Dedicated->pusch_Config->choice.setup :
(ubwpd?
ubwpd->pusch_Config->choice.setup:
NULL);
@@ -212,7 +220,7 @@ void ul_layers_config(NR_UE_MAC_INST_t * mac, nfapi_nr_ue_pusch_pdu_t *pusch_con
else
transformPrecoder = NR_PUSCH_Config__transformPrecoder_disabled;
}
pusch_config_pdu->transform_precoding = transformPrecoder;
/* PRECOD_NBR_LAYERS */
if ((*pusch_Config->txConfig == NR_PUSCH_Config__txConfig_nonCodebook));
@@ -220,11 +228,14 @@ void ul_layers_config(NR_UE_MAC_INST_t * mac, nfapi_nr_ue_pusch_pdu_t *pusch_con
if ((*pusch_Config->txConfig == NR_PUSCH_Config__txConfig_codebook)){
uint8_t n_antenna_port = 0; //FIXME!!!
// The UE shall transmit PUSCH using the same antenna port(s) as the SRS port(s) in the SRS resource indicated by the DCI format 0_1
// 38.214 Section 6.1.1
uint8_t n_antenna_port = get_pusch_nb_antenna_ports(pusch_Config, srs_config, dci->srs_resource_indicator);
if (n_antenna_port == 1); // 1 antenna port and the higher layer parameter txConfig = codebook 0 bits
if (n_antenna_port == 4){ // 4 antenna port and the higher layer parameter txConfig = codebook
if (n_antenna_port == 4) { // 4 antenna port and the higher layer parameter txConfig = codebook
// Table 7.3.1.1.2-2: transformPrecoder=disabled and maxRank = 2 or 3 or 4
if ((transformPrecoder == NR_PUSCH_Config__transformPrecoder_disabled)
@@ -234,54 +245,54 @@ void ul_layers_config(NR_UE_MAC_INST_t * mac, nfapi_nr_ue_pusch_pdu_t *pusch_con
if (*pusch_Config->codebookSubset == NR_PUSCH_Config__codebookSubset_fullyAndPartialAndNonCoherent) {
pusch_config_pdu->nrOfLayers = table_7_3_1_1_2_2_3_4_5[dci->precoding_information.val][0];
pusch_config_pdu->transform_precoding = table_7_3_1_1_2_2_3_4_5[dci->precoding_information.val][1];
pusch_config_pdu->Tpmi = table_7_3_1_1_2_2_3_4_5[dci->precoding_information.val][1];
}
if (*pusch_Config->codebookSubset == NR_PUSCH_Config__codebookSubset_partialAndNonCoherent){
pusch_config_pdu->nrOfLayers = table_7_3_1_1_2_2_3_4_5[dci->precoding_information.val][2];
pusch_config_pdu->transform_precoding = table_7_3_1_1_2_2_3_4_5[dci->precoding_information.val][3];
pusch_config_pdu->Tpmi = table_7_3_1_1_2_2_3_4_5[dci->precoding_information.val][3];
}
if (*pusch_Config->codebookSubset == NR_PUSCH_Config__codebookSubset_nonCoherent){
pusch_config_pdu->nrOfLayers = table_7_3_1_1_2_2_3_4_5[dci->precoding_information.val][4];
pusch_config_pdu->transform_precoding = table_7_3_1_1_2_2_3_4_5[dci->precoding_information.val][5];
pusch_config_pdu->Tpmi = table_7_3_1_1_2_2_3_4_5[dci->precoding_information.val][5];
}
}
// Table 7.3.1.1.2-3: transformPrecoder= enabled, or transformPrecoder=disabled and maxRank = 1
if (((transformPrecoder == NR_PUSCH_Config__transformPrecoder_enabled)
|| (transformPrecoder == NR_PUSCH_Config__transformPrecoder_disabled))
&& (*pusch_Config->maxRank == 1)){
&& (*pusch_Config->maxRank == 1)) {
if (*pusch_Config->codebookSubset == NR_PUSCH_Config__codebookSubset_fullyAndPartialAndNonCoherent) {
pusch_config_pdu->nrOfLayers = table_7_3_1_1_2_2_3_4_5[dci->precoding_information.val][6];
pusch_config_pdu->transform_precoding = table_7_3_1_1_2_2_3_4_5[dci->precoding_information.val][7];
pusch_config_pdu->Tpmi = table_7_3_1_1_2_2_3_4_5[dci->precoding_information.val][7];
}
if (*pusch_Config->codebookSubset == NR_PUSCH_Config__codebookSubset_partialAndNonCoherent){
pusch_config_pdu->nrOfLayers = table_7_3_1_1_2_2_3_4_5[dci->precoding_information.val][8];
pusch_config_pdu->transform_precoding = table_7_3_1_1_2_2_3_4_5[dci->precoding_information.val][9];
pusch_config_pdu->Tpmi = table_7_3_1_1_2_2_3_4_5[dci->precoding_information.val][9];
}
if (*pusch_Config->codebookSubset == NR_PUSCH_Config__codebookSubset_nonCoherent){
pusch_config_pdu->nrOfLayers = table_7_3_1_1_2_2_3_4_5[dci->precoding_information.val][10];
pusch_config_pdu->transform_precoding = table_7_3_1_1_2_2_3_4_5[dci->precoding_information.val][11];
pusch_config_pdu->Tpmi = table_7_3_1_1_2_2_3_4_5[dci->precoding_information.val][11];
}
}
}
if (n_antenna_port == 4){ // 2 antenna port and the higher layer parameter txConfig = codebook
if (n_antenna_port == 2) {
// 2 antenna port and the higher layer parameter txConfig = codebook
// Table 7.3.1.1.2-4: transformPrecoder=disabled and maxRank = 2
if ((transformPrecoder == NR_PUSCH_Config__transformPrecoder_disabled) && (*pusch_Config->maxRank == 2)){
if ((transformPrecoder == NR_PUSCH_Config__transformPrecoder_disabled) && (*pusch_Config->maxRank == 2)) {
if (*pusch_Config->codebookSubset == NR_PUSCH_Config__codebookSubset_fullyAndPartialAndNonCoherent) {
pusch_config_pdu->nrOfLayers = table_7_3_1_1_2_2_3_4_5[dci->precoding_information.val][12];
pusch_config_pdu->transform_precoding = table_7_3_1_1_2_2_3_4_5[dci->precoding_information.val][13];
pusch_config_pdu->Tpmi = table_7_3_1_1_2_2_3_4_5[dci->precoding_information.val][13];
}
if (*pusch_Config->codebookSubset == NR_PUSCH_Config__codebookSubset_nonCoherent){
pusch_config_pdu->nrOfLayers = table_7_3_1_1_2_2_3_4_5[dci->precoding_information.val][14];
pusch_config_pdu->transform_precoding = table_7_3_1_1_2_2_3_4_5[dci->precoding_information.val][15];
pusch_config_pdu->Tpmi = table_7_3_1_1_2_2_3_4_5[dci->precoding_information.val][15];
}
}
@@ -289,16 +300,16 @@ void ul_layers_config(NR_UE_MAC_INST_t * mac, nfapi_nr_ue_pusch_pdu_t *pusch_con
// Table 7.3.1.1.2-5: transformPrecoder= enabled, or transformPrecoder= disabled and maxRank = 1
if (((transformPrecoder == NR_PUSCH_Config__transformPrecoder_enabled)
|| (transformPrecoder == NR_PUSCH_Config__transformPrecoder_disabled))
&& (*pusch_Config->maxRank == 1)){
&& (*pusch_Config->maxRank == 1)) {
if (*pusch_Config->codebookSubset == NR_PUSCH_Config__codebookSubset_fullyAndPartialAndNonCoherent) {
pusch_config_pdu->nrOfLayers = table_7_3_1_1_2_2_3_4_5[dci->precoding_information.val][16];
pusch_config_pdu->transform_precoding = table_7_3_1_1_2_2_3_4_5[dci->precoding_information.val][17];
pusch_config_pdu->Tpmi = table_7_3_1_1_2_2_3_4_5[dci->precoding_information.val][17];
}
if (*pusch_Config->codebookSubset == NR_PUSCH_Config__codebookSubset_nonCoherent){
pusch_config_pdu->nrOfLayers = table_7_3_1_1_2_2_3_4_5[dci->precoding_information.val][18];
pusch_config_pdu->transform_precoding = table_7_3_1_1_2_2_3_4_5[dci->precoding_information.val][19];
pusch_config_pdu->Tpmi = table_7_3_1_1_2_2_3_4_5[dci->precoding_information.val][19];
}
}
@@ -307,9 +318,9 @@ void ul_layers_config(NR_UE_MAC_INST_t * mac, nfapi_nr_ue_pusch_pdu_t *pusch_con
/*-------------------- Changed to enable Transform precoding in RF SIM------------------------------------------------*/
/*if (pusch_config_pdu->transform_precoding == transform_precoder_enabled) {
/*if (pusch_config_pdu->transformPrecoder == transformPrecoder_enabled) {
pusch_config_dedicated->transform_precoder = transform_precoder_enabled;
pusch_config_dedicated->transform_precoder = transformPrecoder_enabled;
if(pusch_Config->dmrs_UplinkForPUSCH_MappingTypeA != NULL) {
@@ -331,15 +342,15 @@ void ul_layers_config(NR_UE_MAC_INST_t * mac, nfapi_nr_ue_pusch_pdu_t *pusch_con
}
} else
pusch_config_dedicated->transform_precoder = transform_precoder_disabled;*/
pusch_config_dedicated->transformPrecoder = ttransformPrecoder_disabled;*/
}
// todo: this function shall be reviewed completely because of the many comments left by the author
void ul_ports_config(NR_UE_MAC_INST_t * mac, nfapi_nr_ue_pusch_pdu_t *pusch_config_pdu, dci_pdu_rel15_t *dci) {
void ul_ports_config(NR_UE_MAC_INST_t *mac, int *n_front_load_symb, nfapi_nr_ue_pusch_pdu_t *pusch_config_pdu, dci_pdu_rel15_t *dci) {
/* ANTENNA_PORTS */
uint8_t rank = 1; // We need to initialize rank FIXME!!!
uint8_t rank = pusch_config_pdu->nrOfLayers;
NR_BWP_Id_t ul_bwp_id = mac->UL_BWP_Id;
NR_ServingCellConfigCommon_t *scc = mac->scc;
NR_BWP_UplinkDedicated_t *ubwpd=NULL;
@@ -350,7 +361,7 @@ void ul_ports_config(NR_UE_MAC_INST_t * mac, nfapi_nr_ue_pusch_pdu_t *pusch_conf
mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP)
ubwpd = mac->cg->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP;
NR_PUSCH_Config_t *pusch_Config = mac->ULbwp[0] ? mac->ULbwp[0]->bwp_Dedicated->pusch_Config->choice.setup : (ubwpd?ubwpd->pusch_Config->choice.setup:NULL);
NR_PUSCH_Config_t *pusch_Config = mac->ULbwp[ul_bwp_id-1] ? mac->ULbwp[ul_bwp_id-1]->bwp_Dedicated->pusch_Config->choice.setup : (ubwpd?ubwpd->pusch_Config->choice.setup:NULL);
AssertFatal(pusch_Config!=NULL,"pusch_Config shouldn't be null\n");
long transformPrecoder;
@@ -375,51 +386,44 @@ void ul_ports_config(NR_UE_MAC_INST_t * mac, nfapi_nr_ue_pusch_pdu_t *pusch_conf
dmrs_type = pusch_Config->dmrs_UplinkForPUSCH_MappingTypeB->choice.setup->dmrs_Type;
}
LOG_D(NR_MAC,"MappingType%s max_length %s, dmrs_type %s, antenna_ports %d\n",pusch_Config->dmrs_UplinkForPUSCH_MappingTypeA?"A":"B",max_length?"len2":"len1",dmrs_type?"type2":"type1",dci->antenna_ports.val);
LOG_D(NR_MAC,"MappingType%s max_length %s, dmrs_type %s, antenna_ports %d\n",
pusch_Config->dmrs_UplinkForPUSCH_MappingTypeA?"A":"B",max_length?"len2":"len1",dmrs_type?"type2":"type1",dci->antenna_ports.val);
if ((transformPrecoder == NR_PUSCH_Config__transformPrecoder_enabled) &&
(dmrs_type == NULL) && (max_length == NULL)) { // tables 7.3.1.1.2-6
pusch_config_pdu->num_dmrs_cdm_grps_no_data = 2; //TBC
pusch_config_pdu->dmrs_ports = dci->antenna_ports.val; //TBC
(dmrs_type == NULL) && (max_length == NULL)) { // tables 7.3.1.1.2-6
pusch_config_pdu->num_dmrs_cdm_grps_no_data = 2;
pusch_config_pdu->dmrs_ports = 1<<dci->antenna_ports.val;
}
if ((transformPrecoder == NR_PUSCH_Config__transformPrecoder_enabled) &&
(dmrs_type == NULL) && (max_length != NULL)) { // tables 7.3.1.1.2-7
(dmrs_type == NULL) && (max_length != NULL)) { // tables 7.3.1.1.2-7
pusch_config_pdu->num_dmrs_cdm_grps_no_data = 2; //TBC
pusch_config_pdu->dmrs_ports = (dci->antenna_ports.val > 3)?(dci->antenna_ports.val-4):(dci->antenna_ports.val); //TBC
//pusch_config_pdu->n_front_load_symb = (dci->antenna_ports > 3)?2:1; //FIXME
pusch_config_pdu->dmrs_ports = 1<<((dci->antenna_ports.val > 3)?(dci->antenna_ports.val-4):(dci->antenna_ports.val));
*n_front_load_symb = (dci->antenna_ports.val > 3)?2:1;
}
if ((transformPrecoder == NR_PUSCH_Config__transformPrecoder_disabled) &&
(dmrs_type == NULL) && (max_length == NULL)) { // tables 7.3.1.1.2-8/9/10/11
if (rank == 1) {
pusch_config_pdu->num_dmrs_cdm_grps_no_data = (dci->antenna_ports.val > 1)?2:1; //TBC
pusch_config_pdu->dmrs_ports = (dci->antenna_ports.val > 1)?(dci->antenna_ports.val-2):(dci->antenna_ports.val); //TBC
pusch_config_pdu->num_dmrs_cdm_grps_no_data = (dci->antenna_ports.val > 1)?2:1;
pusch_config_pdu->dmrs_ports =1<<((dci->antenna_ports.val > 1)?(dci->antenna_ports.val-2):(dci->antenna_ports.val));
}
if (rank == 2){
pusch_config_pdu->num_dmrs_cdm_grps_no_data = (dci->antenna_ports.val > 0)?2:1; //TBC
pusch_config_pdu->dmrs_ports = 0; //FIXME
//pusch_config_pdu->dmrs_ports[0] = (dci->antenna_ports > 1)?(dci->antenna_ports > 2 ?0:2):0;
//pusch_config_pdu->dmrs_ports[1] = (dci->antenna_ports > 1)?(dci->antenna_ports > 2 ?2:3):1;
pusch_config_pdu->num_dmrs_cdm_grps_no_data = (dci->antenna_ports.val > 0)?2:1;
pusch_config_pdu->dmrs_ports = (dci->antenna_ports.val > 1)?((dci->antenna_ports.val> 2)?0x5:0xc):0x3;
}
if (rank == 3){
pusch_config_pdu->num_dmrs_cdm_grps_no_data = 2; //TBC
pusch_config_pdu->dmrs_ports = 0; //FIXME
//pusch_config_pdu->dmrs_ports[0] = 0;
//pusch_config_pdu->dmrs_ports[1] = 1;
//pusch_config_pdu->dmrs_ports[2] = 2;
pusch_config_pdu->num_dmrs_cdm_grps_no_data = 2;
pusch_config_pdu->dmrs_ports = 0x7; // ports 0-2
}
if (rank == 4){
pusch_config_pdu->num_dmrs_cdm_grps_no_data = 2; //TBC
pusch_config_pdu->dmrs_ports = 0; //FIXME
//pusch_config_pdu->dmrs_ports[0] = 0;
//pusch_config_pdu->dmrs_ports[1] = 1;
//pusch_config_pdu->dmrs_ports[2] = 2;
//pusch_config_pdu->dmrs_ports[3] = 3;
pusch_config_pdu->num_dmrs_cdm_grps_no_data = 2;
pusch_config_pdu->dmrs_ports = 0xf; // ports 0-3
}
}
@@ -428,8 +432,8 @@ void ul_ports_config(NR_UE_MAC_INST_t * mac, nfapi_nr_ue_pusch_pdu_t *pusch_conf
if (rank == 1){
pusch_config_pdu->num_dmrs_cdm_grps_no_data = (dci->antenna_ports.val > 1)?2:1; //TBC
pusch_config_pdu->dmrs_ports = (dci->antenna_ports.val > 1)?(dci->antenna_ports.val > 5 ?(dci->antenna_ports.val-6):(dci->antenna_ports.val-2)):dci->antenna_ports.val; //TBC
//pusch_config_pdu->n_front_load_symb = (dci->antenna_ports.val > 6)?2:1; //FIXME
pusch_config_pdu->dmrs_ports = 1<<((dci->antenna_ports.val > 1)?(dci->antenna_ports.val > 5 ?(dci->antenna_ports.val-6):(dci->antenna_ports.val-2)):dci->antenna_ports.val);
*n_front_load_symb = (dci->antenna_ports.val > 6)?2:1;
}
if (rank == 2){
@@ -437,7 +441,7 @@ void ul_ports_config(NR_UE_MAC_INST_t * mac, nfapi_nr_ue_pusch_pdu_t *pusch_conf
pusch_config_pdu->dmrs_ports = 0; //FIXME
//pusch_config_pdu->dmrs_ports[0] = table_7_3_1_1_2_13[dci->antenna_ports.val][1];
//pusch_config_pdu->dmrs_ports[1] = table_7_3_1_1_2_13[dci->antenna_ports.val][2];
//pusch_config_pdu->n_front_load_symb = (dci->antenna_ports.val > 3)?2:1; // FIXME
//n_front_load_symb = (dci->antenna_ports.val > 3)?2:1; // FIXME
}
if (rank == 3){
@@ -446,7 +450,7 @@ void ul_ports_config(NR_UE_MAC_INST_t * mac, nfapi_nr_ue_pusch_pdu_t *pusch_conf
//pusch_config_pdu->dmrs_ports[0] = table_7_3_1_1_2_14[dci->antenna_ports.val][1];
//pusch_config_pdu->dmrs_ports[1] = table_7_3_1_1_2_14[dci->antenna_ports.val][2];
//pusch_config_pdu->dmrs_ports[2] = table_7_3_1_1_2_14[dci->antenna_ports.val][3];
//pusch_config_pdu->n_front_load_symb = (dci->antenna_ports.val > 1)?2:1; //FIXME
//n_front_load_symb = (dci->antenna_ports.val > 1)?2:1; //FIXME
}
if (rank == 4){
@@ -456,7 +460,7 @@ void ul_ports_config(NR_UE_MAC_INST_t * mac, nfapi_nr_ue_pusch_pdu_t *pusch_conf
//pusch_config_pdu->dmrs_ports[1] = table_7_3_1_1_2_15[dci->antenna_ports.val][2];
//pusch_config_pdu->dmrs_ports[2] = table_7_3_1_1_2_15[dci->antenna_ports.val][3];
//pusch_config_pdu->dmrs_ports[3] = table_7_3_1_1_2_15[dci->antenna_ports.val][4];
//pusch_config_pdu->n_front_load_symb = (dci->antenna_ports.val > 1)?2:1; //FIXME
//n_front_load_symb = (dci->antenna_ports.val > 1)?2:1; //FIXME
}
}
@@ -500,7 +504,7 @@ void ul_ports_config(NR_UE_MAC_INST_t * mac, nfapi_nr_ue_pusch_pdu_t *pusch_conf
if (rank == 1){
pusch_config_pdu->num_dmrs_cdm_grps_no_data = table_7_3_1_1_2_20[dci->antenna_ports.val][0]; //TBC
pusch_config_pdu->dmrs_ports = table_7_3_1_1_2_20[dci->antenna_ports.val][1]; //TBC
//pusch_config_pdu->n_front_load_symb = table_7_3_1_1_2_20[dci->antenna_ports.val][2]; //FIXME
//n_front_load_symb = table_7_3_1_1_2_20[dci->antenna_ports.val][2]; //FIXME
}
if (rank == 2){
@@ -508,7 +512,7 @@ void ul_ports_config(NR_UE_MAC_INST_t * mac, nfapi_nr_ue_pusch_pdu_t *pusch_conf
pusch_config_pdu->dmrs_ports = 0; //FIXME
//pusch_config_pdu->dmrs_ports[0] = table_7_3_1_1_2_21[dci->antenna_ports.val][1];
//pusch_config_pdu->dmrs_ports[1] = table_7_3_1_1_2_21[dci->antenna_ports.val][2];
//pusch_config_pdu->n_front_load_symb = table_7_3_1_1_2_21[dci->antenna_ports.val][3]; //FIXME
//n_front_load_symb = table_7_3_1_1_2_21[dci->antenna_ports.val][3]; //FIXME
}
if (rank == 3){
@@ -517,7 +521,7 @@ void ul_ports_config(NR_UE_MAC_INST_t * mac, nfapi_nr_ue_pusch_pdu_t *pusch_conf
//pusch_config_pdu->dmrs_ports[0] = table_7_3_1_1_2_22[dci->antenna_ports.val][1];
//pusch_config_pdu->dmrs_ports[1] = table_7_3_1_1_2_22[dci->antenna_ports.val][2];
//pusch_config_pdu->dmrs_ports[2] = table_7_3_1_1_2_22[dci->antenna_ports.val][3];
//pusch_config_pdu->n_front_load_symb = table_7_3_1_1_2_22[dci->antenna_ports.val][4]; //FIXME
//n_front_load_symb = table_7_3_1_1_2_22[dci->antenna_ports.val][4]; //FIXME
}
if (rank == 4){
@@ -527,7 +531,7 @@ void ul_ports_config(NR_UE_MAC_INST_t * mac, nfapi_nr_ue_pusch_pdu_t *pusch_conf
//pusch_config_pdu->dmrs_ports[1] = table_7_3_1_1_2_23[dci->antenna_ports.val][2];
//pusch_config_pdu->dmrs_ports[2] = table_7_3_1_1_2_23[dci->antenna_ports.val][3];
//pusch_config_pdu->dmrs_ports[3] = table_7_3_1_1_2_23[dci->antenna_ports.val][4];
//pusch_config_pdu->n_front_load_symb = table_7_3_1_1_2_23[dci->antenna_ports.val][5]; //FIXME
//n_front_load_symb = table_7_3_1_1_2_23[dci->antenna_ports.val][5]; //FIXME
}
}
LOG_D(NR_MAC,"num_dmrs_cdm_grps_no_data %d, dmrs_ports %d\n",pusch_config_pdu->num_dmrs_cdm_grps_no_data,pusch_config_pdu->dmrs_ports);
@@ -559,23 +563,25 @@ int nr_config_pusch_pdu(NR_UE_MAC_INST_t *mac,
int N_PRB_oh = 0;
int rnti_type = get_rnti_type(mac, rnti);
NR_BWP_Id_t ul_bwp_id = mac->UL_BWP_Id;
// Common configuration
pusch_config_pdu->dmrs_config_type = pusch_dmrs_type1;
pusch_config_pdu->pdu_bit_map = PUSCH_PDU_BITMAP_PUSCH_DATA;
pusch_config_pdu->nrOfLayers = 1;
pusch_config_pdu->Tpmi = 0;
pusch_config_pdu->rnti = rnti;
NR_BWP_UplinkCommon_t *initialUplinkBWP;
if (mac->scc) initialUplinkBWP = mac->scc->uplinkConfigCommon->initialUplinkBWP;
else initialUplinkBWP = &mac->scc_SIB->uplinkConfigCommon->initialUplinkBWP;
pusch_dmrs_AdditionalPosition_t add_pos = pusch_dmrs_pos2;
pusch_maxLength_t dmrslength = pusch_len1;
int dmrslength = 1;
if (rar_grant) {
// Note: for Msg3 or MsgA PUSCH transmission the N_PRB_oh is always set to 0
NR_BWP_Uplink_t *ubwp = mac->ULbwp[0];
NR_BWP_Uplink_t *ubwp = mac->ULbwp[ul_bwp_id-1];
NR_BWP_UplinkDedicated_t *ibwp;
int scs,abwp_start,abwp_size,startSymbolAndLength,mappingtype;
NR_PUSCH_Config_t *pusch_Config=NULL;
@@ -686,8 +692,8 @@ int nr_config_pusch_pdu(NR_UE_MAC_INST_t *mac,
int target_ss;
bool valid_ptrs_setup = 0;
uint16_t n_RB_ULBWP;
n_RB_ULBWP = NRRIV2BW(ubwpc->genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
uint16_t n_RB_ULBWP = NRRIV2BW(ubwpc->genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
pusch_config_pdu->bwp_start = NRRIV2PRBOFFSET(ubwpc->genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
pusch_config_pdu->bwp_size = n_RB_ULBWP;
@@ -713,11 +719,12 @@ int nr_config_pusch_pdu(NR_UE_MAC_INST_t *mac,
} else if (*dci_format == NR_UL_DCI_FORMAT_0_1) {
config_bwp_ue(mac, &dci->bwp_indicator.val, dci_format);
get_bwp_info(mac,dl_bwp_id,ul_bwp_id,&bwpd,&bwpc,&ubwpd,&ubwpc);
target_ss = NR_SearchSpace__searchSpaceType_PR_ue_Specific;
ul_layers_config(mac, pusch_config_pdu, dci);
ul_ports_config(mac, pusch_config_pdu, dci);
ul_ports_config(mac, &dmrslength, pusch_config_pdu, dci);
} else {
@@ -725,6 +732,7 @@ int nr_config_pusch_pdu(NR_UE_MAC_INST_t *mac,
return -1;
}
NR_PUSCH_ConfigCommon_t *pusch_ConfigCommon = ubwpc->pusch_ConfigCommon->choice.setup;
NR_PUSCH_TimeDomainResourceAllocationList_t *pusch_TimeDomainAllocationList = choose_ul_tda_list(pusch_Config,pusch_ConfigCommon);
@@ -748,7 +756,8 @@ int nr_config_pusch_pdu(NR_UE_MAC_INST_t *mac,
pusch_config_pdu->num_dmrs_cdm_grps_no_data = 2;
uint32_t n_RS_Id = 0;
if (NR_DMRS_ulconfig->transformPrecodingEnabled->nPUSCH_Identity != NULL)
if (NR_DMRS_ulconfig->transformPrecodingEnabled &&
NR_DMRS_ulconfig->transformPrecodingEnabled->nPUSCH_Identity != NULL)
n_RS_Id = *NR_DMRS_ulconfig->transformPrecodingEnabled->nPUSCH_Identity;
else
n_RS_Id = *mac->scc->physCellId;
@@ -823,19 +832,19 @@ int nr_config_pusch_pdu(NR_UE_MAC_INST_t *mac,
pusch_config_pdu->absolute_delta_PUSCH = 4;
}
if (NR_DMRS_ulconfig != NULL) {
if (NR_DMRS_ulconfig != NULL)
add_pos = (NR_DMRS_ulconfig->dmrs_AdditionalPosition == NULL) ? 2 : *NR_DMRS_ulconfig->dmrs_AdditionalPosition;
dmrslength = NR_DMRS_ulconfig->maxLength == NULL ? pusch_len1 : pusch_len2;
}
/* DMRS */
l_prime_mask = get_l_prime(pusch_config_pdu->nr_of_symbols,
mappingtype, add_pos, dmrslength,
pusch_config_pdu->start_symbol_index,
mac->scc ? mac->scc->dmrs_TypeA_Position : mac->mib->dmrs_TypeA_Position);
if ((mac->ULbwp[0] && pusch_config_pdu->transform_precoding == NR_PUSCH_Config__transformPrecoder_disabled))
pusch_config_pdu->num_dmrs_cdm_grps_no_data = 1;
else if (*dci_format == NR_UL_DCI_FORMAT_0_0 || (mac->ULbwp[0] && pusch_config_pdu->transform_precoding == NR_PUSCH_Config__transformPrecoder_enabled))
if ((mac->ULbwp[ul_bwp_id-1] && pusch_config_pdu->transform_precoding == NR_PUSCH_Config__transformPrecoder_disabled))
if (*dci_format != NR_UL_DCI_FORMAT_0_1) {
pusch_config_pdu->num_dmrs_cdm_grps_no_data = 1;
}
else if (*dci_format == NR_UL_DCI_FORMAT_0_0 || (mac->ULbwp[ul_bwp_id-1] && pusch_config_pdu->transform_precoding == NR_PUSCH_Config__transformPrecoder_enabled))
pusch_config_pdu->num_dmrs_cdm_grps_no_data = 2;
// Num PRB Overhead from PUSCH-ServingCellConfig
@@ -850,16 +859,16 @@ int nr_config_pusch_pdu(NR_UE_MAC_INST_t *mac,
else N_PRB_oh = 0;
/* PTRS */
if (mac->ULbwp[0] &&
mac->ULbwp[0]->bwp_Dedicated &&
mac->ULbwp[0]->bwp_Dedicated->pusch_Config &&
mac->ULbwp[0]->bwp_Dedicated->pusch_Config->choice.setup &&
mac->ULbwp[0]->bwp_Dedicated->pusch_Config->choice.setup->dmrs_UplinkForPUSCH_MappingTypeB &&
mac->ULbwp[0]->bwp_Dedicated->pusch_Config->choice.setup->dmrs_UplinkForPUSCH_MappingTypeB->choice.setup->phaseTrackingRS) {
if (mac->ULbwp[ul_bwp_id-1] &&
mac->ULbwp[ul_bwp_id-1]->bwp_Dedicated &&
mac->ULbwp[ul_bwp_id-1]->bwp_Dedicated->pusch_Config &&
mac->ULbwp[ul_bwp_id-1]->bwp_Dedicated->pusch_Config->choice.setup &&
mac->ULbwp[ul_bwp_id-1]->bwp_Dedicated->pusch_Config->choice.setup->dmrs_UplinkForPUSCH_MappingTypeB &&
mac->ULbwp[ul_bwp_id-1]->bwp_Dedicated->pusch_Config->choice.setup->dmrs_UplinkForPUSCH_MappingTypeB->choice.setup->phaseTrackingRS) {
if (pusch_config_pdu->transform_precoding == NR_PUSCH_Config__transformPrecoder_disabled) {
nfapi_nr_ue_ptrs_ports_t ptrs_ports_list;
pusch_config_pdu->pusch_ptrs.ptrs_ports_list = &ptrs_ports_list;
valid_ptrs_setup = set_ul_ptrs_values(mac->ULbwp[0]->bwp_Dedicated->pusch_Config->choice.setup->dmrs_UplinkForPUSCH_MappingTypeB->choice.setup->phaseTrackingRS->choice.setup,
valid_ptrs_setup = set_ul_ptrs_values(mac->ULbwp[ul_bwp_id-1]->bwp_Dedicated->pusch_Config->choice.setup->dmrs_UplinkForPUSCH_MappingTypeB->choice.setup->phaseTrackingRS->choice.setup,
pusch_config_pdu->rb_size, pusch_config_pdu->mcs_index, pusch_config_pdu->mcs_table,
&pusch_config_pdu->pusch_ptrs.ptrs_freq_density,&pusch_config_pdu->pusch_ptrs.ptrs_time_density,
&pusch_config_pdu->pusch_ptrs.ptrs_ports_list->ptrs_re_offset,&pusch_config_pdu->pusch_ptrs.num_ptrs_ports,
@@ -955,9 +964,10 @@ bool nr_ue_periodic_srs_scheduling(module_id_t mod_id, frame_t frame, slot_t slo
continue;
}
NR_BWP_t ubwp = mac->ULbwp[0] ?
mac->ULbwp[0]->bwp_Common->genericParameters :
mac->scc_SIB->uplinkConfigCommon->initialUplinkBWP.genericParameters;
NR_BWP_Id_t ul_bwp_id = mac->UL_BWP_Id;
NR_BWP_t ubwp = ul_bwp_id > 0 && mac->ULbwp[ul_bwp_id-1] ?
mac->ULbwp[ul_bwp_id-1]->bwp_Common->genericParameters :
mac->scc_SIB->uplinkConfigCommon->initialUplinkBWP.genericParameters;
uint16_t period = srs_period[srs_resource->resourceType.choice.periodic->periodicityAndOffset_p.present];
uint16_t offset = get_nr_srs_offset(srs_resource->resourceType.choice.periodic->periodicityAndOffset_p);
@@ -1077,6 +1087,7 @@ NR_UE_L2_STATE_t nr_ue_scheduler(nr_downlink_indication_t *dl_info, nr_uplink_in
fill_scheduled_response(&scheduled_response, &dcireq.dl_config_req, NULL, NULL, mod_id, cc_id, rx_frame, rx_slot, dl_info->thread_id, dl_info->phy_data);
if(mac->if_module != NULL && mac->if_module->scheduled_response != NULL)
LOG_D(NR_MAC,"1# scheduled_response transmitted, %d, %d\n", rx_frame, rx_slot);
mac->if_module->scheduled_response(&scheduled_response);
}
else {
@@ -1202,6 +1213,7 @@ NR_UE_L2_STATE_t nr_ue_scheduler(nr_downlink_indication_t *dl_info, nr_uplink_in
fill_scheduled_response(&scheduled_response, NULL, ul_config, &tx_req, mod_id, cc_id, frame_tx, slot_tx, ul_info->thread_id, NULL);
if(mac->if_module != NULL && mac->if_module->scheduled_response != NULL){
LOG_D(NR_MAC,"3# scheduled_response transmitted,%d, %d\n", frame_tx, slot_tx);
mac->if_module->scheduled_response(&scheduled_response);
}
pthread_mutex_lock(&ul_config->mutex_ul_config);
@@ -1544,7 +1556,9 @@ int nr_ue_pusch_scheduler(NR_UE_MAC_INST_t *mac,
uint8_t tda_id){
int delta = 0;
NR_BWP_Uplink_t *ubwp = mac->ULbwp[0];
NR_BWP_Id_t ul_bwp_id = mac->UL_BWP_Id;
NR_BWP_Uplink_t *ubwp = mac->ULbwp[ul_bwp_id-1];
// Get the numerology to calculate the Tx frame and slot
int mu = ubwp ?
ubwp->bwp_Common->genericParameters.subcarrierSpacing :
openair2/LAYER2/NR_MAC_gNB/config.c
+7 -6
View File
@@ -160,11 +160,10 @@ void process_CellGroup(NR_CellGroupConfig_t *CellGroup, NR_UE_sched_ctrl_t *sche
}
void config_common(int Mod_idP, int ssb_SubcarrierOffset, rrc_pdsch_AntennaPorts_t dl_antenna_ports_struct, int pusch_AntennaPorts, NR_ServingCellConfigCommon_t *scc) {
void config_common(int Mod_idP, int ssb_SubcarrierOffset, int pdsch_AntennaPorts, int pusch_AntennaPorts, NR_ServingCellConfigCommon_t *scc) {
nfapi_nr_config_request_scf_t *cfg = &RC.nrmac[Mod_idP]->config[0];
RC.nrmac[Mod_idP]->common_channels[0].ServingCellConfigCommon = scc;
int pdsch_AntennaPorts = dl_antenna_ports_struct.N1 * dl_antenna_ports_struct.N2 * dl_antenna_ports_struct.XP;
// Carrier configuration
@@ -416,8 +415,8 @@ void config_common(int Mod_idP, int ssb_SubcarrierOffset, rrc_pdsch_AntennaPorts
cfg->carrier_config.num_rx_ant.value = pusch_AntennaPorts;
AssertFatal(pusch_AntennaPorts > 0 && pusch_AntennaPorts < 13, "pusch_AntennaPorts in 1...12\n");
cfg->carrier_config.num_rx_ant.tl.tag = NFAPI_NR_CONFIG_NUM_RX_ANT_TAG;
LOG_I(NR_MAC,"Set TX/RX antenna number to %d (num ssb %d: %x,%x)\n",
cfg->carrier_config.num_tx_ant.value,num_ssb,cfg->ssb_table.ssb_mask_list[0].ssb_mask.value,cfg->ssb_table.ssb_mask_list[1].ssb_mask.value);
LOG_I(NR_MAC,"Set RX antenna number to %d, Set TX antenna number to %d (num ssb %d: %x,%x)\n",
cfg->carrier_config.num_tx_ant.value,cfg->carrier_config.num_rx_ant.value,num_ssb,cfg->ssb_table.ssb_mask_list[0].ssb_mask.value,cfg->ssb_table.ssb_mask_list[1].ssb_mask.value);
AssertFatal(cfg->carrier_config.num_tx_ant.value > 0,"carrier_config.num_tx_ant.value %d !\n",cfg->carrier_config.num_tx_ant.value );
cfg->num_tlv++;
cfg->num_tlv++;
@@ -467,7 +466,7 @@ int nr_mac_enable_ue_rrc_processing_timer(module_id_t Mod_idP, rnti_t rnti, NR_S
const uint16_t sf_ahead = 6/(0x01<<subcarrierSpacing) + ((6%(0x01<<subcarrierSpacing))>0);
const uint16_t sl_ahead = sf_ahead * (0x01<<subcarrierSpacing);
sched_ctrl->rrc_processing_timer = (rrc_reconfiguration_delay<<subcarrierSpacing) + sl_ahead;
LOG_I(NR_MAC, "Activating RRC processing timer for UE %d\n", UE_id);
LOG_I(NR_MAC, "Activating RRC processing timer for UE %d with %d ms\n", UE_id, rrc_reconfiguration_delay);
return 0;
}
@@ -508,9 +507,11 @@ int rrc_mac_config_req_gNB(module_id_t Mod_idP,
LOG_I(NR_MAC,"Configuring common parameters from NR ServingCellConfig\n");
int num_pdsch_antenna_ports = pdsch_AntennaPorts.N1 * pdsch_AntennaPorts.N2 * pdsch_AntennaPorts.XP;
RC.nrmac[Mod_idP]->xp_pdsch_antenna_ports = pdsch_AntennaPorts.XP;
config_common(Mod_idP,
ssb_SubcarrierOffset,
pdsch_AntennaPorts,
num_pdsch_antenna_ports,
pusch_AntennaPorts,
scc);
LOG_D(NR_MAC, "%s() %s:%d RC.nrmac[Mod_idP]->if_inst->NR_PHY_config_req:%p\n", __FUNCTION__, __FILE__, __LINE__, RC.nrmac[Mod_idP]->if_inst->NR_PHY_config_req);
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler.c
+2
View File
@@ -348,6 +348,8 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
nr_mac_update_timers(module_idP, frame, slot);
schedule_nr_bwp_switch(module_idP, frame, slot);
// This schedules MIB
schedule_nr_mib(module_idP, frame, slot);
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_RA.c
+60 -36
View File
@@ -571,13 +571,19 @@ void nr_initiate_ra_proc(module_id_t module_idP,
ra_rnti = 1 + symbol + (slotP * 14) + (freq_index * 14 * 80) + (ul_carrier_id * 14 * 80 * 8);
// This should be handled differently when we use the initialBWP for RA
ra->bwp_id = 0;
ra->dl_bwp_id = 0;//TODO
ra->ul_bwp_id = 0;
NR_BWP_Downlink_t *bwp=NULL;
if (ra->CellGroup && ra->CellGroup->spCellConfig && ra->CellGroup->spCellConfig->spCellConfigDedicated &&
if (ra->CellGroup && ra->CellGroup->spCellConfig && ra->CellGroup->spCellConfig->spCellConfigDedicated) {
if (ra->CellGroup->spCellConfig->spCellConfigDedicated->firstActiveDownlinkBWP_Id &&
ra->CellGroup->spCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList) {
ra->bwp_id = 1;
bwp = ra->CellGroup->spCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList->list.array[ra->bwp_id - 1];
}
ra->dl_bwp_id = *ra->CellGroup->spCellConfig->spCellConfigDedicated->firstActiveDownlinkBWP_Id;
bwp = ra->CellGroup->spCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList->list.array[ra->dl_bwp_id - 1];
}
if (ra->CellGroup->spCellConfig->spCellConfigDedicated->uplinkConfig &&
ra->CellGroup->spCellConfig->spCellConfigDedicated->uplinkConfig->firstActiveUplinkBWP_Id)
ra->ul_bwp_id = *ra->CellGroup->spCellConfig->spCellConfigDedicated->uplinkConfig->firstActiveUplinkBWP_Id;
}
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_INITIATE_RA_PROC, 1);
@@ -741,7 +747,7 @@ void nr_generate_Msg3_retransmission(module_id_t module_idP, int CC_id, frame_t
NR_PUSCH_TimeDomainResourceAllocationList_t *pusch_TimeDomainAllocationList = NULL;
NR_BWP_t *genericParameters = NULL;
if(ra->CellGroup) {
ubwp = ra->CellGroup->spCellConfig->spCellConfigDedicated->uplinkConfig->uplinkBWP_ToAddModList->list.array[ra->bwp_id-1];
ubwp = ra->CellGroup->spCellConfig->spCellConfigDedicated->uplinkConfig->uplinkBWP_ToAddModList->list.array[ra->ul_bwp_id-1];
ubwpd = ra->CellGroup->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP;
genericParameters = &ubwp->bwp_Common->genericParameters;
pusch_TimeDomainAllocationList = ubwp->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList;
@@ -888,7 +894,7 @@ void nr_generate_Msg3_retransmission(module_id_t module_idP, int CC_id, frame_t
ra->Msg3_tda_id,
ra->msg3_TPC,
0, // not used in format 0_0
ra->bwp_id);
ra->ul_bwp_id);
fill_dci_pdu_rel15(scc,
ra->CellGroup,
@@ -897,7 +903,8 @@ void nr_generate_Msg3_retransmission(module_id_t module_idP, int CC_id, frame_t
NR_UL_DCI_FORMAT_0_0,
NR_RNTI_TC,
pusch_pdu->bwp_size,
ra->bwp_id,
ra->ul_bwp_id,
coresetid,
nr_mac->cset0_bwp_size);
// Mark the corresponding RBs as used
@@ -1012,9 +1019,7 @@ void nr_get_Msg3alloc(module_id_t module_id,
int bwpStart = NRRIV2PRBOFFSET(scc->uplinkConfigCommon->initialUplinkBWP->genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
if (ra->CellGroup) {
AssertFatal(ra->CellGroup->spCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList->list.count == 1,
"downlinkBWP_ToAddModList has %d BWP!\n", ra->CellGroup->spCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList->list.count);
NR_BWP_Uplink_t *ubwp = ra->CellGroup->spCellConfig->spCellConfigDedicated->uplinkConfig->uplinkBWP_ToAddModList->list.array[ra->bwp_id - 1];
NR_BWP_Uplink_t *ubwp = ra->CellGroup->spCellConfig->spCellConfigDedicated->uplinkConfig->uplinkBWP_ToAddModList->list.array[ra->ul_bwp_id - 1];
int act_bwp_start = NRRIV2PRBOFFSET(ubwp->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
int act_bwp_size = NRRIV2BW(ubwp->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
if (!((bwpStart >= act_bwp_start) && ((bwpStart+bwpSize) <= (act_bwp_start+act_bwp_size))))
@@ -1164,9 +1169,7 @@ void nr_add_msg3(module_id_t module_idP, int CC_id, frame_t frameP, sub_frame_t
int mappingtype = scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[ra->Msg3_tda_id]->mappingType;
if (ra->CellGroup) {
AssertFatal(ra->CellGroup->spCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList->list.count == 1,
"downlinkBWP_ToAddModList has %d BWP!\n", ra->CellGroup->spCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList->list.count);
NR_BWP_Uplink_t *ubwp = ra->CellGroup->spCellConfig->spCellConfigDedicated->uplinkConfig->uplinkBWP_ToAddModList->list.array[ra->bwp_id - 1];
NR_BWP_Uplink_t *ubwp = ra->CellGroup->spCellConfig->spCellConfigDedicated->uplinkConfig->uplinkBWP_ToAddModList->list.array[ra->ul_bwp_id - 1];
startSymbolAndLength = ubwp->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[ra->Msg3_tda_id]->startSymbolAndLength;
mappingtype = ubwp->bwp_Common->pusch_ConfigCommon->choice.setup->pusch_TimeDomainAllocationList->list.array[ra->Msg3_tda_id]->mappingType;
@@ -1227,8 +1230,8 @@ void nr_generate_Msg2(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra
ra->CellGroup->spCellConfig &&
ra->CellGroup->spCellConfig->spCellConfigDedicated &&
ra->CellGroup->spCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList &&
ra->CellGroup->spCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList->list.array[ra->bwp_id-1]) {
bwp = ra->CellGroup->spCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList->list.array[ra->bwp_id-1];
ra->CellGroup->spCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList->list.array[ra->dl_bwp_id-1]) {
bwp = ra->CellGroup->spCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList->list.array[ra->dl_bwp_id-1];
genericParameters = &bwp->bwp_Common->genericParameters;
pdsch_TimeDomainAllocationList = bwp->bwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList;
}
@@ -1483,6 +1486,7 @@ void nr_generate_Msg2(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra
NR_RNTI_RA,
BWPSize,
bwpid,
coresetid,
nr_mac->cset0_bwp_size);
// DL TX request
@@ -1490,7 +1494,7 @@ void nr_generate_Msg2(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra
// Program UL processing for Msg3
NR_BWP_Uplink_t *ubwp = ra->CellGroup ?
ra->CellGroup->spCellConfig->spCellConfigDedicated->uplinkConfig->uplinkBWP_ToAddModList->list.array[ra->bwp_id-1] :
ra->CellGroup->spCellConfig->spCellConfigDedicated->uplinkConfig->uplinkBWP_ToAddModList->list.array[ra->dl_bwp_id-1] :
NULL;
nr_get_Msg3alloc(module_idP, CC_id, scc, ubwp, slotP, frameP, ra, nr_mac->tdd_beam_association);
nr_add_msg3(module_idP, CC_id, frameP, slotP, ra, (uint8_t *) &tx_req->TLVs[0].value.direct[0]);
@@ -1547,8 +1551,8 @@ void nr_generate_Msg4(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra
ra->CellGroup->spCellConfig &&
ra->CellGroup->spCellConfig->spCellConfigDedicated &&
ra->CellGroup->spCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList &&
ra->CellGroup->spCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList->list.array[ra->bwp_id-1]) {
bwp = ra->CellGroup->spCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList->list.array[ra->bwp_id-1];
ra->CellGroup->spCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList->list.array[ra->dl_bwp_id-1]) {
bwp = ra->CellGroup->spCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList->list.array[ra->dl_bwp_id-1];
pdsch_TimeDomainAllocationList = bwp->bwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList;
}
else {
@@ -1647,13 +1651,25 @@ void nr_generate_Msg4(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra
} else {
uint16_t mac_pdu_length = nr_write_ce_dlsch_pdu(module_idP, nr_mac->sched_ctrlCommon, buf, 255, ra->cont_res_id);
LOG_D(NR_MAC,"Encoded contention resolution mac_pdu_length %d\n",mac_pdu_length);
uint16_t mac_sdu_length = mac_rrc_nr_data_req(module_idP, CC_id, frameP, CCCH, ra->rnti, 1, &buf[mac_pdu_length+2]);
((NR_MAC_SUBHEADER_SHORT *) &buf[mac_pdu_length])->R = 0;
((NR_MAC_SUBHEADER_SHORT *) &buf[mac_pdu_length])->F = 0;
((NR_MAC_SUBHEADER_SHORT *) &buf[mac_pdu_length])->LCID = DL_SCH_LCID_CCCH;
((NR_MAC_SUBHEADER_SHORT *) &buf[mac_pdu_length])->L = mac_sdu_length;
ra->mac_pdu_length = mac_pdu_length + mac_sdu_length + sizeof(NR_MAC_SUBHEADER_SHORT);
LOG_D(NR_MAC,"Encoded RRCSetup Piggyback (%d + %d bytes), mac_pdu_length %d\n", mac_sdu_length, (int)sizeof(NR_MAC_SUBHEADER_SHORT), ra->mac_pdu_length);
uint8_t buffer[CCCH_SDU_SIZE];
uint8_t mac_subheader_len = sizeof(NR_MAC_SUBHEADER_SHORT);
uint16_t mac_sdu_length = mac_rrc_nr_data_req(module_idP, CC_id, frameP, CCCH, ra->rnti, 1, buffer);
if (mac_sdu_length < 256) {
((NR_MAC_SUBHEADER_SHORT *) &buf[mac_pdu_length])->R = 0;
((NR_MAC_SUBHEADER_SHORT *) &buf[mac_pdu_length])->F = 0;
((NR_MAC_SUBHEADER_SHORT *) &buf[mac_pdu_length])->LCID = DL_SCH_LCID_CCCH;
((NR_MAC_SUBHEADER_SHORT *) &buf[mac_pdu_length])->L = mac_sdu_length;
ra->mac_pdu_length = mac_pdu_length + mac_sdu_length + sizeof(NR_MAC_SUBHEADER_SHORT);
} else {
mac_subheader_len = sizeof(NR_MAC_SUBHEADER_LONG);
((NR_MAC_SUBHEADER_LONG *) &buf[mac_pdu_length])->R = 0;
((NR_MAC_SUBHEADER_LONG *) &buf[mac_pdu_length])->F = 1;
((NR_MAC_SUBHEADER_LONG *) &buf[mac_pdu_length])->LCID = DL_SCH_LCID_CCCH;
((NR_MAC_SUBHEADER_LONG *) &buf[mac_pdu_length])->L = htons(mac_sdu_length);
ra->mac_pdu_length = mac_pdu_length + mac_sdu_length + sizeof(NR_MAC_SUBHEADER_LONG);
}
LOG_I(NR_MAC,"Encoded RRCSetup Piggyback (%d + %d bytes), mac_pdu_length %d\n", mac_sdu_length, mac_subheader_len, ra->mac_pdu_length);
memcpy(&buf[mac_pdu_length + mac_subheader_len], buffer, mac_sdu_length);
}
}
@@ -1722,6 +1738,8 @@ void nr_generate_Msg4(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra
rbSize, nrOfSymbols, N_PRB_DMRS * N_DMRS_SLOT, 0, tb_scaling,1) >> 3;
} while (harq->tb_size < ra->mac_pdu_length && mcsIndex<=28);
AssertFatal(harq->tb_size >= ra->mac_pdu_length,"Cannot allocate Msg4\n");
int i = 0;
while ((i < rbSize) && (rbStart + rbSize <= BWPSize)) {
if (vrb_map[BWPStart + rbStart + i]&SL_to_bitmap(startSymbolIndex, nrOfSymbols)) {
@@ -1878,6 +1896,7 @@ void nr_generate_Msg4(module_id_t module_idP, int CC_id, frame_t frameP, sub_fra
NR_RNTI_TC,
pdsch_pdu_rel15->BWPSize,
bwpid,
coresetid,
nr_mac->cset0_bwp_size);
// Add padding header and zero rest out if there is space left
@@ -1968,23 +1987,28 @@ void nr_check_Msg4_Ack(module_id_t module_id, int CC_id, frame_t frame, sub_fram
UE_info->active[UE_id] = true;
UE_info->Msg4_ACKed[UE_id] = true;
const NR_SIB1_t *sib1 = RC.nrmac[module_id]->common_channels[0].sib1 ? RC.nrmac[module_id]->common_channels[0].sib1->message.choice.c1->choice.systemInformationBlockType1 : NULL;
NR_BWP_t *genericParameters = get_dl_bwp_genericParameters(sched_ctrl->active_bwp,
RC.nrmac[module_id]->common_channels[0].ServingCellConfigCommon,
sib1);
// Pause scheduling according to:
// 3GPP TS 38.331 Section 12 Table 12.1-1: UE performance requirements for RRC procedures for UEs
sched_ctrl->rrc_processing_timer = (NR_RRC_SETUP_DELAY_MS << genericParameters->subcarrierSpacing); // RRCSetup 10 ms
}
else {
const NR_COMMON_channels_t *common_channels = &RC.nrmac[module_id]->common_channels[0];
const NR_SIB1_t *sib1 = common_channels->sib1 ? common_channels->sib1->message.choice.c1->choice.systemInformationBlockType1 : NULL;
const NR_ServingCellConfig_t *servingCellConfig = UE_info->CellGroup[UE_id] ? UE_info->CellGroup[UE_id]->spCellConfig->spCellConfigDedicated : NULL;
NR_BWP_t *genericParameters = get_dl_bwp_genericParameters(sched_ctrl->active_bwp,
common_channels->ServingCellConfigCommon,
sib1);
uint32_t delay_ms = servingCellConfig && servingCellConfig->downlinkBWP_ToAddModList ?
NR_RRC_SETUP_DELAY_MS + NR_RRC_BWP_SWITCHING_DELAY_MS : NR_RRC_SETUP_DELAY_MS;
sched_ctrl->rrc_processing_timer = (delay_ms << genericParameters->subcarrierSpacing);
LOG_I(NR_MAC, "(%d.%d) Activating RRC processing timer for UE %d with %d ms\n", frame, slot, UE_id, delay_ms);
} else {
LOG_I(NR_MAC, "(ue %i, rnti 0x%04x) RA Procedure failed at Msg4!\n", UE_id, ra->rnti);
}
nr_clear_ra_proc(module_id, CC_id, frame, ra);
if(sched_ctrl->retrans_dl_harq.head >= 0) {
if (sched_ctrl->retrans_dl_harq.head >= 0) {
remove_nr_list(&sched_ctrl->retrans_dl_harq, current_harq_pid);
}
}
else {
} else {
LOG_D(NR_MAC, "(ue %i, rnti 0x%04x) Received Nack of RA-Msg4. Preparing retransmission!\n", UE_id, ra->rnti);
ra->Msg4_frame = (frame + 1) % 1024;
ra->Msg4_slot = 1;
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_bch.c
+1
View File
@@ -552,6 +552,7 @@ void nr_fill_nfapi_dl_sib1_pdu(int Mod_idP,
rnti_type,
pdsch_pdu_rel15->BWPSize,
0,
0,
gNB_mac->cset0_bwp_size);
LOG_D(MAC,"BWPSize: %i\n", pdcch_pdu_rel15->BWPSize);
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_dlsch.c
+23 -13
View File
@@ -535,7 +535,6 @@ bool allocate_dl_retransmission(module_id_t module_id,
int UE_id,
int current_harq_pid) {
gNB_MAC_INST *nr_mac = RC.nrmac[module_id];
const NR_ServingCellConfigCommon_t *scc = nr_mac->common_channels->ServingCellConfigCommon;
NR_UE_info_t *UE_info = &nr_mac->UE_info;
@@ -756,8 +755,7 @@ void pf_dl(module_id_t module_id,
/* retransmission */
if (sched_pdsch->dl_harq_pid >= 0) {
/* Allocate retransmission */
bool r = allocate_dl_retransmission(
module_id, frame, slot, rballoc_mask, &n_rb_sched, UE_id, sched_pdsch->dl_harq_pid);
bool r = allocate_dl_retransmission(module_id, frame, slot, rballoc_mask, &n_rb_sched, UE_id, sched_pdsch->dl_harq_pid);
if (!r) {
LOG_D(NR_MAC, "%4d.%2d retransmission can NOT be allocated\n", frame, slot);
@@ -998,7 +996,6 @@ void nr_fr1_dlsch_preprocessor(module_id_t module_id, frame_t frame, sub_frame_t
const int startSymbolAndLength = tdaList->list.array[tda]->startSymbolAndLength;
SLIV2SL(startSymbolAndLength, &startSymbolIndex, &nrOfSymbols);
const NR_SIB1_t *sib1 = RC.nrmac[module_id]->common_channels[0].sib1 ? RC.nrmac[module_id]->common_channels[0].sib1->message.choice.c1->choice.systemInformationBlockType1 : NULL;
NR_BWP_t *genericParameters = get_dl_bwp_genericParameters(sched_ctrl->active_bwp,
RC.nrmac[module_id]->common_channels[0].ServingCellConfigCommon,
@@ -1026,9 +1023,9 @@ void nr_fr1_dlsch_preprocessor(module_id_t module_id, frame_t frame, sub_frame_t
rballoc_mask[i] = (~vrb_map[i+BWPStart])&0x3fff; //bitwise not and 14 symbols
// if all the pdsch symbols are free
if((rballoc_mask[i]&slbitmap) ==
slbitmap)
if ((rballoc_mask[i]&slbitmap) == slbitmap) {
n_rb_sched++;
}
}
/* Retrieve amount of data to send for this UE */
@@ -1186,7 +1183,7 @@ void nr_schedule_ue_spec(module_id_t module_id,
NR_SearchSpace_t *ss = (bwp||bwpd) ? sched_ctrl->search_space : gNB_mac->sched_ctrlCommon->search_space;
const int bwpid = bwp ? bwp->bwp_Id : 0;
const int bwp_id = bwp ? bwp->bwp_Id : 0;
const int coresetid = (bwp||bwpd) ? sched_ctrl->coreset->controlResourceSetId : gNB_mac->sched_ctrlCommon->coreset->controlResourceSetId;
/* look up the PDCCH PDU for this CC, BWP, and CORESET. If it does not exist, create it */
@@ -1200,7 +1197,7 @@ void nr_schedule_ue_spec(module_id_t module_id,
dl_tti_pdcch_pdu->PDUSize = (uint8_t)(2+sizeof(nfapi_nr_dl_tti_pdcch_pdu));
dl_req->nPDUs += 1;
pdcch_pdu = &dl_tti_pdcch_pdu->pdcch_pdu.pdcch_pdu_rel15;
LOG_D(NR_MAC,"Trying to configure DL pdcch for UE %d, bwp %d, cs %d\n",UE_id,bwpid,coresetid);
LOG_D(NR_MAC,"Trying to configure DL pdcch for UE %d, bwp %d, cs %d\n",UE_id,bwp_id,coresetid);
NR_ControlResourceSet_t *coreset = (bwp||bwpd)? sched_ctrl->coreset:gNB_mac->sched_ctrlCommon->coreset;
nr_configure_pdcch(pdcch_pdu, coreset, genericParameters, &sched_ctrl->sched_pdcch);
gNB_mac->pdcch_pdu_idx[CC_id][coresetid] = pdcch_pdu;
@@ -1259,7 +1256,18 @@ void nr_schedule_ue_spec(module_id_t module_id,
// Resource Allocation in time domain
pdsch_pdu->StartSymbolIndex = ps->startSymbolIndex;
pdsch_pdu->NrOfSymbols = ps->nrOfSymbols;
// Precoding
if (sched_ctrl->set_pmi) {
int report_id = sched_ctrl->CSI_report.cri_ri_li_pmi_cqi_report.csi_report_id;
nr_csi_report_t *csi_report = &UE_info->csi_report_template[UE_id][report_id];
pdsch_pdu->precodingAndBeamforming.prg_size = pdsch_pdu->rbSize;
pdsch_pdu->precodingAndBeamforming.prgs_list[0].pm_idx = set_pm_index(sched_ctrl,
nrOfLayers,
csi_report->N1,
csi_report->N2,
gNB_mac->xp_pdsch_antenna_ports,
csi_report->codebook_mode);
}
// TBS_LBRM according to section 5.4.2.1 of 38.212
long *maxMIMO_Layers = cg->spCellConfig->spCellConfigDedicated->pdsch_ServingCellConfig->choice.setup->ext1->maxMIMO_Layers;
AssertFatal (maxMIMO_Layers != NULL,"Option with max MIMO layers not configured is not supported\n");
@@ -1324,7 +1332,8 @@ void nr_schedule_ue_spec(module_id_t module_id,
memset(&dci_payload, 0, sizeof(dci_pdu_rel15_t));
// bwp indicator
const int n_dl_bwp = bwp ? cg->spCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList->list.count : 0;
AssertFatal(n_dl_bwp <= 1, "downlinkBWP_ToAddModList has %d BWP!\n", n_dl_bwp);
AssertFatal(n_dl_bwp <= NR_MAX_NUM_BWP, "downlinkBWP_ToAddModList has %d BWP!\n", n_dl_bwp);
// as per table 7.3.1.1.2-1 in 38.212
dci_payload.bwp_indicator.val = bwp ? (n_dl_bwp < 4 ? bwp->bwp_Id : bwp->bwp_Id - 1) : 0;
@@ -1348,13 +1357,14 @@ void nr_schedule_ue_spec(module_id_t module_id,
dci_payload.dmrs_sequence_initialization.val = pdsch_pdu->SCID;
LOG_D(NR_MAC,
"%4d.%2d DCI type 1 payload: freq_alloc %d (%d,%d,%d), "
"time_alloc %d, vrb to prb %d, mcs %d tb_scaling %d ndi %d rv %d tpc %d ti %d\n",
"nrOfLayers %d, time_alloc %d, vrb to prb %d, mcs %d tb_scaling %d ndi %d rv %d tpc %d ti %d\n",
frame,
slot,
dci_payload.frequency_domain_assignment.val,
pdsch_pdu->rbStart,
pdsch_pdu->rbSize,
pdsch_pdu->BWPSize,
pdsch_pdu->nrOfLayers,
dci_payload.time_domain_assignment.val,
dci_payload.vrb_to_prb_mapping.val,
dci_payload.mcs,
@@ -1364,7 +1374,6 @@ void nr_schedule_ue_spec(module_id_t module_id,
dci_payload.tpc,
pucch->timing_indicator);
int dci_format = ss && ss->searchSpaceType && ss->searchSpaceType->present == NR_SearchSpace__searchSpaceType_PR_ue_Specific ?
NR_DL_DCI_FORMAT_1_1 : NR_DL_DCI_FORMAT_1_0;
@@ -1376,7 +1385,8 @@ void nr_schedule_ue_spec(module_id_t module_id,
dci_format,
rnti_type,
pdsch_pdu->BWPSize,
bwp? bwp->bwp_Id : 0,
bwp ? bwp->bwp_Id : 0,
coresetid,
gNB_mac->cset0_bwp_size);
LOG_D(NR_MAC,
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_phytest.c
+10 -3
View File
@@ -285,6 +285,7 @@ void nr_preprocessor_phytest(module_id_t module_id,
/* find largest unallocated chunk */
const int bwpSize = NRRIV2BW(sched_ctrl->active_bwp->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
const int BWPStart = NRRIV2PRBOFFSET(sched_ctrl->active_bwp->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
int rbStart = 0;
int rbSize = 0;
if (target_dl_bw>bwpSize)
@@ -413,6 +414,7 @@ void nr_preprocessor_phytest(module_id_t module_id,
uint32_t target_ul_mcs = 9;
uint32_t target_ul_bw = 50;
uint32_t target_ul_Nl = 1;
uint64_t ulsch_slot_bitmap = (1 << 8);
bool nr_ul_preprocessor_phytest(module_id_t module_id, frame_t frame, sub_frame_t slot)
{
@@ -456,15 +458,19 @@ bool nr_ul_preprocessor_phytest(module_id_t module_id, frame_t frame, sub_frame_
sched_ctrl->search_space->searchSpaceType->present == NR_SearchSpace__searchSpaceType_PR_ue_Specific) ?
sched_ctrl->search_space->searchSpaceType->choice.ue_Specific->dci_Formats : 0;
const int dci_format = f ? NR_UL_DCI_FORMAT_0_1 : NR_UL_DCI_FORMAT_0_0;
const uint8_t num_dmrs_cdm_grps_no_data = 1;
uint8_t num_dmrs_cdm_grps_no_data = 1;
if ((target_ul_Nl==4)||(target_ul_Nl==3))
num_dmrs_cdm_grps_no_data = 2;
/* we want to avoid a lengthy deduction of DMRS and other parameters in
* every TTI if we can save it, so check whether dci_format, TDA, or
* num_dmrs_cdm_grps_no_data has changed and only then recompute */
NR_pusch_semi_static_t *ps = &sched_ctrl->pusch_semi_static;
if (ps->time_domain_allocation != tda
|| ps->dci_format != dci_format
|| ps->nrOfLayers != target_ul_Nl
|| ps->num_dmrs_cdm_grps_no_data != num_dmrs_cdm_grps_no_data)
nr_set_pusch_semi_static(NULL, scc, sched_ctrl->active_ubwp, NULL,dci_format, tda, num_dmrs_cdm_grps_no_data, ps);
nr_set_pusch_semi_static(NULL, scc, sched_ctrl->active_ubwp, NULL,dci_format, tda, num_dmrs_cdm_grps_no_data,target_ul_Nl,ps);
uint16_t rbStart = 0;
uint16_t rbSize;
@@ -537,6 +543,7 @@ bool nr_ul_preprocessor_phytest(module_id_t module_id, frame_t frame, sub_frame_
sched_pusch->ul_harq_pid = sched_ctrl->retrans_ul_harq.head;
/* Calculate TBS from MCS */
ps->nrOfLayers = target_ul_Nl;
sched_pusch->R = nr_get_code_rate_ul(mcs, ps->mcs_table);
sched_pusch->Qm = nr_get_Qm_ul(mcs, ps->mcs_table);
if (ps->pusch_Config->tp_pi2BPSK
@@ -551,7 +558,7 @@ bool nr_ul_preprocessor_phytest(module_id_t module_id, frame_t frame, sub_frame_
ps->N_PRB_DMRS * ps->num_dmrs_symb,
0, // nb_rb_oh
0,
1 /* NrOfLayers */)
ps->nrOfLayers /* NrOfLayers */)
>> 3;
/* mark the corresponding RBs as used */
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_primitives.c
+111 -25
View File
@@ -145,6 +145,31 @@ uint8_t set_dl_nrOfLayers(NR_UE_sched_ctrl_t *sched_ctrl) {
}
uint16_t set_pm_index(NR_UE_sched_ctrl_t *sched_ctrl,
int layers,
int N1, int N2,
int xp_pdsch_antenna_ports,
int codebook_mode) {
int antenna_ports = (N1*N2)<<1;
if (xp_pdsch_antenna_ports == 1 &&
antenna_ports>1)
return 0; //identity matrix (basic 5G configuration handled by PMI report is with XP antennas)
int x1 = sched_ctrl->CSI_report.cri_ri_li_pmi_cqi_report.pmi_x1;
int x2 = sched_ctrl->CSI_report.cri_ri_li_pmi_cqi_report.pmi_x2;
LOG_D(NR_MAC,"PMI report: x1 %d x2 %d\n",x1,x2);
sched_ctrl->set_pmi = false;
if (antenna_ports == 2)
return x2;
else
AssertFatal(1==0,"More than 2 antenna ports not yet supported\n");
}
void set_dl_mcs(NR_sched_pdsch_t *sched_pdsch,
NR_UE_sched_ctrl_t *sched_ctrl,
uint8_t *target_mcs,
@@ -187,7 +212,7 @@ void set_dl_mcs(NR_sched_pdsch_t *sched_pdsch,
}
}
}
sched_ctrl->set_mcs = FALSE;
sched_ctrl->set_mcs = false;
}
}
@@ -598,26 +623,24 @@ void nr_set_pdsch_semi_static(const NR_SIB1_t *sib1,
}
LOG_D(NR_MAC,"MCS Table Index: %d\n",ps->mcsTableIdx);
NR_PDSCH_Config_t *pdsch_Config=NULL;
if (bwpd) pdsch_Config = bwpd->pdsch_Config->choice.setup;
NR_PDSCH_Config_t *pdsch_Config = NULL;
if (bwpd && bwpd->pdsch_Config) pdsch_Config = bwpd->pdsch_Config->choice.setup;
LOG_D(NR_MAC,"tda %d, ps->time_domain_allocation %d,layers %d, ps->nrOfLayers %d, pdsch_config %p\n",tda,ps->time_domain_allocation,layers,ps->nrOfLayers,pdsch_Config);
if (ps->time_domain_allocation != tda) {
reset_dmrs = true;
ps->time_domain_allocation = tda;
NR_PDSCH_TimeDomainResourceAllocationList_t *tdaList = get_pdsch_TimeDomainAllocationList(bwp, scc, sib1);
AssertFatal(tda < tdaList->list.count, "time_domain_allocation %d>=%d\n", tda, tdaList->list.count);
ps->mapping_type = tdaList->list.array[tda]->mappingType;
if (pdsch_Config) {
if (ps->mapping_type == NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeB)
ps->dmrsConfigType = pdsch_Config->dmrs_DownlinkForPDSCH_MappingTypeB->choice.setup->dmrs_Type == NULL ? 0 : 1;
else
ps->dmrsConfigType = pdsch_Config->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->dmrs_Type == NULL ? 0 : 1;
}
reset_dmrs = true;
ps->time_domain_allocation = tda;
NR_PDSCH_TimeDomainResourceAllocationList_t *tdaList = get_pdsch_TimeDomainAllocationList(bwp, scc, sib1);
AssertFatal(tda < tdaList->list.count, "time_domain_allocation %d>=%d\n", tda, tdaList->list.count);
ps->mapping_type = tdaList->list.array[tda]->mappingType;
if (pdsch_Config) {
if (ps->mapping_type == NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeB)
ps->dmrsConfigType = pdsch_Config->dmrs_DownlinkForPDSCH_MappingTypeB->choice.setup->dmrs_Type == NULL ? 0 : 1;
else
ps->dmrsConfigType = NFAPI_NR_DMRS_TYPE1;
const int startSymbolAndLength = tdaList->list.array[tda]->startSymbolAndLength;
SLIV2SL(startSymbolAndLength, &ps->startSymbolIndex, &ps->nrOfSymbols);
ps->dmrsConfigType = pdsch_Config->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->dmrs_Type == NULL ? 0 : 1;
}
else
ps->dmrsConfigType = NFAPI_NR_DMRS_TYPE1;
const int startSymbolAndLength = tdaList->list.array[tda]->startSymbolAndLength;
SLIV2SL(startSymbolAndLength, &ps->startSymbolIndex, &ps->nrOfSymbols);
const long f = ((bwp || bwpd) &&
sched_ctrl->search_space &&
@@ -665,7 +688,9 @@ void nr_set_pusch_semi_static(const NR_SIB1_t *sib1,
long dci_format,
int tda,
uint8_t num_dmrs_cdm_grps_no_data,
uint8_t nrOfLayers,
NR_pusch_semi_static_t *ps) {
ps->dci_format = dci_format;
ps->time_domain_allocation = tda;
@@ -707,6 +732,7 @@ void nr_set_pusch_semi_static(const NR_SIB1_t *sib1,
num_dmrs_cdm_grps_no_data = 2; // in case of transform precoding - no Data sent in DMRS symbol
}
ps->nrOfLayers = nrOfLayers;
ps->num_dmrs_cdm_grps_no_data = num_dmrs_cdm_grps_no_data;
/* DMRS calculations */
@@ -1007,8 +1033,16 @@ void config_uldci(const NR_SIB1_t *sib1,
"Non Codebook configuration non supported\n");
dci_pdu_rel15->srs_resource_indicator.val = 0; // taking resource 0 for SRS
}
dci_pdu_rel15->precoding_information.val= 0;
if (pusch_pdu->nrOfLayers == 2)
dci_pdu_rel15->precoding_information.val = 4;
else if (pusch_pdu->nrOfLayers == 4)
dci_pdu_rel15->precoding_information.val = 11;
// antenna_ports.val = 0 for transform precoder is disabled, dmrs-Type=1, maxLength=1, Rank=1/2/3/4
// Antenna Ports
dci_pdu_rel15->antenna_ports.val = 0; // TODO for now it is hardcoded, it should depends on cdm group no data and rank
dci_pdu_rel15->antenna_ports.val = 0;
// DMRS sequence initialization
dci_pdu_rel15->dmrs_sequence_initialization.val = pusch_pdu->scid;
break;
@@ -1017,11 +1051,14 @@ void config_uldci(const NR_SIB1_t *sib1,
}
LOG_D(NR_MAC,
"%s() ULDCI type 0 payload: freq_alloc %d, time_alloc %d, freq_hop_flag %d, mcs %d tpc %d ndi %d rv %d\n",
"%s() ULDCI type 0 payload: dci_format %d, freq_alloc %d, time_alloc %d, freq_hop_flag %d, precoding_information.val %d antenna_ports.val %d mcs %d tpc %d ndi %d rv %d\n",
__func__,
dci_format,
dci_pdu_rel15->frequency_domain_assignment.val,
dci_pdu_rel15->time_domain_assignment.val,
dci_pdu_rel15->frequency_hopping_flag.val,
dci_pdu_rel15->precoding_information.val,
dci_pdu_rel15->antenna_ports.val,
dci_pdu_rel15->mcs,
dci_pdu_rel15->tpc,
dci_pdu_rel15->ndi,
@@ -1482,12 +1519,13 @@ void fill_dci_pdu_rel15(const NR_ServingCellConfigCommon_t *scc,
int rnti_type,
int N_RB,
int bwp_id,
NR_ControlResourceSetId_t coreset_id,
uint16_t cset0_bwp_size) {
uint8_t fsize = 0, pos = 0;
uint64_t *dci_pdu = (uint64_t *)pdcch_dci_pdu->Payload;
*dci_pdu=0;
int dci_size = nr_dci_size(scc->downlinkConfigCommon->initialDownlinkBWP,scc->uplinkConfigCommon->initialUplinkBWP, CellGroup, dci_pdu_rel15, dci_format, rnti_type, N_RB, bwp_id, cset0_bwp_size);
int dci_size = nr_dci_size(scc->downlinkConfigCommon->initialDownlinkBWP,scc->uplinkConfigCommon->initialUplinkBWP, CellGroup, dci_pdu_rel15, dci_format, rnti_type, N_RB, bwp_id, coreset_id, cset0_bwp_size);
pdcch_dci_pdu->PayloadSizeBits = dci_size;
AssertFatal(dci_size <= 64, "DCI sizes above 64 bits not yet supported");
if (dci_format == NR_DL_DCI_FORMAT_1_1 || dci_format == NR_UL_DCI_FORMAT_0_1)
@@ -2319,6 +2357,7 @@ int add_new_nr_ue(module_id_t mod_idP, rnti_t rntiP, NR_CellGroupConfig_t *CellG
NR_UE_sched_ctrl_t *sched_ctrl = &UE_info->UE_sched_ctrl[UE_id];
memset(sched_ctrl, 0, sizeof(*sched_ctrl));
sched_ctrl->set_mcs = true;
sched_ctrl->set_pmi = false;
sched_ctrl->ta_frame = 0;
sched_ctrl->ta_update = 31;
sched_ctrl->ta_apply = false;
@@ -2338,7 +2377,7 @@ int add_new_nr_ue(module_id_t mod_idP, rnti_t rntiP, NR_CellGroupConfig_t *CellG
/* Set default BWPs */
const struct NR_ServingCellConfig__downlinkBWP_ToAddModList *bwpList = servingCellConfig ? servingCellConfig->downlinkBWP_ToAddModList : NULL;
if (bwpList) AssertFatal(bwpList->list.count == 1,
if (bwpList) AssertFatal(bwpList->list.count <= NR_MAX_NUM_BWP,
"downlinkBWP_ToAddModList has %d BWP!\n",
bwpList->list.count);
@@ -2362,8 +2401,10 @@ int add_new_nr_ue(module_id_t mod_idP, rnti_t rntiP, NR_CellGroupConfig_t *CellG
scc,
genericParameters,
NULL);
sched_ctrl->next_dl_bwp_id = -1;
sched_ctrl->next_ul_bwp_id = -1;
const struct NR_UplinkConfig__uplinkBWP_ToAddModList *ubwpList = servingCellConfig ? servingCellConfig->uplinkConfig->uplinkBWP_ToAddModList : NULL;
if (ubwpList) AssertFatal(ubwpList->list.count == 1,
if (ubwpList) AssertFatal(ubwpList->list.count <= NR_MAX_NUM_BWP,
"uplinkBWP_ToAddModList has %d BWP!\n",
ubwpList->list.count);
const int ul_bwp_id = servingCellConfig ? *servingCellConfig->uplinkConfig->firstActiveUplinkBWP_Id : 0;
@@ -2634,7 +2675,7 @@ void nr_csirs_scheduling(int Mod_idP,
nfapi_nr_dl_tti_request_body_t *dl_req = &gNB_mac->DL_req[CC_id].dl_tti_request_body;
NR_BWP_t *genericParameters = sched_ctrl->active_bwp ?
&sched_ctrl->active_bwp->bwp_Common->genericParameters:
&sched_ctrl->active_bwp->bwp_Common->genericParameters :
&gNB_mac->common_channels[0].ServingCellConfigCommon->downlinkConfigCommon->initialDownlinkBWP->genericParameters;
for (int id = 0; id < csi_measconfig->nzp_CSI_RS_ResourceToAddModList->list.count; id++){
nzpcsi = csi_measconfig->nzp_CSI_RS_ResourceToAddModList->list.array[id];
@@ -2832,8 +2873,26 @@ void nr_mac_update_timers(module_id_t module_id,
LOG_I(NR_MAC, "(%d.%d) De-activating RRC processing timer for UE %d\n", frame, slot, UE_id);
const NR_SIB1_t *sib1 = RC.nrmac[module_id]->common_channels[0].sib1 ? RC.nrmac[module_id]->common_channels[0].sib1->message.choice.c1->choice.systemInformationBlockType1 : NULL;
NR_ServingCellConfigCommon_t *scc = RC.nrmac[module_id]->common_channels[0].ServingCellConfigCommon;
NR_CellGroupConfig_t *cg = UE_info->CellGroup[UE_id];
NR_ServingCellConfigCommon_t *scc = RC.nrmac[module_id]->common_channels[0].ServingCellConfigCommon;
const NR_ServingCellConfig_t *spCellConfigDedicated = cg && cg->spCellConfig ? cg->spCellConfig->spCellConfigDedicated : NULL;
// If needed, update the Dedicated BWP
const int current_bwp_id = sched_ctrl->active_bwp ? sched_ctrl->active_bwp->bwp_Id : 0;
const int current_ubwp_id = sched_ctrl->active_ubwp ? sched_ctrl->active_ubwp->bwp_Id : 0;
if (spCellConfigDedicated &&
spCellConfigDedicated->downlinkBWP_ToAddModList &&
spCellConfigDedicated->uplinkConfig &&
spCellConfigDedicated->uplinkConfig->uplinkBWP_ToAddModList) {
if (*spCellConfigDedicated->firstActiveDownlinkBWP_Id != current_bwp_id) {
sched_ctrl->active_bwp = spCellConfigDedicated->downlinkBWP_ToAddModList->list.array[*spCellConfigDedicated->firstActiveDownlinkBWP_Id - 1];
LOG_I(NR_MAC, "Changing to DL-BWP %li\n", sched_ctrl->active_bwp->bwp_Id);
}
if (*spCellConfigDedicated->uplinkConfig->firstActiveUplinkBWP_Id != current_ubwp_id) {
sched_ctrl->active_ubwp = spCellConfigDedicated->uplinkConfig->uplinkBWP_ToAddModList->list.array[*spCellConfigDedicated->uplinkConfig->firstActiveUplinkBWP_Id - 1];
LOG_I(NR_MAC, "Changing to UL-BWP %li\n", sched_ctrl->active_ubwp->bwp_Id);
}
}
NR_BWP_Downlink_t *bwp = sched_ctrl->active_bwp;
NR_BWP_DownlinkDedicated_t *bwpd = cg &&
@@ -2868,6 +2927,7 @@ void nr_mac_update_timers(module_id_t module_id,
int dci_format = get_dci_format(sched_ctrl);
const uint8_t num_dmrs_cdm_grps_no_data = (ubwp || ubwpd) ? 1 : 2;
const uint8_t nrOfLayers = 1;
const int utda = ubwp && preferred_ul_tda[ubwp->bwp_Id][slot] >= 0 ?
preferred_ul_tda[ubwp->bwp_Id][slot] : (ups->time_domain_allocation >= 0 ? ups->time_domain_allocation : 0);
@@ -2878,12 +2938,38 @@ void nr_mac_update_timers(module_id_t module_id,
dci_format,
utda,
num_dmrs_cdm_grps_no_data,
nrOfLayers,
ups);
}
}
}
}
void schedule_nr_bwp_switch(module_id_t module_id,
frame_t frame,
sub_frame_t slot) {
NR_UE_info_t *UE_info = &RC.nrmac[module_id]->UE_info;
const NR_list_t *UE_list = &UE_info->list;
// TODO: Implementation of a algorithm to perform:
// - DL BWP selection: sched_ctrl->next_dl_bwp_id = dl_bwp_id
// - UL BWP selection: sched_ctrl->next_ul_bwp_id = ul_bwp_id
for (int UE_id = UE_list->head; UE_id >= 0; UE_id = UE_list->next[UE_id]) {
NR_UE_sched_ctrl_t *sched_ctrl = &UE_info->UE_sched_ctrl[UE_id];
if (sched_ctrl->rrc_processing_timer == 0 &&
UE_info->Msg4_ACKed[UE_id] == true &&
((sched_ctrl->next_dl_bwp_id >= 0 && sched_ctrl->active_bwp && sched_ctrl->active_bwp->bwp_Id != sched_ctrl->next_dl_bwp_id) ||
(sched_ctrl->next_ul_bwp_id >= 0 && sched_ctrl->active_ubwp && sched_ctrl->active_ubwp->bwp_Id != sched_ctrl->next_ul_bwp_id))) {
LOG_W(NR_MAC,"(%d.%d) [UE_id %d] Schedule BWP switch from dl_bwp_id %ld to %ld and from ul_bwp_id %ld to %ld\n",
frame, slot, UE_id, sched_ctrl->active_bwp->bwp_Id, sched_ctrl->next_dl_bwp_id, sched_ctrl->active_ubwp->bwp_Id, sched_ctrl->next_ul_bwp_id);
nr_mac_rrc_bwp_switch_req(module_id, frame, slot, UE_info->rnti[UE_id], sched_ctrl->next_dl_bwp_id, sched_ctrl->next_ul_bwp_id);
}
}
}
/*void fill_nfapi_coresets_and_searchspaces(NR_CellGroupConfig_t *cg,
nfapi_nr_coreset_t *coreset,
nfapi_nr_search_space_t *search_space) {
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_uci.c
+27 -23
View File
@@ -51,7 +51,7 @@ void nr_fill_nfapi_pucch(module_id_t mod_id,
&RC.nrmac[mod_id]->UL_tti_req_ahead[0][pucch->ul_slot];
AssertFatal(future_ul_tti_req->SFN == pucch->frame
&& future_ul_tti_req->Slot == pucch->ul_slot,
"Current %d.%d : future UL_tti_req's frame.slot %4d.%2d does not match PUCCH %4d.%2d\n",
"Current %4d.%2d : future UL_tti_req's frame.slot %4d.%2d does not match PUCCH %4d.%2d\n",
frame,slot,
future_ul_tti_req->SFN,
future_ul_tti_req->Slot,
@@ -502,6 +502,8 @@ void compute_pmi_bitlen(struct NR_CSI_ReportConfig *csi_reportconfig,
if(codebookConfig->codebookType.choice.type1->subType.present == NR_CodebookConfig__codebookType__type1__subType_PR_typeI_SinglePanel) {
if(codebookConfig->codebookType.choice.type1->subType.choice.typeI_SinglePanel->nrOfAntennaPorts.present ==
NR_CodebookConfig__codebookType__type1__subType__typeI_SinglePanel__nrOfAntennaPorts_PR_two) {
csi_report->N1 = 1;
csi_report->N2 = 1;
if (i==0)
csi_report->csi_meas_bitlen.pmi_x2_bitlen[i]=2;
if (i==1)
@@ -511,6 +513,9 @@ void compute_pmi_bitlen(struct NR_CSI_ReportConfig *csi_reportconfig,
int n1,n2,o1,o2,x1,x2;
get_n1n2_o1o2_singlepanel(&n1,&n2,&o1,&o2,codebookConfig->codebookType.choice.type1->subType.choice.typeI_SinglePanel->nrOfAntennaPorts.choice.moreThanTwo);
get_x1x2_bitlen_singlepanel(n1,n2,o1,o2,&x1,&x2,i+1,codebookConfig->codebookType.choice.type1->codebookMode);
csi_report->N1 = n1;
csi_report->N2 = n2;
csi_report->codebook_mode = codebookConfig->codebookType.choice.type1->codebookMode;
csi_report->csi_meas_bitlen.pmi_x1_bitlen[i]=x1;
csi_report->csi_meas_bitlen.pmi_x2_bitlen[i]=x2;
}
@@ -714,13 +719,13 @@ void nr_csi_meas_reporting(int Mod_idP,
NR_PUCCH_Config_t *pucch_Config = NULL;
if (sched_ctrl->active_ubwp) {
pucch_Config = sched_ctrl->active_ubwp->bwp_Dedicated->pucch_Config->choice.setup;
} else if (RC.nrmac[Mod_idP]->UE_info.CellGroup[UE_id] &&
RC.nrmac[Mod_idP]->UE_info.CellGroup[UE_id]->spCellConfig &&
RC.nrmac[Mod_idP]->UE_info.CellGroup[UE_id]->spCellConfig->spCellConfigDedicated &&
RC.nrmac[Mod_idP]->UE_info.CellGroup[UE_id]->spCellConfig->spCellConfigDedicated->uplinkConfig &&
RC.nrmac[Mod_idP]->UE_info.CellGroup[UE_id]->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP &&
RC.nrmac[Mod_idP]->UE_info.CellGroup[UE_id]->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP->pucch_Config->choice.setup) {
pucch_Config = RC.nrmac[Mod_idP]->UE_info.CellGroup[UE_id]->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP->pucch_Config->choice.setup;
} else if (CellGroup &&
CellGroup->spCellConfig &&
CellGroup->spCellConfig->spCellConfigDedicated &&
CellGroup->spCellConfig->spCellConfigDedicated->uplinkConfig &&
CellGroup->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP &&
CellGroup->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP->pucch_Config->choice.setup) {
pucch_Config = CellGroup->spCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP->pucch_Config->choice.setup;
}
for (int csi_report_id = 0; csi_report_id < csi_measconfig->csi_ReportConfigToAddModList->list.count; csi_report_id++){
@@ -873,9 +878,8 @@ int checkTargetSSBInTCIStates_pdcchConfig(int ssb_index_t, int Mod_idP, int UE_i
int nb_tci_states = CellGroup->spCellConfig->spCellConfigDedicated->initialDownlinkBWP->pdsch_Config->choice.setup->tci_StatesToAddModList->list.count;
NR_TCI_State_t *tci =NULL;
NR_TCI_StateId_t *tci_id = NULL;
int bwp_id = 1;
NR_BWP_Downlink_t *bwp = CellGroup->spCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList->list.array[bwp_id-1];
NR_ControlResourceSet_t *coreset = bwp->bwp_Dedicated->pdcch_Config->choice.setup->controlResourceSetToAddModList->list.array[bwp_id-1];
NR_UE_sched_ctrl_t *sched_ctrl = &UE_info->UE_sched_ctrl[UE_id];
NR_ControlResourceSet_t *coreset = sched_ctrl->coreset;
int i;
int flag = 0;
int tci_stateID = -1;
@@ -943,15 +947,15 @@ void tci_handling(module_id_t Mod_idP, int UE_id, frame_t frame, slot_t slot) {
uint8_t idx = 0;
NR_UE_info_t *UE_info = &RC.nrmac[Mod_idP]->UE_info;
NR_UE_sched_ctrl_t *sched_ctrl = &UE_info->UE_sched_ctrl[UE_id];
int bwp_id = sched_ctrl->active_bwp ? sched_ctrl->active_bwp->bwp_Id : 0;
const int bwp_id = sched_ctrl->active_bwp ? sched_ctrl->active_bwp->bwp_Id : 0;
NR_CellGroupConfig_t *CellGroup = UE_info->CellGroup[UE_id];
NR_BWP_Downlink_t *bwp = bwp_id>0 ? sched_ctrl->active_bwp : NULL;
//bwp indicator
int n_dl_bwp=0;
if (CellGroup->spCellConfig->spCellConfigDedicated &&
if (CellGroup->spCellConfig &&
CellGroup->spCellConfig->spCellConfigDedicated &&
CellGroup->spCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList)
n_dl_bwp = CellGroup->spCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList->list.count;
n_dl_bwp = CellGroup->spCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList->list.count;
uint8_t nr_ssbri_cri = 0;
uint8_t nb_of_csi_ssb_report = UE_info->csi_report_template[UE_id][cqi_idx].nb_of_csi_ssb_report;
@@ -1074,10 +1078,8 @@ void tci_handling(module_id_t Mod_idP, int UE_id, frame_t frame, slot_t slot) {
}
}
sched_ctrl->UE_mac_ce_ctrl.pdcch_state_ind.tci_present_inDCI = bwp ?
bwp->bwp_Dedicated->pdcch_Config->choice.setup->controlResourceSetToAddModList->list.array[bwp_id-1]->tci_PresentInDCI :
CellGroup->spCellConfig->spCellConfigDedicated->initialDownlinkBWP->pdcch_Config->choice.setup->controlResourceSetToAddModList->list.array[0]->tci_PresentInDCI;
sched_ctrl->UE_mac_ce_ctrl.pdcch_state_ind.tci_present_inDCI = sched_ctrl->coreset ?
sched_ctrl->coreset->tci_PresentInDCI : NULL;
//filling pdsch tci state activation deactivation mac ce structure fields
if(sched_ctrl->UE_mac_ce_ctrl.pdcch_state_ind.tci_present_inDCI) {
@@ -1246,7 +1248,7 @@ void evaluate_cqi_report(uint8_t *payload,
sched_ctrl->CSI_report.cri_ri_li_pmi_cqi_report.wb_cqi_2tb = temp_cqi;
LOG_D(MAC,"Wide-band CQI for the second TB %d\n", temp_cqi);
}
sched_ctrl->set_mcs = TRUE;
sched_ctrl->set_mcs = true;
}
@@ -1269,6 +1271,7 @@ uint8_t evaluate_pmi_report(uint8_t *payload,
sched_ctrl->CSI_report.cri_ri_li_pmi_cqi_report.pmi_x1,
sched_ctrl->CSI_report.cri_ri_li_pmi_cqi_report.pmi_x2);
sched_ctrl->set_pmi = true;
return tot_bitlen;
}
@@ -1374,6 +1377,7 @@ void extract_pucch_csi_report(NR_CSI_MeasConfig_t *csi_MeasConfig,
if (r_index != -1)
skip_zero_padding(&cumul_bits,csi_report,r_index,bitlen);
pmi_bitlen = evaluate_pmi_report(payload,csi_report,cumul_bits,r_index,sched_ctrl);
sched_ctrl->CSI_report.cri_ri_li_pmi_cqi_report.csi_report_id = csi_report_id;
cumul_bits += pmi_bitlen;
evaluate_cqi_report(payload,csi_report,cumul_bits,r_index,sched_ctrl,csirep->cqi_Table);
break;
@@ -1391,6 +1395,7 @@ void extract_pucch_csi_report(NR_CSI_MeasConfig_t *csi_MeasConfig,
if (r_index != -1)
skip_zero_padding(&cumul_bits,csi_report,r_index,bitlen);
pmi_bitlen = evaluate_pmi_report(payload,csi_report,cumul_bits,r_index,sched_ctrl);
sched_ctrl->CSI_report.cri_ri_li_pmi_cqi_report.csi_report_id = csi_report_id;
cumul_bits += pmi_bitlen;
evaluate_cqi_report(payload,csi_report,cumul_bits,r_index,sched_ctrl,csirep->cqi_Table);
break;
@@ -1708,11 +1713,10 @@ int nr_acknack_scheduling(int mod_id,
NR_SearchSpace__searchSpaceType_PR ss_type = (is_common==0 && (sched_ctrl->active_bwp || ubwpd)) ? NR_SearchSpace__searchSpaceType_PR_ue_Specific: NR_SearchSpace__searchSpaceType_PR_common;
uint8_t pdsch_to_harq_feedback[8];
int bwp_Id = 0;
if (sched_ctrl->active_ubwp) bwp_Id = sched_ctrl->active_ubwp->bwp_Id;
const int bwp_id = sched_ctrl->active_bwp ? sched_ctrl->active_bwp->bwp_Id : 0;
int max_fb_time = 0;
get_pdsch_to_harq_feedback(mod_id, UE_id, bwp_Id, ss_type, &max_fb_time, pdsch_to_harq_feedback);
get_pdsch_to_harq_feedback(mod_id, UE_id, bwp_id, ss_type, &max_fb_time, pdsch_to_harq_feedback);
LOG_D(NR_MAC, "In %s: 1b. DL %4d.%2d, UL_ACK %4d.%2d, DAI_C %d\n", __FUNCTION__, frame,slot,pucch->frame,pucch->ul_slot,pucch->dai_c);
/* there is a HARQ. Check whether we can use it for this ACKNACK */
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_ulsch.c
+26 -14
View File
@@ -58,7 +58,7 @@ void calculate_preferred_ul_tda(module_id_t module_id, const NR_BWP_Uplink_t *ub
frame_type_t frame_type = nrmac->common_channels->frame_type;
const int n = nr_slots_per_frame[*scc->ssbSubcarrierSpacing];
NR_ServingCellConfigCommonSIB_t *scc_sib1 = get_softmodem_params()->sa ?
NR_ServingCellConfigCommonSIB_t *scc_sib1 = nrmac->common_channels[0].sib1 ?
RC.nrmac[module_id]->common_channels[0].sib1->message.choice.c1->choice.systemInformationBlockType1->servingCellConfigCommon : NULL;
AssertFatal(scc!=NULL || scc_sib1!=NULL,"We need one serving cell config common\n");
@@ -977,7 +977,7 @@ bool allocate_ul_retransmission(module_id_t module_id,
int rbStart = 0; // wrt BWP start
const uint16_t bwpSize = NRRIV2BW(genericParameters->locationAndBandwidth, MAX_BWP_SIZE);
const uint8_t nrOfLayers = 1;
const uint8_t num_dmrs_cdm_grps_no_data = (sched_ctrl->active_bwp || ubwpd) ? 1 : 2;
const int tda = sched_ctrl->active_ubwp ? RC.nrmac[module_id]->preferred_ul_tda[sched_ctrl->active_ubwp->bwp_Id][slot] : 0;
LOG_D(NR_MAC,"retInfo->time_domain_allocation = %d, tda = %d\n", retInfo->time_domain_allocation, tda);
@@ -991,6 +991,7 @@ bool allocate_ul_retransmission(module_id_t module_id,
if (ps->time_domain_allocation != tda
|| ps->dci_format != dci_format
|| ps->nrOfLayers != nrOfLayers
|| ps->num_dmrs_cdm_grps_no_data != num_dmrs_cdm_grps_no_data) {
nr_set_pusch_semi_static(sib1,
scc,
@@ -999,6 +1000,7 @@ bool allocate_ul_retransmission(module_id_t module_id,
dci_format,
tda,
num_dmrs_cdm_grps_no_data,
nrOfLayers,
ps);
}
@@ -1021,6 +1023,7 @@ bool allocate_ul_retransmission(module_id_t module_id,
dci_format,
tda,
num_dmrs_cdm_grps_no_data,
nrOfLayers,
&temp_ps);
/* the retransmission will use a different time domain allocation, check
* that we have enough resources */
@@ -1242,11 +1245,13 @@ void pf_ul(module_id_t module_id,
/* we want to avoid a lengthy deduction of DMRS and other parameters in
* every TTI if we can save it, so check whether dci_format, TDA, or
* num_dmrs_cdm_grps_no_data has changed and only then recompute */
const uint8_t nrOfLayers = 1;
const uint8_t num_dmrs_cdm_grps_no_data = (sched_ctrl->active_ubwp || ubwpd) ? 1 : 2;
int dci_format = get_dci_format(sched_ctrl);
const int tda = sched_ctrl->active_ubwp ? nrmac->preferred_ul_tda[sched_ctrl->active_ubwp->bwp_Id][slot] : 0;
if (ps->time_domain_allocation != tda
|| ps->dci_format != dci_format
|| ps->nrOfLayers != nrOfLayers
|| ps->num_dmrs_cdm_grps_no_data != num_dmrs_cdm_grps_no_data) {
nr_set_pusch_semi_static(sib1,
scc,
@@ -1255,10 +1260,12 @@ void pf_ul(module_id_t module_id,
dci_format,
tda,
num_dmrs_cdm_grps_no_data,
nrOfLayers,
ps);
}
LOG_D(NR_MAC,"Looking for min_rb %d RBs, starting at %d\n", min_rb, rbStart);
LOG_D(NR_MAC,"Looking for min_rb %d RBs, starting at %d num_dmrs_cdm_grps_no_data %d\n",
min_rb, rbStart, ps->num_dmrs_cdm_grps_no_data);
const uint16_t slbitmap = SL_to_bitmap(ps->startSymbolIndex, ps->nrOfSymbols);
while (rbStart < bwpSize && (rballoc_mask[rbStart] & slbitmap) != slbitmap)
rbStart++;
@@ -1287,7 +1294,7 @@ void pf_ul(module_id_t module_id,
ps->N_PRB_DMRS * ps->num_dmrs_symb,
0, // nb_rb_oh
0,
1 /* NrOfLayers */)
ps->nrOfLayers)
>> 3;
/* Mark the corresponding RBs as used */
@@ -1378,11 +1385,13 @@ void pf_ul(module_id_t module_id,
/* we want to avoid a lengthy deduction of DMRS and other parameters in
* every TTI if we can save it, so check whether dci_format, TDA, or
* num_dmrs_cdm_grps_no_data has changed and only then recompute */
const uint8_t nrOfLayers = 1;
const uint8_t num_dmrs_cdm_grps_no_data = (sched_ctrl->active_ubwp || ubwpd) ? 1 : 2;
int dci_format = get_dci_format(sched_ctrl);
const int tda = sched_ctrl->active_ubwp ? nrmac->preferred_ul_tda[sched_ctrl->active_ubwp->bwp_Id][slot] : 0;
if (ps->time_domain_allocation != tda
|| ps->dci_format != dci_format
|| ps->nrOfLayers != nrOfLayers
|| ps->num_dmrs_cdm_grps_no_data != num_dmrs_cdm_grps_no_data) {
nr_set_pusch_semi_static(sib1,
scc,
@@ -1391,6 +1400,7 @@ void pf_ul(module_id_t module_id,
dci_format,
tda,
num_dmrs_cdm_grps_no_data,
nrOfLayers,
ps);
}
update_ul_ue_R_Qm(sched_pusch, ps);
@@ -1410,12 +1420,11 @@ void pf_ul(module_id_t module_id,
}
else LOG_D(NR_MAC,"allocating UL data for UE %d/RNTI %04x (rbStsart %d, min_rb %d, bwpSize %d\n",UE_id, UE_info->rnti[UE_id],rbStart,min_rb,bwpSize);
/* Calculate the current scheduling bytes and the necessary RBs */
const int B = cmax(sched_ctrl->estimated_ul_buffer - sched_ctrl->sched_ul_bytes, 0);
uint16_t rbSize = 0;
uint32_t TBS = 0;
nr_find_nb_rb(sched_pusch->Qm,
sched_pusch->R,
1, // layers
@@ -1476,7 +1485,7 @@ bool nr_fr1_ulsch_preprocessor(module_id_t module_id, frame_t frame, sub_frame_t
if (tda < 0)
return false;
int K2 = get_K2(scc, scc_sib1, sched_ctrl->active_ubwp, tda, mu);
const int sched_frame = (frame + (slot + K2 >= nr_slots_per_frame[mu])) % 1024;
const int sched_frame = (frame + (slot + K2 >= nr_slots_per_frame[mu])) & 1023;
const int sched_slot = (slot + K2) % nr_slots_per_frame[mu];
if (!is_xlsch_in_slot(nr_mac->ulsch_slot_bitmap[sched_slot / 64], sched_slot))
@@ -1714,7 +1723,7 @@ void nr_schedule_ulsch(module_id_t module_id, frame_t frame, sub_frame_t slot)
sched_ctrl->last_ul_slot = sched_pusch->slot;
LOG_D(NR_MAC,
"ULSCH/PUSCH: %4d.%2d RNTI %04x UL sched %4d.%2d DCI L %d start %2d RBS %3d startSymbol %2d nb_symbol %2d dmrs_pos %x MCS %2d TBS %4d HARQ PID %2d round %d RV %d NDI %d est %6d sched %6d est BSR %6d TPC %d\n",
"ULSCH/PUSCH: %4d.%2d RNTI %04x UL sched %4d.%2d DCI L %d start %2d RBS %3d startSymbol %2d nb_symbol %2d dmrs_pos %x MCS %2d nrOfLayers %2d num_dmrs_cdm_grps_no_data %2d TBS %4d HARQ PID %2d round %d RV %d NDI %d est %6d sched %6d est BSR %6d TPC %d\n",
frame,
slot,
rnti,
@@ -1727,6 +1736,8 @@ void nr_schedule_ulsch(module_id_t module_id, frame_t frame, sub_frame_t slot)
ps->nrOfSymbols,
ps->ul_dmrs_symb_pos,
sched_pusch->mcs,
ps->nrOfLayers,
ps->num_dmrs_cdm_grps_no_data,
sched_pusch->tb_size,
harq_id,
cur_harq->round,
@@ -1783,7 +1794,8 @@ void nr_schedule_ulsch(module_id_t module_id, frame_t frame, sub_frame_t slot)
pusch_pdu->data_scrambling_id = *ps->pusch_Config->dataScramblingIdentityPUSCH;
else
pusch_pdu->data_scrambling_id = *scc->physCellId;
pusch_pdu->nrOfLayers = 1;
pusch_pdu->nrOfLayers = ps->nrOfLayers;
pusch_pdu->num_dmrs_cdm_grps_no_data = ps->num_dmrs_cdm_grps_no_data;
/* FAPI: DMRS */
pusch_pdu->ul_dmrs_symb_pos = ps->ul_dmrs_symb_pos;
@@ -1808,7 +1820,7 @@ void nr_schedule_ulsch(module_id_t module_id, frame_t frame, sub_frame_t slot)
}
pusch_pdu->scid = 0; // DMRS sequence initialization [TS38.211, sec 6.4.1.1.1]
pusch_pdu->num_dmrs_cdm_grps_no_data = ps->num_dmrs_cdm_grps_no_data;
pusch_pdu->dmrs_ports = 1;
pusch_pdu->dmrs_ports = ((1<<ps->nrOfLayers) - 1);
/* FAPI: Pusch Allocation in frequency domain */
pusch_pdu->resource_alloc = 1; //type 1
@@ -1873,7 +1885,7 @@ void nr_schedule_ulsch(module_id_t module_id, frame_t frame, sub_frame_t slot)
/* look up the PDCCH PDU for this BWP and CORESET. If it does not exist,
* create it */
const int bwpid = sched_ctrl->active_bwp ? sched_ctrl->active_bwp->bwp_Id : 0;
const int bwp_id = sched_ctrl->active_bwp ? sched_ctrl->active_bwp->bwp_Id : 0;
NR_SearchSpace_t *ss = (sched_ctrl->active_bwp || ubwpd) ? sched_ctrl->search_space: RC.nrmac[module_id]->sched_ctrlCommon->search_space;
NR_ControlResourceSet_t *coreset = (sched_ctrl->active_bwp || ubwpd) ? sched_ctrl->coreset: RC.nrmac[module_id]->sched_ctrlCommon->coreset;
const int coresetid = coreset->controlResourceSetId;
@@ -1929,7 +1941,7 @@ void nr_schedule_ulsch(module_id_t module_id, frame_t frame, sub_frame_t slot)
ps->time_domain_allocation,
UE_info->UE_sched_ctrl[UE_id].tpc0,
n_ubwp,
bwpid);
bwp_id);
fill_dci_pdu_rel15(scc,
cg,
dci_pdu,
@@ -1937,10 +1949,10 @@ void nr_schedule_ulsch(module_id_t module_id, frame_t frame, sub_frame_t slot)
ps->dci_format,
rnti_types[0],
pusch_pdu->bwp_size,
bwpid,
bwp_id,
coresetid,
nr_mac->cset0_bwp_size);
memset(sched_pusch, 0, sizeof(*sched_pusch));
}
}
openair2/LAYER2/NR_MAC_gNB/mac_proto.h
+13 -1
View File
@@ -42,7 +42,7 @@ void process_CellGroup(NR_CellGroupConfig_t *CellGroup, NR_UE_sched_ctrl_t *sche
void config_common(int Mod_idP,
int ssb_SubcarrierOffset,
rrc_pdsch_AntennaPorts_t pdsch_AntennaPorts,
int pdsch_AntennaPorts,
int pusch_AntennaPorts,
NR_ServingCellConfigCommon_t *scc);
@@ -76,6 +76,10 @@ void nr_mac_update_timers(module_id_t module_id,
void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
frame_t frame_rxP, sub_frame_t slot_rxP);
void schedule_nr_bwp_switch(module_id_t module_id,
frame_t frame,
sub_frame_t slot);
/* \brief main DL scheduler function. Calls a preprocessor to decide on
* resource allocation, then "post-processes" resource allocation (nFAPI
* messages, statistics, HARQ handling, CEs, ... */
@@ -303,6 +307,7 @@ void fill_dci_pdu_rel15(const NR_ServingCellConfigCommon_t *scc,
int rnti_types,
int N_RB,
int bwp_id,
NR_ControlResourceSetId_t coreset_id,
uint16_t cset0_bwp_size);
void prepare_dci(const NR_CellGroupConfig_t *CellGroup,
@@ -366,6 +371,7 @@ void nr_set_pusch_semi_static(const NR_SIB1_t *sib1,
long dci_format,
int tda,
uint8_t num_dmrs_cdm_grps_no_data,
uint8_t nrOfLayers,
NR_pusch_semi_static_t *ps);
uint16_t get_Y(int cid, int slot, rnti_t rnti);
@@ -502,6 +508,12 @@ void find_SSB_and_RO_available(module_id_t module_idP);
void set_dl_dmrs_ports(NR_pdsch_semi_static_t *ps);
uint16_t set_pm_index(NR_UE_sched_ctrl_t *sched_ctrl,
int layers,
int N1, int N2,
int xp_pdsch_antenna_ports,
int codebook_mode);
void set_dl_mcs(NR_sched_pdsch_t *sched_pdsch,
NR_UE_sched_ctrl_t *sched_ctrl,
uint8_t *target_mcs,
openair2/LAYER2/NR_MAC_gNB/nr_mac_gNB.h
+21 -3
View File
@@ -72,7 +72,7 @@
/* Defs */
#define MAX_NUM_BWP 2
#define MAX_NUM_BWP 5
#define MAX_NUM_CORESET 12
#define MAX_NUM_CCE 90
#define MAX_HARQ_ROUNDS 4
@@ -80,6 +80,8 @@
#define NR_NB_RA_PROC_MAX 4
#define MAX_NUM_OF_SSB 64
#define MIN_NUM_PRBS_TO_SCHEDULE 5
/*! \brief NR_list_t is a "list" (of users, HARQ processes, slices, ...).
* Especially useful in the scheduler and to keep "classes" of users. */
typedef struct {
@@ -121,8 +123,10 @@ typedef struct NR_sched_pdcch {
typedef struct {
/// Flag to indicate this process is active
RA_gNB_state_t state;
/// BWP id of RA process
int bwp_id;
/// DL BWP id of RA process
int dl_bwp_id;
/// UL BWP id of RA process
int ul_bwp_id;
/// CORESET0 configured flag
int coreset0_configured;
/// Slot where preamble was received
@@ -343,6 +347,7 @@ typedef struct NR_sched_pucch {
typedef struct NR_pusch_semi_static_t {
int dci_format;
int time_domain_allocation;
uint8_t nrOfLayers;
uint8_t num_dmrs_cdm_grps_no_data;
int startSymbolIndex;
@@ -486,6 +491,7 @@ struct CRI_RI_LI_PMI_CQI {
uint8_t wb_cqi_1tb;
uint8_t wb_cqi_2tb;
uint8_t cqi_table;
uint8_t csi_report_id;
};
typedef struct CRI_SSB_RSRP {
@@ -529,6 +535,9 @@ typedef struct nr_csi_report {
uint8_t nb_of_csi_ssb_report;
L1_RSRP_bitlen_t CSI_report_bitlen;
CSI_Meas_bitlen_t csi_meas_bitlen;
int codebook_mode;
int N1;
int N2;
} nr_csi_report_t;
/*! As per the spec 38.212 and table: 6.3.1.1.2-12 in a single UCI sequence we can have multiple CSI_report
@@ -561,6 +570,12 @@ typedef struct {
NR_BWP_Downlink_t *active_bwp;
/// the currently active BWP in UL
NR_BWP_Uplink_t *active_ubwp;
/// the next active BWP ID in DL
NR_BWP_Id_t next_dl_bwp_id;
/// the next active BWP ID in UL
NR_BWP_Id_t next_ul_bwp_id;
/// CCE index and aggregation, should be coherent with cce_list
NR_SearchSpace_t *search_space;
NR_ControlResourceSet_t *coreset;
@@ -627,6 +642,7 @@ typedef struct {
struct CSI_Report CSI_report;
bool SR;
bool set_mcs;
bool set_pmi;
/// information about every HARQ process
NR_UE_harq_t harq_processes[NR_MAX_NB_HARQ_PROCESSES];
/// HARQ processes that are free
@@ -814,6 +830,8 @@ typedef struct gNB_MAC_INST_s {
uint16_t cset0_bwp_size;
NR_Type0_PDCCH_CSS_config_t type0_PDCCH_CSS_config[64];
int xp_pdsch_antenna_ports;
bool first_MIB;
double dl_bler_target_upper;
double dl_bler_target_lower;
openair2/RRC/LTE/defs_NB_IoT.h
+1 -1
View File
@@ -148,7 +148,7 @@ typedef struct UE_RRC_INFO_NB_IoT_s {
//Measurement Report not supported in NB-IoT
#define PAYLOAD_SIZE_MAX 1024
#define RRC_BUF_SIZE 512
#define RRC_BUF_SIZE 1024
#define UNDEF_SECURITY_MODE 0xff
#define NO_SECURITY_MODE 0x20
openair2/RRC/LTE/rrc_defs.h
+2 -2
View File
@@ -316,7 +316,7 @@ typedef enum SL_TRIGGER_e {
#define MAX_MEAS_ID 7
#define PAYLOAD_SIZE_MAX 1024
#define RRC_BUF_SIZE 512
#define RRC_BUF_SIZE 1024
#define UNDEF_SECURITY_MODE 0xff
#define NO_SECURITY_MODE 0x20
@@ -484,7 +484,7 @@ typedef struct MEASUREMENT_INFO_s {
typedef struct {
char Payload[RRC_BUFFER_SIZE_MAX];
char Header[RRC_HEADER_SIZE_MAX];
char payload_size;
uint16_t payload_size;
} RRC_BUFFER;
#define RRC_BUFFER_SIZE sizeof(RRC_BUFFER)
openair2/RRC/NR/L2_nr_interface.c
+71 -57
View File
@@ -207,90 +207,103 @@ nr_rrc_data_req(
return TRUE; // TODO should be changed to a CNF message later, currently RRC lite does not used the returned value anyway.
}
int mac_rrc_nr_data_req(const module_id_t Mod_idP,
const int CC_id,
const frame_t frameP,
const rb_id_t Srb_id,
const rnti_t rnti,
const uint8_t Nb_tb,
uint8_t *const buffer_pP ){
uint16_t mac_rrc_nr_data_req(const module_id_t Mod_idP,
const int CC_id,
const frame_t frameP,
const rb_id_t Srb_id,
const rnti_t rnti,
const uint8_t Nb_tb,
uint8_t *const buffer_pP ){
#ifdef DEBUG_RRC
LOG_D(RRC,"[eNB %d] mac_rrc_data_req to SRB ID=%ld\n",Mod_idP,Srb_id);
#endif
// MIBCH
if ((Srb_id & RAB_OFFSET) == MIBCH) {
// MIBCH
if ((Srb_id & RAB_OFFSET) == MIBCH) {
asn_enc_rval_t enc_rval;
uint8_t sfn_msb = (uint8_t)((frameP>>4)&0x3f);
rrc_gNB_carrier_data_t *carrier = &RC.nrrrc[Mod_idP]->carrier;
NR_BCCH_BCH_Message_t *mib = &carrier->mib;
asn_enc_rval_t enc_rval;
uint8_t sfn_msb = (uint8_t)((frameP>>4)&0x3f);
rrc_gNB_carrier_data_t *carrier = &RC.nrrrc[Mod_idP]->carrier;
NR_BCCH_BCH_Message_t *mib = &carrier->mib;
// Currently we are getting the pdcch_ConfigSIB1 from the configuration file.
// Uncomment this function for a dynamic pdcch_ConfigSIB1.
//channel_bandwidth_t min_channel_bw = bw_10MHz; // Must be obtained based on TS 38.101-1 Table 5.3.5-1
//generate_pdcch_ConfigSIB1(carrier->pdcch_ConfigSIB1,
// *carrier->servingcellconfigcommon->ssbSubcarrierSpacing,
// carrier->mib.message.choice.mib->subCarrierSpacingCommon,
// min_channel_bw);
// Currently we are getting the pdcch_ConfigSIB1 from the configuration file.
// Uncomment this function for a dynamic pdcch_ConfigSIB1.
//channel_bandwidth_t min_channel_bw = bw_10MHz; // Must be obtained based on TS 38.101-1 Table 5.3.5-1
//generate_pdcch_ConfigSIB1(carrier->pdcch_ConfigSIB1,
// *carrier->servingcellconfigcommon->ssbSubcarrierSpacing,
// carrier->mib.message.choice.mib->subCarrierSpacingCommon,
// min_channel_bw);
mib->message.choice.mib->pdcch_ConfigSIB1.controlResourceSetZero = carrier->pdcch_ConfigSIB1->controlResourceSetZero;
mib->message.choice.mib->pdcch_ConfigSIB1.searchSpaceZero = carrier->pdcch_ConfigSIB1->searchSpaceZero;
mib->message.choice.mib->pdcch_ConfigSIB1.controlResourceSetZero = carrier->pdcch_ConfigSIB1->controlResourceSetZero;
mib->message.choice.mib->pdcch_ConfigSIB1.searchSpaceZero = carrier->pdcch_ConfigSIB1->searchSpaceZero;
mib->message.choice.mib->systemFrameNumber.buf[0] = sfn_msb << 2;
enc_rval = uper_encode_to_buffer(&asn_DEF_NR_BCCH_BCH_Message,
NULL,
(void *) mib,
carrier->MIB,
24);
LOG_D(NR_RRC, "Encoded MIB for frame %d sfn_msb %d (%p), bits %lu\n", frameP, sfn_msb, carrier->MIB,
enc_rval.encoded);
buffer_pP[0] = carrier->MIB[0];
buffer_pP[1] = carrier->MIB[1];
buffer_pP[2] = carrier->MIB[2];
LOG_D(NR_RRC, "MIB PDU buffer_pP[0]=%x , buffer_pP[1]=%x, buffer_pP[2]=%x\n", buffer_pP[0], buffer_pP[1],
buffer_pP[2]);
AssertFatal (enc_rval.encoded > 0, "ASN1 message encoding failed (%s, %lu)!\n",
enc_rval.failed_type->name, enc_rval.encoded);
return (3);
}
mib->message.choice.mib->systemFrameNumber.buf[0] = sfn_msb << 2;
enc_rval = uper_encode_to_buffer(&asn_DEF_NR_BCCH_BCH_Message,
NULL,
(void *) mib,
carrier->MIB,
24);
LOG_D(NR_RRC, "Encoded MIB for frame %d sfn_msb %d (%p), bits %lu\n", frameP, sfn_msb, carrier->MIB,
enc_rval.encoded);
buffer_pP[0] = carrier->MIB[0];
buffer_pP[1] = carrier->MIB[1];
buffer_pP[2] = carrier->MIB[2];
LOG_D(NR_RRC, "MIB PDU buffer_pP[0]=%x , buffer_pP[1]=%x, buffer_pP[2]=%x\n", buffer_pP[0], buffer_pP[1],
buffer_pP[2]);
AssertFatal (enc_rval.encoded > 0, "ASN1 message encoding failed (%s, %lu)!\n",
enc_rval.failed_type->name, enc_rval.encoded);
return 3;
}
// TODO BCCH SIB1 SIBs
if ((Srb_id & RAB_OFFSET ) == BCCH) {
memcpy(&buffer_pP[0],
RC.nrrrc[Mod_idP]->carrier.SIB1,
RC.nrrrc[Mod_idP]->carrier.sizeof_SIB1);
if ((Srb_id & RAB_OFFSET) == BCCH) {
memcpy(&buffer_pP[0], RC.nrrrc[Mod_idP]->carrier.SIB1, RC.nrrrc[Mod_idP]->carrier.sizeof_SIB1);
return RC.nrrrc[Mod_idP]->carrier.sizeof_SIB1;
}
// CCCH
if( (Srb_id & RAB_OFFSET ) == CCCH) {
if ((Srb_id & RAB_OFFSET) == CCCH) {
LOG_D(NR_RRC,"[gNB %d] Frame %d CCCH request (Srb_id %ld)\n", Mod_idP, frameP, Srb_id);
char *payload_pP;
uint8_t Sdu_size = 0;
struct rrc_gNB_ue_context_s *ue_context_p = rrc_gNB_get_ue_context(RC.nrrrc[Mod_idP], rnti);
LOG_D(NR_RRC,"[gNB %d] Frame %d CCCH request (Srb_id %ld)\n", Mod_idP, frameP, Srb_id);
if (ue_context_p == NULL) {
LOG_E(NR_RRC,"[gNB %d] Frame %d CCCH request but no ue_context\n", Mod_idP, frameP);
return 0;
}
AssertFatal(ue_context_p!=NULL,"failed to get ue_context, rnti %x\n",rnti);
int payload_size = ue_context_p->ue_context.Srb0.Tx_buffer.payload_size;
uint16_t payload_size = ue_context_p->ue_context.Srb0.Tx_buffer.payload_size;
// check if data is there for MAC
if (payload_size > 0) {
payload_pP = ue_context_p->ue_context.Srb0.Tx_buffer.Payload;
LOG_D(NR_RRC,"[gNB %d] CCCH has %d bytes (dest: %p, src %p)\n", Mod_idP, payload_size, buffer_pP, payload_pP);
// Fill buffer
memcpy((void *)buffer_pP, (void*)payload_pP, payload_size);
Sdu_size = payload_size;
ue_context_p->ue_context.Srb0.Tx_buffer.payload_size = 0;
}
return Sdu_size;
return payload_size;
}
return(0);
return 0;
}
int8_t nr_mac_rrc_bwp_switch_req(const module_id_t module_idP,
const frame_t frameP,
const sub_frame_t sub_frameP,
const rnti_t rntiP,
const int dl_bwp_id,
const int ul_bwp_id) {
struct rrc_gNB_ue_context_s *ue_context_p = rrc_gNB_get_ue_context(RC.nrrrc[module_idP], rntiP);
protocol_ctxt_t ctxt;
PROTOCOL_CTXT_SET_BY_MODULE_ID(&ctxt, module_idP, GNB_FLAG_YES, rntiP, frameP, sub_frameP, 0);
nr_rrc_reconfiguration_req(ue_context_p, &ctxt, dl_bwp_id, ul_bwp_id);
return 0;
}
int8_t nr_mac_rrc_data_ind(const module_id_t module_idP,
@@ -312,6 +325,7 @@ int8_t nr_mac_rrc_data_ind(const module_id_t module_idP,
// call do_RRCSetup like full procedure and extract masterCellGroup
NR_CellGroupConfig_t cellGroupConfig;
NR_ServingCellConfigCommon_t *scc=RC.nrrrc[module_idP]->carrier.servingcellconfigcommon;
NR_ServingCellConfig_t *servingcellconfigdedicated = RC.nrrrc[module_idP]->configuration.scd;
memset(&cellGroupConfig,0,sizeof(cellGroupConfig));
struct rrc_gNB_ue_context_s *ue_context_p = rrc_gNB_allocate_new_UE_context(RC.nrrrc[module_idP]);
@@ -321,16 +335,16 @@ int8_t nr_mac_rrc_data_ind(const module_id_t module_idP,
ue_context_p->ue_context.Srb0.Active = 1;
RB_INSERT(rrc_nr_ue_tree_s, &RC.nrrrc[module_idP]->rrc_ue_head, ue_context_p);
fill_initial_cellGroupConfig(ue_context_p->local_uid,&cellGroupConfig,scc, &RC.nrrrc[module_idP]->configuration);
fill_initial_cellGroupConfig(ue_context_p->local_uid,&cellGroupConfig,scc,servingcellconfigdedicated,&RC.nrrrc[module_idP]->configuration);
MessageDef* tmp=itti_alloc_new_message_sized(TASK_RRC_GNB, 0, F1AP_INITIAL_UL_RRC_MESSAGE, sizeof(f1ap_initial_ul_rrc_message_t) + sdu_lenP);
f1ap_initial_ul_rrc_message_t *msg = &F1AP_INITIAL_UL_RRC_MESSAGE(tmp);
asn_enc_rval_t enc_rval = uper_encode_to_buffer(&asn_DEF_NR_CellGroupConfig,
NULL,
(void *)&cellGroupConfig,
msg->du2cu_rrc_container,
1024); //sizeof(msg->du2cu_rrc_container));
NULL,
(void *)&cellGroupConfig,
msg->du2cu_rrc_container,
F1AP_MAX_DU2CU_RRC_LENGTH);
if (enc_rval.encoded == -1) {
LOG_E(F1AP,"Could not encoded cellGroupConfig, failed element %s\n",enc_rval.failed_type->name);
openair2/RRC/NR/MESSAGES/asn1_msg.c
+617 -47
View File
@@ -40,6 +40,7 @@
#include <asn_internal.h> /* for _ASN_DEFAULT_STACK_MAX */
#include <per_encoder.h>
#include <nr/nr_common.h>
#include <softmodem-common.h>
#include "LAYER2/nr_rlc/nr_rlc_oai_api.h"
#include "asn1_msg.h"
@@ -1197,9 +1198,527 @@ void fill_default_csi_MeasConfig(int uid,
ASN_SEQUENCE_ADD(&csi_MeasConfig->csi_ReportConfigToAddModList->list,csirep2);
}
void fill_default_downlinkBWP(NR_BWP_Downlink_t *bwp,
int bwp_loop,
NR_ServingCellConfig_t *servingcellconfigdedicated,
NR_ServingCellConfigCommon_t *scc,
const gNB_RrcConfigurationReq *configuration) {
/// BWP common configuration
bwp->bwp_Common = calloc(1,sizeof(*bwp->bwp_Common));
if(servingcellconfigdedicated->downlinkBWP_ToAddModList &&
bwp_loop < servingcellconfigdedicated->downlinkBWP_ToAddModList->list.count) {
bwp->bwp_Id = servingcellconfigdedicated->downlinkBWP_ToAddModList->list.array[bwp_loop]->bwp_Id;
bwp->bwp_Common->genericParameters.locationAndBandwidth = servingcellconfigdedicated->downlinkBWP_ToAddModList->list.array[bwp_loop]->bwp_Common->genericParameters.locationAndBandwidth;
bwp->bwp_Common->genericParameters.subcarrierSpacing = servingcellconfigdedicated->downlinkBWP_ToAddModList->list.array[bwp_loop]->bwp_Common->genericParameters.subcarrierSpacing;
bwp->bwp_Common->genericParameters.cyclicPrefix = servingcellconfigdedicated->downlinkBWP_ToAddModList->list.array[bwp_loop]->bwp_Common->genericParameters.cyclicPrefix;
} else {
bwp->bwp_Id=bwp_loop+1;
bwp->bwp_Common->genericParameters.locationAndBandwidth = PRBalloc_to_locationandbandwidth(scc->downlinkConfigCommon->frequencyInfoDL->scs_SpecificCarrierList.list.array[0]->carrierBandwidth,0);
bwp->bwp_Common->genericParameters.subcarrierSpacing = scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.subcarrierSpacing;
bwp->bwp_Common->genericParameters.cyclicPrefix = scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.cyclicPrefix;
}
bwp->bwp_Common->pdcch_ConfigCommon=calloc(1,sizeof(*bwp->bwp_Common->pdcch_ConfigCommon));
bwp->bwp_Common->pdcch_ConfigCommon->present = NR_SetupRelease_PDCCH_ConfigCommon_PR_setup;
bwp->bwp_Common->pdcch_ConfigCommon->choice.setup = calloc(1,sizeof(*bwp->bwp_Common->pdcch_ConfigCommon->choice.setup));
bwp->bwp_Common->pdcch_ConfigCommon->choice.setup->controlResourceSetZero=NULL;
bwp->bwp_Common->pdcch_ConfigCommon->choice.setup->commonControlResourceSet=calloc(1,sizeof(*bwp->bwp_Common->pdcch_ConfigCommon->choice.setup->commonControlResourceSet));
int curr_bwp = NRRIV2BW(bwp->bwp_Common->genericParameters.locationAndBandwidth,MAX_BWP_SIZE);
NR_ControlResourceSet_t *coreset = calloc(1,sizeof(*coreset));
coreset->controlResourceSetId=(bwp->bwp_Id<<1); // To uniquely identify each Coreset lets derive it from the BWPId
// frequency domain resources depends on BWP size
// options are 24, 48 or 96
coreset->frequencyDomainResources.buf = calloc(1,6);
if (0) {
if (curr_bwp < 48)
coreset->frequencyDomainResources.buf[0] = 0xf0;
else
coreset->frequencyDomainResources.buf[0] = 0xff;
if (curr_bwp < 96)
coreset->frequencyDomainResources.buf[1] = 0;
else
coreset->frequencyDomainResources.buf[1] = 0xff;
} else {
coreset->frequencyDomainResources.buf[0] = 0xf0;
coreset->frequencyDomainResources.buf[1] = 0;
}
coreset->frequencyDomainResources.buf[2] = 0;
coreset->frequencyDomainResources.buf[3] = 0;
coreset->frequencyDomainResources.buf[4] = 0;
coreset->frequencyDomainResources.buf[5] = 0;
coreset->frequencyDomainResources.size = 6;
coreset->frequencyDomainResources.bits_unused = 3;
coreset->duration=1;
coreset->cce_REG_MappingType.present = NR_ControlResourceSet__cce_REG_MappingType_PR_nonInterleaved;
coreset->precoderGranularity = NR_ControlResourceSet__precoderGranularity_sameAsREG_bundle;
coreset->tci_StatesPDCCH_ToAddList=calloc(1,sizeof(*coreset->tci_StatesPDCCH_ToAddList));
uint64_t bitmap=0;
switch (scc->ssb_PositionsInBurst->present) {
case 1 :
bitmap = ((uint64_t) scc->ssb_PositionsInBurst->choice.shortBitmap.buf[0])<<56;
break;
case 2 :
bitmap = ((uint64_t) scc->ssb_PositionsInBurst->choice.mediumBitmap.buf[0])<<56;
break;
case 3 :
for (int i=0; i<8; i++) {
bitmap |= (((uint64_t) scc->ssb_PositionsInBurst->choice.longBitmap.buf[i])<<((7-i)*8));
}
break;
default:
AssertFatal(1==0,"SSB bitmap size value %d undefined (allowed values 1,2,3) \n", scc->ssb_PositionsInBurst->present);
}
NR_TCI_StateId_t *tci[64];
for (int i=0;i<64;i++) {
if ((bitmap>>(63-i))&0x01){
tci[i]=calloc(1,sizeof(*tci[i]));
*tci[i] = i;
ASN_SEQUENCE_ADD(&coreset->tci_StatesPDCCH_ToAddList->list,tci[i]);
}
}
coreset->tci_StatesPDCCH_ToReleaseList = NULL;
coreset->tci_PresentInDCI = NULL;
coreset->pdcch_DMRS_ScramblingID = NULL;
bwp->bwp_Common->pdcch_ConfigCommon->choice.setup->commonControlResourceSet = coreset;
bwp->bwp_Common->pdcch_ConfigCommon->choice.setup->searchSpaceZero=NULL;
bwp->bwp_Common->pdcch_ConfigCommon->choice.setup->commonSearchSpaceList=NULL;
bwp->bwp_Common->pdcch_ConfigCommon->choice.setup->commonSearchSpaceList=calloc(1,sizeof(*bwp->bwp_Common->pdcch_ConfigCommon->choice.setup->commonSearchSpaceList));
NR_SearchSpace_t *ss=calloc(1,sizeof(*ss));
ss->searchSpaceId = (bwp->bwp_Id<<1)-1 + 7; // To uniquely identify each SearchSpace lets derive it from the BWPId
ss->controlResourceSetId=calloc(1,sizeof(*ss->controlResourceSetId));
*ss->controlResourceSetId=coreset->controlResourceSetId;
ss->monitoringSlotPeriodicityAndOffset = calloc(1,sizeof(*ss->monitoringSlotPeriodicityAndOffset));
ss->monitoringSlotPeriodicityAndOffset->present = NR_SearchSpace__monitoringSlotPeriodicityAndOffset_PR_sl1;
ss->duration=NULL;
ss->monitoringSymbolsWithinSlot = calloc(1,sizeof(*ss->monitoringSymbolsWithinSlot));
ss->monitoringSymbolsWithinSlot->buf = calloc(1,2);
// should be '1100 0000 0000 00'B (LSB first!), first two symols in slot, adjust if needed
ss->monitoringSymbolsWithinSlot->buf[1] = 0;
ss->monitoringSymbolsWithinSlot->buf[0] = (1<<7);
ss->monitoringSymbolsWithinSlot->size = 2;
ss->monitoringSymbolsWithinSlot->bits_unused = 2;
ss->nrofCandidates = calloc(1,sizeof(*ss->nrofCandidates));
ss->nrofCandidates->aggregationLevel1 = NR_SearchSpace__nrofCandidates__aggregationLevel1_n0;
ss->nrofCandidates->aggregationLevel2 = NR_SearchSpace__nrofCandidates__aggregationLevel2_n2;
ss->nrofCandidates->aggregationLevel4 = NR_SearchSpace__nrofCandidates__aggregationLevel4_n1;
ss->nrofCandidates->aggregationLevel8 = NR_SearchSpace__nrofCandidates__aggregationLevel8_n0;
ss->nrofCandidates->aggregationLevel16 = NR_SearchSpace__nrofCandidates__aggregationLevel16_n0;
ss->searchSpaceType = calloc(1,sizeof(*ss->searchSpaceType));
ss->searchSpaceType->present = NR_SearchSpace__searchSpaceType_PR_common;
ss->searchSpaceType->choice.common=calloc(1,sizeof(*ss->searchSpaceType->choice.common));
ss->searchSpaceType->choice.common->dci_Format0_0_AndFormat1_0 = calloc(1,sizeof(*ss->searchSpaceType->choice.common->dci_Format0_0_AndFormat1_0));
ASN_SEQUENCE_ADD(&bwp->bwp_Common->pdcch_ConfigCommon->choice.setup->commonSearchSpaceList->list,ss);
bwp->bwp_Common->pdcch_ConfigCommon->choice.setup->searchSpaceSIB1=NULL;
bwp->bwp_Common->pdcch_ConfigCommon->choice.setup->searchSpaceOtherSystemInformation=NULL;
bwp->bwp_Common->pdcch_ConfigCommon->choice.setup->pagingSearchSpace=NULL;
bwp->bwp_Common->pdcch_ConfigCommon->choice.setup->ra_SearchSpace=NULL;
bwp->bwp_Common->pdcch_ConfigCommon->choice.setup->ext1=NULL;
bwp->bwp_Common->pdsch_ConfigCommon=calloc(1,sizeof(*bwp->bwp_Common->pdsch_ConfigCommon));
bwp->bwp_Common->pdsch_ConfigCommon->present = NR_SetupRelease_PDSCH_ConfigCommon_PR_setup;
bwp->bwp_Common->pdsch_ConfigCommon->choice.setup = calloc(1,sizeof(*bwp->bwp_Common->pdsch_ConfigCommon->choice.setup));
bwp->bwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList = calloc(1,sizeof(*bwp->bwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList));
// Prepare PDSCH-TimeDomainResourceAllocation list
nr_rrc_config_dl_tda(scc,
bwp->bwp_Common->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList,
curr_bwp);
/// BWP dedicated configuration
bwp->bwp_Dedicated=calloc(1,sizeof(*bwp->bwp_Dedicated));
bwp->bwp_Dedicated->pdcch_Config=calloc(1,sizeof(*bwp->bwp_Dedicated->pdcch_Config));
bwp->bwp_Dedicated->pdcch_Config->present = NR_SetupRelease_PDCCH_Config_PR_setup;
bwp->bwp_Dedicated->pdcch_Config->choice.setup = calloc(1,sizeof(*bwp->bwp_Dedicated->pdcch_Config->choice.setup));
bwp->bwp_Dedicated->pdcch_Config->choice.setup->searchSpacesToAddModList = calloc(1,sizeof(*bwp->bwp_Dedicated->pdcch_Config->choice.setup->searchSpacesToAddModList));
bwp->bwp_Dedicated->pdcch_Config->choice.setup->controlResourceSetToAddModList = calloc(1,sizeof(*bwp->bwp_Dedicated->pdcch_Config->choice.setup->controlResourceSetToAddModList));
NR_ControlResourceSet_t *coreset2 = calloc(1,sizeof(*coreset2));
coreset2->controlResourceSetId=(bwp->bwp_Id<<1)+1; // To uniquely identify each Coreset lets derive it from the BWPId
// frequency domain resources depends on BWP size
// options are 24, 48 or 96
coreset2->frequencyDomainResources.buf = calloc(1,6);
if (0) {
if (curr_bwp < 48)
coreset2->frequencyDomainResources.buf[0] = 0xf0;
else
coreset2->frequencyDomainResources.buf[0] = 0xff;
if (curr_bwp < 96)
coreset2->frequencyDomainResources.buf[1] = 0;
else
coreset2->frequencyDomainResources.buf[1] = 0xff;
} else {
coreset2->frequencyDomainResources.buf[0] = 0xf0;
coreset2->frequencyDomainResources.buf[1] = 0;
}
coreset2->frequencyDomainResources.buf[2] = 0;
coreset2->frequencyDomainResources.buf[3] = 0;
coreset2->frequencyDomainResources.buf[4] = 0;
coreset2->frequencyDomainResources.buf[5] = 0;
coreset2->frequencyDomainResources.size = 6;
coreset2->frequencyDomainResources.bits_unused = 3;
coreset2->duration=1;
coreset2->cce_REG_MappingType.present = NR_ControlResourceSet__cce_REG_MappingType_PR_nonInterleaved;
coreset2->precoderGranularity = NR_ControlResourceSet__precoderGranularity_sameAsREG_bundle;
coreset2->tci_StatesPDCCH_ToAddList=NULL;
coreset2->tci_StatesPDCCH_ToReleaseList = NULL;
coreset2->tci_PresentInDCI = NULL;
coreset2->pdcch_DMRS_ScramblingID = NULL;
ASN_SEQUENCE_ADD(&bwp->bwp_Dedicated->pdcch_Config->choice.setup->controlResourceSetToAddModList->list, coreset2);
bwp->bwp_Dedicated->pdcch_Config->choice.setup->searchSpacesToAddModList = calloc(1,sizeof(*bwp->bwp_Dedicated->pdcch_Config->choice.setup->searchSpacesToAddModList));
NR_SearchSpace_t *ss2 = calloc(1,sizeof(*ss2));
ss2->searchSpaceId=(bwp->bwp_Id<<1) + 7; // To uniquely identify each SearchSpace lets derive it from the BWPId
ss2->controlResourceSetId=calloc(1,sizeof(*ss2->controlResourceSetId));
*ss2->controlResourceSetId=coreset2->controlResourceSetId;
ss2->monitoringSlotPeriodicityAndOffset=calloc(1,sizeof(*ss2->monitoringSlotPeriodicityAndOffset));
ss2->monitoringSlotPeriodicityAndOffset->present = NR_SearchSpace__monitoringSlotPeriodicityAndOffset_PR_sl1;
ss2->monitoringSlotPeriodicityAndOffset->choice.sl1=(NULL_t)0;
ss2->duration=NULL;
ss2->monitoringSymbolsWithinSlot = calloc(1,sizeof(*ss2->monitoringSymbolsWithinSlot));
ss2->monitoringSymbolsWithinSlot->buf = calloc(1,2);
ss2->monitoringSymbolsWithinSlot->size = 2;
ss2->monitoringSymbolsWithinSlot->buf[0]=0x80;
ss2->monitoringSymbolsWithinSlot->buf[1]=0x0;
ss2->monitoringSymbolsWithinSlot->bits_unused = 2;
ss2->nrofCandidates=calloc(1,sizeof(*ss2->nrofCandidates));
ss2->nrofCandidates->aggregationLevel1 = NR_SearchSpace__nrofCandidates__aggregationLevel1_n0;
ss2->nrofCandidates->aggregationLevel2 = NR_SearchSpace__nrofCandidates__aggregationLevel2_n2;
ss2->nrofCandidates->aggregationLevel4 = NR_SearchSpace__nrofCandidates__aggregationLevel4_n1;
ss2->nrofCandidates->aggregationLevel8 = NR_SearchSpace__nrofCandidates__aggregationLevel8_n0;
ss2->nrofCandidates->aggregationLevel16 = NR_SearchSpace__nrofCandidates__aggregationLevel16_n0;
ss2->searchSpaceType=calloc(1,sizeof(*ss2->searchSpaceType));
ss2->searchSpaceType->present = NR_SearchSpace__searchSpaceType_PR_ue_Specific;
ss2->searchSpaceType->choice.ue_Specific = calloc(1,sizeof(*ss2->searchSpaceType->choice.ue_Specific));
ss2->searchSpaceType->choice.ue_Specific->dci_Formats=NR_SearchSpace__searchSpaceType__ue_Specific__dci_Formats_formats0_1_And_1_1;
ASN_SEQUENCE_ADD(&bwp->bwp_Dedicated->pdcch_Config->choice.setup->searchSpacesToAddModList->list, ss2);
bwp->bwp_Dedicated->pdsch_Config=calloc(1,sizeof(*bwp->bwp_Dedicated->pdsch_Config));
bwp->bwp_Dedicated->pdsch_Config->present = NR_SetupRelease_PDSCH_Config_PR_setup;
bwp->bwp_Dedicated->pdsch_Config->choice.setup = calloc(1,sizeof(*bwp->bwp_Dedicated->pdsch_Config->choice.setup));
bwp->bwp_Dedicated->pdsch_Config->choice.setup->dataScramblingIdentityPDSCH = NULL;
bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA = calloc(1,sizeof(*bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA));
bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->present= NR_SetupRelease_DMRS_DownlinkConfig_PR_setup;
bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup = calloc(1,sizeof(*bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup));
bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->dmrs_Type=NULL;
bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->maxLength=NULL;
bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->dmrs_AdditionalPosition = calloc(1,sizeof(*bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->dmrs_AdditionalPosition));
*bwp->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->dmrs_AdditionalPosition = NR_DMRS_DownlinkConfig__dmrs_AdditionalPosition_pos1;
bwp->bwp_Dedicated->pdsch_Config->choice.setup->resourceAllocation = NR_PDSCH_Config__resourceAllocation_resourceAllocationType1;
bwp->bwp_Dedicated->pdsch_Config->choice.setup->prb_BundlingType.present = NR_PDSCH_Config__prb_BundlingType_PR_staticBundling;
bwp->bwp_Dedicated->pdsch_Config->choice.setup->prb_BundlingType.choice.staticBundling = calloc(1,sizeof(*bwp->bwp_Dedicated->pdsch_Config->choice.setup->prb_BundlingType.choice.staticBundling));
bwp->bwp_Dedicated->pdsch_Config->choice.setup->prb_BundlingType.choice.staticBundling->bundleSize =
calloc(1,sizeof(*bwp->bwp_Dedicated->pdsch_Config->choice.setup->prb_BundlingType.choice.staticBundling->bundleSize));
*bwp->bwp_Dedicated->pdsch_Config->choice.setup->prb_BundlingType.choice.staticBundling->bundleSize = NR_PDSCH_Config__prb_BundlingType__staticBundling__bundleSize_wideband;
bwp->bwp_Dedicated->pdsch_Config->choice.setup->tci_StatesToAddModList=calloc(1,sizeof(*bwp->bwp_Dedicated->pdsch_Config->choice.setup->tci_StatesToAddModList));
NR_TCI_State_t *tcic = calloc(1,sizeof(*tcic));
tcic->tci_StateId=0;
tcic->qcl_Type1.cell=NULL;
tcic->qcl_Type1.bwp_Id=NULL;
tcic->qcl_Type1.referenceSignal.present = NR_QCL_Info__referenceSignal_PR_ssb;
tcic->qcl_Type1.referenceSignal.choice.ssb = 0;
tcic->qcl_Type1.qcl_Type=NR_QCL_Info__qcl_Type_typeD;
ASN_SEQUENCE_ADD(&bwp->bwp_Dedicated->pdsch_Config->choice.setup->tci_StatesToAddModList->list,tcic);
}
void fill_default_uplinkBWP(NR_BWP_Uplink_t *ubwp,
int bwp_loop,
NR_ServingCellConfig_t *servingcellconfigdedicated,
NR_ServingCellConfigCommon_t *scc,
const gNB_RrcConfigurationReq *configuration,
int uid) {
/// BWP common configuration
ubwp->bwp_Common = calloc(1,sizeof(*ubwp->bwp_Common));
if(servingcellconfigdedicated->uplinkConfig->uplinkBWP_ToAddModList &&
bwp_loop < servingcellconfigdedicated->uplinkConfig->uplinkBWP_ToAddModList->list.count) {
ubwp->bwp_Id = servingcellconfigdedicated->uplinkConfig->uplinkBWP_ToAddModList->list.array[bwp_loop]->bwp_Id;
ubwp->bwp_Common->genericParameters.locationAndBandwidth = servingcellconfigdedicated->uplinkConfig->uplinkBWP_ToAddModList->list.array[bwp_loop]->bwp_Common->genericParameters.locationAndBandwidth;
ubwp->bwp_Common->genericParameters.subcarrierSpacing = servingcellconfigdedicated->uplinkConfig->uplinkBWP_ToAddModList->list.array[bwp_loop]->bwp_Common->genericParameters.subcarrierSpacing;
ubwp->bwp_Common->genericParameters.cyclicPrefix = servingcellconfigdedicated->uplinkConfig->uplinkBWP_ToAddModList->list.array[bwp_loop]->bwp_Common->genericParameters.cyclicPrefix;
} else {
ubwp->bwp_Id=bwp_loop+1;
ubwp->bwp_Common->genericParameters.locationAndBandwidth = PRBalloc_to_locationandbandwidth(scc->uplinkConfigCommon->frequencyInfoUL->scs_SpecificCarrierList.list.array[0]->carrierBandwidth,0);
ubwp->bwp_Common->genericParameters.subcarrierSpacing = scc->uplinkConfigCommon->initialUplinkBWP->genericParameters.subcarrierSpacing;
ubwp->bwp_Common->genericParameters.cyclicPrefix = scc->uplinkConfigCommon->initialUplinkBWP->genericParameters.cyclicPrefix;
}
ubwp->bwp_Common->rach_ConfigCommon = NULL;
ubwp->bwp_Common->pusch_ConfigCommon = scc->uplinkConfigCommon->initialUplinkBWP->pusch_ConfigCommon;
ubwp->bwp_Common->pucch_ConfigCommon = scc->uplinkConfigCommon->initialUplinkBWP->pucch_ConfigCommon;
/// BWP dedicated configuration
ubwp->bwp_Dedicated = calloc(1,sizeof(*ubwp->bwp_Dedicated));
// PUCCH config
ubwp->bwp_Dedicated->pucch_Config = calloc(1,sizeof(*ubwp->bwp_Dedicated->pucch_Config));
ubwp->bwp_Dedicated->pucch_Config->present = NR_SetupRelease_PUCCH_Config_PR_setup;
NR_PUCCH_Config_t *pucch_Config = calloc(1,sizeof(*pucch_Config));
ubwp->bwp_Dedicated->pucch_Config->choice.setup=pucch_Config;
pucch_Config->resourceSetToAddModList = calloc(1,sizeof(*pucch_Config->resourceSetToAddModList));
pucch_Config->resourceSetToReleaseList = NULL;
NR_PUCCH_ResourceSet_t *pucchresset0=calloc(1,sizeof(*pucchresset0));
pucchresset0->pucch_ResourceSetId = 0;
NR_PUCCH_ResourceId_t *pucchres0id0=calloc(1,sizeof(*pucchres0id0));
*pucchres0id0=ubwp->bwp_Id; // To uniquely identify each pucchresource lets derive it from the BWPId
ASN_SEQUENCE_ADD(&pucchresset0->resourceList.list,pucchres0id0);
pucchresset0->maxPayloadSize=NULL;
ASN_SEQUENCE_ADD(&pucch_Config->resourceSetToAddModList->list,pucchresset0);
pucch_Config->resourceToAddModList = calloc(1,sizeof(*pucch_Config->resourceToAddModList));
pucch_Config->resourceToReleaseList = NULL;
int curr_bwp = NRRIV2BW(ubwp->bwp_Common->genericParameters.locationAndBandwidth,MAX_BWP_SIZE);
NR_PUCCH_Resource_t *pucchres0=calloc(1,sizeof(*pucchres0));
pucchres0->pucch_ResourceId=*pucchres0id0;
pucchres0->startingPRB=(8+uid) % curr_bwp;
pucchres0->intraSlotFrequencyHopping=NULL;
pucchres0->secondHopPRB=NULL;
pucchres0->format.present= NR_PUCCH_Resource__format_PR_format0;
pucchres0->format.choice.format0=calloc(1,sizeof(*pucchres0->format.choice.format0));
pucchres0->format.choice.format0->initialCyclicShift=0;
pucchres0->format.choice.format0->nrofSymbols=1;
pucchres0->format.choice.format0->startingSymbolIndex=13;
ASN_SEQUENCE_ADD(&pucch_Config->resourceToAddModList->list,pucchres0);
/*
pucch_Config->format2=calloc(1,sizeof(*pucch_Config->format2));
pucch_Config->format2->present=NR_SetupRelease_PUCCH_FormatConfig_PR_setup;
NR_PUCCH_FormatConfig_t *pucchfmt2 = calloc(1,sizeof(*pucchfmt2));
pucch_Config->format2->choice.setup = pucchfmt2;
pucchfmt2->interslotFrequencyHopping=NULL;
pucchfmt2->additionalDMRS=NULL;
pucchfmt2->maxCodeRate=calloc(1,sizeof(*pucchfmt2->maxCodeRate));
*pucchfmt2->maxCodeRate=NR_PUCCH_MaxCodeRate_zeroDot35;
pucchfmt2->nrofSlots=NULL;
pucchfmt2->pi2BPSK=NULL;
pucchfmt2->simultaneousHARQ_ACK_CSI=calloc(1,sizeof(*pucchfmt2->simultaneousHARQ_ACK_CSI));
*pucchfmt2->simultaneousHARQ_ACK_CSI=NR_PUCCH_FormatConfig__simultaneousHARQ_ACK_CSI_true;
*/
// PUCCH config - Scheduling request configuration
pucch_Config->schedulingRequestResourceToAddModList = calloc(1,sizeof(*pucch_Config->schedulingRequestResourceToAddModList));
NR_SchedulingRequestResourceConfig_t *schedulingRequestResourceConfig = calloc(1,sizeof(*schedulingRequestResourceConfig));
schedulingRequestResourceConfig->schedulingRequestResourceId = 1;
schedulingRequestResourceConfig->schedulingRequestID = 0;
schedulingRequestResourceConfig->periodicityAndOffset = calloc(1,sizeof(*schedulingRequestResourceConfig->periodicityAndOffset));
schedulingRequestResourceConfig->periodicityAndOffset->present = NR_SchedulingRequestResourceConfig__periodicityAndOffset_PR_sl40; // 40 slot period
// note: make sure that there is no issue here. Later choose the RNTI accordingly.
// Here we would be limited to 3 UEs on this resource (1 1/2 Frames 30 kHz SCS, 5 ms TDD periodicity => slots 7,8,9).
// This should be a temporary resource until the first RRCReconfiguration gives new pucch resources.
// Check for above configuration and exit for now if it is not the case
AssertFatal(scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.subcarrierSpacing==NR_SubcarrierSpacing_kHz30,
"SCS != 30kHz\n");
AssertFatal(scc->tdd_UL_DL_ConfigurationCommon->pattern1.dl_UL_TransmissionPeriodicity==NR_TDD_UL_DL_Pattern__dl_UL_TransmissionPeriodicity_ms5,
"TDD period != 5ms : %ld\n",scc->tdd_UL_DL_ConfigurationCommon->pattern1.dl_UL_TransmissionPeriodicity);
schedulingRequestResourceConfig->periodicityAndOffset->choice.sl40 = 8;
schedulingRequestResourceConfig->resource = calloc(1,sizeof(*schedulingRequestResourceConfig->resource));
*schedulingRequestResourceConfig->resource = *pucchres0id0;
ASN_SEQUENCE_ADD(&pucch_Config->schedulingRequestResourceToAddModList->list,schedulingRequestResourceConfig);
pucch_Config->schedulingRequestResourceToReleaseList=NULL;
pucch_Config->multi_CSI_PUCCH_ResourceList=NULL;
pucch_Config->dl_DataToUL_ACK = calloc(1,sizeof(*pucch_Config->dl_DataToUL_ACK));
long *delay[8];
for (int i=0;i<8;i++) {
delay[i] = calloc(1,sizeof(*delay[i]));
AssertFatal(configuration->minRXTXTIME >=2 && configuration->minRXTXTIME <7, "check minRXTXTIME %d\n",configuration->minRXTXTIME);
*delay[i] = i+configuration->minRXTXTIME;
ASN_SEQUENCE_ADD(&pucch_Config->dl_DataToUL_ACK->list,delay[i]);
}
pucch_Config->spatialRelationInfoToAddModList = calloc(1,sizeof(*pucch_Config->spatialRelationInfoToAddModList));
NR_PUCCH_SpatialRelationInfo_t *pucchspatial = calloc(1,sizeof(*pucchspatial));
pucchspatial->pucch_SpatialRelationInfoId = 1;
pucchspatial->servingCellId = NULL;
if(configuration->do_CSIRS) {
pucchspatial->referenceSignal.present = NR_PUCCH_SpatialRelationInfo__referenceSignal_PR_csi_RS_Index;
pucchspatial->referenceSignal.choice.csi_RS_Index = 0;
}
else {
pucchspatial->referenceSignal.present = NR_PUCCH_SpatialRelationInfo__referenceSignal_PR_ssb_Index;
pucchspatial->referenceSignal.choice.ssb_Index = 0;
}
pucchspatial->pucch_PathlossReferenceRS_Id = 0;
pucchspatial->p0_PUCCH_Id = 1;
pucchspatial->closedLoopIndex = NR_PUCCH_SpatialRelationInfo__closedLoopIndex_i0;
ASN_SEQUENCE_ADD(&pucch_Config->spatialRelationInfoToAddModList->list,pucchspatial);
pucch_Config->spatialRelationInfoToReleaseList=NULL;
pucch_Config->pucch_PowerControl=calloc(1,sizeof(*pucch_Config->pucch_PowerControl));
pucch_Config->pucch_PowerControl->deltaF_PUCCH_f0 = calloc(1,sizeof(*pucch_Config->pucch_PowerControl->deltaF_PUCCH_f0));
*pucch_Config->pucch_PowerControl->deltaF_PUCCH_f0 = 0;
pucch_Config->pucch_PowerControl->deltaF_PUCCH_f1 = calloc(1,sizeof(*pucch_Config->pucch_PowerControl->deltaF_PUCCH_f1));
*pucch_Config->pucch_PowerControl->deltaF_PUCCH_f1 = 0;
pucch_Config->pucch_PowerControl->deltaF_PUCCH_f2 = calloc(1,sizeof(*pucch_Config->pucch_PowerControl->deltaF_PUCCH_f2));
*pucch_Config->pucch_PowerControl->deltaF_PUCCH_f2 = 0;
pucch_Config->pucch_PowerControl->deltaF_PUCCH_f3 = calloc(1,sizeof(*pucch_Config->pucch_PowerControl->deltaF_PUCCH_f3));
*pucch_Config->pucch_PowerControl->deltaF_PUCCH_f3 = 0;
pucch_Config->pucch_PowerControl->deltaF_PUCCH_f4 = calloc(1,sizeof(*pucch_Config->pucch_PowerControl->deltaF_PUCCH_f4));
*pucch_Config->pucch_PowerControl->deltaF_PUCCH_f4 = 0;
pucch_Config->pucch_PowerControl->p0_Set = calloc(1,sizeof(*pucch_Config->pucch_PowerControl->p0_Set));
NR_P0_PUCCH_t *p00 = calloc(1,sizeof(*p00));
p00->p0_PUCCH_Id=1;
p00->p0_PUCCH_Value = 0;
ASN_SEQUENCE_ADD(&pucch_Config->pucch_PowerControl->p0_Set->list,p00);
pucch_Config->pucch_PowerControl->pathlossReferenceRSs = NULL;
// PUSCH config
ubwp->bwp_Dedicated->pusch_Config = calloc(1,sizeof(*ubwp->bwp_Dedicated->pusch_Config));
ubwp->bwp_Dedicated->pusch_Config->present = NR_SetupRelease_PUSCH_Config_PR_setup;
NR_PUSCH_Config_t *pusch_Config = calloc(1,sizeof(*pusch_Config));
ubwp->bwp_Dedicated->pusch_Config->choice.setup = pusch_Config;
pusch_Config->txConfig=calloc(1,sizeof(*pusch_Config->txConfig));
*pusch_Config->txConfig= NR_PUSCH_Config__txConfig_codebook;
pusch_Config->dmrs_UplinkForPUSCH_MappingTypeA = NULL;
pusch_Config->dmrs_UplinkForPUSCH_MappingTypeB = calloc(1,sizeof(*pusch_Config->dmrs_UplinkForPUSCH_MappingTypeB));
pusch_Config->dmrs_UplinkForPUSCH_MappingTypeB->present = NR_SetupRelease_DMRS_UplinkConfig_PR_setup;
pusch_Config->dmrs_UplinkForPUSCH_MappingTypeB->choice.setup = calloc(1,sizeof(*pusch_Config->dmrs_UplinkForPUSCH_MappingTypeB->choice.setup));
NR_DMRS_UplinkConfig_t *NR_DMRS_UplinkConfig = pusch_Config->dmrs_UplinkForPUSCH_MappingTypeB->choice.setup;
NR_DMRS_UplinkConfig->dmrs_Type = NULL;
NR_DMRS_UplinkConfig->dmrs_AdditionalPosition = calloc(1,sizeof(*NR_DMRS_UplinkConfig->dmrs_AdditionalPosition));
*NR_DMRS_UplinkConfig->dmrs_AdditionalPosition = NR_DMRS_UplinkConfig__dmrs_AdditionalPosition_pos0;
NR_DMRS_UplinkConfig->phaseTrackingRS=NULL;
NR_DMRS_UplinkConfig->maxLength=NULL;
NR_DMRS_UplinkConfig->transformPrecodingDisabled = calloc(1,sizeof(*NR_DMRS_UplinkConfig->transformPrecodingDisabled));
NR_DMRS_UplinkConfig->transformPrecodingDisabled->scramblingID0 = NULL;
NR_DMRS_UplinkConfig->transformPrecodingDisabled->scramblingID1 = NULL;
NR_DMRS_UplinkConfig->transformPrecodingEnabled = NULL;
pusch_Config->pusch_PowerControl = calloc(1,sizeof(*pusch_Config->pusch_PowerControl));
pusch_Config->pusch_PowerControl->tpc_Accumulation = NULL;
pusch_Config->pusch_PowerControl->msg3_Alpha = calloc(1,sizeof(*pusch_Config->pusch_PowerControl->msg3_Alpha));
*pusch_Config->pusch_PowerControl->msg3_Alpha = NR_Alpha_alpha1;
pusch_Config->pusch_PowerControl->p0_NominalWithoutGrant = calloc(1,sizeof(*pusch_Config->pusch_PowerControl->p0_NominalWithoutGrant));
*pusch_Config->pusch_PowerControl->p0_NominalWithoutGrant = -98;
pusch_Config->pusch_PowerControl->p0_AlphaSets = calloc(1,sizeof(*pusch_Config->pusch_PowerControl->p0_AlphaSets));
NR_P0_PUSCH_AlphaSet_t *aset = calloc(1,sizeof(*aset));
aset->p0_PUSCH_AlphaSetId=0;
aset->p0=calloc(1,sizeof(*aset->p0));
*aset->p0 = 0;
aset->alpha=calloc(1,sizeof(*aset->alpha));
*aset->alpha=NR_Alpha_alpha1;
ASN_SEQUENCE_ADD(&pusch_Config->pusch_PowerControl->p0_AlphaSets->list,aset);
pusch_Config->pusch_PowerControl->pathlossReferenceRSToAddModList = calloc(1,sizeof(*pusch_Config->pusch_PowerControl->pathlossReferenceRSToAddModList));
NR_PUSCH_PathlossReferenceRS_t *plrefRS = calloc(1,sizeof(*plrefRS));
plrefRS->pusch_PathlossReferenceRS_Id=0;
plrefRS->referenceSignal.present = NR_PUSCH_PathlossReferenceRS__referenceSignal_PR_ssb_Index;
plrefRS->referenceSignal.choice.ssb_Index = 0;
ASN_SEQUENCE_ADD(&pusch_Config->pusch_PowerControl->pathlossReferenceRSToAddModList->list,plrefRS);
pusch_Config->pusch_PowerControl->pathlossReferenceRSToReleaseList = NULL;
pusch_Config->pusch_PowerControl->twoPUSCH_PC_AdjustmentStates = NULL;
pusch_Config->pusch_PowerControl->deltaMCS = NULL;
pusch_Config->pusch_PowerControl->sri_PUSCH_MappingToAddModList = calloc(1,sizeof(*pusch_Config->pusch_PowerControl->sri_PUSCH_MappingToAddModList));
NR_SRI_PUSCH_PowerControl_t *sriPUSCHPC=calloc(1,sizeof(*sriPUSCHPC));
sriPUSCHPC->sri_PUSCH_PowerControlId=0;
sriPUSCHPC->sri_PUSCH_PathlossReferenceRS_Id=0;
sriPUSCHPC->sri_P0_PUSCH_AlphaSetId=0;
sriPUSCHPC->sri_PUSCH_ClosedLoopIndex=NR_SRI_PUSCH_PowerControl__sri_PUSCH_ClosedLoopIndex_i0;
ASN_SEQUENCE_ADD(&pusch_Config->pusch_PowerControl->sri_PUSCH_MappingToAddModList->list,sriPUSCHPC);
pusch_Config->pusch_PowerControl->sri_PUSCH_MappingToReleaseList = NULL;
pusch_Config->frequencyHopping=NULL;
pusch_Config->frequencyHoppingOffsetLists=NULL;
pusch_Config->resourceAllocation = NR_PUSCH_Config__resourceAllocation_resourceAllocationType1;
pusch_Config->pusch_TimeDomainAllocationList = NULL;
pusch_Config->pusch_AggregationFactor=NULL;
pusch_Config->mcs_Table=NULL;
pusch_Config->mcs_TableTransformPrecoder=NULL;
pusch_Config->transformPrecoder= NULL;
if (scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->msg3_transformPrecoder == NULL) {
pusch_Config->transformPrecoder=calloc(1,sizeof(*pusch_Config->transformPrecoder));
*pusch_Config->transformPrecoder = NR_PUSCH_Config__transformPrecoder_disabled;
}
pusch_Config->codebookSubset=calloc(1,sizeof(*pusch_Config->codebookSubset));
*pusch_Config->codebookSubset = NR_PUSCH_Config__codebookSubset_nonCoherent;
pusch_Config->maxRank=calloc(1,sizeof(*pusch_Config->maxRank));
*pusch_Config->maxRank= 1;
pusch_Config->rbg_Size=NULL;
pusch_Config->uci_OnPUSCH=NULL;
pusch_Config->tp_pi2BPSK=NULL;
uint8_t transform_precoding = NR_PUSCH_Config__transformPrecoder_disabled;
if (pusch_Config->transformPrecoder == NULL) {
if (scc->uplinkConfigCommon->initialUplinkBWP->rach_ConfigCommon->choice.setup->msg3_transformPrecoder != NULL)
transform_precoding = NR_PUSCH_Config__transformPrecoder_enabled;
}
else {
transform_precoding = *pusch_Config->transformPrecoder;
}
if (transform_precoding == NR_PUSCH_Config__transformPrecoder_enabled) {
// Enable DMRS uplink config for transform precoding enabled
NR_DMRS_UplinkConfig->transformPrecodingEnabled = calloc(1,sizeof(*NR_DMRS_UplinkConfig->transformPrecodingEnabled));
NR_DMRS_UplinkConfig->transformPrecodingEnabled->nPUSCH_Identity = NULL;
NR_DMRS_UplinkConfig->transformPrecodingEnabled->sequenceGroupHopping = NULL;
NR_DMRS_UplinkConfig->transformPrecodingEnabled->sequenceHopping = NULL;
NR_DMRS_UplinkConfig->transformPrecodingEnabled->ext1 = NULL;
LOG_I(NR_RRC,"Transform precoding enabled\n");
}
// SRS config
ubwp->bwp_Dedicated->configuredGrantConfig = NULL;
ubwp->bwp_Dedicated->srs_Config = calloc(1,sizeof(*ubwp->bwp_Dedicated->srs_Config));
ubwp->bwp_Dedicated->srs_Config->present = NR_SetupRelease_SRS_Config_PR_setup;
NR_SRS_Config_t *srs_Config = calloc(1,sizeof(*srs_Config));
ubwp->bwp_Dedicated->srs_Config->choice.setup = srs_Config;
srs_Config->srs_ResourceSetToReleaseList=NULL;
srs_Config->srs_ResourceSetToAddModList=calloc(1,sizeof(*srs_Config->srs_ResourceSetToAddModList));
NR_SRS_ResourceSet_t *srs_resset0=calloc(1,sizeof(*srs_resset0));
srs_resset0->srs_ResourceSetId = 0;
srs_resset0->srs_ResourceIdList=calloc(1,sizeof(*srs_resset0->srs_ResourceIdList));
NR_SRS_ResourceId_t *srs_resset0_id=calloc(1,sizeof(*srs_resset0_id));
*srs_resset0_id=0;
ASN_SEQUENCE_ADD(&srs_resset0->srs_ResourceIdList->list,srs_resset0_id);
srs_Config->srs_ResourceToReleaseList=NULL;
srs_resset0->resourceType.present = NR_SRS_ResourceSet__resourceType_PR_aperiodic;
srs_resset0->resourceType.choice.aperiodic = calloc(1,sizeof(*srs_resset0->resourceType.choice.aperiodic));
srs_resset0->resourceType.choice.aperiodic->aperiodicSRS_ResourceTrigger=1;
srs_resset0->resourceType.choice.aperiodic->csi_RS=NULL;
srs_resset0->resourceType.choice.aperiodic->slotOffset= calloc(1,sizeof(*srs_resset0->resourceType.choice.aperiodic->slotOffset));
*srs_resset0->resourceType.choice.aperiodic->slotOffset=2;
srs_resset0->resourceType.choice.aperiodic->ext1=NULL;
srs_resset0->usage=NR_SRS_ResourceSet__usage_codebook;
srs_resset0->alpha = calloc(1,sizeof(*srs_resset0->alpha));
*srs_resset0->alpha = NR_Alpha_alpha1;
srs_resset0->p0=calloc(1,sizeof(*srs_resset0->p0));
*srs_resset0->p0=-80;
srs_resset0->pathlossReferenceRS=NULL;
srs_resset0->srs_PowerControlAdjustmentStates=NULL;
ASN_SEQUENCE_ADD(&srs_Config->srs_ResourceSetToAddModList->list,srs_resset0);
srs_Config->srs_ResourceToReleaseList=NULL;
srs_Config->srs_ResourceToAddModList=calloc(1,sizeof(*srs_Config->srs_ResourceToAddModList));
NR_SRS_Resource_t *srs_res0=calloc(1,sizeof(*srs_res0));
srs_res0->srs_ResourceId=0;
srs_res0->nrofSRS_Ports=NR_SRS_Resource__nrofSRS_Ports_port1;
srs_res0->ptrs_PortIndex=NULL;
srs_res0->transmissionComb.present=NR_SRS_Resource__transmissionComb_PR_n2;
srs_res0->transmissionComb.choice.n2=calloc(1,sizeof(*srs_res0->transmissionComb.choice.n2));
srs_res0->transmissionComb.choice.n2->combOffset_n2=0;
srs_res0->transmissionComb.choice.n2->cyclicShift_n2=0;
srs_res0->resourceMapping.startPosition=2;
srs_res0->resourceMapping.nrofSymbols=NR_SRS_Resource__resourceMapping__nrofSymbols_n1;
srs_res0->resourceMapping.repetitionFactor=NR_SRS_Resource__resourceMapping__repetitionFactor_n1;
srs_res0->freqDomainPosition=0;
srs_res0->freqDomainShift=0;
srs_res0->freqHopping.c_SRS=0;
srs_res0->freqHopping.b_SRS=0;
srs_res0->freqHopping.b_hop=0;
srs_res0->groupOrSequenceHopping=NR_SRS_Resource__groupOrSequenceHopping_neither;
srs_res0->resourceType.present= NR_SRS_Resource__resourceType_PR_aperiodic;
srs_res0->resourceType.choice.aperiodic=calloc(1,sizeof(*srs_res0->resourceType.choice.aperiodic));
srs_res0->sequenceId=40;
srs_res0->spatialRelationInfo=calloc(1,sizeof(*srs_res0->spatialRelationInfo));
srs_res0->spatialRelationInfo->servingCellId=NULL;
srs_res0->spatialRelationInfo->referenceSignal.present=NR_SRS_SpatialRelationInfo__referenceSignal_PR_csi_RS_Index;
srs_res0->spatialRelationInfo->referenceSignal.choice.csi_RS_Index=0;
ASN_SEQUENCE_ADD(&srs_Config->srs_ResourceToAddModList->list,srs_res0);
ubwp->bwp_Dedicated->beamFailureRecoveryConfig = NULL;
}
void fill_initial_SpCellConfig(int uid,
NR_SpCellConfig_t *SpCellConfig,
NR_ServingCellConfigCommon_t *scc,
NR_ServingCellConfig_t *servingcellconfigdedicated,
const gNB_RrcConfigurationReq *configuration)
{
// This assert will never happen in the current implementation because NUMBER_OF_UE_MAX = 4.
@@ -1212,8 +1731,10 @@ void fill_initial_SpCellConfig(int uid,
SpCellConfig->reconfigurationWithSync = NULL;
SpCellConfig->rlmInSyncOutOfSyncThreshold = NULL;
SpCellConfig->rlf_TimersAndConstants = NULL;
SpCellConfig->spCellConfigDedicated = calloc(1,sizeof(*SpCellConfig->spCellConfigDedicated));
SpCellConfig->spCellConfigDedicated->uplinkConfig = calloc(1,sizeof(*SpCellConfig->spCellConfigDedicated->uplinkConfig));
NR_BWP_UplinkDedicated_t *initialUplinkBWP = calloc(1,sizeof(*initialUplinkBWP));
SpCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP = initialUplinkBWP;
initialUplinkBWP->pucch_Config = calloc(1,sizeof(*initialUplinkBWP->pucch_Config));
@@ -1444,7 +1965,7 @@ void fill_initial_SpCellConfig(int uid,
pucch_Config->schedulingRequestResourceToAddModList = calloc(1,sizeof(*pucch_Config->schedulingRequestResourceToAddModList));
NR_SchedulingRequestResourceConfig_t *schedulingRequestResourceConfig = calloc(1,sizeof(*schedulingRequestResourceConfig));
schedulingRequestResourceConfig->schedulingRequestResourceId = 1;
schedulingRequestResourceConfig->schedulingRequestID= 0;
schedulingRequestResourceConfig->schedulingRequestID = 0;
schedulingRequestResourceConfig->periodicityAndOffset = calloc(1,sizeof(*schedulingRequestResourceConfig->periodicityAndOffset));
schedulingRequestResourceConfig->periodicityAndOffset->present = NR_SchedulingRequestResourceConfig__periodicityAndOffset_PR_sl40;
AssertFatal(scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.subcarrierSpacing==NR_SubcarrierSpacing_kHz30,
@@ -1526,13 +2047,13 @@ void fill_initial_SpCellConfig(int uid,
ss2->monitoringSymbolsWithinSlot = calloc(1,sizeof(*ss2->monitoringSymbolsWithinSlot));
ss2->monitoringSymbolsWithinSlot->buf = calloc(1,2);
ss2->monitoringSymbolsWithinSlot->size = 2;
ss2->monitoringSymbolsWithinSlot->bits_unused = 2;
ss2->monitoringSymbolsWithinSlot->buf[0]=0x80;
ss2->monitoringSymbolsWithinSlot->buf[1]=0x0;
ss2->monitoringSymbolsWithinSlot->bits_unused = 2;
ss2->nrofCandidates=calloc(1,sizeof(*ss2->nrofCandidates));
ss2->nrofCandidates->aggregationLevel1 = NR_SearchSpace__nrofCandidates__aggregationLevel1_n0;
ss2->nrofCandidates->aggregationLevel2 = NR_SearchSpace__nrofCandidates__aggregationLevel2_n2;
ss2->nrofCandidates->aggregationLevel4 = NR_SearchSpace__nrofCandidates__aggregationLevel4_n0;
ss2->nrofCandidates->aggregationLevel4 = NR_SearchSpace__nrofCandidates__aggregationLevel4_n1;
ss2->nrofCandidates->aggregationLevel8 = NR_SearchSpace__nrofCandidates__aggregationLevel8_n0;
ss2->nrofCandidates->aggregationLevel16 = NR_SearchSpace__nrofCandidates__aggregationLevel16_n0;
ss2->searchSpaceType=calloc(1,sizeof(*ss2->searchSpaceType));
@@ -1590,6 +2111,48 @@ void fill_initial_SpCellConfig(int uid,
pdsch_servingcellconfig->ext1->maxMIMO_Layers = calloc(1,sizeof(*pdsch_servingcellconfig->ext1->maxMIMO_Layers));
*pdsch_servingcellconfig->ext1->maxMIMO_Layers = 2;
// Downlink BWPs
int n_dl_bwp = 0;
if (servingcellconfigdedicated &&
servingcellconfigdedicated->downlinkBWP_ToAddModList &&
servingcellconfigdedicated->downlinkBWP_ToAddModList->list.count > 0) {
n_dl_bwp = servingcellconfigdedicated->downlinkBWP_ToAddModList->list.count;
}
if(n_dl_bwp>0){
SpCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList = calloc(1,sizeof(*SpCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList));
for (int bwp_loop = 0; bwp_loop < n_dl_bwp; bwp_loop++) {
NR_BWP_Downlink_t *bwp = calloc(1, sizeof(*bwp));
fill_default_downlinkBWP(bwp, bwp_loop, servingcellconfigdedicated, scc, configuration);
ASN_SEQUENCE_ADD(&SpCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList->list,bwp);
}
SpCellConfig->spCellConfigDedicated->firstActiveDownlinkBWP_Id = calloc(1,sizeof(*SpCellConfig->spCellConfigDedicated->firstActiveDownlinkBWP_Id));
*SpCellConfig->spCellConfigDedicated->firstActiveDownlinkBWP_Id = servingcellconfigdedicated->firstActiveDownlinkBWP_Id ? *servingcellconfigdedicated->firstActiveDownlinkBWP_Id : 1;
SpCellConfig->spCellConfigDedicated->defaultDownlinkBWP_Id = calloc(1,sizeof(*SpCellConfig->spCellConfigDedicated->defaultDownlinkBWP_Id));
*SpCellConfig->spCellConfigDedicated->defaultDownlinkBWP_Id = servingcellconfigdedicated->defaultDownlinkBWP_Id ? *servingcellconfigdedicated->defaultDownlinkBWP_Id : 1;
}
// Uplink BWPs
int n_ul_bwp = 0;
if (servingcellconfigdedicated && servingcellconfigdedicated->uplinkConfig &&
servingcellconfigdedicated->uplinkConfig->uplinkBWP_ToAddModList &&
servingcellconfigdedicated->uplinkConfig->uplinkBWP_ToAddModList->list.count > 0) {
n_ul_bwp = servingcellconfigdedicated->uplinkConfig->uplinkBWP_ToAddModList->list.count;
}
if(n_ul_bwp>0) {
SpCellConfig->spCellConfigDedicated->uplinkConfig->uplinkBWP_ToAddModList = calloc(1,sizeof(*SpCellConfig->spCellConfigDedicated->uplinkConfig->uplinkBWP_ToAddModList));
for (int bwp_loop = 0; bwp_loop < n_ul_bwp; bwp_loop++) {
NR_BWP_Uplink_t *ubwp = calloc(1, sizeof(*ubwp));
fill_default_uplinkBWP(ubwp, bwp_loop, servingcellconfigdedicated, scc, configuration, uid);
ASN_SEQUENCE_ADD(&SpCellConfig->spCellConfigDedicated->uplinkConfig->uplinkBWP_ToAddModList->list, ubwp);
}
SpCellConfig->spCellConfigDedicated->uplinkConfig->firstActiveUplinkBWP_Id = calloc(1,sizeof(*SpCellConfig->spCellConfigDedicated->uplinkConfig->firstActiveUplinkBWP_Id));
*SpCellConfig->spCellConfigDedicated->uplinkConfig->firstActiveUplinkBWP_Id = servingcellconfigdedicated->uplinkConfig->firstActiveUplinkBWP_Id ? *servingcellconfigdedicated->uplinkConfig->firstActiveUplinkBWP_Id : 1;
}
if ( LOG_DEBUGFLAG(DEBUG_ASN1) ) {
xer_fprint(stdout, &asn_DEF_NR_SpCellConfig, (void *)SpCellConfig);
}
}
void fill_mastercellGroupConfig(NR_CellGroupConfig_t *cellGroupConfig, NR_CellGroupConfig_t *ue_context_mastercellGroup,int use_rlc_um_for_drb) {
@@ -1683,45 +2246,49 @@ void update_cellGroupConfig(NR_CellGroupConfig_t *cellGroupConfig,
NR_SpCellConfig_t *SpCellConfig = cellGroupConfig->spCellConfig;
if (SpCellConfig == NULL) return;
NR_ServingCellConfigCommon_t *scc = configuration->scc;
NR_ServingCellConfigCommon_t *scc = configuration ? configuration->scc : NULL;
// Config CSI-RS
if (configuration->do_CSIRS) {
struct NR_PUCCH_Config__spatialRelationInfoToAddModList *spatialRelationInfoToAddModList = calloc(1,sizeof(*spatialRelationInfoToAddModList));
NR_PUCCH_SpatialRelationInfo_t *pucchspatial = calloc(1,sizeof(*pucchspatial));
pucchspatial->pucch_SpatialRelationInfoId = 1;
pucchspatial->servingCellId = NULL;
pucchspatial->referenceSignal.present = NR_PUCCH_SpatialRelationInfo__referenceSignal_PR_csi_RS_Index;
pucchspatial->referenceSignal.choice.csi_RS_Index = 0;
pucchspatial->pucch_PathlossReferenceRS_Id = 0;
pucchspatial->p0_PUCCH_Id = 1;
pucchspatial->closedLoopIndex = NR_PUCCH_SpatialRelationInfo__closedLoopIndex_i0;
ASN_SEQUENCE_ADD(&spatialRelationInfoToAddModList->list,pucchspatial);
SpCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP->pucch_Config->choice.setup->spatialRelationInfoToAddModList = spatialRelationInfoToAddModList;
if(!SpCellConfig->spCellConfigDedicated->csi_MeasConfig) {
SpCellConfig->spCellConfigDedicated->csi_MeasConfig=calloc(1,sizeof(*SpCellConfig->spCellConfigDedicated->csi_MeasConfig));
if(scc) {
// Config CSI-RS
if (configuration->do_CSIRS) {
struct NR_PUCCH_Config__spatialRelationInfoToAddModList *spatialRelationInfoToAddModList = calloc(1,sizeof(*spatialRelationInfoToAddModList));
NR_PUCCH_SpatialRelationInfo_t *pucchspatial = calloc(1,sizeof(*pucchspatial));
pucchspatial->pucch_SpatialRelationInfoId = 1;
pucchspatial->servingCellId = NULL;
pucchspatial->referenceSignal.present = NR_PUCCH_SpatialRelationInfo__referenceSignal_PR_csi_RS_Index;
pucchspatial->referenceSignal.choice.csi_RS_Index = 0;
pucchspatial->pucch_PathlossReferenceRS_Id = 0;
pucchspatial->p0_PUCCH_Id = 1;
pucchspatial->closedLoopIndex = NR_PUCCH_SpatialRelationInfo__closedLoopIndex_i0;
ASN_SEQUENCE_ADD(&spatialRelationInfoToAddModList->list,pucchspatial);
SpCellConfig->spCellConfigDedicated->uplinkConfig->initialUplinkBWP->pucch_Config->choice.setup->spatialRelationInfoToAddModList = spatialRelationInfoToAddModList;
if(!SpCellConfig->spCellConfigDedicated->csi_MeasConfig) {
SpCellConfig->spCellConfigDedicated->csi_MeasConfig=calloc(1,sizeof(*SpCellConfig->spCellConfigDedicated->csi_MeasConfig));
}
fill_default_csi_MeasConfig(uid, SpCellConfig->spCellConfigDedicated->csi_MeasConfig, scc, configuration);
}
fill_default_csi_MeasConfig(uid, SpCellConfig->spCellConfigDedicated->csi_MeasConfig, scc, configuration);
}
// Set DL MCS table
NR_BWP_DownlinkDedicated_t *bwp_Dedicated = SpCellConfig->spCellConfigDedicated->initialDownlinkBWP;
set_dl_mcs_table(scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.subcarrierSpacing,
configuration->force_256qam_off ? NULL : uecap, SpCellConfig,bwp_Dedicated, scc);
struct NR_ServingCellConfig__downlinkBWP_ToAddModList *DL_BWP_list = SpCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList;
if (DL_BWP_list) {
for (int i=0; i<DL_BWP_list->list.count; i++){
NR_BWP_Downlink_t *bwp = DL_BWP_list->list.array[i];
int scs = bwp->bwp_Common->genericParameters.subcarrierSpacing;
set_dl_mcs_table(scs, configuration->force_256qam_off ? NULL : uecap, SpCellConfig, bwp->bwp_Dedicated, scc);
// Set DL MCS table
NR_BWP_DownlinkDedicated_t *bwp_Dedicated = SpCellConfig->spCellConfigDedicated->initialDownlinkBWP;
set_dl_mcs_table(scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.subcarrierSpacing,
configuration->force_256qam_off ? NULL : uecap, SpCellConfig, bwp_Dedicated, scc);
struct NR_ServingCellConfig__downlinkBWP_ToAddModList *DL_BWP_list = SpCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList;
if (DL_BWP_list) {
for (int i=0; i<DL_BWP_list->list.count; i++){
NR_BWP_Downlink_t *bwp = DL_BWP_list->list.array[i];
int scs = bwp->bwp_Common->genericParameters.subcarrierSpacing;
set_dl_mcs_table(scs, configuration->force_256qam_off ? NULL : uecap, SpCellConfig, bwp->bwp_Dedicated, scc);
}
}
}
}
void fill_initial_cellGroupConfig(int uid,
NR_CellGroupConfig_t *cellGroupConfig,
NR_ServingCellConfigCommon_t *scc,
NR_ServingCellConfig_t *servingcellconfigdedicated,
const gNB_RrcConfigurationReq *configuration)
{
NR_RLC_BearerConfig_t *rlc_BearerConfig = NULL;
@@ -1813,18 +2380,19 @@ void fill_initial_cellGroupConfig(int uid,
cellGroupConfig->spCellConfig = calloc(1,sizeof(*cellGroupConfig->spCellConfig));
fill_initial_SpCellConfig(uid,cellGroupConfig->spCellConfig,scc,configuration);
fill_initial_SpCellConfig(uid,cellGroupConfig->spCellConfig,scc,servingcellconfigdedicated,configuration);
cellGroupConfig->sCellToAddModList = NULL;
cellGroupConfig->sCellToReleaseList = NULL;
}
//------------------------------------------------------------------------------
int do_RRCSetup(rrc_gNB_ue_context_t *const ue_context_pP,
uint8_t *const buffer,
const uint8_t transaction_id,
OCTET_STRING_t *masterCellGroup_from_DU,
NR_ServingCellConfigCommon_t *scc,
int16_t do_RRCSetup(rrc_gNB_ue_context_t *const ue_context_pP,
uint8_t *const buffer,
const uint8_t transaction_id,
OCTET_STRING_t *masterCellGroup_from_DU,
NR_ServingCellConfigCommon_t *scc,
NR_ServingCellConfig_t *servingcellconfigdedicated,
const gNB_RrcConfigurationReq *configuration)
//------------------------------------------------------------------------------
{
@@ -1886,13 +2454,11 @@ int do_RRCSetup(rrc_gNB_ue_context_t *const ue_context_pP,
&asn_DEF_NR_CellGroupConfig, //might be added prefix later
(void **)&cellGroupConfig,
(uint8_t *)masterCellGroup_from_DU->buf,
masterCellGroup_from_DU->size, 0, 0);
xer_fprint(stdout, &asn_DEF_NR_CellGroupConfig, (const void*)cellGroupConfig);
masterCellGroup_from_DU->size, 0, 0);
}
else {
cellGroupConfig = calloc(1, sizeof(NR_CellGroupConfig_t));
fill_initial_cellGroupConfig(ue_context_pP->local_uid, cellGroupConfig, scc, configuration);
fill_initial_cellGroupConfig(ue_context_pP->local_uid,cellGroupConfig,scc,servingcellconfigdedicated,configuration);
enc_rval = uper_encode_to_buffer(&asn_DEF_NR_CellGroupConfig,
NULL,
@@ -1915,8 +2481,10 @@ int do_RRCSetup(rrc_gNB_ue_context_t *const ue_context_pP,
ue_p->masterCellGroup = cellGroupConfig;
if ( LOG_DEBUGFLAG(DEBUG_ASN1) ) {
xer_fprint(stdout, &asn_DEF_NR_CellGroupConfig, (const void*)cellGroupConfig);
xer_fprint(stdout, &asn_DEF_NR_DL_CCCH_Message, (void *)&dl_ccch_msg);
}
enc_rval = uper_encode_to_buffer(&asn_DEF_NR_DL_CCCH_Message,
NULL,
(void *)&dl_ccch_msg,
@@ -2194,7 +2762,7 @@ int16_t do_RRCReconfiguration(
if(cellGroupConfig!=NULL){
update_cellGroupConfig(cellGroupConfig,
ue_context_pP->local_uid,
ue_context_pP->ue_context.UE_Capability_nr,
ue_context_pP ? ue_context_pP->ue_context.UE_Capability_nr : NULL,
configuration);
enc_rval = uper_encode_to_buffer(&asn_DEF_NR_CellGroupConfig,
@@ -2207,7 +2775,9 @@ int16_t do_RRCReconfiguration(
enc_rval.failed_type->name, enc_rval.encoded);
return -1;
}
xer_fprint(stdout, &asn_DEF_NR_CellGroupConfig, (const void*)cellGroupConfig);
if ( LOG_DEBUGFLAG(DEBUG_ASN1) ) {
xer_fprint(stdout, &asn_DEF_NR_CellGroupConfig, (const void *) cellGroupConfig);
}
ie->nonCriticalExtension->masterCellGroup = calloc(1,sizeof(OCTET_STRING_t));
ie->nonCriticalExtension->masterCellGroup->buf = masterCellGroup_buf;
@@ -2216,9 +2786,9 @@ int16_t do_RRCReconfiguration(
dl_dcch_msg.message.choice.c1->choice.rrcReconfiguration->criticalExtensions.choice.rrcReconfiguration = ie;
//if ( LOG_DEBUGFLAG(DEBUG_ASN1) ) {
xer_fprint(stdout, &asn_DEF_NR_DL_DCCH_Message, (void *)&dl_dcch_msg);
//}
if ( LOG_DEBUGFLAG(DEBUG_ASN1) ) {
xer_fprint(stdout, &asn_DEF_NR_DL_DCCH_Message, (void *)&dl_dcch_msg);
}
enc_rval = uper_encode_to_buffer(&asn_DEF_NR_DL_DCCH_Message,
NULL,
openair2/RRC/NR/MESSAGES/asn1_msg.h
+5 -2
View File
@@ -104,11 +104,13 @@ uint8_t do_RRCReject(uint8_t Mod_id,
void fill_initial_SpCellConfig(int uid,
NR_SpCellConfig_t *SpCellConfig,
NR_ServingCellConfigCommon_t *scc,
NR_ServingCellConfig_t *servingcellconfigdedicated,
const gNB_RrcConfigurationReq *configuration);
void fill_initial_cellGroupConfig(int uid,
NR_CellGroupConfig_t *cellGroupConfig,
NR_ServingCellConfigCommon_t *scc,
NR_ServingCellConfig_t *servingcellconfigdedicated,
const gNB_RrcConfigurationReq *configuration);
void update_cellGroupConfig(NR_CellGroupConfig_t *cellGroupConfig,
@@ -116,13 +118,14 @@ void update_cellGroupConfig(NR_CellGroupConfig_t *cellGroupConfig,
NR_UE_NR_Capability_t *uecap,
const gNB_RrcConfigurationReq *configuration);
void fill_mastercellGroupConfig(NR_CellGroupConfig_t *cellGroupConfig, NR_CellGroupConfig_t *ue_context_mastercellGroup,int use_rlc_um_for_drb);
void fill_mastercellGroupConfig(NR_CellGroupConfig_t *cellGroupConfig, NR_CellGroupConfig_t *ue_context_mastercellGroup, int use_rlc_um_for_drb);
int do_RRCSetup(rrc_gNB_ue_context_t *const ue_context_pP,
int16_t do_RRCSetup(rrc_gNB_ue_context_t *const ue_context_pP,
uint8_t *const buffer,
const uint8_t transaction_id,
OCTET_STRING_t *masterCellGroup_from_DU,
NR_ServingCellConfigCommon_t *scc,
NR_ServingCellConfig_t *servingcellconfigdedicated,
const gNB_RrcConfigurationReq *configuration);
uint8_t do_NR_SecurityModeCommand(
openair2/RRC/NR/nr_rrc_config.c
+13 -6
View File
@@ -311,30 +311,37 @@ void prepare_sim_uecap(NR_UE_NR_Capability_t *cap,
}
}
void nr_rrc_config_dl_tda(NR_ServingCellConfigCommon_t *scc){
void nr_rrc_config_dl_tda(NR_ServingCellConfigCommon_t *scc,
NR_PDSCH_TimeDomainResourceAllocationList_t *pdsch_TimeDomainAllocationList,
int curr_bwp) {
frame_type_t frame_type = get_frame_type(*scc->downlinkConfigCommon->frequencyInfoDL->frequencyBandList.list.array[0], *scc->ssbSubcarrierSpacing);
int curr_bwp = scc->downlinkConfigCommon->frequencyInfoDL->scs_SpecificCarrierList.list.array[0]->carrierBandwidth;
// coreset duration setting to be improved in the framework of RRC harmonization, potentially using a common function
int len_coreset = 1;
if (curr_bwp < 48)
len_coreset = 2;
// setting default TDA for DL with
struct NR_PDSCH_TimeDomainResourceAllocation *timedomainresourceallocation = CALLOC(1,sizeof(NR_PDSCH_TimeDomainResourceAllocation_t));
// k0: Slot offset between DCI and its scheduled PDSCH (see TS 38.214 clause 5.1.2.1) When the field is absent the UE applies the value 0.
//timedomainresourceallocation->k0 = calloc(1,sizeof(*timedomainresourceallocation->k0));
//*timedomainresourceallocation->k0 = 0;
timedomainresourceallocation->mappingType = NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeA;
timedomainresourceallocation->startSymbolAndLength = get_SLIV(len_coreset,14-len_coreset); // basic slot configuration starting in symbol 1 til the end of the slot
ASN_SEQUENCE_ADD(&scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list,
timedomainresourceallocation);
ASN_SEQUENCE_ADD(&pdsch_TimeDomainAllocationList->list, timedomainresourceallocation);
if(frame_type==TDD) {
// TDD
if(scc->tdd_UL_DL_ConfigurationCommon) {
int dl_symb = scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofDownlinkSymbols;
if(dl_symb > 1) {
timedomainresourceallocation = CALLOC(1,sizeof(NR_PDSCH_TimeDomainResourceAllocation_t));
// k0: Slot offset between DCI and its scheduled PDSCH (see TS 38.214 clause 5.1.2.1) When the field is absent the UE applies the value 0.
//timedomainresourceallocation->k0 = calloc(1,sizeof(*timedomainresourceallocation->k0));
//*timedomainresourceallocation->k0 = 0;
timedomainresourceallocation->mappingType = NR_PDSCH_TimeDomainResourceAllocation__mappingType_typeA;
timedomainresourceallocation->startSymbolAndLength = get_SLIV(len_coreset,dl_symb-len_coreset); // mixed slot configuration starting in symbol 1 til the end of the dl allocation
ASN_SEQUENCE_ADD(&scc->downlinkConfigCommon->initialDownlinkBWP->pdsch_ConfigCommon->choice.setup->pdsch_TimeDomainAllocationList->list,
timedomainresourceallocation);
ASN_SEQUENCE_ADD(&pdsch_TimeDomainAllocationList->list, timedomainresourceallocation);
}
}
}
openair2/RRC/NR/nr_rrc_config.h
+3 -1
View File
@@ -111,7 +111,9 @@ typedef struct physicalcellgroup_s{
long RNTI_Value[MAX_NUM_CCs];
}physicalcellgroup_t;
void nr_rrc_config_dl_tda(NR_ServingCellConfigCommon_t *scc);
void nr_rrc_config_dl_tda(NR_ServingCellConfigCommon_t *scc,
NR_PDSCH_TimeDomainResourceAllocationList_t *pdsch_TimeDomainAllocationList,
int curr_bwp);
void nr_rrc_config_ul_tda(NR_ServingCellConfigCommon_t *scc, int min_fb_delay);
void config_csirs(NR_ServingCellConfigCommon_t *servingcellconfigcommon,
NR_CSI_MeasConfig_t *csi_MeasConfig,
openair2/RRC/NR/nr_rrc_defs.h
+3 -2
View File
@@ -132,7 +132,7 @@ typedef enum UE_STATE_NR_e {
#define MAX_MEAS_ID 7
#define PAYLOAD_SIZE_MAX 1024
#define RRC_BUF_SIZE 512
#define RRC_BUF_SIZE 1024
#define UNDEF_SECURITY_MODE 0xff
#define NO_SECURITY_MODE 0x20
@@ -217,7 +217,7 @@ typedef struct HANDOVER_INFO_NR_s {
typedef struct {
char Payload[NR_RRC_BUFFER_SIZE_MAX];
char Header[NR_RRC_HEADER_SIZE_MAX];
int payload_size;
uint16_t payload_size;
} NR_RRC_BUFFER;
#define NR_RRC_BUFFER_SIZE sizeof(RRC_BUFFER_NR)
@@ -454,6 +454,7 @@ typedef struct {
NR_BCCH_DL_SCH_Message_t systemInformation; // SIB23
NR_BCCH_DL_SCH_Message_t *siblock1;
NR_ServingCellConfigCommon_t *servingcellconfigcommon;
NR_ServingCellConfig_t *servingcellconfig;
NR_PDCCH_ConfigSIB1_t *pdcch_ConfigSIB1;
NR_CellGroupConfig_t *secondaryCellGroup[MAX_NR_RRC_UE_CONTEXTS];
NR_SRB_INFO SI;
openair2/RRC/NR/nr_rrc_proto.h
+19 -7
View File
@@ -47,13 +47,13 @@ void rrc_config_nr_buffer(NR_SRB_INFO* Srb_info,
uint8_t Lchan_type,
uint8_t Role);
int mac_rrc_nr_data_req(const module_id_t Mod_idP,
const int CC_id,
const frame_t frameP,
const rb_id_t Srb_id,
const rnti_t rnti,
const uint8_t Nb_tb,
uint8_t *const buffer_pP );
uint16_t mac_rrc_nr_data_req(const module_id_t Mod_idP,
const int CC_id,
const frame_t frameP,
const rb_id_t Srb_id,
const rnti_t rnti,
const uint8_t Nb_tb,
uint8_t *const buffer_pP);
void rrc_gNB_process_SgNBAdditionRequest(
const protocol_ctxt_t *const ctxt_pP,
@@ -167,6 +167,13 @@ int
nr_rrc_mac_remove_ue(module_id_t mod_idP,
rnti_t rntiP);
int8_t nr_mac_rrc_bwp_switch_req(const module_id_t module_idP,
const frame_t frameP,
const sub_frame_t sub_frameP,
const rnti_t rntiP,
const int dl_bwp_id,
const int ul_bwp_id);
int8_t nr_mac_rrc_data_ind(
const module_id_t module_idP,
const int CC_id,
@@ -180,6 +187,11 @@ int8_t nr_mac_rrc_data_ind(
const boolean_t brOption
);
int nr_rrc_reconfiguration_req(rrc_gNB_ue_context_t *const ue_context_pP,
protocol_ctxt_t *const ctxt_pP,
const int dl_bwp_id,
const int ul_bwp_id);
int nr_rrc_gNB_decode_ccch(protocol_ctxt_t *const ctxt_pP,
const uint8_t *buffer,
int buffer_length,
openair2/RRC/NR/rrc_gNB.c
+119 -21
View File
@@ -218,6 +218,7 @@ char openair_rrc_gNB_configuration(const module_id_t gnb_mod_idP, gNB_RrcConfigu
rrc->ngap_id2_ngap_ids = hashtable_create (NUMBER_OF_UE_MAX * 2, NULL, NULL);
rrc->configuration = *configuration;
rrc->carrier.servingcellconfigcommon = configuration->scc;
rrc->carrier.servingcellconfig = configuration->scd;
nr_rrc_config_ul_tda(configuration->scc,configuration->minRXTXTIME);
/// System Information INIT
pthread_mutex_init(&rrc->cell_info_mutex,NULL);
@@ -335,12 +336,16 @@ rrc_gNB_generate_RRCSetup(
// T_INT(ctxt_pP->rnti));
gNB_RRC_UE_t *ue_p = &ue_context_pP->ue_context;
gNB_RRC_INST *rrc = RC.nrrrc[ctxt_pP->module_id];
ue_p->Srb0.Tx_buffer.payload_size = do_RRCSetup(ue_context_pP,
(uint8_t *) ue_p->Srb0.Tx_buffer.Payload,
rrc_gNB_get_next_transaction_identifier(ctxt_pP->module_id),
masterCellGroup_from_DU,
scc,
&rrc->configuration);
NR_ServingCellConfig_t *servingcellconfigdedicated = rrc->configuration.scd;
int16_t ret = do_RRCSetup(ue_context_pP,
(uint8_t *) ue_p->Srb0.Tx_buffer.Payload,
rrc_gNB_get_next_transaction_identifier(ctxt_pP->module_id),
masterCellGroup_from_DU,
scc,servingcellconfigdedicated,&rrc->configuration);
AssertFatal(ret>0,"Error generating RRCSetup for RRCSetupRequest\n");
ue_p->Srb0.Tx_buffer.payload_size = ret;
LOG_DUMPMSG(NR_RRC, DEBUG_RRC,
(char *)(ue_p->Srb0.Tx_buffer.Payload),
@@ -442,16 +447,20 @@ rrc_gNB_generate_RRCSetup_for_RRCReestablishmentRequest(
rrc_gNB_ue_context_t *ue_context_pP = NULL;
gNB_RRC_INST *rrc_instance_p = RC.nrrrc[ctxt_pP->module_id];
NR_ServingCellConfigCommon_t *scc=rrc_instance_p->carrier.servingcellconfigcommon;
NR_ServingCellConfig_t *servingcellconfigdedicated = rrc_instance_p->configuration.scd;
ue_context_pP = rrc_gNB_get_next_free_ue_context(ctxt_pP, rrc_instance_p, 0);
gNB_RRC_UE_t *ue_p = &ue_context_pP->ue_context;
ue_p->Srb0.Tx_buffer.payload_size = do_RRCSetup(ue_context_pP,
(uint8_t *) ue_p->Srb0.Tx_buffer.Payload,
rrc_gNB_get_next_transaction_identifier(ctxt_pP->module_id),
NULL,
scc,
&rrc_instance_p->configuration);
int16_t ret = do_RRCSetup(ue_context_pP,
(uint8_t *) ue_p->Srb0.Tx_buffer.Payload,
rrc_gNB_get_next_transaction_identifier(ctxt_pP->module_id),
NULL,
scc,servingcellconfigdedicated,&rrc_instance_p->configuration);
AssertFatal(ret>0,"Error generating RRCSetup for RRCReestablishmentRequest\n");
ue_p->Srb0.Tx_buffer.payload_size = ret;
LOG_DUMPMSG(NR_RRC, DEBUG_RRC,
(char *)(ue_p->Srb0.Tx_buffer.Payload),
@@ -799,10 +808,16 @@ rrc_gNB_generate_defaultRRCReconfiguration(
}
if (NODE_IS_DU(rrc->node_type) || NODE_IS_MONOLITHIC(rrc->node_type)) {
uint32_t delay_ms = ue_context_pP->ue_context.masterCellGroup &&
ue_context_pP->ue_context.masterCellGroup->spCellConfig &&
ue_context_pP->ue_context.masterCellGroup->spCellConfig->spCellConfigDedicated &&
ue_context_pP->ue_context.masterCellGroup->spCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList ?
NR_RRC_RECONFIGURATION_DELAY_MS + NR_RRC_BWP_SWITCHING_DELAY_MS : NR_RRC_RECONFIGURATION_DELAY_MS;
nr_mac_enable_ue_rrc_processing_timer(ctxt_pP->module_id,
ue_context_pP->ue_context.rnti,
*rrc->carrier.servingcellconfigcommon->ssbSubcarrierSpacing,
NR_RRC_RECONFIGURATION_DELAY_MS);
delay_ms);
}
}
@@ -1041,10 +1056,16 @@ rrc_gNB_generate_dedicatedRRCReconfiguration(
#endif
if (NODE_IS_DU(rrc->node_type) || NODE_IS_MONOLITHIC(rrc->node_type)) {
uint32_t delay_ms = ue_context_pP->ue_context.masterCellGroup &&
ue_context_pP->ue_context.masterCellGroup->spCellConfig &&
ue_context_pP->ue_context.masterCellGroup->spCellConfig->spCellConfigDedicated &&
ue_context_pP->ue_context.masterCellGroup->spCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList ?
NR_RRC_RECONFIGURATION_DELAY_MS + NR_RRC_BWP_SWITCHING_DELAY_MS : NR_RRC_RECONFIGURATION_DELAY_MS;
nr_mac_enable_ue_rrc_processing_timer(ctxt_pP->module_id,
ue_context_pP->ue_context.rnti,
*rrc->carrier.servingcellconfigcommon->ssbSubcarrierSpacing,
NR_RRC_RECONFIGURATION_DELAY_MS);
delay_ms);
}
}
@@ -1221,10 +1242,16 @@ rrc_gNB_modify_dedicatedRRCReconfiguration(
#endif
if (NODE_IS_DU(RC.nrrrc[ctxt_pP->module_id]->node_type) || NODE_IS_MONOLITHIC(RC.nrrrc[ctxt_pP->module_id]->node_type)) {
uint32_t delay_ms = ue_context_pP->ue_context.masterCellGroup &&
ue_context_pP->ue_context.masterCellGroup->spCellConfig &&
ue_context_pP->ue_context.masterCellGroup->spCellConfig->spCellConfigDedicated &&
ue_context_pP->ue_context.masterCellGroup->spCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList ?
NR_RRC_RECONFIGURATION_DELAY_MS + NR_RRC_BWP_SWITCHING_DELAY_MS : NR_RRC_RECONFIGURATION_DELAY_MS;
nr_mac_enable_ue_rrc_processing_timer(ctxt_pP->module_id,
ue_context_pP->ue_context.rnti,
*RC.nrrrc[ctxt_pP->module_id]->carrier.servingcellconfigcommon->ssbSubcarrierSpacing,
NR_RRC_RECONFIGURATION_DELAY_MS);
delay_ms);
}
}
@@ -1291,8 +1318,8 @@ rrc_gNB_generate_dedicatedRRCReconfiguration_release(
NULL);
ue_context_pP->ue_context.pdu_session_release_command_flag = 1;
LOG_DUMPMSG(NR_RRC,DEBUG_RRC,(char *)buffer,size,
"[MSG] RRC Reconfiguration\n");
LOG_DUMPMSG(NR_RRC,DEBUG_RRC,(char *)buffer,size, "[MSG] RRC Reconfiguration\n");
/* Free all NAS PDUs */
if (nas_length > 0) {
@@ -1328,10 +1355,16 @@ rrc_gNB_generate_dedicatedRRCReconfiguration_release(
#endif
if (NODE_IS_DU(RC.nrrrc[ctxt_pP->module_id]->node_type) || NODE_IS_MONOLITHIC(RC.nrrrc[ctxt_pP->module_id]->node_type)) {
uint32_t delay_ms = ue_context_pP->ue_context.masterCellGroup &&
ue_context_pP->ue_context.masterCellGroup->spCellConfig &&
ue_context_pP->ue_context.masterCellGroup->spCellConfig->spCellConfigDedicated &&
ue_context_pP->ue_context.masterCellGroup->spCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList ?
NR_RRC_RECONFIGURATION_DELAY_MS + NR_RRC_BWP_SWITCHING_DELAY_MS : NR_RRC_RECONFIGURATION_DELAY_MS;
nr_mac_enable_ue_rrc_processing_timer(ctxt_pP->module_id,
ue_context_pP->ue_context.rnti,
*RC.nrrrc[ctxt_pP->module_id]->carrier.servingcellconfigcommon->ssbSubcarrierSpacing,
NR_RRC_RECONFIGURATION_DELAY_MS);
delay_ms);
}
}
@@ -1848,8 +1881,8 @@ rrc_gNB_process_RRCConnectionReestablishmentComplete(
NULL,
NULL,
NULL);
LOG_DUMPMSG(NR_RRC,DEBUG_RRC,(char *)buffer,size,
"[MSG] RRC Reconfiguration\n");
LOG_DUMPMSG(NR_RRC,DEBUG_RRC,(char *)buffer,size, "[MSG] RRC Reconfiguration\n");
/* Free all NAS PDUs */
for (i = 0; i < ue_context_pP->ue_context.nb_of_pdusessions; i++) {
@@ -1893,14 +1926,79 @@ rrc_gNB_process_RRCConnectionReestablishmentComplete(
}
if (NODE_IS_DU(RC.nrrrc[ctxt_pP->module_id]->node_type) || NODE_IS_MONOLITHIC(RC.nrrrc[ctxt_pP->module_id]->node_type)) {
uint32_t delay_ms = ue_context_pP->ue_context.masterCellGroup &&
ue_context_pP->ue_context.masterCellGroup->spCellConfig &&
ue_context_pP->ue_context.masterCellGroup->spCellConfig->spCellConfigDedicated &&
ue_context_pP->ue_context.masterCellGroup->spCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList ?
NR_RRC_RECONFIGURATION_DELAY_MS + NR_RRC_BWP_SWITCHING_DELAY_MS : NR_RRC_RECONFIGURATION_DELAY_MS;
nr_mac_enable_ue_rrc_processing_timer(ctxt_pP->module_id,
ue_context_pP->ue_context.rnti,
*RC.nrrrc[ctxt_pP->module_id]->carrier.servingcellconfigcommon->ssbSubcarrierSpacing,
NR_RRC_RECONFIGURATION_DELAY_MS);
delay_ms);
}
}
//-----------------------------------------------------------------------------
int nr_rrc_reconfiguration_req(rrc_gNB_ue_context_t *const ue_context_pP,
protocol_ctxt_t *const ctxt_pP,
const int dl_bwp_id,
const int ul_bwp_id) {
uint8_t buffer[RRC_BUF_SIZE];
memset(buffer, 0, sizeof(buffer));
uint8_t xid = rrc_gNB_get_next_transaction_identifier(ctxt_pP->module_id);
NR_CellGroupConfig_t *masterCellGroup = ue_context_pP->ue_context.masterCellGroup;
if (dl_bwp_id >= 0) {
*masterCellGroup->spCellConfig->spCellConfigDedicated->firstActiveDownlinkBWP_Id = dl_bwp_id;
*masterCellGroup->spCellConfig->spCellConfigDedicated->defaultDownlinkBWP_Id = dl_bwp_id;
}
if (ul_bwp_id >= 0) {
*masterCellGroup->spCellConfig->spCellConfigDedicated->uplinkConfig->firstActiveUplinkBWP_Id = ul_bwp_id;
}
uint16_t size = do_RRCReconfiguration(ctxt_pP,
buffer,
sizeof(buffer),
xid,
NULL,
NULL,
NULL,
NULL,
NULL,
NULL,
NULL,
NULL,
NULL,
NULL,
NULL,
masterCellGroup);
nr_rrc_data_req(ctxt_pP,
DCCH,
rrc_gNB_mui++,
SDU_CONFIRM_NO,
size,
buffer,
PDCP_TRANSMISSION_MODE_CONTROL);
if (NODE_IS_DU(RC.nrrrc[ctxt_pP->module_id]->node_type) || NODE_IS_MONOLITHIC(RC.nrrrc[ctxt_pP->module_id]->node_type)) {
uint32_t delay_ms = ue_context_pP->ue_context.masterCellGroup &&
ue_context_pP->ue_context.masterCellGroup->spCellConfig &&
ue_context_pP->ue_context.masterCellGroup->spCellConfig->spCellConfigDedicated &&
ue_context_pP->ue_context.masterCellGroup->spCellConfig->spCellConfigDedicated->downlinkBWP_ToAddModList ?
NR_RRC_RECONFIGURATION_DELAY_MS + NR_RRC_BWP_SWITCHING_DELAY_MS : NR_RRC_RECONFIGURATION_DELAY_MS;
nr_mac_enable_ue_rrc_processing_timer(ctxt_pP->module_id,
ue_context_pP->ue_context.rnti,
*RC.nrrrc[ctxt_pP->module_id]->carrier.servingcellconfigcommon->ssbSubcarrierSpacing,
delay_ms);
}
return 0;
}
/*------------------------------------------------------------------------------*/
int nr_rrc_gNB_decode_ccch(protocol_ctxt_t *const ctxt_pP,
const uint8_t *buffer,
openair2/RRC/NR/rrc_gNB_nsa.c
+5
View File
@@ -106,6 +106,9 @@ void rrc_parse_ue_capabilities(gNB_RRC_INST *rrc, NR_UE_CapabilityRAT_ContainerL
}
LOG_A(NR_RRC, "Successfully decoded UE NR capabilities (NR and MRDC)\n");
ue_context_p->ue_context.spCellConfig = calloc(1, sizeof(struct NR_SpCellConfig));
ue_context_p->ue_context.spCellConfig->spCellConfigDedicated = rrc->carrier.servingcellconfig;
LOG_I(NR_RRC,"Adding new NSA user (%p)\n",ue_context_p);
rrc_add_nsa_user(rrc,ue_context_p, m);
}
@@ -241,6 +244,7 @@ void rrc_add_nsa_user(gNB_RRC_INST *rrc,struct rrc_gNB_ue_context_s *ue_context_
cipher_algo,
NR_SecurityConfig__keyToUse_secondary);
}
NR_ServingCellConfig_t *scc = ue_context_p->ue_context.spCellConfig ?
ue_context_p->ue_context.spCellConfig->spCellConfigDedicated : NULL;
fill_default_reconfig(carrier->servingcellconfigcommon,
@@ -250,6 +254,7 @@ void rrc_add_nsa_user(gNB_RRC_INST *rrc,struct rrc_gNB_ue_context_s *ue_context_
ue_context_p->ue_context.UE_Capability_nr,
configuration,
ue_context_p->local_uid);
ue_context_p->ue_id_rnti = ue_context_p->ue_context.secondaryCellGroup->spCellConfig->reconfigurationWithSync->newUE_Identity;
NR_CG_Config_t *CG_Config = calloc(1,sizeof(*CG_Config));
memset((void *)CG_Config,0,sizeof(*CG_Config));
openair2/RRC/NR/rrc_gNB_reconfig.c
+777 -585
View File
File diff suppressed because it is too large Load Diff
openair2/RRC/NR_UE/rrc_UE.c
+2 -2
View File
@@ -1455,8 +1455,8 @@ int8_t nr_rrc_ue_decode_ccch( const protocol_ctxt_t *const ctxt_pP, const NR_SRB
nr_rrc_ue_process_RadioBearerConfig(ctxt_pP,
gNB_index,
&dl_ccch_msg->message.choice.c1->choice.rrcSetup->criticalExtensions.choice.rrcSetup->radioBearerConfig);
nr_rrc_set_state (ctxt_pP->module_id, RRC_STATE_CONNECTED);
nr_rrc_set_sub_state (ctxt_pP->module_id, RRC_SUB_STATE_CONNECTED);
nr_rrc_set_state (ctxt_pP->module_id, RRC_STATE_CONNECTED_NR);
nr_rrc_set_sub_state (ctxt_pP->module_id, RRC_SUB_STATE_CONNECTED_NR);
NR_UE_rrc_inst[ctxt_pP->module_id].Info[gNB_index].rnti = ctxt_pP->rnti;
rrc_ue_generate_RRCSetupComplete(
ctxt_pP,
targets/ARCH/rfsimulator/simulator.c
+12 -9
View File
@@ -429,6 +429,8 @@ static int rfsimulator_write_internal(rfsimulator_state_t *t, openair0_timestamp
if (!alreadyLocked)
pthread_mutex_lock(&Sockmutex);
LOG_D(HW,"sending %d samples at time: %ld, nbAnt %d\n", nsamps, timestamp, nbAnt);
for (int i=0; i<FD_SETSIZE; i++) {
buffer_t *b=&t->buf[i];
@@ -621,7 +623,7 @@ static int rfsimulator_read(openair0_device *device, openair0_timestamp *ptimest
}
rfsimulator_state_t *t = device->priv;
LOG_D(HW, "Enter rfsimulator_read, expect %d samples, will release at TS: %ld\n", nsamps, t->nextRxTstamp+nsamps);
LOG_D(HW, "Enter rfsimulator_read, expect %d samples, will release at TS: %ld, nbAnt %d\n", nsamps, t->nextRxTstamp+nsamps, nbAnt);
// deliver data from received data
// check if a UE is connected
int first_sock;
@@ -693,15 +695,16 @@ static int rfsimulator_read(openair0_device *device, openair0_timestamp *ptimest
t->poll_telnetcmdq(t->telnetcmd_qid,t);
for (int a=0; a<nbAnt; a++) {//loop over number of Rx antennas
if ( ptr->channel_model != NULL ) // apply a channel model
rxAddInput( ptr->circularBuf, (c16_t *) samplesVoid[a],
a,
ptr->channel_model,
nsamps,
t->nextRxTstamp,
CirSize
);
if ( ptr->channel_model != NULL ) { // apply a channel model
rxAddInput(ptr->circularBuf, (c16_t *) samplesVoid[a],
a,
ptr->channel_model,
nsamps,
t->nextRxTstamp,
CirSize);
}
else { // no channel modeling
double H_awgn_mimo[4][4] ={{1.0, 0.2, 0.1, 0.05}, //rx 0
{0.2, 1.0, 0.2, 0.1}, //rx 1
{0.1, 0.2, 1.0, 0.2}, //rx 2
targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band41.fr1.106PRB.usrpb210.conf
+58
View File
@@ -168,6 +168,64 @@ gNBs =
);
# Dedicated Serving Cell Configuration
servingCellConfigDedicated = ({
# BWP-Downlink
# BWP 1 Configuration
dl_bwp-Id_1 = 1;
dl_bwp1_locationAndBandwidth = 28875; // RBstart=0, L=106 (40 MHz BW)
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
dl_bwp1_subcarrierSpacing = 1;
# BWP 2 Configuration
dl_bwp-Id_2 = 2;
dl_bwp2_locationAndBandwidth = 13750; // RBstart=0, L=51 (20 MHz BW)
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
dl_bwp2_subcarrierSpacing = 1;
# BWP 3 Configuration
dl_bwp-Id_3 = 3;
dl_bwp3_locationAndBandwidth = 6325; // RBstart=0, L=24 (10 MHz BW)
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
dl_bwp3_subcarrierSpacing = 1;
firstActiveDownlinkBWP-Id = 1; #BWP-Id
defaultDownlinkBWP-Id = 1; #BWP-Id
# bwp-InactivityTimer ENUMERATED {ms2, ms3, ms4, ms5, ms6, ms8, ms10, ms20, ms30,
# ms40,ms50, ms60, ms80,ms100, ms200,ms300, ms500,
# ms750, ms1280, ms1920, ms2560, spare10, spare9, spare8,
# spare7, spare6, spare5, spare4, spare3, spare2, spare1 }
# UplinkConfig
# BWP-Uplink
# BWP 1 Configuration
ul_bwp-Id_1 = 1;
ul_bwp1_locationAndBandwidth = 28875; // RBstart=0, L=106 (40 MHz BW)
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
ul_bwp1_subcarrierSpacing = 1;
# BWP 2 Configuration
ul_bwp-Id_2 = 2;
ul_bwp2_locationAndBandwidth = 13750; // RBstart=0, L=51 (20 MHz BW)
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
ul_bwp2_subcarrierSpacing = 1;
# BWP 3 Configuration
ul_bwp-Id_3 = 3;
ul_bwp3_locationAndBandwidth = 6325; // RBstart=0, L=24 (10 MHz BW)
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
ul_bwp3_subcarrierSpacing = 1;
firstActiveUplinkBWP-Id = 1; #BWP-Id
}
);
# ------- SCTP definitions
SCTP :
targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.106PRB.2x2.usrpn300.conf
+59 -1
View File
@@ -69,7 +69,7 @@ gNBs =
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
initialDLBWPsubcarrierSpacing = 1;
#pdcch-ConfigCommon
initialDLBWPcontrolResourceSetZero = 11;
initialDLBWPcontrolResourceSetZero = 12;
initialDLBWPsearchSpaceZero = 0;
#uplinkConfigCommon
@@ -170,6 +170,64 @@ gNBs =
);
# Dedicated Serving Cell Configuration
servingCellConfigDedicated = ({
# BWP-Downlink
# BWP 1 Configuration
dl_bwp-Id_1 = 1;
dl_bwp1_locationAndBandwidth = 28875; // RBstart=0, L=106 (40 MHz BW)
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
dl_bwp1_subcarrierSpacing = 1;
# BWP 2 Configuration
dl_bwp-Id_2 = 2;
dl_bwp2_locationAndBandwidth = 13750; // RBstart=0, L=51 (20 MHz BW)
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
dl_bwp2_subcarrierSpacing = 1;
# BWP 3 Configuration
dl_bwp-Id_3 = 3;
dl_bwp3_locationAndBandwidth = 6325; // RBstart=0, L=24 (10 MHz BW)
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
dl_bwp3_subcarrierSpacing = 1;
firstActiveDownlinkBWP-Id = 1; #BWP-Id
defaultDownlinkBWP-Id = 1; #BWP-Id
# bwp-InactivityTimer ENUMERATED {ms2, ms3, ms4, ms5, ms6, ms8, ms10, ms20, ms30,
# ms40,ms50, ms60, ms80,ms100, ms200,ms300, ms500,
# ms750, ms1280, ms1920, ms2560, spare10, spare9, spare8,
# spare7, spare6, spare5, spare4, spare3, spare2, spare1 }
# UplinkConfig
# BWP-Uplink
# BWP 1 Configuration
ul_bwp-Id_1 = 1;
ul_bwp1_locationAndBandwidth = 28875; // RBstart=0, L=106 (40 MHz BW)
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
ul_bwp1_subcarrierSpacing = 1;
# BWP 2 Configuration
ul_bwp-Id_2 = 2;
ul_bwp2_locationAndBandwidth = 13750; // RBstart=0, L=51 (20 MHz BW)
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
ul_bwp2_subcarrierSpacing = 1;
# BWP 3 Configuration
ul_bwp-Id_3 = 3;
ul_bwp3_locationAndBandwidth = 6325; // RBstart=0, L=24 (10 MHz BW)
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
ul_bwp3_subcarrierSpacing = 1;
firstActiveUplinkBWP-Id = 1; #BWP-Id
}
);
# ------- SCTP definitions
SCTP :
targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.106PRB.usrpb210.4layer.conf
+320
View File
@@ -0,0 +1,320 @@
Active_gNBs = ( "gNB-Eurecom-5GNRBox");
# Asn1_verbosity, choice in: none, info, annoying
Asn1_verbosity = "none";
gNBs =
(
{
////////// Identification parameters:
gNB_ID = 0xe00;
gNB_name = "gNB-Eurecom-5GNRBox";
// Tracking area code, 0x0000 and 0xfffe are reserved values
tracking_area_code = 1;
plmn_list = ({
mcc = 208;
mnc = 99;
mnc_length = 2;
snssaiList = (
{
sst = 1;
sd = 0x1; // 0 false, else true
},
{
sst = 1;
sd = 0x112233; // 0 false, else true
}
);
});
nr_cellid = 12345678L;
////////// Physical parameters:
ssb_SubcarrierOffset = 0;
pdsch_AntennaPorts = 4;
pusch_AntennaPorts = 4;
sib1_tda = 0;
pdcch_ConfigSIB1 = (
{
controlResourceSetZero = 12;
searchSpaceZero = 0;
}
);
servingCellConfigCommon = (
{
#spCellConfigCommon
physCellId = 0;
# downlinkConfigCommon
#frequencyInfoDL
# this is 3600 MHz + 43 PRBs@30kHz SCS (same as initial BWP)
absoluteFrequencySSB = 641280;
dl_frequencyBand = 78;
# this is 3600 MHz
dl_absoluteFrequencyPointA = 640008;
#scs-SpecificCarrierList
dl_offstToCarrier = 0;
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
dl_subcarrierSpacing = 1;
dl_carrierBandwidth = 106;
#initialDownlinkBWP
#genericParameters
# this is RBstart=27,L=48 (275*(L-1))+RBstart
initialDLBWPlocationAndBandwidth = 28875; # 6366 12925 12956 28875 12952
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
initialDLBWPsubcarrierSpacing = 1;
#pdcch-ConfigCommon
initialDLBWPcontrolResourceSetZero = 12;
initialDLBWPsearchSpaceZero = 0;
#pdsch-ConfigCommon
#pdschTimeDomainAllocationList (up to 16 entries)
initialDLBWPk0_0 = 0; #for DL slot
initialDLBWPmappingType_0 = 0; #0=typeA,1=typeB
initialDLBWPstartSymbolAndLength_0 = 40; #this is SS=1,L=13
initialDLBWPk0_1 = 0; #for mixed slot
initialDLBWPmappingType_1 = 0;
initialDLBWPstartSymbolAndLength_1 = 57; #this is SS=1,L=5
#uplinkConfigCommon
#frequencyInfoUL
ul_frequencyBand = 78;
#scs-SpecificCarrierList
ul_offstToCarrier = 0;
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
ul_subcarrierSpacing = 1;
ul_carrierBandwidth = 106;
pMax = 20;
#initialUplinkBWP
#genericParameters
initialULBWPlocationAndBandwidth = 28875;
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
initialULBWPsubcarrierSpacing = 1;
#rach-ConfigCommon
#rach-ConfigGeneric
prach_ConfigurationIndex = 98;
#prach_msg1_FDM
#0 = one, 1=two, 2=four, 3=eight
prach_msg1_FDM = 0;
prach_msg1_FrequencyStart = 0;
zeroCorrelationZoneConfig = 13;
preambleReceivedTargetPower = -96;
#preamblTransMax (0...10) = (3,4,5,6,7,8,10,20,50,100,200)
preambleTransMax = 6;
#powerRampingStep
# 0=dB0,1=dB2,2=dB4,3=dB6
powerRampingStep = 1;
#ra_ReponseWindow
#1,2,4,8,10,20,40,80
ra_ResponseWindow = 4;
#ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR
#1=oneeighth,2=onefourth,3=half,4=one,5=two,6=four,7=eight,8=sixteen
ssb_perRACH_OccasionAndCB_PreamblesPerSSB_PR = 4;
#oneHalf (0..15) 4,8,12,16,...60,64
ssb_perRACH_OccasionAndCB_PreamblesPerSSB = 14;
#ra_ContentionResolutionTimer
#(0..7) 8,16,24,32,40,48,56,64
ra_ContentionResolutionTimer = 7;
rsrp_ThresholdSSB = 19;
#prach-RootSequenceIndex_PR
#1 = 839, 2 = 139
prach_RootSequenceIndex_PR = 2;
prach_RootSequenceIndex = 1;
# SCS for msg1, can only be 15 for 30 kHz < 6 GHz, takes precendence over the one derived from prach-ConfigIndex
#
msg1_SubcarrierSpacing = 1,
# restrictedSetConfig
# 0=unrestricted, 1=restricted type A, 2=restricted type B
restrictedSetConfig = 0,
# pusch-ConfigCommon (up to 16 elements)
initialULBWPk2_0 = 6; # used for UL slot
initialULBWPmappingType_0 = 1
initialULBWPstartSymbolAndLength_0 = 41; # this is SS=0 L=13
initialULBWPk2_1 = 6; # used for mixed slot
initialULBWPmappingType_1 = 1;
initialULBWPstartSymbolAndLength_1 = 52; # this is SS=10 L=4
initialULBWPk2_2 = 7; # used for Msg.3 during RA
initialULBWPmappingType_2 = 1;
initialULBWPstartSymbolAndLength_2 = 52; # this is SS=10 L=4
msg3_DeltaPreamble = 1;
p0_NominalWithGrant =-90;
# pucch-ConfigCommon setup :
# pucchGroupHopping
# 0 = neither, 1= group hopping, 2=sequence hopping
pucchGroupHopping = 0;
hoppingId = 40;
p0_nominal = -90;
# ssb_PositionsInBurs_BitmapPR
# 1=short, 2=medium, 3=long
ssb_PositionsInBurst_PR = 2;
ssb_PositionsInBurst_Bitmap = 1;
# ssb_periodicityServingCell
# 0 = ms5, 1=ms10, 2=ms20, 3=ms40, 4=ms80, 5=ms160, 6=spare2, 7=spare1
ssb_periodicityServingCell = 2;
# dmrs_TypeA_position
# 0 = pos2, 1 = pos3
dmrs_TypeA_Position = 0;
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
subcarrierSpacing = 1;
#tdd-UL-DL-ConfigurationCommon
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
referenceSubcarrierSpacing = 1;
# pattern1
# dl_UL_TransmissionPeriodicity
# 0=ms0p5, 1=ms0p625, 2=ms1, 3=ms1p25, 4=ms2, 5=ms2p5, 6=ms5, 7=ms10
dl_UL_TransmissionPeriodicity = 6;
nrofDownlinkSlots = 7;
nrofDownlinkSymbols = 6;
nrofUplinkSlots = 2;
nrofUplinkSymbols = 4;
ssPBCH_BlockPower = -25;
}
);
# ------- SCTP definitions
SCTP :
{
# Number of streams to use in input/output
SCTP_INSTREAMS = 2;
SCTP_OUTSTREAMS = 2;
};
////////// MME parameters:
amf_ip_address = ( { ipv4 = "192.168.70.132";
ipv6 = "192:168:30::17";
active = "yes";
preference = "ipv4";
}
);
NETWORK_INTERFACES :
{
GNB_INTERFACE_NAME_FOR_NG_AMF = "demo-oai";
GNB_IPV4_ADDRESS_FOR_NG_AMF = "192.168.70.129/24";
GNB_INTERFACE_NAME_FOR_NGU = "demo-oai";
GNB_IPV4_ADDRESS_FOR_NGU = "192.168.70.129/24";
GNB_PORT_FOR_S1U = 2152; # Spec 2152
};
}
);
MACRLCs = (
{
num_cc = 1;
tr_s_preference = "local_L1";
tr_n_preference = "local_RRC";
pusch_TargetSNRx10 = 150;
pucch_TargetSNRx10 = 200;
}
);
L1s = (
{
num_cc = 1;
tr_n_preference = "local_mac";
pusch_proc_threads = 8;
prach_dtx_threshold = 120;
pucch0_dtx_threshold = 150;
ofdm_offset_divisor = 8; #set this to UINT_MAX for offset 0
}
);
RUs = (
{
local_rf = "yes"
nb_tx = 4
nb_rx = 4
att_tx = 0
att_rx = 0;
bands = [78];
max_pdschReferenceSignalPower = -27;
max_rxgain = 114;
eNB_instances = [0];
#beamforming 1x4 matrix:
bf_weights = [0x00007fff, 0x0000, 0x0000, 0x0000, 0x00000000, 0x00007fff, 0x0000, 0x0000, 0x0000, 0x0000, 0x00007fff, 0x0000, 0x0000, 0x0000, 0x0000, 0x00007fff];
clock_src = "internal";
}
);
THREAD_STRUCT = (
{
#three config for level of parallelism "PARALLEL_SINGLE_THREAD", "PARALLEL_RU_L1_SPLIT", or "PARALLEL_RU_L1_TRX_SPLIT"
parallel_config = "PARALLEL_SINGLE_THREAD";
#two option for worker "WORKER_DISABLE" or "WORKER_ENABLE"
worker_config = "WORKER_ENABLE";
}
);
rfsimulator :
{
serveraddr = "server";
serverport = "4043";
options = (); #("saviq"); or/and "chanmod"
modelname = "AWGN";
IQfile = "/tmp/rfsimulator.iqs";
};
security = {
# preferred ciphering algorithms
# the first one of the list that an UE supports in chosen
# valid values: nea0, nea1, nea2, nea3
ciphering_algorithms = ( "nea0" );
# preferred integrity algorithms
# the first one of the list that an UE supports in chosen
# valid values: nia0, nia1, nia2, nia3
integrity_algorithms = ( "nia2", "nia0" );
# setting 'drb_ciphering' to "no" disables ciphering for DRBs, no matter
# what 'ciphering_algorithms' configures; same thing for 'drb_integrity'
drb_ciphering = "yes";
drb_integrity = "no";
};
log_config :
{
global_log_level ="info";
global_log_verbosity ="medium";
hw_log_level ="info";
hw_log_verbosity ="medium";
phy_log_level ="info";
phy_log_verbosity ="medium";
mac_log_level ="info";
mac_log_verbosity ="high";
rlc_log_level ="info";
rlc_log_verbosity ="medium";
pdcp_log_level ="info";
pdcp_log_verbosity ="medium";
rrc_log_level ="info";
rrc_log_verbosity ="medium";
ngap_log_level ="info";
ngap_log_verbosity ="medium";
};
targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.106PRB.usrpb210.conf
+58
View File
@@ -168,6 +168,64 @@ gNBs =
);
# Dedicated Serving Cell Configuration
servingCellConfigDedicated = ({
# BWP-Downlink
# BWP 1 Configuration
dl_bwp-Id_1 = 1;
dl_bwp1_locationAndBandwidth = 28875; // RBstart=0, L=106 (40 MHz BW)
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
dl_bwp1_subcarrierSpacing = 1;
# BWP 2 Configuration
dl_bwp-Id_2 = 2;
dl_bwp2_locationAndBandwidth = 13750; // RBstart=0, L=51 (20 MHz BW)
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
dl_bwp2_subcarrierSpacing = 1;
# BWP 3 Configuration
dl_bwp-Id_3 = 3;
dl_bwp3_locationAndBandwidth = 6325; // RBstart=0, L=24 (10 MHz BW)
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
dl_bwp3_subcarrierSpacing = 1;
firstActiveDownlinkBWP-Id = 1; #BWP-Id
defaultDownlinkBWP-Id = 1; #BWP-Id
# bwp-InactivityTimer ENUMERATED {ms2, ms3, ms4, ms5, ms6, ms8, ms10, ms20, ms30,
# ms40,ms50, ms60, ms80,ms100, ms200,ms300, ms500,
# ms750, ms1280, ms1920, ms2560, spare10, spare9, spare8,
# spare7, spare6, spare5, spare4, spare3, spare2, spare1 }
# UplinkConfig
# BWP-Uplink
# BWP 1 Configuration
ul_bwp-Id_1 = 1;
ul_bwp1_locationAndBandwidth = 28875; // RBstart=0, L=106 (40 MHz BW)
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
ul_bwp1_subcarrierSpacing = 1;
# BWP 2 Configuration
ul_bwp-Id_2 = 2;
ul_bwp2_locationAndBandwidth = 13750; // RBstart=0, L=51 (20 MHz BW)
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
ul_bwp2_subcarrierSpacing = 1;
# BWP 3 Configuration
ul_bwp-Id_3 = 3;
ul_bwp3_locationAndBandwidth = 6325; // RBstart=0, L=24 (10 MHz BW)
# subcarrierSpacing
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
ul_bwp3_subcarrierSpacing = 1;
firstActiveUplinkBWP-Id = 1; #BWP-Id
}
);
# ------- SCTP definitions
SCTP :
targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.162PRB.2x2.usrpn300.conf
+10 -43
View File
@@ -21,21 +21,17 @@ gNBs =
sd = 0x1; // 0 false, else true
}
);
});
nr_cellid = 12345678L;
////////// Physical parameters:
ssb_SubcarrierOffset = 0;
pdsch_AntennaPorts_N1 = 1;
pusch_AntennaPorts = 2;
min_rxtxtime = 2;
sib1_tda = 1;
do_CSIRS = 1;
do_SRS = 0;
ul_prbblacklist = "79,80,81,82"
ssb_SubcarrierOffset = 0;
pdsch_AntennaPorts_XP = 1;
pusch_AntennaPorts = 2;
do_CSIRS = 0;
ul_prbblacklist = "79,80,81,82"
pdcch_ConfigSIB1 = (
{
@@ -71,21 +67,8 @@ gNBs =
# 0=kHz15, 1=kHz30, 2=kHz60, 3=kHz120
initialDLBWPsubcarrierSpacing = 1;
#pdcch-ConfigCommon
initialDLBWPcontrolResourceSetZero = 11;
initialDLBWPcontrolResourceSetZero = 12;
initialDLBWPsearchSpaceZero = 10;
#pdsch-ConfigCommon
#pdschTimeDomainAllocationList (up to 16 entries)
initialDLBWPk0_0 = 0;
#initialULBWPmappingType
#0=typeA,1=typeB
initialDLBWPmappingType_0 = 0;
#this is SS=1,L=13
initialDLBWPstartSymbolAndLength_0 = 40;
initialDLBWPk0_1 = 0;
initialDLBWPmappingType_1 = 0;
#this is SS=1,L=5
initialDLBWPstartSymbolAndLength_1 = 57;
#uplinkConfigCommon
#frequencyInfoUL
@@ -140,22 +123,6 @@ gNBs =
# 0=unrestricted, 1=restricted type A, 2=restricted type B
restrictedSetConfig = 0,
# pusch-ConfigCommon (up to 16 elements)
initialULBWPk2_0 = 2;
initialULBWPmappingType_0 = 1
# this is SS=2 L=13
initialULBWPstartSymbolAndLength_0 = 41;
initialULBWPk2_1 = 2;
initialULBWPmappingType_1 = 1;
# this is SS=0 L=4
initialULBWPstartSymbolAndLength_1 = 52;
initialULBWPk2_2 = 7;
initialULBWPmappingType_2 = 1;
# this is SS=10 L=4
initialULBWPstartSymbolAndLength_2 = 52;
msg3_DeltaPreamble = 1;
p0_NominalWithGrant =-90;
@@ -248,16 +215,16 @@ L1s = (
num_cc = 1;
tr_n_preference = "local_mac";
prach_dtx_threshold = 120;
pucch0_dtx_threshold = 100;
pucch0_dtx_threshold = 80;
}
);
RUs = (
{
local_rf = "yes"
nb_tx = 2
nb_rx = 2
att_tx = 0
nb_tx = 2;
nb_rx = 2;
att_tx = 0;
att_rx = 0;
bands = [78];
max_pdschReferenceSignalPower = -27;

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