Defined common MAX_BWP_SIZE @ MAC
- as defined by clause 12 "BWP Operation" TS 38.213 - cleaned up hardcoded usage
This commit is contained in:
@@ -2338,8 +2338,8 @@ uint16_t nr_dci_size(NR_ServingCellConfigCommon_t *scc,
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rbg_size_config = 1;
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else
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rbg_size_config = 0;
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numRBG = getNRBG(NRRIV2BW(ubwp->bwp_Common->genericParameters.locationAndBandwidth,275),
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NRRIV2PRBOFFSET(ubwp->bwp_Common->genericParameters.locationAndBandwidth,275),
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numRBG = getNRBG(NRRIV2BW(ubwp->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE),
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NRRIV2PRBOFFSET(ubwp->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE),
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rbg_size_config);
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if (pusch_Config->resourceAllocation == 0)
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dci_pdu->frequency_domain_assignment.nbits = numRBG;
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@@ -2528,8 +2528,8 @@ uint16_t nr_dci_size(NR_ServingCellConfigCommon_t *scc,
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size += dci_pdu->bwp_indicator.nbits;
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// Freq domain assignment
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rbg_size_config = secondaryCellGroup->spCellConfig->spCellConfigDedicated->initialDownlinkBWP->pdsch_Config->choice.setup->rbg_Size;
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numRBG = getNRBG(NRRIV2BW(bwp->bwp_Common->genericParameters.locationAndBandwidth,275),
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NRRIV2PRBOFFSET(bwp->bwp_Common->genericParameters.locationAndBandwidth,275),
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numRBG = getNRBG(NRRIV2BW(bwp->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE),
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NRRIV2PRBOFFSET(bwp->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE),
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rbg_size_config);
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if (pdsch_config->resourceAllocation == 0)
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dci_pdu->frequency_domain_assignment.nbits = numRBG;
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@@ -44,6 +44,9 @@
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#define MAX_TDM (7) // Maximum nb of PRACH occasions TDMed in a slot
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#define MAX_FDM (8) // Maximum nb of PRACH occasions FDMed in a slot
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// Definitions for MAC control and data
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#define MAX_BWP_SIZE 275
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typedef enum frequency_range_e {
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FR1 = 0,
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FR2
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@@ -121,8 +121,8 @@ void config_dci_pdu(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_dci_dl_pdu_rel15_t
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// for SPS=14 8 MSBs in positions 13 down to 6
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monitoringSymbolsWithinSlot = (ss->monitoringSymbolsWithinSlot->buf[0]<<(sps-8)) | (ss->monitoringSymbolsWithinSlot->buf[1]>>(16-sps));
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rel15->rnti = mac->crnti;
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rel15->BWPSize = NRRIV2BW(bwp_Common->genericParameters.locationAndBandwidth, 275);
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rel15->BWPStart = NRRIV2PRBOFFSET(bwp_Common->genericParameters.locationAndBandwidth, 275);
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rel15->BWPSize = NRRIV2BW(bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
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rel15->BWPStart = NRRIV2PRBOFFSET(bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
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rel15->SubcarrierSpacing = bwp_Common->genericParameters.subcarrierSpacing;
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for (int i = 0; i < rel15->num_dci_options; i++) {
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rel15->dci_length_options[i] = nr_dci_size(scc, mac->scg, def_dci_pdu_rel15+i, rel15->dci_format_options[i], NR_RNTI_C, rel15->BWPSize, bwp_id);
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@@ -133,8 +133,8 @@ void config_dci_pdu(NR_UE_MAC_INST_t *mac, fapi_nr_dl_config_dci_dl_pdu_rel15_t
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sps = initialDownlinkBWP->genericParameters.cyclicPrefix == NULL ? 14 : 12;
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monitoringSymbolsWithinSlot = (ss->monitoringSymbolsWithinSlot->buf[0]<<(sps-8)) | (ss->monitoringSymbolsWithinSlot->buf[1]>>(16-sps));
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rel15->rnti = mac->ra_rnti;
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rel15->BWPSize = NRRIV2BW(initialDownlinkBWP->genericParameters.locationAndBandwidth, 275);
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rel15->BWPStart = NRRIV2PRBOFFSET(bwp_Common->genericParameters.locationAndBandwidth, 275); //NRRIV2PRBOFFSET(initialDownlinkBWP->genericParameters.locationAndBandwidth, 275);
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rel15->BWPSize = NRRIV2BW(initialDownlinkBWP->genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
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rel15->BWPStart = NRRIV2PRBOFFSET(bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE); //NRRIV2PRBOFFSET(initialDownlinkBWP->genericParameters.locationAndBandwidth, 275);
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rel15->SubcarrierSpacing = initialDownlinkBWP->genericParameters.subcarrierSpacing;
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rel15->dci_length_options[0] = nr_dci_size(scc, mac->scg, def_dci_pdu_rel15, rel15->dci_format_options[0], NR_RNTI_RA, rel15->BWPSize, bwp_id);
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break;
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@@ -2585,8 +2585,8 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
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AssertFatal(mac->DLbwp[0]!=NULL,"DLbwp[0] should not be zero here!\n");
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AssertFatal(mac->ULbwp[0]!=NULL,"DLbwp[0] should not be zero here!\n");
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const uint16_t n_RB_DLBWP = (mac->ra_state == WAIT_RAR) ? NRRIV2BW(mac->scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.locationAndBandwidth, 275) : NRRIV2BW(mac->DLbwp[0]->bwp_Common->genericParameters.locationAndBandwidth,275);
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const uint16_t n_RB_ULBWP = NRRIV2BW(mac->ULbwp[0]->bwp_Common->genericParameters.locationAndBandwidth,275);
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const uint16_t n_RB_DLBWP = (mac->ra_state == WAIT_RAR) ? NRRIV2BW(mac->scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.locationAndBandwidth, MAX_BWP_SIZE) : NRRIV2BW(mac->DLbwp[0]->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
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const uint16_t n_RB_ULBWP = NRRIV2BW(mac->ULbwp[0]->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
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LOG_D(MAC,"nr_ue_process_dci at MAC layer with dci_format=%d (DL BWP %d, UL BWP %d)\n",dci_format,n_RB_DLBWP,n_RB_ULBWP);
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@@ -3112,8 +3112,8 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
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dl_config->dl_config_list[dl_config->number_pdus].dlsch_config_pdu.rnti = rnti;
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//fapi_nr_dl_config_dlsch_pdu_rel15_t dlsch_config_pdu_1_0 = dl_config->dl_config_list[dl_config->number_pdus].dlsch_config_pdu.dlsch_config_rel15;
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fapi_nr_dl_config_dlsch_pdu_rel15_t *dlsch_config_pdu_1_0 = &dl_config->dl_config_list[dl_config->number_pdus].dlsch_config_pdu.dlsch_config_rel15;
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dlsch_config_pdu_1_0->BWPSize = NRRIV2BW(mac->DLbwp[0]->bwp_Common->genericParameters.locationAndBandwidth,275);
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dlsch_config_pdu_1_0->BWPStart = NRRIV2PRBOFFSET(mac->DLbwp[0]->bwp_Common->genericParameters.locationAndBandwidth,275);
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dlsch_config_pdu_1_0->BWPSize = NRRIV2BW(mac->DLbwp[0]->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
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dlsch_config_pdu_1_0->BWPStart = NRRIV2PRBOFFSET(mac->DLbwp[0]->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
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dlsch_config_pdu_1_0->SubcarrierSpacing = mac->DLbwp[0]->bwp_Common->genericParameters.subcarrierSpacing;
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/* IDENTIFIER_DCI_FORMATS */
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/* FREQ_DOM_RESOURCE_ASSIGNMENT_DL */
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@@ -3548,11 +3548,11 @@ int get_n_rb(NR_UE_MAC_INST_t *mac, int rnti_type){
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NR_ControlResourceSet_t *coreset = mac->coreset[bwp_id - 1][coreset_id];
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get_coreset_rballoc(coreset->frequencyDomainResources.buf,&N_RB,&start_RB);
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} else {
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N_RB = NRRIV2BW(mac->scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.locationAndBandwidth, 275);
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N_RB = NRRIV2BW(mac->scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
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}
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break;
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case NR_RNTI_C:
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N_RB = NRRIV2BW(mac->DLbwp[0]->bwp_Common->genericParameters.locationAndBandwidth, 275);
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N_RB = NRRIV2BW(mac->DLbwp[0]->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
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break;
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}
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return N_RB;
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@@ -3578,8 +3578,8 @@ int nr_extract_dci_info(NR_UE_MAC_INST_t *mac,
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AssertFatal(mac->ULbwp[0] != NULL, "ULbwp[0] shouldn't be null here!\n");
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int N_RB = get_n_rb(mac, rnti_type);
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int N_RB_UL = (mac->scg != NULL) ?
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NRRIV2BW(mac->ULbwp[0]->bwp_Common->genericParameters.locationAndBandwidth,275) :
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NRRIV2BW(mac->scc->uplinkConfigCommon->initialUplinkBWP->genericParameters.locationAndBandwidth,275);
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NRRIV2BW(mac->ULbwp[0]->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE) :
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NRRIV2BW(mac->scc->uplinkConfigCommon->initialUplinkBWP->genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
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int pos=0;
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int fsize=0;
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@@ -96,12 +96,12 @@ void nr_config_Msg3_pdu(NR_UE_MAC_INST_t *mac,
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N_PRB_oh = *mac->scg->spCellConfig->spCellConfigDedicated->uplinkConfig->pusch_ServingCellConfig->choice.setup->xOverhead;
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// active BWP start
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int abwp_start = NRRIV2PRBOFFSET(ubwp->bwp_Common->genericParameters.locationAndBandwidth, 275);
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int abwp_size = NRRIV2BW(ubwp->bwp_Common->genericParameters.locationAndBandwidth, 275);
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int abwp_start = NRRIV2PRBOFFSET(ubwp->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
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int abwp_size = NRRIV2BW(ubwp->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
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// initial BWP start
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int ibwp_start = NRRIV2PRBOFFSET(scc->uplinkConfigCommon->initialUplinkBWP->genericParameters.locationAndBandwidth, 275);
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int ibwp_size = NRRIV2BW(scc->uplinkConfigCommon->initialUplinkBWP->genericParameters.locationAndBandwidth, 275);
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int ibwp_start = NRRIV2PRBOFFSET(scc->uplinkConfigCommon->initialUplinkBWP->genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
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int ibwp_size = NRRIV2BW(scc->uplinkConfigCommon->initialUplinkBWP->genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
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// BWP start selection according to 8.3 of TS 38.213
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pusch_config_pdu->bwp_size = ibwp_size;
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@@ -612,8 +612,8 @@ void nr_get_Msg3alloc(module_id_t module_id,
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LOG_I(MAC, "[RAPROC] Msg3 slot %d: current slot %u Msg3 frame %u k2 %u Msg3_tda_id %u start symbol index %u\n", ra->Msg3_slot, current_slot, ra->Msg3_frame, k2,ra->Msg3_tda_id, StartSymbolIndex);
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uint16_t *vrb_map_UL =
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&RC.nrmac[module_id]->common_channels[CC_id].vrb_map_UL[ra->Msg3_slot * 275];
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const uint16_t bwpSize = NRRIV2BW(ubwp->bwp_Common->genericParameters.locationAndBandwidth, 275);
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&RC.nrmac[module_id]->common_channels[CC_id].vrb_map_UL[ra->Msg3_slot * MAX_BWP_SIZE];
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const uint16_t bwpSize = NRRIV2BW(ubwp->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
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/* search 18 free RBs */
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int rbSize = 0;
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int rbStart = 0;
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@@ -694,10 +694,10 @@ void nr_add_msg3(module_id_t module_idP, int CC_id, frame_t frameP, sub_frame_t
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pusch_pdu->pdu_bit_map = PUSCH_PDU_BITMAP_PUSCH_DATA;
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pusch_pdu->rnti = ra->rnti;
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pusch_pdu->handle = 0;
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int abwp_size = NRRIV2BW(ubwp->bwp_Common->genericParameters.locationAndBandwidth,275);
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int abwp_start = NRRIV2PRBOFFSET(ubwp->bwp_Common->genericParameters.locationAndBandwidth,275);
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int ibwp_size = NRRIV2BW(scc->uplinkConfigCommon->initialUplinkBWP->genericParameters.locationAndBandwidth,275);
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int ibwp_start = NRRIV2PRBOFFSET(scc->uplinkConfigCommon->initialUplinkBWP->genericParameters.locationAndBandwidth,275);
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int abwp_size = NRRIV2BW(ubwp->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
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int abwp_start = NRRIV2PRBOFFSET(ubwp->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
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int ibwp_size = NRRIV2BW(scc->uplinkConfigCommon->initialUplinkBWP->genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
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int ibwp_start = NRRIV2PRBOFFSET(scc->uplinkConfigCommon->initialUplinkBWP->genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
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if ((ibwp_start < abwp_start) || (ibwp_size > abwp_size))
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pusch_pdu->bwp_start = abwp_start;
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else
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@@ -787,7 +787,7 @@ void nr_generate_Msg2(module_id_t module_idP,
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}
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else { // on configured BWP or initial LDBWP, bandwidth parameters in DCI correspond size of initialBWP
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locationAndBandwidth = scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.locationAndBandwidth;
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dci10_bw = NRRIV2BW(locationAndBandwidth,275);
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dci10_bw = NRRIV2BW(locationAndBandwidth, MAX_BWP_SIZE);
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}
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if ((ra->Msg2_frame == frameP) && (ra->Msg2_slot == slotP)) {
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@@ -840,8 +840,8 @@ void nr_generate_Msg2(module_id_t module_idP,
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pdsch_pdu_rel15->pduIndex = 0;
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pdsch_pdu_rel15->BWPSize = NRRIV2BW(bwp->bwp_Common->genericParameters.locationAndBandwidth,275);
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pdsch_pdu_rel15->BWPStart = NRRIV2PRBOFFSET(bwp->bwp_Common->genericParameters.locationAndBandwidth,275);
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pdsch_pdu_rel15->BWPSize = NRRIV2BW(bwp->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
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pdsch_pdu_rel15->BWPStart = NRRIV2PRBOFFSET(bwp->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
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pdsch_pdu_rel15->SubcarrierSpacing = bwp->bwp_Common->genericParameters.subcarrierSpacing;
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pdsch_pdu_rel15->CyclicPrefix = 0;
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pdsch_pdu_rel15->NrOfCodewords = 1;
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@@ -458,8 +458,8 @@ void nr_simple_dlsch_preprocessor(module_id_t module_id,
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const int current_harq_pid = slot % num_slots_per_tdd;
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NR_UE_harq_t *harq = &sched_ctrl->harq_processes[current_harq_pid];
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NR_UE_ret_info_t *retInfo = &sched_ctrl->retInfo[current_harq_pid];
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const uint16_t bwpSize = NRRIV2BW(sched_ctrl->active_bwp->bwp_Common->genericParameters.locationAndBandwidth, 275);
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int rbStart = NRRIV2PRBOFFSET(sched_ctrl->active_bwp->bwp_Common->genericParameters.locationAndBandwidth, 275);
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const uint16_t bwpSize = NRRIV2BW(sched_ctrl->active_bwp->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
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int rbStart = NRRIV2PRBOFFSET(sched_ctrl->active_bwp->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
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if (harq->round != 0) { /* retransmission */
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sched_ctrl->time_domain_allocation = retInfo->time_domain_allocation;
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@@ -80,7 +80,7 @@ void nr_schedule_css_dlsch_phytest(module_id_t module_idP,
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NR_ServingCellConfigCommon_t *scc=cc->ServingCellConfigCommon;
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int dlBWP_carrier_bandwidth = NRRIV2BW(scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.locationAndBandwidth,275);
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int dlBWP_carrier_bandwidth = NRRIV2BW(scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
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/*
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@@ -94,7 +94,7 @@ void nr_schedule_css_dlsch_phytest(module_id_t module_idP,
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for (CC_id=0; CC_id<MAX_NUM_CCs; CC_id++) {
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LOG_D(MAC, "Scheduling common search space DCI type 1 dlBWP BW.firstRB %d.%d\n",
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dlBWP_carrier_bandwidth,
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NRRIV2PRBOFFSET(scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.locationAndBandwidth,275));
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NRRIV2PRBOFFSET(scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.locationAndBandwidth, MAX_BWP_SIZE));
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dl_req = &nr_mac->DL_req[CC_id].dl_tti_request_body;
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@@ -117,8 +117,8 @@ void nr_schedule_css_dlsch_phytest(module_id_t module_idP,
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pdsch_pdu_rel15->pduIndex = 0;
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// BWP
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pdsch_pdu_rel15->BWPSize = NRRIV2BW(scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.locationAndBandwidth,275);
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pdsch_pdu_rel15->BWPStart = NRRIV2PRBOFFSET(scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.locationAndBandwidth,275);
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pdsch_pdu_rel15->BWPSize = NRRIV2BW(scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
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pdsch_pdu_rel15->BWPStart = NRRIV2PRBOFFSET(scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
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pdsch_pdu_rel15->SubcarrierSpacing = scc->downlinkConfigCommon->initialDownlinkBWP->genericParameters.subcarrierSpacing;
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pdsch_pdu_rel15->CyclicPrefix = 0;
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pdsch_pdu_rel15->NrOfCodewords = 1;
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@@ -267,7 +267,7 @@ void nr_preprocessor_phytest(module_id_t module_id,
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UE_id);
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NR_UE_sched_ctrl_t *sched_ctrl = &UE_info->UE_sched_ctrl[UE_id];
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/* find largest unallocated chunk */
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const int bwpSize = NRRIV2BW(sched_ctrl->active_bwp->bwp_Common->genericParameters.locationAndBandwidth, 275);
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const int bwpSize = NRRIV2BW(sched_ctrl->active_bwp->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
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int rbStart = 0;
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int tStart = 0;
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int rbSize = 0;
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@@ -398,7 +398,7 @@ void nr_ul_preprocessor_phytest(module_id_t module_id,
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const uint16_t rbStart = 0;
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const uint16_t rbSize = 50; /* due to OAI UE limitations */
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uint16_t *vrb_map_UL =
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&RC.nrmac[module_id]->common_channels[CC_id].vrb_map_UL[sched_slot * 275];
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&RC.nrmac[module_id]->common_channels[CC_id].vrb_map_UL[sched_slot * MAX_BWP_SIZE];
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for (int i = rbStart; i < rbStart + rbSize; ++i) {
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if (vrb_map_UL[i]) {
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LOG_E(MAC,
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@@ -549,8 +549,8 @@ void nr_fill_nfapi_dl_pdu(int Mod_idP,
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pdsch_pdu_rel15->pduIndex = nr_mac->pdu_index[0]++;
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// BWP
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pdsch_pdu_rel15->BWPSize = NRRIV2BW(bwp->bwp_Common->genericParameters.locationAndBandwidth,275);
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pdsch_pdu_rel15->BWPStart = NRRIV2PRBOFFSET(bwp->bwp_Common->genericParameters.locationAndBandwidth,275);
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pdsch_pdu_rel15->BWPSize = NRRIV2BW(bwp->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
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pdsch_pdu_rel15->BWPStart = NRRIV2PRBOFFSET(bwp->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
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pdsch_pdu_rel15->SubcarrierSpacing = bwp->bwp_Common->genericParameters.subcarrierSpacing;
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if (bwp->bwp_Common->genericParameters.cyclicPrefix)
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pdsch_pdu_rel15->CyclicPrefix = *bwp->bwp_Common->genericParameters.cyclicPrefix;
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@@ -617,7 +617,7 @@ void nr_fill_nfapi_dl_pdu(int Mod_idP,
|
||||
pdsch_pdu_rel15->rbSize,
|
||||
pdsch_pdu_rel15->rbStart,
|
||||
NRRIV2BW(bwp->bwp_Common->genericParameters.locationAndBandwidth,
|
||||
275));
|
||||
MAX_BWP_SIZE));
|
||||
else
|
||||
AssertFatal(1==0,"Only frequency resource allocation type 1 is currently supported\n");
|
||||
// time domain assignment: row index used instead of SLIV
|
||||
@@ -647,7 +647,7 @@ void nr_fill_nfapi_dl_pdu(int Mod_idP,
|
||||
dci_pdu_rel15[0].frequency_domain_assignment.val,
|
||||
pdsch_pdu_rel15->rbStart,
|
||||
pdsch_pdu_rel15->rbSize,
|
||||
NRRIV2BW(bwp->bwp_Common->genericParameters.locationAndBandwidth, 275),
|
||||
NRRIV2BW(bwp->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE),
|
||||
dci_pdu_rel15[0].time_domain_assignment.val,
|
||||
dci_pdu_rel15[0].vrb_to_prb_mapping.val,
|
||||
dci_pdu_rel15[0].mcs,
|
||||
@@ -710,7 +710,7 @@ void config_uldci(NR_BWP_Uplink_t *ubwp,
|
||||
int *dci_formats,
|
||||
int time_domain_assignment, uint8_t tpc,
|
||||
int n_ubwp, int bwp_id) {
|
||||
const int bw = NRRIV2BW(ubwp->bwp_Common->genericParameters.locationAndBandwidth, 275);
|
||||
const int bw = NRRIV2BW(ubwp->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
|
||||
switch (dci_formats[(pdcch_pdu_rel15->numDlDci) - 1]) {
|
||||
case NR_UL_DCI_FORMAT_0_0:
|
||||
dci_pdu_rel15->frequency_domain_assignment.val =
|
||||
@@ -788,8 +788,8 @@ void nr_configure_pdcch(gNB_MAC_INST *nr_mac,
|
||||
uint8_t aggregation_level,
|
||||
int CCEIndex) {
|
||||
if (bwp) { // This is not the InitialBWP
|
||||
pdcch_pdu->BWPSize = NRRIV2BW(bwp->bwp_Common->genericParameters.locationAndBandwidth,275);
|
||||
pdcch_pdu->BWPStart = NRRIV2PRBOFFSET(bwp->bwp_Common->genericParameters.locationAndBandwidth,275);
|
||||
pdcch_pdu->BWPSize = NRRIV2BW(bwp->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
|
||||
pdcch_pdu->BWPStart = NRRIV2PRBOFFSET(bwp->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
|
||||
pdcch_pdu->SubcarrierSpacing = bwp->bwp_Common->genericParameters.subcarrierSpacing;
|
||||
pdcch_pdu->CyclicPrefix = (bwp->bwp_Common->genericParameters.cyclicPrefix==NULL) ? 0 : *bwp->bwp_Common->genericParameters.cyclicPrefix;
|
||||
|
||||
@@ -926,8 +926,8 @@ void nr_configure_pucch(nfapi_nr_pucch_pdu_t* pucch_pdu,
|
||||
else
|
||||
pucch_pdu->hopping_id = *scc->physCellId;
|
||||
|
||||
pucch_pdu->bwp_size = NRRIV2BW(bwp->bwp_Common->genericParameters.locationAndBandwidth,275);
|
||||
pucch_pdu->bwp_start = NRRIV2PRBOFFSET(bwp->bwp_Common->genericParameters.locationAndBandwidth,275);
|
||||
pucch_pdu->bwp_size = NRRIV2BW(bwp->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
|
||||
pucch_pdu->bwp_start = NRRIV2PRBOFFSET(bwp->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
|
||||
pucch_pdu->subcarrier_spacing = bwp->bwp_Common->genericParameters.subcarrierSpacing;
|
||||
pucch_pdu->cyclic_prefix = (bwp->bwp_Common->genericParameters.cyclicPrefix==NULL) ? 0 : *bwp->bwp_Common->genericParameters.cyclicPrefix;
|
||||
|
||||
|
||||
@@ -508,7 +508,7 @@ void nr_simple_ulsch_preprocessor(module_id_t module_id,
|
||||
&RC.nrmac[module_id]->common_channels[CC_id].vrb_map_UL[sched_slot * 275];
|
||||
uint16_t rbStart = 0;
|
||||
while (vrb_map_UL[rbStart]) rbStart++;
|
||||
const uint16_t bwpSize = NRRIV2BW(sched_ctrl->active_ubwp->bwp_Common->genericParameters.locationAndBandwidth,275);
|
||||
const uint16_t bwpSize = NRRIV2BW(sched_ctrl->active_ubwp->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
|
||||
uint16_t rbSize = 1;
|
||||
while (rbStart + rbSize < bwpSize && !vrb_map_UL[rbStart+rbSize])
|
||||
rbSize++;
|
||||
@@ -677,8 +677,8 @@ void nr_schedule_ulsch(module_id_t module_id,
|
||||
pusch_pdu->handle = 0; //not yet used
|
||||
|
||||
/* FAPI: BWP */
|
||||
pusch_pdu->bwp_size = NRRIV2BW(sched_ctrl->active_ubwp->bwp_Common->genericParameters.locationAndBandwidth,275);
|
||||
pusch_pdu->bwp_start = NRRIV2PRBOFFSET(sched_ctrl->active_ubwp->bwp_Common->genericParameters.locationAndBandwidth,275);
|
||||
pusch_pdu->bwp_size = NRRIV2BW(sched_ctrl->active_ubwp->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
|
||||
pusch_pdu->bwp_start = NRRIV2PRBOFFSET(sched_ctrl->active_ubwp->bwp_Common->genericParameters.locationAndBandwidth, MAX_BWP_SIZE);
|
||||
pusch_pdu->subcarrier_spacing = sched_ctrl->active_ubwp->bwp_Common->genericParameters.subcarrierSpacing;
|
||||
pusch_pdu->cyclic_prefix = 0;
|
||||
|
||||
|
||||
Reference in New Issue
Block a user