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Merge remote-tracking branch 'origin/episys-merge-SL-variables' into integration_2023_w26

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This commit is contained in:
Robert Schmidt
2023-06-30 19:10:55 +02:00
parent ec8d2fa525 a0a2248ea1
commit 8f07050cbe
12 changed files with 130 additions and 50 deletions
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executables/softmodem-common.h
+15 -1
View File
@@ -58,7 +58,7 @@ extern "C"
#define CONFIG_HLP_PHYTST "test UE phy layer, mac disabled\n"
#define CONFIG_HLP_DORA "test gNB and UE with RA procedures\n"
#define CONFIG_HLP_SA "run gNB in standalone mode\n"
#define CONFIG_HLP_SL_MODE "sets the NR sidelink mode (0: not in sidelink mode, 1: in-coverage/gNB, 2: out-of-coverage/no gNB)"
#define CONFIG_HLP_SL_MODE "sets the NR sidelink mode (0: not in sidelink mode, 1: in-coverage/gNB, 2: out-of-coverage/no gNB)\n"
#define CONFIG_HLP_EXTS "tells hardware to use an external timing reference\n"
#define CONFIG_HLP_DMRSSYNC "tells RU to insert DMRS in subframe 1 slot 0"
#define CONFIG_HLP_CLK "tells hardware to use a clock reference (0:internal, 1:external, 2:gpsdo)\n"
@@ -106,6 +106,9 @@ extern "C"
#define CONFIG_L1_EMULATOR "Run in L1 emulated mode (disable PHY layer)\n"
#define CONFIG_HLP_CONTINUOUS_TX "perform continuous transmission, even in TDD mode (to work around USRP issues)\n"
#define CONFIG_HLP_STATS_DISABLE "disable globally the stats generation and persistence"
#define CONFIG_HLP_SYNC_REF "Sync Reference in Sidelink\n"
#define CONFIG_HLP_NID1 "Set NID1 value in Sidelink\n"
#define CONFIG_HLP_NID2 "Set NID2 value in Sidelink\n"
/*-----------------------------------------------------------------------------------------------------------------------------------------------------*/
/* command line parameters common to eNodeB and UE */
@@ -137,6 +140,10 @@ extern "C"
#define NON_STOP softmodem_params.non_stop
#define EMULATE_L1 softmodem_params.emulate_l1
#define CONTINUOUS_TX softmodem_params.continuous_tx
#define SYNC_REF softmodem_params.sync_ref
#define NID1 softmodem_params.nid1
#define NID2 softmodem_params.nid2
#define REORDER_THREAD_DISABLE softmodem_params.reorder_thread_disable
#define DEFAULT_RFCONFIG_FILE "/usr/local/etc/syriq/ue.band7.tm1.PRB100.NR40.dat";
@@ -181,6 +188,8 @@ extern int usrp_tx_thread;
{"emulate-l1", CONFIG_L1_EMULATOR, PARAMFLAG_BOOL, .iptr=&EMULATE_L1, .defintval=0, TYPE_INT, 0}, \
{"continuous-tx", CONFIG_HLP_CONTINUOUS_TX, PARAMFLAG_BOOL, .iptr=&CONTINUOUS_TX, .defintval=0, TYPE_INT, 0}, \
{"disable-stats", CONFIG_HLP_STATS_DISABLE, PARAMFLAG_BOOL, .iptr=&stats_disabled, .defintval=0, TYPE_INT, 0}, \
{"nid1", CONFIG_HLP_NID1, 0, .iptr=&NID1, .defintval=10, TYPE_INT, 0}, \
{"nid2", CONFIG_HLP_NID2, 0, .iptr=&NID2, .defintval=1, TYPE_INT, 0}, \
}
// clang-format on
@@ -227,6 +236,8 @@ extern int usrp_tx_thread;
{ .s5 = { NULL } }, \
{ .s5 = { NULL } }, \
{ .s5 = { NULL } }, \
{ .s5 = { NULL } }, \
{ .s5 = { NULL } }, \
}
// clang-format on
@@ -335,6 +346,9 @@ typedef struct {
int non_stop;
int emulate_l1;
int continuous_tx;
int sync_ref;
int nid1;
int nid2;
} softmodem_params_t;
extern uint64_t get_softmodem_optmask(void);
openair1/PHY/CODING/nrPolar_tools/nr_polar_decoding_tools.c
+11 -3
View File
@@ -351,9 +351,17 @@ void applyGtoright(const t_nrPolar_params *pp,decoder_node_t *node) {
((__m64 *)alpha_r)[0] = _mm_subs_pi16(((__m64 *)alpha_v)[1],_mm_sign_pi16(((__m64 *)alpha_v)[0],((__m64 *)betal)[0]));
}
else
{// equivalent scalar code to above, activated only on non x86/ARM architectures or Nv=1,2
for (int i=0;i<node->Nv/2;i++) {
alpha_r[i] = alpha_v[i+(node->Nv/2)] - (betal[i]*alpha_v[i]);
{
int temp_alpha_r;
for (int i = 0; i < node->Nv / 2; i++) {
temp_alpha_r = alpha_v[i + (node->Nv / 2)] - (betal[i] * alpha_v[i]);
if (temp_alpha_r > SHRT_MAX) {
alpha_r[i] = SHRT_MAX;
} else if (temp_alpha_r < -SHRT_MAX) {
alpha_r[i] = -SHRT_MAX;
} else {
alpha_r[i] = temp_alpha_r;
}
}
}
if (node->Nv == 2) { // apply hard decision on right node
openair1/PHY/CODING/nrPolar_tools/nr_polar_pbch_defs.h
+3
View File
@@ -35,6 +35,7 @@
#define NR_POLAR_PBCH_AGGREGATION_LEVEL 0 //uint8_t
#define NR_POLAR_PBCH_MESSAGE_TYPE 0 //int8_t
#define NR_POLAR_PSBCH_MESSAGE_TYPE 3 //int8_t
#define NR_POLAR_PBCH_PAYLOAD_BITS 32 //uint16_t
#define NR_POLAR_PBCH_CRC_PARITY_BITS 24
#define NR_POLAR_PBCH_CRC_ERROR_CORRECTION_BITS 3
@@ -52,6 +53,8 @@
#define NR_POLAR_PBCH_I_BIL 0 //uint8_t
#define NR_POLAR_PBCH_E 864 //uint16_t
#define NR_POLAR_PBCH_E_DWORD 27 // NR_POLAR_PBCH_E/32
#define NR_POLAR_PSBCH_E 1792 //uint16_t
#define NR_POLAR_PSBCH_E_DWORD 56 // NR_POLAR_PSBCH_E/32
/*
* TEST CODE
openair1/PHY/NR_REFSIG/ss_pbch_nr.h
+10
View File
@@ -41,6 +41,9 @@
/* PSS parameters */
#define NUMBER_PSS_SEQUENCE (3)
#define NUMBER_PSS_SEQUENCE_SL (2)
#define PSS_SSS_SUB_CARRIER_START (56)
#define PSS_SSS_SUB_CARRIER_START_SL (2)
#define INVALID_PSS_SEQUENCE (NUMBER_PSS_SEQUENCE)
#define LENGTH_PSS_NR (127)
#define N_SC_RB (12) /* Resource block size in frequency domain expressed as a number if subcarriers */
@@ -62,6 +65,13 @@
#define SSS_SYMBOL_NB ((2) + OFFSET_SS_PBCH)
#define PBCH_LAST_SYMBOL_NB ((3) + OFFSET_SS_PBCH)
#define OFFSET_SS_PSBCH -1
#define PSS0_SL_SYMBOL_NB ((1) + OFFSET_SS_PSBCH)
#define PSS1_SL_SYMBOL_NB ((2) + OFFSET_SS_PSBCH)
#define SSS0_SL_SYMBOL_NB ((3) + OFFSET_SS_PSBCH)
#define SSS1_SL_SYMBOL_NB ((4) + OFFSET_SS_PSBCH)
/* SS/PBCH parameters */
#define N_RB_SS_PBCH_BLOCK (20)
#define NB_SYMBOLS_PBCH (3)
openair1/PHY/NR_REFSIG/sss_nr.h
+9
View File
@@ -47,13 +47,22 @@
#define SCALING_METRIC_SSS_NR (15)//(19)
#define N_ID_2_NUMBER (NUMBER_PSS_SEQUENCE)
#define N_ID_2_NUMBER_SL (NUMBER_PSS_SEQUENCE_SL)
#define N_ID_1_NUMBER (NUMBER_SSS_SEQUENCE)
#define GET_NID2(Nid_cell) (Nid_cell%3)
#define GET_NID1(Nid_cell) (Nid_cell/3)
#define GET_NID2_SL(Nid_SL) (Nid_SL/NUMBER_SSS_SEQUENCE)
#define GET_NID1_SL(Nid_SL) (Nid_SL%NUMBER_SSS_SEQUENCE)
#define PSS_SC_START_NR (52) /* see from TS 38.211 table 7.4.3.1-1: Resources within an SS/PBCH block for PSS... */
#define SSS_START_IDX (3) /* [0:PSBCH 1:PSS0 2:PSS1 3:SSS0 4:SSS1] */
#define NUM_SSS_SYMBOLS (2)
#define SSS_METRIC_FLOOR_NR (30000)
/************** VARIABLES *****************************************/
#define PHASE_HYPOTHESIS_NUMBER (16)
openair1/PHY/NR_UE_TRANSPORT/pss_nr.c
+10 -8
View File
@@ -73,7 +73,7 @@ int16_t *get_primary_synchro_nr2(const int nid2)
*
*********************************************************************/
void generate_pss_nr(NR_DL_FRAME_PARMS *fp,int N_ID_2)
void generate_pss_nr(NR_DL_FRAME_PARMS *fp, int N_ID_2)
{
AssertFatal(fp->ofdm_symbol_size > 127,"Illegal ofdm_symbol_size %d\n",fp->ofdm_symbol_size);
AssertFatal(N_ID_2>=0 && N_ID_2 <=2,"Illegal N_ID_2 %d\n",N_ID_2);
@@ -88,9 +88,8 @@ void generate_pss_nr(NR_DL_FRAME_PARMS *fp,int N_ID_2)
assert(N_ID_2 < NUMBER_PSS_SEQUENCE);
memcpy(x, x_initial, sizeof(x_initial));
for (int i=0; i < (LENGTH_PSS_NR - INITIAL_PSS_NR); i++) {
x[i+INITIAL_PSS_NR] = (x[i + 4] + x[i])%(2);
}
for (int i = 0; i < (LENGTH_PSS_NR - INITIAL_PSS_NR); i++)
x[i + INITIAL_PSS_NR] = (x[i + 4] + x[i]) % (2);
for (int n=0; n < LENGTH_PSS_NR; n++) {
const int m = (n + 43 * N_ID_2) % (LENGTH_PSS_NR);
@@ -139,7 +138,8 @@ void generate_pss_nr(NR_DL_FRAME_PARMS *fp,int N_ID_2)
* sample 0 is for continuous frequency which is used here
*/
unsigned int k = fp->first_carrier_offset + fp->ssb_start_subcarrier + 56; //and
unsigned int subcarrier_start = get_softmodem_params()->sl_mode == 0 ? PSS_SSS_SUB_CARRIER_START : PSS_SSS_SUB_CARRIER_START_SL;
unsigned int k = fp->first_carrier_offset + fp->ssb_start_subcarrier + subcarrier_start;
if (k>= fp->ofdm_symbol_size) k-=fp->ofdm_symbol_size;
c16_t synchroF_tmp[fp->ofdm_symbol_size] __attribute__((aligned(32)));
memset(synchroF_tmp, 0, sizeof(synchroF_tmp));
@@ -237,7 +237,8 @@ void generate_pss_nr(NR_DL_FRAME_PARMS *fp,int N_ID_2)
static void init_context_pss_nr(NR_DL_FRAME_PARMS *frame_parms_ue)
{
AssertFatal(frame_parms_ue->ofdm_symbol_size > 127, "illegal ofdm_symbol_size %d\n", frame_parms_ue->ofdm_symbol_size);
for (int i = 0; i < NUMBER_PSS_SEQUENCE; i++) {
int pss_sequence = get_softmodem_params()->sl_mode == 0 ? NUMBER_PSS_SEQUENCE : NUMBER_PSS_SEQUENCE_SL;
for (int i = 0; i < pss_sequence; i++) {
primary_synchro_nr2[i] = malloc16_clear(LENGTH_PSS_NR * sizeof(int16_t));
AssertFatal(primary_synchro_nr2[i], "Fatal memory allocation problem \n");
primary_synchro_time_nr[i] = malloc16_clear(frame_parms_ue->ofdm_symbol_size * sizeof(c16_t));
@@ -583,7 +584,8 @@ static int pss_search_time_nr(c16_t **rxdata, PHY_VARS_NR_UE *ue, int fo_flag, i
pss_source = 0;
int maxval=0;
for (int j = 0; j < NUMBER_PSS_SEQUENCE; j++)
int max_size = get_softmodem_params()->sl_mode == 0 ? NUMBER_PSS_SEQUENCE : NUMBER_PSS_SEQUENCE_SL;
for (int j = 0; j < max_size; j++)
for (int i = 0; i < frame_parms->ofdm_symbol_size; i++) {
maxval = max(maxval, abs(primary_synchro_time_nr[j][i].r));
maxval = max(maxval, abs(primary_synchro_time_nr[j][i].i));
@@ -595,7 +597,7 @@ static int pss_search_time_nr(c16_t **rxdata, PHY_VARS_NR_UE *ue, int fo_flag, i
/* Correlation computation is based on a a dot product which is realized thank to SIMS extensions */
uint16_t pss_index_start = 0;
uint16_t pss_index_end = NUMBER_PSS_SEQUENCE;
uint16_t pss_index_end = get_softmodem_params()->sl_mode == 0 ? NUMBER_PSS_SEQUENCE : NUMBER_PSS_SEQUENCE_SL;
if (ue->target_Nid_cell != -1) {
pss_index_start = GET_NID2(ue->target_Nid_cell);
pss_index_end = pss_index_start + 1;
openair1/PHY/NR_UE_TRANSPORT/sss_nr.c
+26 -24
View File
@@ -36,7 +36,7 @@
#include "PHY/defs_nr_UE.h"
#include "PHY/MODULATION/modulation_UE.h"
#include "executables/softmodem-common.h"
#include "PHY/NR_REFSIG/ss_pbch_nr.h"
#define DEFINE_VARIABLES_SSS_NR_H
@@ -78,31 +78,25 @@ void init_context_sss_nr(int amp)
int16_t x1[LENGTH_SSS_NR];
int16_t dss_current;
int m0, m1;
int nid_2_num = get_softmodem_params()->sl_mode == 0 ? N_ID_2_NUMBER : N_ID_2_NUMBER_SL;
const int x0_initial[INITIAL_SSS_NR] = { 1, 0, 0, 0, 0, 0, 0 };
const int x1_initial[INITIAL_SSS_NR] = { 1, 0, 0, 0, 0, 0, 0 };
for (int i=0; i < INITIAL_SSS_NR; i++) {
for (int i = 0; i < INITIAL_SSS_NR; i++) {
x0[i] = x0_initial[i];
x1[i] = x1_initial[i];
}
for (int i=0; i < (LENGTH_SSS_NR - INITIAL_SSS_NR); i++) {
x0[i+7] = (x0[i + 4] + x0[i])%(2);
x1[i+7] = (x1[i + 1] + x1[i])%(2);
for (int i = 0; i < (LENGTH_SSS_NR - INITIAL_SSS_NR); i++) {
x0[i + 7] = (x0[i + 4] + x0[i]) % (2);
x1[i + 7] = (x1[i + 1] + x1[i]) % (2);
}
for (int N_ID_2 = 0; N_ID_2 < N_ID_2_NUMBER; N_ID_2++) {
for (int N_ID_2 = 0; N_ID_2 < nid_2_num; N_ID_2++) {
for (int N_ID_1 = 0; N_ID_1 < N_ID_1_NUMBER; N_ID_1++) {
m0 = 15*(N_ID_1/112) + (5*N_ID_2);
m1 = N_ID_1%112;
m0 = 15 * (N_ID_1 / 112) + (5 * N_ID_2);
m1 = N_ID_1 % 112;
for (int n = 0; n < LENGTH_SSS_NR; n++) {
dss_current = (1 - 2*x0[(n + m0)%(LENGTH_SSS_NR)])*(1 - 2*x1[(n + m1)%(LENGTH_SSS_NR)]);
dss_current = (1 - 2 * x0 [(n + m0) % (LENGTH_SSS_NR)]) * (1 - 2 * x1[(n + m1) % (LENGTH_SSS_NR)]);
/* Modulation of SSS is a BPSK TS 36.211 chapter 5.1.2 BPSK */
#if 1
d_sss[N_ID_2][N_ID_1][n] = dss_current;// * amp;
@@ -276,8 +270,9 @@ static int do_pss_sss_extract_nr(
for (int aarx = 0; aarx < frame_parms->nb_antennas_rx; aarx++) {
int pss_symbol = 0;
int sss_symbol = SSS_SYMBOL_NB - PSS_SYMBOL_NB;
int sss_symbol = get_softmodem_params()->sl_mode == 0 ?
(SSS_SYMBOL_NB - PSS_SYMBOL_NB) :
(SSS0_SL_SYMBOL_NB - PSS0_SL_SYMBOL_NB) ;
unsigned int ofdm_symbol_size = frame_parms->ofdm_symbol_size;
c16_t *pss_rxF = rxdataF[aarx] + pss_symbol * ofdm_symbol_size;
@@ -286,12 +281,16 @@ static int do_pss_sss_extract_nr(
c16_t *pss_rxF_ext = pss_ext[aarx];
c16_t *sss_rxF_ext = sss_ext[aarx];
unsigned int k = frame_parms->first_carrier_offset + frame_parms->ssb_start_subcarrier + 56;
unsigned int k = frame_parms->first_carrier_offset +
frame_parms->ssb_start_subcarrier +
((get_softmodem_params()->sl_mode == 0) ?
PSS_SSS_SUB_CARRIER_START :
PSS_SSS_SUB_CARRIER_START_SL);
if (k>= frame_parms->ofdm_symbol_size) k-=frame_parms->ofdm_symbol_size;
for (int i=0; i < LENGTH_PSS_NR; i++) {
if (doPss) {
if (doPss) {
pss_rxF_ext[i] = pss_rxF[k];
}
@@ -300,9 +299,7 @@ static int do_pss_sss_extract_nr(
}
k++;
if (k == ofdm_symbol_size) k=0;
if (k == frame_parms->ofdm_symbol_size) k = 0;
}
}
@@ -365,7 +362,12 @@ static int pss_sss_extract_nr(PHY_VARS_NR_UE *phy_vars_ue,
*
*********************************************************************/
int rx_sss_nr(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, int32_t *tot_metric, uint8_t *phase_max, int *freq_offset_sss, c16_t rxdataF[][ue->frame_parms.samples_per_slot_wCP])
int rx_sss_nr(PHY_VARS_NR_UE *ue,
UE_nr_rxtx_proc_t *proc,
int32_t *tot_metric,
uint8_t *phase_max,
int *freq_offset_sss,
c16_t rxdataF[][ue->frame_parms.samples_per_slot_wCP])
{
uint8_t i;
c16_t pss_ext[NB_ANTENNAS_RX][LENGTH_PSS_NR];
openair1/PHY/defs_nr_UE.h
+21
View File
@@ -318,6 +318,22 @@ typedef struct {
fapi_nr_dl_config_dci_dl_pdu_rel15_t pdcch_config[FAPI_NR_MAX_SS];
} NR_UE_PDCCH_CONFIG;
#define NR_PSBCH_MAX_NB_CARRIERS 132
#define NR_PSBCH_MAX_NB_MOD_SYMBOLS 99
#define NR_PSBCH_DMRS_LENGTH 297 // in mod symbols
#define NR_PSBCH_DMRS_LENGTH_DWORD 20 // ceil(2(QPSK)*NR_PBCH_DMRS_LENGTH/32)
/* NR Sidelink PSBCH payload fields
TODO: This will be removed in the future and
filled in by the upper layers once developed. */
typedef struct {
uint32_t coverageIndicator : 1;
uint32_t tddConfig : 12;
uint32_t DFN : 10;
uint32_t slotIndex : 7;
uint32_t reserved : 2;
} PSBCH_payload;
#define PBCH_A 24
typedef struct {
@@ -378,8 +394,12 @@ typedef struct {
int if_freq_off;
/// \brief Indicator that UE is synchronized to a gNB
int is_synchronized;
/// \brief Indicator that UE is synchronized to a SyncRef UE on Sidelink
int is_synchronized_sl;
/// \brief Target gNB Nid_cell when UE is resynchronizing
int target_Nid_cell;
/// \brief Indicator that UE is an SynchRef UE
int sync_ref;
/// Data structure for UE process scheduling
UE_nr_proc_t proc;
/// Flag to indicate the UE shouldn't do timing correction at all
@@ -660,6 +680,7 @@ typedef struct nr_rxtx_thread_data_s {
UE_nr_rxtx_proc_t proc;
PHY_VARS_NR_UE *UE;
int writeBlockSize;
notifiedFIFO_t txFifo;
nr_phy_data_t phy_data;
int tx_wait_for_dlsch;
} nr_rxtx_thread_data_t;
openair1/PHY/defs_nr_common.h
+4
View File
@@ -169,6 +169,8 @@ struct NR_DL_FRAME_PARMS {
/// Frame type (0 FDD, 1 TDD)
frame_type_t frame_type;
uint8_t tdd_config;
/// Sidelink Cell ID
uint16_t Nid_SL;
/// Cell ID
uint16_t Nid_cell;
/// subcarrier spacing (15,30,60,120)
@@ -260,6 +262,8 @@ struct NR_DL_FRAME_PARMS {
uint8_t ssb_index;
/// OFDM symbol offset divisor for UL
uint32_t ofdm_offset_divisor;
uint16_t tdd_slot_config;
uint8_t tdd_period;
};
// PRS config structures
openair1/SIMULATION/NR_UE_PHY/unit_tests/src/pss_test.c
+6 -4
View File
@@ -119,14 +119,15 @@ void test_synchro_pss_nr(PHY_VARS_NR_UE *PHY_VARS_NR_UE, int position_symbol, in
/* search pss */
synchro_position = pss_synchro_nr(PHY_VARS_NR_UE, rate_change);
int pss_sequence = get_softmodem_params()->sl_mode == 0 ? NUMBER_PSS_SEQUENCE : NUMBER_PSS_SEQUENCE_SL;
if (pss_sequence_number < NUMBER_PSS_SEQUENCE) {
if (pss_sequence_number < pss_sequence) {
NID2_value = pss_sequence_number;
} else {
NID2_value = NUMBER_PSS_SEQUENCE;
NID2_value = pss_sequence;
}
if (NID2_value < NUMBER_PSS_SEQUENCE) {
if (NID2_value < pss_sequence) {
test->number_of_tests++;
/* position should be adjusted with i&q samples which are successively stored as int16 in the received buffer */
int test_margin = PSS_DETECTION_MARGIN_MAX; /* warning correlation results give an offset position between 0 and 12 */
@@ -213,9 +214,10 @@ int main(int argc, char *argv[])
test_synchro_pss_nr(PHY_vars_UE, 0, INVALID_PSS_SEQUENCE, &test);
#endif
int pss_sequence = get_softmodem_params()->sl_mode == 0 ? NUMBER_PSS_SEQUENCE : NUMBER_PSS_SEQUENCE_SL;
for (int index_position = 0; index_position < size_test_position; index_position++) {
for (int number_pss_sequence = 0; number_pss_sequence < NUMBER_PSS_SEQUENCE; number_pss_sequence++) {
for (int number_pss_sequence = 0; number_pss_sequence < pss_sequence; number_pss_sequence++) {
p_test_synchro_pss(PHY_vars_UE, test_position[index_position], number_pss_sequence, &test);
openair1/SIMULATION/NR_UE_PHY/unit_tests/src/pss_util_test.c
+13 -8
View File
@@ -111,12 +111,15 @@ void phase_shift_samples(int16_t *samples, int length, int16_t phase_shift_re, i
void display_data(int pss_sequence_number, int16_t *rxdata, int position) {
#ifdef DEBUG_TEST_PSS
int16_t *pss_sequence[NUMBER_PSS_SEQUENCE] = {primary_synch0_time, primary_synch1_time, primary_synch2_time};
int16_t *pss_sequence_time = pss_sequence[pss_sequence_number];
int pss_sequence = get_softmodem_params()->sl_mode == 0 ? NUMBER_PSS_SEQUENCE : NUMBER_PSS_SEQUENCE_SL;
int16_t *pss_sequence[pss_sequence] = {primary_synch0_time, primary_synch1_time, primary_synch2_time};
int16_t *pss_sequence_sl[pss_sequence] = {primary_synch0_time, primary_synch1_time};
int16_t *pss_sequence_time = pss_sequence[pss_sequence_number];;
if (get_softmodem_params()->sl_mode != 0) {
pss_sequence_time = pss_sequence_sl[pss_sequence_number];
printf(" pss %6d data \n", pss_sequence_number);
for (int i = 0; i < 4; i++) {
if (pss_sequence_number < NUMBER_PSS_SEQUENCE) {
if (pss_sequence_number < pss_sequence) {
printf("[i %6d] : %4d [i %6d] : %8i at address : %p \n", i, pss_sequence_time[2*i], (i + position), rxdata[2*i + (position*2)], &(rxdata[2*i + (position*2)]));
printf("[q %6d] : %4d [q %6d] : %8i at address : %p \n", i, pss_sequence_time[2*i+1], (i + position), rxdata[2*i + 1 + (position*2)], &(rxdata[2*i + 1 + (position*2)]));
} else {
@@ -242,7 +245,8 @@ int init_test(unsigned char N_tx, unsigned char N_rx, unsigned char transmission
int n_ssb_crb = 0;
int ssb_subcarrier_offset = 0;
nr_init_frame_parms_ue(frame_parms, mu, extended_prefix_flag, N_RB_DL, n_ssb_crb, ssb_subcarrier_offset);
PHY_vars_UE->frame_parms.Nid_cell = (3 * N_ID_1_NUMBER) + N_ID_2_NUMBER; /* set to unvalid value */
int nid_2_num = get_softmodem_params()->sl_mode == 0 ? N_ID_2_NUMBER : N_ID_2_NUMBER_SL;
PHY_vars_UE->frame_parms.Nid_cell = (3 * N_ID_1_NUMBER) + nid_2_num; /* set to unvalid value */
//phy_init_nr_top(frame_parms);
@@ -447,8 +451,8 @@ int set_pss_in_rx_buffer(PHY_VARS_NR_UE *PHY_vars_UE, int position_symbol, int p
printf("This pss sequence can not be fully written in the received window \n");
return (-1);
}
if ((pss_sequence_number >= NUMBER_PSS_SEQUENCE) && (pss_sequence_number < 0)) {
int pss_sequence = get_softmodem_params()->sl_mode == 0 ? NUMBER_PSS_SEQUENCE : NUMBER_PSS_SEQUENCE_SL;
if ((pss_sequence_number >= pss_sequence) && (pss_sequence_number < 0)) {
printf("Unknow pss sequence %d \n", pss_sequence_number);
return (-1);
}
@@ -504,8 +508,9 @@ void set_sequence_pss(PHY_VARS_NR_UE *PHY_vars_UE, int position_symbol, int pss_
if (position_symbol < 0) {
set_pss_in_rx_buffer_from_external_buffer(PHY_vars_UE, input_buffer);
}
int pss_sequence = get_softmodem_params()->sl_mode == 0 ? NUMBER_PSS_SEQUENCE : NUMBER_PSS_SEQUENCE_SL;
/* write pss sequence in received ue buffer */
else if (pss_sequence_number < NUMBER_PSS_SEQUENCE) {
else if (pss_sequence_number < pss_sequence) {
if (position_symbol > (samples_for_frame - frame_parms->ofdm_symbol_size)) {
printf("This position for pss sequence %d is not supported because it exceeds the frame length %d!\n", position_symbol, samples_for_frame);
exit(0);
openair1/SIMULATION/NR_UE_PHY/unit_tests/src/sss_test.c
+2 -2
View File
@@ -227,10 +227,10 @@ int main(int argc, char *argv[])
Nid2 = GET_NID2(Nid_cell[index]);
Nid1 = GET_NID1(Nid_cell[index]);
int nid_2_num = get_softmodem_params()->sl_mode == 0 ? N_ID_2_NUMBER : N_ID_2_NUMBER_SL;
for (int position = 0; position < size_test_position; position++) {
PHY_vars_UE->frame_parms.Nid_cell = (3 * N_ID_1_NUMBER) + N_ID_2_NUMBER; /* set to invalid value */
PHY_vars_UE->frame_parms.Nid_cell = (3 * N_ID_1_NUMBER) + nid_2_num; /* set to invalid value */
phase = (*p_test_synchro_pss_sss)(PHY_vars_UE, test_position[position], &frame_parms_gNB, &test); /* return phase index which gives phase error from an array */