Merge remote-tracking branch 'origin/nr_gold_init_improv' into integration_2022_wk15
This commit is contained in:
@@ -464,7 +464,8 @@ typedef struct {
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uint8_t nEpreRatioOfPDSCHToPTRS;
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/// MCS table for this DLSCH
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uint8_t mcs_table;
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uint8_t nscid;
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uint16_t dlDmrsScramblingId;
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uint16_t pduBitmap;
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} fapi_nr_dl_config_dlsch_pdu_rel15_t;
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+24
-20
@@ -536,6 +536,7 @@ int phy_init_nr_gNB(PHY_VARS_gNB *gNB,
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}
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nr_generate_modulation_table();
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gNB->pdcch_gold_init = cfg->cell_config.phy_cell_id.value;
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nr_init_pdcch_dmrs(gNB, cfg->cell_config.phy_cell_id.value);
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nr_init_pbch_interleaver(gNB->nr_pbch_interleaver);
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@@ -549,28 +550,30 @@ int phy_init_nr_gNB(PHY_VARS_gNB *gNB,
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pdsch_dmrs[slot] = (uint32_t ***)malloc16(fp->symbols_per_slot*sizeof(uint32_t **));
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AssertFatal(pdsch_dmrs[slot]!=NULL, "NR init: pdsch_dmrs for slot %d - malloc failed\n", slot);
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int nb_codewords = NR_MAX_NB_LAYERS > 4 ? 2 : 1;
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for (int symb=0; symb<fp->symbols_per_slot; symb++) {
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pdsch_dmrs[slot][symb] = (uint32_t **)malloc16(nb_codewords*sizeof(uint32_t *));
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pdsch_dmrs[slot][symb] = (uint32_t **)malloc16(NR_NB_NSCID*sizeof(uint32_t *));
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AssertFatal(pdsch_dmrs[slot][symb]!=NULL, "NR init: pdsch_dmrs for slot %d symbol %d - malloc failed\n", slot, symb);
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for (int q=0; q<nb_codewords; q++) {
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for (int q=0; q<NR_NB_NSCID; q++) {
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pdsch_dmrs[slot][symb][q] = (uint32_t *)malloc16(pdsch_dmrs_init_length*sizeof(uint32_t));
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AssertFatal(pdsch_dmrs[slot][symb][q]!=NULL, "NR init: pdsch_dmrs for slot %d symbol %d codeword %d - malloc failed\n", slot, symb, q);
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AssertFatal(pdsch_dmrs[slot][symb][q]!=NULL, "NR init: pdsch_dmrs for slot %d symbol %d nscid %d - malloc failed\n", slot, symb, q);
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}
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}
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}
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nr_init_pdsch_dmrs(gNB, cfg->cell_config.phy_cell_id.value);
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for (int nscid = 0; nscid < NR_NB_NSCID; nscid++) {
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gNB->pdsch_gold_init[nscid] = cfg->cell_config.phy_cell_id.value;
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nr_init_pdsch_dmrs(gNB, nscid, cfg->cell_config.phy_cell_id.value);
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}
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//PUSCH DMRS init
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gNB->nr_gold_pusch_dmrs = (uint32_t ****)malloc16(2*sizeof(uint32_t ***));
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gNB->nr_gold_pusch_dmrs = (uint32_t ****)malloc16(NR_NB_NSCID*sizeof(uint32_t ***));
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uint32_t ****pusch_dmrs = gNB->nr_gold_pusch_dmrs;
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// ceil(((NB_RB*6(k)*2(QPSK)/32) // 3 RE *2(QPSK)
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int pusch_dmrs_init_length = ((fp->N_RB_UL*12)>>5)+1;
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for(int nscid=0; nscid<2; nscid++) {
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for(int nscid=0; nscid<NR_NB_NSCID; nscid++) {
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pusch_dmrs[nscid] = (uint32_t ***)malloc16(fp->slots_per_frame*sizeof(uint32_t **));
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AssertFatal(pusch_dmrs[nscid]!=NULL, "NR init: pusch_dmrs for nscid %d - malloc failed\n", nscid);
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@@ -585,9 +588,10 @@ int phy_init_nr_gNB(PHY_VARS_gNB *gNB,
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}
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}
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uint32_t Nid_pusch[2] = {cfg->cell_config.phy_cell_id.value,cfg->cell_config.phy_cell_id.value};
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LOG_D(PHY,"Initializing PUSCH DMRS Gold sequence with (%x,%x)\n",Nid_pusch[0],Nid_pusch[1]);
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nr_gold_pusch(gNB, &Nid_pusch[0]);
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for (int nscid=0; nscid<NR_NB_NSCID; nscid++) {
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gNB->pusch_gold_init[nscid] = cfg->cell_config.phy_cell_id.value;
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nr_gold_pusch(gNB, nscid, gNB->pusch_gold_init[nscid]);
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}
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//CSI RS init
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gNB->nr_gold_csi_rs = (uint32_t ***)malloc16(fp->slots_per_frame*sizeof(uint32_t **));
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@@ -607,6 +611,7 @@ int phy_init_nr_gNB(PHY_VARS_gNB *gNB,
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}
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}
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gNB->csi_gold_init = cfg->cell_config.phy_cell_id.value;
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nr_init_csi_rs(gNB, cfg->cell_config.phy_cell_id.value);
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for (int id=0; id<NUMBER_OF_NR_SRS_MAX; id++) {
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@@ -644,12 +649,12 @@ int phy_init_nr_gNB(PHY_VARS_gNB *gNB,
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common_vars->beam_id = (uint8_t **)malloc16(Ptx*sizeof(uint8_t*));
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for (i=0;i<Ptx;i++){
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common_vars->txdataF[i] = (int32_t*)malloc16_clear(fp->samples_per_frame_wCP*sizeof(int32_t)); // [hna] samples_per_frame without CP
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LOG_D(PHY,"[INIT] common_vars->txdataF[%d] = %p (%lu bytes)\n",
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i,common_vars->txdataF[i],
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fp->samples_per_frame_wCP*sizeof(int32_t));
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common_vars->beam_id[i] = (uint8_t*)malloc16_clear(fp->symbols_per_slot*fp->slots_per_frame*sizeof(uint8_t));
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memset(common_vars->beam_id[i],255,fp->symbols_per_slot*fp->slots_per_frame);
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common_vars->txdataF[i] = (int32_t*)malloc16_clear(fp->samples_per_frame_wCP*sizeof(int32_t)); // [hna] samples_per_frame without CP
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LOG_D(PHY,"[INIT] common_vars->txdataF[%d] = %p (%lu bytes)\n",
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i,common_vars->txdataF[i],
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fp->samples_per_frame_wCP*sizeof(int32_t));
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common_vars->beam_id[i] = (uint8_t*)malloc16_clear(fp->symbols_per_slot*fp->slots_per_frame*sizeof(uint8_t));
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memset(common_vars->beam_id[i],255,fp->symbols_per_slot*fp->slots_per_frame);
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}
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for (i=0;i<Prx;i++){
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common_vars->rxdataF[i] = (int32_t*)malloc16_clear(fp->samples_per_frame_wCP*sizeof(int32_t));
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@@ -740,10 +745,9 @@ void phy_free_nr_gNB(PHY_VARS_gNB *gNB)
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free_and_zero(pdcch_dmrs);
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uint32_t ****pdsch_dmrs = gNB->nr_gold_pdsch_dmrs;
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int nb_codewords = NR_MAX_NB_LAYERS > 4 ? 2 : 1;
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for (int slot = 0; slot < fp->slots_per_frame; slot++) {
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for (int symb = 0; symb < fp->symbols_per_slot; symb++) {
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for (int q = 0; q < nb_codewords; q++)
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for (int q = 0; q < NR_NB_NSCID; q++)
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free_and_zero(pdsch_dmrs[slot][symb][q]);
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free_and_zero(pdsch_dmrs[slot][symb]);
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}
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@@ -771,7 +775,7 @@ void phy_free_nr_gNB(PHY_VARS_gNB *gNB)
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free_and_zero(csi_rs);
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for (int id = 0; id < NUMBER_OF_NR_SRS_MAX; id++) {
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for (int i = 0; i < Prx; i++){
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for (int i = 0; i < Prx; i++) {
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free_and_zero(gNB->nr_srs_info[id]->srs_received_signal[i]);
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free_and_zero(gNB->nr_srs_info[id]->srs_ls_estimated_channel[i]);
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free_and_zero(gNB->nr_srs_info[id]->srs_estimated_channel_freq[i]);
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@@ -210,18 +210,21 @@ int init_nr_ue_signal(PHY_VARS_NR_UE *ue, int nb_connected_gNB)
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// ceil(((NB_RB*6(k)*2(QPSK)/32) // 3 RE *2(QPSK)
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int pusch_dmrs_init_length = ((fp->N_RB_UL*12)>>5)+1;
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ue->nr_gold_pusch_dmrs = (uint32_t ***)malloc16(fp->slots_per_frame*sizeof(uint32_t **));
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uint32_t ***pusch_dmrs = ue->nr_gold_pusch_dmrs;
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ue->nr_gold_pusch_dmrs = (uint32_t ****)malloc16(fp->slots_per_frame*sizeof(uint32_t ***));
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uint32_t ****pusch_dmrs = ue->nr_gold_pusch_dmrs;
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for (slot=0; slot<fp->slots_per_frame; slot++) {
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pusch_dmrs[slot] = (uint32_t **)malloc16(fp->symbols_per_slot*sizeof(uint32_t *));
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pusch_dmrs[slot] = (uint32_t ***)malloc16(fp->symbols_per_slot*sizeof(uint32_t **));
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AssertFatal(pusch_dmrs[slot]!=NULL, "init_nr_ue_signal: pusch_dmrs for slot %d - malloc failed\n", slot);
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for (symb=0; symb<fp->symbols_per_slot; symb++) {
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pusch_dmrs[slot][symb] = (uint32_t *)malloc16(pusch_dmrs_init_length*sizeof(uint32_t));
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pusch_dmrs[slot][symb] = (uint32_t **)malloc16(NR_NB_NSCID*sizeof(uint32_t *));
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AssertFatal(pusch_dmrs[slot][symb]!=NULL, "init_nr_ue_signal: pusch_dmrs for slot %d symbol %d - malloc failed\n", slot, symb);
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for (int q=0; q<NR_NB_NSCID; q++) {
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pusch_dmrs[slot][symb][q] = (uint32_t *)malloc16(pusch_dmrs_init_length*sizeof(uint32_t));
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AssertFatal(pusch_dmrs[slot][symb][q]!=NULL, "init_nr_ue_signal: pusch_dmrs for slot %d symbol %d nscid %d - malloc failed\n", slot, symb, q);
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}
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}
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}
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@@ -298,14 +301,13 @@ int init_nr_ue_signal(PHY_VARS_NR_UE *ue, int nb_connected_gNB)
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pdsch_dmrs[slot] = (uint32_t ***)malloc16(fp->symbols_per_slot*sizeof(uint32_t **));
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AssertFatal(pdsch_dmrs[slot]!=NULL, "NR init: pdsch_dmrs for slot %d - malloc failed\n", slot);
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int nb_codewords = NR_MAX_NB_LAYERS > 4 ? 2 : 1;
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for (int symb=0; symb<fp->symbols_per_slot; symb++) {
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pdsch_dmrs[slot][symb] = (uint32_t **)malloc16(nb_codewords*sizeof(uint32_t *));
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pdsch_dmrs[slot][symb] = (uint32_t **)malloc16(NR_NB_NSCID*sizeof(uint32_t *));
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AssertFatal(pdsch_dmrs[slot][symb]!=NULL, "NR init: pdsch_dmrs for slot %d symbol %d - malloc failed\n", slot, symb);
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for (int q=0; q<nb_codewords; q++) {
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for (int q=0; q<NR_NB_NSCID; q++) {
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pdsch_dmrs[slot][symb][q] = (uint32_t *)malloc16(pdsch_dmrs_init_length*sizeof(uint32_t));
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AssertFatal(pdsch_dmrs[slot][symb][q]!=NULL, "NR init: pdsch_dmrs for slot %d symbol %d codeword %d - malloc failed\n", slot, symb, q);
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AssertFatal(pdsch_dmrs[slot][symb][q]!=NULL, "NR init: pdsch_dmrs for slot %d symbol %d nscid %d - malloc failed\n", slot, symb, q);
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}
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}
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}
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@@ -424,6 +426,8 @@ void term_nr_ue_signal(PHY_VARS_NR_UE *ue, int nb_connected_gNB)
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for (int slot = 0; slot < fp->slots_per_frame; slot++) {
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for (int symb = 0; symb < fp->symbols_per_slot; symb++) {
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for (int q=0; q<NR_NB_NSCID; q++)
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free_and_zero(ue->nr_gold_pusch_dmrs[slot][symb][q]);
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free_and_zero(ue->nr_gold_pusch_dmrs[slot][symb]);
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}
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free_and_zero(ue->nr_gold_pusch_dmrs[slot]);
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@@ -457,10 +461,9 @@ void term_nr_ue_signal(PHY_VARS_NR_UE *ue, int nb_connected_gNB)
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}
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free_and_zero(ue->nr_gold_pdcch[0]);
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int nb_codewords = NR_MAX_NB_LAYERS > 4 ? 2 : 1;
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for (int slot=0; slot<fp->slots_per_frame; slot++) {
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for (int symb=0; symb<fp->symbols_per_slot; symb++) {
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for (int q=0; q<nb_codewords; q++)
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for (int q=0; q<NR_NB_NSCID; q++)
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free_and_zero(ue->nr_gold_pdsch[0][slot][symb][q]);
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free_and_zero(ue->nr_gold_pdsch[0][slot][symb]);
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}
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@@ -165,6 +165,11 @@ int nr_pusch_channel_estimation(PHY_VARS_gNB *gNB,
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//------------------generate DMRS------------------//
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if(pusch_pdu->ul_dmrs_scrambling_id != gNB->pusch_gold_init[pusch_pdu->scid]) {
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gNB->pusch_gold_init[pusch_pdu->scid] = pusch_pdu->ul_dmrs_scrambling_id;
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nr_gold_pusch(gNB, pusch_pdu->scid, pusch_pdu->ul_dmrs_scrambling_id);
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}
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// transform precoding = 1 means disabled
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if (pusch_pdu->transform_precoding == 1) {
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nr_pusch_dmrs_rx(gNB, Ns, gNB->nr_gold_pusch_dmrs[pusch_pdu->scid][Ns][symbol], &pilot[0], 1000, 0, nb_rb_pusch,
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@@ -1247,4 +1252,4 @@ int nr_srs_channel_estimation(PHY_VARS_gNB *gNB,
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#endif
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return 0;
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}
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}
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@@ -78,57 +78,47 @@ void nr_init_pdcch_dmrs(PHY_VARS_gNB* gNB, uint32_t Nid)
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}
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void nr_init_pdsch_dmrs(PHY_VARS_gNB* gNB, uint32_t Nid)
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{
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void nr_init_pdsch_dmrs(PHY_VARS_gNB* gNB, uint8_t nscid, uint32_t Nid) {
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uint32_t x1, x2;
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uint8_t reset;
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NR_DL_FRAME_PARMS *fp = &gNB->frame_parms;
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uint32_t ****pdsch_dmrs = gNB->nr_gold_pdsch_dmrs;
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int pdsch_dmrs_init_length = ((fp->N_RB_DL*12)>>5)+1;
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int nb_codewords = NR_MAX_NB_LAYERS > 4 ? 2 : 1;
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uint16_t N_n_scid[2]={Nid, Nid};
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uint8_t n_scid=0; // again works only for 1_0
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for (uint8_t slot=0; slot<fp->slots_per_frame; slot++) {
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for (uint8_t symb=0; symb<fp->symbols_per_slot; symb++) {
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reset = 1;
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x2 = ((1<<17) * (fp->symbols_per_slot*slot+symb+1) * ((N_n_scid[n_scid]<<1)+1) +((N_n_scid[n_scid]<<1)+n_scid));
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LOG_D(PHY,"PDSCH DMRS slot %d, symb %d x2 %x, N_n_scid %d,n_scid %d\n",slot,symb,x2,N_n_scid[n_scid],n_scid);
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for (uint32_t n=0; n<pdsch_dmrs_init_length; n++) {
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pdsch_dmrs[slot][symb][0][n] = lte_gold_generic(&x1, &x2, reset);
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reset = 0;
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}
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if(nb_codewords>1)
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memcpy(pdsch_dmrs[slot][symb][1],pdsch_dmrs[slot][symb][0],sizeof(uint32_t)*pdsch_dmrs_init_length);
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reset = 1;
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x2 = ((1<<17) * (fp->symbols_per_slot*slot+symb+1) * ((Nid<<1)+1) +((Nid<<1)+nscid));
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LOG_D(PHY,"PDSCH DMRS slot %d, symb %d x2 %x, Nid %d,nscid %d\n",slot,symb,x2,Nid,nscid);
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for (uint32_t n=0; n<pdsch_dmrs_init_length; n++) {
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pdsch_dmrs[slot][symb][nscid][n] = lte_gold_generic(&x1, &x2, reset);
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reset = 0;
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}
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}
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}
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}
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void nr_gold_pusch(PHY_VARS_gNB* gNB, uint32_t *Nid) {
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void nr_gold_pusch(PHY_VARS_gNB* gNB, int nscid, uint32_t nid) {
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unsigned char ns;
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unsigned int n,x1,x2;
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int nscid, reset;
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unsigned int nid;
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int reset;
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NR_DL_FRAME_PARMS *fp = &gNB->frame_parms;
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unsigned short l;
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int pusch_dmrs_init_length = ((fp->N_RB_UL*12)>>5)+1;
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for (nscid=0; nscid<2; nscid++) {
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nid = Nid[nscid];
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for (ns=0; ns<fp->slots_per_frame; ns++) {
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for (l=0; l<fp->symbols_per_slot; l++) {
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reset = 1;
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x2 = ((1<<17) * (fp->symbols_per_slot*ns+l+1) * ((nid<<1)+1) +((nid<<1)+nscid));
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LOG_D(PHY,"DMRS slot %d, symb %d x2 %x\n",ns,l,x2);
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for (ns=0; ns<fp->slots_per_frame; ns++) {
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for (l=0; l<fp->symbols_per_slot; l++) {
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reset = 1;
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x2 = ((1<<17) * (fp->symbols_per_slot*ns+l+1) * ((nid<<1)+1) +((nid<<1)+nscid));
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LOG_D(PHY,"DMRS slot %d, symb %d x2 %x\n",ns,l,x2);
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for (n=0; n<pusch_dmrs_init_length; n++) {
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gNB->nr_gold_pusch_dmrs[nscid][ns][l][n] = lte_gold_generic(&x1, &x2, reset);
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reset = 0;
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}
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for (n=0; n<pusch_dmrs_init_length; n++) {
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gNB->nr_gold_pusch_dmrs[nscid][ns][l][n] = lte_gold_generic(&x1, &x2, reset);
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reset = 0;
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}
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}
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}
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@@ -76,46 +76,38 @@ void nr_gold_pdcch(PHY_VARS_NR_UE* ue,
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}
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void nr_gold_pdsch(PHY_VARS_NR_UE* ue,
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unsigned short *n_idDMRS)
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{
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int nscid,
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uint32_t nid) {
|
||||
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unsigned int x1,x2,x2tmp0;
|
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unsigned int nid;
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uint8_t reset;
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int pdsch_dmrs_init_length = ((ue->frame_parms.N_RB_DL*12)>>5)+1;
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int nb_codewords = NR_MAX_NB_LAYERS > 4 ? 2 : 1;
|
||||
/// to be updated from higher layer
|
||||
//unsigned short lbar = 0;
|
||||
|
||||
for (int nscid=0; nscid<nb_codewords; nscid++) {
|
||||
for (int ns=0; ns<ue->frame_parms.slots_per_frame; ns++) {
|
||||
for (int ns=0; ns<ue->frame_parms.slots_per_frame; ns++) {
|
||||
|
||||
nid = n_idDMRS[nscid];
|
||||
for (int l=0; l<ue->frame_parms.symbols_per_slot; l++) {
|
||||
|
||||
for (int l=0; l<ue->frame_parms.symbols_per_slot; l++) {
|
||||
reset = 1;
|
||||
x2tmp0 = ((ue->frame_parms.symbols_per_slot*ns+l+1)*((nid<<1)+1))<<17;
|
||||
x2 = (x2tmp0+(nid<<1)+nscid)%(1U<<31); //cinit
|
||||
LOG_D(PHY,"UE DMRS slot %d, symb %d, x2 %x, nscid %d\n",ns,l,x2,nscid);
|
||||
|
||||
reset = 1;
|
||||
x2tmp0 = ((ue->frame_parms.symbols_per_slot*ns+l+1)*((nid<<1)+1))<<17;
|
||||
x2 = (x2tmp0+(nid<<1)+nscid)%(1U<<31); //cinit
|
||||
LOG_D(PHY,"UE DMRS slot %d, symb %d, x2 %x, nscid %d\n",ns,l,x2,nscid);
|
||||
|
||||
for (int n=0; n<pdsch_dmrs_init_length; n++) {
|
||||
ue->nr_gold_pdsch[0][ns][l][nscid][n] = lte_gold_generic(&x1, &x2, reset);
|
||||
reset = 0;
|
||||
}
|
||||
for (int n=0; n<pdsch_dmrs_init_length; n++) {
|
||||
ue->nr_gold_pdsch[0][ns][l][nscid][n] = lte_gold_generic(&x1, &x2, reset);
|
||||
reset = 0;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
void nr_init_pusch_dmrs(PHY_VARS_NR_UE* ue,
|
||||
uint16_t *N_n_scid,
|
||||
uint16_t N_n_scid,
|
||||
uint8_t n_scid)
|
||||
{
|
||||
uint32_t x1, x2, n;
|
||||
uint8_t reset, slot, symb;
|
||||
NR_DL_FRAME_PARMS *fp = &ue->frame_parms;
|
||||
uint32_t ***pusch_dmrs = ue->nr_gold_pusch_dmrs;
|
||||
uint32_t ****pusch_dmrs = ue->nr_gold_pusch_dmrs;
|
||||
int pusch_dmrs_init_length = ((fp->N_RB_UL*12)>>5)+1;
|
||||
|
||||
for (slot=0; slot<fp->slots_per_frame; slot++) {
|
||||
@@ -123,10 +115,10 @@ void nr_init_pusch_dmrs(PHY_VARS_NR_UE* ue,
|
||||
for (symb=0; symb<fp->symbols_per_slot; symb++) {
|
||||
|
||||
reset = 1;
|
||||
x2 = ((1<<17) * (fp->symbols_per_slot*slot+symb+1) * ((N_n_scid[n_scid]<<1)+1) +((N_n_scid[n_scid]<<1)+n_scid));
|
||||
|
||||
x2 = ((1<<17) * (fp->symbols_per_slot*slot+symb+1) * ((N_n_scid<<1)+1) +((N_n_scid<<1)+n_scid));
|
||||
LOG_D(PHY,"DMRS slot %d, symb %d x2 %x\n",slot,symb,x2);
|
||||
for (n=0; n<pusch_dmrs_init_length; n++) {
|
||||
pusch_dmrs[slot][symb][n] = lte_gold_generic(&x1, &x2, reset);
|
||||
pusch_dmrs[slot][symb][n_scid][n] = lte_gold_generic(&x1, &x2, reset);
|
||||
reset = 0;
|
||||
}
|
||||
}
|
||||
|
||||
@@ -37,10 +37,10 @@ void nr_init_pbch_dmrs(PHY_VARS_gNB* gNB);
|
||||
@param Nid is used for the initialization of x2, Physical cell Id by default or upper layer configured pdcch_scrambling_ID
|
||||
*/
|
||||
void nr_init_pdcch_dmrs(PHY_VARS_gNB* gNB, uint32_t Nid);
|
||||
void nr_init_pdsch_dmrs(PHY_VARS_gNB* gNB, uint32_t Nid);
|
||||
void nr_init_pdsch_dmrs(PHY_VARS_gNB* gNB, uint8_t nscid, uint32_t Nid);
|
||||
void nr_init_csi_rs(PHY_VARS_gNB* gNB, uint32_t Nid);
|
||||
|
||||
void nr_gold_pusch(PHY_VARS_gNB* gNB, uint32_t *Nid);
|
||||
void nr_gold_pusch(PHY_VARS_gNB* gNB, int nscid, uint32_t nid);
|
||||
|
||||
int nr_pusch_dmrs_rx(PHY_VARS_gNB *gNB,
|
||||
unsigned int Ns,
|
||||
|
||||
@@ -61,10 +61,11 @@ void nr_gold_pdcch(PHY_VARS_NR_UE* ue,
|
||||
unsigned short n_idDMRS);
|
||||
|
||||
void nr_gold_pdsch(PHY_VARS_NR_UE* ue,
|
||||
unsigned short *n_idDMRS);
|
||||
int nscid,
|
||||
uint32_t nid);
|
||||
|
||||
void nr_init_pusch_dmrs(PHY_VARS_NR_UE* ue,
|
||||
uint16_t *N_n_scid,
|
||||
uint16_t N_n_scid,
|
||||
uint8_t n_scid);
|
||||
|
||||
#endif
|
||||
|
||||
@@ -30,7 +30,6 @@
|
||||
void nr_generate_csi_rs(PHY_VARS_gNB *gNB,
|
||||
int16_t amp,
|
||||
nfapi_nr_dl_tti_csi_rs_pdu_rel15_t csi_params,
|
||||
uint16_t cell_id,
|
||||
int slot){
|
||||
|
||||
NR_DL_FRAME_PARMS frame_parms=gNB->frame_parms;
|
||||
@@ -52,20 +51,10 @@ void nr_generate_csi_rs(PHY_VARS_gNB *gNB,
|
||||
|
||||
AssertFatal(b!=0, "Invalid CSI frequency domain mapping: no bit selected in bitmap\n");
|
||||
|
||||
// pre-computed for scrambling id equel to cell id
|
||||
// if the scrambling id is not the cell id we need to re-initialize the rs
|
||||
if (csi_params.scramb_id != cell_id) {
|
||||
uint8_t reset;
|
||||
uint32_t x1, x2;
|
||||
uint32_t Nid = csi_params.scramb_id;
|
||||
for (uint8_t symb=0; symb<frame_parms.symbols_per_slot; symb++) {
|
||||
reset = 1;
|
||||
x2 = ((1<<10) * (frame_parms.symbols_per_slot*slot+symb+1) * ((Nid<<1)+1) + (Nid));
|
||||
for (uint32_t n=0; n<(csi_rs_length>>5)+1; n++) {
|
||||
gold_csi_rs[symb][n] = lte_gold_generic(&x1, &x2, reset);
|
||||
reset = 0;
|
||||
}
|
||||
}
|
||||
// if the scrambling id is not the one previously used to initialize we need to re-initialize the rs
|
||||
if (csi_params.scramb_id != gNB->csi_gold_init) {
|
||||
gNB->csi_gold_init = csi_params.scramb_id;
|
||||
nr_init_csi_rs(gNB, csi_params.scramb_id);
|
||||
}
|
||||
|
||||
switch (csi_params.row) {
|
||||
|
||||
@@ -66,11 +66,12 @@ void nr_pdcch_scrambling(uint32_t *in,
|
||||
}
|
||||
}
|
||||
|
||||
void nr_generate_dci(nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15,
|
||||
uint32_t **gold_pdcch_dmrs,
|
||||
void nr_generate_dci(PHY_VARS_gNB *gNB,
|
||||
nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15,
|
||||
int32_t *txdataF,
|
||||
int16_t amp,
|
||||
NR_DL_FRAME_PARMS *frame_parms) {
|
||||
NR_DL_FRAME_PARMS *frame_parms,
|
||||
int slot) {
|
||||
|
||||
int16_t mod_dmrs[NR_MAX_CSET_DURATION][NR_MAX_PDCCH_DMRS_LENGTH>>1] __attribute__((aligned(16))); // 3 for the max coreset duration
|
||||
uint16_t cset_start_sc;
|
||||
@@ -81,7 +82,7 @@ void nr_generate_dci(nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15,
|
||||
|
||||
int rb_offset;
|
||||
int n_rb;
|
||||
|
||||
|
||||
// compute rb_offset and n_prb based on frequency allocation
|
||||
nr_cce_t cce_list[MAX_DCI_CORESET][NR_MAX_PDCCH_AGG_LEVEL];
|
||||
nr_fill_cce_list(cce_list,0,pdcch_pdu_rel15);
|
||||
@@ -95,6 +96,13 @@ void nr_generate_dci(nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15,
|
||||
* in time: by its first slot and its first symbol*/
|
||||
const nfapi_nr_dl_dci_pdu_t *dci_pdu = &pdcch_pdu_rel15->dci_pdu[d];
|
||||
|
||||
if(dci_pdu->ScramblingId != gNB->pdcch_gold_init) {
|
||||
gNB->pdcch_gold_init = dci_pdu->ScramblingId;
|
||||
nr_init_pdcch_dmrs(gNB, dci_pdu->ScramblingId);
|
||||
}
|
||||
|
||||
uint32_t **gold_pdcch_dmrs = gNB->nr_gold_pdcch_dmrs[slot];
|
||||
|
||||
cset_start_symb = pdcch_pdu_rel15->StartSymbolIndex;
|
||||
cset_nsymb = pdcch_pdu_rel15->DurationSymbols;
|
||||
dci_idx = 0;
|
||||
@@ -104,8 +112,8 @@ void nr_generate_dci(nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15,
|
||||
uint32_t dmrs_length = n_rb*6; //2(QPSK)*3(per RB)*6(REG per CCE)
|
||||
uint32_t encoded_length = dci_pdu->AggregationLevel*108; //2(QPSK)*9(per RB)*6(REG per CCE)
|
||||
LOG_D(PHY, "DL_DCI : rb_offset %d, nb_rb %d, DMRS length per symbol %d\t DCI encoded length %d (precoder_granularity %d,reg_mapping %d),Scrambling_Id %d,ScramblingRNTI %x,PayloadSizeBits %d\n",
|
||||
rb_offset, n_rb,dmrs_length, encoded_length,pdcch_pdu_rel15->precoderGranularity,pdcch_pdu_rel15->CceRegMappingType,
|
||||
dci_pdu->ScramblingId,dci_pdu->ScramblingRNTI,dci_pdu->PayloadSizeBits);
|
||||
rb_offset, n_rb,dmrs_length, encoded_length,pdcch_pdu_rel15->precoderGranularity,pdcch_pdu_rel15->CceRegMappingType,
|
||||
dci_pdu->ScramblingId,dci_pdu->ScramblingRNTI,dci_pdu->PayloadSizeBits);
|
||||
dmrs_length += rb_offset*6; // To accommodate more DMRS symbols in case of rb offset
|
||||
|
||||
/// DMRS QPSK modulation
|
||||
@@ -115,10 +123,10 @@ void nr_generate_dci(nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15,
|
||||
|
||||
#ifdef DEBUG_PDCCH_DMRS
|
||||
if(dci_pdu->RNTI!=0xFFFF) {
|
||||
for (int i=0; i<dmrs_length>>1; i++)
|
||||
printf("symb %d i %d %p gold seq 0x%08x mod_dmrs %d %d\n", symb, i,
|
||||
&gold_pdcch_dmrs[symb][i>>5],gold_pdcch_dmrs[symb][i>>5], mod_dmrs[symb][i<<1], mod_dmrs[symb][(i<<1)+1] );
|
||||
}
|
||||
for (int i=0; i<dmrs_length>>1; i++)
|
||||
printf("symb %d i %d %p gold seq 0x%08x mod_dmrs %d %d\n", symb, i,
|
||||
&gold_pdcch_dmrs[symb][i>>5],gold_pdcch_dmrs[symb][i>>5], mod_dmrs[symb][i<<1], mod_dmrs[symb][(i<<1)+1] );
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
@@ -248,15 +256,16 @@ void nr_generate_dci(nfapi_nr_dl_tti_pdcch_pdu_rel15_t *pdcch_pdu_rel15,
|
||||
}
|
||||
|
||||
void nr_generate_dci_top(processingData_L1tx_t *msgTx,
|
||||
uint32_t **gold_pdcch_dmrs,
|
||||
int slot,
|
||||
int32_t *txdataF,
|
||||
int16_t amp,
|
||||
NR_DL_FRAME_PARMS *frame_parms) {
|
||||
|
||||
|
||||
for (int i=0; i<msgTx->num_ul_pdcch; i++)
|
||||
nr_generate_dci(&msgTx->ul_pdcch_pdu[i].pdcch_pdu.pdcch_pdu_rel15,gold_pdcch_dmrs,txdataF,amp,frame_parms);
|
||||
nr_generate_dci(msgTx->gNB,&msgTx->ul_pdcch_pdu[i].pdcch_pdu.pdcch_pdu_rel15,txdataF,amp,frame_parms,slot);
|
||||
for (int i=0; i<msgTx->num_dl_pdcch; i++)
|
||||
nr_generate_dci(&msgTx->pdcch_pdu[i].pdcch_pdu_rel15,gold_pdcch_dmrs,txdataF,amp,frame_parms);
|
||||
nr_generate_dci(msgTx->gNB,&msgTx->pdcch_pdu[i].pdcch_pdu_rel15,txdataF,amp,frame_parms,slot);
|
||||
|
||||
}
|
||||
|
||||
|
||||
@@ -30,7 +30,7 @@ uint16_t nr_get_dci_size(nfapi_nr_dci_format_e format,
|
||||
uint16_t N_RB);
|
||||
|
||||
void nr_generate_dci_top(processingData_L1tx_t *msgTx,
|
||||
uint32_t **gold_pdcch_dmrs,
|
||||
int slot,
|
||||
int32_t *txdataF,
|
||||
int16_t amp,
|
||||
NR_DL_FRAME_PARMS *frame_parms);
|
||||
|
||||
@@ -58,7 +58,6 @@ void nr_generate_pdsch(processingData_L1tx_t *msgTx,
|
||||
|
||||
PHY_VARS_gNB *gNB = msgTx->gNB;
|
||||
NR_gNB_DLSCH_t *dlsch;
|
||||
uint32_t ***pdsch_dmrs = gNB->nr_gold_pdsch_dmrs[slot];
|
||||
int32_t** txdataF = gNB->common_vars.txdataF;
|
||||
int16_t amp = AMP;
|
||||
int xOverhead = 0;
|
||||
@@ -93,6 +92,12 @@ void nr_generate_pdsch(processingData_L1tx_t *msgTx,
|
||||
}
|
||||
n_dmrs = (rel15->BWPStart+rel15->rbStart+rel15->rbSize)*nb_re_dmrs;
|
||||
|
||||
if(rel15->dlDmrsScramblingId != gNB->pdsch_gold_init[rel15->SCID]) {
|
||||
gNB->pdsch_gold_init[rel15->SCID] = rel15->dlDmrsScramblingId;
|
||||
nr_init_pdsch_dmrs(gNB, rel15->SCID, rel15->dlDmrsScramblingId);
|
||||
}
|
||||
|
||||
uint32_t ***pdsch_dmrs = gNB->nr_gold_pdsch_dmrs[slot];
|
||||
uint16_t dmrs_symbol_map = rel15->dlDmrsSymbPos;//single DMRS: 010000100 Double DMRS 110001100
|
||||
uint8_t dmrs_len = get_num_dmrs(rel15->dlDmrsSymbPos);
|
||||
uint16_t nb_re = ((12*rel15->NrOfSymbols)-nb_re_dmrs*dmrs_len-xOverhead)*rel15->rbSize*rel15->nrOfLayers;
|
||||
@@ -275,7 +280,7 @@ void nr_generate_pdsch(processingData_L1tx_t *msgTx,
|
||||
l_prime = 0;
|
||||
}
|
||||
/// DMRS QPSK modulation
|
||||
nr_modulation(pdsch_dmrs[l][0], n_dmrs*2, DMRS_MOD_ORDER, mod_dmrs); // currently only codeword 0 is modulated. Qm = 2 as DMRS is QPSK modulated
|
||||
nr_modulation(pdsch_dmrs[l][rel15->SCID], n_dmrs*2, DMRS_MOD_ORDER, mod_dmrs); // Qm = 2 as DMRS is QPSK modulated
|
||||
|
||||
#ifdef DEBUG_DLSCH
|
||||
printf("DMRS modulation (symbol %d, %d symbols, type %d):\n", l, n_dmrs, dmrs_Type);
|
||||
@@ -296,7 +301,7 @@ void nr_generate_pdsch(processingData_L1tx_t *msgTx,
|
||||
if(ptrs_symbol) {
|
||||
/* PTRS QPSK Modulation for each OFDM symbol in a slot */
|
||||
LOG_D(PHY,"Doing ptrs modulation for symbol %d, n_ptrs %d\n",l,n_ptrs);
|
||||
nr_modulation(pdsch_dmrs[l][0], (n_ptrs<<1), DMRS_MOD_ORDER, mod_ptrs);
|
||||
nr_modulation(pdsch_dmrs[l][rel15->SCID], (n_ptrs<<1), DMRS_MOD_ORDER, mod_ptrs);
|
||||
}
|
||||
}
|
||||
uint16_t k = start_sc;
|
||||
|
||||
@@ -338,7 +338,6 @@ uint8_t get_nr_prach_duration(uint8_t prach_format);
|
||||
void nr_generate_csi_rs(PHY_VARS_gNB *gNB,
|
||||
int16_t amp,
|
||||
nfapi_nr_dl_tti_csi_rs_pdu_rel15_t csi_params,
|
||||
uint16_t cell_id,
|
||||
int slot);
|
||||
|
||||
void free_nr_prach_entry(PHY_VARS_gNB *gNB, int prach_id);
|
||||
|
||||
@@ -466,6 +466,7 @@ int nr_pdcch_channel_estimation(PHY_VARS_NR_UE *ue,
|
||||
uint8_t gNB_id,
|
||||
unsigned char Ns,
|
||||
unsigned char symbol,
|
||||
unsigned short scrambling_id,
|
||||
unsigned short coreset_start_subcarrier,
|
||||
unsigned short nb_rb_coreset)
|
||||
{
|
||||
@@ -493,13 +494,11 @@ int nr_pdcch_channel_estimation(PHY_VARS_NR_UE *ue,
|
||||
fm = filt16a_m1;
|
||||
fr = filt16a_r1;
|
||||
|
||||
|
||||
// checking if re-initialization of scrambling IDs is needed (should be done here but scrambling ID for PDCCH is not taken from RRC)
|
||||
/* if (( != ue->scramblingID_pdcch){
|
||||
ue->scramblingID_pdcch=;
|
||||
nr_gold_pdsch(ue,ue->scramblingID_pdcch);
|
||||
}*/
|
||||
|
||||
if (scrambling_id != ue->scramblingID_pdcch){
|
||||
ue->scramblingID_pdcch = scrambling_id;
|
||||
nr_gold_pdcch(ue,ue->scramblingID_pdcch);
|
||||
}
|
||||
|
||||
// generate pilot
|
||||
int pilot[nb_rb_coreset * 3] __attribute__((aligned(16)));
|
||||
@@ -666,6 +665,8 @@ int nr_pdsch_channel_estimation(PHY_VARS_NR_UE *ue,
|
||||
unsigned char Ns,
|
||||
unsigned short p,
|
||||
unsigned char symbol,
|
||||
unsigned char nscid,
|
||||
unsigned short scrambling_id,
|
||||
unsigned short BWPStart,
|
||||
uint8_t config_type,
|
||||
unsigned short bwp_start_subcarrier,
|
||||
@@ -703,11 +704,10 @@ int nr_pdsch_channel_estimation(PHY_VARS_NR_UE *ue,
|
||||
int8_t delta = get_delta(p, config_type);
|
||||
|
||||
// checking if re-initialization of scrambling IDs is needed
|
||||
/*if ((XXX.scramblingID0 != ue->scramblingID[0]) || (XXX.scramblingID1 != ue->scramblingID[1])){
|
||||
ue->scramblingID[0] = XXX.scramblingID0;
|
||||
ue->scramblingID[1] = XXX.scramblingID1;
|
||||
nr_gold_pdsch(ue,ue->scramblingID);
|
||||
}*/
|
||||
if (scrambling_id != ue->scramblingID_dlsch[nscid]){
|
||||
ue->scramblingID_dlsch[nscid] = scrambling_id;
|
||||
nr_gold_pdsch(ue, nscid, scrambling_id);
|
||||
}
|
||||
|
||||
nr_pdsch_dmrs_rx(ue, Ns, ue->nr_gold_pdsch[gNB_id][Ns][symbol][0], &pilot[0], 1000+p, 0, nb_rb_pdsch+rb_offset, config_type);
|
||||
|
||||
|
||||
@@ -44,6 +44,7 @@ int nr_pdcch_channel_estimation(PHY_VARS_NR_UE *ue,
|
||||
uint8_t gNB_id,
|
||||
unsigned char Ns,
|
||||
unsigned char symbol,
|
||||
unsigned short scrambling_id,
|
||||
unsigned short coreset_start_subcarrier,
|
||||
unsigned short nb_rb_coreset);
|
||||
|
||||
@@ -74,6 +75,8 @@ int nr_pdsch_channel_estimation(PHY_VARS_NR_UE *ue,
|
||||
unsigned char Ns,
|
||||
unsigned short p,
|
||||
unsigned char symbol,
|
||||
unsigned char nscid,
|
||||
unsigned short scrambling_id,
|
||||
unsigned short BWPStart,
|
||||
uint8_t config_type,
|
||||
unsigned short bwp_start_subcarrier,
|
||||
|
||||
@@ -352,15 +352,17 @@ int nr_initial_sync(UE_nr_rxtx_proc_t *proc,
|
||||
nr_gold_pdcch(ue,fp->Nid_cell);
|
||||
|
||||
// compute the scrambling IDs for PDSCH DMRS
|
||||
for (int i=0; i<2; i++)
|
||||
ue->scramblingID[i]=fp->Nid_cell;
|
||||
|
||||
nr_gold_pdsch(ue,ue->scramblingID);
|
||||
for (int i=0; i<NR_NB_NSCID; i++) {
|
||||
ue->scramblingID_dlsch[i]=fp->Nid_cell;
|
||||
nr_gold_pdsch(ue, i, ue->scramblingID_dlsch[i]);
|
||||
}
|
||||
|
||||
// initialize the pusch dmrs
|
||||
uint16_t N_n_scid[2] = {fp->Nid_cell,fp->Nid_cell};
|
||||
int n_scid = 0; // This quantity is indicated by higher layer parameter dmrs-SeqInitialization
|
||||
nr_init_pusch_dmrs(ue, N_n_scid, n_scid);
|
||||
for (int i=0; i<NR_NB_NSCID; i++) {
|
||||
ue->scramblingID_ulsch[i]=fp->Nid_cell;
|
||||
nr_init_pusch_dmrs(ue, ue->scramblingID_ulsch[i], i);
|
||||
}
|
||||
|
||||
|
||||
// we also need to take into account the shift by samples_per_frame in case the if is true
|
||||
if (ue->ssb_offset < sync_pos_frame){
|
||||
@@ -551,6 +553,7 @@ int nr_initial_sync(UE_nr_rxtx_proc_t *proc,
|
||||
0,
|
||||
pdcch_vars->slot,
|
||||
l,
|
||||
fp->Nid_cell,
|
||||
fp->first_carrier_offset+(pdcch_vars->pdcch_config[n_ss].BWPStart + coreset_start_rb)*12,
|
||||
coreset_nb_rb);
|
||||
|
||||
|
||||
@@ -259,6 +259,8 @@ typedef struct {
|
||||
uint16_t ptrs_symbols;
|
||||
// PTRS symbol index, to be updated every PTRS symbol within a slot.
|
||||
uint8_t ptrs_symbol_index;
|
||||
uint8_t nscid;
|
||||
uint16_t dlDmrsScramblingId;
|
||||
/// PDU BITMAP
|
||||
uint16_t pduBitmap;
|
||||
} NR_DL_UE_HARQ_t;
|
||||
|
||||
@@ -32,6 +32,7 @@
|
||||
#include <stdint.h>
|
||||
#include "PHY/NR_REFSIG/dmrs_nr.h"
|
||||
#include "PHY/NR_REFSIG/ptrs_nr.h"
|
||||
#include "PHY/NR_REFSIG/refsig_defs_ue.h"
|
||||
#include "PHY/NR_UE_TRANSPORT/nr_transport_ue.h"
|
||||
#include "PHY/NR_UE_TRANSPORT/nr_transport_proto_ue.h"
|
||||
#include "PHY/MODULATION/nr_modulation.h"
|
||||
@@ -215,9 +216,16 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
|
||||
|
||||
/////////////////////////DMRS Modulation/////////////////////////
|
||||
///////////
|
||||
uint32_t **pusch_dmrs = UE->nr_gold_pusch_dmrs[slot];
|
||||
|
||||
if(pusch_pdu->ul_dmrs_scrambling_id != UE->scramblingID_ulsch[pusch_pdu->scid]) {
|
||||
UE->scramblingID_ulsch[pusch_pdu->scid] = pusch_pdu->ul_dmrs_scrambling_id;
|
||||
nr_init_pusch_dmrs(UE, pusch_pdu->scid, pusch_pdu->ul_dmrs_scrambling_id);
|
||||
}
|
||||
|
||||
uint32_t ***pusch_dmrs = UE->nr_gold_pusch_dmrs[slot];
|
||||
uint16_t n_dmrs = (pusch_pdu->bwp_start + start_rb + nb_rb)*((dmrs_type == pusch_dmrs_type1) ? 6:4);
|
||||
int16_t mod_dmrs[n_dmrs<<1] __attribute((aligned(16)));
|
||||
|
||||
///////////
|
||||
////////////////////////////////////////////////////////////////////////
|
||||
|
||||
@@ -382,7 +390,7 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
|
||||
// TODO: performance improvement, we can skip the modulation of DMRS symbols outside the bandwidth part
|
||||
// Perform this on gold sequence, not required when SC FDMA operation is done,
|
||||
LOG_D(PHY,"DMRS in symbol %d\n",l);
|
||||
nr_modulation(pusch_dmrs[l], n_dmrs*2, DMRS_MOD_ORDER, mod_dmrs); // Qm = 2 as DMRS is QPSK modulated
|
||||
nr_modulation(pusch_dmrs[l][pusch_pdu->scid], n_dmrs*2, DMRS_MOD_ORDER, mod_dmrs); // currently only codeword 0 is modulated. Qm = 2 as DMRS is QPSK modulated
|
||||
} else {
|
||||
dmrs_idx = 0;
|
||||
}
|
||||
@@ -392,7 +400,7 @@ void nr_ue_ulsch_procedures(PHY_VARS_NR_UE *UE,
|
||||
|
||||
if(is_ptrs_symbol(l, ulsch_ue->ptrs_symbols)) {
|
||||
is_ptrs_sym = 1;
|
||||
nr_modulation(pusch_dmrs[l], nb_rb, DMRS_MOD_ORDER, mod_ptrs);
|
||||
nr_modulation(pusch_dmrs[l][pusch_pdu->scid], nb_rb, DMRS_MOD_ORDER, mod_ptrs);
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
@@ -850,9 +850,15 @@ typedef struct PHY_VARS_gNB_s {
|
||||
/// counter to average prach energh over first 100 prach opportunities
|
||||
int prach_energy_counter;
|
||||
|
||||
int csi_gold_init;
|
||||
int pdcch_gold_init;
|
||||
int pdsch_gold_init[2];
|
||||
int pusch_gold_init[2];
|
||||
|
||||
int ap_N1;
|
||||
int ap_N2;
|
||||
int ap_XP;
|
||||
|
||||
int pucch0_thres;
|
||||
int pusch_thres;
|
||||
int prach_thres;
|
||||
|
||||
@@ -789,7 +789,10 @@ typedef struct {
|
||||
uint32_t ****nr_gold_pdsch[NUMBER_OF_CONNECTED_eNB_MAX];
|
||||
|
||||
// Scrambling IDs used in PDSCH DMRS
|
||||
uint16_t scramblingID[2];
|
||||
uint16_t scramblingID_dlsch[2];
|
||||
|
||||
// Scrambling IDs used in PUSCH DMRS
|
||||
uint16_t scramblingID_ulsch[2];
|
||||
|
||||
/// PDCCH DMRS
|
||||
uint32_t ***nr_gold_pdcch[NUMBER_OF_CONNECTED_eNB_MAX];
|
||||
@@ -798,7 +801,7 @@ typedef struct {
|
||||
uint16_t scramblingID_pdcch;
|
||||
|
||||
/// PUSCH DMRS sequence
|
||||
uint32_t ***nr_gold_pusch_dmrs;
|
||||
uint32_t ****nr_gold_pusch_dmrs;
|
||||
|
||||
uint32_t X_u[64][839];
|
||||
|
||||
|
||||
@@ -94,6 +94,8 @@
|
||||
#define NR_RX_NB_TH 1
|
||||
#define NR_NB_TH_SLOT 2
|
||||
|
||||
#define NR_NB_NSCID 2
|
||||
|
||||
extern const uint8_t nr_rv_round_map[4];
|
||||
|
||||
static inline
|
||||
|
||||
@@ -158,8 +158,7 @@ void phy_procedures_gNB_TX(processingData_L1tx_t *msgTx,
|
||||
|
||||
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_gNB_PDCCH_TX,1);
|
||||
|
||||
nr_generate_dci_top(msgTx,
|
||||
gNB->nr_gold_pdcch_dmrs[slot],
|
||||
nr_generate_dci_top(msgTx, slot,
|
||||
&gNB->common_vars.txdataF[0][txdataF_offset],
|
||||
AMP, fp);
|
||||
|
||||
@@ -178,7 +177,7 @@ void phy_procedures_gNB_TX(processingData_L1tx_t *msgTx,
|
||||
if (csirs->active == 1) {
|
||||
LOG_D(PHY, "CSI-RS generation started in frame %d.%d\n",frame,slot);
|
||||
nfapi_nr_dl_tti_csi_rs_pdu_rel15_t csi_params = csirs->csirs_pdu.csi_rs_pdu_rel15;
|
||||
nr_generate_csi_rs(gNB, AMP, csi_params, gNB->gNB_config.cell_config.phy_cell_id.value, slot);
|
||||
nr_generate_csi_rs(gNB, AMP, csi_params, slot);
|
||||
csirs->active = 0;
|
||||
}
|
||||
}
|
||||
|
||||
@@ -315,6 +315,8 @@ void configure_dlsch(NR_UE_DLSCH_t *dlsch0,
|
||||
dlsch0_harq->mcs = dlsch_config_pdu->mcs;
|
||||
dlsch0_harq->rvidx = dlsch_config_pdu->rv;
|
||||
dlsch0->g_pucch = dlsch_config_pdu->accumulated_delta_PUCCH;
|
||||
dlsch0_harq->nscid = dlsch_config_pdu->nscid;
|
||||
dlsch0_harq->dlDmrsScramblingId = dlsch_config_pdu->dlDmrsScramblingId;
|
||||
//get nrOfLayers from DCI info
|
||||
uint8_t Nl = 0;
|
||||
for (int i = 0; i < 12; i++) { // max 12 ports
|
||||
|
||||
@@ -580,6 +580,8 @@ int nr_ue_pdsch_procedures(PHY_VARS_NR_UE *ue, UE_nr_rxtx_proc_t *proc, int gNB_
|
||||
nr_slot_rx,
|
||||
get_dmrs_port(aatx,dlsch0_harq->dmrs_ports),
|
||||
m,
|
||||
dlsch0_harq->nscid,
|
||||
dlsch0_harq->dlDmrsScramblingId,
|
||||
BWPStart,
|
||||
dlsch0_harq->dmrsConfigType,
|
||||
ue->frame_parms.first_carrier_offset+(BWPStart + pdsch_start_rb)*12,
|
||||
@@ -1482,6 +1484,7 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,
|
||||
gNB_id,
|
||||
nr_slot_rx,
|
||||
l,
|
||||
pdcch_vars->pdcch_config[n_ss].coreset.pdcch_dmrs_scrambling_id,
|
||||
fp->first_carrier_offset+(pdcch_vars->pdcch_config[n_ss].BWPStart + coreset_start_rb)*12,
|
||||
coreset_nb_rb);
|
||||
|
||||
|
||||
@@ -961,10 +961,10 @@ int main(int argc, char **argv)
|
||||
nr_gold_pdcch(UE, frame_parms->Nid_cell);
|
||||
|
||||
// compute the scrambling IDs for PDSCH DMRS
|
||||
for (int i = 0; i < 2; i++)
|
||||
UE->scramblingID[i] = frame_parms->Nid_cell;
|
||||
|
||||
nr_gold_pdsch(UE, UE->scramblingID);
|
||||
for (int i = 0; i < 2; i++) {
|
||||
UE->scramblingID_dlsch[i] = frame_parms->Nid_cell;
|
||||
nr_gold_pdsch(UE, i, UE->scramblingID_dlsch[i]);
|
||||
}
|
||||
|
||||
nr_l2_init_ue(NULL);
|
||||
UE_mac = get_mac_inst(0);
|
||||
|
||||
@@ -782,10 +782,10 @@ int main(int argc, char **argv)
|
||||
|
||||
init_nr_ue_transport(UE);
|
||||
|
||||
// initialize the pusch dmrs
|
||||
uint16_t N_n_scid[2] = {frame_parms->Nid_cell,frame_parms->Nid_cell};
|
||||
int n_scid = 0; // This quantity is indicated by higher layer parameter dmrs-SeqInitialization
|
||||
nr_init_pusch_dmrs(UE, N_n_scid, n_scid);
|
||||
for(int n_scid = 0; n_scid<2; n_scid++) {
|
||||
UE->scramblingID_ulsch[n_scid] = frame_parms->Nid_cell;
|
||||
nr_init_pusch_dmrs(UE, frame_parms->Nid_cell, n_scid);
|
||||
}
|
||||
|
||||
//Configure UE
|
||||
NR_UE_RRC_INST_t rrcue;
|
||||
|
||||
@@ -281,7 +281,6 @@ int get_rnti_type(NR_UE_MAC_INST_t *mac, uint16_t rnti){
|
||||
LOG_D(MAC, "In %s: returning rnti_type %s \n", __FUNCTION__, rnti_types[rnti_type]);
|
||||
|
||||
return rnti_type;
|
||||
|
||||
}
|
||||
|
||||
|
||||
@@ -874,14 +873,26 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
|
||||
if(pdsch_TimeDomainAllocationList && rnti!=SI_RNTI)
|
||||
mappingtype = pdsch_TimeDomainAllocationList->list.array[dci->time_domain_assignment.val]->mappingType;
|
||||
|
||||
struct NR_DMRS_DownlinkConfig *dl_dmrs_config = NULL;
|
||||
if(mac->DLbwp[0])
|
||||
dl_dmrs_config = (mappingtype == typeA) ?
|
||||
mac->DLbwp[0]->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup :
|
||||
mac->DLbwp[0]->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeB->choice.setup;
|
||||
|
||||
dlsch_config_pdu_1_0->nscid = 0;
|
||||
if(dl_dmrs_config && dl_dmrs_config->scramblingID0)
|
||||
dlsch_config_pdu_1_0->dlDmrsScramblingId = *dl_dmrs_config->scramblingID0;
|
||||
else
|
||||
dlsch_config_pdu_1_0->dlDmrsScramblingId = mac->physCellId;
|
||||
|
||||
/* dmrs symbol positions*/
|
||||
dlsch_config_pdu_1_0->dlDmrsSymbPos = fill_dmrs_mask(pdsch_config,
|
||||
(get_softmodem_params()->nsa) ? mac->scc->dmrs_TypeA_Position : mac->mib->dmrs_TypeA_Position,
|
||||
dlsch_config_pdu_1_0->number_symbols,
|
||||
dlsch_config_pdu_1_0->start_symbol,
|
||||
mappingtype, 1);
|
||||
dlsch_config_pdu_1_0->dmrsConfigType = (mac->DLbwp[0] != NULL) ?
|
||||
(mac->DLbwp[0]->bwp_Dedicated->pdsch_Config->choice.setup->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->dmrs_Type == NULL ? 0 : 1) : 0;
|
||||
dlsch_config_pdu_1_0->dmrsConfigType = (dl_dmrs_config != NULL) ?
|
||||
(dl_dmrs_config->dmrs_Type == NULL ? 0 : 1) : 0;
|
||||
|
||||
/* number of DM-RS CDM groups without data according to subclause 5.1.6.2 of 3GPP TS 38.214 version 15.9.0 Release 15 */
|
||||
if (dlsch_config_pdu_1_0->number_symbols == 2)
|
||||
@@ -1075,7 +1086,30 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
|
||||
if(pdsch_TimeDomainAllocationList)
|
||||
mappingtype = pdsch_TimeDomainAllocationList->list.array[dci->time_domain_assignment.val]->mappingType;
|
||||
|
||||
dlsch_config_pdu_1_1->dmrsConfigType = pdsch_Config->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->dmrs_Type == NULL ? NFAPI_NR_DMRS_TYPE1 : NFAPI_NR_DMRS_TYPE2;
|
||||
struct NR_DMRS_DownlinkConfig *dl_dmrs_config = (mappingtype == typeA) ?
|
||||
pdsch_Config->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup :
|
||||
pdsch_Config->dmrs_DownlinkForPDSCH_MappingTypeB->choice.setup;
|
||||
|
||||
switch (dci->dmrs_sequence_initialization.val) {
|
||||
case 0:
|
||||
dlsch_config_pdu_1_1->nscid = 0;
|
||||
if(dl_dmrs_config->scramblingID0)
|
||||
dlsch_config_pdu_1_1->dlDmrsScramblingId = *dl_dmrs_config->scramblingID0;
|
||||
else
|
||||
dlsch_config_pdu_1_1->dlDmrsScramblingId = mac->physCellId;
|
||||
break;
|
||||
case 1:
|
||||
dlsch_config_pdu_1_1->nscid = 1;
|
||||
if(dl_dmrs_config->scramblingID1)
|
||||
dlsch_config_pdu_1_1->dlDmrsScramblingId = *dl_dmrs_config->scramblingID1;
|
||||
else
|
||||
dlsch_config_pdu_1_1->dlDmrsScramblingId = mac->physCellId;
|
||||
break;
|
||||
default:
|
||||
AssertFatal(1==0,"Invalid dmrs sequence initialization value\n");
|
||||
}
|
||||
|
||||
dlsch_config_pdu_1_1->dmrsConfigType = dl_dmrs_config->dmrs_Type == NULL ? NFAPI_NR_DMRS_TYPE1 : NFAPI_NR_DMRS_TYPE2;
|
||||
|
||||
/* TODO: fix number of DM-RS CDM groups without data according to subclause 5.1.6.2 of 3GPP TS 38.214,
|
||||
using tables 7.3.1.2.2-1, 7.3.1.2.2-2, 7.3.1.2.2-3, 7.3.1.2.2-4 of 3GPP TS 38.212 */
|
||||
@@ -1136,17 +1170,11 @@ int8_t nr_ue_process_dci(module_id_t module_id, int cc_id, uint8_t gNB_index, fr
|
||||
|
||||
/* ANTENNA_PORTS */
|
||||
uint8_t n_codewords = 1; // FIXME!!!
|
||||
long *max_length = NULL;
|
||||
long *dmrs_type = NULL;
|
||||
long *max_length = dl_dmrs_config->maxLength;
|
||||
long *dmrs_type = dl_dmrs_config->dmrs_Type;
|
||||
|
||||
dlsch_config_pdu_1_1->n_front_load_symb = 1; // default value
|
||||
if (pdsch_Config->dmrs_DownlinkForPDSCH_MappingTypeA) {
|
||||
max_length = pdsch_Config->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->maxLength;
|
||||
dmrs_type = pdsch_Config->dmrs_DownlinkForPDSCH_MappingTypeA->choice.setup->dmrs_Type;
|
||||
}
|
||||
if (pdsch_Config->dmrs_DownlinkForPDSCH_MappingTypeB) {
|
||||
max_length = pdsch_Config->dmrs_DownlinkForPDSCH_MappingTypeB->choice.setup->maxLength;
|
||||
dmrs_type = pdsch_Config->dmrs_DownlinkForPDSCH_MappingTypeB->choice.setup->dmrs_Type;
|
||||
}
|
||||
|
||||
if ((dmrs_type == NULL) && (max_length == NULL)){
|
||||
// Table 7.3.1.2.2-1: Antenna port(s) (1000 + DMRS port), dmrs-Type=1, maxLength=1
|
||||
dlsch_config_pdu_1_1->n_dmrs_cdm_groups = table_7_3_2_3_3_1[dci->antenna_ports.val][0];
|
||||
|
||||
@@ -734,6 +734,11 @@ int nr_config_pusch_pdu(NR_UE_MAC_INST_t *mac,
|
||||
? pusch_Config->dmrs_UplinkForPUSCH_MappingTypeA->choice.setup : pusch_Config->dmrs_UplinkForPUSCH_MappingTypeB->choice.setup;
|
||||
}
|
||||
|
||||
pusch_config_pdu->scid = 0;
|
||||
pusch_config_pdu->ul_dmrs_scrambling_id = mac->physCellId;
|
||||
if(*dci_format == NR_UL_DCI_FORMAT_0_1)
|
||||
pusch_config_pdu->scid = dci->dmrs_sequence_initialization.val;
|
||||
|
||||
/* TRANSFORM PRECODING ------------------------------------------------------------------------------------------*/
|
||||
|
||||
if (pusch_config_pdu->transform_precoding == NR_PUSCH_Config__transformPrecoder_enabled) {
|
||||
@@ -759,6 +764,14 @@ int nr_config_pusch_pdu(NR_UE_MAC_INST_t *mac,
|
||||
LOG_D(NR_MAC,"TRANSFORM PRECODING IS ENABLED. CDM groups: %d, U: %d \n", pusch_config_pdu->num_dmrs_cdm_grps_no_data,
|
||||
pusch_config_pdu->dfts_ofdm.low_papr_group_number);
|
||||
}
|
||||
else {
|
||||
if (pusch_config_pdu->scid == 0 &&
|
||||
NR_DMRS_ulconfig->transformPrecodingDisabled->scramblingID0)
|
||||
pusch_config_pdu->ul_dmrs_scrambling_id = *NR_DMRS_ulconfig->transformPrecodingDisabled->scramblingID0;
|
||||
if (pusch_config_pdu->scid == 1 &&
|
||||
NR_DMRS_ulconfig->transformPrecodingDisabled->scramblingID1)
|
||||
pusch_config_pdu->ul_dmrs_scrambling_id = *NR_DMRS_ulconfig->transformPrecodingDisabled->scramblingID1;
|
||||
}
|
||||
|
||||
/* TRANSFORM PRECODING --------------------------------------------------------------------------------------------------------*/
|
||||
|
||||
|
||||
Reference in New Issue
Block a user