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Merge branch 'develop' of https://gitlab.eurecom.fr/oai/openairinterface5g into develop

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This commit is contained in:
trilyrak
2016-03-10 15:47:26 +01:00
parent 85d010d987 83f4f69faa
commit 9185c693bc
10 changed files with 1099 additions and 1078 deletions
Download Patch File Download Diff File Expand all files Collapse all files
openair1/PHY/LTE_TRANSPORT/initial_sync.c
+11 -11
View File
@@ -496,20 +496,20 @@ int initial_sync(PHY_VARS_UE *phy_vars_ue, runmode_t mode)
#endif
if (phy_vars_ue->UE_scan_carrier == 0) {
#ifdef OPENAIR2
LOG_I(PHY,"[UE%d] Sending synch status to higher layers\n",phy_vars_ue->Mod_id);
//mac_resynch();
mac_xface->dl_phy_sync_success(phy_vars_ue->Mod_id,phy_vars_ue->frame_rx,0,1);//phy_vars_ue->lte_ue_common_vars.eNb_id);
#endif //OPENAIR2
if (phy_vars_ue->mac_enabled==1) {
LOG_I(PHY,"[UE%d] Sending synch status to higher layers\n",phy_vars_ue->Mod_id);
//mac_resynch();
mac_xface->dl_phy_sync_success(phy_vars_ue->Mod_id,phy_vars_ue->frame_rx,0,1);//phy_vars_ue->lte_ue_common_vars.eNb_id);
phy_vars_ue->UE_mode[0] = PRACH;
}
else {
phy_vars_ue->UE_mode[0] = PUSCH;
}
generate_pcfich_reg_mapping(frame_parms);
generate_phich_reg_mapping(frame_parms);
// init_prach625(frame_parms);
#ifndef OPENAIR2
phy_vars_ue->UE_mode[0] = PUSCH;
#else
phy_vars_ue->UE_mode[0] = PRACH;
#endif
//phy_vars_ue->lte_ue_pbch_vars[0]->pdu_errors=0;
phy_vars_ue->lte_ue_pbch_vars[0]->pdu_errors_conseq=0;
//phy_vars_ue->lte_ue_pbch_vars[0]->pdu_errors_last=0;
openair1/PHY/LTE_TRANSPORT/print_stats.c
+4 -7
View File
@@ -107,10 +107,10 @@ int dump_ue_stats(PHY_VARS_UE *phy_vars_ue, char* buffer, int length, runmode_t
len += sprintf(&buffer[len], "[UE PROC] timing_advance = %d\n",phy_vars_ue->timing_advance);
if (phy_vars_ue->UE_mode[0]==PUSCH) {
len += sprintf(&buffer[len], "[UE PROC] Po_PUSCH = %d dBm (PL %d dB, Po_NOMINAL_PUSCH %d dBm, PHR %d dB)\n",
PHY_vars_UE_g[0][0]->ulsch_ue[0]->Po_PUSCH,
phy_vars_ue->ulsch_ue[0]->Po_PUSCH,
get_PL(phy_vars_ue->Mod_id,phy_vars_ue->CC_id,0),
mac_xface->get_Po_NOMINAL_PUSCH(phy_vars_ue->Mod_id,0),
PHY_vars_UE_g[0][0]->ulsch_ue[0]->PHR);
phy_vars_ue->lte_frame_parms.ul_power_control_config_common.p0_NominalPUSCH,
phy_vars_ue->ulsch_ue[0]->PHR);
len += sprintf(&buffer[len], "[UE PROC] Po_PUCCH = %d dBm (Po_NOMINAL_PUCCH %d dBm, g_pucch %d dB)\n",
get_PL(phy_vars_ue->Mod_id,phy_vars_ue->CC_id,0)+
phy_vars_ue->lte_frame_parms.ul_power_control_config_common.p0_NominalPUCCH+
@@ -582,9 +582,7 @@ int dump_eNB_stats(PHY_VARS_eNB *phy_vars_eNB, char* buffer, int length)
len += sprintf(&buffer[len],"%4d ",
phy_vars_eNB->PHY_measurements_eNB[eNB].n0_subband_power_tot_dBm[i]);
if ((i>0) && ((i%25) == 0))
len += sprintf(&buffer[len],"\n ",
phy_vars_eNB->PHY_measurements_eNB[eNB].n0_subband_power_tot_dBm[i]);
len += sprintf(&buffer[len],"\n");
}
len += sprintf(&buffer[len],"\n");
len += sprintf(&buffer[len],"\n[eNB PROC] PERFORMANCE PARAMETERS\n");
@@ -644,7 +642,6 @@ int dump_eNB_stats(PHY_VARS_eNB *phy_vars_eNB, char* buffer, int length)
dB_fixed(phy_vars_eNB->eNB_UE_stats[UE_id].Po_PUCCH/phy_vars_eNB->lte_frame_parms.N_RB_UL)-phy_vars_eNB->rx_total_gain_eNB_dB,
phy_vars_eNB->lte_frame_parms.ul_power_control_config_common.p0_NominalPUCCH,
dB_fixed(phy_vars_eNB->eNB_UE_stats[UE_id].Po_PUCCH1_below/phy_vars_eNB->lte_frame_parms.N_RB_UL)-phy_vars_eNB->rx_total_gain_eNB_dB,
dB_fixed(phy_vars_eNB->eNB_UE_stats[UE_id].Po_PUCCH1_above/phy_vars_eNB->lte_frame_parms.N_RB_UL)-phy_vars_eNB->rx_total_gain_eNB_dB,
PUCCH1_THRES+phy_vars_eNB->PHY_measurements_eNB[0].n0_power_tot_dBm-dB_fixed(phy_vars_eNB->lte_frame_parms.N_RB_UL),
phy_vars_eNB->eNB_UE_stats[UE_id].sector);
openair1/PHY/defs.h
+6
View File
@@ -278,6 +278,9 @@ typedef struct PHY_VARS_eNB_s {
int **dl_precoder_SeNB[3];
char log2_maxp; /// holds the maximum channel/precoder coefficient
/// if ==0 enables phy only test mode
int mac_enabled;
/// For emulation only (used by UE abstraction to retrieve DCI)
uint8_t num_common_dci[2]; // num_dci in even/odd subframes
uint8_t num_ue_spec_dci[2]; // num_dci in even/odd subframes
@@ -579,6 +582,9 @@ typedef struct {
/// holds the maximum channel/precoder coefficient
char log2_maxp;
/// if ==0 enables phy only test mode
int mac_enabled;
/// Flag to initialize averaging of PHY measurements
int init_averaging;
openair1/SCHED/phy_mac_stub.c
+756
View File
@@ -0,0 +1,756 @@
/*******************************************************************************
OpenAirInterface
Copyright(c) 1999 - 2014 Eurecom
OpenAirInterface is free software: you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation, either version 3 of the License, or
(at your option) any later version.
OpenAirInterface is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with OpenAirInterface.The full GNU General Public License is
included in this distribution in the file called "COPYING". If not,
see <http://www.gnu.org/licenses/>.
Contact Information
OpenAirInterface Admin: openair_admin@eurecom.fr
OpenAirInterface Tech : openair_tech@eurecom.fr
OpenAirInterface Dev : openair4g-devel@lists.eurecom.fr
Address : Eurecom, Campus SophiaTech, 450 Route des Chappes, CS 50193 - 06904 Biot Sophia Antipolis cedex, FRANCE
*******************************************************************************/
/*! \file phy_mac_stub.c
* \brief stimulates the phy without mac
* \author R. Knopp, F. Kaltenberger, N. Nikaein
* \date 2011
* \version 0.1
* \company Eurecom
* \email: knopp@eurecom.fr,florian.kaltenberger@eurecom.fr,navid.nikaein@eurecom.fr
* \note
* \warning
*/
#include "PHY/defs.h"
#include "PHY/extern.h"
#include "MAC_INTERFACE/defs.h"
#include "MAC_INTERFACE/extern.h"
#include "SCHED/defs.h"
#include "SCHED/extern.h"
#include "LAYER2/MAC/extern.h"
#ifdef EMOS
#include "SCHED/phy_procedures_emos.h"
#endif
void fill_dci(DCI_PDU *DCI_pdu, uint8_t sched_subframe, PHY_VARS_eNB *phy_vars_eNB)
{
int i;
uint8_t cooperation_flag = phy_vars_eNB->cooperation_flag;
uint8_t transmission_mode = phy_vars_eNB->transmission_mode[0];
uint32_t rballoc = 0x7FFF;
uint32_t rballoc2 = 0x000F;
int subframe = phy_vars_eNB->proc[sched_subframe].subframe_tx;
LTE_eNB_DLSCH_t *DLSCH_ptr = phy_vars_eNB->dlsch_eNB[0][0];
/*
uint32_t rand = taus();
if ((subframe==8) || (subframe==9) || (subframe==0))
rand = (rand%5)+5;
else
rand = (rand%4)+5;
*/
uint32_t bcch_pdu;
uint64_t dlsch_pdu;
DCI_pdu->Num_common_dci = 0;
DCI_pdu->Num_ue_spec_dci=0;
switch (subframe) {
case 5:
DCI_pdu->Num_common_dci = 1;
DCI_pdu->dci_alloc[0].L = 2;
DCI_pdu->dci_alloc[0].rnti = SI_RNTI;
DCI_pdu->dci_alloc[0].format = format1A;
DCI_pdu->dci_alloc[0].ra_flag = 0;
switch (phy_vars_eNB->lte_frame_parms.N_RB_DL) {
case 6:
if (phy_vars_eNB->lte_frame_parms.frame_type == FDD) {
DCI_pdu->dci_alloc[0].dci_length = sizeof_DCI1A_1_5MHz_FDD_t;
((DCI1A_1_5MHz_FDD_t*)&bcch_pdu)->type = 1;
((DCI1A_1_5MHz_FDD_t*)&bcch_pdu)->vrb_type = 0;
((DCI1A_1_5MHz_FDD_t*)&bcch_pdu)->rballoc = computeRIV(25,10,3);
((DCI1A_1_5MHz_FDD_t*)&bcch_pdu)->ndi = phy_vars_eNB->proc[sched_subframe].frame_tx&1;
((DCI1A_1_5MHz_FDD_t*)&bcch_pdu)->rv = 1;
((DCI1A_1_5MHz_FDD_t*)&bcch_pdu)->mcs = 1;
((DCI1A_1_5MHz_FDD_t*)&bcch_pdu)->harq_pid = 0;
((DCI1A_1_5MHz_FDD_t*)&bcch_pdu)->TPC = 1; // set to 3 PRB
memcpy((void*)&DCI_pdu->dci_alloc[0].dci_pdu[0],&bcch_pdu,sizeof(DCI1A_1_5MHz_TDD_1_6_t));
} else {
DCI_pdu->dci_alloc[0].dci_length = sizeof_DCI1A_1_5MHz_TDD_1_6_t;
((DCI1A_1_5MHz_TDD_1_6_t*)&bcch_pdu)->type = 1;
((DCI1A_1_5MHz_TDD_1_6_t*)&bcch_pdu)->vrb_type = 0;
((DCI1A_1_5MHz_TDD_1_6_t*)&bcch_pdu)->rballoc = computeRIV(25,10,3);
((DCI1A_1_5MHz_TDD_1_6_t*)&bcch_pdu)->ndi = phy_vars_eNB->proc[sched_subframe].frame_tx&1;
((DCI1A_1_5MHz_TDD_1_6_t*)&bcch_pdu)->rv = 1;
((DCI1A_1_5MHz_TDD_1_6_t*)&bcch_pdu)->mcs = 1;
((DCI1A_1_5MHz_TDD_1_6_t*)&bcch_pdu)->harq_pid = 0;
((DCI1A_1_5MHz_TDD_1_6_t*)&bcch_pdu)->TPC = 1; // set to 3 PRB
memcpy((void*)&DCI_pdu->dci_alloc[0].dci_pdu[0],&bcch_pdu,sizeof(DCI1A_1_5MHz_TDD_1_6_t));
}
break;
case 25:
default:
if (phy_vars_eNB->lte_frame_parms.frame_type == FDD) {
DCI_pdu->dci_alloc[0].dci_length = sizeof_DCI1A_5MHz_FDD_t;
((DCI1A_5MHz_FDD_t*)&bcch_pdu)->type = 1;
((DCI1A_5MHz_FDD_t*)&bcch_pdu)->vrb_type = 0;
((DCI1A_5MHz_FDD_t*)&bcch_pdu)->rballoc = computeRIV(25,10,3);
((DCI1A_5MHz_FDD_t*)&bcch_pdu)->ndi = phy_vars_eNB->proc[sched_subframe].frame_tx&1;
((DCI1A_5MHz_FDD_t*)&bcch_pdu)->rv = 1;
((DCI1A_5MHz_FDD_t*)&bcch_pdu)->mcs = 1;
((DCI1A_5MHz_FDD_t*)&bcch_pdu)->harq_pid = 0;
((DCI1A_5MHz_FDD_t*)&bcch_pdu)->TPC = 1; // set to 3 PRB
memcpy((void*)&DCI_pdu->dci_alloc[0].dci_pdu[0],&bcch_pdu,sizeof(DCI1A_5MHz_TDD_1_6_t));
} else {
DCI_pdu->dci_alloc[0].dci_length = sizeof_DCI1A_5MHz_TDD_1_6_t;
((DCI1A_5MHz_TDD_1_6_t*)&bcch_pdu)->type = 1;
((DCI1A_5MHz_TDD_1_6_t*)&bcch_pdu)->vrb_type = 0;
((DCI1A_5MHz_TDD_1_6_t*)&bcch_pdu)->rballoc = computeRIV(25,10,3);
((DCI1A_5MHz_TDD_1_6_t*)&bcch_pdu)->ndi = phy_vars_eNB->proc[sched_subframe].frame_tx&1;
((DCI1A_5MHz_TDD_1_6_t*)&bcch_pdu)->rv = 1;
((DCI1A_5MHz_TDD_1_6_t*)&bcch_pdu)->mcs = 1;
((DCI1A_5MHz_TDD_1_6_t*)&bcch_pdu)->harq_pid = 0;
((DCI1A_5MHz_TDD_1_6_t*)&bcch_pdu)->TPC = 1; // set to 3 PRB
memcpy((void*)&DCI_pdu->dci_alloc[0].dci_pdu[0],&bcch_pdu,sizeof(DCI1A_5MHz_TDD_1_6_t));
}
break;
case 50:
if (phy_vars_eNB->lte_frame_parms.frame_type == FDD) {
DCI_pdu->dci_alloc[0].dci_length = sizeof_DCI1A_10MHz_FDD_t;
((DCI1A_10MHz_FDD_t*)&bcch_pdu)->type = 1;
((DCI1A_10MHz_FDD_t*)&bcch_pdu)->vrb_type = 0;
((DCI1A_10MHz_FDD_t*)&bcch_pdu)->rballoc = computeRIV(25,10,3);
((DCI1A_10MHz_FDD_t*)&bcch_pdu)->ndi = phy_vars_eNB->proc[sched_subframe].frame_tx&1;
((DCI1A_10MHz_FDD_t*)&bcch_pdu)->rv = 1;
((DCI1A_10MHz_FDD_t*)&bcch_pdu)->mcs = 1;
((DCI1A_10MHz_FDD_t*)&bcch_pdu)->harq_pid = 0;
((DCI1A_10MHz_FDD_t*)&bcch_pdu)->TPC = 1; // set to 3 PRB
memcpy((void*)&DCI_pdu->dci_alloc[0].dci_pdu[0],&bcch_pdu,sizeof(DCI1A_10MHz_TDD_1_6_t));
} else {
DCI_pdu->dci_alloc[0].dci_length = sizeof_DCI1A_10MHz_TDD_1_6_t;
((DCI1A_10MHz_TDD_1_6_t*)&bcch_pdu)->type = 1;
((DCI1A_10MHz_TDD_1_6_t*)&bcch_pdu)->vrb_type = 0;
((DCI1A_10MHz_TDD_1_6_t*)&bcch_pdu)->rballoc = computeRIV(25,10,3);
((DCI1A_10MHz_TDD_1_6_t*)&bcch_pdu)->ndi = phy_vars_eNB->proc[sched_subframe].frame_tx&1;
((DCI1A_10MHz_TDD_1_6_t*)&bcch_pdu)->rv = 1;
((DCI1A_10MHz_TDD_1_6_t*)&bcch_pdu)->mcs = 1;
((DCI1A_10MHz_TDD_1_6_t*)&bcch_pdu)->harq_pid = DLSCH_ptr->harq_pid_freelist[DLSCH_ptr->head_freelist];
((DCI1A_10MHz_TDD_1_6_t*)&bcch_pdu)->TPC = 1; // set to 3 PRB
memcpy((void*)&DCI_pdu->dci_alloc[0].dci_pdu[0],&bcch_pdu,sizeof(DCI1A_10MHz_TDD_1_6_t));
}
break;
case 100:
if (phy_vars_eNB->lte_frame_parms.frame_type == FDD) {
DCI_pdu->dci_alloc[0].dci_length = sizeof_DCI1A_20MHz_FDD_t;
((DCI1A_20MHz_FDD_t*)&bcch_pdu)->type = 1;
((DCI1A_20MHz_FDD_t*)&bcch_pdu)->vrb_type = 0;
((DCI1A_20MHz_FDD_t*)&bcch_pdu)->rballoc = computeRIV(25,10,3);
((DCI1A_20MHz_FDD_t*)&bcch_pdu)->ndi = phy_vars_eNB->proc[sched_subframe].frame_tx&1;
((DCI1A_20MHz_FDD_t*)&bcch_pdu)->rv = 1;
((DCI1A_20MHz_FDD_t*)&bcch_pdu)->mcs = 1;
((DCI1A_20MHz_FDD_t*)&bcch_pdu)->harq_pid = 0;
((DCI1A_20MHz_FDD_t*)&bcch_pdu)->TPC = 1; // set to 3 PRB
memcpy((void*)&DCI_pdu->dci_alloc[0].dci_pdu[0],&bcch_pdu,sizeof(DCI1A_20MHz_TDD_1_6_t));
} else {
DCI_pdu->dci_alloc[0].dci_length = sizeof_DCI1A_20MHz_TDD_1_6_t;
((DCI1A_20MHz_TDD_1_6_t*)&bcch_pdu)->type = 1;
((DCI1A_20MHz_TDD_1_6_t*)&bcch_pdu)->vrb_type = 0;
((DCI1A_20MHz_TDD_1_6_t*)&bcch_pdu)->rballoc = computeRIV(25,10,3);
((DCI1A_20MHz_TDD_1_6_t*)&bcch_pdu)->ndi = phy_vars_eNB->proc[sched_subframe].frame_tx&1;
((DCI1A_20MHz_TDD_1_6_t*)&bcch_pdu)->rv = 1;
((DCI1A_20MHz_TDD_1_6_t*)&bcch_pdu)->mcs = 1;
((DCI1A_20MHz_TDD_1_6_t*)&bcch_pdu)->harq_pid = 0;
((DCI1A_20MHz_TDD_1_6_t*)&bcch_pdu)->TPC = 1; // set to 3 PRB
memcpy((void*)&DCI_pdu->dci_alloc[0].dci_pdu[0],&bcch_pdu,sizeof(DCI1A_20MHz_TDD_1_6_t));
}
break;
}
break; //subframe switch
/*
case 6:
DCI_pdu->Num_ue_spec_dci = 1;
DCI_pdu->dci_alloc[0].dci_length = sizeof_DCI2_5MHz_2A_M10PRB_TDD_t;
DCI_pdu->dci_alloc[0].L = 2;
DCI_pdu->dci_alloc[0].rnti = 0x1236;
DCI_pdu->dci_alloc[0].format = format2_2A_M10PRB;
DCI_pdu->dci_alloc[0].ra_flag = 0;
DLSCH_alloc_pdu1.rballoc = 0x00ff;
DLSCH_alloc_pdu1.TPC = 0;
DLSCH_alloc_pdu1.dai = 0;
DLSCH_alloc_pdu1.harq_pid = 0;
DLSCH_alloc_pdu1.tb_swap = 0;
DLSCH_alloc_pdu1.mcs1 = 0;
DLSCH_alloc_pdu1.ndi1 = 1;
DLSCH_alloc_pdu1.rv1 = 0;
DLSCH_alloc_pdu1.tpmi = 0;
memcpy((void*)&DCI_pdu->dci_alloc[0].dci_pdu[0],(void *)&DLSCH_alloc_pdu1,sizeof(DCI2_5MHz_2A_M10PRB_TDD_t));
break;
*/
default:
case 7:
DCI_pdu->Num_ue_spec_dci = 1;
DCI_pdu->dci_alloc[0].L = 2;
DCI_pdu->dci_alloc[0].rnti = 0x1235;
DCI_pdu->dci_alloc[0].format = format1;
DCI_pdu->dci_alloc[0].ra_flag = 0;
if (transmission_mode<3) {
//user 1
switch (phy_vars_eNB->lte_frame_parms.N_RB_DL) {
case 25:
if (phy_vars_eNB->lte_frame_parms.frame_type == FDD) {
DCI_pdu->dci_alloc[0].dci_length = sizeof_DCI1_5MHz_FDD_t;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->rballoc = rballoc;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->TPC = 0;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->harq_pid = DLSCH_ptr->harq_pid_freelist[DLSCH_ptr->head_freelist];
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->mcs = openair_daq_vars.target_ue_dl_mcs;
//((DCI1_5MHz_FDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((phy_vars_eNB->frame%1024)%28);
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->ndi = phy_vars_eNB->proc[sched_subframe].frame_tx&1;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->rv = 0;
memcpy((void*)&DCI_pdu->dci_alloc[0].dci_pdu[0],(void *)&dlsch_pdu,sizeof(DCI1_5MHz_TDD_t));
/*
//user2
DCI_pdu->dci_alloc[1].dci_length = sizeof_DCI1_5MHz_TDD_t;
DCI_pdu->dci_alloc[1].L = 2;
DCI_pdu->dci_alloc[1].rnti = 0x1236;
DCI_pdu->dci_alloc[1].format = format1;
DCI_pdu->dci_alloc[1].ra_flag = 0;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->rballoc = rballoc2;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->TPC = 0;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->dai = 0;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->harq_pid = 1;
//((DCI1_5MHz_FDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((phy_vars_eNB->proc[subframe].frame%1024)%28);
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->mcs = openair_daq_vars.target_ue_dl_mcs;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->ndi = 1;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->rv = 0;
memcpy((void*)&DCI_pdu->dci_alloc[1].dci_pdu[0],(void *)&((DCI1_5MHz_FDD_t *)&dlsch_pdu)->,sizeof(DCI1_5MHz_TDD_t));
*/
} else {
DCI_pdu->dci_alloc[0].dci_length = sizeof_DCI1_5MHz_TDD_t;
((DCI1_5MHz_TDD_t *)&dlsch_pdu)->rballoc = rballoc;
((DCI1_5MHz_TDD_t *)&dlsch_pdu)->TPC = 0;
((DCI1_5MHz_TDD_t *)&dlsch_pdu)->dai = 0;
((DCI1_5MHz_TDD_t *)&dlsch_pdu)->harq_pid = DLSCH_ptr->harq_pid_freelist[DLSCH_ptr->head_freelist];
((DCI1_5MHz_TDD_t *)&dlsch_pdu)->mcs = openair_daq_vars.target_ue_dl_mcs;
//((DCI1_5MHz_TDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((phy_vars_eNB->frame%1024)%28);
((DCI1_5MHz_TDD_t *)&dlsch_pdu)->ndi = phy_vars_eNB->proc[sched_subframe].frame_tx&1;
((DCI1_5MHz_TDD_t *)&dlsch_pdu)->rv = 0;
memcpy((void*)&DCI_pdu->dci_alloc[0].dci_pdu[0],(void *)&dlsch_pdu,sizeof(DCI1_5MHz_TDD_t));
/*
//user2
DCI_pdu->dci_alloc[1].dci_length = sizeof_DCI1_5MHz_TDD_t;
DCI_pdu->dci_alloc[1].L = 2;
DCI_pdu->dci_alloc[1].rnti = 0x1236;
DCI_pdu->dci_alloc[1].format = format1;
DCI_pdu->dci_alloc[1].ra_flag = 0;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->rballoc = rballoc2;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->TPC = 0;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->dai = 0;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->harq_pid = 1;
//((DCI1_5MHz_FDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((phy_vars_eNB->proc[subframe].frame%1024)%28);
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->mcs = openair_daq_vars.target_ue_dl_mcs;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->ndi = 1;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->rv = 0;
memcpy((void*)&DCI_pdu->dci_alloc[1].dci_pdu[0],(void *)&((DCI1_5MHz_FDD_t *)&dlsch_pdu)->,sizeof(DCI1_5MHz_TDD_t));
*/
}
break;
case 50:
if (phy_vars_eNB->lte_frame_parms.frame_type == FDD) {
DCI_pdu->dci_alloc[0].dci_length = sizeof_DCI1_10MHz_FDD_t;
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->rballoc = rballoc;
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->TPC = 0;
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->harq_pid = DLSCH_ptr->harq_pid_freelist[DLSCH_ptr->head_freelist];
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->mcs = openair_daq_vars.target_ue_dl_mcs;
//((DCI1_10MHz_FDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((phy_vars_eNB->frame%1024)%28);
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->ndi = phy_vars_eNB->proc[sched_subframe].frame_tx&1;
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->rv = 0;
memcpy((void*)&DCI_pdu->dci_alloc[0].dci_pdu[0],(void *)&dlsch_pdu,sizeof(DCI1_10MHz_TDD_t));
/*
//user2
DCI_pdu->dci_alloc[1].dci_length = sizeof_DCI1_10MHz_TDD_t;
DCI_pdu->dci_alloc[1].L = 2;
DCI_pdu->dci_alloc[1].rnti = 0x1236;
DCI_pdu->dci_alloc[1].format = format1;
DCI_pdu->dci_alloc[1].ra_flag = 0;
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->rballoc = rballoc2;
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->TPC = 0;
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->dai = 0;
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->harq_pid = 1;
//((DCI1_10MHz_FDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((phy_vars_eNB->proc[subframe].frame%1024)%28);
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->mcs = openair_daq_vars.target_ue_dl_mcs;
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->ndi = 1;
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->rv = 0;
memcpy((void*)&DCI_pdu->dci_alloc[1].dci_pdu[0],(void *)&((DCI1_10MHz_FDD_t *)&dlsch_pdu)->,sizeof(DCI1_10MHz_TDD_t));
*/
} else {
DCI_pdu->dci_alloc[0].dci_length = sizeof_DCI1_10MHz_TDD_t;
((DCI1_10MHz_TDD_t *)&dlsch_pdu)->rballoc = rballoc;
((DCI1_10MHz_TDD_t *)&dlsch_pdu)->TPC = 0;
((DCI1_10MHz_TDD_t *)&dlsch_pdu)->dai = 0;
((DCI1_10MHz_TDD_t *)&dlsch_pdu)->harq_pid = DLSCH_ptr->harq_pid_freelist[DLSCH_ptr->head_freelist];
((DCI1_10MHz_TDD_t *)&dlsch_pdu)->mcs = openair_daq_vars.target_ue_dl_mcs;
//((DCI1_10MHz_TDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((phy_vars_eNB->frame%1024)%28);
((DCI1_10MHz_TDD_t *)&dlsch_pdu)->ndi = phy_vars_eNB->proc[sched_subframe].frame_tx&1;
((DCI1_10MHz_TDD_t *)&dlsch_pdu)->rv = 0;
memcpy((void*)&DCI_pdu->dci_alloc[0].dci_pdu[0],(void *)&dlsch_pdu,sizeof(DCI1_10MHz_TDD_t));
/*
//user2
DCI_pdu->dci_alloc[1].dci_length = sizeof_DCI1_10MHz_TDD_t;
DCI_pdu->dci_alloc[1].L = 2;
DCI_pdu->dci_alloc[1].rnti = 0x1236;
DCI_pdu->dci_alloc[1].format = format1;
DCI_pdu->dci_alloc[1].ra_flag = 0;
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->rballoc = rballoc2;
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->TPC = 0;
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->dai = 0;
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->harq_pid = 1;
//((DCI1_10MHz_FDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((phy_vars_eNB->proc[subframe].frame%1024)%28);
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->mcs = openair_daq_vars.target_ue_dl_mcs;
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->ndi = 1;
((DCI1_10MHz_FDD_t *)&dlsch_pdu)->rv = 0;
memcpy((void*)&DCI_pdu->dci_alloc[1].dci_pdu[0],(void *)&((DCI1_10MHz_FDD_t *)&dlsch_pdu)->,sizeof(DCI1_10MHz_TDD_t));
*/
}
break;
case 100:
if (phy_vars_eNB->lte_frame_parms.frame_type == FDD) {
DCI_pdu->dci_alloc[0].dci_length = sizeof_DCI1_5MHz_FDD_t;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->rballoc = rballoc;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->TPC = 0;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->harq_pid = DLSCH_ptr->harq_pid_freelist[DLSCH_ptr->head_freelist];
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->mcs = openair_daq_vars.target_ue_dl_mcs;
//((DCI1_5MHz_FDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((phy_vars_eNB->frame%1024)%28);
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->ndi = phy_vars_eNB->proc[sched_subframe].frame_tx&1;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->rv = 0;
memcpy((void*)&DCI_pdu->dci_alloc[0].dci_pdu[0],(void *)&dlsch_pdu,sizeof(DCI1_5MHz_TDD_t));
/*
//user2
DCI_pdu->dci_alloc[1].dci_length = sizeof_DCI1_5MHz_TDD_t;
DCI_pdu->dci_alloc[1].L = 2;
DCI_pdu->dci_alloc[1].rnti = 0x1236;
DCI_pdu->dci_alloc[1].format = format1;
DCI_pdu->dci_alloc[1].ra_flag = 0;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->rballoc = rballoc2;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->TPC = 0;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->dai = 0;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->harq_pid = 1;
//((DCI1_5MHz_FDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((phy_vars_eNB->proc[subframe].frame%1024)%28);
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->mcs = openair_daq_vars.target_ue_dl_mcs;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->ndi = 1;
((DCI1_5MHz_FDD_t *)&dlsch_pdu)->rv = 0;
memcpy((void*)&DCI_pdu->dci_alloc[1].dci_pdu[0],(void *)&((DCI1_5MHz_FDD_t *)&dlsch_pdu)->,sizeof(DCI1_5MHz_TDD_t));
*/
} else {
DCI_pdu->dci_alloc[0].dci_length = sizeof_DCI1_20MHz_TDD_t;
((DCI1_20MHz_TDD_t *)&dlsch_pdu)->rballoc = rballoc;
((DCI1_20MHz_TDD_t *)&dlsch_pdu)->TPC = 0;
((DCI1_20MHz_TDD_t *)&dlsch_pdu)->dai = 0;
((DCI1_20MHz_TDD_t *)&dlsch_pdu)->harq_pid = DLSCH_ptr->harq_pid_freelist[DLSCH_ptr->head_freelist];
((DCI1_20MHz_TDD_t *)&dlsch_pdu)->mcs = openair_daq_vars.target_ue_dl_mcs;
//((DCI1_20MHz_TDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((phy_vars_eNB->frame%1024)%28);
((DCI1_20MHz_TDD_t *)&dlsch_pdu)->ndi = phy_vars_eNB->proc[sched_subframe].frame_tx&1;
((DCI1_20MHz_TDD_t *)&dlsch_pdu)->rv = 0;
memcpy((void*)&DCI_pdu->dci_alloc[0].dci_pdu[0],(void *)&dlsch_pdu,sizeof(DCI1_20MHz_TDD_t));
/*
//user2
DCI_pdu->dci_alloc[1].dci_length = sizeof_DCI1_20MHz_TDD_t;
DCI_pdu->dci_alloc[1].L = 2;
DCI_pdu->dci_alloc[1].rnti = 0x1236;
DCI_pdu->dci_alloc[1].format = format1;
DCI_pdu->dci_alloc[1].ra_flag = 0;
((DCI1_20MHz_FDD_t *)&dlsch_pdu)->rballoc = rballoc2;
((DCI1_20MHz_FDD_t *)&dlsch_pdu)->TPC = 0;
((DCI1_20MHz_FDD_t *)&dlsch_pdu)->dai = 0;
((DCI1_20MHz_FDD_t *)&dlsch_pdu)->harq_pid = 1;
//((DCI1_20MHz_FDD_t *)&dlsch_pdu)->mcs = (unsigned char) ((phy_vars_eNB->proc[subframe].frame%1024)%28);
((DCI1_20MHz_FDD_t *)&dlsch_pdu)->mcs = openair_daq_vars.target_ue_dl_mcs;
((DCI1_20MHz_FDD_t *)&dlsch_pdu)->ndi = 1;
((DCI1_20MHz_FDD_t *)&dlsch_pdu)->rv = 0;
memcpy((void*)&DCI_pdu->dci_alloc[1].dci_pdu[0],(void *)&((DCI1_20MHz_FDD_t *)&dlsch_pdu)->,sizeof(DCI1_5MHz_TDD_t));
*/
}
break;
}
} else if (transmission_mode==4) {
DCI_pdu->Num_ue_spec_dci = 1;
// user 1
DCI_pdu->dci_alloc[0].dci_length = sizeof_DCI2_5MHz_2A_FDD_t;
DCI_pdu->dci_alloc[0].L = 3;
DCI_pdu->dci_alloc[0].rnti = 0x1235;
DCI_pdu->dci_alloc[0].format = format2;
DCI_pdu->dci_alloc[0].ra_flag = 0;
((DCI2_5MHz_2A_FDD_t*) (&DCI_pdu->dci_alloc[0].dci_pdu))->tpmi = 0;
((DCI2_5MHz_2A_FDD_t*) (&DCI_pdu->dci_alloc[0].dci_pdu))->rv1 = 0;
((DCI2_5MHz_2A_FDD_t*) (&DCI_pdu->dci_alloc[0].dci_pdu))->ndi1 = phy_vars_eNB->proc[sched_subframe].frame_tx&1;
((DCI2_5MHz_2A_FDD_t*) (&DCI_pdu->dci_alloc[0].dci_pdu))->mcs1 = openair_daq_vars.target_ue_dl_mcs;
((DCI2_5MHz_2A_FDD_t*) (&DCI_pdu->dci_alloc[0].dci_pdu))->rv2 = 0;
((DCI2_5MHz_2A_FDD_t*) (&DCI_pdu->dci_alloc[0].dci_pdu))->ndi2 = phy_vars_eNB->proc[sched_subframe].frame_tx&1;
((DCI2_5MHz_2A_FDD_t*) (&DCI_pdu->dci_alloc[0].dci_pdu))->mcs2 = openair_daq_vars.target_ue_dl_mcs;
((DCI2_5MHz_2A_FDD_t*) (&DCI_pdu->dci_alloc[0].dci_pdu))->tb_swap = 0;
((DCI2_5MHz_2A_FDD_t*) (&DCI_pdu->dci_alloc[0].dci_pdu))->harq_pid = DLSCH_ptr->harq_pid_freelist[DLSCH_ptr->head_freelist];
((DCI2_5MHz_2A_FDD_t*) (&DCI_pdu->dci_alloc[0].dci_pdu))->TPC = 0;
((DCI2_5MHz_2A_FDD_t*) (&DCI_pdu->dci_alloc[0].dci_pdu))->rballoc = openair_daq_vars.ue_dl_rb_alloc;
((DCI2_5MHz_2A_FDD_t*) (&DCI_pdu->dci_alloc[0].dci_pdu))->rah = 0;
} else if (transmission_mode==5) {
DCI_pdu->Num_ue_spec_dci = 2;
// user 1
DCI_pdu->dci_alloc[0].dci_length = sizeof_DCI1E_5MHz_2A_M10PRB_TDD_t;
DCI_pdu->dci_alloc[0].L = 3;
DCI_pdu->dci_alloc[0].rnti = 0x1235;
DCI_pdu->dci_alloc[0].format = format1E_2A_M10PRB;
DCI_pdu->dci_alloc[0].ra_flag = 0;
DLSCH_alloc_pdu1E.tpmi = 5; //5=use feedback
DLSCH_alloc_pdu1E.rv = 0;
DLSCH_alloc_pdu1E.ndi = phy_vars_eNB->proc[sched_subframe].frame_tx&1;
//DLSCH_alloc_pdu1E.mcs = cqi_to_mcs[phy_vars_eNB->eNB_UE_stats->DL_cqi[0]];
//DLSCH_alloc_pdu1E.mcs = (unsigned char) (taus()%28);
DLSCH_alloc_pdu1E.mcs = openair_daq_vars.target_ue_dl_mcs;
//DLSCH_alloc_pdu1E.mcs = (unsigned char) ((phy_vars_eNB->proc[subframe].frame%1024)%28);
phy_vars_eNB->eNB_UE_stats[0].dlsch_mcs1 = DLSCH_alloc_pdu1E.mcs;
DLSCH_alloc_pdu1E.harq_pid = DLSCH_ptr->harq_pid_freelist[DLSCH_ptr->head_freelist];
DLSCH_alloc_pdu1E.dai = 0;
DLSCH_alloc_pdu1E.TPC = 0;
DLSCH_alloc_pdu1E.rballoc = openair_daq_vars.ue_dl_rb_alloc;
DLSCH_alloc_pdu1E.rah = 0;
DLSCH_alloc_pdu1E.dl_power_off = 0; //0=second user present
memcpy((void*)&DCI_pdu->dci_alloc[0].dci_pdu[0],(void *)&DLSCH_alloc_pdu1E,sizeof(DCI1E_5MHz_2A_M10PRB_TDD_t));
//user 2
DCI_pdu->dci_alloc[1].dci_length = sizeof_DCI1E_5MHz_2A_M10PRB_TDD_t;
DCI_pdu->dci_alloc[1].L = 0;
DCI_pdu->dci_alloc[1].rnti = 0x1236;
DCI_pdu->dci_alloc[1].format = format1E_2A_M10PRB;
DCI_pdu->dci_alloc[1].ra_flag = 0;
//DLSCH_alloc_pdu1E.mcs = openair_daq_vars.target_ue_dl_mcs;
//DLSCH_alloc_pdu1E.mcs = (unsigned char) (taus()%28);
//DLSCH_alloc_pdu1E.mcs = (unsigned char) ((phy_vars_eNB->frame%1024)%28);
DLSCH_alloc_pdu1E.mcs = (unsigned char) (((phy_vars_eNB->proc[sched_subframe].frame_tx%1024)/3)%28);
phy_vars_eNB->eNB_UE_stats[1].dlsch_mcs1 = DLSCH_alloc_pdu1E.mcs;
memcpy((void*)&DCI_pdu->dci_alloc[1].dci_pdu[0],(void *)&DLSCH_alloc_pdu1E,sizeof(DCI1E_5MHz_2A_M10PRB_TDD_t));
// set the precoder of the second UE orthogonal to the first
phy_vars_eNB->eNB_UE_stats[1].DL_pmi_single = (phy_vars_eNB->eNB_UE_stats[0].DL_pmi_single ^ 0x1555);
}
break; //subframe switch
/*
case 8:
DCI_pdu->Num_common_dci = 1;
DCI_pdu->dci_alloc[0].dci_length = sizeof_DCI1A_5MHz_TDD_1_6_t;
DCI_pdu->dci_alloc[0].L = 2;
DCI_pdu->dci_alloc[0].rnti = 0xbeef;
DCI_pdu->dci_alloc[0].format = format1A;
DCI_pdu->dci_alloc[0].ra_flag = 1;
RA_alloc_pdu.type = 1;
RA_alloc_pdu.vrb_type = 0;
RA_alloc_pdu.rballoc = computeRIV(25,12,3);
RA_alloc_pdu.ndi = 1;
RA_alloc_pdu.rv = 1;
RA_alloc_pdu.mcs = 4;
RA_alloc_pdu.harq_pid = 0;
RA_alloc_pdu.TPC = 1;
memcpy((void*)&DCI_pdu->dci_alloc[0].dci_pdu[0],&RA_alloc_pdu,sizeof(DCI1A_5MHz_TDD_1_6_t));
break;
*/
/*
case 9:
DCI_pdu->Num_ue_spec_dci = 1;
//user 1
if (phy_vars_eNB->lte_frame_parms.frame_type == FDD)
DCI_pdu->dci_alloc[0].dci_length = sizeof_DCI0_5MHz_FDD_t ;
else
DCI_pdu->dci_alloc[0].dci_length = sizeof_DCI0_5MHz_TDD_1_6_t ;
DCI_pdu->dci_alloc[0].L = 2;
DCI_pdu->dci_alloc[0].rnti = 0x1235;
DCI_pdu->dci_alloc[0].format = format0;
DCI_pdu->dci_alloc[0].ra_flag = 0;
UL_alloc_pdu.type = 0;
UL_alloc_pdu.hopping = 0;
UL_alloc_pdu.rballoc = computeRIV(25,2,openair_daq_vars.ue_ul_nb_rb);
UL_alloc_pdu.mcs = openair_daq_vars.target_ue_ul_mcs;
UL_alloc_pdu.ndi = phy_vars_eNB->proc[sched_subframe].frame_tx&1;
UL_alloc_pdu.TPC = 0;
UL_alloc_pdu.cshift = 0;
UL_alloc_pdu.dai = 0;
UL_alloc_pdu.cqi_req = 1;
memcpy((void*)&DCI_pdu->dci_alloc[0].dci_pdu[0],(void *)&UL_alloc_pdu,sizeof(DCI0_5MHz_TDD_1_6_t));
*/
// user 2
/*
DCI_pdu->dci_alloc[1].dci_length = sizeof_DCI0_5MHz_TDD_1_6_t ;
DCI_pdu->dci_alloc[1].L = 2;
DCI_pdu->dci_alloc[1].rnti = 0x1236;
DCI_pdu->dci_alloc[1].format = format0;
DCI_pdu->dci_alloc[1].ra_flag = 0;
UL_alloc_pdu.type = 0;
UL_alloc_pdu.hopping = 0;
if (cooperation_flag==0)
UL_alloc_pdu.rballoc = computeRIV(25,2+openair_daq_vars.ue_ul_nb_rb,openair_daq_vars.ue_ul_nb_rb);
else
UL_alloc_pdu.rballoc = computeRIV(25,0,openair_daq_vars.ue_ul_nb_rb);
UL_alloc_pdu.mcs = openair_daq_vars.target_ue_ul_mcs;
UL_alloc_pdu.ndi = phy_vars_eNB->proc[sched_subframe].frame_tx&1;
UL_alloc_pdu.TPC = 0;
if ((cooperation_flag==0) || (cooperation_flag==1))
UL_alloc_pdu.cshift = 0;
else
UL_alloc_pdu.cshift = 1;
UL_alloc_pdu.dai = 0;
UL_alloc_pdu.cqi_req = 1;
memcpy((void*)&DCI_pdu->dci_alloc[1].dci_pdu[0],(void *)&UL_alloc_pdu,sizeof(DCI0_5MHz_TDD_1_6_t));
break;
*/
/*default:
break;*/
}
DCI_pdu->nCCE = 0;
for (i=0; i<DCI_pdu->Num_common_dci+DCI_pdu->Num_ue_spec_dci; i++) {
DCI_pdu->nCCE += (1<<(DCI_pdu->dci_alloc[i].L));
}
}
void fill_dci_emos(DCI_PDU *DCI_pdu, uint8_t subframe, PHY_VARS_eNB *phy_vars_eNB)
{
int i;
uint8_t cooperation_flag = phy_vars_eNB->cooperation_flag;
uint8_t transmission_mode = phy_vars_eNB->transmission_mode[0];
//uint32_t rballoc = 0x00F0;
//uint32_t rballoc2 = 0x000F;
/*
uint32_t rand = taus();
if ((subframe==8) || (subframe==9) || (subframe==0))
rand = (rand%5)+5;
else
rand = (rand%4)+5;
*/
DCI_pdu->Num_common_dci = 0;
DCI_pdu->Num_ue_spec_dci=0;
switch (subframe) {
case 5:
DCI_pdu->Num_ue_spec_dci = 1;
if (transmission_mode<3) {
//user 1
DCI_pdu->dci_alloc[0].dci_length = sizeof_DCI1_5MHz_TDD_t;
DCI_pdu->dci_alloc[0].L = 2;
DCI_pdu->dci_alloc[0].rnti = 0x1235;
DCI_pdu->dci_alloc[0].format = format1;
DCI_pdu->dci_alloc[0].ra_flag = 0;
DLSCH_alloc_pdu.rballoc = openair_daq_vars.ue_dl_rb_alloc;
DLSCH_alloc_pdu.TPC = 0;
DLSCH_alloc_pdu.dai = 0;
DLSCH_alloc_pdu.harq_pid = 1;
DLSCH_alloc_pdu.mcs = openair_daq_vars.target_ue_dl_mcs;
DLSCH_alloc_pdu.ndi = 1;
DLSCH_alloc_pdu.rv = 0;
memcpy((void*)&DCI_pdu->dci_alloc[0].dci_pdu[0],(void *)&DLSCH_alloc_pdu,sizeof(DCI1_5MHz_TDD_t));
/*
//user2
DCI_pdu->dci_alloc[1].dci_length = sizeof_DCI1_5MHz_TDD_t;
DCI_pdu->dci_alloc[1].L = 2;
DCI_pdu->dci_alloc[1].rnti = 0x1236;
DCI_pdu->dci_alloc[1].format = format1;
DCI_pdu->dci_alloc[1].ra_flag = 0;
DLSCH_alloc_pdu.rballoc = rballoc2;
DLSCH_alloc_pdu.TPC = 0;
DLSCH_alloc_pdu.dai = 0;
DLSCH_alloc_pdu.harq_pid = 1;
DLSCH_alloc_pdu.mcs = openair_daq_vars.target_ue_dl_mcs;
DLSCH_alloc_pdu.ndi = 1;
DLSCH_alloc_pdu.rv = 0;
memcpy((void*)&DCI_pdu->dci_alloc[1].dci_pdu[0],(void *)&DLSCH_alloc_pdu,sizeof(DCI1_5MHz_TDD_t));
*/
} else if (transmission_mode==5) {
DCI_pdu->Num_ue_spec_dci = 2;
// user 1
DCI_pdu->dci_alloc[0].dci_length = sizeof_DCI1E_5MHz_2A_M10PRB_TDD_t;
DCI_pdu->dci_alloc[0].L = 2;
DCI_pdu->dci_alloc[0].rnti = 0x1235;
DCI_pdu->dci_alloc[0].format = format1E_2A_M10PRB;
DCI_pdu->dci_alloc[0].ra_flag = 0;
DLSCH_alloc_pdu1E.tpmi = 5; //5=use feedback
DLSCH_alloc_pdu1E.rv = 0;
DLSCH_alloc_pdu1E.ndi = 1;
DLSCH_alloc_pdu1E.mcs = openair_daq_vars.target_ue_dl_mcs;
DLSCH_alloc_pdu1E.harq_pid = 1;
DLSCH_alloc_pdu1E.dai = 0;
DLSCH_alloc_pdu1E.TPC = 0;
DLSCH_alloc_pdu1E.rballoc = openair_daq_vars.ue_dl_rb_alloc;
DLSCH_alloc_pdu1E.rah = 0;
DLSCH_alloc_pdu1E.dl_power_off = 0; //0=second user present
memcpy((void*)&DCI_pdu->dci_alloc[0].dci_pdu[0],(void *)&DLSCH_alloc_pdu1E,sizeof(DCI1E_5MHz_2A_M10PRB_TDD_t));
//user 2
DCI_pdu->dci_alloc[1].dci_length = sizeof_DCI1E_5MHz_2A_M10PRB_TDD_t;
DCI_pdu->dci_alloc[1].L = 2;
DCI_pdu->dci_alloc[1].rnti = 0x1236;
DCI_pdu->dci_alloc[1].format = format1E_2A_M10PRB;
DCI_pdu->dci_alloc[1].ra_flag = 0;
memcpy((void*)&DCI_pdu->dci_alloc[1].dci_pdu[0],(void *)&DLSCH_alloc_pdu1E,sizeof(DCI1E_5MHz_2A_M10PRB_TDD_t));
// set the precoder of the second UE orthogonal to the first
phy_vars_eNB->eNB_UE_stats[1].DL_pmi_single = (phy_vars_eNB->eNB_UE_stats[0].DL_pmi_single ^ 0x1555);
}
break;
case 7:
DCI_pdu->Num_common_dci = 1;
DCI_pdu->dci_alloc[0].dci_length = sizeof_DCI1A_5MHz_TDD_1_6_t;
DCI_pdu->dci_alloc[0].L = 2;
DCI_pdu->dci_alloc[0].rnti = 0xbeef;
DCI_pdu->dci_alloc[0].format = format1A;
DCI_pdu->dci_alloc[0].ra_flag = 1;
RA_alloc_pdu.type = 1;
RA_alloc_pdu.vrb_type = 0;
RA_alloc_pdu.rballoc = computeRIV(25,12,3);
RA_alloc_pdu.ndi = 1;
RA_alloc_pdu.rv = 1;
RA_alloc_pdu.mcs = 4;
RA_alloc_pdu.harq_pid = 0;
RA_alloc_pdu.TPC = 1;
memcpy((void*)&DCI_pdu->dci_alloc[0].dci_pdu[0],&RA_alloc_pdu,sizeof(DCI1A_5MHz_TDD_1_6_t));
break;
case 9:
DCI_pdu->Num_ue_spec_dci = 1;
//user 1
DCI_pdu->dci_alloc[0].dci_length = sizeof_DCI0_5MHz_TDD_1_6_t ;
DCI_pdu->dci_alloc[0].L = 2;
DCI_pdu->dci_alloc[0].rnti = 0x1235;
DCI_pdu->dci_alloc[0].format = format0;
DCI_pdu->dci_alloc[0].ra_flag = 0;
UL_alloc_pdu.type = 0;
UL_alloc_pdu.hopping = 0;
UL_alloc_pdu.rballoc = computeRIV(25,0,openair_daq_vars.ue_ul_nb_rb);
UL_alloc_pdu.mcs = openair_daq_vars.target_ue_ul_mcs;
UL_alloc_pdu.ndi = 1;
UL_alloc_pdu.TPC = 0;
UL_alloc_pdu.cshift = 0;
UL_alloc_pdu.dai = 0;
UL_alloc_pdu.cqi_req = 1;
memcpy((void*)&DCI_pdu->dci_alloc[0].dci_pdu[0],(void *)&UL_alloc_pdu,sizeof(DCI0_5MHz_TDD_1_6_t));
/*
//user 2
DCI_pdu->dci_alloc[1].dci_length = sizeof_DCI0_5MHz_TDD_1_6_t ;
DCI_pdu->dci_alloc[1].L = 2;
DCI_pdu->dci_alloc[1].rnti = 0x1236;
DCI_pdu->dci_alloc[1].format = format0;
DCI_pdu->dci_alloc[1].ra_flag = 0;
UL_alloc_pdu.type = 0;
UL_alloc_pdu.hopping = 0;
if (cooperation_flag==0)
UL_alloc_pdu.rballoc = computeRIV(25,2+openair_daq_vars.ue_ul_nb_rb,openair_daq_vars.ue_ul_nb_rb);
else
UL_alloc_pdu.rballoc = computeRIV(25,0,openair_daq_vars.ue_ul_nb_rb);
UL_alloc_pdu.mcs = openair_daq_vars.target_ue_ul_mcs;
UL_alloc_pdu.ndi = 1;
UL_alloc_pdu.TPC = 0;
if ((cooperation_flag==0) || (cooperation_flag==1))
UL_alloc_pdu.cshift = 0;
else
UL_alloc_pdu.cshift = 1;
UL_alloc_pdu.dai = 0;
UL_alloc_pdu.cqi_req = 1;
memcpy((void*)&DCI_pdu->dci_alloc[1].dci_pdu[0],(void *)&UL_alloc_pdu,sizeof(DCI0_5MHz_TDD_1_6_t));
*/
break;
default:
break;
}
DCI_pdu->nCCE = 0;
for (i=0; i<DCI_pdu->Num_common_dci+DCI_pdu->Num_ue_spec_dci; i++) {
DCI_pdu->nCCE += (1<<(DCI_pdu->dci_alloc[i].L));
}
}
openair1/SCHED/phy_procedures_lte_eNb.c
+98 -797
View File
File diff suppressed because it is too large Load Diff
openair1/SCHED/phy_procedures_lte_ue.c
+131 -171
View File
@@ -59,20 +59,15 @@ extern int card;
#endif
#endif
//#define DEBUG_PHY_PROC
#define UE_TX_POWER (-10)
#define DEBUG_PHY_PROC
//#ifdef OPENAIR2
#ifndef PUCCH
#define PUCCH
#endif
//#endif
//#ifdef OPENAIR2
#include "LAYER2/MAC/extern.h"
#include "LAYER2/MAC/defs.h"
#include "UTIL/LOG/log.h"
//#endif
#ifdef EMOS
fifo_dump_emos_UE emos_dump_UE;
@@ -87,9 +82,6 @@ fifo_dump_emos_UE emos_dump_UE;
# endif
#endif
#ifndef OPENAIR2
//#define DIAG_PHY
#endif
#define DLSCH_RB_ALLOC 0x1fbf // skip DC RB (total 23/25 RBs)
#define DLSCH_RB_ALLOC_12 0x0aaa // skip DC RB (total 23/25 RBs)
@@ -454,7 +446,7 @@ uint16_t get_n1_pucch(PHY_VARS_UE *phy_vars_ue,
if (frame_parms->frame_type == FDD ) { // FDD
sf = (subframe<4)? subframe+6 : subframe-4;
printf("n1_pucch_UE: subframe %d, nCCE %d\n",sf,phy_vars_ue->lte_ue_pdcch_vars[eNB_id]->nCCE[sf]);
LOG_D(PHY,"n1_pucch_UE: subframe %d, nCCE %d\n",sf,phy_vars_ue->lte_ue_pdcch_vars[eNB_id]->nCCE[sf]);
if (SR == 0)
return(frame_parms->pucch_config_common.n1PUCCH_AN + phy_vars_ue->lte_ue_pdcch_vars[eNB_id]->nCCE[sf]);
@@ -642,16 +634,12 @@ void phy_procedures_emos_UE_TX(uint8_t next_slot,uint8_t eNB_id) {
#endif
int dummy_tx_buffer[3840*4] __attribute__((aligned(16)));
#ifndef OPENAIR2
PRACH_RESOURCES_t prach_resources_local;
#endif
void phy_procedures_UE_TX(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t abstraction_flag,runmode_t mode,relaying_type_t r_type)
{
#ifndef OPENAIR2
int i;
#endif
uint16_t first_rb, nb_rb;
uint8_t harq_pid;
unsigned int input_buffer_length;
@@ -724,8 +712,7 @@ void phy_procedures_UE_TX(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t abstra
subframe_tx);
#ifdef OPENAIR2
if (phy_vars_ue->mac_enabled == 1) {
if ((phy_vars_ue->ulsch_ue_Msg3_active[eNB_id] == 1) &&
(phy_vars_ue->ulsch_ue_Msg3_frame[eNB_id] == frame_tx) &&
(phy_vars_ue->ulsch_ue_Msg3_subframe[eNB_id] == subframe_tx)) { // Initial Transmission of Msg3
@@ -756,8 +743,7 @@ void phy_procedures_UE_TX(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t abstra
Msg3_flag=0;
}
#endif
}
if (phy_vars_ue->ulsch_ue[eNB_id]->harq_processes[harq_pid]->subframe_scheduling_flag == 1) {
@@ -856,19 +842,17 @@ void phy_procedures_UE_TX(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t abstra
#endif
stop_meas(&phy_vars_ue->ulsch_encoding_stats);
#ifdef OPENAIR2
// signal MAC that Msg3 was sent
mac_xface->Msg3_transmitted(Mod_id,
CC_id,
frame_tx,
eNB_id);
#endif
if (phy_vars_ue->mac_enabled == 1) {
// signal MAC that Msg3 was sent
mac_xface->Msg3_transmitted(Mod_id,
CC_id,
frame_tx,
eNB_id);
}
} else {
input_buffer_length = phy_vars_ue->ulsch_ue[eNB_id]->harq_processes[harq_pid]->TBS/8;
#ifdef OPENAIR2
if (phy_vars_ue->mac_enabled==1) {
// LOG_D(PHY,"[UE %d] ULSCH : Searching for MAC SDUs\n",Mod_id);
if (phy_vars_ue->ulsch_ue[eNB_id]->harq_processes[harq_pid]->round==0) {
//if (phy_vars_ue->ulsch_ue[eNB_id]->harq_processes[harq_pid]->calibration_flag == 0) {
@@ -905,7 +889,8 @@ void phy_procedures_UE_TX(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t abstra
LOG_T(PHY,"\n");
#endif
#endif
#else //OPENAIR2
}
else {
// the following lines were necessary for the calibration in CROWN
/*
if (phy_vars_ue->ulsch_ue[eNB_id]->harq_processes[harq_pid]->calibration_flag == 0) {
@@ -928,8 +913,8 @@ void phy_procedures_UE_TX(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t abstra
for (i=0;i<input_buffer_length;i++)
ulsch_input_buffer[i]= i;
*/
}
#endif //OPENAIR2
start_meas(&phy_vars_ue->ulsch_encoding_stats);
if (abstraction_flag==0) {
@@ -961,12 +946,13 @@ void phy_procedures_UE_TX(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t abstra
}
if (abstraction_flag == 0) {
#ifdef OPENAIR2
pusch_power_cntl(phy_vars_ue,subframe_tx,eNB_id,1, abstraction_flag);
phy_vars_ue->tx_power_dBm = phy_vars_ue->ulsch_ue[eNB_id]->Po_PUSCH;
#else
phy_vars_ue->tx_power_dBm = UE_TX_POWER;
#endif
if (phy_vars_ue->mac_enabled==1) {
pusch_power_cntl(phy_vars_ue,subframe_tx,eNB_id,1, abstraction_flag);
phy_vars_ue->tx_power_dBm = phy_vars_ue->ulsch_ue[eNB_id]->Po_PUSCH;
}
else {
phy_vars_ue->tx_power_dBm = phy_vars_ue->tx_power_max_dBm;
}
phy_vars_ue->tx_total_RE = nb_rb*12;
#if defined(EXMIMO) || defined(OAI_USRP) || defined(OAI_BLADERF) || defined(OAI_LMSSDR)
@@ -1023,17 +1009,19 @@ void phy_procedures_UE_TX(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t abstra
if (is_SR_TXOp(phy_vars_ue,eNB_id,subframe_tx)==1) {
LOG_D(PHY,"[UE %d][SR %x] Frame %d subframe %d: got SR_TXOp, Checking for SR for PUSCH from MAC\n",
Mod_id,phy_vars_ue->lte_ue_pdcch_vars[eNB_id]->crnti,frame_tx,subframe_tx);
#ifdef OPENAIR2
SR_payload = mac_xface->ue_get_SR(Mod_id,
CC_id,
frame_tx,
eNB_id,
phy_vars_ue->lte_ue_pdcch_vars[eNB_id]->crnti,
subframe_tx); // subframe used for meas gap
#else
SR_payload = 1;
#endif
if (phy_vars_ue->mac_enabled==1) {
SR_payload = mac_xface->ue_get_SR(Mod_id,
CC_id,
frame_tx,
eNB_id,
phy_vars_ue->lte_ue_pdcch_vars[eNB_id]->crnti,
subframe_tx); // subframe used for meas gap
}
else {
SR_payload = 1;
}
if (SR_payload>0) {
generate_ul_signal = 1;
LOG_D(PHY,"[UE %d][SR %x] Frame %d subframe %d got the SR for PUSCH is %d\n",
@@ -1041,8 +1029,9 @@ void phy_procedures_UE_TX(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t abstra
} else {
phy_vars_ue->sr[subframe_tx]=0;
}
} else
} else {
SR_payload=0;
}
if (get_ack(&phy_vars_ue->lte_frame_parms,
phy_vars_ue->dlsch_ue[eNB_id][0]->harq_ack,
@@ -1057,12 +1046,13 @@ void phy_procedures_UE_TX(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t abstra
pucch_ack_payload,
SR_payload);
#ifdef OPENAIR2
Po_PUCCH = pucch_power_cntl(phy_vars_ue,subframe_tx,eNB_id,format);
phy_vars_ue->tx_power_dBm = Po_PUCCH;
#else
phy_vars_ue->tx_power_dBm = UE_TX_POWER;
#endif
if (phy_vars_ue->mac_enabled == 1) {
Po_PUCCH = pucch_power_cntl(phy_vars_ue,subframe_tx,eNB_id,format);
}
else {
Po_PUCCH = phy_vars_ue->tx_power_max_dBm;
}
phy_vars_ue->tx_power_dBm = Po_PUCCH;
phy_vars_ue->tx_total_RE = 12;
#if defined(EXMIMO) || defined(OAI_USRP) || defined(OAI_BLADERF) || defined(OAI_LMSSDR)
@@ -1120,12 +1110,13 @@ void phy_procedures_UE_TX(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t abstra
}
} else if (SR_payload==1) { // no ACK/NAK but SR is triggered by MAC
#ifdef OPENAIR2
Po_PUCCH = pucch_power_cntl(phy_vars_ue,subframe_tx,eNB_id,pucch_format1);
phy_vars_ue->tx_power_dBm = Po_PUCCH;
#else
phy_vars_ue->tx_power_dBm = UE_TX_POWER;
#endif
if (phy_vars_ue->mac_enabled == 1) {
Po_PUCCH = pucch_power_cntl(phy_vars_ue,subframe_tx,eNB_id,pucch_format1);
}
else {
Po_PUCCH = phy_vars_ue->tx_power_max_dBm;
}
phy_vars_ue->tx_power_dBm = Po_PUCCH;
phy_vars_ue->tx_total_RE = 12;
#if defined(EXMIMO) || defined(OAI_USRP) || defined(OAI_BLADERF) || defined(OAI_LMSSDR)
@@ -1345,30 +1336,23 @@ void phy_procedures_UE_TX(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t abstra
// }// slot_tx is even
// else { // slot_tx is odd, do the PRACH here
#ifdef OPENAIR2
if ((phy_vars_ue->UE_mode[eNB_id] == PRACH) && (phy_vars_ue->lte_frame_parms.prach_config_common.prach_Config_enabled==1)) {
#else
if (1) {
#endif
// check if we have PRACH opportunity
if (is_prach_subframe(&phy_vars_ue->lte_frame_parms,frame_tx,subframe_tx)) {
phy_vars_ue->generate_prach=0;
#ifdef OPENAIR2
// ask L2 for RACH transport
if ((mode != rx_calib_ue) && (mode != rx_calib_ue_med) && (mode != rx_calib_ue_byp) && (mode != no_L2_connect) ) {
phy_vars_ue->prach_resources[eNB_id] = mac_xface->ue_get_rach(Mod_id,
CC_id,
frame_tx,
eNB_id,
subframe_tx);
// LOG_I(PHY,"Got prach_resources for eNB %d address %d, RRCCommon %d\n",eNB_id,phy_vars_ue->prach_resources[eNB_id],UE_mac_inst[Mod_id].radioResourceConfigCommon);
}
#endif
if (phy_vars_ue->mac_enabled==1){
// ask L2 for RACH transport
if ((mode != rx_calib_ue) && (mode != rx_calib_ue_med) && (mode != rx_calib_ue_byp) && (mode != no_L2_connect) ) {
phy_vars_ue->prach_resources[eNB_id] = mac_xface->ue_get_rach(Mod_id,
CC_id,
frame_tx,
eNB_id,
subframe_tx);
// LOG_I(PHY,"Got prach_resources for eNB %d address %d, RRCCommon %d\n",eNB_id,phy_vars_ue->prach_resources[eNB_id],UE_mac_inst[Mod_id].radioResourceConfigCommon);
}
}
if (phy_vars_ue->prach_resources[eNB_id]!=NULL) {
@@ -1391,16 +1375,13 @@ void phy_procedures_UE_TX(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t abstra
phy_vars_ue->prach_resources[eNB_id]->ra_TDD_map_index,
phy_vars_ue->prach_resources[eNB_id]->ra_RNTI);
#ifdef OPENAIR2
if (mode != calib_prach_tx)
if ((phy_vars_ue->mac_enabled==1) && (mode != calib_prach_tx)) {
phy_vars_ue->tx_power_dBm = phy_vars_ue->prach_resources[eNB_id]->ra_PREAMBLE_RECEIVED_TARGET_POWER+get_PL(Mod_id,CC_id,eNB_id);
}
else {
phy_vars_ue->tx_power_dBm = phy_vars_ue->tx_power_max_dBm;
phy_vars_ue->prach_resources[eNB_id]->ra_PreambleIndex = 19;
}
#else
phy_vars_ue->tx_power_dBm = UE_TX_POWER;
#endif
phy_vars_ue->tx_total_RE = 96;
@@ -1431,12 +1412,12 @@ void phy_procedures_UE_TX(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t abstra
} else {
UE_transport_info[Mod_id][CC_id].cntl.prach_flag=1;
UE_transport_info[Mod_id][CC_id].cntl.prach_id=phy_vars_ue->prach_resources[eNB_id]->ra_PreambleIndex;
#ifdef OPENAIR2
mac_xface->Msg1_transmitted(Mod_id,
CC_id,
frame_tx,
eNB_id);
#endif
if (phy_vars_ue->mac_enabled==1){
mac_xface->Msg1_transmitted(Mod_id,
CC_id,
frame_tx,
eNB_id);
}
}
LOG_D(PHY,"[UE %d][RAPROC] Frame %d, subframe %d: Generating PRACH (eNB %d) preamble index %d for UL, TX power %d dBm (PL %d dB), l3msg \n",
@@ -1822,11 +1803,11 @@ void lte_ue_pbch_procedures(uint8_t eNB_id,PHY_VARS_UE *phy_vars_ue,uint8_t abst
frame_tx += ((int)(phy_vars_ue->lte_ue_pbch_vars[eNB_id]->decoded_output[1]&0xfc));
frame_tx += pbch_phase;
#ifdef OPENAIR2
mac_xface->dl_phy_sync_success(phy_vars_ue->Mod_id,frame_rx,eNB_id,
phy_vars_ue->UE_mode[eNB_id]==NOT_SYNCHED ? 1 : 0);
#endif
if (phy_vars_ue->mac_enabled==1) {
mac_xface->dl_phy_sync_success(phy_vars_ue->Mod_id,frame_rx,eNB_id,
phy_vars_ue->UE_mode[eNB_id]==NOT_SYNCHED ? 1 : 0);
}
#ifdef EMOS
//emos_dump_UE.frame_tx = frame_tx;
//emos_dump_UE.mimo_mode = phy_vars_ue->lte_ue_pbch_vars[eNB_id]->decoded_output[1];
@@ -1906,16 +1887,15 @@ void lte_ue_pbch_procedures(uint8_t eNB_id,PHY_VARS_UE *phy_vars_ue,uint8_t abst
phy_vars_ue->Mod_id,frame_rx, slot_rx);
phy_vars_ue->lte_ue_pbch_vars[eNB_id]->pdu_errors_conseq++;
phy_vars_ue->lte_ue_pbch_vars[eNB_id]->pdu_errors++;
#ifdef OPENAIR2
mac_xface->out_of_sync_ind(phy_vars_ue->Mod_id,frame_rx,eNB_id);
#else
if (phy_vars_ue->lte_ue_pbch_vars[eNB_id]->pdu_errors_conseq>=100) {
LOG_E(PHY,"More that 100 consecutive PBCH errors! Exiting!\n");
mac_xface->macphy_exit("More that 100 consecutive PBCH errors!");
if (phy_vars_ue->mac_enabled == 1) {
mac_xface->out_of_sync_ind(phy_vars_ue->Mod_id,frame_rx,eNB_id);
}
else{
if (phy_vars_ue->lte_ue_pbch_vars[eNB_id]->pdu_errors_conseq>=100) {
LOG_E(PHY,"More that 100 consecutive PBCH errors! Exiting!\n");
mac_xface->macphy_exit("More that 100 consecutive PBCH errors!");
}
}
#endif
}
if (frame_rx % 100 == 0) {
@@ -2105,10 +2085,10 @@ int lte_ue_pdcch_procedures(uint8_t eNB_id,PHY_VARS_UE *phy_vars_ue,uint8_t abst
#ifdef DEBUG_PHY_PROC
// if (subframe_rx == 9) { //( frame_rx % 100 == 0) {
if ( frame_rx % 100 == 0) {
LOG_D(PHY,"frame %d, subframe %d, rnti %x: dci %d/%d\n",frame_rx,subframe_rx,phy_vars_ue->lte_ue_pdcch_vars[eNB_id]->crnti,i,dci_cnt);
//dump_dci(&phy_vars_ue->lte_frame_parms, &dci_alloc_rx[i]);
// }
dump_dci(&phy_vars_ue->lte_frame_parms, &dci_alloc_rx[i]);
}
#endif
@@ -2416,9 +2396,7 @@ int phy_procedures_UE_RX(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t abstrac
int eNB_id_i = 1;
uint8_t dual_stream_UE = 0;
#endif
#ifndef OPENAIR2
uint8_t *rar;
#endif
int pmch_flag=0;
uint8_t sync_area=255;
int pmch_mcs=-1;
@@ -2427,9 +2405,7 @@ int phy_procedures_UE_RX(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t abstrac
int slot_rx = phy_vars_ue->slot_rx;
int subframe_rx = slot_rx>>1;
int subframe_prev = (subframe_rx+9)%10;
#ifdef OPENAIR2
int CC_id = phy_vars_ue->CC_id;
#endif
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_UE_RX, VCD_FUNCTION_IN);
@@ -2684,7 +2660,6 @@ int phy_procedures_UE_RX(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t abstrac
phy_vars_ue->dlsch_ue[eNB_id][0]->harq_processes[harq_pid]->rvidx,
phy_vars_ue->dlsch_ue[eNB_id][0]->harq_processes[harq_pid]->mcs,
phy_vars_ue->dlsch_ue[eNB_id][0]->harq_processes[harq_pid]->TBS);
} else {
LOG_D(PHY,"[UE %d][PDSCH %x/%d] Frame %d subframe %d (slot_rx %d): Received DLSCH (rv %d,mcs %d,TBS %d)\n",
phy_vars_ue->Mod_id,phy_vars_ue->dlsch_ue[eNB_id][0]->rnti,
@@ -2703,14 +2678,14 @@ int phy_procedures_UE_RX(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t abstrac
LOG_T(PHY,"\n");
#endif
#endif
#ifdef OPENAIR2
mac_xface->ue_send_sdu(phy_vars_ue->Mod_id,
CC_id,
frame_rx,
phy_vars_ue->dlsch_ue[eNB_id][0]->harq_processes[phy_vars_ue->dlsch_ue[eNB_id][0]->current_harq_pid]->b,
phy_vars_ue->dlsch_ue[eNB_id][0]->harq_processes[phy_vars_ue->dlsch_ue[eNB_id][0]->current_harq_pid]->TBS>>3,
eNB_id);
#endif
if (phy_vars_ue->mac_enabled == 1) {
mac_xface->ue_send_sdu(phy_vars_ue->Mod_id,
CC_id,
frame_rx,
phy_vars_ue->dlsch_ue[eNB_id][0]->harq_processes[phy_vars_ue->dlsch_ue[eNB_id][0]->current_harq_pid]->b,
phy_vars_ue->dlsch_ue[eNB_id][0]->harq_processes[phy_vars_ue->dlsch_ue[eNB_id][0]->current_harq_pid]->TBS>>3,
eNB_id);
}
phy_vars_ue->total_TBS[eNB_id] = phy_vars_ue->total_TBS[eNB_id] +
phy_vars_ue->dlsch_ue[eNB_id][0]->harq_processes[phy_vars_ue->dlsch_ue[eNB_id][0]->current_harq_pid]->TBS;
phy_vars_ue->total_received_bits[eNB_id] = phy_vars_ue->total_TBS[eNB_id] +
@@ -2880,24 +2855,20 @@ int phy_procedures_UE_RX(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t abstrac
phy_vars_ue->dlsch_ue_SI[eNB_id]->harq_processes[0]->rb_alloc_even[3]);
#endif
#ifdef OPENAIR2
/*
printf("\n\n");
for (i=0;i<phy_vars_ue->dlsch_ue_SI[eNB_id]->harq_processes[0]->TBS>>3;i++)
printf("%02x ",phy_vars_ue->dlsch_ue_SI[eNB_id]->harq_processes[0]->b[i]);
printf("\n");
*/
mac_xface->ue_decode_si(phy_vars_ue->Mod_id,
CC_id,
frame_rx,
eNB_id,
phy_vars_ue->dlsch_ue_SI[eNB_id]->harq_processes[0]->b,
phy_vars_ue->dlsch_ue_SI[eNB_id]->harq_processes[0]->TBS>>3);
/*
if ((frame_rx % 160) < 10)
printf("sending SI to L2 in frame %d\n",frame_rx);
*/
#endif
if (phy_vars_ue->mac_enabled == 1) {
/*
printf("\n\n");
for (i=0;i<phy_vars_ue->dlsch_ue_SI[eNB_id]->harq_processes[0]->TBS>>3;i++)
printf("%02x ",phy_vars_ue->dlsch_ue_SI[eNB_id]->harq_processes[0]->b[i]);
printf("\n");
*/
mac_xface->ue_decode_si(phy_vars_ue->Mod_id,
CC_id,
frame_rx,
eNB_id,
phy_vars_ue->dlsch_ue_SI[eNB_id]->harq_processes[0]->b,
phy_vars_ue->dlsch_ue_SI[eNB_id]->harq_processes[0]->TBS>>3);
}
}
}
@@ -3013,8 +2984,7 @@ int phy_procedures_UE_RX(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t abstrac
subframe_prev, phy_vars_ue->UE_mode[eNB_id]);
#endif
#ifdef OPENAIR2
if (phy_vars_ue->mac_enabled == 1) {
if ((phy_vars_ue->UE_mode[eNB_id] != PUSCH) && (phy_vars_ue->prach_resources[eNB_id]->Msg3!=NULL)) {
LOG_D(PHY,"[UE %d][RAPROC] Frame %d subframe %d Invoking MAC for RAR (current preamble %d)\n",
phy_vars_ue->Mod_id,frame_rx-((subframe_prev==9) ? 1 : 0),
@@ -3071,14 +3041,13 @@ int phy_procedures_UE_RX(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t abstrac
phy_vars_ue->prach_resources[eNB_id]->ra_PreambleIndex);
}
} // mode != PUSCH
#else //OPENAIR2
rar = phy_vars_ue->dlsch_ue_ra[eNB_id]->harq_processes[0]->b+1;
timing_advance = ((((uint16_t)(rar[0]&0x7f))<<4) + (rar[1]>>4));
//timing_advance = phy_vars_ue->dlsch_ue_ra[eNB_id]->harq_processes[0]->b[0];
process_timing_advance_rar(phy_vars_ue,timing_advance);
#endif
}
else {
rar = phy_vars_ue->dlsch_ue_ra[eNB_id]->harq_processes[0]->b+1;
timing_advance = ((((uint16_t)(rar[0]&0x7f))<<4) + (rar[1]>>4));
//timing_advance = phy_vars_ue->dlsch_ue_ra[eNB_id]->harq_processes[0]->b[0];
process_timing_advance_rar(phy_vars_ue,timing_advance);
}
} //ret <= MAX_ITERATIONS
/*
@@ -3630,24 +3599,21 @@ void phy_procedures_UE_lte(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t abstr
int CC_id =0;
#endif
int frame_rx = phy_vars_ue->frame_rx;
#ifdef OPENAIR2
int frame_tx = phy_vars_ue->frame_tx;
#endif
int slot_rx = phy_vars_ue->slot_rx;
int slot_tx = phy_vars_ue->slot_tx;
int subframe_tx = slot_tx>>1;
int subframe_rx = slot_rx>>1;
#undef DEBUG_PHY_PROC
#ifdef OPENAIR2
UE_L2_STATE_t ret;
#endif
#ifndef OPENAIR2
phy_vars_ue->UE_mode[eNB_id]=PUSCH;
phy_vars_ue->prach_resources[eNB_id] = &prach_resources_local;
prach_resources_local.ra_RNTI = 0xbeef;
prach_resources_local.ra_PreambleIndex = 0;
#endif
if (phy_vars_ue->mac_enabled == 0) {
phy_vars_ue->UE_mode[eNB_id]=PUSCH;
phy_vars_ue->prach_resources[eNB_id] = &prach_resources_local;
prach_resources_local.ra_RNTI = 0xbeef;
prach_resources_local.ra_PreambleIndex = 0;
}
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_UE_LTE,1);
@@ -3846,16 +3812,14 @@ void phy_procedures_UE_lte(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t abstr
phy_procedures_UE_RX(phy_vars_ue,eNB_id,abstraction_flag,mode,r_type,phy_vars_rn);
}
#ifdef OPENAIR2
if (slot_rx%2==0) {
ret = mac_xface->ue_scheduler(phy_vars_ue->Mod_id,
frame_tx,
subframe_rx,
subframe_select(&phy_vars_ue->lte_frame_parms,subframe_tx),
eNB_id,
0/*FIXME CC_id*/);
if (phy_vars_ue->mac_enabled==1) {
if (slot_rx%2==0) {
ret = mac_xface->ue_scheduler(phy_vars_ue->Mod_id,
frame_tx,
subframe_rx,
subframe_select(&phy_vars_ue->lte_frame_parms,subframe_tx),
eNB_id,
0/*FIXME CC_id*/);
if (ret == CONNECTION_LOST) {
LOG_E(PHY,"[UE %d] Frame %d, subframe %d RRC Connection lost, returning to PRACH\n",phy_vars_ue->Mod_id,
@@ -3874,11 +3838,7 @@ void phy_procedures_UE_lte(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t abstr
phy_vars_ue->UE_mode[eNB_id] = PRACH;
}
}
#endif
// if (last_slot == 19)
// phy_vars_ue->frame++;
}
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_UE_LTE,0);
stop_meas(&phy_vars_ue->phy_proc);
openair2/LAYER2/MAC/l1_helpers.c
+4 -3
View File
@@ -47,8 +47,8 @@ int8_t get_Po_NOMINAL_PUSCH(module_id_t module_idP,uint8_t CC_id)
if (CC_id>0) {
LOG_E(MAC,"Transmission on secondary CCs is not supported yet\n");
mac_xface->macphy_exit("MAC FATAL CC_id>0");
return 0; // not reached
//mac_xface->macphy_exit("MAC FATAL CC_id>0");
return 0;
}
if (UE_mac_inst[module_idP].radioResourceConfigCommon) {
@@ -56,7 +56,8 @@ int8_t get_Po_NOMINAL_PUSCH(module_id_t module_idP,uint8_t CC_id)
}
else {
LOG_E(MAC,"[UE %d] CCid %d FATAL radioResourceConfigCommon is NULL !!!\n",module_idP,CC_id);
mac_xface->macphy_exit("FATAL radioResourceConfigCommon is NULL");
//mac_xface->macphy_exit("FATAL radioResourceConfigCommon is NULL");
return 0;
}
return(-120 + (rach_ConfigCommon->powerRampingParameters.preambleInitialReceivedTargetPower<<1) +
targets/RT/USER/lte-softmodem.c
+67 -85
View File
@@ -293,6 +293,7 @@ static int tx_max_power[MAX_NUM_CCs]; /* = {0,0}*/;
char rf_config_file[1024];
int chain_offset=0;
int phy_test = 0;
#ifndef EXMIMO
char ref[128] = "internal";
@@ -472,7 +473,7 @@ void help (void) {
printf(" -d Enable soft scope and L1 and L2 stats (Xforms)\n");
printf(" -F Calibrate the EXMIMO borad, available files: exmimo2_2arxg.lime exmimo2_2brxg.lime \n");
printf(" -g Set the global log level, valide options: (9:trace, 8/7:debug, 6:info, 4:warn, 3:error)\n");
printf(" -G Set the global log level \n");
printf(" -G Set the global log verbosity \n");
printf(" -h provides this help message!\n");
printf(" -K Generate ITTI analyzser logs (similar to wireshark logs but with more details)\n");
printf(" -m Set the maximum downlink MCS\n");
@@ -577,12 +578,12 @@ static void *scope_thread(void *arg)
0,7);
} else {
#ifdef OPENAIR2
len = dump_eNB_l2_stats (stats_buffer, 0);
//fl_set_object_label(form_stats_l2->stats_text, stats_buffer);
fl_clear_browser(form_stats_l2->stats_text);
fl_add_browser_line(form_stats_l2->stats_text, stats_buffer);
#endif
if (PHY_vars_eNB_g[0][0]->mac_enabled==1) {
len = dump_eNB_l2_stats (stats_buffer, 0);
//fl_set_object_label(form_stats_l2->stats_text, stats_buffer);
fl_clear_browser(form_stats_l2->stats_text);
fl_add_browser_line(form_stats_l2->stats_text, stats_buffer);
}
len = dump_eNB_stats (PHY_vars_eNB_g[0][0], stats_buffer, 0);
if (MAX_NUM_CCs>1)
@@ -2117,7 +2118,8 @@ static void get_options (int argc, char **argv)
LONG_OPTION_SCANCARRIER,
LONG_OPTION_MAXPOWER,
LONG_OPTION_DUMP_FRAME,
LONG_OPTION_LOOPMEMORY
LONG_OPTION_LOOPMEMORY,
LONG_OPTION_PHYTEST
};
static const struct option long_options[] = {
@@ -2135,6 +2137,7 @@ static void get_options (int argc, char **argv)
{"ue-max-power", required_argument, NULL, LONG_OPTION_MAXPOWER},
{"ue-dump-frame", no_argument, NULL, LONG_OPTION_DUMP_FRAME},
{"loop-memory", required_argument, NULL, LONG_OPTION_LOOPMEMORY},
{"phy-test", no_argument, NULL, LONG_OPTION_PHYTEST},
{NULL, 0, NULL, 0}
};
@@ -2214,9 +2217,14 @@ static void get_options (int argc, char **argv)
AssertFatal(input_fd != NULL,"Please provide an input file\n");
break;
case LONG_OPTION_DUMP_FRAME:
mode = rx_dump_frame;
break;
case LONG_OPTION_DUMP_FRAME:
mode = rx_dump_frame;
break;
case LONG_OPTION_PHYTEST:
phy_test = 1;
break;
case 'A':
timing_advance = atoi (optarg);
break;
@@ -2272,7 +2280,6 @@ static void get_options (int argc, char **argv)
case 't':
target_ul_mcs = atoi (optarg);
break;
#ifdef OPENAIR2
case 'W':
opt_enabled=1;
@@ -2307,7 +2314,6 @@ static void get_options (int argc, char **argv)
}
break;
#endif
case 'V':
ouput_vcd = 1;
@@ -2415,8 +2421,8 @@ static void get_options (int argc, char **argv)
case 'x':
transmission_mode = atoi(optarg);
if (transmission_mode > 2) {
printf("Transmission mode > 2 (%d) not supported for the moment\n",transmission_mode);
if (transmission_mode > 7) {
printf("Transmission mode %d not supported for the moment\n",transmission_mode);
exit(-1);
}
break;
@@ -2511,8 +2517,6 @@ static void get_options (int argc, char **argv)
}
#ifdef OPENAIR2
init_all_otg(0);
g_otg->seed = 0;
init_seeds(g_otg->seed);
@@ -2530,7 +2534,6 @@ static void get_options (int argc, char **argv)
init_predef_traffic(enb_properties->properties[i]->num_otg_elements, 1);
#endif
glog_level = enb_properties->properties[i]->glog_level;
glog_verbosity = enb_properties->properties[i]->glog_verbosity;
@@ -2592,9 +2595,7 @@ int main( int argc, char **argv )
int CC_id;
uint16_t Nid_cell = 0;
uint8_t cooperation_flag=0, abstraction_flag=0;
#ifndef OPENAIR2
uint8_t beta_ACK=0,beta_RI=0,beta_CQI=2;
#endif
#ifdef ENABLE_TCXO
unsigned int tcxo = 114;
@@ -2662,8 +2663,8 @@ int main( int argc, char **argv )
if (UE_flag==1) {
printf("configuring for UE\n");
set_comp_log(HW, LOG_INFO, LOG_HIGH, 1);
set_comp_log(PHY, LOG_INFO, LOG_HIGH, 1);
set_comp_log(HW, LOG_DEBUG, LOG_HIGH, 1);
set_comp_log(PHY, LOG_DEBUG, LOG_HIGH, 1);
set_comp_log(MAC, LOG_INFO, LOG_HIGH, 1);
set_comp_log(RLC, LOG_INFO, LOG_HIGH, 1);
set_comp_log(PDCP, LOG_INFO, LOG_HIGH, 1);
@@ -2679,15 +2680,9 @@ int main( int argc, char **argv )
printf("configuring for eNB\n");
set_comp_log(HW, hw_log_level, hw_log_verbosity, 1);
#ifdef OPENAIR2
set_comp_log(PHY, phy_log_level, phy_log_verbosity, 1);
if (opt_enabled == 1 )
set_comp_log(OPT, opt_log_level, opt_log_verbosity, 1);
#else
set_comp_log(PHY, LOG_INFO, LOG_HIGH, 1);
#endif
set_comp_log(MAC, mac_log_level, mac_log_verbosity, 1);
set_comp_log(RLC, rlc_log_level, rlc_log_verbosity, 1);
set_comp_log(PDCP, pdcp_log_level, pdcp_log_verbosity, 1);
@@ -2743,8 +2738,6 @@ int main( int argc, char **argv )
MSC_INIT(MSC_E_UTRAN, THREAD_MAX+TASK_MAX);
#endif
#ifdef OPENAIR2
if (opt_type != OPT_NONE) {
radio_type_t radio_type;
@@ -2757,7 +2750,6 @@ int main( int argc, char **argv )
LOG_E(OPT,"failed to run OPT \n");
}
#endif
#ifdef PDCP_USE_NETLINK
netlink_init();
#if defined(PDCP_USE_NETLINK_QUEUES)
@@ -2827,21 +2819,24 @@ int main( int argc, char **argv )
PHY_vars_UE_g[0][CC_id] = init_lte_UE(frame_parms[CC_id], 0,abstraction_flag,transmission_mode);
UE[CC_id] = PHY_vars_UE_g[0][CC_id];
printf("PHY_vars_UE_g[0][%d] = %p\n",CC_id,UE[CC_id]);
#ifndef OPENAIR2
for (i=0; i<NUMBER_OF_CONNECTED_eNB_MAX; i++) {
UE[CC_id]->pusch_config_dedicated[i].betaOffset_ACK_Index = beta_ACK;
UE[CC_id]->pusch_config_dedicated[i].betaOffset_RI_Index = beta_RI;
UE[CC_id]->pusch_config_dedicated[i].betaOffset_CQI_Index = beta_CQI;
if (phy_test==1)
UE[CC_id]->mac_enabled = 0;
else
UE[CC_id]->mac_enabled = 1;
UE[CC_id]->scheduling_request_config[i].sr_PUCCH_ResourceIndex = 0;
UE[CC_id]->scheduling_request_config[i].sr_ConfigIndex = 7+(0%3);
UE[CC_id]->scheduling_request_config[i].dsr_TransMax = sr_n4;
if (UE[CC_id]->mac_enabled == 0) {
for (i=0; i<NUMBER_OF_CONNECTED_eNB_MAX; i++) {
UE[CC_id]->pusch_config_dedicated[i].betaOffset_ACK_Index = beta_ACK;
UE[CC_id]->pusch_config_dedicated[i].betaOffset_RI_Index = beta_RI;
UE[CC_id]->pusch_config_dedicated[i].betaOffset_CQI_Index = beta_CQI;
UE[CC_id]->scheduling_request_config[i].sr_PUCCH_ResourceIndex = 0;
UE[CC_id]->scheduling_request_config[i].sr_ConfigIndex = 7+(0%3);
UE[CC_id]->scheduling_request_config[i].dsr_TransMax = sr_n4;
}
}
#endif
UE[CC_id]->UE_scan = UE_scan;
UE[CC_id]->UE_scan_carrier = UE_scan_carrier;
UE[CC_id]->mode = mode;
@@ -2850,13 +2845,12 @@ int main( int argc, char **argv )
UE[CC_id]->lte_frame_parms.frame_type,
UE[CC_id]->X_u);
UE[CC_id]->lte_ue_pdcch_vars[0]->crnti = 0x1234;
#ifndef OPENAIR2
UE[CC_id]->lte_ue_pdcch_vars[0]->crnti = 0x1235;
#endif
if (UE[CC_id]->mac_enabled == 1)
UE[CC_id]->lte_ue_pdcch_vars[0]->crnti = 0x1234;
else
UE[CC_id]->lte_ue_pdcch_vars[0]->crnti = 0x1235;
#ifdef EXMIMO
for (i=0; i<4; i++) {
UE[CC_id]->rx_gain_max[i] = rxg_max[i];
UE[CC_id]->rx_gain_med[i] = rxg_med[i];
@@ -2890,9 +2884,7 @@ int main( int argc, char **argv )
UE[CC_id]->tx_power_max_dBm = tx_max_power[CC_id];
#ifdef EXMIMO
//N_TA_offset
if (UE[CC_id]->lte_frame_parms.frame_type == TDD) {
if (UE[CC_id]->lte_frame_parms.N_RB_DL == 100)
@@ -2904,7 +2896,6 @@ int main( int argc, char **argv )
} else {
UE[CC_id]->N_TA_offset = 0;
}
#else
//already taken care of in lte-softmodem
UE[CC_id]->N_TA_offset = 0;
@@ -2928,20 +2919,23 @@ int main( int argc, char **argv )
PHY_vars_eNB_g[0][CC_id] = init_lte_eNB(frame_parms[CC_id],0,frame_parms[CC_id]->Nid_cell,cooperation_flag,transmission_mode,abstraction_flag);
PHY_vars_eNB_g[0][CC_id]->CC_id = CC_id;
#ifndef OPENAIR2
if (phy_test==1)
PHY_vars_eNB_g[0][CC_id]->mac_enabled = 0;
else
PHY_vars_eNB_g[0][CC_id]->mac_enabled = 1;
for (i=0; i<NUMBER_OF_UE_MAX; i++) {
PHY_vars_eNB_g[0][CC_id]->pusch_config_dedicated[i].betaOffset_ACK_Index = beta_ACK;
PHY_vars_eNB_g[0][CC_id]->pusch_config_dedicated[i].betaOffset_RI_Index = beta_RI;
PHY_vars_eNB_g[0][CC_id]->pusch_config_dedicated[i].betaOffset_CQI_Index = beta_CQI;
PHY_vars_eNB_g[0][CC_id]->scheduling_request_config[i].sr_PUCCH_ResourceIndex = i;
PHY_vars_eNB_g[0][CC_id]->scheduling_request_config[i].sr_ConfigIndex = 7+(i%3);
PHY_vars_eNB_g[0][CC_id]->scheduling_request_config[i].dsr_TransMax = sr_n4;
if (PHY_vars_eNB_g[0][CC_id]->mac_enabled == 0) {
for (i=0; i<NUMBER_OF_UE_MAX; i++) {
PHY_vars_eNB_g[0][CC_id]->pusch_config_dedicated[i].betaOffset_ACK_Index = beta_ACK;
PHY_vars_eNB_g[0][CC_id]->pusch_config_dedicated[i].betaOffset_RI_Index = beta_RI;
PHY_vars_eNB_g[0][CC_id]->pusch_config_dedicated[i].betaOffset_CQI_Index = beta_CQI;
PHY_vars_eNB_g[0][CC_id]->scheduling_request_config[i].sr_PUCCH_ResourceIndex = i;
PHY_vars_eNB_g[0][CC_id]->scheduling_request_config[i].sr_ConfigIndex = 7+(i%3);
PHY_vars_eNB_g[0][CC_id]->scheduling_request_config[i].dsr_TransMax = sr_n4;
}
}
#endif
compute_prach_seq(&PHY_vars_eNB_g[0][CC_id]->lte_frame_parms.prach_config_common,
PHY_vars_eNB_g[0][CC_id]->lte_frame_parms.frame_type,
PHY_vars_eNB_g[0][CC_id]->X_u);
@@ -3150,16 +3144,12 @@ int main( int argc, char **argv )
mac_xface = malloc(sizeof(MAC_xface));
#ifdef OPENAIR2
int eMBMS_active=0;
l2_init(frame_parms[0],eMBMS_active,(uecap_xer_in==1)?uecap_xer:NULL,
0,// cba_group_active
0); // HO flag
#endif
0,// cba_group_active
0); // HO flag
mac_xface->macphy_exit = &exit_fun;
#if defined(ENABLE_ITTI)
@@ -3172,15 +3162,14 @@ int main( int argc, char **argv )
printf("ITTI tasks created\n");
#endif
#ifdef OPENAIR2
if (UE_flag==1) {
printf("Filling UE band info\n");
fill_ue_band_info();
mac_xface->dl_phy_sync_success (0, 0, 0, 1);
} else
mac_xface->mrbch_phy_sync_failure (0, 0, 0);
#endif
if (phy_test==0) {
if (UE_flag==1) {
printf("Filling UE band info\n");
fill_ue_band_info();
mac_xface->dl_phy_sync_success (0, 0, 0, 1);
} else
mac_xface->mrbch_phy_sync_failure (0, 0, 0);
}
/* #ifdef OPENAIR2
//if (otg_enabled) {
@@ -3571,9 +3560,6 @@ int main( int argc, char **argv )
}
}
#ifdef OPENAIR2
//cleanup_pdcp_thread();
#endif
#ifdef RTAI
stop_rt_timer();
@@ -3608,13 +3594,9 @@ int main( int argc, char **argv )
if (ouput_vcd)
VCD_SIGNAL_DUMPER_CLOSE();
#ifdef OPENAIR2
if (opt_enabled == 1)
terminate_opt();
#endif
logClean();
return 0;
targets/RT/USER/lte-ue.c
+1 -4
View File
@@ -925,9 +925,7 @@ static void *UE_thread_rx(void *arg)
phy_procedures_UE_RX( UE, 0, 0, UE->mode, no_relay, NULL );
}
#ifdef OPENAIR2
if (i==0) {
if ((UE->mac_enabled==1) && (i==0)) {
ret = mac_xface->ue_scheduler(UE->Mod_id,
UE->frame_tx,
UE->slot_rx>>1,
@@ -950,7 +948,6 @@ static void *UE_thread_rx(void *arg)
}
}
#endif
UE->slot_rx++;
if (UE->slot_rx == 20) {
targets/SIMU/USER/oaisim_functions.c
+21
View File
@@ -136,6 +136,8 @@ int td = 0;
int td_avg = 0;
int sleep_time_us = 0;
int phy_test = 0;
#ifdef OPENAIR2
// omv related info
//pid_t omv_pid;
@@ -209,6 +211,7 @@ void get_simulation_options(int argc, char *argv[])
LONG_OPTION_CBA_BACKOFF_TIMER,
LONG_OPTION_PHYTEST,
LONG_OPTION_XFORMS,
};
@@ -241,6 +244,7 @@ void get_simulation_options(int argc, char *argv[])
{"cba-backoff", required_argument, 0, LONG_OPTION_CBA_BACKOFF_TIMER},
{"phy-test", no_argument, NULL, LONG_OPTION_PHYTEST},
{"xforms", no_argument, 0, LONG_OPTION_XFORMS},
{NULL, 0, NULL, 0}
@@ -248,6 +252,10 @@ void get_simulation_options(int argc, char *argv[])
while ((option = getopt_long (argc, argv, "aA:b:B:c:C:D:d:eE:f:FGg:hHi:IJ:j:k:K:l:L:m:M:n:N:oO:p:P:qQ:rR:s:S:t:T:u:U:vV:w:W:x:X:y:Y:z:Z:", long_options, NULL)) != -1) {
switch (option) {
case LONG_OPTION_PHYTEST:
phy_test = 1;
break;
case LONG_OPTION_ENB_CONF:
if (optarg) {
free(conf_config_file_name); // prevent memory leak if option is used multiple times
@@ -986,6 +994,14 @@ void init_openair1(void)
}
}
for (eNB_id=0; eNB_id<NB_eNB_INST; eNB_id++)
for (CC_id=0; CC_id<MAX_NUM_CCs; CC_id++) {
if (phy_test==1)
PHY_vars_eNB_g[eNB_id][CC_id]->mac_enabled=0;
else
PHY_vars_eNB_g[eNB_id][CC_id]->mac_enabled=1;
}
// init_ue_status();
for (UE_id=0; UE_id<NB_UE_INST; UE_id++)
for (CC_id=0; CC_id<MAX_NUM_CCs; CC_id++) {
@@ -1002,6 +1018,11 @@ void init_openair1(void)
PHY_vars_UE_g[UE_id][CC_id]->UE_mode[0] = PRACH;
}
if (phy_test==1)
PHY_vars_UE_g[UE_id][CC_id]->mac_enabled=0;
else
PHY_vars_UE_g[UE_id][CC_id]->mac_enabled=1;
PHY_vars_UE_g[UE_id][CC_id]->lte_ue_pdcch_vars[0]->crnti = 0x1235 + UE_id;
PHY_vars_UE_g[UE_id][CC_id]->current_dlsch_cqi[0] = 10;