Use fptr for preproc and align UL PP definition
This commit is contained in:
@@ -266,10 +266,11 @@ void RCconfig_macrlc(int macrlc_has_f1[MAX_MAC_INST]) {
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void *d = dlsym(NULL, s);
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AssertFatal(d, "%s(): no default scheduler DL algo '%s' found\n", __func__, s);
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// release default, add new
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RC.mac[j]->dl_algo.unset(&RC.mac[j]->dl_algo.data);
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RC.mac[j]->dl_algo = *(default_sched_dl_algo_t *) d;
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RC.mac[j]->dl_algo.data = RC.mac[j]->dl_algo.setup();
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LOG_I(ENB_APP, "using default scheduler DL algo '%s'\n", RC.mac[j]->dl_algo.name);
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pp_impl_param_t *dl_pp = &RC.mac[j]->pre_processor_dl;
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dl_pp->dl_algo.unset(&dl_pp->dl_algo.data);
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dl_pp->dl_algo = *(default_sched_dl_algo_t *) d;
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dl_pp->dl_algo.data = dl_pp->dl_algo.setup();
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LOG_I(ENB_APP, "using default scheduler DL algo '%s'\n", dl_pp->dl_algo.name);
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}// j=0..num_inst
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} /*else {// MacRLC_ParamList.numelt > 0 // ignore it
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@@ -573,10 +573,7 @@ schedule_ue_spec(module_id_t module_idP,
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VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_DLSCH_PREPROCESSOR,
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VCD_FUNCTION_IN);
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start_meas(&eNB->schedule_dlsch_preprocessor);
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dlsch_scheduler_pre_processor(module_idP,
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CC_id,
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frameP,
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subframeP);
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eNB->pre_processor_dl.dl(module_idP, CC_id, frameP, subframeP);
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stop_meas(&eNB->schedule_dlsch_preprocessor);
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VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_DLSCH_PREPROCESSOR,
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VCD_FUNCTION_OUT);
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@@ -2199,6 +2199,12 @@ add_new_ue(module_id_t mod_idP,
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UE_info->active[UE_id] = TRUE;
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add_ue_list(&UE_info->list, UE_id);
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dump_ue_list(&UE_info->list);
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pp_impl_param_t* dl = &RC.mac[mod_idP]->pre_processor_dl;
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if (dl->slices) // inform slice implementation about new UE
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dl->add_UE(dl->slices, UE_id);
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pp_impl_param_t* ul = &RC.mac[mod_idP]->pre_processor_ul;
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if (ul->slices) // inform slice implementation about new UE
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ul->add_UE(ul->slices, UE_id);
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if (IS_SOFTMODEM_IQPLAYER)// not specific to record/playback ?
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UE_info->UE_template[cc_idP][UE_id].pre_assigned_mcs_ul = 0;
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UE_info->UE_template[cc_idP][UE_id].rach_resource_type = rach_resource_type;
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@@ -2262,6 +2268,12 @@ rrc_mac_remove_ue(module_id_t mod_idP,
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UE_info->num_UEs--;
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remove_ue_list(&UE_info->list, UE_id);
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pp_impl_param_t* dl = &RC.mac[mod_idP]->pre_processor_dl;
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if (dl->slices) // inform slice implementation about new UE
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dl->remove_UE(dl->slices, UE_id);
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pp_impl_param_t* ul = &RC.mac[mod_idP]->pre_processor_ul;
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if (ul->slices) // inform slice implementation about new UE
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ul->remove_UE(ul->slices, UE_id);
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/* Clear all remaining pending transmissions */
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memset(&UE_info->UE_template[pCC_id][UE_id], 0, sizeof(UE_TEMPLATE));
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@@ -1301,11 +1301,11 @@ schedule_ulsch_rnti(module_id_t module_idP,
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/*
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* ULSCH preprocessor: set UE_template->
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* pre_allocated_nb_rb_ul[slice_idx]
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* pre_allocated_nb_rb_ul
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* pre_assigned_mcs_ul
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* pre_allocated_rb_table_index_ul
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*/
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ulsch_scheduler_pre_processor(module_idP, CC_id, frameP, subframeP, sched_frame, sched_subframeP);
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mac->pre_processor_ul.ul(module_idP, CC_id, frameP, subframeP, sched_frame, sched_subframeP);
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for (int UE_id = UE_info->list.head; UE_id >= 0; UE_id = UE_info->list.next[UE_id]) {
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if (UE_info->UE_template[CC_id][UE_id].rach_resource_type > 0)
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@@ -540,7 +540,6 @@ typedef enum {
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SCHED_MODE_FAIR_RR /// fair raund robin
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} SCHEDULER_MODES;
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/*! \brief temporary struct for ULSCH sched */
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typedef struct {
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rnti_t rnti;
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@@ -1199,6 +1198,56 @@ typedef struct {
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void *data;
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} default_sched_ul_algo_t;
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typedef void (*pp_impl_dl)(module_id_t mod_id,
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int CC_id,
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frame_t frame,
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sub_frame_t subframe);
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typedef void (*pp_impl_ul)(module_id_t mod_id,
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int CC_id,
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frame_t frame,
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sub_frame_t subframe,
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frame_t sched_frame,
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sub_frame_t sched_subframe);
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struct slice_info_s;
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typedef struct {
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int algorithm;
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/// inform the slice algorithm about a new UE
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void (*add_UE)(struct slice_info_s *s, int UE_id);
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/// inform the slice algorithm about a UE that disconnected
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void (*remove_UE)(struct slice_info_s *s, int UE_id);
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/// move a UE to a slice in DL/UL, -1 means don't move (no-op).
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void (*move_UE)(struct slice_info_s *s, int UE_id, int idx);
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/// Adds a new slice through admission control. slice_params are
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/// algorithm-specific parameters. sched is either a default_sched_ul_algo_t
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/// or default_sched_dl_algo_t, depending on whether this implementation
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/// handles UL/DL. If slice at index exists, updates existing
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/// slice. Returns index of new slice or -1 on failure.
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int (*addmod_slice)(struct slice_info_s *s,
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int id,
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char *label,
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void *sched,
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void *slice_params);
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/// Returns slice through slice_idx. 1 if successful, 0 if not.
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int (*remove_slice)(struct slice_info_s *s, uint8_t slice_idx);
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union {
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pp_impl_dl dl;
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pp_impl_ul ul;
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};
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union {
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default_sched_ul_algo_t ul_algo;
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default_sched_dl_algo_t dl_algo;
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};
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void (*destroy)(struct slice_info_s **s);
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struct slice_info_s *slices;
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} pp_impl_param_t;
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/*! \brief eNB common channels */
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typedef struct {
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int physCellId;
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@@ -1354,9 +1403,11 @@ typedef struct eNB_MAC_INST_s {
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UE_free_list_t UE_free_list;
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/// for scheduling selection
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SCHEDULER_MODES scheduler_mode;
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/// scheduling algorithm used in default scheduler
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default_sched_dl_algo_t dl_algo;
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default_sched_ul_algo_t ul_algo;
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/// Default scheduler: Pre-processor implementation. Algorithms for UL/DL
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/// are called by ULSCH/DLSCH, respectively. Pro-processor implementation can
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/// encapsulate slicing.
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pp_impl_param_t pre_processor_dl;
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pp_impl_param_t pre_processor_ul;
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int32_t puSch10xSnr;
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int32_t puCch10xSnr;
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@@ -674,10 +674,10 @@ void set_ul_DAI(int module_idP,
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void ulsch_scheduler_pre_processor(module_id_t module_idP,
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int CC_id,
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int frameP,
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frame_t frameP,
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sub_frame_t subframeP,
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int sched_frameP,
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unsigned char sched_subframeP);
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frame_t sched_frameP,
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sub_frame_t sched_subframeP);
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int phy_stats_exist(module_id_t Mod_id, int rnti);
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@@ -99,16 +99,21 @@ void mac_top_init_eNB(void)
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}
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mac[i]->if_inst = IF_Module_init(i);
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mac[i]->pre_processor_dl.dl = dlsch_scheduler_pre_processor;
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char *s = "round_robin_dl";
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void *d = dlsym(NULL, s);
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AssertFatal(d, "%s(): no scheduler algo '%s' found\n", __func__, s);
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mac[i]->dl_algo = *(default_sched_dl_algo_t *) d;
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mac[i]->dl_algo.data = mac[i]->dl_algo.setup();
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mac[i]->pre_processor_dl.dl_algo = *(default_sched_dl_algo_t *) d;
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mac[i]->pre_processor_dl.dl_algo.data = mac[i]->pre_processor_dl.dl_algo.setup();
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mac[i]->pre_processor_ul.ul = ulsch_scheduler_pre_processor;
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s = "round_robin_ul";
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d = dlsym(NULL, s);
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AssertFatal(d, "%s(): no scheduler algo '%s' found\n", __func__, s);
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mac[i]->ul_algo = *(default_sched_ul_algo_t *) d;
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mac[i]->ul_algo.data = mac[i]->ul_algo.setup();
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mac[i]->pre_processor_ul.ul_algo = *(default_sched_ul_algo_t *) d;
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mac[i]->pre_processor_ul.ul_algo.data = mac[i]->pre_processor_ul.ul_algo.setup();
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init_UE_info(&mac[i]->UE_info);
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}
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@@ -703,15 +703,15 @@ dlsch_scheduler_pre_processor(module_id_t Mod_id,
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n_rbg_sched += rbgalloc_mask[i];
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}
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mac->dl_algo.run(Mod_id,
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CC_id,
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frameP,
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subframeP,
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&UE_to_sched,
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4, // max_num_ue
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n_rbg_sched,
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rbgalloc_mask,
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mac->dl_algo.data);
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mac->pre_processor_dl.dl_algo.run(Mod_id,
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CC_id,
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frameP,
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subframeP,
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&UE_to_sched,
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4, // max_num_ue
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n_rbg_sched,
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rbgalloc_mask,
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mac->pre_processor_dl.dl_algo.data);
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// the following block is meant for validation of the pre-processor to check
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// whether all UE allocations are non-overlapping and is not necessary for
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@@ -1080,10 +1080,10 @@ default_sched_ul_algo_t round_robin_ul = {
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void ulsch_scheduler_pre_processor(module_id_t Mod_id,
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int CC_id,
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int frameP,
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frame_t frameP,
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sub_frame_t subframeP,
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int sched_frameP,
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unsigned char sched_subframeP) {
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frame_t sched_frameP,
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sub_frame_t sched_subframeP) {
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eNB_MAC_INST *mac = RC.mac[Mod_id];
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UE_info_t *UE_info = &mac->UE_info;
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const int N_RB_UL = to_prb(mac->common_channels[CC_id].ul_Bandwidth);
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@@ -1140,17 +1140,17 @@ void ulsch_scheduler_pre_processor(module_id_t Mod_id,
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}
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}
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mac->ul_algo.run(Mod_id,
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CC_id,
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frameP,
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subframeP,
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sched_frameP,
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sched_subframeP,
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&UE_to_sched,
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4, // max_num_ue
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n_contig,
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rbs,
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mac->ul_algo.data);
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mac->pre_processor_ul.ul_algo.run(Mod_id,
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CC_id,
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frameP,
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subframeP,
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sched_frameP,
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sched_subframeP,
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&UE_to_sched,
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4, // max_num_ue
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n_contig,
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rbs,
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mac->pre_processor_ul.ul_algo.data);
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// the following block is meant for validation of the pre-processor to check
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// whether all UE allocations are non-overlapping and is not necessary for
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