Use gold cache for PDCCH decoding, scrambling, unscrambling
This commit is contained in:
committed by
Robert Schmidt
parent
0316431e27
commit
99c8dd420a
@@ -143,31 +143,11 @@ int phy_init_nr_gNB(PHY_VARS_gNB *gNB)
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gNB->max_nb_pdsch = MAX_MOBILES_PER_GNB;
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init_delay_table(fp->ofdm_symbol_size, MAX_DELAY_COMP, NR_MAX_OFDM_SYMBOL_SIZE, fp->delay_table);
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//PDCCH DMRS init
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gNB->nr_gold_pdcch_dmrs = (uint32_t ***)malloc16(fp->slots_per_frame*sizeof(uint32_t **));
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uint32_t ***pdcch_dmrs = gNB->nr_gold_pdcch_dmrs;
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AssertFatal(pdcch_dmrs!=NULL, "NR init: pdcch_dmrs malloc failed\n");
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gNB->bad_pucch = 0;
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if (gNB->TX_AMP == 0)
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gNB->TX_AMP = AMP;
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// ceil(((NB_RB<<1)*3)/32) // 3 RE *2(QPSK)
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int pdcch_dmrs_init_length = (((fp->N_RB_DL<<1)*3)>>5)+1;
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for (int slot=0; slot<fp->slots_per_frame; slot++) {
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pdcch_dmrs[slot] = (uint32_t **)malloc16(fp->symbols_per_slot*sizeof(uint32_t *));
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AssertFatal(pdcch_dmrs[slot]!=NULL, "NR init: pdcch_dmrs for slot %d - malloc failed\n", slot);
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for (int symb=0; symb<fp->symbols_per_slot; symb++) {
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pdcch_dmrs[slot][symb] = (uint32_t *)malloc16(pdcch_dmrs_init_length*sizeof(uint32_t));
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LOG_D(PHY,"pdcch_dmrs[%d][%d] %p\n",slot,symb,pdcch_dmrs[slot][symb]);
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AssertFatal(pdcch_dmrs[slot][symb]!=NULL, "NR init: pdcch_dmrs for slot %d symbol %d - malloc failed\n", slot, symb);
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}
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}
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nr_generate_modulation_table();
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gNB->pdcch_gold_init = cfg->cell_config.phy_cell_id.value;
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nr_init_pdcch_dmrs(gNB, cfg->cell_config.phy_cell_id.value);
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nr_init_pbch_interleaver(gNB->nr_pbch_interleaver);
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//PDSCH DMRS init
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@@ -340,14 +320,6 @@ void phy_free_nr_gNB(PHY_VARS_gNB *gNB)
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free_and_zero(meas->n0_subband_power);
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free_and_zero(meas->n0_subband_power_dB);
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uint32_t ***pdcch_dmrs = gNB->nr_gold_pdcch_dmrs;
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for (int slot = 0; slot < fp->slots_per_frame; slot++) {
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for (int symb = 0; symb < fp->symbols_per_slot; symb++)
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free_and_zero(pdcch_dmrs[slot][symb]);
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free_and_zero(pdcch_dmrs[slot]);
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}
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free_and_zero(pdcch_dmrs);
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uint32_t ****pdsch_dmrs = gNB->nr_gold_pdsch_dmrs;
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for (int slot = 0; slot < fp->slots_per_frame; slot++) {
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for (int symb = 0; symb < fp->symbols_per_slot; symb++) {
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@@ -304,23 +304,6 @@ int init_nr_ue_signal(PHY_VARS_NR_UE *ue, int nb_connected_gNB)
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common_vars->rxdata[i] = malloc16_clear(num_samples * sizeof(c16_t));
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}
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// ceil(((NB_RB<<1)*3)/32) // 3 RE *2(QPSK)
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int pdcch_dmrs_init_length = (((fp->N_RB_DL<<1)*3)>>5)+1;
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//PDCCH DMRS init (gNB offset = 0)
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ue->nr_gold_pdcch[0] = malloc16(fp->slots_per_frame * sizeof(uint32_t **));
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uint32_t ***pdcch_dmrs = ue->nr_gold_pdcch[0];
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AssertFatal(pdcch_dmrs!=NULL, "NR init: pdcch_dmrs malloc failed\n");
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for (int slot=0; slot<fp->slots_per_frame; slot++) {
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pdcch_dmrs[slot] = malloc16(fp->symbols_per_slot * sizeof(uint32_t *));
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AssertFatal(pdcch_dmrs[slot]!=NULL, "NR init: pdcch_dmrs for slot %d - malloc failed\n", slot);
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for (int symb=0; symb<fp->symbols_per_slot; symb++) {
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pdcch_dmrs[slot][symb] = malloc16(pdcch_dmrs_init_length * sizeof(uint32_t));
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AssertFatal(pdcch_dmrs[slot][symb]!=NULL, "NR init: pdcch_dmrs for slot %d symbol %d - malloc failed\n", slot, symb);
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}
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}
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// ceil(((NB_RB*6(k)*2(QPSK)/32) // 3 RE *2(QPSK)
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int pdsch_dmrs_init_length = ((fp->N_RB_DL*12)>>5)+1;
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@@ -425,13 +408,6 @@ void term_nr_ue_signal(PHY_VARS_NR_UE *ue, int nb_connected_gNB)
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}
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free_and_zero(common_vars->rxdata);
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for (int slot = 0; slot < fp->slots_per_frame; slot++) {
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for (int symb = 0; symb < fp->symbols_per_slot; symb++)
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free_and_zero(ue->nr_gold_pdcch[0][slot][symb]);
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free_and_zero(ue->nr_gold_pdcch[0][slot]);
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}
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free_and_zero(ue->nr_gold_pdcch[0]);
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for (int slot=0; slot<fp->slots_per_frame; slot++) {
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for (int symb=0; symb<fp->symbols_per_slot; symb++) {
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for (int q=0; q<NR_NB_NSCID; q++)
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@@ -21,28 +21,6 @@
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#include "nr_refsig.h"
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void nr_init_pdcch_dmrs(PHY_VARS_gNB* gNB, uint32_t Nid)
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{
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NR_DL_FRAME_PARMS *fp = &gNB->frame_parms;
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uint32_t ***pdcch_dmrs = gNB->nr_gold_pdcch_dmrs;
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int pdcch_dmrs_init_length = (((fp->N_RB_DL << 1) * 3) >> 5) + 1;
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for (int slot = 0; slot < fp->slots_per_frame; slot++) {
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for (int symb = 0; symb < fp->symbols_per_slot; symb++) {
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uint8_t reset = 1;
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uint32_t x1 = 0;
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uint64_t temp_x2 = ((1UL << 17) * (fp->symbols_per_slot * slot + symb + 1) * ((Nid << 1) + 1) + (Nid << 1));
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uint32_t x2 = temp_x2 % (1U << 31);
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LOG_D(PHY,"PDCCH DMRS slot %d, symb %d, Nid %d, x2 %x\n", slot, symb, Nid, x2);
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for (uint32_t n = 0; n < pdcch_dmrs_init_length; n++) {
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pdcch_dmrs[slot][symb][n] = lte_gold_generic(&x1, &x2, reset);
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reset = 0;
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}
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}
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}
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}
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void nr_init_pdsch_dmrs(PHY_VARS_gNB* gNB, uint8_t nscid, uint32_t Nid)
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{
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NR_DL_FRAME_PARMS *fp = &gNB->frame_parms;
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@@ -22,27 +22,6 @@
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#include "refsig_defs_ue.h"
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#include "openair1/PHY/LTE_TRANSPORT/transport_proto.h" // for lte_gold_generic()
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void nr_gold_pdcch(PHY_VARS_NR_UE* ue,
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unsigned short nid)
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{
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int pdcch_dmrs_init_length = (((ue->frame_parms.N_RB_DL << 1) * 3) >> 5) + 1;
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for (int ns = 0; ns < ue->frame_parms.slots_per_frame; ns++) {
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for (int l = 0; l < ue->frame_parms.symbols_per_slot; l++) {
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uint8_t reset = 1;
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uint64_t x2tmp0 = ((ue->frame_parms.symbols_per_slot * ns + l + 1) * ((nid << 1) + 1));
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x2tmp0 <<= 17;
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x2tmp0 += (nid << 1);
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uint32_t x1 = 0;
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uint32_t x2 = x2tmp0 % (1U << 31); //cinit
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LOG_D(PHY,"PDCCH DMRS slot %d, symb %d, Nid %d, x2 %x\n", ns, l, nid, x2);
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for (int n = 0; n < pdcch_dmrs_init_length; n++) {
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ue->nr_gold_pdcch[0][ns][l][n] = lte_gold_generic(&x1, &x2, reset);
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reset = 0;
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}
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}
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}
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}
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void nr_gold_pdsch(PHY_VARS_NR_UE* ue,
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int nscid,
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uint32_t nid)
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@@ -39,7 +39,6 @@ void nr_init_prs(PHY_VARS_gNB* gNB);
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@param PHY_VARS_gNB* gNB structure provides configuration, frame parameters and the pointers to the 32 bits sequence storage tables
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@param Nid is used for the initialization of x2, Physical cell Id by default or upper layer configured pdcch_scrambling_ID
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*/
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void nr_init_pdcch_dmrs(PHY_VARS_gNB* gNB, uint32_t Nid);
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void nr_init_pdsch_dmrs(PHY_VARS_gNB* gNB, uint8_t nscid, uint32_t Nid);
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void nr_init_csi_rs(const NR_DL_FRAME_PARMS *fp, uint32_t ***csi_rs, uint32_t Nid);
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@@ -26,5 +26,6 @@
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uint32_t *gold_cache(uint32_t key, int length);
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uint32_t *nr_gold_pbch(int Lmax, int Nid, int n_hf, int ssb);
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uint32_t *nr_gold_pdcch(int N_RB_DL, int symbols_per_slot, unsigned short n_idDMRS, int ns, int l);
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#endif
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@@ -172,3 +172,14 @@ uint32_t *nr_gold_pbch(int Lmax, int Nid, int n_hf, int l)
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uint32_t x2 = (1 << 11) * (i_ssb2 + 1) * ((Nid >> 2) + 1) + (1 << 6) * (i_ssb2 + 1) + (Nid & 3);
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return gold_cache(x2, NR_PBCH_DMRS_LENGTH_DWORD);
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}
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uint32_t *nr_gold_pdcch(int N_RB_DL, int symbols_per_slot, unsigned short nid, int ns, int l)
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{
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int pdcch_dmrs_init_length = (((N_RB_DL << 1) * 3) >> 5) + 1;
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uint64_t x2tmp0 = (((uint64_t)symbols_per_slot * ns + l + 1) * ((nid << 1) + 1));
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x2tmp0 <<= 17;
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x2tmp0 += (nid << 1);
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uint32_t x2 = x2tmp0 % (1U << 31); // cinit
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LOG_D(PHY, "PDCCH DMRS slot %d, symb %d, Nid %d, x2 %x\n", ns, l, nid, x2);
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return gold_cache(x2, pdcch_dmrs_init_length);
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}
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@@ -51,9 +51,6 @@ int nr_pdsch_dmrs_rx(const PHY_VARS_NR_UE *ue,
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unsigned short nb_pdsch_rb,
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uint8_t config_type);
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void nr_gold_pdcch(PHY_VARS_NR_UE* ue,
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unsigned short n_idDMRS);
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void nr_gold_pdsch(PHY_VARS_NR_UE* ue,
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int nscid,
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uint32_t nid);
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@@ -41,29 +41,13 @@
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//#define DEBUG_DCI
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//#define DEBUG_CHANNEL_CODING
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void nr_pdcch_scrambling(uint32_t *in,
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uint32_t size,
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uint32_t Nid,
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uint32_t scrambling_RNTI,
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uint32_t *out) {
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uint8_t reset;
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uint32_t x1 = 0, x2 = 0, s = 0;
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reset = 1;
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x2 = (scrambling_RNTI<<16) + Nid;
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LOG_D(NR_PHY_DCI, "PDCCH Scrambling x2 %x : scrambling_RNTI %x \n", x2, scrambling_RNTI);
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for (int i=0; i<size; i++) {
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if ((i&0x1f)==0) {
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s = lte_gold_generic(&x1, &x2, reset);
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reset = 0;
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if (i) {
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in++;
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out++;
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}
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}
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(*out) ^= ((((*in)>>(i&0x1f))&1) ^ ((s>>(i&0x1f))&1))<<(i&0x1f);
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}
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static void nr_pdcch_scrambling(uint32_t *in, uint32_t size, uint32_t Nid, uint32_t scrambling_RNTI, uint32_t *out)
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{
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int roundedSz = ((size + 31) / 32);
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uint32_t *seq = gold_cache((scrambling_RNTI << 16) + Nid, roundedSz);
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LOG_D(NR_PHY_DCI, "PDCCH scrambling_RNTI %x \n", scrambling_RNTI);
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for (int i = 0; i < roundedSz; i++)
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out[i] = in[i] ^ seq[i];
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}
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void nr_generate_dci(PHY_VARS_gNB *gNB,
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@@ -95,13 +79,6 @@ void nr_generate_dci(PHY_VARS_gNB *gNB,
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* in time: by its first slot and its first symbol*/
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const nfapi_nr_dl_dci_pdu_t *dci_pdu = &pdcch_pdu_rel15->dci_pdu[d];
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if(dci_pdu->ScramblingId != gNB->pdcch_gold_init) {
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gNB->pdcch_gold_init = dci_pdu->ScramblingId;
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nr_init_pdcch_dmrs(gNB, dci_pdu->ScramblingId);
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}
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uint32_t **gold_pdcch_dmrs = gNB->nr_gold_pdcch_dmrs[slot];
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cset_start_symb = pdcch_pdu_rel15->StartSymbolIndex;
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cset_nsymb = pdcch_pdu_rel15->DurationSymbols;
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dci_idx = 0;
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@@ -131,9 +108,10 @@ void nr_generate_dci(PHY_VARS_gNB *gNB,
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/// DMRS QPSK modulation
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for (int symb=cset_start_symb; symb<cset_start_symb + pdcch_pdu_rel15->DurationSymbols; symb++) {
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const uint32_t *gold = nr_gold_pdcch(frame_parms->N_RB_DL, frame_parms->symbols_per_slot, dci_pdu->ScramblingId, slot, symb);
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nr_modulation(gold, dmrs_length, DMRS_MOD_ORDER,
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mod_dmrs[symb]); // Qm = 2 as DMRS is QPSK modulated
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nr_modulation(gold_pdcch_dmrs[symb], dmrs_length, DMRS_MOD_ORDER, mod_dmrs[symb]); //Qm = 2 as DMRS is QPSK modulated
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#ifdef DEBUG_PDCCH_DMRS
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if(dci_pdu->RNTI!=0xFFFF) {
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for (int i=0; i<dmrs_length>>1; i++)
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@@ -32,12 +32,6 @@ void nr_generate_dci_top(processingData_L1tx_t *msgTx,
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int16_t amp,
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NR_DL_FRAME_PARMS *frame_parms);
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void nr_pdcch_scrambling(uint32_t *in,
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uint32_t size,
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uint32_t Nid,
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uint32_t n_RNTI,
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uint32_t *out);
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int16_t find_nr_pdcch(int frame,int slot, PHY_VARS_gNB *gNB,find_type_t type);
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void nr_fill_dci(PHY_VARS_gNB *gNB,
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@@ -842,9 +842,7 @@ void nr_pdcch_channel_estimation(PHY_VARS_NR_UE *ue,
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c16_t pdcch_dl_ch_estimates[][pdcch_est_size],
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c16_t rxdataF[][ue->frame_parms.samples_per_slot_wCP])
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{
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int Ns = proc->nr_slot_rx;
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int gNB_id = proc->gNB_id;
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int slot = proc->nr_slot_rx;
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unsigned char aarx;
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unsigned short k;
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unsigned int pilot_cnt;
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@@ -868,8 +866,13 @@ void nr_pdcch_channel_estimation(PHY_VARS_NR_UE *ue,
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unsigned short coreset_start_subcarrier = first_carrier_offset+(BWPStart + coreset_start_rb)*12;
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#ifdef DEBUG_PDCCH
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printf("PDCCH Channel Estimation : gNB_id %d ch_offset %d, OFDM size %d, Ncp=%d, Ns=%d, symbol %d\n",
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gNB_id,ch_offset,ue->frame_parms.ofdm_symbol_size,ue->frame_parms.Ncp,Ns,symbol);
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printf("PDCCH Channel Estimation : gNB_id %d ch_offset %d, OFDM size %d, Ncp=%d, slot=%d, symbol %d\n",
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gNB_id,
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ch_offset,
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ue->frame_parms.ofdm_symbol_size,
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ue->frame_parms.Ncp,
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slot,
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symbol);
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#endif
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#if CH_INTERP
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@@ -879,19 +882,18 @@ void nr_pdcch_channel_estimation(PHY_VARS_NR_UE *ue,
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#endif
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unsigned short scrambling_id = coreset->pdcch_dmrs_scrambling_id;
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// checking if re-initialization of scrambling IDs is needed (should be done here but scrambling ID for PDCCH is not taken from RRC)
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if (scrambling_id != ue->scramblingID_pdcch){
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ue->scramblingID_pdcch = scrambling_id;
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nr_gold_pdcch(ue,ue->scramblingID_pdcch);
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}
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int dmrs_ref = 0;
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if (coreset->CoreSetType == NFAPI_NR_CSET_CONFIG_PDCCH_CONFIG)
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dmrs_ref = BWPStart;
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// generate pilot
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int pilot[(nb_rb_coreset + dmrs_ref) * 3] __attribute__((aligned(16)));
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// Note: pilot returned by the following function is already the complex conjugate of the transmitted DMRS
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nr_pdcch_dmrs_rx(ue, Ns, ue->nr_gold_pdcch[gNB_id][Ns][symbol], (c16_t *)pilot, 2000, (nb_rb_coreset + dmrs_ref));
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nr_pdcch_dmrs_rx(ue,
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slot,
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nr_gold_pdcch(ue->frame_parms.N_RB_DL, ue->frame_parms.symbols_per_slot, scrambling_id, slot, symbol),
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(c16_t *)pilot,
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2000,
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(nb_rb_coreset + dmrs_ref));
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for (aarx=0; aarx<ue->frame_parms.nb_antennas_rx; aarx++) {
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@@ -39,6 +39,7 @@
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#include "PHY/sse_intrin.h"
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#include "common/utils/nr/nr_common.h"
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#include <openair1/PHY/TOOLS/phy_scope_interface.h>
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#include "openair1/PHY/NR_REFSIG/nr_refsig_common.h"
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#include "assertions.h"
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#include "T.h"
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@@ -655,25 +656,13 @@ static void nr_pdcch_unscrambling(c16_t *e_rx,
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uint16_t pdcch_DMRS_scrambling_id,
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int16_t *z2)
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{
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int i;
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uint8_t reset;
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uint32_t x1 = 0, x2 = 0, s = 0;
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uint16_t n_id; //{0,1,...,65535}
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uint32_t rnti = (uint32_t) scrambling_RNTI;
|
||||
reset = 1;
|
||||
// x1 is set in first call to lte_gold_generic
|
||||
n_id = pdcch_DMRS_scrambling_id;
|
||||
x2 = ((rnti << 16) + n_id) % (1U << 31); // this is c_init in 38.211 v15.1.0 Section 7.3.2.3
|
||||
|
||||
LOG_D(NR_PHY_DCI, "PDCCH Unscrambling x2 %x : scrambling_RNTI %x\n", x2, rnti);
|
||||
uint16_t n_id = pdcch_DMRS_scrambling_id;
|
||||
uint32_t *seq = gold_cache(((rnti << 16) + n_id) % (1U << 31), length / 32); // this is c_init in 38.211 v15.1.0 Section 7.3.2.3
|
||||
LOG_D(NR_PHY_DCI, "PDCCH Unscrambling: scrambling_RNTI %x\n", rnti);
|
||||
int16_t *ptr = &e_rx[0].r;
|
||||
for (i = 0; i < length; i++) {
|
||||
if ((i & 0x1f) == 0) {
|
||||
s = lte_gold_generic(&x1, &x2, reset);
|
||||
reset = 0;
|
||||
}
|
||||
|
||||
if (((s >> (i % 32)) & 1) == 1)
|
||||
for (int i = 0; i < length; i++) {
|
||||
if (seq[i / 32] & (1UL << (i % 32)))
|
||||
z2[i] = -ptr[i];
|
||||
else
|
||||
z2[i] = ptr[i];
|
||||
|
||||
@@ -407,10 +407,6 @@ nr_initial_sync_t nr_initial_sync(UE_nr_rxtx_proc_t *proc,
|
||||
// the n_frames we got sync
|
||||
ue->init_sync_frame = n_frames - 1 - res.syncRes.frame_id;
|
||||
|
||||
// compute the scramblingID_pdcch and the gold pdcch
|
||||
ue->scramblingID_pdcch = fp->Nid_cell;
|
||||
nr_gold_pdcch(ue, fp->Nid_cell);
|
||||
|
||||
// compute the scrambling IDs for PDSCH DMRS
|
||||
for (int i = 0; i < NR_NB_NSCID; i++) {
|
||||
ue->scramblingID_dlsch[i] = fp->Nid_cell;
|
||||
|
||||
@@ -609,9 +609,6 @@ typedef struct PHY_VARS_gNB_s {
|
||||
/// PBCH interleaver
|
||||
uint8_t nr_pbch_interleaver[NR_POLAR_PBCH_PAYLOAD_BITS];
|
||||
|
||||
/// PDCCH DMRS sequence
|
||||
uint32_t ***nr_gold_pdcch_dmrs;
|
||||
|
||||
/// PDSCH DMRS sequence
|
||||
uint32_t ****nr_gold_pdsch_dmrs;
|
||||
|
||||
@@ -638,7 +635,6 @@ typedef struct PHY_VARS_gNB_s {
|
||||
/// counter to average prach energh over first 100 prach opportunities
|
||||
int prach_energy_counter;
|
||||
|
||||
int pdcch_gold_init;
|
||||
int pdsch_gold_init[2];
|
||||
int pusch_gold_init[2];
|
||||
|
||||
|
||||
@@ -417,12 +417,6 @@ typedef struct PHY_VARS_NR_UE_s {
|
||||
// Scrambling IDs used in PUSCH DMRS
|
||||
uint16_t scramblingID_ulsch[2];
|
||||
|
||||
/// PDCCH DMRS
|
||||
uint32_t ***nr_gold_pdcch[NUMBER_OF_CONNECTED_eNB_MAX];
|
||||
|
||||
// Scrambling IDs used in PDCCH DMRS
|
||||
uint16_t scramblingID_pdcch;
|
||||
|
||||
/// PUSCH DMRS sequence
|
||||
uint32_t ****nr_gold_pusch_dmrs;
|
||||
|
||||
|
||||
@@ -840,10 +840,6 @@ int main(int argc, char **argv)
|
||||
|
||||
init_nr_ue_transport(UE);
|
||||
|
||||
// compute the scramblingID_pdcch and the gold pdcch
|
||||
UE->scramblingID_pdcch = frame_parms->Nid_cell;
|
||||
nr_gold_pdcch(UE, frame_parms->Nid_cell);
|
||||
|
||||
// compute the scrambling IDs for PDSCH DMRS
|
||||
for (int i = 0; i < 2; i++) {
|
||||
UE->scramblingID_dlsch[i] = frame_parms->Nid_cell;
|
||||
|
||||
Reference in New Issue
Block a user