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TDD config1 initial merge

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This commit is contained in:
jftt_wangshanshan
2018-02-05 15:43:20 +08:00
parent 10d7599d08
commit 9c820805fa
22 changed files with 372 additions and 155 deletions
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nfapi/oai_integration/nfapi_pnf.c
+1 -1
View File
@@ -839,7 +839,7 @@ int pnf_phy_dl_config_req(nfapi_pnf_p7_config_t* pnf_p7, nfapi_dl_config_request
AssertFatal(UE_id<NUMBER_OF_UE_MAX,"returned UE_id %d >= %d(NUMBER_OF_UE_MAX)\n",UE_id,NUMBER_OF_UE_MAX);
LTE_eNB_DLSCH_t *dlsch0 = eNB->dlsch[UE_id][0];
//LTE_eNB_DLSCH_t *dlsch1 = eNB->dlsch[UE_id][1];
int harq_pid = dlsch0->harq_ids[sf];
int harq_pid = dlsch0->harq_ids[sfn%2][sf];
uint8_t *dlsch_sdu = tx_pdus[UE_id][harq_pid];
memcpy(dlsch_sdu, tx_pdu->segments[0].segment_data, tx_pdu->segments[0].segment_length);
openair1/PHY/LTE_TRANSPORT/dci_tools.c
+9 -8
View File
@@ -1266,14 +1266,14 @@ void fill_dci_and_dlsch(PHY_VARS_eNB *eNB,int frame,int subframe,eNB_rxtx_proc_t
dlsch0_harq->mcs = rel8->mcs_1;
dlsch0_harq->Qm = 2;
dlsch0_harq->TBS = TBStable[I_mcs][NPRB-1];
dlsch0->harq_ids[subframe] = rel8->harq_process;
dlsch0->harq_ids[frame%2][subframe] = rel8->harq_process;
#ifdef UE_EXPANSION
dlsch0->active[subframe] = 1;
#else
dlsch0->active = 1;
#endif
dlsch0->rnti = rel8->rnti;
dlsch0->harq_ids[subframe] = rel8->harq_process;
//dlsch0->harq_ids[subframe] = rel8->harq_process;
if (dlsch0_harq->round == 0)
dlsch0_harq->status = ACTIVE;
@@ -1454,7 +1454,7 @@ void fill_dci_and_dlsch(PHY_VARS_eNB *eNB,int frame,int subframe,eNB_rxtx_proc_t
}
LOG_D(PHY,"DCI: Set harq_ids[%d] to %d (%p)\n",subframe,rel8->harq_process,dlsch0);
dlsch0->harq_ids[subframe] = rel8->harq_process;
dlsch0->harq_ids[frame%2][subframe] = rel8->harq_process;
dlsch0->harq_mask |= (1<<rel8->harq_process);
@@ -1621,8 +1621,8 @@ void fill_dci_and_dlsch(PHY_VARS_eNB *eNB,int frame,int subframe,eNB_rxtx_proc_t
dlsch0->subframe_tx[subframe] = 1;
dlsch0->harq_ids[subframe] = rel8->harq_process;
dlsch1->harq_ids[subframe] = rel8->harq_process;
dlsch0->harq_ids[frame%2][subframe] = rel8->harq_process;
dlsch1->harq_ids[frame%2][subframe] = rel8->harq_process;
// printf("Setting DLSCH harq id %d to subframe %d\n",harq_pid,subframe);
@@ -2076,11 +2076,11 @@ void fill_dci_and_dlsch(PHY_VARS_eNB *eNB,int frame,int subframe,eNB_rxtx_proc_t
if (dlsch0 != NULL){
dlsch0->subframe_tx[subframe] = 1;
dlsch0->harq_ids[subframe] = rel8->harq_process;
dlsch0->harq_ids[frame%2][subframe] = rel8->harq_process;
}
if (dlsch1_harq != NULL){
dlsch1->harq_ids[subframe] = rel8->harq_process;
dlsch1->harq_ids[frame%2][subframe] = rel8->harq_process;
}
@@ -2290,6 +2290,7 @@ void fill_mdci_and_dlsch(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,mDCI_ALLOC_t *d
LTE_DL_eNB_HARQ_t *dlsch0_harq=NULL;
int UE_id;
int subframe = proc->subframe_tx;
int frame = proc->frame_tx;
dci_alloc->firstCCE = rel13->ecce_index;
dci_alloc->L = rel13->aggregation_level;
@@ -2533,7 +2534,7 @@ void fill_mdci_and_dlsch(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc,mDCI_ALLOC_t *d
}
dlsch0->harq_ids[subframe] = rel13->harq_process;
dlsch0->harq_ids[frame%2][subframe] = rel13->harq_process;
openair1/PHY/LTE_TRANSPORT/defs.h
+1 -1
View File
@@ -291,7 +291,7 @@ typedef struct {
/// First CCE of last PDSCH scheduling per subframe. Again used during PUCCH detection for ACK/NAK.
uint8_t nCCE[10];
/// Process ID's per subframe. Used to associate received ACKs on PUSCH/PUCCH to DLSCH harq process ids
uint8_t harq_ids[10];
uint8_t harq_ids[2][10];
/// Window size (in outgoing transport blocks) for fine-grain rate adaptation
uint8_t ra_window_size;
/// First-round error threshold for fine-grain rate adaptation
openair1/PHY/LTE_TRANSPORT/dlsch_coding.c
+6 -6
View File
@@ -167,8 +167,8 @@ LTE_eNB_DLSCH_t *new_eNB_dlsch(unsigned char Kmimo,unsigned char Mdlharq,uint32_
}*/
for (i=0; i<10; i++)
dlsch->harq_ids[i] = Mdlharq;
for (i=0; i<20; i++)
dlsch->harq_ids[i/10][i%10] = Mdlharq;
for (i=0; i<Mdlharq; i++) {
dlsch->harq_processes[i] = (LTE_DL_eNB_HARQ_t *)malloc16(sizeof(LTE_DL_eNB_HARQ_t));
@@ -254,8 +254,8 @@ void clean_eNb_dlsch(LTE_eNB_DLSCH_t *dlsch)
#endif
dlsch->harq_mask = 0;
for (i=0; i<10; i++)
dlsch->harq_ids[i] = Mdlharq;
for (i=0; i<20; i++)
dlsch->harq_ids[i/10][i%10] = Mdlharq;
for (i=0; i<Mdlharq; i++) {
if (dlsch->harq_processes[i]) {
@@ -399,7 +399,7 @@ int dlsch_encoding_2threads(PHY_VARS_eNB *eNB,
unsigned int crc=1;
unsigned short iind;
unsigned char harq_pid = dlsch->harq_ids[subframe];
unsigned char harq_pid = dlsch->harq_ids[frame%2][subframe];
unsigned short nb_rb = dlsch->harq_processes[harq_pid]->nb_rb;
unsigned int A;
unsigned char mod_order;
@@ -583,7 +583,7 @@ int dlsch_encoding(PHY_VARS_eNB *eNB,
unsigned short iind;
LTE_DL_FRAME_PARMS *frame_parms = &eNB->frame_parms;
unsigned char harq_pid = dlsch->harq_ids[subframe];
unsigned char harq_pid = dlsch->harq_ids[frame%2][subframe];
unsigned short nb_rb = dlsch->harq_processes[harq_pid]->nb_rb;
unsigned int A;
unsigned char mod_order;
openair1/PHY/LTE_TRANSPORT/dlsch_modulation.c
+4 -3
View File
@@ -1990,6 +1990,7 @@ inline int check_skip_dc(int rb,LTE_DL_FRAME_PARMS *frame_parms) {
int dlsch_modulation(PHY_VARS_eNB* phy_vars_eNB,
int32_t **txdataF,
int16_t amp,
int frame,
uint32_t subframe_offset,
uint8_t num_pdcch_symbols,
LTE_eNB_DLSCH_t *dlsch0,
@@ -2062,7 +2063,7 @@ int dlsch_modulation(PHY_VARS_eNB* phy_vars_eNB,
if ((dlsch0 != NULL) && (dlsch1 != NULL)){
harq_pid = dlsch0->harq_ids[subframe_offset];
harq_pid = dlsch0->harq_ids[frame%2][subframe_offset];
dlsch0_harq = dlsch0->harq_processes[harq_pid];
mimo_mode = dlsch0_harq->mimo_mode;
mod_order0 = dlsch0_harq->Qm;
@@ -2079,7 +2080,7 @@ int dlsch_modulation(PHY_VARS_eNB* phy_vars_eNB,
}else if ((dlsch0 != NULL) && (dlsch1 == NULL)){
harq_pid = dlsch0->harq_ids[subframe_offset];
harq_pid = dlsch0->harq_ids[frame%2][subframe_offset];
dlsch0_harq = dlsch0->harq_processes[harq_pid];
mimo_mode = dlsch0_harq->mimo_mode;
mod_order0 = dlsch0_harq->Qm;
@@ -2096,7 +2097,7 @@ int dlsch_modulation(PHY_VARS_eNB* phy_vars_eNB,
}else if ((dlsch0 == NULL) && (dlsch1 != NULL)){
harq_pid = dlsch1->harq_ids[subframe_offset];
harq_pid = dlsch1->harq_ids[frame%2][subframe_offset];
dlsch1_harq = dlsch1->harq_processes[harq_pid];
mimo_mode = dlsch1_harq->mimo_mode;
mod_order0 = dlsch1_harq->Qm;
openair1/PHY/LTE_TRANSPORT/proto.h
+1
View File
@@ -290,6 +290,7 @@ int32_t allocate_REs_in_RB(PHY_VARS_eNB* phy_vars_eNB,
int32_t dlsch_modulation(PHY_VARS_eNB* phy_vars_eNB,
int32_t **txdataF,
int16_t amp,
int frame,
uint32_t sub_frame_offset,
uint8_t num_pdcch_symbols,
LTE_eNB_DLSCH_t *dlsch0,
openair1/SCHED/fapi_l1.c
+28 -19
View File
@@ -161,24 +161,24 @@ void handle_nfapi_dlsch_pdu(PHY_VARS_eNB *eNB,int frame,int subframe,eNB_rxtx_pr
dlsch1 = eNB->dlsch[UE_id][1];
#ifdef Rel14
if ((rel13->pdsch_payload_type < 2) && (rel13->ue_type>0)) dlsch0->harq_ids[subframe] = 0;
if ((rel13->pdsch_payload_type < 2) && (rel13->ue_type>0)) dlsch0->harq_ids[frame%2][subframe] = 0;
#endif
harq_pid = dlsch0->harq_ids[subframe];
harq_pid = dlsch0->harq_ids[frame%2][subframe];
AssertFatal((harq_pid>=0) && (harq_pid<8),"harq_pid %d not in 0...7 frame:%d subframe:%d subframe(TX):%d rnti:%x UE_id:%d dlsch0[harq_ids:%d:%d:%d:%d:%d:%d:%d:%d:%d:%d]\n",
harq_pid,
frame,subframe,
proc->subframe_tx,rel8->rnti,UE_id,
dlsch0->harq_ids[0],
dlsch0->harq_ids[1],
dlsch0->harq_ids[2],
dlsch0->harq_ids[3],
dlsch0->harq_ids[4],
dlsch0->harq_ids[5],
dlsch0->harq_ids[6],
dlsch0->harq_ids[7],
dlsch0->harq_ids[8],
dlsch0->harq_ids[9]
dlsch0->harq_ids[frame%2][0],
dlsch0->harq_ids[frame%2][1],
dlsch0->harq_ids[frame%2][2],
dlsch0->harq_ids[frame%2][3],
dlsch0->harq_ids[frame%2][4],
dlsch0->harq_ids[frame%2][5],
dlsch0->harq_ids[frame%2][6],
dlsch0->harq_ids[frame%2][7],
dlsch0->harq_ids[frame%2][8],
dlsch0->harq_ids[frame%2][9]
);
dlsch0_harq = dlsch0->harq_processes[harq_pid];
dlsch1_harq = dlsch1->harq_processes[harq_pid];
@@ -331,6 +331,9 @@ void handle_ulsch_harq_pdu(
ulsch_harq->subframe = subframe;
ulsch_harq->O_ACK = harq_information->harq_information_rel10.harq_size;
ulsch->beta_offset_harqack_times8 = to_beta_offset_harqack[harq_information->harq_information_rel10.delta_offset_harq];
if (harq_information->harq_information_rel10.ack_nack_mode==0) //bundling
ulsch->bundling = 1;
}
uint16_t to_beta_offset_ri[16]={9,13,16,20,25,32,40,50,64,80,101,127,160,0,0,0};
@@ -678,13 +681,19 @@ void schedule_response(Sched_Rsp_t *Sched_INFO)
eNB->pdcch_vars[subframe&1].num_dci = 0;
eNB->phich_vars[subframe&1].num_hi = 0;
LOG_D(PHY,"NFAPI: Sched_INFO:SFN/SF:%04d%d DL_req:SFN/SF:%04d%d:dl_pdu:%d tx_req:SFN/SF:%04d%d:pdus:%d hi_dci0:SFN/SF:%04d%d:pdus:%d ul_cfg:SFN/SF:%04d%d:pdus:%d num_pdcch_symbols:%d\n",
frame,subframe,
NFAPI_SFNSF2SFN(DL_req->sfn_sf),NFAPI_SFNSF2SF(DL_req->sfn_sf),number_dl_pdu,
NFAPI_SFNSF2SFN(TX_req->sfn_sf),NFAPI_SFNSF2SF(TX_req->sfn_sf),TX_req->tx_request_body.number_of_pdus,
NFAPI_SFNSF2SFN(HI_DCI0_req->sfn_sf),NFAPI_SFNSF2SF(HI_DCI0_req->sfn_sf),number_hi_dci0_pdu,
NFAPI_SFNSF2SFN(UL_req->sfn_sf),NFAPI_SFNSF2SF(UL_req->sfn_sf),number_ul_pdu,
eNB->pdcch_vars[subframe&1].num_pdcch_symbols);
LOG_I(PHY,"NFAPI: Sched_INFO:SFN/SF:%04d%d DL_req:SFN/SF:%04d%d:dl_pdu:%d tx_req:SFN/SF:%04d%d:pdus:%d\n",
frame,subframe,
NFAPI_SFNSF2SFN(DL_req->sfn_sf),NFAPI_SFNSF2SF(DL_req->sfn_sf),number_dl_pdu,
NFAPI_SFNSF2SFN(TX_req->sfn_sf),NFAPI_SFNSF2SF(TX_req->sfn_sf),TX_req->tx_request_body.number_of_pdus
);
LOG_I(PHY,"NFAPI: hi_dci0:SFN/SF:%04d%d:pdus:%d\n",
NFAPI_SFNSF2SFN(HI_DCI0_req->sfn_sf),NFAPI_SFNSF2SF(HI_DCI0_req->sfn_sf),number_hi_dci0_pdu
);
if(UL_req!=NULL)
LOG_I(PHY,"NFAPI: ul_cfg:SFN/SF:%04d%d:pdus:%d num_pdcch_symbols:%d\n",
NFAPI_SFNSF2SFN(UL_req->sfn_sf),NFAPI_SFNSF2SF(UL_req->sfn_sf),number_ul_pdu,
eNB->pdcch_vars[subframe&1].num_pdcch_symbols);
int do_oai =0;
int dont_send =0;
openair1/SCHED/phy_procedures_lte_common.c
+24
View File
@@ -336,6 +336,29 @@ unsigned char ul_ACK_subframe2_dl_subframe(LTE_DL_FRAME_PARMS *frame_parms,unsig
return(0);
}
unsigned char ul_ACK_subframe2_dl_frame(LTE_DL_FRAME_PARMS *frame_parms,int frame, unsigned char subframe,unsigned char subframe_tx)
{
if (frame_parms->frame_type == FDD) {
return (((subframe_tx > subframe ) ? frame-1 : frame)+1024)%1024;
} else {
switch (frame_parms->tdd_config) {
case 3:
//TODO
break;
case 4:
//TODO
break;
case 1:
return(((subframe_tx > subframe ) ? frame-1 : frame)+1024)%1024;
break;
}
}
return(0);
}
unsigned char ul_ACK_subframe2_M(LTE_DL_FRAME_PARMS *frame_parms,unsigned char subframe)
{
@@ -383,6 +406,7 @@ unsigned char ul_ACK_subframe2_M(LTE_DL_FRAME_PARMS *frame_parms,unsigned char s
break;
case 1:
return 1; // don't ACK special subframe for now
if (subframe == 2) { // ACK subframes 5 and 6
return(2);
} else if (subframe == 3) { // ACK subframe 9
openair1/SCHED/phy_procedures_lte_eNb.c
+21 -9
View File
@@ -379,6 +379,7 @@ void pdsch_procedures(PHY_VARS_eNB *eNB,
dlsch_modulation(eNB,
eNB->common_vars.txdataF,
AMP,
frame,
subframe,
dlsch_harq->pdsch_start,
dlsch,
@@ -540,7 +541,7 @@ void phy_procedures_eNB_TX(PHY_VARS_eNB *eNB,
#endif
// get harq_pid
harq_pid = dlsch0->harq_ids[subframe];
harq_pid = dlsch0->harq_ids[frame%2][subframe];
AssertFatal(harq_pid>=0,"harq_pid is negative\n");
if (harq_pid>=8)
@@ -1341,7 +1342,7 @@ void pusch_procedures(PHY_VARS_eNB *eNB,eNB_rxtx_proc_t *proc)
const int frame = proc->frame_rx;
if (fp->frame_type == FDD) harq_pid = ((10*frame) + subframe)&7;
else harq_pid = subframe%10;
else harq_pid = subframe2harq_pid(&eNB->frame_parms,frame,subframe);
for (i=0; i<NUMBER_OF_UE_MAX; i++) {
ulsch = eNB->ulsch[i];
@@ -1638,7 +1639,7 @@ void release_harq(PHY_VARS_eNB *eNB,int UE_id,int tb,uint16_t frame,uint8_t subf
LTE_eNB_DLSCH_t *dlsch0=NULL,*dlsch1=NULL;
LTE_DL_eNB_HARQ_t *dlsch0_harq=NULL,*dlsch1_harq=NULL;
int harq_pid;
int subframe_tx;
int subframe_tx,frame_tx;
int M,m;
AssertFatal(UE_id!=-1,"no existing dlsch context\n");
@@ -1648,7 +1649,9 @@ void release_harq(PHY_VARS_eNB *eNB,int UE_id,int tb,uint16_t frame,uint8_t subf
if (eNB->frame_parms.frame_type == FDD) {
subframe_tx = (subframe+6)%10;
harq_pid = dlsch0->harq_ids[subframe_tx];
frame_tx = ul_ACK_subframe2_dl_frame(&eNB->frame_parms,frame,subframe,subframe_tx);
harq_pid = dlsch0->harq_ids[frame_tx%2][subframe_tx]; // or just use 0 for fdd?
AssertFatal((harq_pid>=0) && (harq_pid<10),"harq_pid %d not in 0...9\n",harq_pid);
dlsch0_harq = dlsch0->harq_processes[harq_pid];
dlsch1_harq = dlsch1->harq_processes[harq_pid];
@@ -1671,8 +1674,9 @@ void release_harq(PHY_VARS_eNB *eNB,int UE_id,int tb,uint16_t frame,uint8_t subf
subframe_tx = ul_ACK_subframe2_dl_subframe(&eNB->frame_parms,
subframe,
m);
frame_tx = ul_ACK_subframe2_dl_frame(&eNB->frame_parms,frame,subframe,subframe_tx);
if (((1<<m)&mask) > 0) {
harq_pid = dlsch0->harq_ids[subframe_tx];
harq_pid = dlsch0->harq_ids[frame_tx%2][subframe_tx];
if ((harq_pid>=0) && (harq_pid<10)) {
dlsch0_harq = dlsch0->harq_processes[harq_pid];
dlsch1_harq = dlsch1->harq_processes[harq_pid];
@@ -1695,7 +1699,7 @@ int getM(PHY_VARS_eNB *eNB,int frame,int subframe) {
LTE_eNB_DLSCH_t *dlsch0=NULL,*dlsch1=NULL;
LTE_DL_eNB_HARQ_t *dlsch0_harq=NULL,*dlsch1_harq=NULL;
int harq_pid;
int subframe_tx;
int subframe_tx,frame_tx;
int m;
M=ul_ACK_subframe2_M(&eNB->frame_parms,
@@ -1705,7 +1709,10 @@ int getM(PHY_VARS_eNB *eNB,int frame,int subframe) {
subframe_tx = ul_ACK_subframe2_dl_subframe(&eNB->frame_parms,
subframe,
m);
harq_pid = dlsch0->harq_ids[subframe_tx];
frame_tx = ul_ACK_subframe2_dl_frame(&eNB->frame_parms,frame,
subframe,subframe_tx);
harq_pid = dlsch0->harq_ids[frame_tx%2][subframe_tx];
if (harq_pid>=0 && harq_pid<10) {
dlsch0_harq = dlsch0->harq_processes[harq_pid];
dlsch1_harq = dlsch1->harq_processes[harq_pid];
@@ -1813,7 +1820,7 @@ void fill_ulsch_harq_indication(PHY_VARS_eNB *eNB,LTE_UL_eNB_HARQ_t *ulsch_harq,
for (i=0;i<ulsch_harq->O_ACK;i++) {
AssertFatal(ulsch_harq->o_ACK[i] == 0 || ulsch_harq->o_ACK[i] == 1, "harq_ack[%d] is %d, should be 1,2 or 4\n",i,ulsch_harq->o_ACK[i]);
pdu->harq_indication_tdd_rel13.harq_data[0].multiplex.value_0 = 2-ulsch_harq->o_ACK[i];
pdu->harq_indication_tdd_rel13.harq_data[0].bundling.value_0 = 2-ulsch_harq->o_ACK[i];
// release DLSCH if needed
if (ulsch_harq->o_ACK[i] == 1) release_harq(eNB,UE_id,i,frame,subframe,0xffff);
if (M==1 && ulsch_harq->O_ACK==1 && ulsch_harq->o_ACK[i] == 1) release_harq(eNB,UE_id,0,frame,subframe,0xffff);
@@ -1915,7 +1922,7 @@ void fill_uci_harq_indication(PHY_VARS_eNB *eNB,
pdu->harq_indication_tdd_rel13.tl.tag = NFAPI_HARQ_INDICATION_TDD_REL13_TAG;
pdu->harq_indication_tdd_rel13.mode = tdd_mapping_mode;
LOG_D(PHY,"%s(eNB, uci_harq format %d, rnti:%04x, frame:%d, subframe:%d, tdd_mapping_mode:%d) harq_ack[0]:%d harq_ack[1]:%d\n", __FUNCTION__, uci->pucch_fmt,uci->rnti, frame, subframe, tdd_mapping_mode,harq_ack[0],harq_ack[1]);
switch (tdd_mapping_mode) {
case 0: // bundling
@@ -1977,15 +1984,18 @@ void fill_uci_harq_indication(PHY_VARS_eNB *eNB,
case 2: // special bundling (SR collision)
pdu->harq_indication_tdd_rel13.tl.tag = NFAPI_HARQ_INDICATION_TDD_REL13_TAG;
pdu->harq_indication_tdd_rel13.number_of_ack_nack = 1;
pdu->harq_indication_tdd_rel13.mode = 0;
int tdd_config5_sf2scheds=0;
if (eNB->frame_parms.tdd_config==5) tdd_config5_sf2scheds = getM(eNB,frame,subframe);
switch (harq_ack[0]) {
case 0:
pdu->harq_indication_tdd_rel13.harq_data[0].bundling.value_0 = 0;// anaake
break;
case 1: // check if M=1,4,7
if (uci->num_pucch_resources == 1 || uci->num_pucch_resources == 4 ||
tdd_config5_sf2scheds == 1 || tdd_config5_sf2scheds == 4 || tdd_config5_sf2scheds == 7) {
pdu->harq_indication_tdd_rel13.harq_data[0].bundling.value_0 = 1;// anaake
release_harq(eNB,UE_id,0,frame,subframe,0xffff);
release_harq(eNB,UE_id,1,frame,subframe,0xffff);
}
@@ -1993,6 +2003,7 @@ void fill_uci_harq_indication(PHY_VARS_eNB *eNB,
case 2: // check if M=2,5,8
if (uci->num_pucch_resources == 2 || tdd_config5_sf2scheds == 2 ||
tdd_config5_sf2scheds == 5 || tdd_config5_sf2scheds == 8) {
pdu->harq_indication_tdd_rel13.harq_data[0].bundling.value_0 = 1;// anaake
release_harq(eNB,UE_id,0,frame,subframe,0xffff);
release_harq(eNB,UE_id,1,frame,subframe,0xffff);
}
@@ -2000,6 +2011,7 @@ void fill_uci_harq_indication(PHY_VARS_eNB *eNB,
case 3: // check if M=3,6,9
if (uci->num_pucch_resources == 3 || tdd_config5_sf2scheds == 3 ||
tdd_config5_sf2scheds == 6 || tdd_config5_sf2scheds == 9) {
pdu->harq_indication_tdd_rel13.harq_data[0].bundling.value_0 = 1;// anaake
release_harq(eNB,UE_id,0,frame,subframe,0xffff);
release_harq(eNB,UE_id,1,frame,subframe,0xffff);
}
openair1/SIMULATION/LTE_PHY/dlsim_tm4.c
+1
View File
@@ -3426,6 +3426,7 @@ int main(int argc, char **argv)
re_allocated = dlsch_modulation(eNB,
eNB->common_vars.txdataF[eNB_id],
AMP,
frame,
subframe,
num_pdcch_symbols,
((TB0_active == 1)? eNB->dlsch[k][0]: NULL),
openair1/SIMULATION/LTE_PHY/dlsim_tm7.c
+1
View File
@@ -2679,6 +2679,7 @@ PMI_FEEDBACK:
re_allocated = dlsch_modulation(eNB,
eNB->common_vars.txdataF[eNB_id],
AMP,
frame,
subframe,
num_pdcch_symbols,
eNB->dlsch[k][0],
openair2/LAYER2/MAC/defs.h
+2 -2
View File
@@ -1094,9 +1094,9 @@ typedef struct eNB_MAC_INST_s {
nfapi_ul_config_request_t UL_req_tmp[MAX_NUM_CCs][10];
/// Preallocated HI_DCI0 pdu list
nfapi_hi_dci0_request_pdu_t
hi_dci0_pdu_list[MAX_NUM_CCs][MAX_NUM_HI_DCI0_PDU];
hi_dci0_pdu_list[MAX_NUM_CCs][10][MAX_NUM_HI_DCI0_PDU];
/// NFAPI HI/DCI0 Config Request Structure
nfapi_hi_dci0_request_t HI_DCI0_req[MAX_NUM_CCs];
nfapi_hi_dci0_request_t HI_DCI0_req[MAX_NUM_CCs][10];
/// Prealocated TX pdu list
nfapi_tx_request_pdu_t
tx_request_pdu[MAX_NUM_CCs][MAX_NUM_TX_REQUEST_PDU];
openair2/LAYER2/MAC/eNB_scheduler.c
+1 -1
View File
@@ -573,7 +573,7 @@ clear_nfapi_information(eNB_MAC_INST * eNB, int CC_idP,
{
nfapi_dl_config_request_t *DL_req = &eNB->DL_req[0];
nfapi_ul_config_request_t *UL_req = &eNB->UL_req[0];
nfapi_hi_dci0_request_t *HI_DCI0_req = &eNB->HI_DCI0_req[0];
nfapi_hi_dci0_request_t *HI_DCI0_req = &eNB->HI_DCI0_req[0][subframeP];
nfapi_tx_request_t *TX_req = &eNB->TX_req[0];
eNB->pdu_index[CC_idP] = 0;
openair2/LAYER2/MAC/eNB_scheduler_RA.c
+29 -21
View File
@@ -106,10 +106,10 @@ add_msg3(module_id_t module_idP, int CC_id, RA_t * ra, frame_t frameP,
nfapi_ul_config_request_t *ul_req;
nfapi_ul_config_request_body_t *ul_req_body;
nfapi_ul_config_request_pdu_t *ul_config_pdu;
nfapi_hi_dci0_request_t *hi_dci0_req = &mac->HI_DCI0_req[CC_id];
nfapi_hi_dci0_request_body_t *hi_dci0_req_body = &hi_dci0_req->hi_dci0_request_body;
nfapi_hi_dci0_request_t *hi_dci0_req;
nfapi_hi_dci0_request_body_t *hi_dci0_req_body;
nfapi_hi_dci0_request_pdu_t *hi_dci0_pdu;
uint8_t sf_ahead_dl;
uint8_t rvseq[4] = { 0, 2, 3, 1 };
@@ -234,6 +234,9 @@ add_msg3(module_id_t module_idP, int CC_id, RA_t * ra, frame_t frameP,
LOG_D(MAC, "MSG3: UL_CONFIG SFN/SF:%d number_of_pdus:%d ra->msg3_round:%d\n", NFAPI_SFNSF2DEC(ul_req->sfn_sf), ul_req_body->number_of_pdus, ra->msg3_round);
if (ra->msg3_round != 0) { // program HI too
sf_ahead_dl = ul_subframe2_k_phich(cc, subframeP);
hi_dci0_req = &mac->HI_DCI0_req[CC_id][(subframeP+sf_ahead_dl)%10];
hi_dci0_req_body = &hi_dci0_req->hi_dci0_request_body;
hi_dci0_pdu = &hi_dci0_req_body->hi_dci0_pdu_list[hi_dci0_req_body->number_of_dci + hi_dci0_req_body->number_of_hi];
memset((void *) hi_dci0_pdu, 0,
sizeof(nfapi_hi_dci0_request_pdu_t));
@@ -249,7 +252,7 @@ add_msg3(module_id_t module_idP, int CC_id, RA_t * ra, frame_t frameP,
hi_dci0_req_body->sfnsf = sfnsf_add_subframe(ra->Msg3_frame, ra->Msg3_subframe, 0);
hi_dci0_req_body->tl.tag = NFAPI_HI_DCI0_REQUEST_BODY_TAG;
hi_dci0_req->sfn_sf = sfnsf_add_subframe(ra->Msg3_frame, ra->Msg3_subframe, 4);
hi_dci0_req->sfn_sf = hi_dci0_req->sfn_sf = sfnsf_add_subframe(frameP, subframeP, sf_ahead_dl);
hi_dci0_req->header.message_id = NFAPI_HI_DCI0_REQUEST;
if (nfapi_mode) {
@@ -307,7 +310,7 @@ generate_Msg2(module_id_t module_idP, int CC_idP, frame_t frameP,
LOG_D(MAC,"absSF:%d absSF_Msg2:%d ra->rach_resource_type:%d\n",absSF,absSF_Msg2,ra->rach_resource_type);
if (absSF > absSF_Msg2)
if (absSF < absSF_Msg2)
return; // we're not ready yet, need to be to start ==
if (cc[CC_idP].radioResourceConfigCommon_BR) {
@@ -851,7 +854,7 @@ generate_Msg4(module_id_t module_idP, int CC_idP, frame_t frameP,
// set HARQ process round to 0 for this UE
if (cc->tdd_Config)
ra->harq_pid = ((frameP * 10) + subframeP) % 10;
ra->harq_pid = frame_subframe2_dl_harq_pid(cc->tdd_Config,frameP ,subframeP);
else
ra->harq_pid = ((frameP * 10) + subframeP) & 7;
@@ -1298,10 +1301,8 @@ generate_Msg4(module_id_t module_idP, int CC_idP, frame_t frameP,
"Frame %d, Subframe %d: Preparing for Msg4 retransmission currently %d.%d\n",
frameP, subframeP, ra->Msg4_frame,
ra->Msg4_subframe);
if (ra->Msg4_subframe > 1)
ra->Msg4_frame++;
ra->Msg4_frame &= 1023;
ra->Msg4_subframe = (ra->Msg4_subframe + 8) % 10;
get_retransmission_timing(mac->common_channels[CC_idP].tdd_Config,&ra->Msg4_frame,&ra->Msg4_subframe);
LOG_D(MAC,
"Frame %d, Subframe %d: Msg4 retransmission in %d.%d\n",
frameP, subframeP, ra->Msg4_frame,
@@ -1310,7 +1311,7 @@ generate_Msg4(module_id_t module_idP, int CC_idP, frame_t frameP,
// put HARQ process round to 0
if (cc->tdd_Config)
ra->harq_pid = ((frameP * 10) + subframeP) % 10;
ra->harq_pid = frame_subframe2_dl_harq_pid(cc->tdd_Config,frameP ,subframeP);
else
ra->harq_pid = ((frameP * 10) + subframeP) & 7;
UE_list->UE_sched_ctrl[UE_id].round[CC_idP][ra->harq_pid] =
@@ -1592,10 +1593,7 @@ check_Msg4_retransmission(module_id_t module_idP, int CC_idP,
dci_dl_pdu_rel8.cce_idx);
// prepare frame for retransmission
if (ra->Msg4_subframe > 1)
ra->Msg4_frame++;
ra->Msg4_frame &= 1023;
ra->Msg4_subframe = (ra->Msg4_subframe + 8) % 10;
get_retransmission_timing(mac->common_channels[CC_idP].tdd_Config,&ra->Msg4_frame,&ra->Msg4_subframe);
LOG_W(MAC,
"[eNB %d][RAPROC] CC_id %d Frame %d, subframeP %d: Msg4 not acknowledged, adding ue specific dci (rnti %x) for RA (Msg4 Retransmission round %d in %d.%d)\n",
@@ -1645,7 +1643,7 @@ schedule_RA(module_id_t module_idP, frame_t frameP, sub_frame_t subframeP)
if (ra->state == MSG2)
generate_Msg2(module_idP, CC_id, frameP, subframeP, ra);
else if (ra->state == MSG4)
else if (ra->state == MSG4 && ra->Msg4_frame == frameP && ra->Msg4_subframe == subframeP )
generate_Msg4(module_idP, CC_id, frameP, subframeP, ra);
else if (ra->state == WAITMSG4ACK)
check_Msg4_retransmission(module_idP, CC_id, frameP,
@@ -1729,11 +1727,21 @@ initiate_ra_proc(module_id_t module_idP,
ra[i].msg4_mpdcch_repetition_cnt = 0;
#endif
// DJP - this is because VNF is 2 subframes ahead of PNF and TX needs 4 subframes
if (nfapi_mode)
offset = 7;
else
offset = 5;
//TODO Fill in other TDD config. What about nfapi_mode?
if(cc->tdd_Config!=NULL){
switch(cc->tdd_Config->subframeAssignment){
case 1 :
offset = 6;
break;
}
}else{//FDD
// DJP - this is because VNF is 2 subframes ahead of PNF and TX needs 4 subframes
if (nfapi_mode)
offset = 7;
else
offset = 5;
}
add_subframe(&msg2_frame, &msg2_subframe, offset);
openair2/LAYER2/MAC/eNB_scheduler_dlsch.c
+8 -10
View File
@@ -499,8 +499,7 @@ schedule_ue_spec(module_id_t module_idP,
break;
case 6:
case 7:
if ((tdd_sfa != 1) && (tdd_sfa != 2) && (tdd_sfa != 4)
&& (tdd_sfa != 5))
if ((tdd_sfa != 3)&& (tdd_sfa != 4) && (tdd_sfa != 5))
return;
break;
case 8:
@@ -509,8 +508,7 @@ schedule_ue_spec(module_id_t module_idP,
return;
break;
case 9:
if ((tdd_sfa != 1) && (tdd_sfa != 3) && (tdd_sfa != 4)
&& (tdd_sfa != 6))
if (tdd_sfa == 0)
return;
break;
@@ -690,7 +688,7 @@ schedule_ue_spec(module_id_t module_idP,
nb_available_rb = ue_sched_ctl->pre_nb_available_rbs[CC_id];
if (cc->tdd_Config)
harq_pid = ((frameP * 10) + subframeP) % 10;
harq_pid = frame_subframe2_dl_harq_pid(cc->tdd_Config,frameP ,subframeP);
else
harq_pid = ((frameP * 10) + subframeP) & 7;
@@ -758,7 +756,7 @@ schedule_ue_spec(module_id_t module_idP,
UE_list->UE_template[CC_id][UE_id].DAI++;
update_ul_dci(module_idP, CC_id, rnti,
UE_list->UE_template[CC_id][UE_id].
DAI);
DAI,subframeP);
LOG_D(MAC,
"DAI update: CC_id %d subframeP %d: UE %d, DAI %d\n",
CC_id, subframeP, UE_id,
@@ -1389,7 +1387,7 @@ schedule_ue_spec(module_id_t module_idP,
if (cc[CC_id].tdd_Config != NULL) { // TDD
UE_list->UE_template[CC_id][UE_id].DAI++;
update_ul_dci(module_idP,CC_id,rnti,UE_list->UE_template[CC_id][UE_id].DAI);
update_ul_dci(module_idP,CC_id,rnti,UE_list->UE_template[CC_id][UE_id].DAI,subframeP);
}
// do PUCCH power control
@@ -1609,7 +1607,7 @@ fill_DLSCH_dci(
// clear scheduling flag
eNB_dlsch_info[module_idP][CC_id][UE_id].status = S_DL_WAITING;
rnti = UE_RNTI(module_idP,UE_id);
if (cc->tdd_Config) harq_pid = ((frameP*10)+subframeP)%10;
if (cc->tdd_Config) harq_pid = frame_subframe2_dl_harq_pid(cc->tdd_Config,frameP ,subframeP);
else harq_pid = ((frameP*10)+subframeP)&7;
nb_rb = UE_list->UE_template[CC_id][UE_id].nb_rb[harq_pid];
@@ -1691,12 +1689,12 @@ unsigned char *get_dlsch_sdu(module_id_t module_idP,
//------------------------------------------------------------------------------
void
update_ul_dci(module_id_t module_idP,
uint8_t CC_idP, rnti_t rntiP, uint8_t daiP)
uint8_t CC_idP, rnti_t rntiP, uint8_t daiP, sub_frame_t subframe)
//------------------------------------------------------------------------------
{
nfapi_hi_dci0_request_t *HI_DCI0_req =
&RC.mac[module_idP]->HI_DCI0_req[CC_idP];
&RC.mac[module_idP]->HI_DCI0_req[CC_idP][subframe];
nfapi_hi_dci0_request_pdu_t *hi_dci0_pdu =
&HI_DCI0_req->hi_dci0_request_body.hi_dci0_pdu_list[0];
COMMON_channels_t *cc = &RC.mac[module_idP]->common_channels[CC_idP];
openair2/LAYER2/MAC/eNB_scheduler_primitives.c
+165 -30
View File
@@ -60,6 +60,7 @@
#define ENABLE_MAC_PAYLOAD_DEBUG
#define DEBUG_eNB_SCHEDULER 1
extern uint16_t frame_cnt;
int choose(int n, int k)
{
@@ -579,6 +580,32 @@ int is_UL_sf(COMMON_channels_t * ccP, sub_frame_t subframeP)
}
}
uint8_t ul_subframe2_k_phich(COMMON_channels_t * cc, sub_frame_t ul_subframe){
if(cc->tdd_Config){//TODO fill other tdd config
switch(cc->tdd_Config->subframeAssignment){
case 0:
break;
case 1:
if(ul_subframe == 2 || ul_subframe == 7)
return 4;
else if(ul_subframe == 3 || ul_subframe == 8)
return 6;
else return 255;
break;
case 2:
break;
case 3:
break;
case 4:
break;
case 5:
break;
}
}
return 4; //idk sf_ahead?
}
uint16_t get_pucch1_absSF(COMMON_channels_t * cc, uint16_t dlsch_absSF)
{
uint16_t sf, f, nextf;
@@ -592,40 +619,52 @@ uint16_t get_pucch1_absSF(COMMON_channels_t * cc, uint16_t dlsch_absSF)
switch (cc->tdd_Config->subframeAssignment) {
case 0:
AssertFatal(1 == 0, "SFA 0 to be filled in now, :-)\n");
if ((sf == 0) || (sf == 5))
return ((10 * f) + sf + 4)% 10240; // ACK/NAK in SF 4,9 same frame
else if (sf == 6)
return ((10 * nextf) + 2)% 10240; // ACK/NAK in SF 2 next frame
else if (sf == 1)
return ((10 * f) + 7)% 10240; // ACK/NAK in SF 7 same frame
else
AssertFatal(1 == 0,
"Impossible dlsch subframe %d for TDD configuration 0\n",
sf);
break;
case 1:
if ((sf == 5) || (sf == 6))
return ((10 * nextf) + 2); // ACK/NAK in SF 2 next frame
return ((10 * nextf) + 2)% 10240; // ACK/NAK in SF 2 next frame
else if (sf == 9)
return ((10 * nextf) + 3); // ACK/NAK in SF 3 next frame
return ((10 * nextf) + 3)% 10240; // ACK/NAK in SF 3 next frame
else if ((sf == 0) || (sf == 1))
return ((10 * f) + 2); // ACK/NAK in SF 7 same frame
return ((10 * f) + 7)% 10240; // ACK/NAK in SF 7 same frame
else if (sf == 4)
return ((10 * f) + 8)% 10240; // ACK/NAK in SF 8 same frame
else
AssertFatal(1 == 0,
"Impossible dlsch subframe %d for TDD configuration 3\n",
"Impossible dlsch subframe %d for TDD configuration 1\n",
sf);
break;
case 2:
if ((sf == 4) || (sf == 5) || (sf == 6) || (sf == 8))
return ((10 * nextf) + 2); // ACK/NAK in SF 2 next frame
return ((10 * nextf) + 2)% 10240; // ACK/NAK in SF 2 next frame
else if (sf == 9)
return ((10 * nextf) + 7); // ACK/NAK in SF 7 next frame
return ((10 * nextf) + 7)% 10240; // ACK/NAK in SF 7 next frame
else if ((sf == 0) || (sf == 1) || (sf == 3))
return ((10 * f) + 7); // ACK/NAK in SF 7 same frame
return ((10 * f) + 7)% 10240; // ACK/NAK in SF 7 same frame
else
AssertFatal(1 == 0,
"Impossible dlsch subframe %d for TDD configuration 3\n",
"Impossible dlsch subframe %d for TDD configuration 2\n",
sf);
break;
case 3:
if ((sf == 5) || (sf == 6) || (sf == 7) || (sf == 8)
|| (sf == 9))
return ((10 * nextf) + (sf >> 1)); // ACK/NAK in 2,3,4 resp. next frame
return ((10 * nextf) + ((sf-1) >> 1))% 10240; // ACK/NAK in 2,3,4 resp. next frame
else if (sf == 1)
return ((10 * nextf) + 2); // ACK/NAK in 2 next frame
return ((10 * nextf) + 2)% 10240; // ACK/NAK in 2 next frame
else if (sf == 0)
return ((10 * f) + 4); // ACK/NAK in 4 same frame
return ((10 * f) + 4)% 10240; // ACK/NAK in 4 same frame
else
AssertFatal(1 == 0,
"Impossible dlsch subframe %d for TDD configuration 3\n",
@@ -653,7 +692,16 @@ uint16_t get_pucch1_absSF(COMMON_channels_t * cc, uint16_t dlsch_absSF)
sf);
break;
case 6:
AssertFatal(1 == 0, "SFA 6 To be filled in now, :-)\n");
if ((sf == 5) || (sf == 6))
return ((10 * f) + sf + 7)% 10240; // ACK/NAK in SF 2,3 next frame
else if (sf == 9)
return ((10 * nextf) + 4)% 10240; // ACK/NAK in SF 4 next frame
else if ((sf == 1) || (sf == 0))
return ((10 * f) + sf + 7)% 10240; // ACK/NAK in SF 7 same frame
else
AssertFatal(1 == 0,
"Impossible dlsch subframe %d for TDD configuration 6\n",
sf);
break;
default:
AssertFatal(1 == 0, "Illegal TDD subframe Assigment %d\n",
@@ -1228,7 +1276,7 @@ program_dlsch_acknak(module_id_t module_idP, int CC_idP, int UE_idP,
if (ulsch_harq_information)
fill_nfapi_ulsch_harq_information(module_idP, CC_idP,
rnti, ulsch_harq_information);
rnti, ulsch_harq_information,subframeP);
if (harq_information)
fill_nfapi_harq_information(module_idP, CC_idP,
@@ -1237,10 +1285,10 @@ program_dlsch_acknak(module_id_t module_idP, int CC_idP, int UE_idP,
harq_information, cce_idx);
}
uint8_t get_V_UL_DAI(module_id_t module_idP, int CC_idP, uint16_t rntiP)
uint8_t get_V_UL_DAI(module_id_t module_idP, int CC_idP, uint16_t rntiP,sub_frame_t subframeP)
{
nfapi_hi_dci0_request_body_t *HI_DCI0_req =
&RC.mac[module_idP]->HI_DCI0_req[CC_idP].hi_dci0_request_body;
&RC.mac[module_idP]->HI_DCI0_req[CC_idP][subframeP].hi_dci0_request_body;
nfapi_hi_dci0_request_pdu_t *hi_dci0_pdu =
&HI_DCI0_req->hi_dci0_pdu_list[0];
@@ -1258,7 +1306,8 @@ fill_nfapi_ulsch_harq_information(module_id_t module_idP,
int CC_idP,
uint16_t rntiP,
nfapi_ul_config_ulsch_harq_information
* harq_information)
* harq_information,
sub_frame_t subframeP)
{
eNB_MAC_INST *eNB = RC.mac[module_idP];
COMMON_channels_t *cc = &eNB->common_channels[CC_idP];
@@ -1318,7 +1367,7 @@ fill_nfapi_ulsch_harq_information(module_id_t module_idP,
if (harq_information->harq_information_rel10.ack_nack_mode ==
1)
harq_information->harq_information_rel10.harq_size =
get_V_UL_DAI(module_idP, CC_idP, rntiP);
get_V_UL_DAI(module_idP, CC_idP, rntiP,subframeP);
else
harq_information->harq_information_rel10.harq_size = 1;
}
@@ -1330,7 +1379,7 @@ fill_nfapi_ulsch_harq_information(module_id_t module_idP,
if (harq_information->harq_information_rel10.ack_nack_mode ==
1)
harq_information->harq_information_rel10.harq_size =
get_V_UL_DAI(module_idP, CC_idP, rntiP);
get_V_UL_DAI(module_idP, CC_idP, rntiP,subframeP);
else
harq_information->harq_information_rel10.harq_size = 2;
}
@@ -3110,7 +3159,7 @@ allocate_CCEs(int module_idP, int CC_idP, frame_t frameP, sub_frame_t subframeP,
nfapi_dl_config_request_body_t *DL_req =
&RC.mac[module_idP]->DL_req[CC_idP].dl_config_request_body;
nfapi_hi_dci0_request_body_t *HI_DCI0_req =
&RC.mac[module_idP]->HI_DCI0_req[CC_idP].hi_dci0_request_body;
&RC.mac[module_idP]->HI_DCI0_req[CC_idP][subframeP].hi_dci0_request_body;
nfapi_dl_config_request_pdu_t *dl_config_pdu =
&DL_req->dl_config_pdu_list[0];
nfapi_hi_dci0_request_pdu_t *hi_dci0_pdu =
@@ -3575,7 +3624,7 @@ CCE_allocation_infeasible(int module_idP,
nfapi_dl_config_request_pdu_t *dl_config_pdu =
&DL_req->dl_config_pdu_list[DL_req->number_pdu];
nfapi_hi_dci0_request_body_t *HI_DCI0_req =
&RC.mac[module_idP]->HI_DCI0_req[CC_idP].hi_dci0_request_body;
&RC.mac[module_idP]->HI_DCI0_req[CC_idP][subframe].hi_dci0_request_body;
nfapi_hi_dci0_request_pdu_t *hi_dci0_pdu =
&HI_DCI0_req->hi_dci0_pdu_list[HI_DCI0_req->number_of_dci +
HI_DCI0_req->number_of_hi];
@@ -3630,6 +3679,73 @@ CCE_allocation_infeasible(int module_idP,
return res;
}
void get_retransmission_timing(TDD_Config_t *tdd_Config, frame_t *frameP,
sub_frame_t *subframeP)
{
if (tdd_Config == NULL)
{
if (*subframeP > 1)
*frameP = (*frameP + 1) % 1024;
*subframeP = (*subframeP + 8) % 10;
}
else
{
switch (tdd_Config->subframeAssignment)//TODO fill in other TDD configs
{
case 1:
if (*subframeP == 0 || *subframeP == 5)
{
*subframeP += 19;
*frameP = (*frameP + *subframeP/10) % 1024;
*subframeP %= 10;
}
else if (*subframeP == 4 || *subframeP == 9)
{
*subframeP += 16;
*frameP = (*frameP + *subframeP/10) % 1024;
*subframeP %= 10;
}
else
{
AssertFatal(2 == 1,
"Illegal dl subframe %d for tdd config %d\n", *subframeP,
tdd_Config->subframeAssignment);
}
break;
}
}
}
uint8_t get_dl_subframe_count(int tdd_config_sfa, sub_frame_t subframeP){
uint8_t tdd1[10] = {1,-1,-1,-1,2,3,-1,-1,-1,4}; // special subframes 1,6 are excluded
switch(tdd_config_sfa){// TODO fill in other tdd configs
case 1 :
return tdd1[subframeP];
break;
}
return -1;
}
uint8_t frame_subframe2_dl_harq_pid(TDD_Config_t *tdd_Config, int abs_frameP, sub_frame_t subframeP){
int harq_pid;
if(tdd_Config){
switch(tdd_Config->subframeAssignment){ //TODO fill in other tdd config
case 1:
harq_pid = ((frame_cnt*1024 + abs_frameP) * 4 + get_dl_subframe_count(tdd_Config->subframeAssignment,subframeP))%7;//4 dl subframe in a frame
LOG_I(MAC,"[frame_subframe2_dl_harq_pid] (%d,%d) calculate harq_pid (( %d * 1024 + %d) *4 + %d)%7 = %d \n",
(abs_frameP+1024)%1024,subframeP,frame_cnt,abs_frameP,
get_dl_subframe_count(tdd_Config->subframeAssignment,subframeP),harq_pid);
return harq_pid;
break;
}
}
return -1;
}
void
extract_harq(module_id_t mod_idP, int CC_idP, int UE_id,
@@ -3647,8 +3763,12 @@ extract_harq(module_id_t mod_idP, int CC_idP, int UE_id,
int pCCid = UE_list->pCC_id[UE_id];
int spatial_bundling = 0;
int tmode[5];
int i, j;
int i, j, m;
uint8_t *pdu;
LTE_DL_FRAME_PARMS *fp;
sub_frame_t subframe_tx;
int frame_tx;
uint8_t harq_pid;
#ifdef Rel14
if (UE_list->UE_template[pCCid][UE_id].physicalConfigDedicated != NULL &&
@@ -3668,22 +3788,37 @@ extract_harq(module_id_t mod_idP, int CC_idP, int UE_id,
&& (format == 1))))
spatial_bundling = 1;
#endif
fp=&(RC.eNB[mod_idP][CC_idP]->frame_parms);
for (i = 0; i < numCC; i++)
tmode[i] = get_tmode(mod_idP, i, UE_id);
if (cc->tdd_Config) {
harq_indication_tdd =
(nfapi_harq_indication_tdd_rel13_t *) harq_indication;
harq_indication_tdd = (nfapi_harq_indication_tdd_rel13_t *) harq_indication;
// pdu = &harq_indication_tdd->harq_tb_n[0];
num_ack_nak = harq_indication_tdd->number_of_ack_nack;
switch (harq_indication_tdd->mode) {
case 0: // Format 1a/b
AssertFatal(numCC == 1,
"numCC %d > 1, should not be using Format1a/b\n",
numCC);
case 0: // Format 1a/b bundling
AssertFatal(numCC == 1, "numCC %d > 1, should not be using Format1a/b\n", numCC);
int M = ul_ACK_subframe2_M(fp,subframeP);
for(m=0;m<M;m++){
subframe_tx = ul_ACK_subframe2_dl_subframe(fp,subframeP,m);
if(frameP==1023&&subframeP>5)
frame_tx= -1;
else
frame_tx = subframeP < 5 ? frameP-1:frameP; // not formal
harq_pid = frame_subframe2_dl_harq_pid(cc->tdd_Config,frame_tx,subframe_tx);
if(num_ack_nak==1){
if(harq_indication_tdd->harq_data[0].bundling.value_0==1){ //ack
sched_ctl->round[CC_idP][harq_pid] = 8; // release HARQ process
sched_ctl->tbcnt[CC_idP][harq_pid] = 0;
}else{ //nack
if( sched_ctl->round[CC_idP][harq_pid]<8)
sched_ctl->round[CC_idP][harq_pid]++;
}
}
}
break;
case 1: // Channel Selection
break;
@@ -3700,7 +3835,7 @@ extract_harq(module_id_t mod_idP, int CC_idP, int UE_id,
num_ack_nak = harq_indication_fdd->number_of_ack_nack;
pdu = &harq_indication_fdd->harq_tb_n[0];
uint8_t harq_pid = ((10 * frameP) + subframeP + 10236) & 7;
harq_pid = ((10 * frameP) + subframeP + 10236) & 7;
LOG_D(MAC,"frame %d subframe %d harq_pid %d mode %d tmode[0] %d num_ack_nak %d round %d\n",frameP,subframeP,harq_pid,harq_indication_fdd->mode,tmode[0],num_ack_nak,sched_ctl->round[CC_idP][harq_pid]);
openair2/LAYER2/MAC/eNB_scheduler_ulsch.c
+32 -19
View File
@@ -216,8 +216,9 @@ rx_sdu(const module_id_t enb_mod_idP,
first_rb_ul[harq_pid];
ra[RA_id].msg3_round++;
// prepare handling of retransmission
ra[RA_id].Msg3_frame = (ra[RA_id].Msg3_frame + ((ra[RA_id].Msg3_subframe > 1) ? 1 : 0)) % 1024;
ra[RA_id].Msg3_subframe = (ra[RA_id].Msg3_subframe + 8) % 10;
get_Msg3allocret(&mac->common_channels[CC_idP],
ra[RA_id].Msg3_subframe, ra[RA_id].Msg3_frame,
&ra[RA_id].Msg3_frame, &ra[RA_id].Msg3_subframe);
add_msg3(enb_mod_idP, CC_idP, &ra[RA_id], frameP,
subframeP);
}
@@ -659,9 +660,15 @@ rx_sdu(const module_id_t enb_mod_idP,
if(mac->common_channels[CC_idP].tdd_Config!=NULL){
ra->Msg4_frame = frameP + ((subframeP > 2) ? 1 : 0);
ra->Msg4_subframe = (subframeP + 7) % 10; // TODO need to be complete for other tdd configs.
}else{
// Program Msg4 PDCCH+DLSCH/MPDCCH transmission 4 subframes from now, // Check if this is ok for BL/CE, or if the rule is different
ra->Msg4_frame = frameP + ((subframeP > 5) ? 1 : 0);
ra->Msg4_subframe = (subframeP + 4) % 10;
ra->Msg4_frame = frameP + ((subframeP > 5) ? 1 : 0);
ra->Msg4_subframe = (subframeP + 4) % 10;
}
UE_list->UE_sched_ctrl[UE_id].crnti_reconfigurationcomplete_flag = 0;
} // if process is active
} // loop on RA processes
@@ -793,7 +800,10 @@ rx_sdu(const module_id_t enb_mod_idP,
LOG_D(MAC,
"Programming PHICH ACK for rnti %x harq_pid %d (first_rb %d)\n",
current_rnti, harq_pid, first_rb);
nfapi_hi_dci0_request_t *hi_dci0_req = &mac->HI_DCI0_req[CC_idP];
nfapi_hi_dci0_request_t *hi_dci0_req;
uint8_t sf_ahead_dl = ul_subframe2_k_phich(&mac->common_channels[CC_idP] , subframeP);
hi_dci0_req = &mac->HI_DCI0_req[CC_idP][(subframeP+sf_ahead_dl)%10];
nfapi_hi_dci0_request_body_t *hi_dci0_req_body = &hi_dci0_req->hi_dci0_request_body;
nfapi_hi_dci0_request_pdu_t *hi_dci0_pdu =
&hi_dci0_req_body->hi_dci0_pdu_list[hi_dci0_req_body->number_of_dci + hi_dci0_req_body->number_of_hi];
@@ -807,7 +817,7 @@ rx_sdu(const module_id_t enb_mod_idP,
hi_dci0_req_body->number_of_hi++;
hi_dci0_req_body->sfnsf = sfnsf_add_subframe(frameP,subframeP, 0);
hi_dci0_req_body->tl.tag = NFAPI_HI_DCI0_REQUEST_BODY_TAG;
hi_dci0_req->sfn_sf = sfnsf_add_subframe(frameP,subframeP, 4);
hi_dci0_req->sfn_sf = sfnsf_add_subframe(frameP,subframeP,sf_ahead_dl);
hi_dci0_req->header.message_id = NFAPI_HI_DCI0_REQUEST;
/* NN--> FK: we could either check the payload, or use a phy helper to detect a false msg3 */
@@ -1002,10 +1012,8 @@ schedule_ulsch(module_id_t module_idP, frame_t frameP,
if ((tdd_sfa==0)||
(tdd_sfa==1)) sched_subframe = 7;
else if (tdd_sfa==6) sched_subframe = 8;
else return;
break;
default:
return;
case 2: // Don't schedule UL in subframe 2 for TDD
return;
case 3:
@@ -1029,7 +1037,7 @@ schedule_ulsch(module_id_t module_idP, frame_t frameP,
case 7:
return;
case 8:
if ((tdd_sfa>=2) || (tdd_sfa<=5)) sched_subframe=2;
if ((tdd_sfa>=2) && (tdd_sfa<=5)) sched_subframe=2;
else return;
break;
case 9:
@@ -1153,7 +1161,7 @@ schedule_ulsch_rnti(module_id_t module_idP,
if (sched_subframeP < subframeP)
sched_frame++;
nfapi_hi_dci0_request_t *hi_dci0_req = &mac->HI_DCI0_req[CC_id];
nfapi_hi_dci0_request_t *hi_dci0_req = &mac->HI_DCI0_req[CC_id][subframeP];
nfapi_hi_dci0_request_body_t *hi_dci0_req_body = &hi_dci0_req->hi_dci0_request_body;
nfapi_hi_dci0_request_pdu_t *hi_dci0_pdu;
@@ -1465,7 +1473,7 @@ schedule_ulsch_rnti(module_id_t module_idP,
UE_template->DAI_ul[sched_subframeP];
hi_dci0_req_body->number_of_dci++;
hi_dci0_req_body->sfnsf = sfnsf_add_subframe(frameP, subframeP, 4);
hi_dci0_req_body->sfnsf = sfnsf_add_subframe(sched_frame, sched_subframeP, 0); //(frameP, subframeP, 4)
hi_dci0_req_body->tl.tag = NFAPI_HI_DCI0_REQUEST_BODY_TAG;
hi_dci0_req->sfn_sf = frameP<<4|subframeP; // sfnsf_add_subframe(sched_frame, sched_subframeP, 0); // sunday!
@@ -1661,23 +1669,28 @@ void schedule_ulsch_rnti(module_id_t module_idP,
if (sched_subframeP < subframeP) sched_frame++;
nfapi_hi_dci0_request_body_t *hi_dci0_req = &eNB->HI_DCI0_req[module_idP].hi_dci0_request_body;
nfapi_hi_dci0_request_body_t *hi_dci0_req;
nfapi_hi_dci0_request_pdu_t *hi_dci0_pdu;
nfapi_ul_config_request_body_t *ul_req_tmp = &eNB->UL_req_tmp[module_idP][sched_subframeP].ul_config_request_body;
nfapi_ul_config_request_body_t *ul_req_tmp;
LOG_D(MAC,"entering ulsch preprocesor\n");
ulsch_scheduler_pre_processor(module_idP,
frameP,
subframeP,
sched_subframeP,
ulsch_ue_select);
LOG_D(MAC,"exiting ulsch preprocesor\n");
eNB->HI_DCI0_req[module_idP].sfn_sf = (frameP<<4)+subframeP;
// loop over all active UEs
for (CC_id=0; CC_id<MAX_NUM_CCs; CC_id++) {
hi_dci0_req = &eNB->HI_DCI0_req[CC_id][subframeP].hi_dci0_request_body;
eNB->HI_DCI0_req[CC_id][subframeP].sfn_sf = (frameP<<4)+subframeP;
ul_req_tmp = &eNB->UL_req_tmp[CC_id][sched_subframeP].ul_config_request_body;
ULSCH_first_end = 0;
cc = &eNB->common_channels[CC_id];
// This is the actual CC_id in the list
@@ -1827,7 +1840,7 @@ void schedule_ulsch_rnti(module_id_t module_idP,
// save it for a potential retransmission
UE_template->cshift[harq_pid] = cshift;
hi_dci0_pdu = &hi_dci0_req->hi_dci0_pdu_list[eNB->HI_DCI0_req[CC_id].hi_dci0_request_body.number_of_dci+eNB->HI_DCI0_req[CC_id].hi_dci0_request_body.number_of_hi];
hi_dci0_pdu = &hi_dci0_req->hi_dci0_pdu_list[hi_dci0_req->number_of_dci+hi_dci0_req->number_of_hi];
memset((void*)hi_dci0_pdu,0,sizeof(nfapi_hi_dci0_request_pdu_t));
hi_dci0_pdu->pdu_type = NFAPI_HI_DCI0_DCI_PDU_TYPE;
hi_dci0_pdu->pdu_size = 2+sizeof(nfapi_hi_dci0_dci_pdu);
@@ -1845,7 +1858,7 @@ void schedule_ulsch_rnti(module_id_t module_idP,
hi_dci0_pdu->dci_pdu.dci_pdu_rel8.cqi_csi_request = cqi_req;
hi_dci0_pdu->dci_pdu.dci_pdu_rel8.dl_assignment_index = UE_template->DAI_ul[sched_subframeP];
eNB->HI_DCI0_req[CC_id].hi_dci0_request_body.number_of_dci++;
hi_dci0_req->number_of_dci++;
LOG_D(MAC,"[PUSCH %d] Frame %d, Subframe %d: Adding UL CONFIG.Request for UE %d/%x, ulsch_frame %d, ulsch_subframe %d\n",
harq_pid,frameP,subframeP,UE_id,rnti,sched_frame,sched_subframeP);
@@ -1941,7 +1954,7 @@ void schedule_ulsch_rnti(module_id_t module_idP,
// Cyclic shift for DM RS
cshift = 0;// values from 0 to 7 can be used for mapping the cyclic shift (36.211 , Table 5.5.2.1.1-1)
hi_dci0_pdu = &hi_dci0_req->hi_dci0_pdu_list[eNB->HI_DCI0_req[CC_id].hi_dci0_request_body.number_of_dci+eNB->HI_DCI0_req[CC_id].hi_dci0_request_body.number_of_hi];
hi_dci0_pdu = &hi_dci0_req->hi_dci0_pdu_list[hi_dci0_req->number_of_dci+hi_dci0_req->number_of_hi];
memset((void*)hi_dci0_pdu,0,sizeof(nfapi_hi_dci0_request_pdu_t));
hi_dci0_pdu->pdu_type = NFAPI_HI_DCI0_DCI_PDU_TYPE;
hi_dci0_pdu->pdu_size = 2+sizeof(nfapi_hi_dci0_dci_pdu);
@@ -1959,7 +1972,7 @@ void schedule_ulsch_rnti(module_id_t module_idP,
hi_dci0_pdu->dci_pdu.dci_pdu_rel8.cqi_csi_request = cqi_req;
hi_dci0_pdu->dci_pdu.dci_pdu_rel8.dl_assignment_index = UE_template->DAI_ul[sched_subframeP];
eNB->HI_DCI0_req[CC_id].hi_dci0_request_body.number_of_dci++;
hi_dci0_req->number_of_dci++;
// fill in NAK information
hi_dci0_pdu = &hi_dci0_req->hi_dci0_pdu_list[hi_dci0_req->number_of_dci+hi_dci0_req->number_of_hi];
memset((void*)hi_dci0_pdu,0,sizeof(nfapi_hi_dci0_request_pdu_t));
openair2/LAYER2/MAC/flexran_agent_scheduler_dlsch_ue.c
+2 -2
View File
@@ -1277,7 +1277,7 @@ flexran_schedule_ue_spec_common(mid_t mod_id,
PROTOCOL__FLEX_DUPLEX_MODE__FLDM_TDD) {
UE_list->UE_template[CC_id][UE_id].DAI++;
update_ul_dci(mod_id, CC_id, rnti,
UE_list->UE_template[CC_id][UE_id].DAI);
UE_list->UE_template[CC_id][UE_id].DAI,subframe);
LOG_D(MAC,
"DAI update: CC_id %d subframeP %d: UE %d, DAI %d\n",
CC_id, subframe, UE_id,
@@ -1642,7 +1642,7 @@ flexran_schedule_ue_spec_common(mid_t mod_id,
//#warning only for 5MHz channel
update_ul_dci(mod_id, CC_id, rnti,
UE_list->UE_template[CC_id][UE_id].
DAI);
DAI,frame);
}
// do PUCCH power control
// this is the normalized RX power
openair2/LAYER2/MAC/main.c
+4 -3
View File
@@ -158,9 +158,10 @@ void mac_top_init_eNB(void)
RC.mac[i]->UL_req_tmp[j][k].
ul_config_request_body.ul_config_pdu_list =
RC.mac[i]->ul_config_pdu_list_tmp[j][k];
RC.mac[i]->HI_DCI0_req[j].
hi_dci0_request_body.hi_dci0_pdu_list =
RC.mac[i]->hi_dci0_pdu_list[j];
for(int sf=0;sf<10;sf++){
RC.mac[i]->HI_DCI0_req[j][sf].hi_dci0_request_body.hi_dci0_pdu_list =RC.mac[i]->hi_dci0_pdu_list[j][sf];
}
RC.mac[i]->TX_req[j].tx_request_body.tx_pdu_list =
RC.mac[i]->tx_request_pdu[j];
RC.mac[i]->ul_handle = 0;
openair2/LAYER2/MAC/pre_processor.c
+14 -11
View File
@@ -300,7 +300,7 @@ maxround(module_id_t Mod_id, uint16_t rnti, int frame,
UE_id = find_UE_id(Mod_id, rnti);
if (cc->tdd_Config)
harq_pid = ((frame * 10) + subframe) % 10;
harq_pid = frame_subframe2_dl_harq_pid(cc->tdd_Config,frame ,subframe);
else
harq_pid = ((frame * 10) + subframe) & 7;
@@ -1128,7 +1128,7 @@ void dlsch_scheduler_pre_processor (module_id_t Mod_id,
rnti = dlsch_ue_select[CC_id].list[i].rnti;
ue_sched_ctl = &UE_list->UE_sched_ctrl[UE_id];
if (cc->tdd_Config) harq_pid = ((frameP*10)+subframeP)%10;
if (cc->tdd_Config) harq_pid = frame_subframe2_dl_harq_pid(cc->tdd_Config,frameP ,subframeP);
else harq_pid = ((frameP*10)+subframeP)&7;
Round = ue_sched_ctl->round[CC_id][harq_pid];
@@ -1866,6 +1866,7 @@ dlsch_scheduler_pre_processor_allocate(module_id_t Mod_id,
void ulsch_scheduler_pre_processor(module_id_t module_idP,
int frameP,
sub_frame_t subframeP,
unsigned char sched_subframeP,
uint16_t *first_rb)
{
@@ -1997,7 +1998,7 @@ void ulsch_scheduler_pre_processor(module_id_t module_idP,
harq_pid =
subframe2harqpid(&RC.mac[module_idP]->
common_channels[CC_id], frameP,
subframeP);
sched_subframeP);
// mac_xface->get_ue_active_harq_pid(module_idP,CC_id,rnti,frameP,subframeP,&harq_pid,&round,openair_harq_UL);
@@ -2396,6 +2397,7 @@ void ulsch_scheduler_pre_ue_select(
module_id_t module_idP,
frame_t frameP,
sub_frame_t subframeP,
sub_frame_t sched_subframeP,
ULSCH_UE_SELECT ulsch_ue_select[MAX_NUM_CCs])
{
eNB_MAC_INST *eNB=RC.mac[module_idP];
@@ -2426,7 +2428,7 @@ void ulsch_scheduler_pre_ue_select(
for ( CC_id = 0; CC_id < MAX_NUM_CCs; CC_id++ ) {
//save ulsch dci number
saved_ulsch_dci[CC_id] = eNB->HI_DCI0_req[CC_id].hi_dci0_request_body.number_of_dci;
saved_ulsch_dci[CC_id] = eNB->HI_DCI0_req[CC_id][subframeP].hi_dci0_request_body.number_of_dci;
// maximum multiplicity number
ulsch_ue_max_num[CC_id] =RC.rrc[module_idP]->configuration.ue_multiple_max[CC_id];
@@ -2452,7 +2454,7 @@ void ulsch_scheduler_pre_ue_select(
continue;
// UL DCI
HI_DCI0_req = &eNB->HI_DCI0_req[CC_id].hi_dci0_request_body;
HI_DCI0_req = &eNB->HI_DCI0_req[CC_id][subframeP].hi_dci0_request_body;
if ( (ulsch_ue_select[CC_id].ue_num >= ulsch_ue_max_num[CC_id]) || (cc_id_flag[CC_id] == 1) ) {
cc_id_flag[CC_id] = 1;
HI_DCI0_req->number_of_dci = saved_ulsch_dci[CC_id];
@@ -2467,7 +2469,7 @@ void ulsch_scheduler_pre_ue_select(
cc = &eNB->common_channels[CC_id];
//harq_pid
harq_pid = subframe2harqpid(cc,(frameP+(subframeP>=6 ? 1 : 0)),((subframeP+4)%10));
harq_pid = subframe2harqpid(cc,(frameP+(sched_subframeP<subframeP ? 1 : 0)),sched_subframeP);
//round
round = UE_list->UE_sched_ctrl[UE_id].round_UL[CC_id][harq_pid];
@@ -2519,7 +2521,7 @@ void ulsch_scheduler_pre_ue_select(
}
for ( CC_id = 0; CC_id < MAX_NUM_CCs; CC_id++ ) {
HI_DCI0_req = &eNB->HI_DCI0_req[CC_id].hi_dci0_request_body;
HI_DCI0_req = &eNB->HI_DCI0_req[CC_id][subframeP].hi_dci0_request_body;
for ( int temp = 0; temp < ue_first_num[CC_id]; temp++ ) {
if ( (ulsch_ue_select[CC_id].ue_num >= ulsch_ue_max_num[CC_id]) || (cc_id_flag[CC_id] == 1) ) {
cc_id_flag[CC_id] = 1;
@@ -2586,7 +2588,7 @@ void ulsch_scheduler_pre_ue_select(
if(i < ulsch_ue_select[CC_id].ue_num)
continue;
HI_DCI0_req = &eNB->HI_DCI0_req[CC_id].hi_dci0_request_body;
HI_DCI0_req = &eNB->HI_DCI0_req[CC_id][subframeP].hi_dci0_request_body;
//SR BSR
if ( (UE_list->UE_template[CC_id][UE_id].ul_total_buffer > 0) || (UE_list->UE_template[CC_id][UE_id].ul_SR > 0) ) {
hi_dci0_pdu = &HI_DCI0_req->hi_dci0_pdu_list[HI_DCI0_req->number_of_dci+HI_DCI0_req->number_of_hi];
@@ -2623,10 +2625,10 @@ void ulsch_scheduler_pre_ue_select(
}
for ( CC_id = 0; CC_id < MAX_NUM_CCs; CC_id++ ) {
HI_DCI0_req = &eNB->HI_DCI0_req[CC_id].hi_dci0_request_body;
HI_DCI0_req = &eNB->HI_DCI0_req[CC_id][subframeP].hi_dci0_request_body;
for ( int temp = 0; temp < ul_inactivity_num[CC_id]; temp++ ) {
if ( (ulsch_ue_select[CC_id].ue_num >= ulsch_ue_max_num[CC_id]) || (cc_id_flag[CC_id] == 1) ) {
HI_DCI0_req = &eNB->HI_DCI0_req[CC_id].hi_dci0_request_body;
HI_DCI0_req = &eNB->HI_DCI0_req[CC_id][subframeP].hi_dci0_request_body;
cc_id_flag[CC_id] = 1;
break;
}
@@ -2668,6 +2670,7 @@ uint8_t find_rb_table_index(uint8_t average_rbs)
void ulsch_scheduler_pre_processor(module_id_t module_idP,
frame_t frameP,
sub_frame_t subframeP,
sub_frame_t sched_subframeP,
ULSCH_UE_SELECT ulsch_ue_select[MAX_NUM_CCs])
{
int CC_id,ulsch_ue_num;
@@ -2687,7 +2690,7 @@ void ulsch_scheduler_pre_processor(module_id_t module_idP,
rnti_t rnti;
LOG_D(MAC,"In ulsch_preprocessor: ulsch ue select\n");
//ue select
ulsch_scheduler_pre_ue_select(module_idP,frameP,subframeP,ulsch_ue_select);
ulsch_scheduler_pre_ue_select(module_idP,frameP,subframeP,sched_subframeP,ulsch_ue_select);
// MCS and RB assgin
for ( CC_id = 0; CC_id < MAX_NUM_CCs; CC_id++ ) {
openair2/LAYER2/MAC/proto.h
+6 -5
View File
@@ -640,10 +640,10 @@ rnti_t UE_RNTI(module_id_t mod_idP, int ue_idP);
uint8_t find_rb_table_index(uint8_t average_rbs);
#ifndef UE_EXPANSION
void ulsch_scheduler_pre_processor(module_id_t module_idP, int frameP, sub_frame_t subframeP, uint16_t *first_rb);
void ulsch_scheduler_pre_processor(module_id_t module_idP, int frameP, sub_frame_t subframeP, unsigned char sched_subframeP,uint16_t *first_rb);
#else
void ulsch_scheduler_pre_processor(module_id_t module_idP, frame_t frameP, sub_frame_t subframeP, ULSCH_UE_SELECT ulsch_ue_select[MAX_NUM_CCs]);
void ulsch_scheduler_pre_ue_select(module_id_t module_idP,frame_t frameP,sub_frame_t subframeP,ULSCH_UE_SELECT ulsch_ue_select[MAX_NUM_CCs]);
void ulsch_scheduler_pre_processor(module_id_t module_idP, frame_t frameP, sub_frame_t subframeP, sub_frame_t sched_subframeP,ULSCH_UE_SELECT ulsch_ue_select[MAX_NUM_CCs]);
void ulsch_scheduler_pre_ue_select(module_id_t module_idP,frame_t frameP,sub_frame_t subframeP,sub_frame_t sched_subframeP,ULSCH_UE_SELECT ulsch_ue_select[MAX_NUM_CCs]);
#endif
void
set_ul_DAI(
@@ -822,7 +822,7 @@ uint32_t allocate_prbs_sub(int nb_rb, int N_RB_DL, int N_RBG,
uint8_t * rballoc);
void update_ul_dci(module_id_t module_idP, uint8_t CC_id, rnti_t rnti,
uint8_t dai);
uint8_t dai, sub_frame_t subframe);
int get_bw_index(module_id_t module_id, uint8_t CC_id);
@@ -1121,7 +1121,8 @@ void fill_nfapi_ulsch_harq_information(module_id_t module_idP,
int CC_idP,
uint16_t rntiP,
nfapi_ul_config_ulsch_harq_information
* harq_information);
* harq_information,
sub_frame_t subframeP);
uint16_t fill_nfapi_uci_acknak(module_id_t module_idP,
int CC_idP,
openair2/PHY_INTERFACE/IF_Module.c
+12 -4
View File
@@ -17,7 +17,7 @@ extern int oai_nfapi_sr_indication(nfapi_sr_indication_t *ind);
extern int oai_nfapi_rx_ind(nfapi_rx_indication_t *ind);
extern uint8_t nfapi_mode;
extern uint16_t sf_ahead;
uint16_t frame_cnt=0;
void handle_rach(UL_IND_t *UL_info) {
int i;
@@ -546,6 +546,10 @@ void UL_indication(UL_IND_t *UL_info)
UL_info->frame,UL_info->subframe,
module_id,CC_id,
UL_info->rx_ind.rx_indication_body.number_of_pdus, UL_info->harq_ind.harq_indication_body.number_of_harqs, UL_info->crc_ind.crc_indication_body.number_of_crcs, UL_info->cqi_ind.number_of_cqis, UL_info->rach_ind.rach_indication_body.number_of_preambles, UL_info->sr_ind.sr_indication_body.number_of_srs);
if(UL_info->frame==1023&&UL_info->subframe==6){ // dl scheduling 0,0
frame_cnt++;
LOG_D(MAC,"current (%d,%d) frame count dl is %d\n",UL_info->frame,UL_info->subframe,frame_cnt);
}
if (nfapi_mode != 1)
{
@@ -574,7 +578,11 @@ void UL_indication(UL_IND_t *UL_info)
handle_harq(UL_info);
// clear HI prior to handling ULSCH
mac->HI_DCI0_req[CC_id].hi_dci0_request_body.number_of_hi = 0;
uint8_t sf_ahead_dl = ul_subframe2_k_phich(&mac->common_channels[CC_id] , UL_info->subframe);
if(sf_ahead_dl!=255){
mac->HI_DCI0_req[CC_id][(UL_info->subframe+sf_ahead_dl)%10].hi_dci0_request_body.number_of_hi = 0;
LOG_D(MAC,"current (%d,%d) clear HI_DCI0_req[0][%d]\n",UL_info->frame,UL_info->subframe,(UL_info->subframe+sf_ahead_dl)%10);
}
handle_ulsch(UL_info);
@@ -593,9 +601,9 @@ void UL_indication(UL_IND_t *UL_info)
sched_info->frame = (UL_info->frame + ((UL_info->subframe>(9-sf_ahead)) ? 1 : 0)) % 1024;
sched_info->subframe = (UL_info->subframe+sf_ahead)%10;
sched_info->DL_req = &mac->DL_req[CC_id];
sched_info->HI_DCI0_req = &mac->HI_DCI0_req[CC_id];
sched_info->HI_DCI0_req = &mac->HI_DCI0_req[CC_id][sched_info->subframe];
if ((mac->common_channels[CC_id].tdd_Config==NULL) ||
(is_UL_sf(&mac->common_channels[CC_id],(sched_info->subframe+sf_ahead)%10)>0))
(is_UL_sf(&mac->common_channels[CC_id],sched_info->subframe)>0))
sched_info->UL_req = &mac->UL_req[CC_id];
else
sched_info->UL_req = NULL;