PUCCH scheduling: allocate in UL_tti_req_ahead
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@@ -457,8 +457,6 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
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nr_schedule_ulsch(module_idP, frame, slot, num_slots_per_tdd, nr_ulmix_slots, ulsch_in_slot_bitmap);
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}
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nr_schedule_pusch(module_idP, frame, slot);
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if (UE_info->active[UE_id]
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&& (is_xlsch_in_slot(dlsch_in_slot_bitmap, slot % num_slots_per_tdd))
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&& slot < 10) {
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@@ -471,6 +469,8 @@ void gNB_dlsch_ulsch_scheduler(module_id_t module_idP,
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if (UE_info->active[UE_id])
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nr_schedule_pucch(module_idP, UE_id, nr_ulmix_slots, frame, slot);
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nr_schedule_pusch(module_idP, frame, slot);
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stop_meas(&RC.nrmac[module_idP]->eNB_scheduler);
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VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_gNB_DLSCH_ULSCH_SCHEDULER,VCD_FUNCTION_OUT);
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@@ -39,51 +39,59 @@ void nr_schedule_pucch(int Mod_idP,
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int nr_ulmix_slots,
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frame_t frameP,
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sub_frame_t slotP) {
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uint16_t O_csi, O_ack, O_uci;
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uint8_t O_sr = 0; // no SR in PUCCH implemented for now
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NR_ServingCellConfigCommon_t *scc = RC.nrmac[Mod_idP]->common_channels->ServingCellConfigCommon;
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NR_UE_info_t *UE_info = &RC.nrmac[Mod_idP]->UE_info;
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AssertFatal(UE_info->active[UE_id],"Cannot find UE_id %d is not active\n",UE_id);
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NR_CellGroupConfig_t *secondaryCellGroup = UE_info->secondaryCellGroup[UE_id];
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int bwp_id=1;
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NR_BWP_Uplink_t *ubwp=secondaryCellGroup->spCellConfig->spCellConfigDedicated->uplinkConfig->uplinkBWP_ToAddModList->list.array[bwp_id-1];
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nfapi_nr_ul_tti_request_t *UL_tti_req = &RC.nrmac[Mod_idP]->UL_tti_req[0];
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NR_sched_pucch *curr_pucch;
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for (int k=0; k<nr_ulmix_slots; k++) {
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for (int l=0; l<2; l++) {
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curr_pucch = &UE_info->UE_sched_ctrl[UE_id].sched_pucch[k][l];
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O_ack = curr_pucch->dai_c;
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O_csi = curr_pucch->csi_bits;
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O_uci = O_ack + O_csi + O_sr;
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if ((O_uci>0) && (frameP == curr_pucch->frame) && (slotP == curr_pucch->ul_slot)) {
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UL_tti_req->SFN = curr_pucch->frame;
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UL_tti_req->Slot = curr_pucch->ul_slot;
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UL_tti_req->pdus_list[UL_tti_req->n_pdus].pdu_type = NFAPI_NR_UL_CONFIG_PUCCH_PDU_TYPE;
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UL_tti_req->pdus_list[UL_tti_req->n_pdus].pdu_size = sizeof(nfapi_nr_pucch_pdu_t);
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nfapi_nr_pucch_pdu_t *pucch_pdu = &UL_tti_req->pdus_list[UL_tti_req->n_pdus].pucch_pdu;
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memset(pucch_pdu,0,sizeof(nfapi_nr_pucch_pdu_t));
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UL_tti_req->n_pdus+=1;
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NR_sched_pucch *curr_pucch = &UE_info->UE_sched_ctrl[UE_id].sched_pucch[k][l];
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const uint16_t O_ack = curr_pucch->dai_c;
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const uint16_t O_csi = curr_pucch->csi_bits;
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const uint8_t O_sr = 0; // no SR in PUCCH implemented for now
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if (O_ack + O_csi + O_sr == 0
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|| frameP != curr_pucch->frame
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|| slotP != curr_pucch->ul_slot)
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continue;
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LOG_D(MAC,"Scheduling pucch reception for frame %d slot %d with (%d, %d, %d) (SR ACK, CSI) bits\n",
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frameP,slotP,O_sr,O_ack,curr_pucch->csi_bits);
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nfapi_nr_ul_tti_request_t *future_ul_tti_req =
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&RC.nrmac[Mod_idP]->UL_tti_req_ahead[0][curr_pucch->ul_slot];
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AssertFatal(future_ul_tti_req->SFN == curr_pucch->frame
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&& future_ul_tti_req->Slot == curr_pucch->ul_slot,
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"future UL_tti_req's frame.slot %d.%d does not match PUCCH %d.%d\n",
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future_ul_tti_req->SFN,
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future_ul_tti_req->Slot,
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curr_pucch->frame,
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curr_pucch->ul_slot);
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future_ul_tti_req->pdus_list[future_ul_tti_req->n_pdus].pdu_type = NFAPI_NR_UL_CONFIG_PUCCH_PDU_TYPE;
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future_ul_tti_req->pdus_list[future_ul_tti_req->n_pdus].pdu_size = sizeof(nfapi_nr_pucch_pdu_t);
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nfapi_nr_pucch_pdu_t *pucch_pdu = &future_ul_tti_req->pdus_list[future_ul_tti_req->n_pdus].pucch_pdu;
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memset(pucch_pdu, 0, sizeof(nfapi_nr_pucch_pdu_t));
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future_ul_tti_req->n_pdus += 1;
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nr_configure_pucch(pucch_pdu,
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scc,
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ubwp,
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UE_info->rnti[UE_id],
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curr_pucch->resource_indicator,
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O_csi,
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O_ack,
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O_sr);
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LOG_D(MAC,
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"%4d.%2d Scheduling pucch reception in %4d.%2d: bits SR %d, ACK %d, CSI %d, k %d l %d\n",
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frameP,
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slotP,
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curr_pucch->frame,
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curr_pucch->ul_slot,
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O_sr,
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O_ack,
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O_csi,
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k, l);
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memset((void *) &UE_info->UE_sched_ctrl[UE_id].sched_pucch[k][l],
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0,
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sizeof(NR_sched_pucch));
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}
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NR_ServingCellConfigCommon_t *scc = RC.nrmac[Mod_idP]->common_channels->ServingCellConfigCommon;
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nr_configure_pucch(pucch_pdu,
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scc,
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UE_info->UE_sched_ctrl[UE_id].active_ubwp,
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UE_info->rnti[UE_id],
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curr_pucch->resource_indicator,
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O_csi,
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O_ack,
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O_sr);
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memset(&UE_info->UE_sched_ctrl[UE_id].sched_pucch[k][l],
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0,
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sizeof(NR_sched_pucch));
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}
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}
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}
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