Merge branch 'ru_rau_enhancement-external-timing' of https://gitlab.eurecom.fr/oai/openairinterface5g into ru_rau_enhancement-external-timing
This commit is contained in:
@@ -97,44 +97,26 @@ void feptx0(RU_t *ru,int slot) {
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*/
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if (ru->generate_dmrs_sync == 1 && slot == 0 && subframe == 1 && aa==0) {
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int32_t dmrs[ru->frame_parms.ofdm_symbol_size*14] __attribute__((aligned(32)));
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int32_t *dmrsp[2] = {&dmrs[(3-ru->frame_parms.Ncp)*ru->frame_parms.ofdm_symbol_size],NULL};
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//int32_t dmrs[ru->frame_parms.ofdm_symbol_size*14] __attribute__((aligned(32)));
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//int32_t *dmrsp[2] ={dmrs,NULL}; //{&dmrs[(3-ru->frame_parms.Ncp)*ru->frame_parms.ofdm_symbol_size],NULL};
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//generate_ul_ref_sigs();
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//ru->dmrssync = (int16_t*)malloc16_clear(ru->frame_parms.ofdm_symbol_size*2*sizeof(int16_t));
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generate_drs_pusch((PHY_VARS_UE *)NULL,
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(UE_rxtx_proc_t*)NULL,
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fp,
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dmrsp,//ru->common.txdataF_BF,
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ru->common.txdataF_BF,
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0,
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AMP,
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1,
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0,
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0,
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fp->N_RB_DL,
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aa);
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idft1024((int16_t*)dmrsp[0],
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(int16_t*)&ru->common.txdata[aa][slot_offset],
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1);
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/*normal_prefix_mod((int16_t*)dmrsp[0],
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(int*)&ru->common.txdata[aa][slot_offset],
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1,
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fp);
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*/
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normal_prefix_mod(&ru->common.txdataF_BF[aa][slot*slot_sizeF],
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(int*)&ru->common.txdata[aa][slot_offset],
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3,
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fp);
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}
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else {
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normal_prefix_mod(&ru->common.txdataF_BF[aa][slot*slot_sizeF],
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}
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normal_prefix_mod(&ru->common.txdataF_BF[aa][slot*slot_sizeF],
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(int*)&ru->common.txdata[aa][slot_offset],
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7,
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fp);
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}
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}
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/*
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len = fp->samples_per_tti>>1;
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@@ -966,8 +966,6 @@ extern "C" {
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#endif
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extern "C" {
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* \param openair0_cfg RF frontend parameters set by application
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*/
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int device_init(openair0_device *device, openair0_config_t *openair0_cfg) {
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LOG_D(PHY, "openair0_cfg[0].sdr_addrs == '%s'\n", openair0_cfg[0].sdr_addrs);
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LOG_D(PHY, "openair0_cfg[0].clock_source == '%d'\n", openair0_cfg[0].clock_source);
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@@ -1103,11 +1101,14 @@ extern "C" {
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s->usrp = uhd::usrp::multi_usrp::make(args);
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// lock mboard clocks
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if (openair0_cfg[0].clock_source == internal)
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if (openair0_cfg[0].clock_source == internal) {
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s->usrp->set_clock_source("internal");
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else
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printf("Setting clock source to internal\n");
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}
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else {
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s->usrp->set_clock_source("external");
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printf("Setting clock source to external\n");
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}
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if (device->type==USRP_X300_DEV) {
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openair0_cfg[0].rx_gain_calib_table = calib_table_x310;
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#if defined(USRP_REC_PLAY)
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@@ -720,7 +720,10 @@ void tx_rf(RU_t *ru) {
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int siglen=fp->samples_per_tti,flags=1;
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if (SF_type == SF_S) {
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siglen = fp->dl_symbols_in_S_subframe*(fp->ofdm_symbol_size+fp->nb_prefix_samples0);
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int txsymb = fp->dl_symbols_in_S_subframe+(ru->is_slave==0 ? 1 : 0);
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AssertFatal(txsymb>0,"illegal txsymb %d\n",txsymb);
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siglen = fp->nb_prefix_samples0 + (txsymb*fp->ofdm_symbol_size) + (txsymb-1)*fp->nb_prefix_samples;
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//siglen = fp->dl_symbols_in_S_subframe*(fp->ofdm_symbol_size+fp->nb_prefix_samples0);
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flags=3; // end of burst
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}
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if ((fp->frame_type == TDD) &&
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@@ -797,10 +800,10 @@ void tx_rf(RU_t *ru) {
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ru->nb_tx,
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flags);
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ru->south_out_cnt++;
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//int se = dB_fixed(signal_energy(txp[0],siglen+sf_extension));
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int se = dB_fixed(signal_energy(txp[0],siglen+sf_extension));
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//LOG_D(PHY,"[TXPATH] RU %d tx_rf (en %d,len %d), writing to TS %llu, frame %d, unwrapped_frame %d, subframe %d\n",ru->idx,se,siglen+sf_extension,
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// (long long unsigned int)proc->timestamp_tx,proc->frame_tx,proc->frame_tx_unwrap,proc->subframe_tx);
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if (SF_type == SF_S) LOG_D(PHY,"[TXPATH] RU %d tx_rf (en %d,len %d), writing to TS %llu, frame %d, unwrapped_frame %d, subframe %d\n",ru->idx,se,siglen+sf_extension,
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(long long unsigned int)proc->timestamp_tx,proc->frame_tx,proc->frame_tx_unwrap,proc->subframe_tx);
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VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME( VCD_SIGNAL_DUMPER_FUNCTIONS_TRX_WRITE, 0 );
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@@ -2645,11 +2648,9 @@ void init_RU(char *rf_config_file, clock_source_t clock_source,clock_source_t ti
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ru->ts_offset = 0;
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if (ru->is_slave == 1) {
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ru->in_synch = 0;
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ru->dmrssync = 0;
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}
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else {
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ru->in_synch = 1;
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ru->dmrssync = 0;
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ru->generate_dmrs_sync=send_dmrssync;
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}
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ru->cmd = EMPTY;
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