Merge remote-tracking branch 'origin/t2-offload-mr4.1' into integration_2024_w27
This commit is contained in:
@@ -44,7 +44,7 @@
|
||||
<desc>Run nr_ulsim with T2 LDPC offload: SNR = 30, MCS = 5, 106 PRBs, 1 layer</desc>
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||||
<physim_run>nr_ulsim</physim_run>
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<physim_time_threshold>100</physim_time_threshold>
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<physim_run_args>-n100 -s30 -m5 -r106 -R106 -o -P</physim_run_args>
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<physim_run_args>-n100 -s30 -m5 -r106 -R106 -o -P --ldpc_offload.dpdk_dev d8:00.0</physim_run_args>
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</testCase>
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||||
|
||||
<testCase id="010121">
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||||
@@ -60,7 +60,7 @@
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<desc>Run nr_ulsim with T2 LDPC offload: SNR = 30, MCS = 15, 106 PRBs, 1 layer</desc>
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<physim_run>nr_ulsim</physim_run>
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<physim_time_threshold>150</physim_time_threshold>
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<physim_run_args>-n100 -s30 -m15 -r106 -R106 -o -P</physim_run_args>
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<physim_run_args>-n100 -s30 -m15 -r106 -R106 -o -P --ldpc_offload.dpdk_dev d8:00.0</physim_run_args>
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</testCase>
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<testCase id="010131">
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@@ -76,7 +76,7 @@
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<desc>Run nr_ulsim with T2 LDPC offload: SNR = 30, MCS = 25, 106 PRBs, 1 layer</desc>
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<physim_run>nr_ulsim</physim_run>
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<physim_time_threshold>250</physim_time_threshold>
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<physim_run_args>-n100 -s30 -m25 -r106 -R106 -o -P</physim_run_args>
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<physim_run_args>-n100 -s30 -m25 -r106 -R106 -o -P --ldpc_offload.dpdk_dev d8:00.0</physim_run_args>
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</testCase>
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<testCase id="010211">
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@@ -92,7 +92,7 @@
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<desc>Run nr_ulsim with T2 LDPC offload: SNR = 30, MCS = 5, 273 PRBs, 1 layer</desc>
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<physim_run>nr_ulsim</physim_run>
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<physim_time_threshold>150</physim_time_threshold>
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<physim_run_args>-n100 -s30 -m5 -r273 -R273 -o -P</physim_run_args>
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<physim_run_args>-n100 -s30 -m5 -r273 -R273 -o -P --ldpc_offload.dpdk_dev d8:00.0</physim_run_args>
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</testCase>
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<testCase id="010221">
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@@ -108,7 +108,7 @@
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<desc>Run nr_ulsim with T2 LDPC offload: SNR = 30, MCS = 15, 273 PRBs, 1 layer</desc>
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<physim_run>nr_ulsim</physim_run>
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<physim_time_threshold>350</physim_time_threshold>
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<physim_run_args>-n100 -s30 -m15 -r273 -R273 -o -P</physim_run_args>
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<physim_run_args>-n100 -s30 -m15 -r273 -R273 -o -P --ldpc_offload.dpdk_dev d8:00.0</physim_run_args>
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</testCase>
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<testCase id="010231">
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||||
@@ -124,7 +124,7 @@
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<desc>Run nr_ulsim with T2 LDPC offload: SNR = 30, MCS = 25, 273 PRBs, 1 layer</desc>
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<physim_run>nr_ulsim</physim_run>
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<physim_time_threshold>550</physim_time_threshold>
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<physim_run_args>-n100 -s30 -m25 -r273 -R273 -o -P</physim_run_args>
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<physim_run_args>-n100 -s30 -m25 -r273 -R273 -o -P --ldpc_offload.dpdk_dev d8:00.0</physim_run_args>
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</testCase>
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<testCase id="010311">
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@@ -140,7 +140,7 @@
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<desc>Run nr_ulsim with T2 LDPC offload: SNR = 30, MCS = 5, 273 PRBs, 2 layers</desc>
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<physim_run>nr_ulsim</physim_run>
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<physim_time_threshold>250</physim_time_threshold>
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<physim_run_args>-n100 -s30 -m5 -r273 -R273 -o -W2 -z2 -y2 -P</physim_run_args>
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||||
<physim_run_args>-n100 -s30 -m5 -r273 -R273 -o -W2 -z2 -y2 -P --ldpc_offload.dpdk_dev d8:00.0</physim_run_args>
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||||
</testCase>
|
||||
|
||||
<testCase id="010321">
|
||||
@@ -156,7 +156,7 @@
|
||||
<desc>Run nr_ulsim with T2 LDPC offload: SNR = 30, MCS = 15, 273 PRBs, 2 layers</desc>
|
||||
<physim_run>nr_ulsim</physim_run>
|
||||
<physim_time_threshold>650</physim_time_threshold>
|
||||
<physim_run_args>-n100 -s30 -m15 -r273 -R273 -o -W2 -z2 -y2 -P</physim_run_args>
|
||||
<physim_run_args>-n100 -s30 -m15 -r273 -R273 -o -W2 -z2 -y2 -P --ldpc_offload.dpdk_dev d8:00.0</physim_run_args>
|
||||
</testCase>
|
||||
|
||||
<testCase id="010331">
|
||||
@@ -172,7 +172,7 @@
|
||||
<desc>Run nr_ulsim with T2 LDPC offload: SNR = 30, MCS = 25, 273 PRBs, 2 layers</desc>
|
||||
<physim_run>nr_ulsim</physim_run>
|
||||
<physim_time_threshold>1100</physim_time_threshold>
|
||||
<physim_run_args>-n100 -s30 -m25 -r273 -R273 -o -W2 -z2 -y2 -P</physim_run_args>
|
||||
<physim_run_args>-n100 -s30 -m25 -r273 -R273 -o -W2 -z2 -y2 -P --ldpc_offload.dpdk_dev d8:00.0</physim_run_args>
|
||||
</testCase>
|
||||
|
||||
</testCaseList>
|
||||
|
||||
@@ -44,7 +44,7 @@
|
||||
<desc>Run nr_dlsim with T2 LDPC offload: SNR = 30, MCS = 5, 106 PRBs, 1 layer</desc>
|
||||
<physim_run>nr_dlsim</physim_run>
|
||||
<physim_time_threshold>100</physim_time_threshold>
|
||||
<physim_run_args>-n100 -s30 -e5 -b106 -R106 -c -P</physim_run_args>
|
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<physim_run_args>-n100 -s30 -e5 -b106 -R106 -c -P --ldpc_offload.dpdk_dev d8:00.0</physim_run_args>
|
||||
</testCase>
|
||||
|
||||
<testCase id="000121">
|
||||
@@ -60,7 +60,7 @@
|
||||
<desc>Run nr_dlsim with T2 LDPC offload: SNR = 30, MCS = 15, 106 PRBs, 1 layer</desc>
|
||||
<physim_run>nr_dlsim</physim_run>
|
||||
<physim_time_threshold>100</physim_time_threshold>
|
||||
<physim_run_args>-n100 -s30 -e15 -b106 -R106 -c -P</physim_run_args>
|
||||
<physim_run_args>-n100 -s30 -e15 -b106 -R106 -c -P --ldpc_offload.dpdk_dev d8:00.0</physim_run_args>
|
||||
</testCase>
|
||||
|
||||
<testCase id="000131">
|
||||
@@ -76,7 +76,7 @@
|
||||
<desc>Run nr_dlsim with T2 LDPC offload: SNR = 30, MCS = 25, 106 PRBs, 1 layer</desc>
|
||||
<physim_run>nr_dlsim</physim_run>
|
||||
<physim_time_threshold>200</physim_time_threshold>
|
||||
<physim_run_args>-n100 -s30 -e25 -b106 -R106 -c -P</physim_run_args>
|
||||
<physim_run_args>-n100 -s30 -e25 -b106 -R106 -c -P --ldpc_offload.dpdk_dev d8:00.0</physim_run_args>
|
||||
</testCase>
|
||||
|
||||
<testCase id="000211">
|
||||
@@ -92,7 +92,7 @@
|
||||
<desc>Run nr_dlsim with T2 LDPC offload: SNR = 30, MCS = 5, 273 PRBs, 1 layer</desc>
|
||||
<physim_run>nr_dlsim</physim_run>
|
||||
<physim_time_threshold>150</physim_time_threshold>
|
||||
<physim_run_args>-n100 -s30 -e5 -b273 -R273 -c -P</physim_run_args>
|
||||
<physim_run_args>-n100 -s30 -e5 -b273 -R273 -c -P --ldpc_offload.dpdk_dev d8:00.0</physim_run_args>
|
||||
</testCase>
|
||||
|
||||
<testCase id="000221">
|
||||
@@ -108,7 +108,7 @@
|
||||
<desc>Run nr_dlsim with T2 LDPC offload: SNR = 30, MCS = 15, 273 PRBs, 1 layer</desc>
|
||||
<physim_run>nr_dlsim</physim_run>
|
||||
<physim_time_threshold>250</physim_time_threshold>
|
||||
<physim_run_args>-n100 -s30 -e15 -b273 -R273 -c -P</physim_run_args>
|
||||
<physim_run_args>-n100 -s30 -e15 -b273 -R273 -c -P --ldpc_offload.dpdk_dev d8:00.0</physim_run_args>
|
||||
</testCase>
|
||||
|
||||
<testCase id="000231">
|
||||
@@ -124,7 +124,7 @@
|
||||
<desc>Run nr_dlsim with T2 LDPC offload: SNR = 30, MCS = 25, 273 PRBs, 1 layer</desc>
|
||||
<physim_run>nr_dlsim</physim_run>
|
||||
<physim_time_threshold>400</physim_time_threshold>
|
||||
<physim_run_args>-n100 -s30 -e25 -b273 -R273 -c -P</physim_run_args>
|
||||
<physim_run_args>-n100 -s30 -e25 -b273 -R273 -c -P --ldpc_offload.dpdk_dev d8:00.0</physim_run_args>
|
||||
</testCase>
|
||||
|
||||
<testCase id="000311">
|
||||
@@ -140,7 +140,7 @@
|
||||
<desc>Run nr_dlsim with T2 LDPC offload: SNR = 30, MCS = 5, 273 PRBs, 2 layers</desc>
|
||||
<physim_run>nr_dlsim</physim_run>
|
||||
<physim_time_threshold>200</physim_time_threshold>
|
||||
<physim_run_args>-n100 -s30 -e5 -b273 -R273 -c -x2 -z2 -y2 -P</physim_run_args>
|
||||
<physim_run_args>-n100 -s30 -e5 -b273 -R273 -c -x2 -z2 -y2 -P --ldpc_offload.dpdk_dev d8:00.0</physim_run_args>
|
||||
</testCase>
|
||||
|
||||
<testCase id="000321">
|
||||
@@ -156,7 +156,7 @@
|
||||
<desc>Run nr_dlsim with T2 LDPC offload: SNR = 30, MCS = 15, 273 PRBs, 2 layers</desc>
|
||||
<physim_run>nr_dlsim</physim_run>
|
||||
<physim_time_threshold>500</physim_time_threshold>
|
||||
<physim_run_args>-n100 -s30 -e15 -b273 -R273 -c -x2 -z2 -y2 -P</physim_run_args>
|
||||
<physim_run_args>-n100 -s30 -e15 -b273 -R273 -c -x2 -z2 -y2 -P --ldpc_offload.dpdk_dev d8:00.0</physim_run_args>
|
||||
</testCase>
|
||||
|
||||
<testCase id="000331">
|
||||
@@ -172,7 +172,7 @@
|
||||
<desc>Run nr_dlsim with T2 LDPC offload: SNR = 30, MCS = 25, 273 PRBs, 2 layers</desc>
|
||||
<physim_run>nr_dlsim</physim_run>
|
||||
<physim_time_threshold>800</physim_time_threshold>
|
||||
<physim_run_args>-n100 -s30 -e25 -b273 -R273 -c -x2 -z2 -y2 -P</physim_run_args>
|
||||
<physim_run_args>-n100 -s30 -e25 -b273 -R273 -c -x2 -z2 -y2 -P --ldpc_offload.dpdk_dev d8:00.0</physim_run_args>
|
||||
</testCase>
|
||||
|
||||
</testCaseList>
|
||||
|
||||
@@ -74,16 +74,11 @@ If DPDK library was installed into custom path, you have to point to the right d
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```
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||||
export PKG_CONFIG_PATH=/opt/dpdk-t2/lib64/pkgconfig/:$PKG_CONFIG_PATH
|
||||
```
|
||||
## T2 card DPDK initialization
|
||||
Following lines in `openair1/PHY/CODING/nrLDPC_decoder/nrLDPC_decoder_offload.c` file has to be
|
||||
modified based on your system requirements. By default, PCI address of the T2 card is set to 41:00.0 and cores 14 and 15 are assigned to the DPDK.
|
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```
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||||
char *dpdk_dev = "41:00.0"; //PCI address of the card
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char *argv_re[] = {"bbdev", "-a", dpdk_dev, "-l", "14-15", "--file-prefix=b6", "--"};
|
||||
```
|
||||
For the DPDK EAL initialization, device is specified by `-a` option and list
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||||
of cores to run the DPDK application on is selected by `-l` option. PCI adress of
|
||||
the T2 card can be detected by `lspci | grep "Xilinx"` command.
|
||||
## Setup of T2-related DPDK EAL parameters
|
||||
To configure T2-related DPDK Environment Abstraction Layer (EAL) parameters, you can set the following parameters via the command line:
|
||||
- `ldpc_offload.dpdk_dev` - **mandatory** parameter, specifies PCI address of the T2 card. PCI address of the T2 card can be detected by `lspci | grep "Xilinx"` command.
|
||||
- `ldpc_offload.dpdk_cores_list` - CPU cores assigned to DPDK for T2 processing, by default set to *11-12*. Ensure that the CPU cores specified in *ldpc_offload.dpdk_cores_list* are available and not used by other processes to avoid conflicts.
|
||||
- `ldpc_offload.dpdk_prefix` - DPDK shared data file prefix, by default set to *b6*
|
||||
|
||||
# OAI Build
|
||||
OTA deployment is precisely described in the following tutorial:
|
||||
@@ -118,7 +113,7 @@ Offload of the channel decoding to the T2 card is in nr_ulsim specified by *-o*
|
||||
cd ~/openairinterface5g
|
||||
source oaienv
|
||||
cd cmake_targets/ran_build/build
|
||||
sudo ./nr_ulsim -n100 -s20 -m20 -r273 -R273 -o
|
||||
sudo ./nr_ulsim -n100 -s20 -m20 -r273 -R273 -o --ldpc_offload.dpdk_dev 01:00.0
|
||||
```
|
||||
## nr_dlsim test
|
||||
Offload of the channel encoding to the AMD Xilinx T2 card is in nr_dlsim specified by *-c* option. Example command for running nr_dlsim with LDPC encoding offload to the T2 card:
|
||||
@@ -126,7 +121,7 @@ Offload of the channel encoding to the AMD Xilinx T2 card is in nr_dlsim specifi
|
||||
cd ~/openairinterface5g
|
||||
source oaienv
|
||||
cd cmake_targets/ran_build/build
|
||||
sudo ./nr_dlsim -n300 -s30 -R 106 -e 27 -c
|
||||
sudo ./nr_dlsim -n300 -s30 -R 106 -e 27 -c --ldpc_offload.dpdk_dev 01:00.0
|
||||
```
|
||||
|
||||
# OTA test
|
||||
@@ -137,7 +132,7 @@ Offload of the channel encoding and decoding to the AMD Xilinx T2 card is enable
|
||||
cd ~/openairinterface5g
|
||||
source oaienv
|
||||
cd cmake_targets/ran_build/build
|
||||
sudo ./nr-softmodem --sa -O ../../../targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.106PRB.usrpb210.conf --ldpc-offload-enable
|
||||
sudo ./nr-softmodem --sa -O ../../../targets/PROJECTS/GENERIC-NR-5GC/CONF/gnb.sa.band78.fr1.106PRB.usrpb210.conf --ldpc-offload-enable --ldpc_offload.dpdk_dev 01:00.0
|
||||
```
|
||||
|
||||
# Limitations
|
||||
|
||||
@@ -286,6 +286,7 @@ void set_options(int CC_id, PHY_VARS_NR_UE *UE){
|
||||
UE->rf_map.card = card_offset;
|
||||
UE->rf_map.chain = CC_id + chain_offset;
|
||||
UE->max_ldpc_iterations = nrUE_params.max_ldpc_iterations;
|
||||
UE->ldpc_offload_enable = nrUE_params.ldpc_offload_flag;
|
||||
UE->UE_scan_carrier = nrUE_params.UE_scan_carrier;
|
||||
UE->UE_fo_compensation = nrUE_params.UE_fo_compensation;
|
||||
UE->if_freq = nrUE_params.if_freq;
|
||||
@@ -490,7 +491,11 @@ int main(int argc, char **argv)
|
||||
cpuf=get_cpu_freq_GHz();
|
||||
itti_init(TASK_MAX, tasks_info);
|
||||
|
||||
init_opt() ;
|
||||
init_opt();
|
||||
|
||||
if (nrUE_params.ldpc_offload_flag)
|
||||
load_LDPClib("_t2", &ldpc_interface_offload);
|
||||
|
||||
load_LDPClib(NULL, &ldpc_interface);
|
||||
|
||||
if (ouput_vcd) {
|
||||
|
||||
@@ -38,6 +38,7 @@
|
||||
{"dlsch-parallel", CONFIG_HLP_DLSCH_PARA, 0, .u8ptr=NULL, .defintval=0, TYPE_UINT8, 0}, \
|
||||
{"offset-divisor", CONFIG_HLP_OFFSET_DIV, 0, .uptr=&nrUE_params.ofdm_offset_divisor, .defuintval=8, TYPE_UINT32, 0}, \
|
||||
{"max-ldpc-iterations", CONFIG_HLP_MAX_LDPC_ITERATIONS, 0, .iptr=&nrUE_params.max_ldpc_iterations, .defuintval=8, TYPE_UINT8, 0}, \
|
||||
{"ldpc-offload-enable", CONFIG_HLP_LDPC_OFFLOAD, PARAMFLAG_BOOL, .iptr=&(nrUE_params.ldpc_offload_flag), .defintval=0, TYPE_INT, 0}, \
|
||||
{"nr-dlsch-demod-shift", CONFIG_HLP_DLSHIFT, 0, .iptr=(int32_t *)&nr_dlsch_demod_shift, .defintval=0, TYPE_INT, 0}, \
|
||||
{"V" , CONFIG_HLP_VCD, PARAMFLAG_BOOL, .iptr=&vcdflag, .defintval=0, TYPE_INT, 0}, \
|
||||
{"uecap_file", CONFIG_HLP_UECAP_FILE, 0, .strptr=&uecap_file, .defstrval="./uecap_ports1.xml", TYPE_STRING, 0}, \
|
||||
@@ -81,6 +82,7 @@ typedef struct {
|
||||
int nb_antennas_tx;
|
||||
int N_RB_DL;
|
||||
int ssb_start_subcarrier;
|
||||
int ldpc_offload_flag;
|
||||
} nrUE_params_t;
|
||||
extern uint64_t get_nrUE_optmask(void);
|
||||
extern uint64_t set_nrUE_optmask(uint64_t bitmask);
|
||||
|
||||
@@ -259,7 +259,7 @@ one_measurement_t test_ldpc(short max_iterations,
|
||||
printf("To: %d\n", (Kb + nrows - no_punctured_columns) * Zc - removed_bit);
|
||||
printf("number of undecoded bits: %d\n", (Kb + nrows - no_punctured_columns - 2) * Zc - removed_bit);
|
||||
|
||||
encoder_implemparams_t impp = {.Zc = Zc, .Kb = Kb, .E = block_length, .BG = BG, .Kr = block_length, .K = block_length};
|
||||
encoder_implemparams_t impp = {.Zc = Zc, .Kb = Kb, .BG = BG, .Kr = block_length, .K = block_length};
|
||||
impp.gen_code = 2;
|
||||
|
||||
if (ntrials==0)
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@@ -12,14 +12,7 @@
|
||||
#include <rte_hexdump.h>
|
||||
#include <rte_log.h>
|
||||
|
||||
#define TEST_SUCCESS 0
|
||||
#define TEST_FAILED -1
|
||||
#define TEST_SKIPPED 1
|
||||
|
||||
#define MAX_BURST 512U
|
||||
#define DEFAULT_BURST 32U
|
||||
#define DEFAULT_OPS 64U
|
||||
#define DEFAULT_ITER 6U
|
||||
|
||||
enum op_data_type {
|
||||
DATA_INPUT = 0,
|
||||
@@ -30,106 +23,4 @@ enum op_data_type {
|
||||
DATA_NUM_TYPES,
|
||||
};
|
||||
|
||||
#define TEST_ASSERT(cond, msg, ...) do { \
|
||||
if (!(cond)) { \
|
||||
printf("TestCase %s() line %d failed: " \
|
||||
msg "\n", __func__, __LINE__, ##__VA_ARGS__); \
|
||||
return TEST_FAILED; \
|
||||
} \
|
||||
} while (0)
|
||||
|
||||
/* Compare two buffers (length in bytes) */
|
||||
#define TEST_ASSERT_BUFFERS_ARE_EQUAL(a, b, len, msg, ...) do { \
|
||||
if (memcmp((a), (b), len)) { \
|
||||
printf("TestCase %s() line %d failed: " \
|
||||
msg "\n", __func__, __LINE__, ##__VA_ARGS__); \
|
||||
rte_memdump(stdout, "Buffer A", (a), len); \
|
||||
rte_memdump(stdout, "Buffer B", (b), len); \
|
||||
return TEST_FAILED; \
|
||||
} \
|
||||
} while (0)
|
||||
|
||||
#define TEST_ASSERT_SUCCESS(val, msg, ...) do { \
|
||||
typeof(val) _val = (val); \
|
||||
if (!(_val == 0)) { \
|
||||
printf("TestCase %s() line %d failed (err %d): " \
|
||||
msg "\n", __func__, __LINE__, _val, \
|
||||
##__VA_ARGS__); \
|
||||
return TEST_FAILED; \
|
||||
} \
|
||||
} while (0)
|
||||
|
||||
#define TEST_ASSERT_FAIL(val, msg, ...) \
|
||||
TEST_ASSERT_SUCCESS(!(val), msg, ##__VA_ARGS__)
|
||||
|
||||
#define TEST_ASSERT_NOT_NULL(val, msg, ...) do { \
|
||||
if ((val) == NULL) { \
|
||||
printf("TestCase %s() line %d failed (null): " \
|
||||
msg "\n", __func__, __LINE__, ##__VA_ARGS__); \
|
||||
return TEST_FAILED; \
|
||||
} \
|
||||
} while (0)
|
||||
|
||||
struct unit_test_case {
|
||||
int (*setup)(void);
|
||||
void (*teardown)(void);
|
||||
int (*testcase)(void);
|
||||
const char *name;
|
||||
};
|
||||
|
||||
#define TEST_CASE(testcase) {NULL, NULL, testcase, #testcase}
|
||||
|
||||
#define TEST_CASE_ST(setup, teardown, testcase) \
|
||||
{setup, teardown, testcase, #testcase}
|
||||
|
||||
#define TEST_CASES_END() {NULL, NULL, NULL, NULL}
|
||||
|
||||
struct unit_test_suite {
|
||||
const char *suite_name;
|
||||
int (*setup)(void);
|
||||
void (*teardown)(void);
|
||||
struct unit_test_case unit_test_cases[];
|
||||
};
|
||||
|
||||
int unit_test_suite_runner(struct unit_test_suite *suite);
|
||||
|
||||
typedef int (test_callback)(void);
|
||||
TAILQ_HEAD(test_commands_list, test_command);
|
||||
struct test_command {
|
||||
TAILQ_ENTRY(test_command) next;
|
||||
const char *command;
|
||||
test_callback *callback;
|
||||
};
|
||||
|
||||
void add_test_command(struct test_command *t);
|
||||
|
||||
/* Register a test function */
|
||||
#define REGISTER_TEST_COMMAND(name, testsuite) \
|
||||
static int test_func_##name(void) \
|
||||
{ \
|
||||
return unit_test_suite_runner(&testsuite); \
|
||||
} \
|
||||
static struct test_command test_struct_##name = { \
|
||||
.command = RTE_STR(name), \
|
||||
.callback = test_func_##name, \
|
||||
}; \
|
||||
RTE_INIT(test_register_##name) \
|
||||
{ \
|
||||
add_test_command(&test_struct_##name); \
|
||||
}
|
||||
|
||||
const char *get_vector_filename(void);
|
||||
|
||||
unsigned int get_num_ops(void);
|
||||
|
||||
unsigned int get_burst_sz(void);
|
||||
|
||||
unsigned int get_num_lcores(void);
|
||||
|
||||
double get_snr(void);
|
||||
|
||||
unsigned int get_iter_max(void);
|
||||
|
||||
bool get_init_device(void);
|
||||
|
||||
#endif
|
||||
|
||||
@@ -78,6 +78,15 @@ typedef enum nrLDPC_outMode {
|
||||
nrLDPC_outMode_LLRINT8 /**< Single LLR value per int8_t output */
|
||||
} e_nrLDPC_outMode;
|
||||
|
||||
/**
|
||||
Structure containing LDPC parameters per CB
|
||||
*/
|
||||
typedef struct nrLDPC_params_per_cb {
|
||||
uint32_t E_cb;
|
||||
uint8_t status_cb;
|
||||
uint8_t* p_status_cb;
|
||||
} nrLDPC_params_per_cb_t;
|
||||
|
||||
/**
|
||||
Structure containing LDPC decoder parameters.
|
||||
*/
|
||||
@@ -94,18 +103,24 @@ typedef struct nrLDPC_dec_params {
|
||||
int crc_type;
|
||||
int (*check_crc)(uint8_t* decoded_bytes, uint32_t n, uint8_t crc_type);
|
||||
uint8_t setCombIn;
|
||||
nrLDPC_params_per_cb_t perCB[NR_LDPC_MAX_NUM_CB];
|
||||
} t_nrLDPC_dec_params;
|
||||
|
||||
/**
|
||||
Structure containing LDPC offload parameters.
|
||||
*/
|
||||
typedef struct nrLDPCoffload_params {
|
||||
uint8_t BG; /**< Base graph */
|
||||
uint16_t Z;
|
||||
uint16_t Kr;
|
||||
uint8_t rv;
|
||||
uint32_t E;
|
||||
uint16_t n_cb;
|
||||
uint16_t F; /**< Filler bits */
|
||||
uint8_t Qm; /**< Modulation */
|
||||
uint8_t C;
|
||||
uint8_t numMaxIter;
|
||||
uint8_t setCombIn;
|
||||
nrLDPC_params_per_cb_t perCB[NR_LDPC_MAX_NUM_CB];
|
||||
} t_nrLDPCoffload_params;
|
||||
|
||||
/**
|
||||
|
||||
@@ -99,6 +99,8 @@
|
||||
/** Maximum number of possible input LLR = NR_LDPC_NCOL_BG1*NR_LDPC_ZMAX */
|
||||
#define NR_LDPC_MAX_NUM_LLR 27000
|
||||
|
||||
#define NR_LDPC_MAX_NUM_CB 72
|
||||
|
||||
// ==============================================================================
|
||||
// GLOBAL CONSTANT VARIABLES
|
||||
|
||||
|
||||
@@ -59,8 +59,9 @@ typedef struct {
|
||||
uint32_t F;
|
||||
/// Modulation order
|
||||
uint8_t Qm;
|
||||
uint32_t E;
|
||||
uint32_t Tbslbrm;
|
||||
unsigned int G;
|
||||
nrLDPC_params_per_cb_t perCB[NR_LDPC_MAX_NUM_CB];
|
||||
// Redundancy version index
|
||||
uint8_t rv;
|
||||
} encoder_implemparams_t;
|
||||
|
||||
@@ -137,6 +137,9 @@ int phy_init_nr_gNB(PHY_VARS_gNB *gNB)
|
||||
|
||||
if (gNB->ldpc_offload_flag)
|
||||
load_LDPClib("_t2", &ldpc_interface_offload);
|
||||
else
|
||||
load_LDPClib(NULL, &ldpc_interface);
|
||||
|
||||
gNB->max_nb_pdsch = MAX_MOBILES_PER_GNB;
|
||||
init_delay_table(fp->ofdm_symbol_size, MAX_DELAY_COMP, NR_MAX_OFDM_SYMBOL_SIZE, fp->delay_table);
|
||||
|
||||
|
||||
@@ -360,6 +360,7 @@ int nr_dlsch_encoding(PHY_VARS_gNB *gNB,
|
||||
impp.harq = harq;
|
||||
if (gNB->ldpc_offload_flag) {
|
||||
impp.Qm = rel15->qamModOrder[0];
|
||||
impp.Tbslbrm = rel15->maintenance_parms_v3.tbSizeLbrmBytes;
|
||||
impp.rv = rel15->rvIndex[0];
|
||||
int nb_re_dmrs =
|
||||
(rel15->dmrsConfigType == NFAPI_NR_DMRS_TYPE1) ? (6 * rel15->numDmrsCdmGrpsNoData) : (4 * rel15->numDmrsCdmGrpsNoData);
|
||||
@@ -370,13 +371,10 @@ int nr_dlsch_encoding(PHY_VARS_gNB *gNB,
|
||||
harq->unav_res,
|
||||
rel15->qamModOrder[0],
|
||||
rel15->nrOfLayers);
|
||||
int r_offset = 0;
|
||||
for (int r = 0; r < impp.n_segments; r++) {
|
||||
impp.E = nr_get_E(impp.G, impp.n_segments, impp.Qm, rel15->nrOfLayers, r);
|
||||
uint8_t *f = impp.output + r_offset;
|
||||
ldpc_interface_offload.LDPCencoder(&harq->c[r], &f, &impp);
|
||||
r_offset += impp.E;
|
||||
impp.perCB[r].E_cb = nr_get_E(impp.G, impp.n_segments, impp.Qm, rel15->nrOfLayers, r);
|
||||
}
|
||||
ldpc_interface_offload.LDPCencoder(harq->c, &impp.output, &impp);
|
||||
} else {
|
||||
notifiedFIFO_t nf;
|
||||
initNotifiedFIFO(&nf);
|
||||
|
||||
@@ -232,64 +232,60 @@ int decode_offload(PHY_VARS_gNB *phy_vars_gNB,
|
||||
{
|
||||
NR_gNB_ULSCH_t *ulsch = &phy_vars_gNB->ulsch[ULSCH_id];
|
||||
NR_UL_gNB_HARQ_t *harq_process = ulsch->harq_process;
|
||||
int16_t z_ol[LDPC_MAX_CB_SIZE] __attribute__((aligned(16)));
|
||||
int8_t l_ol[LDPC_MAX_CB_SIZE] __attribute__((aligned(16)));
|
||||
uint8_t Qm = pusch_pdu->qam_mod_order;
|
||||
uint8_t n_layers = pusch_pdu->nrOfLayers;
|
||||
int16_t z_ol[NR_LDPC_MAX_NUM_CB * LDPC_MAX_CB_SIZE] __attribute__((aligned(16)));
|
||||
int8_t l_ol[NR_LDPC_MAX_NUM_CB * LDPC_MAX_CB_SIZE] __attribute__((aligned(16)));
|
||||
const int kc = decParams->BG == 2 ? 52 : 68;
|
||||
uint32_t A = (harq_process->TBS) << 3;
|
||||
const int Kr = harq_process->K;
|
||||
const int Kr_bytes = Kr >> 3;
|
||||
uint32_t A = (harq_process->TBS) << 3;
|
||||
const int kc = decParams->BG == 2 ? 52 : 68;
|
||||
ulsch->max_ldpc_iterations = 20;
|
||||
int decodeIterations = 2;
|
||||
int r_offset = 0, offset = 0;
|
||||
for (int r = 0; r < harq_process->C; r++) {
|
||||
int E = nr_get_E(G, harq_process->C, Qm, n_layers, r);
|
||||
memset(harq_process->c[r], 0, Kr_bytes);
|
||||
decParams->R = nr_get_R_ldpc_decoder(pusch_pdu->pusch_data.rv_index,
|
||||
E,
|
||||
decParams->BG,
|
||||
decParams->Z,
|
||||
&harq_process->llrLen,
|
||||
harq_process->round);
|
||||
int8_t decodeIterations = 0;
|
||||
int r_offset = 0;
|
||||
int offset = 0;
|
||||
// new data received, set processedSegments to 0
|
||||
if (!decParams->setCombIn)
|
||||
harq_process->processedSegments = 0;
|
||||
|
||||
memcpy(z_ol, ulsch_llr + r_offset, E * sizeof(short));
|
||||
simde__m128i *pv_ol128 = (simde__m128i *)&z_ol;
|
||||
simde__m128i *pl_ol128 = (simde__m128i *)&l_ol;
|
||||
for (int r = 0; r < harq_process->C; r++) {
|
||||
decParams->perCB[r].E_cb = nr_get_E(G, harq_process->C, decParams->Qm, pusch_pdu->nrOfLayers, r);
|
||||
memcpy(&z_ol[offset], ulsch_llr + r_offset, decParams->perCB[r].E_cb * sizeof(*z_ol));
|
||||
simde__m128i *pv_ol128 = (simde__m128i *)&z_ol[offset];
|
||||
simde__m128i *pl_ol128 = (simde__m128i *)&l_ol[offset];
|
||||
for (int i = 0, j = 0; j < ((kc * harq_process->Z) >> 4) + 1; i += 2, j++) {
|
||||
pl_ol128[j] = simde_mm_packs_epi16(pv_ol128[i], pv_ol128[i + 1]);
|
||||
}
|
||||
decParams->E = E;
|
||||
decParams->rv = pusch_pdu->pusch_data.rv_index;
|
||||
decParams->F = harq_process->F;
|
||||
decParams->Qm = Qm;
|
||||
decodeIterations =
|
||||
ldpc_interface_offload
|
||||
.LDPCdecoder(decParams, harq_pid, ULSCH_id, r, (int8_t *)&pl_ol128[0], (int8_t *)harq_process->c[r], NULL, NULL);
|
||||
if (decodeIterations < 0) {
|
||||
LOG_E(PHY, "ulsch_decoding.c: Problem in LDPC decoder offload\n");
|
||||
return -1;
|
||||
}
|
||||
bool decodeSuccess = check_crc((uint8_t *)harq_process->c[r], lenWithCrc(harq_process->C, A), crcType(harq_process->C, A));
|
||||
if (decodeSuccess) {
|
||||
memcpy(harq_process->b + offset, harq_process->c[r], Kr_bytes - (harq_process->F >> 3) - ((harq_process->C > 1) ? 3 : 0));
|
||||
offset += (Kr_bytes - (harq_process->F >> 3) - ((harq_process->C > 1) ? 3 : 0));
|
||||
r_offset += decParams->perCB[r].E_cb;
|
||||
offset += LDPC_MAX_CB_SIZE;
|
||||
}
|
||||
|
||||
int8_t p_outDec[harq_process->C * Kr_bytes];
|
||||
memset(p_outDec, 0, sizeof(p_outDec));
|
||||
decodeIterations =
|
||||
ldpc_interface_offload.LDPCdecoder(decParams, harq_pid, ULSCH_id, harq_process->C, (int8_t *)l_ol, p_outDec, NULL, NULL);
|
||||
|
||||
if (decodeIterations < 0) {
|
||||
LOG_E(PHY, "ulsch_decoding.c: Problem in LDPC decoder offload\n");
|
||||
return -1;
|
||||
}
|
||||
|
||||
int offset_b = 0;
|
||||
for (int r = 0; r < harq_process->C; r++) {
|
||||
if (decParams->perCB[r].status_cb == 0 || harq_process->C == 1) {
|
||||
memcpy(harq_process->b + offset_b, &p_outDec[offset_b], Kr_bytes - (harq_process->F >> 3) - ((harq_process->C > 1) ? 3 : 0));
|
||||
harq_process->processedSegments++;
|
||||
} else {
|
||||
LOG_D(PHY, "uplink segment error %d/%d\n", r, harq_process->C);
|
||||
LOG_D(PHY, "ULSCH %d in error\n", ULSCH_id);
|
||||
}
|
||||
r_offset += E;
|
||||
offset_b += (Kr_bytes - (harq_process->F >> 3) - ((harq_process->C > 1) ? 3 : 0));
|
||||
}
|
||||
|
||||
bool crc_valid = false;
|
||||
// CRC check made by the T2, no need to perform CRC check for a single code block twice
|
||||
if (harq_process->processedSegments == harq_process->C) {
|
||||
// When the number of code blocks is 1 (C = 1) and ulsch_harq->processedSegments = 1, we can assume a good TB because of the
|
||||
// CRC check made by the LDPC for early termination, so, no need to perform CRC check twice for a single code block
|
||||
crc_valid = true;
|
||||
if (harq_process->C > 1) {
|
||||
crc_valid = check_crc(harq_process->b, lenWithCrc(1, A), crcType(1, A));
|
||||
crc_valid = check_crc(harq_process->b, lenWithCrc(1, A), crcType(1, A));
|
||||
if (harq_process->C == 1 && !crc_valid) {
|
||||
harq_process->processedSegments--;
|
||||
}
|
||||
}
|
||||
|
||||
if (crc_valid) {
|
||||
LOG_D(PHY, "ULSCH: Setting ACK for slot %d TBS %d\n", ulsch->slot, harq_process->TBS);
|
||||
nr_fill_indication(phy_vars_gNB, ulsch->frame, ulsch->slot, ULSCH_id, harq_pid, 0, 0);
|
||||
@@ -349,7 +345,6 @@ int nr_ulsch_decoding(PHY_VARS_gNB *phy_vars_gNB,
|
||||
const uint8_t n_layers = pusch_pdu->nrOfLayers;
|
||||
// ------------------------------------------------------------------
|
||||
|
||||
harq_process->processedSegments = 0;
|
||||
harq_process->TBS = pusch_pdu->pusch_data.tb_size;
|
||||
|
||||
t_nrLDPC_dec_params decParams = {.check_crc = check_crc};
|
||||
@@ -418,6 +413,8 @@ int nr_ulsch_decoding(PHY_VARS_gNB *phy_vars_gNB,
|
||||
|
||||
decParams.Z = harq_process->Z;
|
||||
decParams.numMaxIter = ulsch->max_ldpc_iterations;
|
||||
decParams.Qm = Qm;
|
||||
decParams.rv = pusch_pdu->pusch_data.rv_index;
|
||||
decParams.outMode = 0;
|
||||
decParams.setCombIn = !harq_process->harq_to_be_cleared;
|
||||
if (harq_process->harq_to_be_cleared) {
|
||||
@@ -428,7 +425,7 @@ int nr_ulsch_decoding(PHY_VARS_gNB *phy_vars_gNB,
|
||||
|
||||
if (phy_vars_gNB->ldpc_offload_flag)
|
||||
return decode_offload(phy_vars_gNB, ULSCH_id, ulsch_llr, pusch_pdu, &decParams, harq_pid, G);
|
||||
|
||||
harq_process->processedSegments = 0;
|
||||
uint32_t offset = 0, r_offset = 0;
|
||||
set_abort(&harq_process->abort_decode, false);
|
||||
for (int r = 0; r < harq_process->C; r++) {
|
||||
|
||||
@@ -151,16 +151,13 @@ int nr_ulsch_encoding(PHY_VARS_NR_UE *ue,
|
||||
start_meas(&ue->ulsch_ldpc_encoding_stats);
|
||||
if (ldpc_interface_offload.LDPCencoder) {
|
||||
for (int j = 0; j < impp.n_segments; j++) {
|
||||
impp.E = nr_get_E(G, impp.n_segments, impp.Qm, ulsch->pusch_pdu.nrOfLayers, j);
|
||||
uint8_t *f = harq_process->f + r_offset;
|
||||
ldpc_interface_offload.LDPCencoder(&harq_process->c[j], &f, &impp);
|
||||
r_offset += impp.E;
|
||||
impp.perCB[j].E_cb = nr_get_E(G, impp.n_segments, impp.Qm, ulsch->pusch_pdu.nrOfLayers, j);
|
||||
}
|
||||
ldpc_interface_offload.LDPCencoder(harq_process->c, &harq_process->f, &impp);
|
||||
} else {
|
||||
if (ulsch->pusch_pdu.pusch_data.new_data_indicator) {
|
||||
for (int j = 0; j < (impp.n_segments / 8 + 1); j++) {
|
||||
impp.macro_num = j;
|
||||
impp.E = nr_get_E(G, impp.n_segments, impp.Qm, ulsch->pusch_pdu.nrOfLayers, j);
|
||||
impp.Kr = impp.K;
|
||||
ldpc_interface.LDPCencoder(harq_process->c, harq_process->d, &impp);
|
||||
}
|
||||
@@ -191,7 +188,7 @@ int nr_ulsch_encoding(PHY_VARS_NR_UE *ue,
|
||||
ulsch->pusch_pdu.pusch_data.rv_index);
|
||||
|
||||
///////////////////////// d---->| Rate matching bit selection |---->e /////////////////////////
|
||||
impp.E = nr_get_E(G, impp.n_segments, impp.Qm, ulsch->pusch_pdu.nrOfLayers, r);
|
||||
impp.perCB[r].E_cb = nr_get_E(G, impp.n_segments, impp.Qm, ulsch->pusch_pdu.nrOfLayers, r);
|
||||
|
||||
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_NR_RATE_MATCHING_LDPC, VCD_FUNCTION_IN);
|
||||
start_meas(&ue->ulsch_rate_matching_stats);
|
||||
@@ -204,7 +201,8 @@ int nr_ulsch_encoding(PHY_VARS_NR_UE *ue,
|
||||
impp.F,
|
||||
impp.Kr - impp.F - 2 * impp.Zc,
|
||||
impp.rv,
|
||||
impp.E) == -1)
|
||||
impp.perCB[r].E_cb)
|
||||
== -1)
|
||||
return -1;
|
||||
|
||||
stop_meas(&ue->ulsch_rate_matching_stats);
|
||||
@@ -218,10 +216,7 @@ int nr_ulsch_encoding(PHY_VARS_NR_UE *ue,
|
||||
///////////////////////// e---->| Rate matching bit interleaving |---->f /////////////////////////
|
||||
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_NR_INTERLEAVING_LDPC, VCD_FUNCTION_IN);
|
||||
start_meas(&ue->ulsch_interleaving_stats);
|
||||
nr_interleaving_ldpc(impp.E,
|
||||
impp.Qm,
|
||||
harq_process->e + r_offset,
|
||||
harq_process->f + r_offset);
|
||||
nr_interleaving_ldpc(impp.perCB[r].E_cb, impp.Qm, harq_process->e + r_offset, harq_process->f + r_offset);
|
||||
stop_meas(&ue->ulsch_interleaving_stats);
|
||||
|
||||
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_NR_INTERLEAVING_LDPC, VCD_FUNCTION_OUT);
|
||||
@@ -231,7 +226,7 @@ int nr_ulsch_encoding(PHY_VARS_NR_UE *ue,
|
||||
if (r == impp.n_segments - 1)
|
||||
write_output("enc_output.m","enc", harq_process->f, G, 1, 4);
|
||||
#endif
|
||||
r_offset += impp.E;
|
||||
r_offset += impp.perCB[r].E_cb;
|
||||
}
|
||||
}
|
||||
///////////////////////////////////////////////////////////////////////////////////////////////
|
||||
|
||||
@@ -510,6 +510,7 @@ typedef struct PHY_VARS_NR_UE_s {
|
||||
|
||||
uint8_t max_ldpc_iterations;
|
||||
|
||||
int ldpc_offload_enable;
|
||||
/// SRS variables
|
||||
nr_srs_info_t *nr_srs_info;
|
||||
|
||||
|
||||
Reference in New Issue
Block a user