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fixed some SIB display messages in rrc_UE.c. Scheduling policy and priorities in lte-ue.c for SCHED_FIFO operation (with USRP B210).

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git-svn-id: http://svn.eurecom.fr/openair4G/trunk@7714 818b1a75-f10b-46b9-bf7c-635c3b92a50f
This commit is contained in:
knopp
2015-07-21 08:21:32 +00:00
parent 98f85fe712
commit a118499139
9 changed files with 204 additions and 80 deletions
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openair1/PHY/LTE_TRANSPORT/dci.c
+6 -3
View File
@@ -533,7 +533,7 @@ void pdcch_deinterleaving(LTE_DL_FRAME_PARMS *frame_parms,uint16_t *z, uint16_t
for (i=0; i<Mquad; i++) {
zptr = &z[i<<2];
/*
/*
printf("deinterleaving ; quad %d => (%d,%d,%d,%d,%d,%d,%d,%d)\n",i,
((int8_t *)zptr)[0],
((int8_t *)zptr)[1],
@@ -543,7 +543,7 @@ void pdcch_deinterleaving(LTE_DL_FRAME_PARMS *frame_parms,uint16_t *z, uint16_t
((int8_t *)zptr)[5],
((int8_t *)zptr)[6],
((int8_t *)zptr)[7]);
*/
*/
}
}
@@ -1872,6 +1872,7 @@ int32_t rx_pdcch(LTE_UE_COMMON *lte_ue_common_vars,
if (n_pdcch_symbols>3)
n_pdcch_symbols=1;
#ifdef DEBUG_DCI_DECODING
msg("[PDCCH] subframe %d n_pdcch_symbols from PCFICH =%d\n",subframe,n_pdcch_symbols);
@@ -2543,7 +2544,9 @@ uint16_t get_nCCE_max(uint8_t Mod_id,uint8_t CC_id)
return(get_nCCE(3,&PHY_vars_eNB_g[Mod_id][CC_id]->lte_frame_parms,1)); // 5, 15,21
}
void dci_decoding_procedure0(LTE_UE_PDCCH **lte_ue_pdcch_vars,int do_common,uint8_t subframe,
void dci_decoding_procedure0(LTE_UE_PDCCH **lte_ue_pdcch_vars,
int do_common,
uint8_t subframe,
DCI_ALLOC_t *dci_alloc,
int16_t eNB_id,
LTE_DL_FRAME_PARMS *frame_parms,
openair1/PHY/LTE_TRANSPORT/phich.c
+1 -1
View File
@@ -309,7 +309,7 @@ void generate_phich_reg_mapping(LTE_DL_FRAME_PARMS *frame_parms)
pcfich_reg[frame_parms->pcfich_first_reg_idx],
n0,
n1,
((frame_parms->Nid_cell*n0)/n1)%n0);
((frame_parms->Nid_cell))%n0);
//#endif
// This is the algorithm from Section 6.9.3 in 36-211, it works only for normal PHICH duration for now ...
openair1/PHY/TOOLS/lte_phy_scope.c
+3 -3
View File
@@ -215,7 +215,7 @@ void phy_scope_eNB(FD_lte_phy_scope_enb *form,
if (chest_t[0] !=NULL) {
for (i=0; i<(frame_parms->ofdm_symbol_size); i++) {
chest_t_abs[0][i] = (float) (chest_t[0][2*i]*chest_t[0][2*i]+chest_t[0][2*i+1]*chest_t[0][2*i+1]);
chest_t_abs[0][i] = 10*log10((float) (chest_t[0][2*i]*chest_t[0][2*i]+chest_t[0][2*i+1]*chest_t[0][2*i+1]));
if (chest_t_abs[0][i] > ymax)
ymax = chest_t_abs[0][i];
@@ -227,8 +227,8 @@ void phy_scope_eNB(FD_lte_phy_scope_enb *form,
for (arx=1; arx<nb_antennas_rx; arx++) {
if (chest_t[arx] !=NULL) {
for (i=0; i<(frame_parms->ofdm_symbol_size>>3); i++) {
chest_t_abs[arx][i] = (float) (chest_t[arx][2*i]*chest_t[arx][2*i]+chest_t[arx][2*i+1]*chest_t[arx][2*i+1]);
chest_t_abs[arx][i] = 10*log10((float) (chest_t[arx][2*i]*chest_t[arx][2*i]+chest_t[arx][2*i+1]*chest_t[arx][2*i+1]));
if (chest_t_abs[arx][i] > ymax)
ymax = chest_t_abs[arx][i];
}
openair1/SCHED/phy_procedures_lte_ue.c
+14 -12
View File
@@ -2139,16 +2139,17 @@ int lte_ue_pdcch_procedures(uint8_t eNB_id,PHY_VARS_UE *phy_vars_ue,uint8_t abst
#endif
// dump_dci(&phy_vars_ue->lte_frame_parms, &dci_alloc_rx[i]);
if (generate_ue_dlsch_params_from_dci(subframe_rx,
(void *)&dci_alloc_rx[i].dci_pdu,
phy_vars_ue->lte_ue_pdcch_vars[eNB_id]->crnti,
dci_alloc_rx[i].format,
phy_vars_ue->dlsch_ue[eNB_id],
&phy_vars_ue->lte_frame_parms,
phy_vars_ue->pdsch_config_dedicated,
SI_RNTI,
0,
P_RNTI)==0) {
if ((phy_vars_ue->UE_mode[eNB_id] > PRACH) &&
(generate_ue_dlsch_params_from_dci(subframe_rx,
(void *)&dci_alloc_rx[i].dci_pdu,
phy_vars_ue->lte_ue_pdcch_vars[eNB_id]->crnti,
dci_alloc_rx[i].format,
phy_vars_ue->dlsch_ue[eNB_id],
&phy_vars_ue->lte_frame_parms,
phy_vars_ue->pdsch_config_dedicated,
SI_RNTI,
0,
P_RNTI)==0)) {
#ifdef DIAG_PHY
@@ -3098,10 +3099,11 @@ int phy_procedures_UE_RX(PHY_VARS_UE *phy_vars_ue,uint8_t eNB_id,uint8_t abstrac
// rt_printk("[PDCCH] Frame %d, slot %d, start %llu\n",frame_rx,slot_rx,rt_get_time_ns());
if (lte_ue_pdcch_procedures(eNB_id,phy_vars_ue,abstraction_flag) == -1) {
#ifdef DEBUG_PHY_PROC
LOG_E(PHY,"[UE %d] Frame %d, slot %d: Error in pdcch procedures\n",phy_vars_ue->Mod_id,frame_rx,slot_rx);
LOG_E(PHY,"[UE %d] Frame %d, slot %d: Error in pdcch procedures\n",phy_vars_ue->Mod_id,frame_rx,slot_rx);
#endif
return(-1);
return(-1);
}
// rt_printk("[PDCCH] Frame %d, slot %d, stop %llu\n",frame_rx,slot_rx,rt_get_time_ns());
#ifdef DEBUG_PHY_PROC
openair2/RRC/LITE/rrc_UE.c
+18 -17
View File
@@ -3026,19 +3026,19 @@ uint64_t arfcn_to_freq(long arfcn) {
else if (arfcn <6000) // Band 18
return((uint64_t)860000000 + ((arfcn-5850)*100000));
else if (arfcn <6150) // Band 19
return((uint64_t)875000000 + ((arfcn-5850)*100000));
return((uint64_t)875000000 + ((arfcn-6000)*100000));
else if (arfcn <6450) // Band 20
return((uint64_t)791000000 + ((arfcn-5850)*100000));
return((uint64_t)791000000 + ((arfcn-6150)*100000));
else if (arfcn <6600) // Band 21
return((uint64_t)1495900000 + ((arfcn-5850)*100000));
return((uint64_t)1495900000 + ((arfcn-6450)*100000));
else if (arfcn <7500) // Band 22
return((uint64_t)351000000 + ((arfcn-5850)*100000));
return((uint64_t)351000000 + ((arfcn-6600)*100000));
else if (arfcn <7700) // Band 23
return((uint64_t)2180000000 + ((arfcn-5850)*100000));
return((uint64_t)2180000000 + ((arfcn-7500)*100000));
else if (arfcn <8040) // Band 24
return((uint64_t)1525000000 + ((arfcn-5850)*100000));
return((uint64_t)1525000000 + ((arfcn-7700)*100000));
else if (arfcn <8690) // Band 25
return((uint64_t)1930000000 + ((arfcn-5850)*100000));
return((uint64_t)1930000000 + ((arfcn-8040)*100000));
else if (arfcn <36200) // Band 33
return((uint64_t)1900000000 + ((arfcn-36000)*100000));
else if (arfcn <36350) // Band 34
@@ -3068,7 +3068,7 @@ uint64_t arfcn_to_freq(long arfcn) {
static void dump_sib5( SystemInformationBlockType5_t *sib5 )
{
InterFreqCarrierFreqList_t interFreqCarrierFreqList = sib5->interFreqCarrierFreqList;
int i;
int i,j;
InterFreqCarrierFreqInfo_t *ifcfInfo;
LOG_I( RRC, "Dumping SIB5 (see TS36.331 V8.21.0)\n" );
@@ -3118,27 +3118,28 @@ static void dump_sib5( SystemInformationBlockType5_t *sib5 )
*ifcfInfo->cellReselectionPriority);
}
LOG_I(RRC," NeighCellConfig : ");
for (i=0;i<ifcfInfo->neighCellConfig.size;i++) {
LOG_T(RRC,"%2x ",ifcfInfo->neighCellConfig.buf[i]);
for (j=0;j<ifcfInfo->neighCellConfig.size;j++) {
printf("%2x ",ifcfInfo->neighCellConfig.buf[j]);
}
printf("\n");
if (ifcfInfo->q_OffsetFreq)
LOG_I(RRC," Q_OffsetFreq : %d",Qoffsettab[*ifcfInfo->q_OffsetFreq]);
LOG_I(RRC," Q_OffsetFreq : %d\n",Qoffsettab[*ifcfInfo->q_OffsetFreq]);
if (ifcfInfo->interFreqNeighCellList) {
for (i=0;i<ifcfInfo->interFreqNeighCellList->list.count;i++) {
for (j=0;j<ifcfInfo->interFreqNeighCellList->list.count;j++) {
LOG_I(RRC," Cell %d\n");
LOG_I(RRC," PhysCellId : %d",ifcfInfo->interFreqNeighCellList->list.array[i]->physCellId);
LOG_I(RRC," Q_OffsetRange : %d",ifcfInfo->interFreqNeighCellList->list.array[i]->q_OffsetCell);
LOG_I(RRC," PhysCellId : %d\n",ifcfInfo->interFreqNeighCellList->list.array[j]->physCellId);
LOG_I(RRC," Q_OffsetRange : %d\n",ifcfInfo->interFreqNeighCellList->list.array[j]->q_OffsetCell);
}
}
if (ifcfInfo->interFreqBlackCellList) {
for (i=0;i<ifcfInfo->interFreqBlackCellList->list.count;i++) {
for (j=0;j<ifcfInfo->interFreqBlackCellList->list.count;j++) {
LOG_I(RRC," Cell %d\n");
LOG_I(RRC," PhysCellId start: %d\n",ifcfInfo->interFreqBlackCellList->list.array[i]->start);
LOG_I(RRC," PhysCellId start: %d\n",ifcfInfo->interFreqBlackCellList->list.array[j]->start);
if (ifcfInfo->interFreqBlackCellList->list.array[i]->range) {
LOG_I(RRC," PhysCellId Range : %d\n",ifcfInfo->interFreqBlackCellList->list.array[i]->range);
LOG_I(RRC," PhysCellId Range : %d\n",ifcfInfo->interFreqBlackCellList->list.array[j]->range);
}
}
}
targets/ARCH/COMMON/common_lib.h
+11 -2
View File
@@ -51,12 +51,18 @@ typedef struct openair0_device_t openair0_device;
#define MAX_CARDS 1
#endif
#define USRP_GAIN_OFFSET (56.0) // 86 calibrated for USRP B210 @ 2.6 GHz to get equivalent RS EPRE in OAI to SMBV100 output
//#define USRP_GAIN_OFFSET (56.0) // 86 calibrated for USRP B210 @ 2.6 GHz to get equivalent RS EPRE in OAI to SMBV100 output
typedef enum {
max_gain=0,med_gain,byp_gain
} rx_gain_t;
typedef struct {
//! Frequency for which RX chain was calibrated
double freq;
//! Offset to be applied to RX gain
double offset;
} rx_gain_calib_table_t;
typedef struct {
//! Module ID for this configuration
@@ -85,11 +91,14 @@ typedef struct {
//! \brief Center frequency in Hz for TX.
//! index: [0..rx_num_channels[ !!! see lte-ue.c:427 FIXME iterates over rx_num_channels
double tx_freq[4];
//! mode for rxgain (ExpressMIMO2)
//! mode for rxgain (ExpressMIMO2)
rx_gain_t rxg_mode[4];
//! \brief Gain for RX in dB.
//! index: [0..rx_num_channels]
double rx_gain[4];
//! \brief Gain offset (for calibration) in dB
//! index: [0..rx_num_channels]
double rx_gain_offset[4];
//! gain for TX in dB
double tx_gain[4];
//! RX bandwidth in Hz
targets/ARCH/USRP/USERSPACE/LIB/usrp_lib.cpp
+55 -4
View File
@@ -227,20 +227,58 @@ int openair0_set_rx_frequencies(openair0_device* device, openair0_config_t *open
}
int openair0_set_gains(openair0_device* device, openair0_config_t *openair0_cfg) {
int openair0_set_gains(openair0_device* device,
openair0_config_t *openair0_cfg) {
usrp_state_t *s = (usrp_state_t*)device->priv;
s->usrp->set_tx_gain(openair0_cfg[0].tx_gain[0]);
s->usrp->set_rx_gain(openair0_cfg[0].rx_gain[0]);
::uhd::gain_range_t gain_range = s->usrp->get_rx_gain_range(0);
// limit to maximum gain
if (openair0_cfg[0].rx_gain[0]-openair0_cfg[0].rx_gain_offset[0] > gain_range.stop()) {
printf("RX Gain 0 too high, reduce by %f dB\n",
openair0_cfg[0].rx_gain[0]-openair0_cfg[0].rx_gain_offset[0] - gain_range.stop());
exit(-1);
}
s->usrp->set_rx_gain(openair0_cfg[0].rx_gain[0]-openair0_cfg[0].rx_gain_offset[0]);
printf("Setting USRP RX gain to %f\n", openair0_cfg[0].rx_gain[0]-openair0_cfg[0].rx_gain_offset[0]);
return(0);
}
int openair0_stop(int card) {
return(0);
}
rx_gain_calib_table_t calib_table[] = {
{3500000000.0,46.0},
{2660000000.0,53.0},
{2300000000.0,54.0},
{1880000000.0,55.0},
{816000000.0,62.0},
{-1,0}};
void set_rx_gain_offset(openair0_config_t *openair0_cfg, int chain_index) {
int i=0;
// loop through calibration table to find best adjustment factor for RX frequency
double min_diff = 6e9,diff;
while (calib_table[i].freq>0) {
diff = fabs(openair0_cfg->rx_freq[chain_index] - calib_table[i].freq);
printf("cal %d: freq %f, offset %f, diff %f\n",
i,calib_table[i].freq,calib_table[i].offset,diff);
if (min_diff > diff) {
min_diff = diff;
openair0_cfg->rx_gain_offset[chain_index] = calib_table[i].offset;
}
i++;
}
}
int openair0_print_stats(openair0_device* device) {
return(0);
@@ -252,6 +290,7 @@ int openair0_reset_stats(openair0_device* device) {
}
//int openair0_dev_init_usrp(openair0_device* device, openair0_config_t *openair0_cfg)
int openair0_device_init(openair0_device* device, openair0_config_t *openair0_cfg)
{
uhd::set_thread_priority_safe(1.0);
@@ -320,7 +359,19 @@ int openair0_device_init(openair0_device* device, openair0_config_t *openair0_cf
s->usrp->set_rx_bandwidth(openair0_cfg[0].rx_bw,i);
printf("Setting rx freq/gain on channel %lu/%lu\n",i,s->usrp->get_rx_num_channels());
s->usrp->set_rx_freq(openair0_cfg[0].rx_freq[i],i);
s->usrp->set_rx_gain(openair0_cfg[0].rx_gain[i],i);
set_rx_gain_offset(&openair0_cfg[0],i);
::uhd::gain_range_t gain_range = s->usrp->get_rx_gain_range(i);
// limit to maximum gain
if (openair0_cfg[0].rx_gain[i]-openair0_cfg[0].rx_gain_offset[i] > gain_range.stop()) {
printf("RX Gain %lu too high, lower by %f dB\n",i,openair0_cfg[0].rx_gain[i]-openair0_cfg[0].rx_gain_offset[i] - gain_range.stop());
exit(-1);
}
s->usrp->set_rx_gain(openair0_cfg[0].rx_gain[i]-openair0_cfg[0].rx_gain_offset[i],i);
printf("RX Gain %lu %f (%f) => %f (max %f)\n",i,
openair0_cfg[0].rx_gain[i],openair0_cfg[0].rx_gain_offset[i],
openair0_cfg[0].rx_gain[i]-openair0_cfg[0].rx_gain_offset[i],gain_range.stop());
}
}
for(i=0;i<s->usrp->get_tx_num_channels();i++) {
targets/RT/USER/lte-softmodem.c
+15 -11
View File
@@ -2921,10 +2921,22 @@ openair0_cfg[card].num_rb_dl=frame_parms[0]->N_RB_DL;
for (i=0; i<4; i++) {
openair0_cfg[card].tx_freq[i] = (UE_flag==0) ? downlink_frequency[0][i] : downlink_frequency[0][i]+uplink_frequency_offset[0][i];
openair0_cfg[card].rx_freq[i] = (UE_flag==0) ? downlink_frequency[0][i] + uplink_frequency_offset[0][i] : downlink_frequency[0][i];
printf("Card %d, channel %d, Setting tx_gain %f, rx_gain %f, tx_freq %f, rx_freq %f\n",
card,i, openair0_cfg[card].tx_gain[i],
openair0_cfg[card].rx_gain[i],
openair0_cfg[card].tx_freq[i],
openair0_cfg[card].rx_freq[i]);
openair0_cfg[card].autocal[i] = 1;
openair0_cfg[card].tx_gain[i] = tx_gain[0][i];
openair0_cfg[card].rx_gain[i] = ((UE_flag==0) ? PHY_vars_eNB_g[0][0]->rx_total_gain_eNB_dB :
PHY_vars_UE_g[0][0]->rx_total_gain_dB) - USRP_GAIN_OFFSET; // calibrated for USRP B210 @ 2.6 GHz, 30.72 MS/s
if (UE_flag == 0) {
openair0_cfg[card].rx_gain[i] = PHY_vars_eNB_g[0][0]->rx_total_gain_eNB_dB;
}
else {
openair0_cfg[card].rx_gain[i] = PHY_vars_UE_g[0][0]->rx_total_gain_dB;// - USRP_GAIN_OFFSET; // calibrated for USRP B210 @ 2.6 GHz, 30.72 MS/s
}
switch(frame_parms[0]->N_RB_DL) {
case 6:
@@ -2943,13 +2955,6 @@ openair0_cfg[card].num_rb_dl=frame_parms[0]->N_RB_DL;
break;
}
openair0_cfg[card].tx_freq[i] = (UE_flag==0) ? downlink_frequency[0][i] : downlink_frequency[0][i]+uplink_frequency_offset[0][i];
openair0_cfg[card].rx_freq[i] = (UE_flag==0) ? downlink_frequency[0][i] + uplink_frequency_offset[0][i] : downlink_frequency[0][i];
printf("Card %d, channel %d, Setting tx_gain %f, rx_gain %f, tx_freq %f, rx_freq %f\n",
card,i, openair0_cfg[card].tx_gain[i],
openair0_cfg[card].rx_gain[i],
openair0_cfg[card].tx_freq[i],
openair0_cfg[card].rx_freq[i]);
}
@@ -3302,8 +3307,7 @@ openair0_cfg[card].num_rb_dl=frame_parms[0]->N_RB_DL;
#ifndef EXMIMO
#ifndef USRP_DEBUG
if (mode!=loop_through_memory)
openair0.trx_request_func(&openair0);
// printf("returning from usrp start streaming: %llu\n",get_usrp_time(&openair0));
openair0.trx_start_func(&openair0);//request_func(&openair0);
#endif
#endif
targets/RT/USER/lte-ue.c
+81 -27
View File
@@ -277,8 +277,9 @@ static void *UE_thread_synch(void *arg)
openair0_cfg[card].rx_freq[i] = downlink_frequency[card][i];
openair0_cfg[card].tx_freq[i] = downlink_frequency[card][i]+uplink_frequency_offset[card][i];
#ifdef OAI_USRP
openair0_cfg[card].rx_gain[i] = UE->rx_total_gain_dB-USRP_GAIN_OFFSET;
openair0_cfg[card].rx_gain[i] = UE->rx_total_gain_dB;//-USRP_GAIN_OFFSET;
switch(UE->lte_frame_parms.N_RB_DL) {
case 6:
openair0_cfg[card].rx_gain[i] -= 12;
@@ -292,11 +293,15 @@ static void *UE_thread_synch(void *arg)
openair0_cfg[card].rx_gain[i] -= 3;
break;
case 100:
openair0_cfg[card].rx_gain[i] -= 0;
break;
default:
printf( "Unknown number of RBs %d\n", UE->lte_frame_parms.N_RB_DL );
break;
}
printf( "UE synch: setting RX gain (%d,%d) to %f\n", card, i, openair0_cfg[card].rx_gain[i] );
#endif
}
@@ -351,8 +356,8 @@ static void *UE_thread_synch(void *arg)
openair0_cfg[card].rx_freq[i] = downlink_frequency[card][i];
openair0_cfg[card].tx_freq[i] = downlink_frequency[card][i]+uplink_frequency_offset[card][i];
#ifdef OAI_USRP
openair0_cfg[card].rx_gain[i] = UE->rx_total_gain_dB-USRP_GAIN_OFFSET; // 65 calibrated for USRP B210 @ 2.6 GHz
openair0_cfg[card].rx_gain[i] = UE->rx_total_gain_dB;//-USRP_GAIN_OFFSET; // 65 calibrated for USRP B210 @ 2.6 GHz
switch(UE->lte_frame_parms.N_RB_DL) {
case 6:
openair0_cfg[card].rx_gain[i] -= 12;
@@ -366,10 +371,15 @@ static void *UE_thread_synch(void *arg)
openair0_cfg[card].rx_gain[i] -= 3;
break;
case 100:
openair0_cfg[card].rx_gain[i] -= 0;
break;
default:
printf("Unknown number of RBs %d\n",UE->lte_frame_parms.N_RB_DL);
break;
}
printf("UE synch: setting RX gain (%d,%d) to %f\n",card,i,openair0_cfg[card].rx_gain[i]);
#endif
@@ -406,42 +416,65 @@ static void *UE_thread_synch(void *arg)
freq_offset=0;
}
openair0_stop(0);
sleep(1);
// reconfigure for potentially different bandwidth
switch(UE->lte_frame_parms.N_RB_DL) {
case 6:
openair0_cfg[0].sample_rate =1.92e6;
openair0_cfg[0].rx_bw =.96e6;
openair0_cfg[0].tx_bw =.96e6;
openair0_cfg[0].rx_gain[0] -= 12;
break;
case 25:
openair0_cfg[0].sample_rate =7.68e6;
openair0_cfg[0].rx_bw =2.5e6;
openair0_cfg[0].tx_bw =2.5e6;
openair0_cfg[0].rx_gain[0] -= 6;
break;
case 50:
openair0_cfg[0].sample_rate =15.36e6;
openair0_cfg[0].rx_bw =5.0e6;
openair0_cfg[0].tx_bw =5.0e6;
openair0_cfg[0].rx_gain[0] -= 3;
break;
case 100:
openair0_cfg[0].sample_rate=30.72e6;
openair0_cfg[0].rx_bw=10.0e6;
openair0_cfg[0].tx_bw=10.0e6;
openair0_cfg[0].rx_gain[0] -= 0;
break;
}
openair0_set_frequencies(&openair0,&openair0_cfg[0],0);
openair0_set_gains(&openair0,&openair0_cfg[0]);
openair0_stop(0);
sleep(1);
// reconfigure for potentially different bandwidth
init_frame_parms(&UE->lte_frame_parms,1);
}
else {
UE->is_synchronized = 1;
if( UE->mode == rx_dump_frame ){
write_output("rxsig_frame0.m","rxsf0", &UE->lte_ue_common_vars.rxdata[0][0],10*UE->lte_frame_parms.samples_per_tti,1,1);
LOG_I(PHY,"Dummping Frame ... bye bye \n");
exit(0);
FILE *fd;
if ((UE->frame_rx&1) == 0) { // this guarantees SIB1 is present
if (fd = fopen("rxsig_frame0.dat","w")) {
fwrite((void*)&UE->lte_ue_common_vars.rxdata[0][0],
sizeof(int32_t),
10*UE->lte_frame_parms.samples_per_tti,
fd);
LOG_I(PHY,"Dummping Frame ... bye bye \n");
fclose(fd);
exit(0);
}
else {
LOG_E(PHY,"Cannot open file for writing\n");
exit(0);
}
}
else {
UE->is_synchronized = 0;
}
}
#ifndef EXMIMO
UE->slot_rx = 0;
@@ -482,10 +515,11 @@ static void *UE_thread_synch(void *arg)
openair0_cfg[card].rx_freq[i] = downlink_frequency[card][i]+freq_offset;
openair0_cfg[card].tx_freq[i] = downlink_frequency[card][i]+uplink_frequency_offset[card][i]+freq_offset;
#ifdef OAI_USRP
openair0_cfg[card].rx_gain[i] = UE->rx_total_gain_dB-USRP_GAIN_OFFSET;
openair0_cfg[card].rx_gain[i] = UE->rx_total_gain_dB;//-USRP_GAIN_OFFSET;
openair0_set_frequencies(&openair0,&openair0_cfg[0],0);
switch(UE->lte_frame_parms.N_RB_DL) {
case 6:
openair0_cfg[card].rx_gain[i] -= 12;
@@ -496,14 +530,18 @@ static void *UE_thread_synch(void *arg)
break;
case 50:
openair0_cfg[card].rx_gain[i] -= 3;
openair0_cfg[card].rx_gain[i] -= 0;//3;
break;
case 100:
openair0_cfg[card].rx_gain[i] -= 0;
break;
default:
printf("Unknown number of RBs %d\n",UE->lte_frame_parms.N_RB_DL);
break;
}
#endif
}
}
@@ -582,10 +620,10 @@ static void *UE_thread_tx(void *arg)
attr.sched_priority = 0;
/* This creates a 1ms reservation every 10ms period*/
attr.sched_policy = SCHED_DEADLINE;
attr.sched_runtime = (0.9 * 100) * 10000; // each tx thread requires .5ms to finish its job
attr.sched_deadline = (1 * 100) * 10000; // each tx thread will finish within 1ms
attr.sched_period = (1 * 100) * 10000; // each tx thread has a period of 1ms from the starting point
attr.sched_policy = SCHED_DEADLINE;
attr.sched_runtime = 900000; // each tx thread requires .5ms to finish its job
attr.sched_deadline = 1000000; // each tx thread will finish within 1ms
attr.sched_period = 1000000; // each tx thread has a period of 1ms from the starting point
if (sched_setattr(0, &attr, flags) < 0 ) {
@@ -593,6 +631,11 @@ static void *UE_thread_tx(void *arg)
return &UE_thread_tx_retval;
}
#else
struct sched_param sp;
sp.sched_priority = sched_get_priority_max(SCHED_FIFO)-1;
pthread_setschedparam(pthread_self(),SCHED_FIFO,&sp);
#endif
#endif
@@ -731,16 +774,21 @@ static void *UE_thread_rx(void *arg)
attr.sched_priority = 0;
// This creates a .5ms reservation every 1ms period
attr.sched_policy = SCHED_DEADLINE;
attr.sched_runtime = (0.9 * 100) * 10000;//900000; // each rx thread requires 1ms to finish its job
attr.sched_deadline = (1 * 100) * 10000; // each rx thread will finish within 1ms
attr.sched_period = (1 * 100) * 10000; // each rx thread has a period of 1ms from the starting point
attr.sched_policy = SCHED_DEADLINE;
attr.sched_runtime = 900000; // each rx thread requires 1ms to finish its job
attr.sched_deadline = 1000000; // each rx thread will finish within 1ms
attr.sched_period = 1000000; // each rx thread has a period of 1ms from the starting point
if (sched_setattr(0, &attr, flags) < 0 ) {
perror("[SCHED] UE_thread_rx : sched_setattr failed\n");
return &UE_thread_rx_retval;
}
#else
struct sched_param sp;
sp.sched_priority = sched_get_priority_max(SCHED_FIFO)-1;
pthread_setschedparam(pthread_self(),SCHED_FIFO,&sp);
#endif
#endif
@@ -972,9 +1020,9 @@ void *UE_thread(void *arg)
// This creates a .5 ms reservation
attr.sched_policy = SCHED_DEADLINE;
attr.sched_runtime = (0.25 * 100) * 10000;
attr.sched_deadline = (0.25 * 100) * 10000;
attr.sched_period = (0.5 * 100) * 10000;
attr.sched_runtime = 100000;
attr.sched_deadline = 500000;
attr.sched_period = 500000;
if (sched_setattr(0, &attr, flags) < 0 ) {
perror("[SCHED] main eNB thread: sched_setattr failed\n");
@@ -984,6 +1032,10 @@ void *UE_thread(void *arg)
LOG_I(HW,"[SCHED][eNB] eNB main deadline thread %lu started on CPU %d\n",
(unsigned long)gettid(), sched_getcpu());
#else
struct sched_param sp;
sp.sched_priority = sched_get_priority_max(SCHED_FIFO);
pthread_setschedparam(pthread_self(),SCHED_FIFO,&sp);
#endif
#endif
@@ -1015,7 +1067,6 @@ void *UE_thread(void *arg)
while (rxpos < (1+hw_subframe)*UE->lte_frame_parms.samples_per_tti) {
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME( VCD_SIGNAL_DUMPER_FUNCTIONS_TRX_READ, 1 );
#ifndef USRP_DEBUG
DevAssert( UE->lte_frame_parms.nb_antennas_rx <= 2 );
@@ -1046,7 +1097,7 @@ void *UE_thread(void *arg)
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME( VCD_SIGNAL_DUMPER_FUNCTIONS_TRX_READ, 0 );
// Transmit TX buffer based on timestamp from RX
if ((tx_enabled) && (UE->mode!=loop_through_memory)) {
if ((tx_enabled==1) && (UE->mode!=loop_through_memory)) {
VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME( VCD_SIGNAL_DUMPER_FUNCTIONS_TRX_WRITE, 1 );
DevAssert( UE->lte_frame_parms.nb_antennas_tx <= 2 );
@@ -1088,6 +1139,7 @@ void *UE_thread(void *arg)
LOG_D( HW, "UE_thread: hw_frame %d, hw_subframe %d (time %lli)\n", frame, hw_subframe, rt_get_time_ns()-T0 );
if (start_rx_stream == 1) {
LOG_D(PHY,"Locking mutex_rx (IC %d)\n",UE->instance_cnt_rx);
if (pthread_mutex_lock(&UE->mutex_rx) != 0) {
LOG_E( PHY, "[SCHED][UE] error locking mutex for UE RX thread\n" );
exit_fun("nothing to add");
@@ -1096,6 +1148,7 @@ void *UE_thread(void *arg)
int instance_cnt_rx = ++UE->instance_cnt_rx;
LOG_D(PHY,"Unlocking mutex_rx (IC %d)\n",instance_cnt_rx);
if (pthread_mutex_unlock(&UE->mutex_rx) != 0) {
LOG_E( PHY, "[SCHED][UE] error unlocking mutex for UE RX thread\n" );
exit_fun("nothing to add");
@@ -1144,7 +1197,8 @@ void *UE_thread(void *arg)
return &UE_thread_retval;
}
if ((tx_enabled)&&(UE->mode != loop_through_memory)) {
if ((tx_enabled==1)&&(UE->mode != loop_through_memory)) {
if (pthread_mutex_lock(&UE->mutex_tx) != 0) {
LOG_E( PHY, "[SCHED][UE] error locking mutex for UE TX thread\n" );