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scheduling pdcch structure in SIB1 depends on the associated SSB, can't be precomputed

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start symbol may depend on the associated SSB index
This commit is contained in:
francescomani
2025-05-06 16:00:58 +02:00
parent f41c572aff
commit aa516bf1b5
2 changed files with 16 additions and 11 deletions
Download Patch File Download Diff File Expand all files Collapse all files
openair2/LAYER2/NR_MAC_gNB/config.c
-2
View File
@@ -810,8 +810,6 @@ static void config_sched_ctrlCommon(gNB_MAC_INST *nr_mac)
fill_coresetZero(sched_ctrlCommon->coreset, &type0_PDCCH_CSS_config);
nr_mac->cset0_bwp_start = type0_PDCCH_CSS_config.cset_start_rb;
nr_mac->cset0_bwp_size = type0_PDCCH_CSS_config.num_rbs;
sched_ctrlCommon->sched_pdcch =
set_pdcch_structure(NULL, sched_ctrlCommon->search_space, sched_ctrlCommon->coreset, scc, NULL, &type0_PDCCH_CSS_config);
}
void nr_mac_config_scc(gNB_MAC_INST *nrmac, NR_ServingCellConfigCommon_t *scc, const nr_mac_config_t *config)
openair2/LAYER2/NR_MAC_gNB/gNB_scheduler_bch.c
+16 -9
View File
@@ -344,6 +344,7 @@ static uint32_t get_tbs_bch(NR_Type0_PDCCH_CSS_config_t *type0_PDCCH_CSS_config,
static uint32_t schedule_control_sib1(gNB_MAC_INST *gNB_mac,
int CC_id,
NR_sched_pdcch_t *pdcch,
NR_Type0_PDCCH_CSS_config_t *type0_PDCCH_CSS_config,
int time_domain_allocation,
NR_pdsch_dmrs_t *dmrs_parms,
@@ -374,7 +375,7 @@ static uint32_t schedule_control_sib1(gNB_MAC_INST *gNB_mac,
gNB_mac->sched_ctrlCommon->aggregation_level,
nr_of_candidates,
beam,
&gNB_mac->sched_ctrlCommon->sched_pdcch,
pdcch,
gNB_mac->sched_ctrlCommon->coreset,
0);
@@ -388,7 +389,7 @@ static uint32_t schedule_control_sib1(gNB_MAC_INST *gNB_mac,
// Mark the corresponding RBs as used
fill_pdcch_vrb_map(gNB_mac,
CC_id,
&gNB_mac->sched_ctrlCommon->sched_pdcch,
pdcch,
gNB_mac->sched_ctrlCommon->cce_index,
gNB_mac->sched_ctrlCommon->aggregation_level,
beam);
@@ -615,20 +616,26 @@ void schedule_nr_sib1(module_id_t module_idP,
default_table_type_t table_type = get_default_table_type(type0_PDCCH_CSS_config->type0_pdcch_ss_mux_pattern);
// assuming normal CP
NR_tda_info_t tda_info = get_info_from_tda_tables(table_type, time_domain_allocation, gNB_mac->common_channels->ServingCellConfigCommon->dmrs_TypeA_Position, true);
NR_tda_info_t tda_info = get_info_from_tda_tables(table_type, time_domain_allocation, scc->dmrs_TypeA_Position, true);
AssertFatal((tda_info.startSymbolIndex + tda_info.nrOfSymbols) < 14, "SIB1 TDA %d would cause overlap with CSI-RS. Please select a different SIB1 TDA.\n", time_domain_allocation);
AssertFatal((tda_info.startSymbolIndex + tda_info.nrOfSymbols) < 14,
"SIB1 TDA %d would cause overlap with CSI-RS. Please select a different SIB1 TDA.\n",
time_domain_allocation);
NR_pdsch_dmrs_t dmrs_parms = get_dl_dmrs_params(scc,
NULL,
&tda_info,
1);
NR_pdsch_dmrs_t dmrs_parms = get_dl_dmrs_params(scc, NULL, &tda_info, 1);
NR_sched_pdcch_t sched_pdcch = set_pdcch_structure(NULL,
gNB_mac->sched_ctrlCommon->search_space,
gNB_mac->sched_ctrlCommon->coreset,
scc,
NULL,
type0_PDCCH_CSS_config);
NR_COMMON_channels_t *cc = &gNB_mac->common_channels[0];
// Configure sched_ctrlCommon for SIB1
uint32_t TBS = schedule_control_sib1(gNB_mac,
CC_id,
&sched_pdcch,
type0_PDCCH_CSS_config,
time_domain_allocation,
&dmrs_parms,
@@ -641,7 +648,7 @@ void schedule_nr_sib1(module_id_t module_idP,
int pdu_index = gNB_mac->pdu_index[0]++;
nr_fill_nfapi_dl_SIB_pdu(gNB_mac,
&gNB_mac->sched_ctrlCommon->sched_pdsch,
&gNB_mac->sched_ctrlCommon->sched_pdcch,
&sched_pdcch,
gNB_mac->sched_ctrlCommon->search_space,
gNB_mac->sched_ctrlCommon->coreset,
gNB_mac->sched_ctrlCommon->aggregation_level,