UE writes to USRP only on tx slots
Removed the hardcoding of fixed tdd and replaced with tdd config from mac configuration
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+8
-5
@@ -781,13 +781,16 @@ void *UE_thread(void *arg) {
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decoded_frame_rx, curMsg->proc.frame_rx );
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int flags = 0;
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int slot_tx_usrp = slot_nr + DURATION_RX_TO_TX;
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if (slot_tx_usrp%10==7)
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uint8_t tdd_period = mac->phy_config.config_req.tdd_table.tdd_period_in_slots;
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uint8_t num_UL_slots = mac->scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSlots +
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(mac->scc->tdd_UL_DL_ConfigurationCommon->pattern1.nrofUplinkSymbols!=0);
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uint8_t first_tx_slot = tdd_period - num_UL_slots;
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if (curMsg->proc.nr_slot_tx%tdd_period==first_tx_slot)
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flags=2;
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else if (slot_tx_usrp%10==8)
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flags = 1;
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else if (slot_tx_usrp%10==9)
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else if (curMsg->proc.nr_slot_tx%tdd_period==first_tx_slot+num_UL_slots-1)
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flags = 3;
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else if (curMsg->proc.nr_slot_tx%tdd_period>first_tx_slot)
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flags = 1;
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if (flags || IS_SOFTMODEM_RFSIM || IS_SOFTMODEM_NOS1)
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AssertFatal( writeBlockSize ==
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@@ -1019,6 +1019,7 @@ typedef struct
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typedef struct
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{
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uint8_t tdd_period;//DL UL Transmission Periodicity. Value:0: ms0p5 1: ms0p625 2: ms1 3: ms1p25 4: ms2 5: ms2p5 6: ms5 7: ms10 8: ms3 9: ms4
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uint8_t tdd_period_in_slots;
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fapi_nr_max_tdd_periodicity_t* max_tdd_periodicity_list;
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} fapi_nr_tdd_table_t;
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@@ -82,6 +82,7 @@ int set_tdd_config_nr_ue(fapi_nr_config_request_t *cfg,
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}
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int nb_slots_per_period = ((1<<mu) * NR_NUMBER_OF_SUBFRAMES_PER_FRAME)/nb_periods_per_frame;
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cfg->tdd_table.tdd_period_in_slots = nb_slots_per_period;
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if ( (nrofDownlinkSymbols + nrofUplinkSymbols) == 0 )
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AssertFatal(nb_slots_per_period == (nrofDownlinkSlots + nrofUplinkSlots),
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