Merge branch 'NR_RRC_harq_hacks' of https://gitlab.eurecom.fr/oai/openairinterface5g into NR_RRC_harq_hacks
This commit is contained in:
@@ -1116,7 +1116,7 @@
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-n100 -s1 -t33
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-n100 -s1 -t50
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</main_exec_args>
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<tags>nr_dlsim.test1 nr_dlsim.test2 nr_dlsim.test3 nr_dlsim.test4 nr_dlsim.test5 nr_dlsim.test6 nr_dlsim.test7 nr_dlsim.test8 nr_dlsim.test9 nr_dlsim.test10 nr_dlsim.test11 nr_dlsim.test12 nr_dlsim.test13 </tags>
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<tags>nr_dlsim.test1 nr_dlsim.test2 nr_dlsim.test3 nr_dlsim.test4 nr_dlsim.test5 nr_dlsim.test6 nr_dlsim.test7 nr_dlsim.test8 nr_dlsim.test9 nr_dlsim.test10 nr_dlsim.test11 nr_dlsim.test12 nr_dlsim.test13</tags>
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<search_expr_true>PDSCH test OK</search_expr_true>
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<search_expr_false>segmentation fault|assertion|exiting|fatal</search_expr_false>
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<nruns>3</nruns>
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@@ -1227,8 +1227,7 @@
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-R 106 -i 1 -P 2 -q8 -b 19 -s-3 -n1000
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-R 106 -i 1 -P 2 -q8 -b 32 -s-3 -n1000
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-R 106 -i 1 -P 2 -q16 -b 32 -s-3 -n1000
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-R 106 -i 1 -P 2 -q16 -b 64 -s-3 -n1000
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</main_exec_args>
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-R 106 -i 1 -P 2 -q16 -b 64 -s-3 -n1000</main_exec_args>
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<tags>nr_pucchsim.test1 nr_pucchsim.test2 nr_pucchsim.test3 nr_pucchsim.test4 nr_pucchsim.test5 nr_pucchsim.test6 nr_pucchsim.test7 nr_pucchsim.test8 nr_pucchsim.test9 nr_pucchsim.test10 nr_pucchsim.test11 nr_pucchsim.test12 nr_pucchsim.test13 nr_pucchsim.test14 nr_pucchsim.test15 nr_pucchsim.test16 nr_pucchsim.test17</tags>
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<search_expr_true>PUCCH test OK</search_expr_true>
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<search_expr_false>segmentation fault|assertion|exiting|fatal</search_expr_false>
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@@ -54,7 +54,8 @@
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void nr_generate_pucch0(PHY_VARS_NR_UE *ue,
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int32_t **txdataF,
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NR_DL_FRAME_PARMS *frame_parms,
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PUCCH_CONFIG_DEDICATED *pucch_config_dedicated,
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long pucch_GroupHopping,
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long hoppingId,
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int16_t amp,
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int nr_tti_tx,
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uint8_t m0,
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@@ -111,7 +112,7 @@ void nr_generate_pucch0(PHY_VARS_NR_UE *ue,
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for (int l=0; l<nrofSymbols; l++) {
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// if frequency hopping is enabled n_hop = 1 for second hop. Not sure frequency hopping concerns format 0. FIXME!!!
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// if ((PUCCH_Frequency_Hopping == 1)&&(l == (nrofSymbols-1))) n_hop = 1;
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nr_group_sequence_hopping(ue->pucch_config_common_nr->pucch_GroupHopping,ue->pucch_config_common_nr->hoppingId,n_hop,nr_tti_tx,&u,&v); // calculating u and v value
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nr_group_sequence_hopping(pucch_GroupHopping,hoppingId,n_hop,nr_tti_tx,&u,&v); // calculating u and v value
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alpha = nr_cyclic_shift_hopping(ue->pucch_config_common_nr->hoppingId,m0,mcs,l,startingSymbolIndex,nr_tti_tx);
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#ifdef DEBUG_NR_PUCCH_TX
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printf("\t [nr_generate_pucch0] sequence generation \tu=%d \tv=%d \talpha=%lf \t(for symbol l=%d)\n",u,v,alpha,l);
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@@ -49,7 +49,8 @@
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void nr_generate_pucch0(PHY_VARS_NR_UE *ue,
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int32_t **txdataF,
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NR_DL_FRAME_PARMS *frame_parms,
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PUCCH_CONFIG_DEDICATED *pucch_config_dedicated,
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long pucch_GroupHopping,
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long hoppingId,
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int16_t amp,
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int nr_tti_tx,
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uint8_t m0,
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@@ -2227,6 +2227,8 @@ void phy_procedures_nrUE_TX(PHY_VARS_NR_UE *ue,
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VCD_SIGNAL_DUMPER_DUMP_FUNCTION_BY_NAME(VCD_SIGNAL_DUMPER_FUNCTIONS_PHY_PROCEDURES_UE_TX,VCD_FUNCTION_IN);
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memset(ue->common_vars.txdataF[0], 0, sizeof(int)*14*ue->frame_parms.ofdm_symbol_size);
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LOG_I(PHY,"****** start TX-Chain for AbsSubframe %d.%d ******\n", frame_tx, slot_tx);
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#if UE_TIMING_TRACE
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@@ -2247,11 +2249,13 @@ void phy_procedures_nrUE_TX(PHY_VARS_NR_UE *ue,
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} // UE_mode==PUSCH
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*/
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LOG_D(PHY, "Sending PUCCH\n");
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pucch_procedures_ue_nr(ue,
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gNB_id,
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proc,
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TRUE);
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if (get_softmodem_params()->do_ra==1) {
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LOG_D(PHY, "Sending PUCCH\n");
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pucch_procedures_ue_nr(ue,
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gNB_id,
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proc,
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TRUE);
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}
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LOG_D(PHY, "Sending data \n");
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nr_ue_pusch_common_procedures(ue,
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@@ -580,7 +580,8 @@ bool pucch_procedures_ue_nr(PHY_VARS_NR_UE *ue, uint8_t gNB_id, UE_nr_rxtx_proc_
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{
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nr_generate_pucch0(ue,ue->common_vars.txdataF,
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&ue->frame_parms,
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&ue->pucch_config_dedicated[gNB_id],
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mac->ULbwp[bwp_id-1]->bwp_Common->pucch_ConfigCommon->choice.setup->pucch_GroupHopping,
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mac->ULbwp[bwp_id-1]->bwp_Common->pucch_ConfigCommon->choice.setup->hoppingId[0],
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tx_amp,
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nr_tti_tx,
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(uint8_t)m_0,
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@@ -430,7 +430,7 @@ int main(int argc, char **argv)
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uint8_t is_crnti = 0, llr8_flag = 0;
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unsigned int TBS = 8424;
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unsigned int available_bits;
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uint8_t nb_re_dmrs = 12; // No data in dmrs symbol
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uint8_t nb_re_dmrs = 6; // No data in dmrs symbol
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uint16_t length_dmrs = 1;
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unsigned char mod_order;
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uint16_t rate;
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@@ -457,6 +457,7 @@ int main(int argc, char **argv)
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rel15->dmrsConfigType = NFAPI_NR_DMRS_TYPE1;
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rel15->dlDmrsSymbPos = 4;
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rel15->mcsIndex[0] = Imcs;
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rel15->numDmrsCdmGrpsNoData = 1;
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double *modulated_input = malloc16(sizeof(double) * 16 * 68 * 384); // [hna] 16 segments, 68*Zc
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short *channel_output_fixed = malloc16(sizeof(short) * 16 * 68 * 384);
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short *channel_output_uncoded = malloc16(sizeof(unsigned short) * 16 * 68 * 384);
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@@ -113,7 +113,7 @@ int main(int argc, char **argv)
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double sigma, sigma_dB;
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double snr_step = 1;
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uint8_t snr1set = 0;
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int slot = 17, frame = 0;
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int slot = 8, frame = 0;
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FILE *output_fd = NULL;
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//uint8_t write_output_file = 0;
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int trial, n_trials = 1, n_errors = 0, n_false_positive = 0, delay = 0;
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@@ -693,6 +693,7 @@ int main(int argc, char **argv)
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ul_config.ul_config_list[0].pusch_config_pdu.dmrs_config_type = 0;
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ul_config.ul_config_list[0].pusch_config_pdu.mcs_index = Imcs;
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ul_config.ul_config_list[0].pusch_config_pdu.mcs_table = mcs_table;
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ul_config.ul_config_list[0].pusch_config_pdu.num_dmrs_cdm_grps_no_data = 1;
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ul_config.ul_config_list[0].pusch_config_pdu.pusch_data.new_data_indicator = 0;
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ul_config.ul_config_list[0].pusch_config_pdu.pusch_data.rv_index = 0;
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ul_config.ul_config_list[0].pusch_config_pdu.nrOfLayers = precod_nbr_layers;
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@@ -710,7 +711,7 @@ int main(int argc, char **argv)
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TBS = nr_compute_tbs(mod_order, code_rate, nb_rb, nb_symb_sch, nb_re_dmrs * number_dmrs_symbols, 0, 0, precod_nbr_layers);
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if (input_fd != NULL) {
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if (input_fd == NULL) {
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pusch_pdu->pusch_data.tb_size = TBS>>3;
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ul_config.ul_config_list[0].pusch_config_pdu.pusch_data.tb_size = TBS;
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// set FAPI parameters for UE, put them in the scheduled response and call
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@@ -38,6 +38,7 @@
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#include "LAYER2/MAC/mac_proto.h"
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#include "LAYER2/NR_MAC_gNB/mac_proto.h"
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#include "common/ran_context.h"
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#include "executables/softmodem-common.h"
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#define MAX_IF_MODULES 100
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@@ -87,34 +88,36 @@ void handle_nr_uci(NR_UL_IND_t *UL_info, NR_UE_sched_ctrl_t *sched_ctrl) {
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case NFAPI_NR_UCI_PDCCH_PDU_TYPE: break;
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case NFAPI_NR_UCI_FORMAT_0_1_PDU_TYPE: {
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nfapi_nr_uci_pucch_pdu_format_0_1_t *uci_pdu = &uci_list[i].pucch_pdu_format_0_1;
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// handle harq
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int harq_idx_s = 0;
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// iterate over received harq bits
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for (int harq_bit = 0; harq_bit < uci_pdu->harq->num_harq; harq_bit++) {
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// search for the right harq process
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for (int harq_idx = harq_idx_s; harq_idx < NR_MAX_NB_HARQ_PROCESSES-1; harq_idx++) {
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if ((UL_info->slot-1) == sched_ctrl->harq_processes[harq_idx].feedback_slot) {
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if (uci_pdu->harq->harq_list[harq_bit].harq_value == 0)
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if (get_softmodem_params()->phy_test == 0) {
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nfapi_nr_uci_pucch_pdu_format_0_1_t *uci_pdu = &uci_list[i].pucch_pdu_format_0_1;
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// handle harq
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int harq_idx_s = 0;
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// iterate over received harq bits
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for (int harq_bit = 0; harq_bit < uci_pdu->harq->num_harq; harq_bit++) {
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// search for the right harq process
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for (int harq_idx = harq_idx_s; harq_idx < NR_MAX_NB_HARQ_PROCESSES-1; harq_idx++) {
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if ((UL_info->slot-1) == sched_ctrl->harq_processes[harq_idx].feedback_slot) {
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if (uci_pdu->harq->harq_list[harq_bit].harq_value == 0)
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sched_ctrl->harq_processes[harq_idx].round++;
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if ((uci_pdu->harq->harq_list[harq_bit].harq_value == 1) ||
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(sched_ctrl->harq_processes[harq_idx].round == max_harq_rounds)) {
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sched_ctrl->harq_processes[harq_idx].ndi ^= 1;
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sched_ctrl->harq_processes[harq_idx].round = 0;
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}
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sched_ctrl->harq_processes[harq_idx].is_waiting = 0;
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harq_idx_s = harq_idx + 1;
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break;
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}
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// if gNB fails to receive a ACK/NACK
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else if (((UL_info->slot-1) > sched_ctrl->harq_processes[harq_idx].feedback_slot) &&
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(sched_ctrl->harq_processes[harq_idx].is_waiting)) {
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sched_ctrl->harq_processes[harq_idx].round++;
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if ((uci_pdu->harq->harq_list[harq_bit].harq_value == 1) ||
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(sched_ctrl->harq_processes[harq_idx].round == max_harq_rounds)) {
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sched_ctrl->harq_processes[harq_idx].ndi ^= 1;
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sched_ctrl->harq_processes[harq_idx].round = 0;
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if (sched_ctrl->harq_processes[harq_idx].round == max_harq_rounds) {
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sched_ctrl->harq_processes[harq_idx].ndi ^= 1;
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sched_ctrl->harq_processes[harq_idx].round = 0;
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}
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sched_ctrl->harq_processes[harq_idx].is_waiting = 0;
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}
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sched_ctrl->harq_processes[harq_idx].is_waiting = 0;
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harq_idx_s = harq_idx + 1;
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break;
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}
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// if gNB fails to receive a ACK/NACK
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else if (((UL_info->slot-1) > sched_ctrl->harq_processes[harq_idx].feedback_slot) &&
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(sched_ctrl->harq_processes[harq_idx].is_waiting)) {
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sched_ctrl->harq_processes[harq_idx].round++;
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if (sched_ctrl->harq_processes[harq_idx].round == max_harq_rounds) {
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sched_ctrl->harq_processes[harq_idx].ndi ^= 1;
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sched_ctrl->harq_processes[harq_idx].round = 0;
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}
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sched_ctrl->harq_processes[harq_idx].is_waiting = 0;
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}
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}
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}
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