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@@ -1109,10 +1109,7 @@ bool nr_acknack_scheduling(int mod_id,
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* * we do not multiplex with CSI, which is always in pucch_sched[2]
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* * SR uses format 0 and is allocated in the first UL (mixed) slot (and not
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* later)
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* * that the PUCCH resource set 0 (for up to 2 bits) points to the first N
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* PUCCH resources, where N is the number of resources in the PUCCH
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* resource set. This is used in pucch_index_used, which counts the used
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* resources by index, and not by their ID! */
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* * each UE has dedicated PUCCH Format 0 resources, and we use index 0! */
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NR_UE_sched_ctrl_t *sched_ctrl = &RC.nrmac[mod_id]->UE_info.UE_sched_ctrl[UE_id];
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NR_sched_pucch_t *pucch = &sched_ctrl->sched_pucch[0];
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AssertFatal(pucch->csi_bits == 0,
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@@ -1198,12 +1195,6 @@ bool nr_acknack_scheduling(int mod_id,
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/* we need to find a new PUCCH occasion */
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NR_PUCCH_Config_t *pucch_Config = sched_ctrl->active_ubwp->bwp_Dedicated->pucch_Config->choice.setup;
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DevAssert(pucch_Config->resourceToAddModList->list.count > 0);
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DevAssert(pucch_Config->resourceSetToAddModList->list.count > 0);
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const int n_res = pucch_Config->resourceSetToAddModList->list.array[0]->resourceList.list.count;
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int *pucch_index_used = RC.nrmac[mod_id]->pucch_index_used[sched_ctrl->active_ubwp->bwp_Id];
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/* if time information is outdated (e.g., last PUCCH occasion in last frame),
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* set to first possible UL occasion in this frame. Note that if such UE is
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* scheduled a lot and used all AckNacks, pucch->frame might have been
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@@ -1217,22 +1208,6 @@ bool nr_acknack_scheduling(int mod_id,
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pucch->ul_slot = first_ul_slot_tdd;
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}
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// increase to first slot in which PUCCH resources are available
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while (pucch_index_used[pucch->ul_slot] >= n_res) {
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pucch->ul_slot++;
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/* if there is no free resource anymore, abort search */
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if ((pucch->frame == frame
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&& pucch->ul_slot >= first_ul_slot_tdd + nr_ulmix_slots)
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|| (pucch->frame == frame + 1)) {
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LOG_E(MAC,
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"%4d.%2d no free PUCCH resources anymore while searching for UE %d\n",
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frame,
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slot,
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UE_id);
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return false;
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}
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}
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// advance ul_slot if it is not reachable by UE
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pucch->ul_slot = max(pucch->ul_slot, slot + pdsch_to_harq_feedback[0]);
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@@ -1279,22 +1254,13 @@ bool nr_acknack_scheduling(int mod_id,
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pucch->timing_indicator = i; // index in the list of timing indicators
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pucch->dai_c++;
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const int pucch_res = pucch_index_used[pucch->ul_slot];
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pucch->resource_indicator = pucch_res;
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pucch_index_used[pucch->ul_slot] += 1;
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AssertFatal(pucch_index_used[pucch->ul_slot] <= n_res,
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"UE %d in %4d.%2d: pucch_index_used is %d (%d available)\n",
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UE_id,
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pucch->frame,
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pucch->ul_slot,
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pucch_index_used[pucch->ul_slot],
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n_res);
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pucch->resource_indicator = 0; // each UE has dedicated PUCCH resources
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/* verify that at that slot and symbol, resources are free. We only do this
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* for initialCyclicShift 0 (we assume it always has that one), so other
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* initialCyclicShifts can overlap with ICS 0!*/
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const NR_PUCCH_Resource_t *resource =
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pucch_Config->resourceToAddModList->list.array[pucch_res];
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const NR_PUCCH_Config_t *pucch_Config = sched_ctrl->active_ubwp->bwp_Dedicated->pucch_Config->choice.setup;
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const NR_PUCCH_Resource_t *resource = pucch_Config->resourceToAddModList->list.array[pucch->resource_indicator];
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DevAssert(resource->format.present == NR_PUCCH_Resource__format_PR_format0);
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if (resource->format.choice.format0->initialCyclicShift == 0) {
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uint16_t *vrb_map_UL = &RC.nrmac[mod_id]->common_channels[CC_id].vrb_map_UL[pucch->ul_slot * MAX_BWP_SIZE];
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