moving initialization of gold for pdsch to nr_init_ue
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@@ -616,6 +616,12 @@ int init_nr_ue_signal(PHY_VARS_NR_UE *ue,
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}
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}
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// initializing the scrambling IDs for PDSCH DMRS
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for (int i=0; i<2; i++)
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ue->scramblingID[i]=fp->Nid_cell;
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nr_gold_pdsch(ue,ue->scramblingID);
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// DLSCH
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for (eNB_id=0; eNB_id<ue->n_connected_eNB; eNB_id++) {
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for (th_id=0; th_id<RX_NB_TH_MAX; th_id++) {
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@@ -95,13 +95,8 @@ void nr_gold_pdsch(PHY_VARS_NR_UE* ue,
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//unsigned short lbar = 0;
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for (nscid=0; nscid<2; nscid++) {
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if (n_idDMRS)
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nid = n_idDMRS[nscid];
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else
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nid = ue->frame_parms.Nid_cell;
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//printf("gold pdsch nid %d lbar %d\n",nid,lbar);
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nid = n_idDMRS[nscid];
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for (ns=0; ns<ue->frame_parms.slots_per_frame; ns++) {
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for (l=0; l<ue->frame_parms.symbols_per_slot; l++) {
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@@ -112,9 +107,9 @@ void nr_gold_pdsch(PHY_VARS_NR_UE* ue,
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LOG_D(PHY,"UE DMRS slot %d, symb %d, x2 %x, nscid %d\n",ns,l,x2,nscid);
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for (n=0; n<NR_MAX_PDSCH_DMRS_INIT_LENGTH_DWORD; n++) {
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ue->nr_gold_pdsch[0][ns][l][nscid][n] = lte_gold_generic(&x1, &x2, reset);
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reset = 0;
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}
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ue->nr_gold_pdsch[0][ns][l][nscid][n] = lte_gold_generic(&x1, &x2, reset);
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reset = 0;
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}
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}
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}
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}
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@@ -689,6 +689,14 @@ int nr_pdsch_channel_estimation(PHY_VARS_NR_UE *ue,
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uint16_t rb_offset = (bwp_start_subcarrier - ue->frame_parms.first_carrier_offset) / 12;
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uint8_t config_type = ue->dmrs_DownlinkConfig.pdsch_dmrs_type;
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int8_t delta = get_delta(p, config_type);
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// checking if re-initialization of scrambling IDs is needed
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if ((ue->dmrs_DownlinkConfig.scramblingID0 != ue->scramblingID[0]) || (ue->dmrs_DownlinkConfig.scramblingID1 != ue->scramblingID[1])){
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ue->scramblingID[0]=ue->dmrs_DownlinkConfig.scramblingID0;
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ue->scramblingID[1]=ue->dmrs_DownlinkConfig.scramblingID1;
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nr_gold_pdsch(ue,ue->scramblingID);
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}
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nr_pdsch_dmrs_rx(ue,Ns,ue->nr_gold_pdsch[eNB_offset][Ns][symbol][0], &pilot[0],1000,0,nb_rb_pdsch+rb_offset);
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if (config_type == pdsch_dmrs_type1){
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@@ -907,6 +907,9 @@ typedef struct {
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/// PDSCH DMRS
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uint32_t ****nr_gold_pdsch[NUMBER_OF_CONNECTED_eNB_MAX];
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// Scrambling IDs used
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uint16_t scramblingID[2];
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/// PDCCH DMRS
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uint32_t ***nr_gold_pdcch[NUMBER_OF_CONNECTED_eNB_MAX];
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@@ -1843,15 +1843,9 @@ int phy_procedures_nrUE_RX(PHY_VARS_NR_UE *ue,
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NR_DL_UE_HARQ_t *dlsch0_harq = dlsch->harq_processes[harq_pid];
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uint16_t nb_symb_sch = dlsch0_harq->nb_symbols;
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uint16_t start_symb_sch = dlsch0_harq->start_symbol;
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int symb_dmrs = -1;
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LOG_D(PHY," ------ --> PDSCH ChannelComp/LLR Frame.slot %d.%d ------ \n", frame_rx%1024, nr_slot_rx);
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//to update from pdsch config
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for (int i=0;i<4;i++) if (((1<<i)&dlsch0_harq->dlDmrsSymbPos) > 0) {symb_dmrs=i;break;}
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AssertFatal(symb_dmrs>=0,"no dmrs in 0..3\n");
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LOG_D(PHY,"Initializing dmrs for symb %d DMRS mask %x\n",symb_dmrs,dlsch0_harq->dlDmrsSymbPos);
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nr_gold_pdsch(ue,0);
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for (uint16_t m=start_symb_sch;m<(nb_symb_sch+start_symb_sch) ; m++){
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nr_slot_fep(ue,
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@@ -159,7 +159,7 @@ gNBs =
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# ssb_PositionsInBurs_BitmapPR
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# 1=short, 2=medium, 3=long
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ssb_PositionsInBurst_PR = 2;
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ssb_PositionsInBurst_Bitmap = 0x51;
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ssb_PositionsInBurst_Bitmap = 0x1;
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# ssb_periodicityServingCell
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# 0 = ms5, 1=ms10, 2=ms20, 3=ms40, 4=ms80, 5=ms160, 6=spare2, 7=spare1
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