maki/openairinterface5g
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

cleanup only

Browse Source
This commit is contained in:
laurent
2023-04-28 16:25:24 +02:00
committed by Laurent THOMAS
parent 6022fe5acd
commit b339460666
93 changed files with 38876 additions and 5864 deletions
Download Patch File Download Diff File Expand all files Collapse all files
openair1/SCHED/fapi_l1.c
+3 -3
View File
@@ -429,7 +429,7 @@ void handle_nfapi_dlsch_pdu(PHY_VARS_eNB *eNB,int frame,int subframe,L1_rxtx_pro
}
}
int16_t to_beta_offset_harqack[16]= {16,20,25,32,40,50,64,80,101,127,160,248,400,640,1008,8};
static const int16_t to_beta_offset_harqack[16] = {16, 20, 25, 32, 40, 50, 64, 80, 101, 127, 160, 248, 400, 640, 1008, 8};
void handle_ulsch_harq_pdu(
PHY_VARS_eNB *eNB,
@@ -457,8 +457,8 @@ void handle_ulsch_harq_pdu(
}
}
uint16_t to_beta_offset_ri[16]= {9,13,16,20,25,32,40,50,64,80,101,127,160,0,0,0};
uint16_t to_beta_offset_cqi[16]= {0,0,9,10,11,13,14,16,18,20,23,25,28,32,40,50};
static const uint16_t to_beta_offset_ri[16] = {9, 13, 16, 20, 25, 32, 40, 50, 64, 80, 101, 127, 160, 0, 0, 0};
static const uint16_t to_beta_offset_cqi[16] = {0, 0, 9, 10, 11, 13, 14, 16, 18, 20, 23, 25, 28, 32, 40, 50};
void handle_ulsch_cqi_ri_pdu(PHY_VARS_eNB *eNB,int UE_id,nfapi_ul_config_request_pdu_t *ul_config_pdu,uint16_t frame,uint8_t subframe) {
nfapi_ul_config_cqi_ri_information_rel9_t *rel9 = &ul_config_pdu->ulsch_cqi_ri_pdu.cqi_ri_information.cqi_ri_information_rel9;
openair1/SCHED/phy_procedures_lte_common.c
+16 -19
View File
@@ -680,18 +680,16 @@ uint8_t reset_ack(LTE_DL_FRAME_PARMS *frame_parms,
return get_reset_ack(frame_parms, harq_ack, subframe_tx, subframe_rx, o_ACK, pN_bundled, cw_idx, 1);
}
uint8_t Np6[4]= {0,1,3,5};
uint8_t Np15[4]= {0,3,8,13};
uint8_t Np25[4]= {0,5,13,22};
uint8_t Np50[4]= {0,11,27,44};
uint8_t Np75[4]= {0,16,41,66};
uint8_t Np100[4]= {0,22,55,88};
static const uint8_t Np6[4] = {0, 1, 3, 5};
static const uint8_t Np15[4] = {0, 3, 8, 13};
static const uint8_t Np25[4] = {0, 5, 13, 22};
static const uint8_t Np50[4] = {0, 11, 27, 44};
static const uint8_t Np75[4] = {0, 16, 41, 66};
static const uint8_t Np100[4] = {0, 22, 55, 88};
// This is part of the PUCCH allocation procedure (see Section 10.1 36.213)
uint16_t get_Np(uint8_t N_RB_DL,uint8_t nCCE,uint8_t plus1)
{
uint8_t *Np;
const uint8_t *Np;
switch (N_RB_DL) {
case 6:
@@ -831,16 +829,15 @@ dci_detect_mode_t dci_detect_mode_select(LTE_DL_FRAME_PARMS *frame_parms,uint8_t
{
dci_detect_mode_t ret = 0;
static dci_detect_mode_t Table_8_2_3gpp_36_213[][10] = {
//subf0 , subf1 , subf2 , subf3 , subf4 , subf5 , subf6 , subf7 , subf8 , subf9
{UL_DL_DCI, UL_DL_DCI , NO_DCI , NO_DCI , NO_DCI , UL_DL_DCI , UL_DL_DCI , NO_DCI, NO_DCI , NO_DCI }, // tdd0
{DL_DCI , UL_DL_DCI , NO_DCI , NO_DCI , UL_DL_DCI , DL_DCI , UL_DL_DCI , NO_DCI, NO_DCI , UL_DL_DCI }, // tdd1
{DL_DCI , DL_DCI , NO_DCI , UL_DL_DCI , DL_DCI , DL_DCI , DL_DCI , NO_DCI, UL_DL_DCI , DL_DCI }, // tdd2
{UL_DL_DCI, DL_DCI , NO_DCI , NO_DCI , NO_DCI , DL_DCI , DL_DCI , DL_DCI, UL_DL_DCI , UL_DL_DCI }, // tdd3
{DL_DCI , DL_DCI , NO_DCI , NO_DCI , DL_DCI , DL_DCI , DL_DCI , DL_DCI, UL_DL_DCI , UL_DL_DCI }, // tdd4
{DL_DCI , DL_DCI , NO_DCI , DL_DCI , DL_DCI , DL_DCI , DL_DCI , DL_DCI, UL_DL_DCI , DL_DCI }, // tdd5
{UL_DL_DCI, UL_DL_DCI , NO_DCI , NO_DCI , NO_DCI , UL_DL_DCI , UL_DL_DCI , NO_DCI, NO_DCI , UL_DL_DCI }}; // tdd6
static const dci_detect_mode_t Table_8_2_3gpp_36_213[][10] = {
// subf0 , subf1 , subf2 , subf3 , subf4 , subf5 , subf6 , subf7 , subf8 , subf9
{UL_DL_DCI, UL_DL_DCI, NO_DCI, NO_DCI, NO_DCI, UL_DL_DCI, UL_DL_DCI, NO_DCI, NO_DCI, NO_DCI}, // tdd0
{DL_DCI, UL_DL_DCI, NO_DCI, NO_DCI, UL_DL_DCI, DL_DCI, UL_DL_DCI, NO_DCI, NO_DCI, UL_DL_DCI}, // tdd1
{DL_DCI, DL_DCI, NO_DCI, UL_DL_DCI, DL_DCI, DL_DCI, DL_DCI, NO_DCI, UL_DL_DCI, DL_DCI}, // tdd2
{UL_DL_DCI, DL_DCI, NO_DCI, NO_DCI, NO_DCI, DL_DCI, DL_DCI, DL_DCI, UL_DL_DCI, UL_DL_DCI}, // tdd3
{DL_DCI, DL_DCI, NO_DCI, NO_DCI, DL_DCI, DL_DCI, DL_DCI, DL_DCI, UL_DL_DCI, UL_DL_DCI}, // tdd4
{DL_DCI, DL_DCI, NO_DCI, DL_DCI, DL_DCI, DL_DCI, DL_DCI, DL_DCI, UL_DL_DCI, DL_DCI}, // tdd5
{UL_DL_DCI, UL_DL_DCI, NO_DCI, NO_DCI, NO_DCI, UL_DL_DCI, UL_DL_DCI, NO_DCI, NO_DCI, UL_DL_DCI}}; // tdd6
DevAssert(subframe>=0 && subframe<=9);
DevAssert((frame_parms->tdd_config)>=0 && (frame_parms->tdd_config)<=6);