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1. There is probably a bug in generate_ue_dlsch_from_dci

Browse Source 
for DCI format 2. Temporaryly going back to the previous
version of code.
2. Enabling rate adaptation with multiple HARQ rounds.
(no change inside the rounds).
This commit is contained in:
Elena_Lukashova
2017-03-20 01:06:12 +01:00
parent a92ed31914
commit b835f63956
9 changed files with 2033 additions and 1274 deletions
Download Patch File Download Diff File Expand all files Collapse all files
cmake_targets/CMakeLists.txt
+1 -2
View File
@@ -1966,7 +1966,6 @@ target_link_libraries (oaisim_nos1 forms)
target_link_libraries (oaisim_nos1 ${T_LIB})
# Unitary tests for each piece of L1: example, mbmssim is MBMS L1 simulator
#####################################
@@ -2063,9 +2062,9 @@ if (${T_TRACER})
add_dependencies(lte-softmodem-nos1 generate_T)
add_dependencies(rrh_gw generate_T)
add_dependencies(oaisim generate_T)
add_dependencies(oaisim_nos1 generate_T)
add_dependencies(dlsim generate_T)
add_dependencies(dlsim_tm4 generate_T)
add_dependencies(dlsim_tm4_feedback generate_T)
add_dependencies(dlsim_tm7 generate_T)
add_dependencies(ulsim generate_T)
add_dependencies(pbchsim generate_T)
openair1/PHY/LTE_ESTIMATION/defs.h
+7 -6
View File
@@ -161,7 +161,7 @@ int lte_est_freq_offset(int **dl_ch_estimates,
LTE_DL_FRAME_PARMS *frame_parms,
int l,
int* freq_offset,
int reset);
int reset);
int lte_mbsfn_est_freq_offset(int **dl_ch_estimates,
LTE_DL_FRAME_PARMS *frame_parms,
@@ -180,7 +180,7 @@ This function computes the time domain channel response, finds the peak and adju
void lte_adjust_synch(LTE_DL_FRAME_PARMS *frame_parms,
PHY_VARS_UE *phy_vars_ue,
module_id_t eNb_id,
uint8_t subframe,
uint8_t subframe,
unsigned char clear,
short coef);
@@ -189,7 +189,8 @@ void lte_ue_measurements(PHY_VARS_UE *phy_vars_ue,
unsigned int subframe_offset,
unsigned char N0_symbol,
unsigned char abstraction_flag,
uint8_t subframe);
unsigned char rank_adaptation,
uint8_t subframe);
//! \brief This function performance RSRP/RSCP measurements
void ue_rrc_measurements(PHY_VARS_UE *phy_vars_ue,
@@ -214,11 +215,11 @@ int8_t set_RSRQ_filtered(module_id_t Mod_id,uint8_t CC_id,uint8_t eNB_index,floa
//! Automatic gain control
void phy_adjust_gain (PHY_VARS_UE *phy_vars_ue,
uint32_t rx_power_fil_dB,
uint32_t rx_power_fil_dB,
unsigned char eNB_id);
int lte_ul_channel_estimation(PHY_VARS_eNB *phy_vars_eNB,
eNB_rxtx_proc_t *proc,
eNB_rxtx_proc_t *proc,
module_id_t eNB_id,
module_id_t UE_id,
uint8_t l,
@@ -246,7 +247,7 @@ int lte_est_timing_advance(LTE_DL_FRAME_PARMS *frame_parms,
int lte_est_timing_advance_pusch(PHY_VARS_eNB* phy_vars_eNB,module_id_t UE_id);
void lte_eNB_I0_measurements(PHY_VARS_eNB *phy_vars_eNB,
int subframe,
int subframe,
module_id_t eNB_id,
unsigned char clear);
openair1/PHY/LTE_ESTIMATION/lte_ue_measurements.c
+16 -12
View File
@@ -459,6 +459,7 @@ void lte_ue_measurements(PHY_VARS_UE *ue,
unsigned int subframe_offset,
unsigned char N0_symbol,
unsigned char abstraction_flag,
unsigned char rank_adaptation,
uint8_t subframe)
{
@@ -484,12 +485,6 @@ void lte_ue_measurements(PHY_VARS_UE *ue,
ue->measurements.nb_antennas_rx = frame_parms->nb_antennas_rx;
if (ue->transmission_mode[eNB_id]!=4)
ue->measurements.rank[eNB_id] = 0;
else
ue->measurements.rank[eNB_id] = 1;
// printf ("tx mode %d\n", ue->transmission_mode[eNB_id]);
// printf ("rank %d\n", ue->PHY_measurements.rank[eNB_id]);
switch (N_RB_DL) {
case 6:
@@ -552,17 +547,26 @@ void lte_ue_measurements(PHY_VARS_UE *ue,
eNB_id=0;
if (ue->transmission_mode[0]==4 || ue->transmission_mode[0]==3){
rank_tm3_tm4 = rank_estimation_tm3_tm4(&ue->common_vars.common_vars_rx_data_per_thread[subframe&0x1].dl_ch_estimates[eNB_id][0][4],
&ue->common_vars.common_vars_rx_data_per_thread[subframe&0x1].dl_ch_estimates[eNB_id][2][4],
&ue->common_vars.common_vars_rx_data_per_thread[subframe&0x1].dl_ch_estimates[eNB_id][1][4],
&ue->common_vars.common_vars_rx_data_per_thread[subframe&0x1].dl_ch_estimates[eNB_id][3][4],
N_RB_DL);
if (rank_adaptation == 1)
rank_tm3_tm4 = rank_estimation_tm3_tm4(&ue->common_vars.common_vars_rx_data_per_thread[subframe&0x1].dl_ch_estimates[eNB_id][0][4],
&ue->common_vars.common_vars_rx_data_per_thread[subframe&0x1].dl_ch_estimates[eNB_id][2][4],
&ue->common_vars.common_vars_rx_data_per_thread[subframe&0x1].dl_ch_estimates[eNB_id][1][4],
&ue->common_vars.common_vars_rx_data_per_thread[subframe&0x1].dl_ch_estimates[eNB_id][3][4],
N_RB_DL);
else
rank_tm3_tm4=1;
#ifdef DEBUG_RANK_EST
printf("rank tm3 or tm4 %d\n", rank_tm3_tm4);
#endif
}
if (ue->transmission_mode[eNB_id]!=4 && ue->transmission_mode[eNB_id]!=3)
ue->measurements.rank[eNB_id] = 0;
else
ue->measurements.rank[eNB_id] = rank_tm3_tm4;
// printf ("tx mode %d\n", ue->transmission_mode[eNB_id]);
// printf ("rank %d\n", ue->PHY_measurements.rank[eNB_id]);
// filter to remove jitter
if (ue->init_averaging == 0) {
for (eNB_id = 0; eNB_id < ue->n_connected_eNB; eNB_id++)
openair1/PHY/LTE_TRANSPORT/dci_tools.c
+695 -63
View File
@@ -1493,7 +1493,6 @@ int generate_eNB_dlsch_params_from_dci(int frame,
break;
}
if (harq_pid>=8) {
LOG_E(PHY,"ERROR: Format 2_2A: harq_pid=%d >= 8\n", harq_pid);
return(-1);
@@ -1512,7 +1511,7 @@ int generate_eNB_dlsch_params_from_dci(int frame,
TB1_active=0;
}
#ifdef DEBUG_HARQ
printf("RV0 = %d, RV1 = %d. MCS0 = %d, MCS1=%d\n", rv1, rv2, mcs1, mcs2);
printf(" eNOdeB RV0 = %d, RV1 = %d. MCS0 = %d, MCS1=%d\n", rv1, rv2, mcs1, mcs2);
#endif
if (TB0_active && TB1_active && tbswap==0) {
dlsch0=dlsch[0];
@@ -1577,6 +1576,8 @@ int generate_eNB_dlsch_params_from_dci(int frame,
printf("\n ENB: TB0 is deactivated, retransmit TB1 transmit in TM6\n");
#endif
}
// printf("[eNB] dlsch0_harq->round = %d, dlsch1_harq->round = %d \n", dlsch0_harq->round, dlsch1_harq->round);
if (dlsch0 != NULL){
dlsch0->subframe_tx[subframe] = 1;
@@ -1720,6 +1721,7 @@ int generate_eNB_dlsch_params_from_dci(int frame,
dlsch1_harq->pmi_alloc = DL_pmi_single;
break;
}
// printf ("[eNB] dlsch1_harq->pmi_alloc %d\n", dlsch1_harq->pmi_alloc);
}
} else if (frame_parms->nb_antenna_ports_eNB == 4) {
@@ -1737,6 +1739,7 @@ int generate_eNB_dlsch_params_from_dci(int frame,
if (dlsch1 != NULL)
dlsch1->rnti = rnti;
break;
case format2A:
@@ -4994,19 +4997,19 @@ int check_dci_format2_2a_coherency(DCI_format_t dci_format,
long long RIV_max = 0;
#ifdef DEBUG_DCI
LOG_I(PHY, "extarcted dci - dci_format %d \n", dci_format);
LOG_I(PHY, "extarcted dci - rnti %d \n", rnti);
LOG_I(PHY, "extarcted dci - rah %d \n", rah);
LOG_I(PHY, "extarcted dci - mcs1 %d \n", mcs1);
LOG_I(PHY, "extarcted dci - mcs2 %d \n", mcs2);
LOG_I(PHY, "extarcted dci - rv1 %d \n", rv1);
LOG_I(PHY, "extarcted dci - rv2 %d \n", rv2);
//LOG_I(PHY, "extarcted dci - ndi1 %d \n", ndi1);
//LOG_I(PHY, "extarcted dci - ndi2 %d \n", ndi2);
LOG_I(PHY, "extarcted dci - rballoc %x \n", rballoc);
LOG_I(PHY, "extarcted dci - harq pid %d \n", harq_pid);
LOG_I(PHY, "extarcted dci - round0 %d \n", pdlsch0_harq->round);
LOG_I(PHY, "extarcted dci - round1 %d \n", pdlsch1_harq->round);
printf("extarcted dci - dci_format %d \n", dci_format);
printf("extarcted dci - rah %d \n", rah);
printf("extarcted dci - mcs1 %d \n", mcs1);
printf("extarcted dci - mcs2 %d \n", mcs2);
printf("extarcted dci - rv1 %d \n", rv1);
printf("extarcted dci - rv2 %d \n", rv2);
//printf("extarcted dci - ndi1 %d \n", ndi1);
// printf("extarcted dci - ndi2 %d \n", ndi2);
printf("extarcted dci - rballoc %x \n", rballoc);
printf("extarcted dci - harq pif %d \n", harq_pid);
printf("extarcted dci - round0 %d \n", pdlsch0_harq->round);
printf("extarcted dci - round1 %d \n", pdlsch1_harq->round);
#endif
// I- check dci content minimum coherency
@@ -5054,7 +5057,7 @@ int check_dci_format2_2a_coherency(DCI_format_t dci_format,
{
// DCI false detection
LOG_I(PHY,"bad rv1\n");
return(0);
//return(0);
}
if((pdlsch1_harq->round == 0) && (rv2 > 0))
@@ -5483,6 +5486,9 @@ switch (tpmi) {
dlsch1_harq->pmi_alloc = pmi_alloc;
dlsch0_harq->pmi_alloc = pmi_alloc^0x1555;
}
#ifdef DEBUG_HARQ
printf ("\n \n compute_precoding_info_2cw pmi_alloc_new = %d\n", dlsch0_harq->pmi_alloc);
#endif
break;
default:
break;
@@ -5513,20 +5519,16 @@ switch (tpmi) {
dlsch_harq->pmi_alloc = pmi_extend(frame_parms,3, 0);
break;
case 5:
dlsch_harq->mimo_mode = PUSCH_PRECODING0;
dlsch_harq->pmi_alloc = pmi_alloc;;//pmi_convert(frame_parms,dlsch0->pmi_alloc,0);
#ifdef DEBUG_HARQ
printf ("[DCI UE] I am calling from the UE side pmi_alloc_new = %d\n", dlsch0->pmi_alloc);
#endif
dlsch_harq->pmi_alloc = pmi_alloc;//pmi_convert(frame_parms,dlsch0->pmi_alloc,0);
break;
case 6:
dlsch_harq->mimo_mode = PUSCH_PRECODING1;
dlsch_harq->pmi_alloc = pmi_alloc;;//pmi_convert(frame_parms,dlsch0->pmi_alloc,1);
#ifdef DEBUG_HARQ
printf ("[DCI UE] I am calling from the UE side pmi_alloc_new = %d\n", dlsch0->pmi_alloc);
#endif
dlsch_harq->pmi_alloc = pmi_alloc;//pmi_convert(frame_parms,dlsch0->pmi_alloc,1);
break;
}
#ifdef DEBUG_HARQ
printf ("[DCI UE] I am calling from the UE side pmi_alloc_new = %d with tpmi %d\n", dlsch_harq->pmi_alloc, tpmi);
#endif
}
void compute_precoding_info_format2A(uint8_t tpmi,
@@ -5652,7 +5654,7 @@ void prepare_dl_decoding_format2_2A(DCI_format_t dci_format,
uint8_t TB0_active = 0;
uint8_t TB1_active = 0;
// printf("inside prepare pdlsch1->pmi_alloc %d \n",pdlsch1->pmi_alloc);
// check if either TB is disabled (see 36-213 V8.6 p. 26)
TB0_active = 1;
@@ -5774,10 +5776,13 @@ void prepare_dl_decoding_format2_2A(DCI_format_t dci_format,
{
if ((TB0_active) && (TB1_active)){ //two CW active
compute_precoding_info_2cw(tpmi, tbswap, pdlsch0->pmi_alloc,frame_parms, dlsch0_harq, dlsch1_harq);
// printf("[DCI UE 1]: dlsch0_harq status %d , dlsch1_harq status %d\n", dlsch0_harq->status, dlsch1_harq->status);
} else if ((TB0_active) && (!TB1_active)) { // only CW 0 active
compute_precoding_info_1cw(tpmi, pdlsch0->pmi_alloc, frame_parms, dlsch0_harq);
} else {
compute_precoding_info_1cw(tpmi, pdlsch0->pmi_alloc, frame_parms, dlsch1_harq);
compute_precoding_info_1cw(tpmi, pdlsch1->pmi_alloc, frame_parms, dlsch1_harq);
printf("I am doing compute_precoding_info_1cw with tpmi %d \n", tpmi);
}
//printf(" UE DCI harq0 MIMO mode = %d\n", dlsch0_harq->mimo_mode);
if ((frame_parms->mode1_flag == 1) && (TB0_active))
@@ -5792,11 +5797,14 @@ void prepare_dl_decoding_format2_2A(DCI_format_t dci_format,
dlsch0_harq,
dlsch1_harq);
}
// printf("[DCI UE 2]: dlsch0_harq status %d , dlsch1_harq status %d\n", dlsch0_harq->status, dlsch1_harq->status);
// reset round + compute Qm
if (TB0_active) {
// printf("TB0 ndi1 =%d, dlsch0_harq->DCINdi =%d, dlsch0_harq->first_tx = %d\n", ndi1, dlsch0_harq->DCINdi, dlsch0_harq->first_tx);
if ((ndi1!=dlsch0_harq->DCINdi) || (dlsch0_harq->first_tx==1)) {
dlsch0_harq->round = 0;
dlsch0_harq->round = 0;
dlsch0_harq->status = ACTIVE;
dlsch0_harq->DCINdi = ndi1;
//LOG_I(PHY,"[UE] DLSCH: New Data Indicator CW0 subframe %d (pid %d, round %d)\n",
// subframe,harq_pid,dlsch0_harq->round);
@@ -5808,14 +5816,13 @@ void prepare_dl_decoding_format2_2A(DCI_format_t dci_format,
if(dlsch0_harq->round == 0) {
#if 0
// skip pdsch decoding and report ack
dlsch0_harq->status = SCH_IDLE;
pdlsch0->active = 0;
pdlsch0->harq_ack[subframe].ack = 1;
pdlsch0->harq_ack[subframe].harq_id = harq_pid;
pdlsch0->harq_ack[subframe].send_harq_status = 1;
#endif
}
}
// if Imcs in [29..31] TBS is assumed to be as determined from DCI transported in the latest
// PDCCH for the same trasport block using Imcs in [0 .. 28]
@@ -5837,8 +5844,12 @@ void prepare_dl_decoding_format2_2A(DCI_format_t dci_format,
else if (mcs1<=31)
dlsch0_harq->Qm = (mcs1-28)<<1;
}
}
if (TB1_active) {
// printf("[DCI UE 3]: dlsch0_harq status %d , dlsch1_harq status %d\n", dlsch0_harq->status, dlsch1_harq->status);
if ((TB1_active) && (pdlsch1->active == 1)) {
// printf("TB1 ndi2 =%d, dlsch1_harq->DCINdi =%d, dlsch1_harq->first_tx = %d\n", ndi2, dlsch1_harq->DCINdi, dlsch1_harq->first_tx);
if ((ndi2!=dlsch1_harq->DCINdi) || (dlsch1_harq->first_tx==1)) {
dlsch1_harq->round = 0;
//LOG_I(PHY,"[UE] DLSCH: New Data Indicator CW1 subframe %d (pid %d, round %d)\n",
@@ -5851,7 +5862,7 @@ void prepare_dl_decoding_format2_2A(DCI_format_t dci_format,
#if 0
if(dlsch1_harq->round == 0) {
// skip pdsch decoding and report ack
dlsch1_harq->status = SCH_IDLE;
// printf("Switching to IDLE\n");
pdlsch1->active = 0;
pdlsch1->harq_ack[subframe].ack = 1;
pdlsch1->harq_ack[subframe].harq_id = harq_pid;
@@ -5880,17 +5891,8 @@ void prepare_dl_decoding_format2_2A(DCI_format_t dci_format,
}
#ifdef DEBUG_HARQ
printf("[DCI UE]: dlsch0_harq status %d , dlsch1_harq status %d\n", dlsch0_harq->status, dlsch1_harq->status);
printf("[DCI UE]: TB0_active %d , TB1_active %d\n", TB0_active, TB1_active);
#endif
#ifdef DEBUG_HARQ
if (dlsch0 != NULL && dlsch1 != NULL)
printf("[DCI UE] dlsch0_harq status = %d, dlsch1_harq status = %d\n", dlsch0_harq->status, dlsch1_harq->status);
else if (dlsch0 == NULL && dlsch1 != NULL)
printf("[DCI UE] dlsch0_harq NULL dlsch1_harq status = %d\n", dlsch1_harq->status);
else if (dlsch0 != NULL && dlsch1 == NULL)
printf("[DCI UE] dlsch1_harq NULL dlsch0_harq status = %d\n", dlsch0_harq->status);
#endif
}
int generate_ue_dlsch_params_from_dci(int frame,
@@ -5908,12 +5910,22 @@ int generate_ue_dlsch_params_from_dci(int frame,
uint16_t tc_rnti)
{
uint8_t harq_pid=0;
uint8_t frame_type=frame_parms->frame_type;
uint8_t tpmi=0;
LTE_UE_DLSCH_t *dlsch0=NULL,*dlsch1=NULL;
LTE_DL_UE_HARQ_t *dlsch0_harq=NULL,*dlsch1_harq=NULL;
uint32_t rballoc=0,RIV_max=0;
uint8_t frame_type=frame_parms->frame_type;
uint8_t vrb_type=0;
uint8_t mcs=0,mcs1=0,mcs2=0;
uint8_t rv=0,rv1=0,rv2=0;
uint8_t TB0_active=0,TB1_active=0;
uint8_t ndi=0,ndi1=0,ndi2=0;
uint8_t rah=0;
uint8_t TPC=0;
uint8_t NPRB=0,tbswap=0,tpmi=0;
uint8_t Ngap;
uint8_t dai=0;
LTE_UE_DLSCH_t *dlsch0=NULL,*dlsch1=NULL;
LTE_DL_UE_HARQ_t *dlsch0_harq=NULL,*dlsch1_harq=NULL;
DCI_INFO_EXTRACTED_t dci_info_extarcted;
uint8_t status=0;
@@ -6099,7 +6111,626 @@ int generate_ue_dlsch_params_from_dci(int frame,
case format2:
{
// extract dci infomation
switch (frame_parms->N_RB_DL) {
case 6:
if (frame_parms->nb_antenna_ports_eNB == 2) {
if (frame_type == TDD) {
mcs1 = ((DCI2_1_5MHz_2A_TDD_t *)dci_pdu)->mcs1;
mcs2 = ((DCI2_1_5MHz_2A_TDD_t *)dci_pdu)->mcs2;
rballoc = ((DCI2_1_5MHz_2A_TDD_t *)dci_pdu)->rballoc;
rv1 = ((DCI2_1_5MHz_2A_TDD_t *)dci_pdu)->rv1;
rv2 = ((DCI2_1_5MHz_2A_TDD_t *)dci_pdu)->rv2;
ndi1 = ((DCI2_1_5MHz_2A_TDD_t *)dci_pdu)->ndi1;
ndi2 = ((DCI2_1_5MHz_2A_TDD_t *)dci_pdu)->ndi2;
harq_pid = ((DCI2_1_5MHz_2A_TDD_t *)dci_pdu)->harq_pid;
tbswap = ((DCI2_1_5MHz_2A_TDD_t *)dci_pdu)->tb_swap;
tpmi = ((DCI2_1_5MHz_2A_TDD_t *)dci_pdu)->tpmi;
}
else {
mcs1 = ((DCI2_1_5MHz_2A_FDD_t *)dci_pdu)->mcs1;
mcs2 = ((DCI2_1_5MHz_2A_FDD_t *)dci_pdu)->mcs2;
rballoc = ((DCI2_1_5MHz_2A_FDD_t *)dci_pdu)->rballoc;
rv1 = ((DCI2_1_5MHz_2A_FDD_t *)dci_pdu)->rv1;
rv2 = ((DCI2_1_5MHz_2A_FDD_t *)dci_pdu)->rv2;
ndi1 = ((DCI2_1_5MHz_2A_FDD_t *)dci_pdu)->ndi1;
ndi2 = ((DCI2_1_5MHz_2A_FDD_t *)dci_pdu)->ndi2;
harq_pid = ((DCI2_1_5MHz_2A_FDD_t *)dci_pdu)->harq_pid;
tbswap = ((DCI2_1_5MHz_2A_FDD_t *)dci_pdu)->tb_swap;
tpmi = ((DCI2_1_5MHz_2A_FDD_t *)dci_pdu)->tpmi;
}
}
else if (frame_parms->nb_antenna_ports_eNB == 4) {
if (frame_type == TDD) {
mcs1 = ((DCI2_1_5MHz_4A_TDD_t *)dci_pdu)->mcs1;
mcs2 = ((DCI2_1_5MHz_4A_TDD_t *)dci_pdu)->mcs2;
rballoc = ((DCI2_1_5MHz_4A_TDD_t *)dci_pdu)->rballoc;
rv1 = ((DCI2_1_5MHz_4A_TDD_t *)dci_pdu)->rv1;
rv2 = ((DCI2_1_5MHz_4A_TDD_t *)dci_pdu)->rv2;
ndi1 = ((DCI2_1_5MHz_4A_TDD_t *)dci_pdu)->ndi1;
ndi2 = ((DCI2_1_5MHz_4A_TDD_t *)dci_pdu)->ndi2;
harq_pid = ((DCI2_1_5MHz_4A_TDD_t *)dci_pdu)->harq_pid;
tbswap = ((DCI2_1_5MHz_4A_TDD_t *)dci_pdu)->tb_swap;
tpmi = ((DCI2_1_5MHz_4A_TDD_t *)dci_pdu)->tpmi;
}
else {
mcs1 = ((DCI2_1_5MHz_4A_FDD_t *)dci_pdu)->mcs1;
mcs2 = ((DCI2_1_5MHz_4A_FDD_t *)dci_pdu)->mcs2;
rballoc = ((DCI2_1_5MHz_4A_FDD_t *)dci_pdu)->rballoc;
rv1 = ((DCI2_1_5MHz_4A_FDD_t *)dci_pdu)->rv1;
rv2 = ((DCI2_1_5MHz_4A_FDD_t *)dci_pdu)->rv2;
ndi1 = ((DCI2_1_5MHz_4A_FDD_t *)dci_pdu)->ndi1;
ndi2 = ((DCI2_1_5MHz_4A_FDD_t *)dci_pdu)->ndi2;
harq_pid = ((DCI2_1_5MHz_4A_FDD_t *)dci_pdu)->harq_pid;
tbswap = ((DCI2_1_5MHz_4A_FDD_t *)dci_pdu)->tb_swap;
tpmi = ((DCI2_1_5MHz_4A_FDD_t *)dci_pdu)->tpmi;
}
}
else {
LOG_E(PHY,"UE: subframe %d Format2 DCI: unsupported number of TX antennas %d\n",subframe,frame_parms->nb_antenna_ports_eNB);
}
break;
case 25:
if (frame_parms->nb_antenna_ports_eNB == 2) {
if (frame_type == TDD) {
mcs1 = ((DCI2_5MHz_2A_TDD_t *)dci_pdu)->mcs1;
mcs2 = ((DCI2_5MHz_2A_TDD_t *)dci_pdu)->mcs2;
rballoc = ((DCI2_5MHz_2A_TDD_t *)dci_pdu)->rballoc;
rah = ((DCI2_5MHz_2A_TDD_t *)dci_pdu)->rah;
rv1 = ((DCI2_5MHz_2A_TDD_t *)dci_pdu)->rv1;
rv2 = ((DCI2_5MHz_2A_TDD_t *)dci_pdu)->rv2;
ndi1 = ((DCI2_5MHz_2A_TDD_t *)dci_pdu)->ndi1;
ndi2 = ((DCI2_5MHz_2A_TDD_t *)dci_pdu)->ndi2;
harq_pid = ((DCI2_5MHz_2A_TDD_t *)dci_pdu)->harq_pid;
tbswap = ((DCI2_5MHz_2A_TDD_t *)dci_pdu)->tb_swap;
tpmi = ((DCI2_5MHz_2A_TDD_t *)dci_pdu)->tpmi;
}
else {
mcs1 = ((DCI2_5MHz_2A_FDD_t *)dci_pdu)->mcs1;
mcs2 = ((DCI2_5MHz_2A_FDD_t *)dci_pdu)->mcs2;
rballoc = ((DCI2_5MHz_2A_FDD_t *)dci_pdu)->rballoc;
rah = ((DCI2_5MHz_2A_FDD_t *)dci_pdu)->rah;
rv1 = ((DCI2_5MHz_2A_FDD_t *)dci_pdu)->rv1;
rv2 = ((DCI2_5MHz_2A_FDD_t *)dci_pdu)->rv2;
ndi1 = ((DCI2_5MHz_2A_FDD_t *)dci_pdu)->ndi1;
ndi2 = ((DCI2_5MHz_2A_FDD_t *)dci_pdu)->ndi2;
harq_pid = ((DCI2_5MHz_2A_FDD_t *)dci_pdu)->harq_pid;
tbswap = ((DCI2_5MHz_2A_FDD_t *)dci_pdu)->tb_swap;
tpmi = ((DCI2_5MHz_2A_FDD_t *)dci_pdu)->tpmi;
}
}
else if (frame_parms->nb_antenna_ports_eNB == 4) {
if (frame_type == TDD) {
mcs1 = ((DCI2_5MHz_4A_TDD_t *)dci_pdu)->mcs1;
mcs2 = ((DCI2_5MHz_4A_TDD_t *)dci_pdu)->mcs2;
rballoc = ((DCI2_5MHz_4A_TDD_t *)dci_pdu)->rballoc;
rah = ((DCI2_5MHz_4A_TDD_t *)dci_pdu)->rah;
rv1 = ((DCI2_5MHz_4A_TDD_t *)dci_pdu)->rv1;
rv2 = ((DCI2_5MHz_4A_TDD_t *)dci_pdu)->rv2;
ndi1 = ((DCI2_5MHz_4A_TDD_t *)dci_pdu)->ndi1;
ndi2 = ((DCI2_5MHz_4A_TDD_t *)dci_pdu)->ndi2;
harq_pid = ((DCI2_5MHz_4A_TDD_t *)dci_pdu)->harq_pid;
tbswap = ((DCI2_5MHz_4A_TDD_t *)dci_pdu)->tb_swap;
tpmi = ((DCI2_5MHz_4A_TDD_t *)dci_pdu)->tpmi;
}
else {
mcs1 = ((DCI2_5MHz_4A_FDD_t *)dci_pdu)->mcs1;
mcs2 = ((DCI2_5MHz_4A_FDD_t *)dci_pdu)->mcs2;
rballoc = ((DCI2_5MHz_4A_FDD_t *)dci_pdu)->rballoc;
rah = ((DCI2_5MHz_4A_FDD_t *)dci_pdu)->rah;
rv1 = ((DCI2_5MHz_4A_FDD_t *)dci_pdu)->rv1;
rv2 = ((DCI2_5MHz_4A_FDD_t *)dci_pdu)->rv2;
ndi1 = ((DCI2_5MHz_4A_FDD_t *)dci_pdu)->ndi1;
ndi2 = ((DCI2_5MHz_4A_FDD_t *)dci_pdu)->ndi2;
harq_pid = ((DCI2_5MHz_4A_FDD_t *)dci_pdu)->harq_pid;
tbswap = ((DCI2_5MHz_4A_FDD_t *)dci_pdu)->tb_swap;
tpmi = ((DCI2_5MHz_4A_FDD_t *)dci_pdu)->tpmi;
}
}
break;
case 50:
if (frame_parms->nb_antenna_ports_eNB == 2) {
if (frame_type == TDD) {
mcs1 = ((DCI2_10MHz_2A_TDD_t *)dci_pdu)->mcs1;
mcs2 = ((DCI2_10MHz_2A_TDD_t *)dci_pdu)->mcs2;
rballoc = ((DCI2_10MHz_2A_TDD_t *)dci_pdu)->rballoc;
rah = ((DCI2_10MHz_2A_TDD_t *)dci_pdu)->rah;
rv1 = ((DCI2_10MHz_2A_TDD_t *)dci_pdu)->rv1;
rv2 = ((DCI2_10MHz_2A_TDD_t *)dci_pdu)->rv2;
ndi1 = ((DCI2_10MHz_2A_TDD_t *)dci_pdu)->ndi1;
ndi2 = ((DCI2_10MHz_2A_TDD_t *)dci_pdu)->ndi2;
harq_pid = ((DCI2_10MHz_2A_TDD_t *)dci_pdu)->harq_pid;
tbswap = ((DCI2_10MHz_2A_TDD_t *)dci_pdu)->tb_swap;
tpmi = ((DCI2_10MHz_2A_TDD_t *)dci_pdu)->tpmi;
}
else {
mcs1 = ((DCI2_10MHz_2A_FDD_t *)dci_pdu)->mcs1;
mcs2 = ((DCI2_10MHz_2A_FDD_t *)dci_pdu)->mcs2;
rballoc = ((DCI2_10MHz_2A_FDD_t *)dci_pdu)->rballoc;
rah = ((DCI2_10MHz_2A_FDD_t *)dci_pdu)->rah;
rv1 = ((DCI2_10MHz_2A_FDD_t *)dci_pdu)->rv1;
rv2 = ((DCI2_10MHz_2A_FDD_t *)dci_pdu)->rv2;
ndi1 = ((DCI2_10MHz_2A_FDD_t *)dci_pdu)->ndi1;
ndi2 = ((DCI2_10MHz_2A_FDD_t *)dci_pdu)->ndi2;
harq_pid = ((DCI2_10MHz_2A_FDD_t *)dci_pdu)->harq_pid;
tbswap = ((DCI2_10MHz_2A_FDD_t *)dci_pdu)->tb_swap;
tpmi = ((DCI2_10MHz_2A_FDD_t *)dci_pdu)->tpmi;
}
}
else if (frame_parms->nb_antenna_ports_eNB == 4) {
if (frame_type == TDD) {
mcs1 = ((DCI2_10MHz_4A_TDD_t *)dci_pdu)->mcs1;
mcs2 = ((DCI2_10MHz_4A_TDD_t *)dci_pdu)->mcs2;
rballoc = ((DCI2_10MHz_4A_TDD_t *)dci_pdu)->rballoc;
rah = ((DCI2_10MHz_4A_TDD_t *)dci_pdu)->rah;
rv1 = ((DCI2_10MHz_4A_TDD_t *)dci_pdu)->rv1;
rv2 = ((DCI2_10MHz_4A_TDD_t *)dci_pdu)->rv2;
ndi1 = ((DCI2_10MHz_4A_TDD_t *)dci_pdu)->ndi1;
ndi2 = ((DCI2_10MHz_4A_TDD_t *)dci_pdu)->ndi2;
harq_pid = ((DCI2_10MHz_4A_TDD_t *)dci_pdu)->harq_pid;
tbswap = ((DCI2_10MHz_4A_TDD_t *)dci_pdu)->tb_swap;
tpmi = ((DCI2_10MHz_4A_TDD_t *)dci_pdu)->tpmi;
}
else {
mcs1 = ((DCI2_10MHz_4A_FDD_t *)dci_pdu)->mcs1;
mcs2 = ((DCI2_10MHz_4A_FDD_t *)dci_pdu)->mcs2;
rballoc = ((DCI2_10MHz_4A_FDD_t *)dci_pdu)->rballoc;
rah = ((DCI2_10MHz_4A_FDD_t *)dci_pdu)->rah;
rv1 = ((DCI2_10MHz_4A_FDD_t *)dci_pdu)->rv1;
rv2 = ((DCI2_10MHz_4A_FDD_t *)dci_pdu)->rv2;
ndi1 = ((DCI2_10MHz_4A_FDD_t *)dci_pdu)->ndi1;
ndi2 = ((DCI2_10MHz_4A_FDD_t *)dci_pdu)->ndi2;
harq_pid = ((DCI2_10MHz_4A_FDD_t *)dci_pdu)->harq_pid;
tbswap = ((DCI2_10MHz_4A_FDD_t *)dci_pdu)->tb_swap;
tpmi = ((DCI2_10MHz_4A_FDD_t *)dci_pdu)->tpmi;
}
}
else {
LOG_E(PHY,"UE: Format2 DCI: unsupported number of TX antennas %d\n",frame_parms->nb_antenna_ports_eNB);
}
break;
case 100:
if (frame_parms->nb_antenna_ports_eNB == 2) {
if (frame_type == TDD) {
mcs1 = ((DCI2_20MHz_2A_TDD_t *)dci_pdu)->mcs1;
mcs2 = ((DCI2_20MHz_2A_TDD_t *)dci_pdu)->mcs2;
rballoc = ((DCI2_20MHz_2A_TDD_t *)dci_pdu)->rballoc;
rah = ((DCI2_20MHz_2A_TDD_t *)dci_pdu)->rah;
rv1 = ((DCI2_20MHz_2A_TDD_t *)dci_pdu)->rv1;
rv2 = ((DCI2_20MHz_2A_TDD_t *)dci_pdu)->rv2;
ndi1 = ((DCI2_20MHz_2A_TDD_t *)dci_pdu)->ndi1;
ndi2 = ((DCI2_20MHz_2A_TDD_t *)dci_pdu)->ndi2;
harq_pid = ((DCI2_20MHz_2A_TDD_t *)dci_pdu)->harq_pid;
tbswap = ((DCI2_20MHz_2A_TDD_t *)dci_pdu)->tb_swap;
tpmi = ((DCI2_20MHz_2A_TDD_t *)dci_pdu)->tpmi;
}
else {
mcs1 = ((DCI2_20MHz_2A_FDD_t *)dci_pdu)->mcs1;
mcs2 = ((DCI2_20MHz_2A_FDD_t *)dci_pdu)->mcs2;
rballoc = ((DCI2_20MHz_2A_FDD_t *)dci_pdu)->rballoc;
rah = ((DCI2_20MHz_2A_FDD_t *)dci_pdu)->rah;
rv1 = ((DCI2_20MHz_2A_FDD_t *)dci_pdu)->rv1;
rv2 = ((DCI2_20MHz_2A_FDD_t *)dci_pdu)->rv2;
ndi1 = ((DCI2_20MHz_2A_FDD_t *)dci_pdu)->ndi1;
ndi2 = ((DCI2_20MHz_2A_FDD_t *)dci_pdu)->ndi2;
harq_pid = ((DCI2_20MHz_2A_FDD_t *)dci_pdu)->harq_pid;
tbswap = ((DCI2_20MHz_2A_FDD_t *)dci_pdu)->tb_swap;
tpmi = ((DCI2_20MHz_2A_FDD_t *)dci_pdu)->tpmi;
}
}
else if (frame_parms->nb_antenna_ports_eNB == 4) {
if (frame_type == TDD) {
mcs1 = ((DCI2_20MHz_4A_TDD_t *)dci_pdu)->mcs1;
mcs2 = ((DCI2_20MHz_4A_TDD_t *)dci_pdu)->mcs2;
rballoc = ((DCI2_20MHz_4A_TDD_t *)dci_pdu)->rballoc;
rah = ((DCI2_20MHz_4A_TDD_t *)dci_pdu)->rah;
rv1 = ((DCI2_20MHz_4A_TDD_t *)dci_pdu)->rv1;
rv2 = ((DCI2_20MHz_4A_TDD_t *)dci_pdu)->rv2;
ndi1 = ((DCI2_20MHz_4A_TDD_t *)dci_pdu)->ndi1;
ndi2 = ((DCI2_20MHz_4A_TDD_t *)dci_pdu)->ndi2;
harq_pid = ((DCI2_20MHz_4A_TDD_t *)dci_pdu)->harq_pid;
tbswap = ((DCI2_20MHz_4A_TDD_t *)dci_pdu)->tb_swap;
tpmi = ((DCI2_20MHz_4A_TDD_t *)dci_pdu)->tpmi;
}
else {
mcs1 = ((DCI2_20MHz_4A_FDD_t *)dci_pdu)->mcs1;
mcs2 = ((DCI2_20MHz_4A_FDD_t *)dci_pdu)->mcs2;
rballoc = ((DCI2_20MHz_4A_FDD_t *)dci_pdu)->rballoc;
rah = ((DCI2_20MHz_4A_FDD_t *)dci_pdu)->rah;
rv1 = ((DCI2_20MHz_4A_FDD_t *)dci_pdu)->rv1;
rv2 = ((DCI2_20MHz_4A_FDD_t *)dci_pdu)->rv2;
ndi1 = ((DCI2_20MHz_4A_FDD_t *)dci_pdu)->ndi1;
ndi2 = ((DCI2_20MHz_4A_FDD_t *)dci_pdu)->ndi2;
harq_pid = ((DCI2_20MHz_4A_FDD_t *)dci_pdu)->harq_pid;
tbswap = ((DCI2_20MHz_4A_FDD_t *)dci_pdu)->tb_swap;
tpmi = ((DCI2_20MHz_4A_FDD_t *)dci_pdu)->tpmi;
}
}
else {
LOG_E(PHY,"UE: Format2 DCI: unsupported number of TX antennas %d\n",frame_parms->nb_antenna_ports_eNB);
}
break;
}
if (harq_pid>=8) {
LOG_E(PHY,"Format 2_2A: harq_pid=%d >= 8\n", harq_pid);
return(-1);
}
// check if either TB is disabled (see 36-213 V8.6 p. 26)
TB0_active = 1;
TB1_active = 1;
if ((rv1 == 1) && (mcs1 == 0)) {
TB0_active=0;
}
if ((rv2 == 1) && (mcs2 == 0)) {
TB1_active=0;
}
#ifdef DEBUG_HARQ
printf("[DCI UE]: TB0 status %d , TB1 status %d\n", TB0_active, TB1_active);
#endif
//printf("RV TB0 = %d\n", rv1);
if (TB0_active && TB1_active && tbswap==0) { //dlsch0, dlsch0_harq are at the TB level
dlsch0=dlsch[0];
dlsch1=dlsch[1];
dlsch0->active = 1;
dlsch1->active = 1;
dlsch0_harq = dlsch0->harq_processes[harq_pid];
dlsch1_harq = dlsch1->harq_processes[harq_pid];
dlsch0_harq->mcs = mcs1;
dlsch1_harq->mcs = mcs2;
dlsch0_harq->rvidx = rv1;
dlsch1_harq->rvidx = rv2;
dlsch0_harq->status = ACTIVE;
dlsch1_harq->status = ACTIVE;
dlsch0_harq->codeword=0;
dlsch1_harq->codeword=1;
#ifdef DEBUG_HARQ
printf("[DCI UE]: BOTH ACTIVE\n");
#endif
}
else if (TB0_active && TB1_active && tbswap==1) {
dlsch0=dlsch[0];
dlsch1=dlsch[1];
dlsch0->active = 1;
dlsch1->active = 1;
dlsch0_harq = dlsch0->harq_processes[harq_pid];
dlsch1_harq = dlsch1->harq_processes[harq_pid];
dlsch0_harq->mcs = mcs1;
dlsch1_harq->mcs = mcs2;
dlsch0_harq->rvidx = rv1;
dlsch1_harq->rvidx = rv2;
dlsch0_harq->status = ACTIVE;
dlsch1_harq->status = ACTIVE;
dlsch0_harq->codeword=1;
dlsch1_harq->codeword=0;
}
else if (TB0_active && (TB1_active==0)) {
dlsch0=dlsch[0];
dlsch0->active = 1;
dlsch0_harq = dlsch0->harq_processes[harq_pid];
dlsch0_harq->mcs = mcs1;
dlsch0_harq->rvidx = rv1;
dlsch0_harq->status = ACTIVE;
dlsch0_harq->codeword = 0;
dlsch1=NULL;
dlsch1_harq = NULL;
#ifdef DEBUG_HARQ
printf("[DCI UE]: TB1 is deactivated, retransmit TB0 transmit in TM6\n");
#endif
}
else if ((TB0_active==0) && TB1_active) {
dlsch1=dlsch[1];
dlsch1->active = 1;
dlsch1_harq = dlsch1->harq_processes[harq_pid];
dlsch1_harq->mcs = mcs2;
dlsch1_harq->rvidx = rv2;
dlsch1_harq->status = ACTIVE;
dlsch1_harq->codeword = 0;
dlsch0=NULL;
dlsch0_harq = NULL;
#ifdef DEBUG_HARQ
printf("[DCI UE]: TB0 is deactivated, retransmit TB1 transmit in TM6\n");
#endif
}
if (dlsch0 != NULL){
dlsch0->current_harq_pid = harq_pid;
dlsch0->harq_ack[subframe].harq_id = harq_pid;
}
if (dlsch1 != NULL){
dlsch1->current_harq_pid = harq_pid;
dlsch1->harq_ack[subframe].harq_id = harq_pid;
}
if (dlsch0_harq != NULL){
conv_rballoc(rah,
rballoc,
frame_parms->N_RB_DL,
dlsch0_harq->rb_alloc_even);
dlsch0_harq->rb_alloc_odd[0]= dlsch0_harq->rb_alloc_even[0];
dlsch0_harq->rb_alloc_odd[1]= dlsch0_harq->rb_alloc_even[1];
dlsch0_harq->rb_alloc_odd[2]= dlsch0_harq->rb_alloc_even[2];
dlsch0_harq->rb_alloc_odd[3]= dlsch0_harq->rb_alloc_even[3];
if (dlsch1_harq != NULL){
dlsch1_harq->rb_alloc_even[0]= dlsch0_harq->rb_alloc_even[0];
dlsch1_harq->rb_alloc_even[1]= dlsch0_harq->rb_alloc_even[1];
dlsch1_harq->rb_alloc_even[2]= dlsch0_harq->rb_alloc_even[2];
dlsch1_harq->rb_alloc_even[3]= dlsch0_harq->rb_alloc_even[3];
dlsch1_harq->rb_alloc_odd[0] = dlsch0_harq->rb_alloc_odd[0];
dlsch1_harq->rb_alloc_odd[1] = dlsch0_harq->rb_alloc_odd[1];
dlsch1_harq->rb_alloc_odd[2] = dlsch0_harq->rb_alloc_odd[2];
dlsch1_harq->rb_alloc_odd[3] = dlsch0_harq->rb_alloc_odd[3];
dlsch1_harq->nb_rb = dlsch0_harq->nb_rb;
}
dlsch0_harq->nb_rb = conv_nprb(rah,
rballoc,
frame_parms->N_RB_DL);
} else if ((dlsch0_harq == NULL) && (dlsch1_harq != NULL)){
conv_rballoc(rah,
rballoc,
frame_parms->N_RB_DL,
dlsch1_harq->rb_alloc_even);
dlsch1_harq->rb_alloc_odd[0]= dlsch1_harq->rb_alloc_even[0];
dlsch1_harq->rb_alloc_odd[1]= dlsch1_harq->rb_alloc_even[1];
dlsch1_harq->rb_alloc_odd[2]= dlsch1_harq->rb_alloc_even[2];
dlsch1_harq->rb_alloc_odd[3]= dlsch1_harq->rb_alloc_even[3];
dlsch1_harq->nb_rb = conv_nprb(rah,
rballoc,
frame_parms->N_RB_DL);
}
if (dlsch0_harq != NULL) {
dlsch0_harq->delta_PUCCH = delta_PUCCH_lut[TPC&3];
}
if (dlsch1_harq != NULL) {
dlsch1_harq->delta_PUCCH = delta_PUCCH_lut[TPC&3];
}
// assume one layer per codeword (2 antenna port case)
if (dlsch0_harq != NULL)
dlsch0_harq->Nl = 1;
if (dlsch1_harq != NULL)
dlsch1_harq->Nl = 1;
#ifdef DEBUG_HARQ
printf ("[DCI UE] tpmi = %d\n", tpmi);
#endif
if ((dlsch0 != NULL) && (dlsch1 != NULL)){ //two CW active
dlsch0_harq->dl_power_off = 1;
dlsch1_harq->dl_power_off = 1;
switch (tpmi) {
case 0:
dlsch0_harq->mimo_mode = DUALSTREAM_UNIFORM_PRECODING1;
dlsch1_harq->mimo_mode = DUALSTREAM_UNIFORM_PRECODING1;
dlsch0_harq->pmi_alloc = pmi_extend(frame_parms,0, 1);
dlsch1_harq->pmi_alloc = pmi_extend(frame_parms,0, 1);
break;
case 1:
dlsch0_harq->mimo_mode = DUALSTREAM_UNIFORM_PRECODINGj;
dlsch1_harq->mimo_mode = DUALSTREAM_UNIFORM_PRECODINGj;
dlsch0_harq->pmi_alloc = pmi_extend(frame_parms,1, 1);
dlsch1_harq->pmi_alloc = pmi_extend(frame_parms,1, 1);
break;
case 2: // PUSCH precoding
dlsch0_harq->mimo_mode = DUALSTREAM_PUSCH_PRECODING;
dlsch1_harq->mimo_mode = DUALSTREAM_PUSCH_PRECODING;
if (tbswap==0){
dlsch0_harq->pmi_alloc = dlsch0->pmi_alloc;
dlsch1_harq->pmi_alloc = dlsch0->pmi_alloc^0x1555;
} else {
dlsch1_harq->pmi_alloc = dlsch0->pmi_alloc;
dlsch0_harq->pmi_alloc = dlsch0->pmi_alloc^0x1555;
}
break;
default:
break;
}
} else if ((dlsch0 != NULL) && (dlsch1 == NULL)) { // only CW 0 active
dlsch0_harq->dl_power_off = 1;
switch (tpmi) {
case 0 :
dlsch0_harq->mimo_mode = ALAMOUTI;
break;
case 1:
dlsch0_harq->mimo_mode = UNIFORM_PRECODING11;
dlsch0_harq->pmi_alloc = pmi_extend(frame_parms,0, 0);
break;
case 2:
dlsch0_harq->mimo_mode = UNIFORM_PRECODING1m1;
dlsch0_harq->pmi_alloc = pmi_extend(frame_parms,1, 0);
break;
case 3:
dlsch0_harq->mimo_mode = UNIFORM_PRECODING1j;
dlsch0_harq->pmi_alloc = pmi_extend(frame_parms,2, 0);
break;
case 4:
dlsch0_harq->mimo_mode = UNIFORM_PRECODING1mj;
dlsch0_harq->pmi_alloc = pmi_extend(frame_parms,3, 0);
break;
case 5:
dlsch0_harq->mimo_mode = PUSCH_PRECODING0;
// pmi stored from ulsch allocation routine
// we need to extract the first column of precoding matrix (which was computed assuming rank==2)
dlsch0_harq->pmi_alloc = dlsch0->pmi_alloc;;//pmi_convert(frame_parms,dlsch0->pmi_alloc,0);
//LOG_I(PHY,"XXX using PMI %x\n",pmi2hex_2Ar1(dlsch0_harq->pmi_alloc));
#ifdef DEBUG_HARQ
printf ("[DCI UE] I am calling from the UE side pmi_alloc_new = %d\n", dlsch0->pmi_alloc);
#endif
break;
case 6:
dlsch0_harq->mimo_mode = PUSCH_PRECODING1;
// we need to extract the second column of precoding matrix (which was computed assuming rank==2)
dlsch0_harq->pmi_alloc = dlsch0->pmi_alloc;;//pmi_convert(frame_parms,dlsch0->pmi_alloc,1);
#ifdef DEBUG_HARQ
printf ("[DCI UE] I am calling from the UE side pmi_alloc_new = %d\n", dlsch0->pmi_alloc);
#endif
break;
#ifdef DEBUG_HARQ
printf("[DCI UE] harq0 MIMO mode = %d\n", dlsch0_harq->mimo_mode);
#endif
}
} else {
dlsch1_harq->dl_power_off = 1;
switch (tpmi) {
case 0 :
dlsch1_harq->mimo_mode = ALAMOUTI;
break;
case 1:
dlsch1_harq->mimo_mode = UNIFORM_PRECODING11;
dlsch1_harq->pmi_alloc = pmi_extend(frame_parms,0, 0);
break;
case 2:
dlsch1_harq->mimo_mode = UNIFORM_PRECODING1m1;
dlsch1_harq->pmi_alloc = pmi_extend(frame_parms,1, 0);
break;
case 3:
dlsch1_harq->mimo_mode = UNIFORM_PRECODING1j;
dlsch1_harq->pmi_alloc = pmi_extend(frame_parms,2, 0);
break;
case 4:
dlsch1_harq->mimo_mode = UNIFORM_PRECODING1mj;
dlsch1_harq->pmi_alloc = pmi_extend(frame_parms,3, 0);
break;
case 5:
dlsch1_harq->mimo_mode = PUSCH_PRECODING0;
// pmi stored from ulsch allocation routine
dlsch1_harq->pmi_alloc = dlsch1->pmi_alloc;
//LOG_I(PHY,"XXX using PMI %x\n",pmi2hex_2Ar1(dlsch0_harq->pmi_alloc));
break;
case 6:
dlsch1_harq->mimo_mode = PUSCH_PRECODING1;
dlsch1_harq->pmi_alloc = dlsch1->pmi_alloc;
return(-1);
break;
}
#ifdef DEBUG_HARQ
printf ("[DCI UE] I am calling from the UE side pmi_alloc_new = %d\n", dlsch1->pmi_alloc);
#endif
#ifdef DEBUG_HARQ
printf("[DCI UE] harq1 MIMO mode = %d\n", dlsch1_harq->mimo_mode);
#endif
}
//printf(" UE DCI harq0 MIMO mode = %d\n", dlsch0_harq->mimo_mode);
if ((frame_parms->mode1_flag == 1) && (dlsch0_harq != NULL))
dlsch0_harq->mimo_mode = SISO;
if (dlsch0 != NULL) {
if ((ndi1!=dlsch0_harq->DCINdi) || (dlsch0_harq->first_tx==1)) {
dlsch0_harq->round = 0;
dlsch0_harq->status = ACTIVE;
dlsch0_harq->DCINdi = ndi1;
if ( dlsch0_harq->first_tx==1) {
LOG_D(PHY,"Format 2 DCI First TX0: Clearing flag\n");
dlsch0_harq->first_tx = 0;
}
} else if (dlsch0_harq->status == SCH_IDLE) { // we got an Ndi = 0 for a previously decoded process,
// this happens if either another harq process in the same
// is NAK or an ACK was not received
dlsch0->harq_ack[subframe].ack = 1;
dlsch0->harq_ack[subframe].harq_id = harq_pid;
dlsch0->harq_ack[subframe].send_harq_status = 1;
dlsch0->active = 0;
}
}
if ((dlsch1 != NULL) && (dlsch1->active == 1 )) {
if ((ndi2!=dlsch1_harq->DCINdi) || (dlsch1_harq->first_tx==1)) {
dlsch1_harq->round = 0;
dlsch1_harq->status = ACTIVE;
dlsch1_harq->DCINdi = ndi2;
if (dlsch1_harq->first_tx==1) {
LOG_D(PHY,"Format 2 DCI First TX1: Clearing flag\n");
dlsch1_harq->first_tx = 0;
}
}
else if ((dlsch1 != NULL) && (dlsch1_harq->status == SCH_IDLE)) { // we got an Ndi = 0 for a previously decoded process,
// this happens if either another harq process in the same
// is NAK or an ACK was not received
dlsch1->harq_ack[subframe].ack = 1;
dlsch1->harq_ack[subframe].harq_id = harq_pid;
dlsch1->harq_ack[subframe].send_harq_status = 1;
dlsch1->active = 0;
}
}
if (dlsch0 != NULL){
if (dlsch0_harq->nb_rb>1) {
dlsch0_harq->TBS = TBStable[get_I_TBS(dlsch0_harq->mcs)][dlsch0_harq->nb_rb-1];
if (mcs1 <= 28)
dlsch0_harq->Qm = get_Qm(mcs1);
else if (mcs1<=31)
dlsch0_harq->Qm = (mcs1-28)<<1;
else
LOG_E(PHY,"invalid mcs1 %d\n",mcs1);
} else
dlsch0_harq->TBS =0;
dlsch0->rnti = rnti;
}
if (dlsch1 != NULL) {
if (dlsch1_harq->DCINdi != ndi2) {
dlsch1_harq->round=0;
dlsch1_harq->status = ACTIVE;
}
dlsch1_harq->DCINdi = ndi2;
if (dlsch1_harq->nb_rb>1) {
dlsch1_harq->TBS = TBStable[get_I_TBS(dlsch1_harq->mcs)][dlsch1_harq->nb_rb-1];
if (mcs2 <= 28)
dlsch1_harq->Qm = get_Qm(mcs2);
else if (mcs1<=31)
dlsch1_harq->Qm = (mcs2-28)<<1;
else
LOG_E(PHY,"invalid mcs2 %d\n",mcs2);
} else
dlsch1_harq->TBS = 0;
dlsch1->rnti = rnti;
}
#ifdef DEBUG_HARQ
if (dlsch0 != NULL && dlsch1 != NULL)
printf("[DCI UE] dlsch0_harq status = %d, dlsch1_harq status = %d\n", dlsch0_harq->status, dlsch1_harq->status);
else if (dlsch0 == NULL && dlsch1 != NULL)
printf("[DCI UE] dlsch0_harq NULL dlsch1_harq status = %d\n", dlsch1_harq->status);
else if (dlsch0 != NULL && dlsch1 == NULL)
printf("[DCI UE] dlsch1_harq NULL dlsch0_harq status = %d\n", dlsch0_harq->status);
#endif
/* // extract dci infomation
//LOG_I(PHY,"[DCI-format2] AbsSubframe %d.%d extract dci infomation \n", frame, subframe);
extract_dci2_info(frame_parms->N_RB_DL,
frame_type,
@@ -6107,20 +6738,19 @@ int generate_ue_dlsch_params_from_dci(int frame,
dci_pdu,
&dci_info_extarcted);
// check dci content
dlsch[0]->active = 0;
dlsch[1]->active = 0;
if (dci_info_extarcted.tb_swap == 0) {
dlsch0 = dlsch[0];
dlsch1 = dlsch[1];
} else {
dlsch0 = dlsch[1];
dlsch1 = dlsch[0];
}
dlsch0 = dlsch[0];
dlsch1 = dlsch[1];
dlsch0_harq = dlsch0->harq_processes[harq_pid];
dlsch1_harq = dlsch1->harq_processes[harq_pid];
dlsch0_harq = dlsch0->harq_processes[dci_info_extarcted.harq_pid];
dlsch1_harq = dlsch1->harq_processes[dci_info_extarcted.harq_pid];
printf("before coherency dlsch[1]->pmi_alloc %d\n",dlsch[1]->pmi_alloc);
printf("before coherency dlsch1->pmi_alloc %d\n",dlsch1->pmi_alloc);
printf("before coherency dlsch1_harq->pmi_alloc %d\n",dlsch1_harq->pmi_alloc);
//LOG_I(PHY,"[DCI-format2] check dci content \n");
status = check_dci_format2_2a_coherency(format2,
@@ -6135,6 +6765,7 @@ int generate_ue_dlsch_params_from_dci(int frame,
if(status == 0)
return(-1);
// dci is correct ==> update internal structure and prepare dl decoding
//LOG_I(PHY,"[DCI-format2] update internal structure and prepare dl decoding \n");
prepare_dl_decoding_format2_2A(format2,
@@ -6147,8 +6778,10 @@ int generate_ue_dlsch_params_from_dci(int frame,
dlsch0,
dlsch1);
}
}*/
break;
}
case format2A:
{
@@ -6372,8 +7005,7 @@ int generate_ue_dlsch_params_from_dci(int frame,
break;
}
#ifdef DEBUG_DCI
#ifdef DEBUG_DCI
if (dlsch[0] && (dlsch[0]->rnti != 0xffff)) {
printf("dci_format:%d Abssubframe: %d.%d \n",dci_format,frame%1024,subframe);
@@ -6381,7 +7013,7 @@ int generate_ue_dlsch_params_from_dci(int frame,
printf("PDSCH dlsch0 UE: NBRB %d\n",dlsch0_harq->nb_rb);
printf("PDSCH dlsch0 UE: rballoc %x\n",dlsch0_harq->rb_alloc_even[0]);
printf("PDSCH dlsch0 UE: harq_pid %d\n",harq_pid);
printf("PDSCH dlsch0 UE: tpc %d\n",TPC);
// printf("PDSCH dlsch0 UE: tpc %d\n",TPC);
printf("PDSCH dlsch0 UE: g %d\n",dlsch[0]->g_pucch);
printf("PDSCH dlsch0 UE: round %d\n",dlsch0_harq->round);
printf("PDSCH dlsch0 UE: DCINdi %d\n",dlsch0_harq->DCINdi);
@@ -6391,7 +7023,7 @@ int generate_ue_dlsch_params_from_dci(int frame,
printf("PDSCH dlsch0 UE: pwr_off %d\n",dlsch0_harq->dl_power_off);
}
#endif
#endif
#if T_TRACER
if( (dlsch[0]->rnti != si_rnti) && (dlsch[0]->rnti != ra_rnti) && (dlsch[0]->rnti != p_rnti))
openair1/PHY/LTE_TRANSPORT/dlsch_demodulation.c
+13 -2
View File
@@ -156,6 +156,9 @@ int rx_pdsch(PHY_VARS_UE *ue,
codeword_TB1 = dlsch[1]->harq_processes[harq_pid]->codeword;
dlsch0_harq = dlsch[codeword_TB0]->harq_processes[harq_pid];
dlsch1_harq = dlsch[codeword_TB1]->harq_processes[harq_pid];
#ifdef DEBUG_HARQ
printf("[DEMOD] I am assuming both TBs are active\n");
#endif
}
else if ((dlsch[0]->harq_processes[harq_pid]->status == ACTIVE) &&
(dlsch[1]->harq_processes[harq_pid]->status != ACTIVE) ) {
@@ -163,6 +166,9 @@ int rx_pdsch(PHY_VARS_UE *ue,
dlsch0_harq = dlsch[0]->harq_processes[harq_pid];
dlsch1_harq = NULL;
codeword_TB1 = -1;
#ifdef DEBUG_HARQ
printf("[DEMOD] I am assuming only TB0 is active\n");
#endif
}
else if ((dlsch[0]->harq_processes[harq_pid]->status != ACTIVE) &&
(dlsch[1]->harq_processes[harq_pid]->status == ACTIVE) ){
@@ -170,6 +176,9 @@ int rx_pdsch(PHY_VARS_UE *ue,
dlsch0_harq = dlsch[1]->harq_processes[harq_pid];
dlsch1_harq = NULL;
codeword_TB0 = -1;
#ifdef DEBUG_HARQ
printf("[DEMOD] I am assuming only TB1 is active\n");
#endif
}
else {
LOG_E(PHY,"[UE][FATAL] Frame %d subframe %d: no active DLSCH\n",ue->proc.proc_rxtx[0].frame_rx,subframe);
@@ -229,14 +238,16 @@ int rx_pdsch(PHY_VARS_UE *ue,
}
if ((dlsch0_harq->mimo_mode==LARGE_CDD) || ((dlsch0_harq->mimo_mode>=DUALSTREAM_UNIFORM_PRECODING1) && (dlsch0_harq->mimo_mode<=DUALSTREAM_PUSCH_PRECODING))) {
DevAssert(dlsch1_harq);
// DevAssert(dlsch1_harq);
if (eNB_id!=eNB_id_i) {
LOG_E(PHY,"TM3/TM4 requires to set eNB_id==eNB_id_i!\n");
return(-1);
}
}
#ifdef DEBUG_HARQ
printf("Demod dlsch0_harq->pmi_alloc %d\n", dlsch0_harq->pmi_alloc);
#endif
if (frame_parms->nb_antenna_ports_eNB>1 && beamforming_mode==0) {
#ifdef DEBUG_DLSCH_MOD
openair1/PHY/LTE_TRANSPORT/initial_sync.c
+15 -13
View File
@@ -43,13 +43,13 @@ extern openair0_config_t openair0_cfg[];
//#define DEBUG_INITIAL_SYNCH
int pbch_detection(PHY_VARS_UE *ue, runmode_t mode)
int pbch_detection(PHY_VARS_UE *ue, runmode_t mode)
{
uint8_t l,pbch_decoded,frame_mod4,pbch_tx_ant,dummy;
LTE_DL_FRAME_PARMS *frame_parms=&ue->frame_parms;
char phich_resource[6];
#ifdef DEBUG_INITIAL_SYNCH
LOG_I(PHY,"[UE%d] Initial sync: starting PBCH detection (rx_offset %d)\n",ue->Mod_id,
ue->rx_offset);
@@ -63,7 +63,7 @@ int pbch_detection(PHY_VARS_UE *ue, runmode_t mode)
ue->rx_offset,
0,
1);
}
}
for (l=0; l<frame_parms->symbols_per_tti/2; l++) {
slot_fep(ue,
@@ -72,7 +72,7 @@ int pbch_detection(PHY_VARS_UE *ue, runmode_t mode)
ue->rx_offset,
0,
1);
}
}
slot_fep(ue,
0,
2,
@@ -83,9 +83,11 @@ int pbch_detection(PHY_VARS_UE *ue, runmode_t mode)
lte_ue_measurements(ue,
ue->rx_offset,
0,
0,0);
0,
0,
0);
if (ue->frame_parms.frame_type == TDD) {
ue_rrc_measurements(ue,
2,
@@ -511,8 +513,8 @@ int initial_sync(PHY_VARS_UE *ue, runmode_t mode)
ue->measurements.n0_power_tot_dBm,
10*log10(ue->measurements.rsrp[0])-ue->rx_total_gain_dB,
(10*log10(ue->measurements.rsrq[0])));
LOG_I(PHY,"[UE %d] Frame %d MIB Information => %s, %s, NidCell %d, N_RB_DL %d, PHICH DURATION %d, PHICH RESOURCE %s, TX_ANT %d\n",
ue->Mod_id,
ue->proc.proc_rxtx[0].frame_rx,
@@ -560,7 +562,7 @@ int initial_sync(PHY_VARS_UE *ue, runmode_t mode)
for (aarx=0; aarx<frame_parms->nb_antennas_rx; aarx++)
rx_power += signal_energy(&ue->common_vars.rxdata[aarx][sync_pos2],
frame_parms->ofdm_symbol_size+frame_parms->nb_prefix_samples);
/*
// do a measurement on the full frame
for (aarx=0; aarx<frame_parms->nb_antennas_rx; aarx++)
@@ -569,7 +571,7 @@ int initial_sync(PHY_VARS_UE *ue, runmode_t mode)
*/
// we might add a low-pass filter here later
ue->measurements.rx_power_avg[0] = rx_power/frame_parms->nb_antennas_rx;
ue->measurements.rx_power_avg[0] = rx_power/frame_parms->nb_antennas_rx;
ue->measurements.rx_power_avg_dB[0] = dB_fixed(ue->measurements.rx_power_avg[0]);
@@ -578,7 +580,7 @@ int initial_sync(PHY_VARS_UE *ue, runmode_t mode)
#endif
#ifndef OAI_USRP
#ifndef OAI_BLADERF
#ifndef OAI_BLADERF
#ifndef OAI_LMSSDR
phy_adjust_gain(ue,ue->measurements.rx_power_avg_dB[0],0);
#endif
@@ -589,7 +591,7 @@ int initial_sync(PHY_VARS_UE *ue, runmode_t mode)
else {
#ifndef OAI_USRP
#ifndef OAI_BLADERF
#ifndef OAI_BLADERF
#ifndef OAI_LMSSDR
phy_adjust_gain(ue,dB_fixed(ue->measurements.rssi),0);
#endif
openair1/PHY/TOOLS/lte_phy_scope_tm4.c
+6
View File
@@ -797,4 +797,10 @@ void phy_scope_UE(FD_lte_phy_scope_ue *form,
for (arx=0;arx<nb_antennas_rx;arx++) {
free(chest_t_abs[arx]);
}
for (int i = 0; i<8; ++i)
for (int j = 0; j < 7*2*frame_parms->N_RB_DL*12+4; ++j )
phy_vars_ue->pdsch_vars[subframe&0x1][eNB_id]->rxdataF_comp1[0][0][i][j]=0;
for (int m=0; m<coded_bits_per_codeword0; ++m)
phy_vars_ue->pdsch_vars[subframe&0x1][eNB_id]->llr[1][m]=0;
}
openair1/SCHED/phy_procedures_lte_ue.c
+1037 -1040
View File
File diff suppressed because it is too large Load Diff
openair1/SIMULATION/LTE_PHY/dlsim_tm4.c
+243 -136
View File
@@ -168,6 +168,7 @@ int main(int argc, char **argv)
int hold_rank1_precoder=0;
int tpmi_retr=0;
bool is_first_time;
int rank_adapt =0;
int updated_csi = 0;
SCM_t channel_model=Rayleigh1;
@@ -257,6 +258,7 @@ int main(int argc, char **argv)
double cpu_freq_GHz;
//time_stats_t ts;//,sts,usts;
int avg_iter[2],iter_trials[2];
int rank_indc[4]={0,0,0,0};
int rballocset=0;
int print_perf=0;
int test_perf=0;
@@ -942,6 +944,10 @@ int main(int argc, char **argv)
exit(-1);
}
if ((transmission_mode == 3) && (transmission_mode == 4))
for (n=0; n<4; ++n)
rank_indc[n]=1;
if ((transmission_mode == 3) || (transmission_mode==4) || (transmission_mode==8))
Kmimo=2;
else
@@ -2126,7 +2132,7 @@ int main(int argc, char **argv)
is_first_time = true;
#ifdef DEBUG_HARQ
printf("[DLSIM] TRIAL %d\n", trials);
printf("TPMI_retr= %d\n", tpmi_retr);
printf("[DLSIM] TPMI_retr= %d\n", tpmi_retr);
#endif
for (i=0; i<frame_parms->nb_antennas_tx; i++) {
@@ -2143,6 +2149,9 @@ int main(int argc, char **argv)
TB0_active=1;
TB1_active=1;
if (transmission_mode == 3 || transmission_mode == 4)
rank_indc[0]=1;
while (((transmission_mode == 3 || transmission_mode == 4) &&
((round < num_rounds) && ((ret[0] > UE->dlsch[subframe&0x1][0][0]->max_turbo_iterations) ||
(ret[1] > UE->dlsch[subframe&0x1][0][0]->max_turbo_iterations)))) ||
@@ -2210,9 +2219,19 @@ int main(int argc, char **argv)
eNB->dlsch[0][1]->harq_processes[0]->rvidx = round&3;
if (round == 0) { // First round
TB0_active = 1;
TB1_active = 1;
if ((rank_indc[round]==1) || (rank_indc[round]==0 && rank_adapt==0)) {
TB0_active = 1;
TB1_active = 1;
#ifdef DEBUG_HARQ
printf("Simulating HARQ both active \n");
#endif
}else {
TB0_active = 1;
TB1_active = 0;
#ifdef DEBUG_HARQ
printf("Simulating HARQ only TB0 active \n");
#endif
}
if (eNB->frame_parms.frame_type == TDD) {
switch (transmission_mode) {
@@ -2274,47 +2293,98 @@ int main(int argc, char **argv)
}
break;
case 4:
switch (eNB->frame_parms.N_RB_DL) {
case 6:
((DCI2_1_5MHz_2A_TDD_t *)&DLSCH_alloc_pdu_1[0])->tpmi = 2;
((DCI2_1_5MHz_2A_TDD_t *)&DLSCH_alloc_pdu_1[0])->mcs1 = mcs1;
((DCI2_1_5MHz_2A_TDD_t *)&DLSCH_alloc_pdu_1[0])->mcs2 = mcs2;
((DCI2_1_5MHz_2A_TDD_t *)&DLSCH_alloc_pdu_1[0])->ndi1 = trials&1;
((DCI2_1_5MHz_2A_TDD_t *)&DLSCH_alloc_pdu_1[0])->rv1 = 0;
((DCI2_1_5MHz_2A_TDD_t *)&DLSCH_alloc_pdu_1[0])->ndi2 = trials&1;
((DCI2_1_5MHz_2A_TDD_t *)&DLSCH_alloc_pdu_1[0])->rv2 = 0;
memcpy(&dci_alloc[0].dci_pdu[0],&DLSCH_alloc_pdu_1[0],sizeof(DCI2_1_5MHz_2A_TDD_t));
break;
case 25:
((DCI2_5MHz_2A_TDD_t *)&DLSCH_alloc_pdu_1[0])->tpmi = 2;
((DCI2_5MHz_2A_TDD_t *)&DLSCH_alloc_pdu_1[0])->mcs1 = mcs1;
((DCI2_5MHz_2A_TDD_t *)&DLSCH_alloc_pdu_1[0])->mcs2 = mcs2;
((DCI2_5MHz_2A_TDD_t *)&DLSCH_alloc_pdu_1[0])->ndi1 = trials&1;
((DCI2_5MHz_2A_TDD_t *)&DLSCH_alloc_pdu_1[0])->rv1 = 0;
((DCI2_5MHz_2A_TDD_t *)&DLSCH_alloc_pdu_1[0])->ndi2 = trials&1;
((DCI2_5MHz_2A_TDD_t *)&DLSCH_alloc_pdu_1[0])->rv2 = 0;
memcpy(&dci_alloc[0].dci_pdu[0],&DLSCH_alloc_pdu_1[0],sizeof(DCI2_5MHz_2A_TDD_t));
break;
case 50:
((DCI2_10MHz_2A_TDD_t *)&DLSCH_alloc_pdu_1[0])->tpmi = 2;
((DCI2_10MHz_2A_TDD_t *)&DLSCH_alloc_pdu_1[0])->mcs1 = mcs1;
((DCI2_10MHz_2A_TDD_t *)&DLSCH_alloc_pdu_1[0])->mcs2 = mcs2;
((DCI2_10MHz_2A_TDD_t *)&DLSCH_alloc_pdu_1[0])->ndi1 = trials&1;
((DCI2_10MHz_2A_TDD_t *)&DLSCH_alloc_pdu_1[0])->rv1 = 0;
((DCI2_10MHz_2A_TDD_t *)&DLSCH_alloc_pdu_1[0])->ndi2 = trials&1;
((DCI2_10MHz_2A_TDD_t *)&DLSCH_alloc_pdu_1[0])->rv2 = 0;
memcpy(&dci_alloc[0].dci_pdu[0],&DLSCH_alloc_pdu_1[0],sizeof(DCI2_10MHz_2A_TDD_t));
break;
case 100:
((DCI2_20MHz_2A_TDD_t *)&DLSCH_alloc_pdu_1[0])->tpmi = 2;
((DCI2_20MHz_2A_TDD_t *)&DLSCH_alloc_pdu_1[0])->mcs1 = mcs1;
((DCI2_20MHz_2A_TDD_t *)&DLSCH_alloc_pdu_1[0])->mcs2 = mcs2;
((DCI2_20MHz_2A_TDD_t *)&DLSCH_alloc_pdu_1[0])->ndi1 = trials&1;
((DCI2_20MHz_2A_TDD_t *)&DLSCH_alloc_pdu_1[0])->rv1 = 0;
((DCI2_20MHz_2A_TDD_t *)&DLSCH_alloc_pdu_1[0])->ndi2 = trials&1;
((DCI2_20MHz_2A_TDD_t *)&DLSCH_alloc_pdu_1[0])->rv2 = 0;
memcpy(&dci_alloc[0].dci_pdu[0],&DLSCH_alloc_pdu_1[0],sizeof(DCI2_20MHz_2A_TDD_t));
break;
if ((TB0_active == 1) && (TB1_active == 1)) {
switch (eNB->frame_parms.N_RB_DL) {
case 6:
((DCI2_1_5MHz_2A_TDD_t *)&DLSCH_alloc_pdu_1[0])->tpmi = 2;
((DCI2_1_5MHz_2A_TDD_t *)&DLSCH_alloc_pdu_1[0])->mcs1 = mcs1;
((DCI2_1_5MHz_2A_TDD_t *)&DLSCH_alloc_pdu_1[0])->mcs2 = mcs2;
((DCI2_1_5MHz_2A_TDD_t *)&DLSCH_alloc_pdu_1[0])->ndi1 = trials&1;
((DCI2_1_5MHz_2A_TDD_t *)&DLSCH_alloc_pdu_1[0])->rv1 = 0;
((DCI2_1_5MHz_2A_TDD_t *)&DLSCH_alloc_pdu_1[0])->ndi2 = trials&1;
((DCI2_1_5MHz_2A_TDD_t *)&DLSCH_alloc_pdu_1[0])->rv2 = 0;
memcpy(&dci_alloc[0].dci_pdu[0],&DLSCH_alloc_pdu_1[0],sizeof(DCI2_1_5MHz_2A_TDD_t));
break;
case 25:
((DCI2_5MHz_2A_TDD_t *)&DLSCH_alloc_pdu_1[0])->tpmi = 2;
((DCI2_5MHz_2A_TDD_t *)&DLSCH_alloc_pdu_1[0])->mcs1 = mcs1;
((DCI2_5MHz_2A_TDD_t *)&DLSCH_alloc_pdu_1[0])->mcs2 = mcs2;
((DCI2_5MHz_2A_TDD_t *)&DLSCH_alloc_pdu_1[0])->ndi1 = trials&1;
((DCI2_5MHz_2A_TDD_t *)&DLSCH_alloc_pdu_1[0])->rv1 = 0;
((DCI2_5MHz_2A_TDD_t *)&DLSCH_alloc_pdu_1[0])->ndi2 = trials&1;
((DCI2_5MHz_2A_TDD_t *)&DLSCH_alloc_pdu_1[0])->rv2 = 0;
memcpy(&dci_alloc[0].dci_pdu[0],&DLSCH_alloc_pdu_1[0],sizeof(DCI2_5MHz_2A_TDD_t));
break;
case 50:
((DCI2_10MHz_2A_TDD_t *)&DLSCH_alloc_pdu_1[0])->tpmi = 2;
((DCI2_10MHz_2A_TDD_t *)&DLSCH_alloc_pdu_1[0])->mcs1 = mcs1;
((DCI2_10MHz_2A_TDD_t *)&DLSCH_alloc_pdu_1[0])->mcs2 = mcs2;
((DCI2_10MHz_2A_TDD_t *)&DLSCH_alloc_pdu_1[0])->ndi1 = trials&1;
((DCI2_10MHz_2A_TDD_t *)&DLSCH_alloc_pdu_1[0])->rv1 = 0;
((DCI2_10MHz_2A_TDD_t *)&DLSCH_alloc_pdu_1[0])->ndi2 = trials&1;
((DCI2_10MHz_2A_TDD_t *)&DLSCH_alloc_pdu_1[0])->rv2 = 0;
memcpy(&dci_alloc[0].dci_pdu[0],&DLSCH_alloc_pdu_1[0],sizeof(DCI2_10MHz_2A_TDD_t));
break;
case 100:
((DCI2_20MHz_2A_TDD_t *)&DLSCH_alloc_pdu_1[0])->tpmi = 2;
((DCI2_20MHz_2A_TDD_t *)&DLSCH_alloc_pdu_1[0])->mcs1 = mcs1;
((DCI2_20MHz_2A_TDD_t *)&DLSCH_alloc_pdu_1[0])->mcs2 = mcs2;
((DCI2_20MHz_2A_TDD_t *)&DLSCH_alloc_pdu_1[0])->ndi1 = trials&1;
((DCI2_20MHz_2A_TDD_t *)&DLSCH_alloc_pdu_1[0])->rv1 = 0;
((DCI2_20MHz_2A_TDD_t *)&DLSCH_alloc_pdu_1[0])->ndi2 = trials&1;
((DCI2_20MHz_2A_TDD_t *)&DLSCH_alloc_pdu_1[0])->rv2 = 0;
memcpy(&dci_alloc[0].dci_pdu[0],&DLSCH_alloc_pdu_1[0],sizeof(DCI2_20MHz_2A_TDD_t));
break;
}
} else if ((TB0_active == 1) && (TB1_active == 0)) {
switch (eNB->frame_parms.N_RB_DL) {
case 6:
((DCI2_1_5MHz_2A_TDD_t *)&DLSCH_alloc_pdu_1[0])->tpmi = 0;
((DCI2_1_5MHz_2A_TDD_t *)&DLSCH_alloc_pdu_1[0])->ndi1 = trials&1;
((DCI2_1_5MHz_2A_TDD_t *)&DLSCH_alloc_pdu_1[0])->rv1 = round&3;
((DCI2_1_5MHz_2A_TDD_t *)&DLSCH_alloc_pdu_1[0])->mcs2 = 0;
((DCI2_1_5MHz_2A_TDD_t *)&DLSCH_alloc_pdu_1[0])->rv2 = 1;
memcpy(&dci_alloc[0].dci_pdu[0],&DLSCH_alloc_pdu_1[0],sizeof(DCI2_1_5MHz_2A_TDD_t));
break;
case 25:
((DCI2_5MHz_2A_TDD_t *)&DLSCH_alloc_pdu_1[0])->tpmi = 0;
((DCI2_5MHz_2A_TDD_t *)&DLSCH_alloc_pdu_1[0])->ndi1 = trials&1;
((DCI2_5MHz_2A_TDD_t *)&DLSCH_alloc_pdu_1[0])->rv1 = round&3;
((DCI2_5MHz_2A_TDD_t *)&DLSCH_alloc_pdu_1[0])->mcs2 = 0;
((DCI2_5MHz_2A_TDD_t *)&DLSCH_alloc_pdu_1[0])->rv2 = 1;
memcpy(&dci_alloc[0].dci_pdu[0],&DLSCH_alloc_pdu_1[0],sizeof(DCI2_5MHz_2A_TDD_t));
break;
case 50:
((DCI2_10MHz_2A_TDD_t *)&DLSCH_alloc_pdu_1[0])->tpmi = 0;
((DCI2_10MHz_2A_TDD_t *)&DLSCH_alloc_pdu_1[0])->ndi1 = trials&1;
((DCI2_10MHz_2A_TDD_t *)&DLSCH_alloc_pdu_1[0])->rv1 = round&3;
((DCI2_10MHz_2A_TDD_t *)&DLSCH_alloc_pdu_1[0])->mcs2 = 0;
((DCI2_10MHz_2A_TDD_t *)&DLSCH_alloc_pdu_1[0])->rv2 = 1;
memcpy(&dci_alloc[0].dci_pdu[0],&DLSCH_alloc_pdu_1[0],sizeof(DCI2_10MHz_2A_TDD_t));
break;
case 100:
((DCI2_20MHz_2A_TDD_t *)&DLSCH_alloc_pdu_1[0])->tpmi = 0;
((DCI2_20MHz_2A_TDD_t *)&DLSCH_alloc_pdu_1[0])->ndi1 = trials&1;
((DCI2_20MHz_2A_TDD_t *)&DLSCH_alloc_pdu_1[0])->rv1 = round&3;
((DCI2_20MHz_2A_TDD_t *)&DLSCH_alloc_pdu_1[0])->mcs2 = 0;
((DCI2_20MHz_2A_TDD_t *)&DLSCH_alloc_pdu_1[0])->rv2 = 1;
memcpy(&dci_alloc[0].dci_pdu[0],&DLSCH_alloc_pdu_1[0],sizeof(DCI2_20MHz_2A_TDD_t));
break;
}
generate_eNB_dlsch_params_from_dci(0,
subframe,
&DLSCH_alloc_pdu_1[0],
n_rnti+k,
format2,
eNB->dlsch[0],
&eNB->frame_parms,
eNB->pdsch_config_dedicated,
SI_RNTI,
0,
P_RNTI,
UE->dlsch[subframe&0x1][0][1]->pmi_alloc,
transmission_mode>=7?transmission_mode:0
);
}
break;
case 5:
@@ -2324,8 +2394,7 @@ int main(int argc, char **argv)
memcpy(&dci_alloc[0].dci_pdu[0],&DLSCH_alloc_pdu2_1E[0],sizeof(DCI1E_5MHz_2A_M10PRB_TDD_t));
break;
}
}
else { // FDD
} else { // FDD
switch (transmission_mode) {
case 1:
case 2:
@@ -2385,49 +2454,101 @@ int main(int argc, char **argv)
}
break;
case 4:
switch (eNB->frame_parms.N_RB_DL) {
case 6:
((DCI2_1_5MHz_2A_FDD_t *)&DLSCH_alloc_pdu_1[0])->tpmi = 2;
((DCI2_1_5MHz_2A_FDD_t *)&DLSCH_alloc_pdu_1[0])->ndi1 = trials&1;
((DCI2_1_5MHz_2A_FDD_t *)&DLSCH_alloc_pdu_1[0])->mcs1 = mcs1;
((DCI2_1_5MHz_2A_TDD_t *)&DLSCH_alloc_pdu_1[0])->mcs2 = mcs2;
((DCI2_1_5MHz_2A_FDD_t *)&DLSCH_alloc_pdu_1[0])->rv1 = 0;
((DCI2_1_5MHz_2A_FDD_t *)&DLSCH_alloc_pdu_1[0])->ndi2 = trials&1;
((DCI2_1_5MHz_2A_FDD_t *)&DLSCH_alloc_pdu_1[0])->rv2 = 0;
memcpy(&dci_alloc[0].dci_pdu[0],&DLSCH_alloc_pdu_1[0],sizeof(DCI2_1_5MHz_2A_FDD_t));
break;
case 25:
((DCI2_5MHz_2A_FDD_t *)&DLSCH_alloc_pdu_1[0])->tpmi = 2;
((DCI2_5MHz_2A_FDD_t *)&DLSCH_alloc_pdu_1[0])->ndi1 = trials&1;
((DCI2_5MHz_2A_FDD_t *)&DLSCH_alloc_pdu_1[0])->mcs1 = mcs1;
((DCI2_5MHz_2A_FDD_t *)&DLSCH_alloc_pdu_1[0])->mcs2 = mcs2;
((DCI2_5MHz_2A_FDD_t *)&DLSCH_alloc_pdu_1[0])->rv1 = 0;
((DCI2_5MHz_2A_FDD_t *)&DLSCH_alloc_pdu_1[0])->ndi2 = trials&1;
((DCI2_5MHz_2A_FDD_t *)&DLSCH_alloc_pdu_1[0])->rv2 = 0;
memcpy(&dci_alloc[0].dci_pdu[0],&DLSCH_alloc_pdu_1[0],sizeof(DCI2_5MHz_2A_FDD_t));
break;
case 50:
((DCI2_10MHz_2A_FDD_t *)&DLSCH_alloc_pdu_1[0])->tpmi = 2;
((DCI2_10MHz_2A_FDD_t *)&DLSCH_alloc_pdu_1[0])->ndi1 = trials&1;
((DCI2_10MHz_2A_FDD_t *)&DLSCH_alloc_pdu_1[0])->mcs1 = mcs1;
((DCI2_10MHz_2A_FDD_t *)&DLSCH_alloc_pdu_1[0])->mcs2 = mcs2;
((DCI2_10MHz_2A_FDD_t *)&DLSCH_alloc_pdu_1[0])->rv1 = 0;
((DCI2_10MHz_2A_FDD_t *)&DLSCH_alloc_pdu_1[0])->ndi2 = trials&1;
((DCI2_10MHz_2A_FDD_t *)&DLSCH_alloc_pdu_1[0])->rv2 = 0;
memcpy(&dci_alloc[0].dci_pdu[0],&DLSCH_alloc_pdu_1[0],sizeof(DCI2_10MHz_2A_FDD_t));
break;
case 100:
((DCI2_20MHz_2A_FDD_t *)&DLSCH_alloc_pdu_1[0])->tpmi = 2;
((DCI2_20MHz_2A_FDD_t *)&DLSCH_alloc_pdu_1[0])->mcs1 = mcs1;
((DCI2_20MHz_2A_FDD_t *)&DLSCH_alloc_pdu_1[0])->mcs2 = mcs2;
((DCI2_20MHz_2A_FDD_t *)&DLSCH_alloc_pdu_1[0])->ndi1 = trials&1;
((DCI2_20MHz_2A_FDD_t *)&DLSCH_alloc_pdu_1[0])->rv1 = 0;
((DCI2_20MHz_2A_FDD_t *)&DLSCH_alloc_pdu_1[0])->ndi2 = trials&1;
((DCI2_20MHz_2A_FDD_t *)&DLSCH_alloc_pdu_1[0])->rv2 = 0;
memcpy(&dci_alloc[0].dci_pdu[0],&DLSCH_alloc_pdu_1[0],sizeof(DCI2_20MHz_2A_FDD_t));
break;
if ((TB0_active == 1) && (TB1_active == 1)) {
switch (eNB->frame_parms.N_RB_DL) {
case 6:
((DCI2_1_5MHz_2A_FDD_t *)&DLSCH_alloc_pdu_1[0])->tpmi = 2;
((DCI2_1_5MHz_2A_FDD_t *)&DLSCH_alloc_pdu_1[0])->ndi1 = trials&1;
((DCI2_1_5MHz_2A_FDD_t *)&DLSCH_alloc_pdu_1[0])->mcs1 = mcs1;
((DCI2_1_5MHz_2A_TDD_t *)&DLSCH_alloc_pdu_1[0])->mcs2 = mcs2;
((DCI2_1_5MHz_2A_FDD_t *)&DLSCH_alloc_pdu_1[0])->rv1 = 0;
((DCI2_1_5MHz_2A_FDD_t *)&DLSCH_alloc_pdu_1[0])->ndi2 = trials&1;
((DCI2_1_5MHz_2A_FDD_t *)&DLSCH_alloc_pdu_1[0])->rv2 = 0;
memcpy(&dci_alloc[0].dci_pdu[0],&DLSCH_alloc_pdu_1[0],sizeof(DCI2_1_5MHz_2A_FDD_t));
break;
case 25:
((DCI2_5MHz_2A_FDD_t *)&DLSCH_alloc_pdu_1[0])->tpmi = 2;
((DCI2_5MHz_2A_FDD_t *)&DLSCH_alloc_pdu_1[0])->ndi1 = trials&1;
((DCI2_5MHz_2A_FDD_t *)&DLSCH_alloc_pdu_1[0])->mcs1 = mcs1;
((DCI2_5MHz_2A_FDD_t *)&DLSCH_alloc_pdu_1[0])->mcs2 = mcs2;
((DCI2_5MHz_2A_FDD_t *)&DLSCH_alloc_pdu_1[0])->rv1 = 0;
((DCI2_5MHz_2A_FDD_t *)&DLSCH_alloc_pdu_1[0])->ndi2 = trials&1;
((DCI2_5MHz_2A_FDD_t *)&DLSCH_alloc_pdu_1[0])->rv2 = 0;
memcpy(&dci_alloc[0].dci_pdu[0],&DLSCH_alloc_pdu_1[0],sizeof(DCI2_5MHz_2A_FDD_t));
break;
case 50:
((DCI2_10MHz_2A_FDD_t *)&DLSCH_alloc_pdu_1[0])->tpmi = 2;
((DCI2_10MHz_2A_FDD_t *)&DLSCH_alloc_pdu_1[0])->ndi1 = trials&1;
((DCI2_10MHz_2A_FDD_t *)&DLSCH_alloc_pdu_1[0])->mcs1 = mcs1;
((DCI2_10MHz_2A_FDD_t *)&DLSCH_alloc_pdu_1[0])->mcs2 = mcs2;
((DCI2_10MHz_2A_FDD_t *)&DLSCH_alloc_pdu_1[0])->rv1 = 0;
((DCI2_10MHz_2A_FDD_t *)&DLSCH_alloc_pdu_1[0])->ndi2 = trials&1;
((DCI2_10MHz_2A_FDD_t *)&DLSCH_alloc_pdu_1[0])->rv2 = 0;
memcpy(&dci_alloc[0].dci_pdu[0],&DLSCH_alloc_pdu_1[0],sizeof(DCI2_10MHz_2A_FDD_t));
break;
case 100:
((DCI2_20MHz_2A_FDD_t *)&DLSCH_alloc_pdu_1[0])->tpmi = 2;
((DCI2_20MHz_2A_FDD_t *)&DLSCH_alloc_pdu_1[0])->mcs1 = mcs1;
((DCI2_20MHz_2A_FDD_t *)&DLSCH_alloc_pdu_1[0])->mcs2 = mcs2;
((DCI2_20MHz_2A_FDD_t *)&DLSCH_alloc_pdu_1[0])->ndi1 = trials&1;
((DCI2_20MHz_2A_FDD_t *)&DLSCH_alloc_pdu_1[0])->rv1 = 0;
((DCI2_20MHz_2A_FDD_t *)&DLSCH_alloc_pdu_1[0])->ndi2 = trials&1;
((DCI2_20MHz_2A_FDD_t *)&DLSCH_alloc_pdu_1[0])->rv2 = 0;
memcpy(&dci_alloc[0].dci_pdu[0],&DLSCH_alloc_pdu_1[0],sizeof(DCI2_20MHz_2A_FDD_t));
break;
}
} else if ((TB0_active == 1) && (TB1_active == 0)) {
switch (eNB->frame_parms.N_RB_DL) {
case 6:
((DCI2_1_5MHz_2A_FDD_t *)&DLSCH_alloc_pdu_1[0])->tpmi = 0;
((DCI2_1_5MHz_2A_FDD_t *)&DLSCH_alloc_pdu_1[0])->ndi1 = trials&1;
((DCI2_1_5MHz_2A_FDD_t *)&DLSCH_alloc_pdu_1[0])->rv1 = round&3;
((DCI2_1_5MHz_2A_FDD_t *)&DLSCH_alloc_pdu_1[0])->mcs2 = 0;
((DCI2_1_5MHz_2A_FDD_t *)&DLSCH_alloc_pdu_1[0])->rv2 = 1;
memcpy(&dci_alloc[0].dci_pdu[0],&DLSCH_alloc_pdu_1[0],sizeof(DCI2_1_5MHz_2A_FDD_t));
break;
case 25:
((DCI2_5MHz_2A_FDD_t *)&DLSCH_alloc_pdu_1[0])->tpmi = 0;
((DCI2_5MHz_2A_FDD_t *)&DLSCH_alloc_pdu_1[0])->ndi1 = trials&1;
((DCI2_5MHz_2A_FDD_t *)&DLSCH_alloc_pdu_1[0])->rv1 = round&3;
((DCI2_5MHz_2A_FDD_t *)&DLSCH_alloc_pdu_1[0])->mcs2 = 0;
((DCI2_5MHz_2A_FDD_t *)&DLSCH_alloc_pdu_1[0])->rv2 = 1;
memcpy(&dci_alloc[0].dci_pdu[0],&DLSCH_alloc_pdu_1[0],sizeof(DCI2_5MHz_2A_FDD_t));
break;
case 50:
((DCI2_10MHz_2A_FDD_t *)&DLSCH_alloc_pdu_1[0])->tpmi = 0;
((DCI2_10MHz_2A_FDD_t *)&DLSCH_alloc_pdu_1[0])->ndi1 = trials&1;
((DCI2_10MHz_2A_FDD_t *)&DLSCH_alloc_pdu_1[0])->rv1 = round&3;
((DCI2_10MHz_2A_FDD_t *)&DLSCH_alloc_pdu_1[0])->mcs2 = 0;
((DCI2_10MHz_2A_FDD_t *)&DLSCH_alloc_pdu_1[0])->rv2 = 1;
memcpy(&dci_alloc[0].dci_pdu[0],&DLSCH_alloc_pdu_1[0],sizeof(DCI2_10MHz_2A_FDD_t));
break;
case 100:
((DCI2_20MHz_2A_FDD_t *)&DLSCH_alloc_pdu_1[0])->tpmi = 0;
((DCI2_20MHz_2A_FDD_t *)&DLSCH_alloc_pdu_1[0])->ndi1 = trials&1;
((DCI2_20MHz_2A_FDD_t *)&DLSCH_alloc_pdu_1[0])->rv1 = round&3;
((DCI2_20MHz_2A_FDD_t *)&DLSCH_alloc_pdu_1[0])->mcs2 = 0;
((DCI2_20MHz_2A_FDD_t *)&DLSCH_alloc_pdu_1[0])->rv2 = 1;
memcpy(&dci_alloc[0].dci_pdu[0],&DLSCH_alloc_pdu_1[0],sizeof(DCI2_20MHz_2A_FDD_t));
break;
}
}
generate_eNB_dlsch_params_from_dci(0,
subframe,
&DLSCH_alloc_pdu_1[0],
n_rnti+k,
format2,
eNB->dlsch[0],
&eNB->frame_parms,
eNB->pdsch_config_dedicated,
SI_RNTI,
0,
P_RNTI,
UE->dlsch[subframe&0x1][0][1]->pmi_alloc,
transmission_mode>=7?transmission_mode:0
);
break;
case 5:
case 6:
DLSCH_alloc_pdu2_1E[0].ndi = trials&1;
@@ -2593,9 +2714,6 @@ int main(int argc, char **argv)
((DCI2_5MHz_2A_TDD_t *)&DLSCH_alloc_pdu_1[0])->rv2 = round&3;
}
else if (TB0_active == 0){ // deactivate TB0
#ifdef DEBUG_HARQ
printf("\n[DLSIM] Requesting only TB1 from temp DCI\n");
#endif
((DCI2_5MHz_2A_TDD_t *)&DLSCH_alloc_pdu_1[0])->tpmi = tpmi_retr;
((DCI2_5MHz_2A_TDD_t *)&DLSCH_alloc_pdu_1[0])->mcs1 = 0;
((DCI2_5MHz_2A_TDD_t *)&DLSCH_alloc_pdu_1[0])->rv1 = 1;
@@ -2603,9 +2721,6 @@ int main(int argc, char **argv)
((DCI2_5MHz_2A_TDD_t *)&DLSCH_alloc_pdu_1[0])->rv2 = round&3;
}
else { // deactivate TB1
#ifdef DEBUG_HARQ
printf("\n[DLSIM] TDD Requesting only TB0 from temp DCI\n");
#endif
((DCI2_5MHz_2A_TDD_t *)&DLSCH_alloc_pdu_1[0])->tpmi = tpmi_retr;
((DCI2_5MHz_2A_TDD_t *)&DLSCH_alloc_pdu_1[0])->ndi1 = trials&1;
((DCI2_5MHz_2A_TDD_t *)&DLSCH_alloc_pdu_1[0])->rv1 = round&3;
@@ -2821,9 +2936,6 @@ int main(int argc, char **argv)
((DCI2_5MHz_2A_FDD_t *)&DLSCH_alloc_pdu_1[0])->rv2 = round&3;
}
else if (TB0_active == 0){ // deactivate TB0
#ifdef DEBUG_HARQ
printf("\n [DLSIM] Requesting only TB1 from temp DCI\n");
#endif
((DCI2_5MHz_2A_FDD_t *)&DLSCH_alloc_pdu_1[0])->tpmi = tpmi_retr;
((DCI2_5MHz_2A_FDD_t *)&DLSCH_alloc_pdu_1[0])->mcs1 = 0;
((DCI2_5MHz_2A_FDD_t *)&DLSCH_alloc_pdu_1[0])->rv1 = 1;
@@ -2831,9 +2943,6 @@ int main(int argc, char **argv)
((DCI2_5MHz_2A_FDD_t *)&DLSCH_alloc_pdu_1[0])->rv2 = round&3;
}
else { // deactivate TB1
#ifdef DEBUG_HARQ
printf("\n[DLSIM] FDD Requesting only TB0 from temp DCI\n");
#endif
((DCI2_5MHz_2A_FDD_t *)&DLSCH_alloc_pdu_1[0])->tpmi = tpmi_retr;
((DCI2_5MHz_2A_FDD_t *)&DLSCH_alloc_pdu_1[0])->ndi1 = trials&1;
((DCI2_5MHz_2A_FDD_t *)&DLSCH_alloc_pdu_1[0])->rv1 = round&3;
@@ -2994,17 +3103,20 @@ int main(int argc, char **argv)
}
*/
}
#ifdef DEBUG_HARQ
printf("[DLSIM] UE->dlsch[subframe&0x1][0][%d]->pmi_alloc %d \n", TB, UE->dlsch[subframe&0x1][0][TB]->pmi_alloc);
#endif
//if standard case when both TBs are active
if (transmission_mode == 4) {
if (((((DCI2_5MHz_2A_TDD_t *)&DLSCH_alloc_pdu_1[k])->tpmi == 2) ||(((DCI2_5MHz_2A_FDD_t *)&DLSCH_alloc_pdu_1[k])->tpmi == 2)) && TB0_active == 1 && TB1_active == 1){
#ifdef DEBUG_HARQ
printf ("[DLSIM] I am calling from the eNode B 1\n");
printf ("[DLSIM] I am calling from the eNode B 1\n");
#endif
eNB->dlsch[0][TB]->harq_processes[0]->pmi_alloc = quantize_subband_pmi(&UE->measurements,0,eNB->frame_parms.N_RB_DL);
#ifdef DEBUG_HARQ
printf ("[DLSIM] I am calling from the eNode B 2\n");
printf ("[DLSIM] I am calling from the eNode B 2\n");
#endif
UE->dlsch[subframe&0x1][0][TB]->pmi_alloc = quantize_subband_pmi(&UE->measurements,0,UE->frame_parms.N_RB_DL);
@@ -3014,22 +3126,22 @@ int main(int argc, char **argv)
if (hold_rank1_precoder == 0 && ((((DCI2_5MHz_2A_TDD_t *)&DLSCH_alloc_pdu_1[k])->tpmi == 5) ||(((DCI2_5MHz_2A_FDD_t *)&DLSCH_alloc_pdu_1[k])->tpmi == 5))){
#ifdef DEBUG_HARQ
printf ("[DLSIM] I am calling from the eNode B 1\n");
printf ("[DLSIM] I am calling from the eNode B 1\n");
#endif
eNB->dlsch[0][TB]->harq_processes[0]->pmi_alloc = pmi_convert_rank1_from_rank2(eNB->dlsch[0][TB]->harq_processes[0]->pmi_alloc,5,eNB->frame_parms.N_RB_DL);
#ifdef DEBUG_HARQ
printf ("[DLSIM] I am calling from the eNode B 2\n");
printf ("[DLSIM] I am calling from the eNode B 2\n");
#endif
UE->dlsch[subframe&0x1][0][TB]->pmi_alloc = pmi_convert_rank1_from_rank2(UE->dlsch[subframe&0x1][0][TB]->pmi_alloc,5,UE->frame_parms.N_RB_DL);
}
else if (hold_rank1_precoder == 0 && ((((DCI2_5MHz_2A_TDD_t *)&DLSCH_alloc_pdu_1[k])->tpmi == 6) ||(((DCI2_5MHz_2A_FDD_t *)&DLSCH_alloc_pdu_1[k])->tpmi == 6))){
#ifdef DEBUG_HARQ
printf ("[DLSIM] I am calling from the eNode B 1\n");
printf ("[DLSIM] I am calling from the eNode B 1\n");
#endif
eNB->dlsch[0][TB]->harq_processes[0]->pmi_alloc = pmi_convert_rank1_from_rank2(eNB->dlsch[0][TB]->harq_processes[0]->pmi_alloc,6,eNB->frame_parms.N_RB_DL);
#ifdef DEBUG_HARQ
printf ("[DLSIM] I am calling from the eNode B 2\n");
printf ("[DLSIM] I am calling from the eNode B 2\n");
#endif
UE->dlsch[subframe&0x1][0][TB]->pmi_alloc = pmi_convert_rank1_from_rank2(UE->dlsch[subframe&0x1][0][TB]->pmi_alloc,6,UE->frame_parms.N_RB_DL);
}
@@ -3079,6 +3191,9 @@ int main(int argc, char **argv)
}
}
#ifdef DEBUG_HARQ
printf("[DLSIM 2 ] UE->dlsch[subframe&0x1][0][%d]->pmi_alloc %d \n", TB, UE->dlsch[subframe&0x1][0][TB]->pmi_alloc);
#endif
start_meas(&eNB->dlsch_encoding_stats);
if (dlsch_encoding(eNB,
@@ -3163,7 +3278,7 @@ int main(int argc, char **argv)
(subframe*2)+2,
&eNB->frame_parms);
if (n_frames==1) {
if (n_frames==2) {
write_output("txsigF0.m","txsF0", &eNB->common_vars.txdataF[eNB_id][0][subframe*nsymb*eNB->frame_parms.ofdm_symbol_size],nsymb*eNB->frame_parms.ofdm_symbol_size,1,1);
if (eNB->frame_parms.nb_antennas_tx>1)
write_output("txsigF1.m","txsF1", &eNB->common_vars.txdataF[eNB_id][1][subframe*nsymb*eNB->frame_parms.ofdm_symbol_size],nsymb*eNB->frame_parms.ofdm_symbol_size,1,1);
@@ -3177,7 +3292,7 @@ int main(int argc, char **argv)
}
tx_lev_dB = (unsigned int) dB_fixed(tx_lev);
if (n_frames==1) {
if (n_frames==2) {
write_output("txsigF0.m","txsF0", &eNB->common_vars.txdataF[eNB_id][0][subframe*nsymb*eNB->frame_parms.ofdm_symbol_size],nsymb*eNB->frame_parms.ofdm_symbol_size,1,1);
if (eNB->frame_parms.nb_antennas_tx>1)
write_output("txsigF1.m","txsF1", &eNB->common_vars.txdataF[eNB_id][1][subframe*nsymb*eNB->frame_parms.ofdm_symbol_size],nsymb*eNB->frame_parms.ofdm_symbol_size,1,1);
@@ -3378,7 +3493,7 @@ int main(int argc, char **argv)
for (Ns=(2*subframe);Ns<((2*subframe)+3);Ns++) {
for (l=0;l<pilot2;l++) {
if (n_frames==1)
printf("Ns %d, l %d, l2 %d\n",Ns, l, l+(Ns%2)*pilot2);
// printf("Ns %d, l %d, l2 %d\n",Ns, l, l+(Ns%2)*pilot2);
/*
This function implements the OFDM front end processor (FEP).
@@ -3443,14 +3558,19 @@ int main(int argc, char **argv)
}
if ((Ns==((2*subframe))) && (l==0)) {
ue_rrc_measurements(UE,
/*ue_rrc_measurements(UE,
0,
0);
0);*/
lte_ue_measurements(UE,
subframe*UE->frame_parms.samples_per_tti,
1,
0,
rank_adapt,
subframe);
if ((transmission_mode == 3) || (transmission_mode == 4))
rank_indc[round] = UE->measurements.rank[0];
//printf ("Trial %d, Measurements are done \n", trials);
/*
debug_msg("RX RSSI %d dBm, digital (%d, %d) dB, linear (%d, %d), avg rx power %d dB (%d lin), RX gain %d dB\n",
@@ -3610,6 +3730,9 @@ int main(int argc, char **argv)
UE->dlsch[subframe&0x1][0][0]->harq_processes[0]->first_tx=1;
UE->dlsch[subframe&0x1][0][1]->harq_processes[0]->first_tx=1;
}
#ifdef DEBUG_HARQ
printf("[DLSIM 3 ] UE->dlsch[subframe&0x1][0][1]->pmi_alloc %d \n", UE->dlsch[subframe&0x1][0][1]->pmi_alloc);
#endif
switch (transmission_mode) {
case 1:
@@ -3661,7 +3784,6 @@ int main(int argc, char **argv)
P_RNTI,
transmission_mode<7?0:transmission_mode,
UE->pdcch_vars[0]->crnti_is_temporary? UE->pdcch_vars[0]->crnti: 0);
break;
case 5:
case 6:
@@ -3702,7 +3824,6 @@ int main(int argc, char **argv)
start_meas(&UE->dlsch_llr_stats);
for (m=UE->pdcch_vars[0]->num_pdcch_symbols; m<pilot2; m++) {
if (rx_pdsch(UE,
PDSCH,
@@ -3890,7 +4011,7 @@ int main(int argc, char **argv)
/*avg_iter[TB] += ret[TB];
iter_trials[TB]++;*/
if (n_frames==2) {
if (n_frames==1) {
printf("cw non sic %d, round %d: No DLSCH errors found, uncoded ber %f\n",TB,round,uncoded_ber);
#ifdef PRINT_BYTES
for (s=0;s<UE->dlsch[subframe&0x1][0][TB]->harq_processes[0]->C;s++) {
@@ -4045,22 +4166,8 @@ int main(int argc, char **argv)
dlsch0_eNB_harq->dl_power_off = dlsch0_ue_harq->dl_power_off;
dlsch0_eNB_harq->status = dlsch0_ue_harq->status;
if (round_sic == 0){
UE->dlsch_eNB[eNB_id]->harq_processes[UE->dlsch[subframe&0x1][eNB_id][1]->current_harq_pid]->rvidx = 0;
UE->dlsch[subframe&0x1][0][1]->harq_processes[UE->dlsch[subframe&0x1][0][1]->current_harq_pid]->rvidx=0;
}
else if (round_sic == 1){
UE->dlsch_eNB[eNB_id]->harq_processes[UE->dlsch[subframe&0x1][eNB_id][1]->current_harq_pid]->rvidx = 1;
UE->dlsch[subframe&0x1][0][1]->harq_processes[UE->dlsch[subframe&0x1][0][1]->current_harq_pid]->rvidx=1;
}
else if (round_sic == 2){
UE->dlsch_eNB[eNB_id]->harq_processes[UE->dlsch[subframe&0x1][eNB_id][1]->current_harq_pid]->rvidx = 2;
UE->dlsch[subframe&0x1][0][1]->harq_processes[UE->dlsch[subframe&0x1][0][1]->current_harq_pid]->rvidx=2;
}
else{
UE->dlsch_eNB[eNB_id]->harq_processes[UE->dlsch[subframe&0x1][eNB_id][1]->current_harq_pid]->rvidx = 3;
UE->dlsch[subframe&0x1][0][1]->harq_processes[UE->dlsch[subframe&0x1][0][1]->current_harq_pid]->rvidx=3;
}
UE->dlsch_eNB[eNB_id]->harq_processes[UE->dlsch[subframe&0x1][eNB_id][1]->current_harq_pid]->rvidx = round_sic;
UE->dlsch[subframe&0x1][0][1]->harq_processes[UE->dlsch[subframe&0x1][0][1]->current_harq_pid]->rvidx=round_sic;
UE->dlsch_eNB[eNB_id]->active = UE->dlsch[subframe&0x1][eNB_id][0]->active;
UE->dlsch_eNB[eNB_id]->rnti = UE->dlsch[subframe&0x1][eNB_id][0]->rnti;
@@ -4178,7 +4285,7 @@ int main(int argc, char **argv)
UE->dlsch[subframe&0x1][0][1]->harq_processes[UE->dlsch[subframe&0x1][0][1]->current_harq_pid]->G = coded_bits_per_codeword[1];
UE->dlsch[subframe&0x1][0][1]->harq_processes[UE->dlsch[subframe&0x1][0][1]->current_harq_pid]->Qm = get_Qm(eNB->dlsch[0][1]->harq_processes[0]->mcs);
if (n_frames==2) {
if (n_frames==1) {
printf("Kmimo=%d, cw=%d, G=%d, TBS=%d\n",Kmimo,1,coded_bits_per_codeword[1],
UE->dlsch[subframe&0x1][0][1]->harq_processes[UE->dlsch[subframe&0x1][0][1]->current_harq_pid]->TBS);
@@ -4250,7 +4357,7 @@ int main(int argc, char **argv)
iter_trials[1]++;
if (n_frames==2) {
if (n_frames==1) {
printf("cw sic %d, round %d: No DLSCH errors found, uncoded ber %f\n",1,round,uncoded_ber);
#ifdef PRINT_BYTES
@@ -4285,7 +4392,7 @@ int main(int argc, char **argv)
avg_iter[1] += ret[1]-1;
iter_trials[1]++;
if (n_frames==2) {
if (n_frames==1) {
//if ((n_frames==1) || (SNR>=30)) {
printf("cw sic %d, round %d: DLSCH errors found, uncoded ber %f\n",1,round,uncoded_ber);
#ifdef PRINT_BYTES
@@ -4336,7 +4443,7 @@ int main(int argc, char **argv)
}*/
if (n_frames==2) {
if (n_frames==1) {
//if ((n_frames==1) || (SNR>=30)) {
printf("cw %d, round %d: DLSCH errors found, uncoded ber %f\n",TB,round,uncoded_ber);
#ifdef PRINT_BYTES
@@ -4362,7 +4469,7 @@ int main(int argc, char **argv)
stop_meas(&UE->phy_proc_rx[subframe&0x1]);
if (n_frames==1) {
if (n_frames==4) {
//rxsig
sprintf(fname,"rxsig0_r%d.m",round);
@@ -5294,7 +5401,7 @@ int main(int argc, char **argv)
}
if (n_frames==1)
if (n_frames==2)
break;
}// SNR