postpone initialization of UL_tti_req_ahead to when sl_ahead is available
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@@ -60,7 +60,7 @@ int nr_phy_init_RU(RU_t *ru) {
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for (i=0; i<ru->nb_tx; i++) {
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for (i=0; i<ru->nb_tx; i++) {
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// Allocate 10 subframes of I/Q TX signal data (time) if not
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// Allocate 10 subframes of I/Q TX signal data (time) if not
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ru->common.txdata[i] = (int32_t*)malloc16_clear( ru->sf_extension + (fp->samples_per_frame*sizeof(int32_t) ));
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ru->common.txdata[i] = (int32_t*)malloc16_clear((ru->sf_extension + fp->samples_per_frame)*sizeof(int32_t));
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LOG_I(PHY,"[INIT] common.txdata[%d] = %p (%lu bytes,sf_extension %d)\n",i,ru->common.txdata[i],
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LOG_I(PHY,"[INIT] common.txdata[%d] = %p (%lu bytes,sf_extension %d)\n",i,ru->common.txdata[i],
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(ru->sf_extension + fp->samples_per_frame)*sizeof(int32_t),ru->sf_extension);
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(ru->sf_extension + fp->samples_per_frame)*sizeof(int32_t),ru->sf_extension);
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ru->common.txdata[i] = &ru->common.txdata[i][ru->sf_extension];
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ru->common.txdata[i] = &ru->common.txdata[i][ru->sf_extension];
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@@ -462,8 +462,7 @@ int nr_mac_enable_ue_rrc_processing_timer(module_id_t Mod_idP, rnti_t rnti, NR_S
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return -1;
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return -1;
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}
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}
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NR_UE_sched_ctrl_t *sched_ctrl = &UE_info->UE_sched_ctrl;
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NR_UE_sched_ctrl_t *sched_ctrl = &UE_info->UE_sched_ctrl;
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const uint16_t sf_ahead = 6/(0x01<<subcarrierSpacing) + ((6%(0x01<<subcarrierSpacing))>0);
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const uint16_t sl_ahead = RC.nrmac[Mod_idP]->if_inst->sl_ahead;
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const uint16_t sl_ahead = sf_ahead * (0x01<<subcarrierSpacing);
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sched_ctrl->rrc_processing_timer = (rrc_reconfiguration_delay<<subcarrierSpacing) + sl_ahead;
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sched_ctrl->rrc_processing_timer = (rrc_reconfiguration_delay<<subcarrierSpacing) + sl_ahead;
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LOG_I(NR_MAC, "Activating RRC processing timer for UE %04x with %d ms\n", UE_info->rnti, rrc_reconfiguration_delay);
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LOG_I(NR_MAC, "Activating RRC processing timer for UE %04x with %d ms\n", UE_info->rnti, rrc_reconfiguration_delay);
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@@ -486,19 +485,7 @@ int rrc_mac_config_req_gNB(module_id_t Mod_idP,
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if (scc != NULL ) {
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if (scc != NULL ) {
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AssertFatal((scc->ssb_PositionsInBurst->present > 0) && (scc->ssb_PositionsInBurst->present < 4), "SSB Bitmap type %d is not valid\n",scc->ssb_PositionsInBurst->present);
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AssertFatal((scc->ssb_PositionsInBurst->present > 0) && (scc->ssb_PositionsInBurst->present < 4), "SSB Bitmap type %d is not valid\n",scc->ssb_PositionsInBurst->present);
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/* dimension UL_tti_req_ahead for number of slots in frame */
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const int n = nr_slots_per_frame[*scc->ssbSubcarrierSpacing];
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const int n = nr_slots_per_frame[*scc->ssbSubcarrierSpacing];
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RC.nrmac[Mod_idP]->UL_tti_req_ahead[0] = calloc(n, sizeof(nfapi_nr_ul_tti_request_t));
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AssertFatal(RC.nrmac[Mod_idP]->UL_tti_req_ahead[0],
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"could not allocate memory for RC.nrmac[]->UL_tti_req_ahead[]\n");
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/* fill in slot/frame numbers: slot is fixed, frame will be updated by scheduler
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* consider that scheduler runs sl_ahead: the first sl_ahead slots are
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* already "in the past" and thus we put frame 1 instead of 0! */
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for (int i = 0; i < n; ++i) {
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nfapi_nr_ul_tti_request_t *req = &RC.nrmac[Mod_idP]->UL_tti_req_ahead[0][i];
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req->SFN = i < (RC.nrmac[Mod_idP]->if_inst->sl_ahead-1);
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req->Slot = i;
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}
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RC.nrmac[Mod_idP]->common_channels[0].vrb_map_UL =
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RC.nrmac[Mod_idP]->common_channels[0].vrb_map_UL =
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calloc(n * MAX_BWP_SIZE, sizeof(uint16_t));
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calloc(n * MAX_BWP_SIZE, sizeof(uint16_t));
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AssertFatal(RC.nrmac[Mod_idP]->common_channels[0].vrb_map_UL,
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AssertFatal(RC.nrmac[Mod_idP]->common_channels[0].vrb_map_UL,
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@@ -68,6 +68,9 @@ void clear_nr_nfapi_information(gNB_MAC_INST * gNB,
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NR_ServingCellConfigCommon_t *scc = gNB->common_channels->ServingCellConfigCommon;
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NR_ServingCellConfigCommon_t *scc = gNB->common_channels->ServingCellConfigCommon;
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const int num_slots = nr_slots_per_frame[*scc->ssbSubcarrierSpacing];
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const int num_slots = nr_slots_per_frame[*scc->ssbSubcarrierSpacing];
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if(gNB->init_UL_tti_req_ahead == false)
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UL_tti_req_ahead_initialization(gNB, scc, num_slots);
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nfapi_nr_dl_tti_request_t *DL_req = &gNB->DL_req[0];
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nfapi_nr_dl_tti_request_t *DL_req = &gNB->DL_req[0];
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nfapi_nr_dl_tti_pdcch_pdu_rel15_t **pdcch = (nfapi_nr_dl_tti_pdcch_pdu_rel15_t **)gNB->pdcch_pdu_idx[CC_idP];
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nfapi_nr_dl_tti_pdcch_pdu_rel15_t **pdcch = (nfapi_nr_dl_tti_pdcch_pdu_rel15_t **)gNB->pdcch_pdu_idx[CC_idP];
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nfapi_nr_ul_tti_request_t *future_ul_tti_req =
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nfapi_nr_ul_tti_request_t *future_ul_tti_req =
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@@ -2996,3 +2996,19 @@ void schedule_nr_bwp_switch(module_id_t module_id,
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}
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}
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}
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}
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}
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}
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void UL_tti_req_ahead_initialization(gNB_MAC_INST * gNB, NR_ServingCellConfigCommon_t *scc, int n) {
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gNB->UL_tti_req_ahead[0] = calloc(n, sizeof(nfapi_nr_ul_tti_request_t));
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AssertFatal(gNB->UL_tti_req_ahead[0],
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"could not allocate memory for RC.nrmac[]->UL_tti_req_ahead[]\n");
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/* fill in slot/frame numbers: slot is fixed, frame will be updated by scheduler
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* consider that scheduler runs sl_ahead: the first sl_ahead slots are
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* already "in the past" and thus we put frame 1 instead of 0! */
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for (int i = 0; i < n; ++i) {
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nfapi_nr_ul_tti_request_t *req = &gNB->UL_tti_req_ahead[0][i];
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req->SFN = i < (gNB->if_inst->sl_ahead-1);
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req->Slot = i;
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}
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gNB->init_UL_tti_req_ahead = true;
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}
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@@ -532,6 +532,8 @@ int get_mcs_from_bler(const NR_bler_options_t *bler_options,
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int max_mcs,
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int max_mcs,
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frame_t frame);
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frame_t frame);
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void UL_tti_req_ahead_initialization(gNB_MAC_INST * gNB, NR_ServingCellConfigCommon_t *scc, int n);
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void nr_sr_reporting(gNB_MAC_INST *nrmac, frame_t frameP, sub_frame_t slotP);
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void nr_sr_reporting(gNB_MAC_INST *nrmac, frame_t frameP, sub_frame_t slotP);
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void dump_mac_stats(gNB_MAC_INST *gNB, char *output, int strlen, bool reset_rsrp);
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void dump_mac_stats(gNB_MAC_INST *gNB, char *output, int strlen, bool reset_rsrp);
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@@ -850,6 +850,7 @@ typedef struct gNB_MAC_INST_s {
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uint8_t harq_round_max;
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uint8_t harq_round_max;
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uint8_t min_grant_prb;
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uint8_t min_grant_prb;
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uint8_t min_grant_mcs;
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uint8_t min_grant_mcs;
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bool init_UL_tti_req_ahead;
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} gNB_MAC_INST;
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} gNB_MAC_INST;
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#endif /*__LAYER2_NR_MAC_GNB_H__ */
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#endif /*__LAYER2_NR_MAC_GNB_H__ */
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